Add root port SIG records.

This commit is contained in:
steve 2001-08-31 02:59:06 +00:00
parent 03b428b6cb
commit a9b5c9c037
3 changed files with 47 additions and 10 deletions

View File

@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: d-generic.c,v 1.1 2001/08/28 04:14:20 steve Exp $"
#ident "$Id: d-generic.c,v 1.2 2001/08/31 02:59:06 steve Exp $"
# include "device.h"
# include "fpga_priv.h"
@ -46,6 +46,7 @@ static void generic_show_logic(ivl_net_logic_t net)
draw_pin(nex, "I0", 'I');
nex = ivl_logic_pin(net, 2);
draw_pin(nex, "I1", 'I');
fprintf(xnf, "END\n");
break;
case IVL_LO_BUF:
@ -55,6 +56,7 @@ static void generic_show_logic(ivl_net_logic_t net)
draw_pin(nex, "O", 'O');
nex = ivl_logic_pin(net, 1);
draw_pin(nex, "I", 'I');
fprintf(xnf, "END\n");
break;
default:
@ -63,7 +65,6 @@ static void generic_show_logic(ivl_net_logic_t net)
break;
}
fprintf(xnf, "END\n");
}
static void generic_show_dff(ivl_lpm_t net)
@ -84,7 +85,6 @@ static void generic_show_dff(ivl_lpm_t net)
}
const struct device_s d_generic = {
0, /* no parent */
generic_show_logic,
generic_show_dff
};
@ -92,6 +92,9 @@ const struct device_s d_generic = {
/*
* $Log: d-generic.c,v $
* Revision 1.2 2001/08/31 02:59:06 steve
* Add root port SIG records.
*
* Revision 1.1 2001/08/28 04:14:20 steve
* Add the fpga target.
*

View File

@ -18,7 +18,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: device.h,v 1.1 2001/08/28 04:14:20 steve Exp $"
#ident "$Id: device.h,v 1.2 2001/08/31 02:59:06 steve Exp $"
# include <ivl_target.h>
@ -31,16 +31,11 @@
* If a device supports a method, the function pointer is filled in
* with a pointer to the proper function.
*
* If a device inherits from a parent class, then it put a pointer to
* a function that invokes the parent method.
*
* If a device does not support the method, then the pointer is null.
*/
typedef const struct device_s* device_t;
struct device_s {
/* This is the parent device type. */
struct device_s* parent;
/* Draw basic logic devices. */
void (*show_logic)(ivl_net_logic_t net);
/* This method emits a D type Flip-Flop */
@ -50,6 +45,9 @@ struct device_s {
/*
* $Log: device.h,v $
* Revision 1.2 2001/08/31 02:59:06 steve
* Add root port SIG records.
*
* Revision 1.1 2001/08/28 04:14:20 steve
* Add the fpga target.
*

View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: fpga.c,v 1.1 2001/08/28 04:14:20 steve Exp $"
#ident "$Id: fpga.c,v 1.2 2001/08/31 02:59:06 steve Exp $"
#endif
# include "config.h"
@ -44,6 +44,37 @@ static int show_process(ivl_process_t net, void*x)
return 0;
}
static void show_root_ports(ivl_scope_t root)
{
unsigned cnt = ivl_scope_sigs(root);
unsigned idx;
for (idx = 0 ; idx < cnt ; idx += 1) {
ivl_signal_t sig = ivl_scope_sig(root, idx);
const char*use_name;
if (ivl_signal_port(sig) == IVL_SIP_NONE)
continue;
use_name = ivl_signal_basename(sig);
if (ivl_signal_pins(sig) == 1) {
ivl_nexus_t nex = ivl_signal_pin(sig, 0);
fprintf(xnf, "SIG, %s, PIN=%s\n",
mangle_nexus_name(nex), use_name);
} else {
unsigned pin;
for (pin = 0 ; pin < ivl_signal_pins(sig); pin += 1) {
ivl_nexus_t nex = ivl_signal_pin(sig, pin);
fprintf(xnf, "SIG, %s, PIN=%s%u\n",
mangle_nexus_name(nex), use_name,
pin);
}
}
}
}
/*
* This is the main entry point that ivl uses to invoke me, the code
* generator.
@ -73,6 +104,8 @@ int target_design(ivl_design_t des)
that it is not supported. */
ivl_design_process(des, show_process, 0);
show_root_ports(root);
/* Scan the scopes, looking for gates to draw into the output
netlist. */
show_scope_gates(root, 0);
@ -83,6 +116,9 @@ int target_design(ivl_design_t des)
/*
* $Log: fpga.c,v $
* Revision 1.2 2001/08/31 02:59:06 steve
* Add root port SIG records.
*
* Revision 1.1 2001/08/28 04:14:20 steve
* Add the fpga target.
*