Add root port SIG records.
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parent
03b428b6cb
commit
a9b5c9c037
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@ -16,7 +16,7 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ident "$Id: d-generic.c,v 1.1 2001/08/28 04:14:20 steve Exp $"
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#ident "$Id: d-generic.c,v 1.2 2001/08/31 02:59:06 steve Exp $"
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# include "device.h"
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# include "fpga_priv.h"
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@ -46,6 +46,7 @@ static void generic_show_logic(ivl_net_logic_t net)
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draw_pin(nex, "I0", 'I');
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nex = ivl_logic_pin(net, 2);
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draw_pin(nex, "I1", 'I');
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fprintf(xnf, "END\n");
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break;
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case IVL_LO_BUF:
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@ -55,6 +56,7 @@ static void generic_show_logic(ivl_net_logic_t net)
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draw_pin(nex, "O", 'O');
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nex = ivl_logic_pin(net, 1);
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draw_pin(nex, "I", 'I');
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fprintf(xnf, "END\n");
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break;
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default:
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@ -63,7 +65,6 @@ static void generic_show_logic(ivl_net_logic_t net)
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break;
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}
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fprintf(xnf, "END\n");
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}
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static void generic_show_dff(ivl_lpm_t net)
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@ -84,7 +85,6 @@ static void generic_show_dff(ivl_lpm_t net)
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}
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const struct device_s d_generic = {
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0, /* no parent */
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generic_show_logic,
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generic_show_dff
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};
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@ -92,6 +92,9 @@ const struct device_s d_generic = {
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/*
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* $Log: d-generic.c,v $
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* Revision 1.2 2001/08/31 02:59:06 steve
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* Add root port SIG records.
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*
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* Revision 1.1 2001/08/28 04:14:20 steve
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* Add the fpga target.
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*
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@ -18,7 +18,7 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ident "$Id: device.h,v 1.1 2001/08/28 04:14:20 steve Exp $"
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#ident "$Id: device.h,v 1.2 2001/08/31 02:59:06 steve Exp $"
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# include <ivl_target.h>
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@ -31,16 +31,11 @@
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* If a device supports a method, the function pointer is filled in
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* with a pointer to the proper function.
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*
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* If a device inherits from a parent class, then it put a pointer to
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* a function that invokes the parent method.
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*
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* If a device does not support the method, then the pointer is null.
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*/
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typedef const struct device_s* device_t;
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struct device_s {
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/* This is the parent device type. */
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struct device_s* parent;
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/* Draw basic logic devices. */
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void (*show_logic)(ivl_net_logic_t net);
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/* This method emits a D type Flip-Flop */
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@ -50,6 +45,9 @@ struct device_s {
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/*
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* $Log: device.h,v $
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* Revision 1.2 2001/08/31 02:59:06 steve
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* Add root port SIG records.
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*
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* Revision 1.1 2001/08/28 04:14:20 steve
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* Add the fpga target.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: fpga.c,v 1.1 2001/08/28 04:14:20 steve Exp $"
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#ident "$Id: fpga.c,v 1.2 2001/08/31 02:59:06 steve Exp $"
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#endif
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# include "config.h"
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@ -44,6 +44,37 @@ static int show_process(ivl_process_t net, void*x)
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return 0;
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}
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static void show_root_ports(ivl_scope_t root)
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{
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unsigned cnt = ivl_scope_sigs(root);
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unsigned idx;
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for (idx = 0 ; idx < cnt ; idx += 1) {
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ivl_signal_t sig = ivl_scope_sig(root, idx);
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const char*use_name;
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if (ivl_signal_port(sig) == IVL_SIP_NONE)
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continue;
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use_name = ivl_signal_basename(sig);
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if (ivl_signal_pins(sig) == 1) {
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ivl_nexus_t nex = ivl_signal_pin(sig, 0);
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fprintf(xnf, "SIG, %s, PIN=%s\n",
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mangle_nexus_name(nex), use_name);
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} else {
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unsigned pin;
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for (pin = 0 ; pin < ivl_signal_pins(sig); pin += 1) {
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ivl_nexus_t nex = ivl_signal_pin(sig, pin);
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fprintf(xnf, "SIG, %s, PIN=%s%u\n",
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mangle_nexus_name(nex), use_name,
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pin);
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}
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}
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}
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}
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/*
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* This is the main entry point that ivl uses to invoke me, the code
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* generator.
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@ -73,6 +104,8 @@ int target_design(ivl_design_t des)
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that it is not supported. */
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ivl_design_process(des, show_process, 0);
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show_root_ports(root);
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/* Scan the scopes, looking for gates to draw into the output
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netlist. */
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show_scope_gates(root, 0);
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@ -83,6 +116,9 @@ int target_design(ivl_design_t des)
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/*
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* $Log: fpga.c,v $
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* Revision 1.2 2001/08/31 02:59:06 steve
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* Add root port SIG records.
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*
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* Revision 1.1 2001/08/28 04:14:20 steve
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* Add the fpga target.
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*
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