document the -y flag.
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README.txt
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README.txt
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@ -308,10 +308,12 @@ Usage: ivl <options>... file
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options/parameters to optimization functions, if any are defined.
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-s <module>
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Normally, ivl will elaborate the only module in the source
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file. If there are multiple modules, use this option to select
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the module to be used as the top-level module.
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Normally, ivl will locate all the modules that are defined but
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never instantiated, and use these as the design roots for
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elaboration. This flag allows the choice of root module(s) to
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be manually overridden. It can be used more than once on the
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command line if multiple root modules are needed.
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-T [min|typ|max]
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Normally, ivl will select typ values from min:type:max
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expressions and print a warning. This flag tells the compiler
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@ -327,6 +329,13 @@ Usage: ivl <options>... file
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-V
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Print version and copyright information for ivl, and exit.
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-y <dir>
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Add the specified directory to the library search path. If
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missing modules are discovered during elaboration, ivl will
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attempt to locate an implementation by searching the library
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directories for a Verilog source file with the same name as
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the module.
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4.2 EXAMPLES
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Example: Compiling "hello.vl"
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