release candidate 0.6

This commit is contained in:
steve 2002-01-28 01:33:54 +00:00
parent 364ffc9024
commit b761a105b3
1 changed files with 3 additions and 3 deletions

View File

@ -1,10 +1,10 @@
Summary: Icarus Verilog
Name: verilog
Version: 0.5
Version: 0.6
Release: 0
Copyright: GPL
Group: Applications/Engineering
Source: ftp://icarus.com/pub/eda/verilog/v0.5/verilog-0.5.tar.gz
Source: ftp://icarus.com/pub/eda/verilog/v0.6/verilog-0.6.tar.gz
URL: http://www.icarus.com/eda/verilog/index.html
Packager: Stephen Williams <steve@icarus.com>
@ -20,7 +20,7 @@ engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard.
%prep
%setup -n verilog-0.5
%setup -n verilog-0.6
%build
./configure --prefix=/usr