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identity compare, and PWR records for constants.

This commit is contained in:
steve 2001-09-01 02:01:30 +00:00
parent d762a320dc
commit 77927972e5
4 changed files with 116 additions and 5 deletions
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76
tgt-fpga/d-generic.c
View File

@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: d-generic.c,v 1.4 2001/08/31 23:02:13 steve Exp $"
#ident "$Id: d-generic.c,v 1.5 2001/09/01 02:01:30 steve Exp $"
# include "device.h"
# include "fpga_priv.h"
@ -190,14 +190,86 @@ static void generic_show_dff(ivl_lpm_t net)
fprintf(xnf, "END\n");
}
/*
* The generic == comparator uses EQN records to generate 2-bit
* comparators, that are then connected together by a wide AND gate.
*/
static void generic_show_cmp_eq(ivl_lpm_t net)
{
ivl_nexus_t nex;
unsigned idx;
char name[1024];
/* Make this many dual pair comparators, and */
unsigned deqn = ivl_lpm_width(net) / 2;
/* Make this many single pair comparators. */
unsigned seqn = ivl_lpm_width(net) % 2;
mangle_lpm_name(net, name, sizeof name);
for (idx = 0 ; idx < deqn ; idx += 1) {
fprintf(xnf, "SYM, %s/CD%u, EQN, "
"EQN=(~((I0 @ I1) + (I2 @ I3)))\n",
name, idx);
fprintf(xnf, " PIN, O, O, %s/CDO%u\n", name, idx);
nex = ivl_lpm_data(net, 2*idx);
draw_pin(nex, "I0", 'I');
nex = ivl_lpm_datab(net, 2*idx);
draw_pin(nex, "I1", 'I');
nex = ivl_lpm_data(net, 2*idx+1);
draw_pin(nex, "I2", 'I');
nex = ivl_lpm_datab(net, 2*idx+1);
draw_pin(nex, "I3", 'I');
fprintf(xnf, "END\n");
}
if (seqn != 0) {
fprintf(xnf, "SYM, %s/CT, XNOR, LIBVER=2.0.0\n", name);
fprintf(xnf, " PIN, O, O, %s/CTO\n", name);
nex = ivl_lpm_data(net, 2*deqn);
draw_pin(nex, "I0", 'I');
nex = ivl_lpm_datab(net, 2*deqn);
draw_pin(nex, "I1", 'I');
fprintf(xnf, "END\n");
}
if (ivl_lpm_type(net) == IVL_LPM_CMP_EQ)
fprintf(xnf, "SYM, %s/OUT, AND, LIBVER=2.0.0\n", name);
else
fprintf(xnf, "SYM, %s/OUT, NAND, LIBVER=2.0.0\n", name);
nex = ivl_lpm_q(net, 0);
draw_pin(nex, "O", 'O');
for (idx = 0 ; idx < deqn ; idx += 1)
fprintf(xnf, " PIN, I%u, I, %s/CDO%u\n", idx, name, idx);
for (idx = 0 ; idx < seqn ; idx += 1)
fprintf(xnf, " PIN, I%u, I, %s/CTO\n", deqn+idx, name);
fprintf(xnf, "END\n");
}
const struct device_s d_generic = {
generic_show_logic,
generic_show_dff
generic_show_dff,
generic_show_cmp_eq,
generic_show_cmp_eq
};
/*
* $Log: d-generic.c,v $
* Revision 1.5 2001/09/01 02:01:30 steve
* identity compare, and PWR records for constants.
*
* Revision 1.4 2001/08/31 23:02:13 steve
* Relax pin count restriction on logic gates.
*

8
tgt-fpga/device.h
View File

@ -18,7 +18,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: device.h,v 1.2 2001/08/31 02:59:06 steve Exp $"
#ident "$Id: device.h,v 1.3 2001/09/01 02:01:30 steve Exp $"
# include <ivl_target.h>
@ -40,11 +40,17 @@ struct device_s {
void (*show_logic)(ivl_net_logic_t net);
/* This method emits a D type Flip-Flop */
void (*show_dff)(ivl_lpm_t net);
/* These methods show various comparators */
void (*show_cmp_eq)(ivl_lpm_t net);
void (*show_cmp_ne)(ivl_lpm_t net);
};
/*
* $Log: device.h,v $
* Revision 1.3 2001/09/01 02:01:30 steve
* identity compare, and PWR records for constants.
*
* Revision 1.2 2001/08/31 02:59:06 steve
* Add root port SIG records.
*

24
tgt-fpga/fpga.c
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: fpga.c,v 1.2 2001/08/31 02:59:06 steve Exp $"
#ident "$Id: fpga.c,v 1.3 2001/09/01 02:01:30 steve Exp $"
#endif
# include "config.h"
@ -75,6 +75,23 @@ static void show_root_ports(ivl_scope_t root)
}
}
static void show_design_consts(ivl_design_t des)
{
unsigned idx;
for (idx = 0 ; idx < ivl_design_consts(des) ; idx += 1) {
unsigned pin;
ivl_net_const_t net = ivl_design_const(des, idx);
const char*val = ivl_const_bits(net);
for (pin = 0 ; pin < ivl_const_pins(net) ; pin += 1) {
ivl_nexus_t nex = ivl_const_pin(net, pin);
fprintf(xnf, "PWR,%c,%s\n", val[pin],
mangle_nexus_name(nex));
}
}
}
/*
* This is the main entry point that ivl uses to invoke me, the code
* generator.
@ -110,12 +127,17 @@ int target_design(ivl_design_t des)
netlist. */
show_scope_gates(root, 0);
show_design_consts(des);
fprintf(xnf, "EOF\n");
return 0;
}
/*
* $Log: fpga.c,v $
* Revision 1.3 2001/09/01 02:01:30 steve
* identity compare, and PWR records for constants.
*
* Revision 1.2 2001/08/31 02:59:06 steve
* Add root port SIG records.
*

13
tgt-fpga/gates.c
View File

@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: gates.c,v 1.2 2001/08/30 04:31:04 steve Exp $"
#ident "$Id: gates.c,v 1.3 2001/09/01 02:01:30 steve Exp $"
# include <ivl_target.h>
# include "fpga_priv.h"
@ -50,6 +50,14 @@ static void show_gate_lpm(ivl_lpm_t net)
{
switch (ivl_lpm_type(net)) {
case IVL_LPM_CMP_EQ:
device->show_cmp_eq(net);
break;
case IVL_LPM_CMP_NE:
device->show_cmp_ne(net);
break;
case IVL_LPM_FF:
device->show_dff(net);
break;
@ -76,6 +84,9 @@ int show_scope_gates(ivl_scope_t net, void*x)
/*
* $Log: gates.c,v $
* Revision 1.3 2001/09/01 02:01:30 steve
* identity compare, and PWR records for constants.
*
* Revision 1.2 2001/08/30 04:31:04 steve
* Mangle nexus names.
*