detect module ports not declared within the module.
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parent
438605fad5
commit
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8
Module.h
8
Module.h
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@ -19,13 +19,14 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: Module.h,v 1.22 2001/10/20 05:21:51 steve Exp $"
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#ident "$Id: Module.h,v 1.23 2001/10/31 03:11:15 steve Exp $"
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#endif
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# include <list>
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# include <map>
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# include "svector.h"
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# include "named.h"
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# include "LineInfo.h"
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# include <string>
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class PEvent;
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class PExpr;
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@ -44,7 +45,7 @@ class NetScope;
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* therefore the handle for grasping the described circuit.
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*/
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class Module {
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class Module : public LineInfo {
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/* The module ports are in general a vector of port_t
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objects. Each port has a name and an ordered list of
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@ -143,6 +144,9 @@ class Module {
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/*
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* $Log: Module.h,v $
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* Revision 1.23 2001/10/31 03:11:15 steve
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* detect module ports not declared within the module.
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*
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* Revision 1.22 2001/10/20 05:21:51 steve
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* Scope/module names are char* instead of string.
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*
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27
elab_sig.cc
27
elab_sig.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: elab_sig.cc,v 1.14 2001/07/25 03:10:49 steve Exp $"
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#ident "$Id: elab_sig.cc,v 1.15 2001/10/31 03:11:15 steve Exp $"
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#endif
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# include "config.h"
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@ -69,6 +69,27 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
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// start the signals list with them.
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const map<string,PWire*>&wl = get_wires();
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// Scan all the ports of the module, and make sure that each
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// is connected to wires that have port declarations.
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for (unsigned idx = 0 ; idx < ports_.count() ; idx += 1) {
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Module::port_t*pp = ports_[idx];
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if (pp == 0)
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continue;
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map<string,PWire*>::const_iterator wt;
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for (unsigned cc = 0 ; cc < pp->expr.count() ; cc += 1) {
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wt = wl.find(pp->expr[cc]->name());
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if (wt == wl.end()) {
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cerr << get_line() << ": error: "
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<< "Port " << pp->expr[cc]->name() << " ("
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<< (idx+1) << ") of module " << name_
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<< " is not declared within module." << endl;
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des->errors += 1;
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}
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}
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}
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for (map<string,PWire*>::const_iterator wt = wl.begin()
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; wt != wl.end()
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; wt ++ ) {
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@ -93,6 +114,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
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}
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}
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/* If the signal is an input and is also declared as a
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reg, then report an error. */
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@ -444,6 +466,9 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
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/*
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* $Log: elab_sig.cc,v $
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* Revision 1.15 2001/10/31 03:11:15 steve
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* detect module ports not declared within the module.
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*
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* Revision 1.14 2001/07/25 03:10:49 steve
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* Create a config.h.in file to hold all the config
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* junk, and support gcc 3.0. (Stephan Boettcher)
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6
parse.y
6
parse.y
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: parse.y,v 1.132 2001/10/26 03:22:56 steve Exp $"
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#ident "$Id: parse.y,v 1.133 2001/10/31 03:11:15 steve Exp $"
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#endif
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# include "config.h"
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@ -1154,7 +1154,7 @@ assign_list
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module
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: module_start IDENTIFIER list_of_ports_opt ';'
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{ pform_startmodule($2, $3);
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{ pform_startmodule($2, $3, @1.text, @1.first_line);
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}
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module_item_list
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K_endmodule
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@ -1162,7 +1162,7 @@ module
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delete $2;
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}
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| module_start IDENTIFIER list_of_ports_opt ';'
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{ pform_startmodule($2, $3);
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{ pform_startmodule($2, $3, @1.text, @1.first_line);
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}
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K_endmodule
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{ pform_endmodule($2);
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12
pform.cc
12
pform.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: pform.cc,v 1.82 2001/10/21 01:55:24 steve Exp $"
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#ident "$Id: pform.cc,v 1.83 2001/10/31 03:11:15 steve Exp $"
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#endif
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# include "config.h"
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@ -109,7 +109,8 @@ static unsigned long evaluate_delay(PExpr*delay)
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return pp->value().as_ulong();
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}
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void pform_startmodule(const char*name, svector<Module::port_t*>*ports)
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void pform_startmodule(const char*name, svector<Module::port_t*>*ports,
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const char*file, unsigned lineno)
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{
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assert( pform_cur_module == 0 );
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@ -124,6 +125,10 @@ void pform_startmodule(const char*name, svector<Module::port_t*>*ports)
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pform_cur_module = new Module(name, ports);
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pform_cur_module->time_unit = pform_time_unit;
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pform_cur_module->time_precision = pform_time_prec;
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pform_cur_module->set_file(file);
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pform_cur_module->set_lineno(lineno);
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delete ports;
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}
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@ -1097,6 +1102,9 @@ int pform_parse(const char*path, FILE*file)
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/*
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* $Log: pform.cc,v $
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* Revision 1.83 2001/10/31 03:11:15 steve
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* detect module ports not declared within the module.
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*
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* Revision 1.82 2001/10/21 01:55:24 steve
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* Error messages for missing UDP port declarations.
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*
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8
pform.h
8
pform.h
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: pform.h,v 1.49 2001/10/21 01:55:25 steve Exp $"
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#ident "$Id: pform.h,v 1.50 2001/10/31 03:11:15 steve Exp $"
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#endif
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# include "netlist.h"
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@ -110,7 +110,8 @@ struct lgate {
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* are to apply to the scope of that module. The endmodule causes the
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* pform to close up and finish the named module.
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*/
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extern void pform_startmodule(const char*, svector<Module::port_t*>*);
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extern void pform_startmodule(const char*, svector<Module::port_t*>*,
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const char*file, unsigned lineno);
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extern void pform_endmodule(const char*);
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extern void pform_make_udp(const char*name, list<string>*parms,
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@ -201,6 +202,9 @@ extern void pform_dump(ostream&out, Module*mod);
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/*
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* $Log: pform.h,v $
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* Revision 1.50 2001/10/31 03:11:15 steve
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* detect module ports not declared within the module.
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*
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* Revision 1.49 2001/10/21 01:55:25 steve
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* Error messages for missing UDP port declarations.
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*
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