Support non-const right shift (unsigned).
This commit is contained in:
steve
parent
d680e594ed
commit
baac893d22
9
t-dll.h
9
t-dll.h
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT) && !defined(macintosh)
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#ident "$Id: t-dll.h,v 1.50 2001/06/19 03:01:10 steve Exp $"
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#ident "$Id: t-dll.h,v 1.51 2001/06/30 21:07:26 steve Exp $"
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#endif
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# include "target.h"
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@ -434,8 +434,8 @@ struct ivl_scope_s {
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};
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/*
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* A signal is a think like a wire, a reg, or whatever. It has a type,
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* and if it is a port is also has a directory. Signals are collected
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* A signal is a thing like a wire, a reg, or whatever. It has a type,
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* and if it is a port is also has a direction. Signals are collected
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* into scopes (which also point back to me) and have pins that
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* connect to the rest of the netlist.
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*/
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@ -539,6 +539,9 @@ struct ivl_statement_s {
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/*
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* $Log: t-dll.h,v $
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* Revision 1.51 2001/06/30 21:07:26 steve
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* Support non-const right shift (unsigned).
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*
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* Revision 1.50 2001/06/19 03:01:10 steve
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* Add structural EEQ gates (Stephan Boettcher)
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: eval_expr.c,v 1.33 2001/06/23 18:40:34 steve Exp $"
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#ident "$Id: eval_expr.c,v 1.34 2001/06/30 21:07:26 steve Exp $"
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#endif
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# include "vvp_priv.h"
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@ -383,9 +383,12 @@ static struct vector_info draw_binary_expr_logic(ivl_expr_t exp,
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/*
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* Draw code to evaluate the << expression. Use the %shiftl/i0
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* instruction to do the real work of shifting.
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* or %shiftr/i0 instruction to do the real work of shifting. This
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* means that I can handle both left and right shifts in this
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* function, with the only difference the opcode I generate at the
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* end.
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*/
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static struct vector_info draw_binary_expr_ls(ivl_expr_t exp, unsigned wid)
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static struct vector_info draw_binary_expr_lrs(ivl_expr_t exp, unsigned wid)
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{
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ivl_expr_t le = ivl_expr_oper1(exp);
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ivl_expr_t re = ivl_expr_oper2(exp);
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@ -434,80 +437,23 @@ static struct vector_info draw_binary_expr_ls(ivl_expr_t exp, unsigned wid)
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lv = draw_eval_expr_wid(le, wid);
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fprintf(vvp_out, " %%shiftl/i0 %u, %u;\n", lv.base, lv.wid);
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switch (ivl_expr_opcode(exp)) {
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case 'l': /* << (left shift) */
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fprintf(vvp_out, " %%shiftl/i0 %u, %u;\n", lv.base, lv.wid);
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break;
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case 'r': /* >> (unsigned right shift) */
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fprintf(vvp_out, " %%shiftr/i0 %u, %u;\n", lv.base, lv.wid);
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break;
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default:
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assert(0);
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}
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return lv;
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}
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static struct vector_info draw_binary_expr_rs(ivl_expr_t exp, unsigned wid)
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{
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ivl_expr_t le = ivl_expr_oper1(exp);
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ivl_expr_t re = ivl_expr_oper2(exp);
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unsigned shift = 0;
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struct vector_info lv;
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struct vector_info rs;
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/* XXXX support only constant right expressions. */
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switch (ivl_expr_type(re)) {
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case IVL_EX_NUMBER: {
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unsigned idx, nbits = ivl_expr_width(re);
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const char*bits = ivl_expr_bits(re);
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for (idx = 0 ; idx < nbits ; idx += 1) switch (bits[idx]) {
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case '0':
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break;
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case '1':
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assert(idx < (8*sizeof shift));
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shift |= 1 << idx;
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break;
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default:
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assert(0);
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}
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break;
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}
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case IVL_EX_ULONG:
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shift = ivl_expr_uvalue(re);
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break;
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default:
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assert(0);
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break;
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}
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if (shift >= wid) {
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rs.base = 0;
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rs.wid = wid;
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return rs;
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}
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lv = draw_eval_expr_wid(le, wid);
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switch (lv.base) {
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case 0:
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return lv;
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case 1:
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case 2:
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case 3:
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rs.base = allocate_vector(wid);
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rs.wid = wid;
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fprintf(vvp_out, " %%mov %u, %u, %u;\n", rs.base,
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lv.base, wid-shift);
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fprintf(vvp_out, " %%mov %u, 0, %u;\n",
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rs.base+wid-shift, shift);
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return rs;
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default:
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assert(lv.wid == wid);
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fprintf(vvp_out, " %%mov %u, %u, %u;\n", lv.base,
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lv.base+shift, wid-shift);
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fprintf(vvp_out, " %%mov %u, 0, %u;\n",
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lv.base+wid-shift, shift);
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return lv;
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}
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}
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static struct vector_info draw_binary_expr_arith(ivl_expr_t exp, unsigned wid)
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{
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@ -581,17 +527,14 @@ static struct vector_info draw_binary_expr(ivl_expr_t exp, unsigned wid)
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break;
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case 'l': /* << */
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rv = draw_binary_expr_ls(exp, wid);
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case 'r': /* >> */
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rv = draw_binary_expr_lrs(exp, wid);
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break;
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case 'o': /* || (logical or) */
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rv = draw_binary_expr_lor(exp, wid);
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break;
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case 'r': /* >> */
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rv = draw_binary_expr_rs(exp, wid);
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break;
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case '&':
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case '|':
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case '^':
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@ -1066,6 +1009,9 @@ struct vector_info draw_eval_expr(ivl_expr_t exp)
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/*
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* $Log: eval_expr.c,v $
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* Revision 1.34 2001/06/30 21:07:26 steve
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* Support non-const right shift (unsigned).
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*
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* Revision 1.33 2001/06/23 18:40:34 steve
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* Generate %shiftl instructions for shift.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: codes.h,v 1.30 2001/06/23 18:26:26 steve Exp $"
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#ident "$Id: codes.h,v 1.31 2001/06/30 21:07:26 steve Exp $"
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#endif
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@ -73,6 +73,7 @@ extern bool of_ORR(vthread_t thr, vvp_code_t code);
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extern bool of_SET(vthread_t thr, vvp_code_t code);
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extern bool of_SET_MEM(vthread_t thr, vvp_code_t code);
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extern bool of_SHIFTL_I0(vthread_t thr, vvp_code_t code);
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extern bool of_SHIFTR_I0(vthread_t thr, vvp_code_t code);
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extern bool of_SUB(vthread_t thr, vvp_code_t code);
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extern bool of_VPI_CALL(vthread_t thr, vvp_code_t code);
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extern bool of_WAIT(vthread_t thr, vvp_code_t code);
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@ -135,6 +136,9 @@ extern vvp_code_t codespace_index(vvp_cpoint_t ptr);
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/*
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* $Log: codes.h,v $
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* Revision 1.31 2001/06/30 21:07:26 steve
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* Support non-const right shift (unsigned).
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*
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* Revision 1.30 2001/06/23 18:26:26 steve
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* Add the %shiftl/i0 instruction.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: compile.cc,v 1.81 2001/06/23 18:26:26 steve Exp $"
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#ident "$Id: compile.cc,v 1.82 2001/06/30 21:07:26 steve Exp $"
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#endif
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# include "arith.h"
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@ -112,6 +112,7 @@ const static struct opcode_table_s opcode_table[] = {
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{ "%set", of_SET, 2, {OA_FUNC_PTR, OA_BIT1, OA_NONE} },
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{ "%set/m", of_SET_MEM,2, {OA_MEM_PTR, OA_BIT1, OA_NONE} },
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{ "%shiftl/i0", of_SHIFTL_I0, 2, {OA_BIT1,OA_NUMBER, OA_NONE} },
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{ "%shiftr/i0", of_SHIFTR_I0, 2, {OA_BIT1,OA_NUMBER, OA_NONE} },
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{ "%sub", of_SUB, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%wait", of_WAIT, 1, {OA_FUNC_PTR, OA_NONE, OA_NONE} },
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{ "%xnor", of_XNOR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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@ -1449,6 +1450,9 @@ vvp_ipoint_t debug_lookup_functor(const char*name)
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/*
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* $Log: compile.cc,v $
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* Revision 1.82 2001/06/30 21:07:26 steve
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* Support non-const right shift (unsigned).
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*
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* Revision 1.81 2001/06/23 18:26:26 steve
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* Add the %shiftl/i0 instruction.
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*
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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* $Id: opcodes.txt,v 1.24 2001/06/23 18:26:26 steve Exp $
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* $Id: opcodes.txt,v 1.25 2001/06/30 21:07:26 steve Exp $
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*/
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@ -300,6 +300,15 @@ bits) by the amount in index register 0. The <bit> is the address of
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the lsb of the vector, and <wid> the width of the vector. The shift is
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done in place. Zero values are shifted in.
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* %shiftr/i0 <bit>, <wid>
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This instruction shifts the vector right (towards the less significant
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bits) by the amount in the index register 0. The <bit> is the address
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of the lsb of the vector, and <wid> is the width of the vector. The
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shift is done in place.
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This is an unsigned down shift, so zeros are shifted into the top bits.
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* %sub <bit-l>, <bit-r>, <wid>
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This instruction arithmetically subtracts the right vector out of the
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: vthread.cc,v 1.46 2001/06/23 18:26:26 steve Exp $"
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#ident "$Id: vthread.cc,v 1.47 2001/06/30 21:07:26 steve Exp $"
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#endif
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# include "vthread.h"
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@ -1099,6 +1099,31 @@ bool of_SHIFTL_I0(vthread_t thr, vvp_code_t cp)
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return true;
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}
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/*
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* This is an unsigned right shift.
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*/
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bool of_SHIFTR_I0(vthread_t thr, vvp_code_t cp)
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{
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unsigned base = cp->bit_idx1;
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unsigned wid = cp->number;
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long shift = thr->index[0];
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if (shift >= wid) {
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for (unsigned idx = 0 ; idx < wid ; idx += 1)
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thr_put_bit(thr, base+idx, 0);
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} else if (shift > 0) {
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for (unsigned idx = 0 ; idx < (wid-shift) ; idx += 1) {
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unsigned src = base + idx + shift;
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unsigned dst = base + idx;
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thr_put_bit(thr, dst, thr_get_bit(thr, src));
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}
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for (unsigned idx = (wid-shift) ; idx < wid ; idx += 1)
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thr_put_bit(thr, base+idx, 0);
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}
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return true;
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}
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bool of_SUB(vthread_t thr, vvp_code_t cp)
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{
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assert(cp->bit_idx1 >= 4);
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@ -1249,6 +1274,9 @@ bool of_ZOMBIE(vthread_t thr, vvp_code_t)
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/*
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* $Log: vthread.cc,v $
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* Revision 1.47 2001/06/30 21:07:26 steve
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* Support non-const right shift (unsigned).
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*
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* Revision 1.46 2001/06/23 18:26:26 steve
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* Add the %shiftl/i0 instruction.
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*
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