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Timescale warnings.

This commit is contained in:
steve 2002-04-15 00:04:22 +00:00
parent 95ccc1e904
commit 0ab42597d9
6 changed files with 91 additions and 12 deletions
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8
compiler.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: compiler.h,v 1.7 2001/11/16 05:07:19 steve Exp $"
#ident "$Id: compiler.h,v 1.8 2002/04/15 00:04:22 steve Exp $"
#endif
# include <list>
@ -68,6 +68,9 @@
/* Implicit definitions of wires. */
extern bool warn_implicit;
/* inherit timescales accross files. */
extern bool warn_timescale;
/* This is true if verbose output is requested. */
extern bool verbose_flag;
@ -77,6 +80,9 @@ extern list<const char*>library_suff;
/*
* $Log: compiler.h,v $
* Revision 1.8 2002/04/15 00:04:22 steve
* Timescale warnings.
*
* Revision 1.7 2001/11/16 05:07:19 steve
* Add support for +libext+ in command files.
*

10
driver/iverilog.man
View File

@ -1,4 +1,4 @@
.TH iverilog 1 "$Date: 2002/04/04 05:26:13 $" Version "$Date: 2002/04/04 05:26:13 $"
.TH iverilog 1 "$Date: 2002/04/15 00:04:23 $" Version "$Date: 2002/04/15 00:04:23 $"
.SH NAME
iverilog - Icarus Verilog compiler
@ -189,6 +189,14 @@ This enables warnings for creation of implicit declarations. For
example, if a scalar wire X is used but not declared in the Verilog
source, this will print a warning at its first use.
.TP 8
.B timescale
This enables warnings for inconsistent use of the timescale
directive. It detects if some modules have no timescale, or if modules
inherit timescale from another file. Both probably mean that
timescales are inconsistent, and simulation timing can be confusing
and dependent on compilation order.
.SH "COMMAND FILES"
The command file allows the user to place source file names and
certain command line switches into a text file instead of on a long

10
driver/main.c
View File

@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id: main.c,v 1.34 2002/04/04 05:26:13 steve Exp $"
#ident "$Id: main.c,v 1.35 2002/04/15 00:04:23 steve Exp $"
# include "config.h"
@ -273,11 +273,14 @@ static void process_warning_switch(const char*name)
strcpy(warning_flags, "-W");
if (strcmp(name,"all") == 0) {
strcat(warning_flags, "i");
strcat(warning_flags, "it");
} else if (strcmp(name,"implicit") == 0) {
if (! strchr(warning_flags+2, 'i'))
strcat(warning_flags, "i");
}else if (strcmp(name,"timescale") == 0) {
if (! strchr(warning_flags+2, 't'))
strcat(warning_flags, "t");
}
}
@ -654,6 +657,9 @@ int main(int argc, char **argv)
/*
* $Log: main.c,v $
* Revision 1.35 2002/04/15 00:04:23 steve
* Timescale warnings.
*
* Revision 1.34 2002/04/04 05:26:13 steve
* Add dependency generation.
*

6
lexor.lex
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: lexor.lex,v 1.70 2002/04/14 21:42:01 steve Exp $"
#ident "$Id: lexor.lex,v 1.71 2002/04/15 00:04:22 steve Exp $"
#endif
# include "config.h"
@ -74,7 +74,7 @@ static const char* set_file_name(char*text)
}
extern void pform_set_timescale(int, int);
extern void pform_set_timescale(int, int, const char*file, unsigned line);
void reset_lexor();
static void line_directive();
@ -1083,7 +1083,7 @@ static void process_timescale(const char*txt)
return;
}
pform_set_timescale(unit, prec);
pform_set_timescale(unit, prec, yylloc.text, yylloc.first_line);
}
int yywrap()

12
main.cc
View File

@ -19,7 +19,7 @@ const char COPYRIGHT[] =
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: main.cc,v 1.52 2002/04/04 05:26:13 steve Exp $"
#ident "$Id: main.cc,v 1.53 2002/04/15 00:04:22 steve Exp $"
#endif
# include "config.h"
@ -85,8 +85,8 @@ FILE *depend_file = NULL;
/*
* These are the warning enable flags.
*/
bool warn_implicit = false;
bool warn_implicit = false;
bool warn_timescale = false;
/*
* Verbose messages enabled.
*/
@ -335,6 +335,9 @@ int main(int argc, char*argv[])
case 'i':
warn_implicit = true;
break;
case 't':
warn_timescale = true;
break;
default:
break;
}
@ -490,6 +493,9 @@ int main(int argc, char*argv[])
/*
* $Log: main.cc,v $
* Revision 1.53 2002/04/15 00:04:22 steve
* Timescale warnings.
*
* Revision 1.52 2002/04/04 05:26:13 steve
* Add dependency generation.
*

57
pform.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: pform.cc,v 1.91 2002/04/12 02:57:08 steve Exp $"
#ident "$Id: pform.cc,v 1.92 2002/04/15 00:04:23 steve Exp $"
#endif
# include "config.h"
@ -45,9 +45,17 @@ string vl_file = "";
extern int VLparse();
static Module*pform_cur_module = 0;
/*
* These variables track the current time scale, as well as where the
* timescale was set. This supports warnings about tangled timescales.
*/
static int pform_time_unit = 0;
static int pform_time_prec = 0;
static char*pform_timescale_file = 0;
static unsigned pform_timescale_line = 0;
/*
* The scope stack and the following functions handle the processing
* of scope. As I enter a scope, the push function is called, and as I
@ -80,11 +88,43 @@ static hname_t hier_name(const char*tail)
return name;
}
void pform_set_timescale(int unit, int prec)
/*
* The lexor calls this function to set the active timescale when it
* detects a `timescale directive. The function saves the directive
* values (for use by modules) and if warnings are enabled checks to
* see if some modules have no timescale.
*/
void pform_set_timescale(int unit, int prec,
const char*file, unsigned lineno)
{
assert(unit >= prec);
pform_time_unit = unit;
pform_time_prec = prec;
if (pform_timescale_file)
free(pform_timescale_file);
pform_timescale_file = strdup(file);
pform_timescale_line = lineno;
if (warn_timescale && (pform_modules.size() > 0)) {
cerr << file << ":" << lineno << ": warning: "
<< "Some modules have no timescale. This may cause"
<< endl;
cerr << file << ":" << lineno << ": : "
<< "confusing timing results. Affected modules are:"
<< endl;
map<string,Module*>::iterator mod;
for (mod = pform_modules.begin()
; mod != pform_modules.end() ; mod++) {
const Module*mp = (*mod).second;
cerr << file << ":" << lineno << ": : "
<< " -- module " << (*mod).first
<< " declared here: " << mp->get_line() << endl;
}
}
}
@ -124,6 +164,16 @@ void pform_startmodule(const char*name, svector<Module::port_t*>*ports,
pform_cur_module->set_lineno(lineno);
delete ports;
if (warn_timescale && pform_timescale_file
&& (strcmp(pform_timescale_file,file) != 0)) {
cerr << pform_cur_module->get_line() << ": warning: "
<< "timescale for " << name
<< " inherited from another file." << endl;
cerr << pform_timescale_file << ":" << pform_timescale_line
<< ": ...: The inherited timescale is here." << endl;
}
}
void pform_endmodule(const char*name)
@ -1179,6 +1229,9 @@ int pform_parse(const char*path, FILE*file)
/*
* $Log: pform.cc,v $
* Revision 1.92 2002/04/15 00:04:23 steve
* Timescale warnings.
*
* Revision 1.91 2002/04/12 02:57:08 steve
* Detect mismatches in reg as module items and ports.
*