Commit Graph

1111 Commits

Author SHA1 Message Date
Matthias Koefferlein 737e12d6a4 Added GSI tests. 2020-09-22 18:36:40 +02:00
Matthias Koefferlein a81cc3cacf Merge branch 'master' of https://github.com/KLayout/klayout into drc-enhancements 2020-09-19 21:10:32 +02:00
Matthias Koefferlein 3043418f8a Made shielding an option for some DRC features. 2020-09-16 23:44:44 +02:00
Matthias Koefferlein e75333ea41 DRC enhancements: max_vertex_count, max_area_ratio and forget 2020-09-15 00:12:55 +02:00
Matthias Koefferlein 161d13ad3a Qt4 compatibility of one test. 2020-09-14 22:06:16 +02:00
Matthias Koefferlein ce9c7e848a Merge branch 'master' into drc-enhancements 2020-09-14 20:52:02 +02:00
Matthias Köfferlein 8f35c9b486
Merge pull request #632 from KLayout/gsi-enhancements
Enumerators for Ruby, "void to self" for Ruby+Python
2020-09-14 18:34:50 +02:00
Matthias Köfferlein 59ee6b6a83
Fixed #629 (timeout event of QTimer not present on Qt5) (#631)
In addition, the "destroyed" and "objectNameChanged" signals
were added (specifically to QObject).

The API binding for Qt5 was updated which adds some events.
2020-09-14 18:34:28 +02:00
Matthias Köfferlein 9cef935fad
Merge pull request #630 from KLayout/ruby-include
Ruby include
2020-09-14 18:33:57 +02:00
Matthias Köfferlein 8cdb6187b8
Fixed issue #617 (constness problem in netlist) (#622) 2020-09-14 18:33:24 +02:00
Matthias Koefferlein e8c9ae4012 Added missing file. 2020-09-13 23:29:15 +02:00
Matthias Koefferlein a20f0d5891 Also provide 'void to self' return values for Python. 2020-08-31 23:55:26 +02:00
Matthias Koefferlein 5608327899 Another cool one: void as C++ return value is translated to returning self for Ruby. 2020-08-31 23:44:02 +02:00
Matthias Koefferlein 4c127b4644 Ruby iterators now automatically return an Enumerator if no block is given - allows very cool code .. 2020-08-31 23:09:37 +02:00
Matthias Koefferlein a01eb70891 Added tests for include feature, some bug fixes and enhancements. 2020-08-31 20:27:57 +02:00
Matthias Koefferlein 740cef9619 WIP: removed a temp file. 2020-08-31 20:27:57 +02:00
Matthias Koefferlein 9c2914f016 WIP: allow breakpoints for files with includes and inside includes 2020-08-31 20:27:57 +02:00
Matthias Koefferlein 77a9253273 WIP: Provide a generic include file expansion mechanism, basic class. 2020-08-31 20:27:57 +02:00
Matthias Koefferlein 2953ad3329 Merge branch 'master' into drc-enhancements 2020-08-30 23:35:37 +02:00
Matthias Koefferlein be26c679d8 Merge branch 'master' into lefdef-enhancments 2020-08-30 22:55:45 +02:00
Matthias Koefferlein a5d675304c Fixed an issue with deferred method execution in unit test context. 2020-08-30 13:06:50 +02:00
Matthias Koefferlein eccbb9884c Fixed an internal error happening when a librrary isn't registered and destroyed by the GC 2020-08-30 11:35:30 +02:00
Matthias Koefferlein d762074bc0 Some refactoring, Cell#dup for convenience 2020-08-29 23:43:05 +02:00
Matthias Koefferlein 2a3fe08e7b Provide multi-cell copy/move of shapes (GSI binding) 2020-08-29 22:49:38 +02:00
Matthias Koefferlein a425d522cc Added multi-cell mapping for transferring multiple cells from one layout to another while including their hierarchy without duplicating cells. 2020-08-29 10:07:17 +02:00
Matthias Koefferlein be15e2dbf6 Updated priority of map file purposes according to Stefan's suggestions. 2020-08-23 19:44:38 +02:00
Matthias Koefferlein 56dead9662 LEF/DEF component maskshift: some implementation tuning and test updates. 2020-08-23 19:20:53 +02:00
Matthias Koefferlein af2bfce051 Tests and bug fixes for component maskshift implementation 2020-08-23 18:58:52 +02:00
Matthias Koefferlein af7d8bba89 WIP: provide a LEF reader mode where all macros are read. For DEF only those macros which are used are read. 2020-08-23 01:29:10 +02:00
Matthias Koefferlein 35249ef0b5 Reading LEF/DEF map files such that MASK is applied to previous entries too. 2020-08-19 23:47:25 +02:00
Matthias Koefferlein d7fab925a0 Added an option for not reading all LEF files along with DEF files, but only selected ones. 2020-08-19 23:06:46 +02:00
Matthias Koefferlein 4e51664639 Added map file for LEF/DEF test. 2020-08-02 13:10:47 +02:00
Matthias Koefferlein 23ec53e1b2 Abbreviated LEF/DEF layer names for map files. 2020-08-02 12:01:28 +02:00
Matthias Koefferlein 84573a21ce Skip END LIBRARY, so LEF files can be cat together 2020-08-02 11:31:37 +02:00
Matthias Koefferlein 404799bdfd Bugfixed map file reader for mask case, added test 2020-08-02 00:56:55 +02:00
Matthias Koefferlein 440b2b122b Fixed test cases - main reason is the different assignment of layer numbers, mainly for the auxiliary layers such as OUTLINE 2020-08-02 00:09:20 +02:00
Matthias Koefferlein f7d5385fcc Added map file to one test for later use 2020-07-31 00:14:00 +02:00
Matthias Koefferlein 5e1eb08ea9 Added test data file 2020-07-29 22:42:48 +02:00
Matthias Koefferlein d069dde98e WIP: first test case for mask support - needs testing. 2020-07-27 23:13:15 +02:00
Matthias Koefferlein 974ce6c960 unused vias are not generated anymore - golden layouts updated. 2020-07-25 23:23:57 +02:00
Matthias Koefferlein 97468ffa0e unused vias are not generated anymore - golden layouts updated. 2020-07-25 23:06:14 +02:00
Matthias Koefferlein 89745fd0de Merge branch 'master' into lefdef-enhancments 2020-07-18 09:21:16 +02:00
Matthias Koefferlein 1d74cf19dc Added missing file 2020-07-18 00:02:45 +02:00
Matthias Koefferlein 6aff74c844 Merge branch 'master' into issue-588 2020-07-08 23:29:27 +02:00
Matthias Köfferlein 25e3a1a4a7
Merge pull request #608 from KLayout/more-checked-netlist-operations
Checked add/remove methods for Netlist objects - to avoid script mist…
2020-07-07 12:52:15 -07:00
Matthias Köfferlein c1e627b176
Merge pull request #606 from KLayout/debug-basic_rba-crash
Fix candidate for MacOS rba:basic crash
2020-07-07 12:52:00 -07:00
Matthias Koefferlein 848fd3e1bb Added testcase 2020-07-07 21:21:33 +02:00
Matthias Koefferlein 8adeaaf938 Checked add/remove methods for Netlist objects - to avoid script mistakes. 2020-07-05 19:02:43 +02:00
Matthias Koefferlein beec19951d Candidate for fix. 2020-07-05 14:09:23 +02:00
Matthias Köfferlein dcd0476efc
Implemented issue #598 (Cell#transform) (#600) 2020-07-03 23:41:09 +02:00
Matthias Köfferlein b413cb9d74
Netlist compare: Ambiguity resolution through name matching now default (can be turned off) (#594)
* WIP: some refactoring

* WIP: some refactoring

* Netlist compare: introducing ambiguity resolution by net names

By default now net names are used for resolving ambiguities.
If net names match, they will be used to associate nets if the
choice is ambiguous. This is usually much faster and more reliable
than trying to resolve ambiguities through topology analysis.

This feature can be disabled using "consider_net_names(false)" in
the LVS script.

* Some refactoring, Jenkinsfile modified for better test coverage
2020-06-29 20:47:57 +02:00
Matthias Köfferlein e744eb32d1
Merge pull request #580 from KLayout/drawing-performance2
Drawing performance2
2020-06-28 16:14:48 +02:00
Matthias Koefferlein cc31b19188 Another golden testdata update for Windows. 2020-06-27 20:41:57 +02:00
Matthias Koefferlein 43ceeecf6e Golden test data for Ubuntu 20 and Windows, pipe output stream for Windows. 2020-06-27 09:50:55 +02:00
Matthias Koefferlein 868adbceab Updated golden test data 2020-06-26 23:52:18 +02:00
Matthias Koefferlein 7a26768d8a Updated testdata 2020-06-26 17:46:41 +02:00
Matthias Koefferlein 03dacbd2f5 Updated testdata 2020-06-26 17:46:39 +02:00
Matthias Koefferlein b91e2324d0 Netlist compare enhancement
This enhancement targets towards a better resolution
of ambiguities. The enhancement is to utilize knowledge
about device and subcircuit equivalences to avoid stale
branches of the ambiguity resolution tree.

So far following these branches could lead to a
contradictions which render an ambiguitiy resolution
choice useless.

One effect of this change is enhanced reproducibility
of the matching log because some pointers are not
involved anymore.
2020-06-26 17:01:03 +02:00
Matthias Koefferlein 880b9904cf WIP Netlist probing will deliver an instantiation path now. 2020-06-14 22:04:16 +02:00
Matthias Koefferlein 823807641b Added anonot method to DRC, provide tests. 2020-06-14 18:49:21 +02:00
Matthias Koefferlein 476c37e218 Added RBA test for Region's andnot 2020-06-14 18:14:21 +02:00
Matthias Koefferlein d141c0895d Added tests for Region's andnot. 2020-06-14 18:12:17 +02:00
Matthias Koefferlein 41fe04bbc8 WIP: twobool local processor 2020-06-14 17:00:54 +02:00
Matthias Koefferlein 041abe3e89 Added a testcase for two-boolean edge processor. 2020-06-14 16:50:34 +02:00
Matthias Koefferlein 4390a80dda Added test cases for multiple-outputs local processors. 2020-06-13 23:57:40 +02:00
Matthias Koefferlein 5992a9b509 Merge branch 'master' into lefdef-enhancments 2020-06-05 14:05:13 +02:00
Matthias Köfferlein 852f5c438b
Implemented #560 (multiple technologies on libraries) (#576)
* First implementation.

* PORT BACK: fixed a few flaws (fixed-width side panel ..)

1. On "save as" the filename displayed in the cell view selection box
   was not updated
2. The width of the library and cellview panel could not be reduced
   below the width of the combo boxes in the headers. So the
   panels might have become pretty wide without being able to reduce
   them.

* Implemented #560 (multiple techs on libraries)
2020-06-05 10:58:53 +02:00
Matthias Köfferlein 8db1e3577f
Fixed issue #578 (CIF writer issue with arbitrary angle) (#581)
* Fixed isse #578 (CIF writer issue with arbitrary angle)

* Added missing files.
2020-06-05 10:57:14 +02:00
Matthias Köfferlein 2d0a9418f9
Implemented #579 (perimeter_only mode for antenna check) (#582)
* WIP: added basic feature and tests.

* WIP: provide tests are GSI binding of new antenna check

* Fixed issue #579 (perimeter_only mode for antenna check)

* Updated DRC doc for 'perimeter_only'
2020-06-05 10:55:07 +02:00
Matthias Koefferlein 233574598b Support for LEF via definition properties (syntax wise, not semantics wise) 2020-06-04 17:55:06 +02:00
Matthias Koefferlein adfd653213 WIP: refactoring - include fuzzy compare in array, don't put into GSI method impl. 2020-06-04 13:01:11 +02:00
Matthias Koefferlein 4aa1364e4b Fixed DEF reader, updated golden test data. 2020-06-01 15:04:25 +02:00
Matthias Koefferlein d7af7fc5c0 Merge branch 'lefdef-enhancments' 2020-06-01 13:37:45 +02:00
Matthias Koefferlein 2dee855d1d Added test for deep Text extents 2020-05-31 02:29:54 +02:00
Matthias Koefferlein cd485efc14 Fixed unit tests, reverted one unintended change 2020-05-31 02:26:25 +02:00
Matthias Koefferlein 66fe18474b Fixed unit test. 2020-05-31 02:20:02 +02:00
Matthias Koefferlein 156e325e71 Updated unit test golden data 2020-05-31 02:12:00 +02:00
Matthias Koefferlein 759f07ee4d Implemented solution for #570 (deep Edges::extents)
While doing this, it was discovered that the problem also
persists for EdgePairs and Texts.

In order to provide a more generic solution, some refactoring
was applied.
2020-05-31 01:55:05 +02:00
Matthias Köfferlein 6601d472bf
Implemented #570 (perimeter included in antenna check) (#572)
* First implementation of the perimeter factor for antenna check, unit tests.

* Bugfix and unit tests for GSI binding of new antenna check version.

* DRC integration of perimeter-enabled antenna check.

* Enhanced DRC doc for antenna rule
2020-05-30 21:45:48 +02:00
Matthias Köfferlein 3246e0d36f
Fixed #565 (SPICE global nets must not produce pins if not present) (#567)
* Fixed #565 (SPICE global nets must not produce pins if not present)

* Fixed unit tests.
2020-05-26 23:47:59 +02:00
Matthias Köfferlein ba46ffb276
Merge pull request #563 from KLayout/issue-487
Fix #487 (True text object support for DRC/LVS)
2020-05-26 22:44:53 +02:00
Matthias Köfferlein a046457cc5
Fixed bug #568 (CIF writer issue with small rotation angles) (#569)
* Fixed bug #568 (CIF writer issue with small rotation angles)

* Fixed the reader bug too which created the rounding issue.
2020-05-25 22:10:06 +02:00
Matthias Koefferlein d305ee0cae Consistent Ruby test environment - removed duplicate headers. 2020-05-24 00:59:43 +02:00
Matthias Koefferlein 0f42ebe385 Updated DRC doc, added more tests. 2020-05-23 22:54:50 +02:00
Matthias Koefferlein ee53869cbd Connect_implicit test with labels. 2020-05-23 21:21:30 +02:00
Matthias Koefferlein f410c91339 Updated documentation 2020-05-23 21:14:01 +02:00
Matthias Koefferlein ba9a05640c Bugfixed tiled mode with text input, DRC tests added and test data updated. 2020-05-23 19:03:42 +02:00
Matthias Koefferlein 81750ed3d8 Tiling processor enabling for text input/output, updated tests. 2020-05-23 16:23:40 +02:00
Matthias Koefferlein 5135d76367 Updated test data. 2020-05-23 13:31:26 +02:00
Matthias Koefferlein 6f7cca81fb Updated test data 2020-05-23 13:19:52 +02:00
Matthias Koefferlein b84a9df2da Persisting texts now for .l2n format 2020-05-22 00:58:46 +02:00
Matthias Koefferlein c682cc85d0 Generalized concept of region, texts etc. into 'shape collections'. Fixed LVS and DRC tests. 2020-05-21 23:59:30 +02:00
Matthias Koefferlein 5795ec8b07 Fixed DRC texts methods, added tests. 2020-05-20 23:56:35 +02:00
Matthias Koefferlein 854320d52d Debugging: proper assignment of net names through labels. 2020-05-20 23:27:06 +02:00
Matthias Koefferlein e9af72ee28 Tests for texts as net names, fixed Shapes test (order of texts) 2020-05-20 01:05:19 +02:00
Matthias Koefferlein 33a909a327 Added RBA tests for region to text interactions. 2020-05-15 23:57:31 +02:00
Matthias Koefferlein 7dab87b881 Added tests, Region#pull_interacting with texts 2020-05-15 23:48:21 +02:00
Matthias Koefferlein 58ca9b8730 Some bug fixes, added tests 2020-05-13 21:56:49 +02:00
Matthias Koefferlein 16d6c75b0e Fixed build, added tests for filter in deep texts object. 2020-05-13 17:58:00 +02:00
Matthias Koefferlein 4e7d0a81b8 'interact' between regions and texts. 2020-05-13 17:29:10 +02:00
Matthias Koefferlein 08026e8b35 Bugfix: in-place filter not working for region, edges. Implemented hierarchical filter for texts. Added Ruby tests for Texts. 2020-05-12 23:01:54 +02:00
Matthias Koefferlein c1b1ce6951 Provide unit test for DeepTexts. 2020-05-12 21:43:11 +02:00
Matthias Köfferlein 3f8090b3fd
Fixed #547 (better error messages on some Shape methods, fixed doc). (#550) 2020-05-11 19:24:44 +02:00
Matthias Köfferlein 9f4ccaaedc
Issue #535 (Image handling enhancements) (#551)
* Menu item to hide or show all images

* Images: asymmetric color nodes.

* Added RBA::image::from_s for reading image back from string. Added tests.

* Added image file reader test (RBA)

* Added lyimg format for image file persistence.

* Small fix of unit tests.

* Added GSI binding for new image features and tests.

* Save and load for .lyimg formats in image properties dialog.
2020-05-02 13:45:20 +02:00
Matthias Koefferlein b5faa7f6be Fixed RBA tests. 2020-05-02 09:32:00 +02:00
Matthias Koefferlein fd63d1017f Added tests for LEF/DEF mapfile, fixed a few bugs. 2020-05-02 09:30:17 +02:00
Matthias Koefferlein 0e68b910fa Merge branch 'master' into lefdef-enhancments 2020-05-01 16:00:58 +02:00
Matthias Koefferlein 751340c963 LEF/DEF: Fixed placement of FOREIGN cell 2020-05-01 15:16:08 +02:00
Matthias Köfferlein 8dae4161e1
Fixed #548 (shield issue on space) (#549) 2020-04-30 22:03:16 +02:00
Matthias Köfferlein 9b0362d03d
Fixed #544 (ignore duplicate global nets in SPICE reader) (#545) 2020-04-26 16:54:13 +02:00
Matthias Koefferlein 9f17a819b2 Added missing test files 2020-04-25 22:13:46 +02:00
Matthias Koefferlein 061e5d7286 Added LEF reading timer (LEF next to DEF) 2020-04-25 22:05:01 +02:00
Matthias Koefferlein c602871e0e Implemented Stefan's solution #3 for FOREIGN != MACRO in LEF 2020-04-25 21:08:11 +02:00
Matthias Koefferlein f6140055d6 Modified reader scheme for FOREIGNCELL 2020-04-24 23:21:27 +02:00
Matthias Koefferlein 040af426dc WIP: refactoring of map file reading. 2020-04-19 16:54:41 +02:00
Matthias Koefferlein e51f15b116 New layer flavors: special nets, LEF pins. 2020-04-19 14:38:14 +02:00
Matthias Koefferlein 9825245e0c Implemented LEF MACRO FOREIGN 2020-04-19 12:16:55 +02:00
Matthias Koefferlein 9a7f0a9c2a Fixed a LEF/DEF reader bug (was '+ RECT' or '+ POLYGON' in SPECIALNETS) 2020-04-18 18:48:25 +02:00
Matthias Koefferlein 70d8334f8c Merge branch 'lefdef-enhancments' of https://github.com/KLayout/klayout into lefdef-enhancments 2020-04-18 18:00:54 +02:00
Matthias Koefferlein 54cf57c772 LEF/DEF enhancements (via cellname suffix configurable, group separation disabled by default)
Two new reader options:
1.) via cell name prefix (default is "VIA_"). This name is put in front of the via name to form the cell cell name
2.) group separation disabled by default. Groups are not put into individual parent cells by default.
2020-04-18 17:58:50 +02:00
Matthias Koefferlein d4a333966b Updated testdata for last patch. 2020-04-14 23:16:43 +02:00
Matthias Koefferlein 921af52643 DEF reader bugfix: wasn't reading SPECIALNETS + ROUTED + RECT 2020-04-14 23:15:08 +02:00
Matthias Koefferlein 3ada29d606 Some bugfixes for LEF/DEF reader for special nets (extension handling) 2020-04-05 23:49:19 +02:00
Matthias Koefferlein f11a3a0dd5 Bugfix: MINWIDTH ... WRONGDIRECTION wasn't considering DIRECTION VERTICAL
Added/updated some tests, some refactoring.
2020-04-05 21:49:36 +02:00
Matthias Koefferlein 4a24b727d5 Tried to implement MINWIDTH .. WRONGDIRECTION in LEF58_MINWIDTH property 2020-04-05 21:49:36 +02:00
Matthias Koefferlein bcaf28c94c Bugfix LEF/DEF reader: via needs to change the layer also if it's inside a DEF. Added more test cases. 2020-04-05 21:49:36 +02:00
Matthias Koefferlein 2c60338ae8 Added DO .. BY .. STEP to vias in SPECIALNETS in DEF reader, added one more private testcase 2020-04-05 21:49:36 +02:00
Matthias Köfferlein 2b3a53b285
Implemented #521 (enhanced API for ObjectInstPath) (#532) 2020-04-05 15:11:03 +02:00
Matthias Koefferlein c640347570 MERGE: added Spice reader testcase for resistors with model names. 2020-04-01 23:19:21 +02:00
Matthias Koefferlein e5735aff3a Forgot to add a test file 2020-03-29 09:07:00 +02:00
Matthias Koefferlein 99d3610a6a Implemented #527 (wildcard layer mapping targets)
commit d77702cd86066f3a97d740a95923fa598c2ff07b
Author: Matthias Koefferlein <matthias@koefferlein.de>
Date:   Sat Mar 28 21:28:39 2020 +0100

    Wildcard expansion feature on layer mapping

    Finished feature, added doc and test.

    The solution is to use placeholder indexes for the
    layer mapping which are substituted by the real
    layers when they are encountered.

commit af60b5f18acfe3c5e2f1d4e6bc6ee752a246dc0d
Author: Matthias Koefferlein <matthias@koefferlein.de>
Date:   Sat Mar 28 19:11:32 2020 +0100

    Preparations for new feature: introduce relative and wildcard target layer specs
2020-03-28 22:49:57 +01:00
Matthias Koefferlein 2933e0b2e1 Unit tests fixed after #526 update. 2020-03-28 22:31:19 +01:00
Matthias Koefferlein c10ccccdf7 Merge branch 'app-refactoring' into doc-args 2020-03-15 21:32:39 +01:00
Matthias Koefferlein c6b48acc76 Some small enhancements
LVS: max_branch_complexity was wrong and missing from doc.

Updated test cases so MSVC 2017 builds should pass.

Windows build.bat updated so debug builds can be made.
2020-03-04 21:48:00 +01:00
Matthias Koefferlein cec1910bf0 Added tests. 2020-03-02 00:13:44 +01:00
Matthias Koefferlein 621cb9edcd Another testdata fix for CentOS 6 2020-02-28 07:12:24 +01:00
Matthias Koefferlein 076206074f Updated tests for CentOS 6 2020-02-27 23:46:02 +01:00
Matthias Koefferlein 02e38a2cd1 Merge branch 'issue-482' into issue-471 2020-02-27 15:49:35 +01:00
Matthias Koefferlein 8b73dffcfe Implementation done. Added tests. 2020-02-27 15:40:06 +01:00
Matthias Koefferlein 76f5e19ed8 Enhanced LVS with 'join_symmetric_nets'. Updated doc. Added test. 2020-02-27 13:35:36 +01:00
Matthias Koefferlein 3b31109367 Added GSI binding for join_symmetric_nets, added method to get circuits by name pattern. 2020-02-27 12:17:35 +01:00
Matthias Koefferlein b35429291e WIP: join_nets implemented, join_symmetric_nets: enhanced detection of symmetric nets. 2020-02-27 00:52:03 +01:00
Matthias Koefferlein d01759aa60 Implemented #500 (limit number of shapes in net tracer) 2020-02-23 11:02:15 +01:00
Matthias Köfferlein 1992fc762a
Issue #489 (Pin names as shape properties) (#507)
* Fixed #489 (LEF/DEF reader provides pin names as properties)

* Removed vi swap file

* #489 fixed (LEF pins also get properties, added tests)
2020-02-23 00:29:12 +01:00
Matthias Koefferlein d202989c12 Fixed Qt5 binding issue. 2020-02-22 00:56:18 +01:00
Matthias Köfferlein 946af71f2f
Fixed issue #473 (fast accessors to image pixel and mask data through… (#503)
* Fixed issue #473 (fast accessors to image pixel and mask data through arrays)

* Updated Jenkinsfile to not publish a PR build

* Updated Jenkinsfile to not publish a PR build
2020-02-21 18:38:08 +01:00
Matthias Köfferlein 69e7704430
Issue 501 (#505)
* Fixed #501 (more Qt ownership management) - this commit contains some more changes because I had to regenerate the Qt binding sources.

* Fixed #501 (Qt object ownership transfer) - repairs, added tests

* Updated Jenkinsfile to not publish a PR build

* Update Jenkinsfile - exclude PR's from build
2020-02-21 18:25:22 +01:00
Matthias Koefferlein 7913e7cf82 Added unit tests. 2020-02-19 01:06:39 +01:00
Matthias Koefferlein eeadfcea7b Fixed #476 2020-01-23 17:56:20 +01:00
Matthias Köfferlein 80b0eae937
Merge pull request #469 from KLayout/issue-464
Fixed #464 (problems building a layer node tree with 'add_child')
2020-01-05 01:03:29 +01:00
Matthias Köfferlein db1d05282d
Merge pull request #467 from KLayout/issue-466
Issue 466
2020-01-05 01:03:10 +01:00
Matthias Köfferlein 6a996b6f5b
Merge pull request #465 from KLayout/issue-462
Implemented #462 (Generalize MOS transistor extraction to other gate …
2020-01-05 01:02:54 +01:00
Matthias Koefferlein b8c82c4f8b Updated copyright notice to 2020 2020-01-05 00:59:43 +01:00
Matthias Koefferlein 811560094a Updated tests. 2020-01-04 21:19:06 +01:00
Matthias Koefferlein 0285a5195c Fixed #464 (problems building a layer node tree with 'add_child')
The reason was a synchronization issue.

Actually "LayerPropertiesNodeRef" is not a reference, but
a mirror copy of the LayerPropertiesNode the reference points
to. Changes to the original must be synchronized into the
reference and back.

This concept is a tribute to the original implementation and
the node reference was a convenience add-on to the iterator-
based API.

Better solution in general is to replace the LayerPropertiesNodeRef
concept with a real reference.
2020-01-04 19:39:09 +01:00
Matthias Koefferlein aa268d3768 Updated unit test. 2020-01-04 12:38:06 +01:00
Matthias Koefferlein 09f97aa286 Fixed #466 (Segfault when accessing a wrong layer tab) 2020-01-04 12:33:14 +01:00
Matthias Koefferlein 833edf53b2 Implemented #462 (Generalize MOS transistor extraction to other gate figures) 2020-01-02 22:20:45 +01:00
Matthias Koefferlein 6a47437702 Updated test data. 2019-12-18 17:28:46 +01:00
Matthias Koefferlein d0e6efa484 Implemented #444 (double-height standard-cell support). 2019-12-17 00:12:36 +01:00
Matthias Koefferlein 3441070908 Merge branch 'issue-448' into dvb 2019-12-15 23:57:42 +01:00
Matthias Koefferlein 3e32ca1ada Updated test data for Windows. 2019-12-15 23:54:17 +01:00
Matthias Koefferlein 12c040aa6c Merge branch 'issue-448' into dvb 2019-12-15 20:51:35 +01:00
Matthias Koefferlein e0be042e67 Test data update for CentOS 6 2019-12-15 20:48:56 +01:00
Matthias Koefferlein b802220ae9 Updated test data 2019-12-15 10:48:11 +01:00
Matthias Koefferlein fccd78a222 Fixed #448 and updated test data 2019-12-15 10:37:51 +01:00
Matthias Koefferlein 06a68b77d2 Updated test data for windows. 2019-12-15 10:17:10 +01:00
Matthias Koefferlein a05345945d Updated test data 2019-12-15 09:46:40 +01:00
Matthias Koefferlein d0fc1edf35 Further updates of test data. 2019-12-15 01:45:15 +01:00
Matthias Koefferlein 782f6fe601 BUGFIX: the L2N and LVSDB writer was writing too much
Sometimes, shapes from child cells were propagated into
parent cells in the L2N and LVSDB output.

Because of this fix, many testdata files have to be updated.
2019-12-15 01:29:56 +01:00
Matthias Koefferlein 07daed2878 WIP: further updates of test data. 2019-12-15 00:24:17 +01:00
Matthias Koefferlein 96e591cba9 WIP: further updates of test data. 2019-12-15 00:23:05 +01:00
Matthias Koefferlein da1ac3661f WIP: bugfix of refactoriung, update test data. 2019-12-15 00:16:47 +01:00
Matthias Koefferlein 07a85e3ec3 Added test data. 2019-12-09 21:40:24 +01:00
Matthias Koefferlein bbb8e1f430 Merge branch 'master' of https://github.com/KLayout/klayout 2019-12-08 20:25:54 +01:00
Matthias Koefferlein 8916dd12a9 Small bugfix for MAG writer + tests. 2019-12-08 20:25:25 +01:00
Matthias Köfferlein ed407f1e93
Merge pull request #443 from KLayout/issue-438
Fixed #438 (error on redefinition of subcircuit in SPICE)
2019-12-08 09:14:05 +01:00
Matthias Koefferlein 3b9beb0d49 Fixed #438 (error on redefinition of subcircuit in SPICE) 2019-12-07 23:39:39 +01:00
Matthias Koefferlein c214021618 Fixed #440 (issue with LayoutView#each_annotation_selected) 2019-12-07 21:51:10 +01:00
Matthias Köfferlein 2fa545d80b
Merge pull request #435 from KLayout/issue-429
Issue 429
2019-12-02 21:15:05 +01:00
Matthias Köfferlein e061a0a932
Merge pull request #433 from KLayout/wip
Some enhancements
2019-12-02 21:14:35 +01:00
Matthias Koefferlein baffb940d1 Implemented #429: final touches to doc and tests for RBA/pya API. 2019-12-01 16:41:27 +01:00
Matthias Koefferlein c49bc17e6a CIF writer: only layer names should be forced to upper case. Cell names don't need this. 2019-11-30 22:53:29 +01:00
Matthias Koefferlein f8743e7411 Added PearlRiver die Magic files as test case. 2019-11-30 21:16:31 +01:00
Matthias Koefferlein 63e912de15 Modified buddies test to pass for strm2mag 2019-11-30 20:59:47 +01:00
Matthias Koefferlein 6003727561 Added strm2mag tool and support for Magic options 2019-11-30 20:54:15 +01:00
Matthias Koefferlein c6ede46fd0 WIP: substantial changes
- force lower-case layer names to allow CIF/MAG loop (CIF needs
  upper-case layer names, MAG doesn't)
- reverted CIF reader to standard
- new options for writer: tech, "zero timestamp".
- file name MUST be consistent with one cell name.
  Reason: it's not possible to derive the initial
  cell from the given options, so without the file name
  being consistent, we can't know what to write there.
  Basically the file name rather supplies the path.
2019-11-30 00:09:44 +01:00
Matthias Koefferlein 0796b20c2d Added a first test for Magic reader/writer 2019-11-29 01:14:41 +01:00
Matthias Koefferlein 64bb01d80d Dropped attempt to remove dummy nodes from spice reader netlist as this wasn't effective anyway. 2019-11-24 00:23:19 +01:00
Matthias Koefferlein 1a92bae3a8 Another update of golden data. 2019-11-23 23:38:38 +01:00
Matthias Koefferlein ed00503d41 Fixed Spice reader: must not use Netlist::purge_nets to remove dummy nets. Updated golden test data. 2019-11-23 23:36:52 +01:00
Matthias Koefferlein ccb1871fb3 Updates for 'cheats' testcase which was entirely broken. 2019-11-23 19:24:59 +01:00
Matthias Koefferlein 1309aa59cb Merge branch 'master' into issue-425 2019-11-23 01:55:28 +01:00
Matthias Koefferlein dd7309ee9d Added missing test file. 2019-11-23 01:23:41 +01:00
Matthias Koefferlein 18b80489ed Added test data. 2019-11-23 01:20:59 +01:00
Matthias Koefferlein d5506a176a WIP: first implementation - needs testing. 2019-11-23 01:20:22 +01:00
Matthias Koefferlein 2757b22da6 Resolved conflicts for issue-419 merge 2019-11-22 23:34:03 +01:00
Matthias Köfferlein ac7e17ffcb
Merge pull request #422 from KLayout/issue-406
Issue 406
2019-11-22 23:12:16 +01:00
Matthias Köfferlein c8cf8122b6
Merge pull request #414 from KLayout/issue-411
Issue 411
2019-11-22 23:11:24 +01:00
Matthias Koefferlein 6648b53822 Fixed issue #419 (multiple top circuits after flatten of netlist)
The problem is solved by always producing subcircuits for cell
instances, even if there are no connections.

The netlist comparer had to be adjusted too because subcircuits
without pins were used for representing "unknown" subcircuit pairing.

In addition, this patch should lead to a better matching of
parallel subcircuit configurations where two different subcircuits
are entirely parallel.
2019-11-20 21:56:12 +01:00
Matthias Koefferlein 772b309d05 Fixed #406: finally added tests for DRC feature. 2019-11-19 21:34:11 +01:00
Matthias Koefferlein 6c7ceb74dc Enhanced intersections algorithm so that the generated points won't overlay with finite edges from the AND part 2019-11-19 21:19:36 +01:00
Matthias Koefferlein 990961e5f4 Fixed #411 (multiple device extractors for same class) 2019-11-17 23:12:50 +01:00
Matthias Koefferlein 6d8f56194b Edge enhancements
New binding: Edge#d (distance vector), Edge#clipped and Edge#clipped_line.
"intersection_point" returns nil in case of no intersection.
Documentation error fixed (Edge#distance).
2019-11-17 21:30:08 +01:00
Matthias Koefferlein 8dddc4000f Also write the net properties to GDS or OASIS
"build_nets" will now write the net's properties
to the generated net shapes.
This might enable interesting applications.
2019-11-13 23:09:09 +01:00
Matthias Koefferlein bb3aed5773 Merge branch 'master' of https://github.com/KLayout/klayout into netlist_properties 2019-11-13 00:59:29 +01:00
Matthias Koefferlein d060147713 Enhancements for the netlist object properties
- more memory efficient (single pointer only)
- iterator for properties
- NetlistObject#property_keys in GSI
2019-11-12 23:00:49 +01:00
Matthias Koefferlein 848df6f6cc New unit test data for MinGW32 2019-11-12 20:39:19 +01:00
Matthias Koefferlein ab4f632527 Another unit test golden data set for MinGW32 2019-11-12 20:17:27 +01:00
Matthias Koefferlein 7309688944 More robustness of snap algorithm for unit tests 2019-11-12 20:13:35 +01:00
Matthias Koefferlein 86e041cd51 Updated test data. 2019-11-11 23:03:40 +01:00
Matthias Koefferlein 0ce06125ca Introducing netlist object properties. 2019-11-11 07:02:02 +01:00
Matthias Koefferlein 4a212e8db6 Added tests for Region#scale_and_snap and Region#snap 2019-11-07 23:33:54 +01:00
Matthias Koefferlein 988b1e563f Added unit test for DeepRegion::snap 2019-11-07 23:11:34 +01:00
Matthias Koefferlein 318efbf7b0 Fixed 'scale_and_snap' feature 2019-11-07 22:54:16 +01:00
Matthias Koefferlein 4924d0269c Fixed #400, added tests. 2019-11-06 23:28:16 +01:00
Matthias Koefferlein c8aa926fb0 Another update of testdata for MSVC 2019-11-03 09:07:00 +01:00
Matthias Koefferlein 3dffe91f88 Attempt to fix testdata for MSVC 2019-11-03 02:30:52 +01:00
Matthias Koefferlein 388e555fbc Another attempt to fix unit tests on Windows (CRLF/LF issue) 2019-11-03 00:09:26 +01:00
Matthias Koefferlein 5d2528a450 Fixed unit tests for Windows 2019-11-02 20:46:32 +01:00
Matthias Koefferlein 7910ddc6a3 Fixed a compiler warning, testcase update (part 1) 2019-11-02 20:39:59 +01:00
Matthias Koefferlein e25d4784ea Updated tests. 2019-10-26 01:48:50 +02:00
Matthias Koefferlein 36ee1efe16 WIP: speedup LVS 'align' by flattening top-down 2019-10-21 22:14:36 +02:00
Matthias Koefferlein bf18000877 Added tests (breakout cells, LVS cheats) 2019-10-18 00:25:51 +02:00
Matthias Koefferlein 2325e1bce4 Merge branch 'dvb' into pull_feature 2019-10-04 22:58:52 +02:00
Matthias Koefferlein c6e5a785ea Updated test data. 2019-10-03 14:21:29 +02:00
Matthias Koefferlein e1d77a1476 pull_interacting for edges/edges and edges/regions, some enhancements and bug fixes
Bug fixes:
- use dist 1 to cover touching case properly in local processor
- handling of raw mode and is_merged state

Additional tests
2019-10-03 13:08:37 +02:00
Matthias Koefferlein ca747771ac Allow preempt LVS configuration
same_nets, equivalent_pins, same_circuits and same_device_classes
can now be given at the beginning of the LVS script. This will
simplify building universal scripts with the run specific part at
the beginning (one "load" section).

The price are somewhat less specific error messages when something
fails in these methods.
2019-10-01 00:21:27 +02:00
Matthias Koefferlein a3cecb2ebe WIP: enable multiple layout versions of one schematic circuit using 'same_circuit' 2019-09-30 23:08:15 +02:00
Matthias Koefferlein bdf5e3c124 WIP: fake pin debug issue with LVS
Fake pins: pins that happen because something connects to a cell at an
unexpected position. Such a pin is difficult to find. The solution is
to keep those nets and nur purge them so these nets can be identified
in the layout.

Here: is_floating? will be true only if there are no pins. Hence
nets with pins are not removed. is_passive is introduced for nets -
passive nets are such that don't have elements, but a pin.
Circuits are purged if they only have passive nets.
2019-09-30 21:58:13 +02:00
Matthias Koefferlein 6c52daa3a3 Follow-up on #353 (sessions paths relative to session file)
Consistent behavior for file paths for images too.
Plus: image paths are not kept as absolute paths
inside the session.
This makes regeneration of images stable.
2019-09-18 22:05:37 +02:00
Matthias Koefferlein a50fadffcd Fixed #358 (strm2oas was producing GDS) 2019-09-17 23:10:41 +02:00
Matthias Köfferlein 6a305cfbbf
Merge pull request #356 from KLayout/issue-353
Fixed #353 (paths relative to .lys file for rdb-file)
2019-09-16 23:36:17 +02:00
Matthias Köfferlein f5ce24066e
Merge pull request #357 from KLayout/issue-352
Fixed #352 (LVS should ignore equivalent_pins line for non-existing c…
2019-09-16 23:36:02 +02:00
Matthias Koefferlein 55475e905f Fixed #352 (LVS should ignore equivalent_pins line for non-existing circuits)
Same is true now for same_nets and same_circuits.
2019-09-15 00:18:29 +02:00
Matthias Koefferlein b747bbabd9 Fixed #353 (paths relative to .lys file for rdb-file)
This fix also includes: L2N and LVS DB files are now also
included in the sessions.
2019-09-14 22:38:23 +02:00
Matthias Koefferlein 08aacbd2e8 Provide tests to text buddy executables without framework 2019-09-13 23:46:12 +02:00
Matthias Koefferlein 26f8fc5c83 Bug fixed strmxor with deep mode, added tests. 2019-09-07 21:27:12 +02:00
Matthias Koefferlein cd137e6b3e Another fix for MSVC golden data. 2019-08-30 14:24:07 +02:00
Matthias Koefferlein ab66186db4 Updated MSVC test golden data 2019-08-30 13:03:37 +02:00
Matthias Koefferlein 5cfadad54f Updated test data. 2019-08-30 11:01:00 +02:00
Matthias Koefferlein 2a8f4c9610 Updated test data. 2019-08-30 10:52:51 +02:00
Matthias Koefferlein 550e2622bf Put more amphasis on net names to resolve ambiguities
The problem was that with the floating test case, the
ambiguity resolution sometimes assigned the wrong pins
and floating pins/connected pins were swapped.

One option is to make the ambiguity resolver consider
the pin connection state when tenatively evaluating
nodes.

Another option is to put more emphasis on net names
and use them for ambiguity resolution. This has helped
here.
2019-08-30 10:24:55 +02:00
Matthias Koefferlein 60ed0cdc89 Updated test golden data (mainly: nets are not purged when there is a subcircuit pin on it) 2019-08-29 23:26:03 +02:00
Matthias Koefferlein ef66becfdb Fixed LVS test golden data for MSVC 2019-08-26 19:02:38 +02:00
Matthias Koefferlein 441f946f43 WIP: LVS rerun feature 2019-08-25 21:55:48 +02:00
Matthias Koefferlein 515b68b76f WIP: provide a recipe registration facility for LVS rerun 2019-08-25 18:03:27 +02:00
Matthias Koefferlein c543fe7a44 Added test for floating device terminals. 2019-08-24 19:42:00 +02:00
Matthias Koefferlein 3a93bc2162 Added test for mixed-hierarchy LVS case. 2019-08-24 00:13:38 +02:00
Matthias Koefferlein 3ae848bff4 Provide test case for spice reader with delegate for devices as subcircuits. Small bugfix in spice reader: wrong line number in warning. 2019-08-23 23:13:04 +02:00
Matthias Koefferlein 45cdefcf9a Provide strict mode for device classes, dmos3/dmos4 for LVS 2019-08-20 23:12:17 +02:00
Matthias Koefferlein b7c83eaaa6 Spice reader: subcircuits w/o pins
This happens for subcircuits which only
connect to global nets.

Plus: ".global" now accepts more than just one net
2019-08-19 23:00:24 +02:00
Matthias Koefferlein 1bc03c3b79 Implement "M" parameter for Spice
This implementation is pretty simplistic and
applies "M" the following way:
* R: R(final) = R/M
* L: L(final) = L/M
* C: C(final) = C*M
* M: W(final) = W*M
* D: A(final) = A*M
* Q: AE(final) = AE*M

The other parameters (specifically the other
geometry parameters) are not scaled yet.
2019-08-19 22:51:22 +02:00
Matthias Koefferlein 207e44837c LVS: allow missing device classes in reference schematic
Reasoning: some devices may simply not be used in the
reference schematic.
2019-08-19 22:26:50 +02:00
Matthias Koefferlein 24b985f32e Better .include for Spice reader
* .inc is allowed as synonym
* Paths can be URL's (with HTTP)
* Relative resolution of paths/URL's vs. parent of .include
2019-08-19 21:45:40 +02:00
Matthias Köfferlein 16ae0346b8
Merge pull request #314 from KLayout/vars-for-queries
Vars for queries
2019-08-18 17:31:11 +02:00
Matthias Koefferlein 9c3f70342b key bindings and menu items visibility string packing/unpacking for scripts
New convenience functions are provided which simplify
manipulation of key bindings and menu item visibility
configuration strings. AbstractMenu#pack_key_binding
and AbstractMenu#unpack_key_binding turn a path/key
map into a single string and back. The string format
is the same than for the key-binding configuration key.

The same is provided for the menu item visibilily
with AbstractMenu#pack_menu_item_visible and
Abstract#unpack_menu_item_visible.
2019-08-17 19:54:18 +02:00
Matthias Koefferlein 3514fad64a Test for local variables in LQ 2019-07-28 01:38:37 +02:00
Matthias Koefferlein 49c1bacb98 Introducing variables for layout queries:
1.) The ExpressionContext class is a mapping of tl::Eval
    and allows providing a variable context for the LQ.
    Expression class is derived from ExpressionContext now.
2.) The variable lookup has been changed so that variables
    can be modified even if they come from a parent context.
3.) LayoutQuery and iterator has been given an argument to
    supply the context
2019-07-28 01:33:30 +02:00
Matthias Köfferlein 9a324727d2
Merge pull request #312 from KLayout/dvb
Dvb
2019-07-27 22:32:59 +02:00
Matthias Koefferlein 4cee051255 Another update of golden test data (MSVC) 2019-07-27 22:31:01 +02:00
Matthias Koefferlein 71f646c24f WIP: updated test data for latest updates, don't sort LVSDB on reading for consistency 2019-07-27 21:42:51 +02:00
Matthias Koefferlein 169cc5246d WIP: updated golden data for new device sorting in cross reference. 2019-07-27 20:37:41 +02:00
Matthias Koefferlein b4fa4b1bae Flattening of layout with circuit flattening.
Technically, the layout isn't flattened, but connections are made
which allow regenerating the layout even after the circuit
has been flattened.
2019-07-27 00:37:22 +02:00
Matthias Koefferlein 198b5bb5e4 Updated another golden testdata variant for MSVC 2019-07-24 23:29:13 +02:00
Matthias Koefferlein 45d9261ba9 Updated test golden data variants for MSVC builds 2019-07-24 22:15:15 +02:00
Matthias Koefferlein 64d32c1ae9 LVS tests are more stable because of sorting of terminal names before assigning them (no hash order) 2019-07-24 21:23:19 +02:00
Matthias Koefferlein afb5cea576 Added "device_scaling" to LVS
Plus: added some missing files

Implementation details:
* scaling factor was introduced in DeviceExtractor::extract
* for easy implementation this is available in "sdbu"
* "sdbu" is made available in GSI
* to test this, the db::compare_netlist had to be enhanced to
  exactly check device parameters
* enhancement of LVS script framework and doc updates
2019-07-24 00:16:47 +02:00
Matthias Koefferlein 14d9689498 Added .global to Spice reader. 2019-07-22 23:02:31 +02:00
Matthias Köfferlein 8a66f59b6e
Merge pull request #308 from KLayout/issue-305
Fixed issue #305 (CIF reader issue with rotated boxes)
2019-07-21 23:49:11 +02:00
Matthias Koefferlein 8f21cdf449 Fixed issue #305 (CIF reader issue with rotated boxes) 2019-07-21 22:57:02 +02:00
Matthias Koefferlein df7195b81f Compatibility with ruby 1.8, force garbage cleanup for LVS/DRC and tests. 2019-07-21 10:23:08 +02:00
Matthias Koefferlein 6e6e449eef Consolidated test data for lvs:full - there are too many variants to support pure text compare. We use the netlist comparer now. 2019-07-21 09:20:44 +02:00
Matthias Koefferlein fa94c2d8fa Merge branch 'dvb-origin' into dvb 2019-07-20 00:32:25 +02:00
Matthias Köfferlein f82e7929d8 Fixed a conversion issue with ints on MSVC
Because long is 32bit on Windows (like int), the
conversion from long to unsigned int was subject
to sign overflow. This was fixed by going to
unsigned int via unsigned long.
2019-07-20 00:28:32 +02:00
Matthias Koefferlein c268b7b7c3 Provide golden netlist testdata for LVS test - variant 3 2019-07-19 16:47:57 +02:00
Matthias Koefferlein e5852a7757 Updated alternative golden test data for Windows too 2019-07-19 00:14:57 +02:00
Matthias Koefferlein 0215d05a12 Fixed unit tests. 2019-07-19 00:02:05 +02:00
Matthias Köfferlein 142085bd64 Provide new golden data for two test for Windows. 2019-07-16 23:50:52 +02:00
Matthias Köfferlein 7fc907cf7e Fixed a segfault from the testsuite 2019-07-16 23:17:29 +02:00
Matthias Köfferlein 4e1736a181 Updated golden data of two tests for Windows. 2019-07-16 01:27:08 +02:00
Matthias Köfferlein b3e9915259 Provide special LVS test golden data for Windows (slight differences in shape order etc.) 2019-07-16 00:40:43 +02:00
matthias 89ce2be5c2 Merge remote-tracking branch 'origin/master' into dvb 2019-07-14 01:28:11 +02:00
matthias 8b17a4da4f A few utility functions
Polygon#is_rectilinear?, Polygon#is_empty?
and same for SimplePolygon
2019-07-13 22:45:22 +02:00
Matthias Koefferlein 1251fb2cd6 Added < and > to allowed chars for net names in Spice reader 2019-07-13 08:50:13 +02:00
Matthias Koefferlein 2d57a11f8c Fixed #287 (RecursiveShapeIterator to ObjectInstPath)
There is a new constructor for ObjectInstPath to
create one from a RecursiveShapeIterator.
2019-07-12 23:13:50 +02:00
Matthias Koefferlein a9e1af0a1b Updated tests 2019-07-12 20:06:35 +02:00
Matthias Koefferlein c7e883cdb2 SPICE reader now assigned net names as pin names. 2019-07-12 19:00:27 +02:00
Matthias Koefferlein a47190f3ab Write short versions of LVS and L2N DB by default. 2019-07-12 17:43:43 +02:00
Matthias Koefferlein ca6d05d3c1 Updated tests 2019-07-12 00:22:45 +02:00
Matthias Koefferlein e32ee570c7 Alternative algorithm for subcircuit matching - tests updated, refactoring 2019-07-11 23:19:02 +02:00
Matthias Koefferlein 0d9273aaf6 WIP: new subcircuit match algorithm 2019-07-11 00:16:36 +02:00
Matthias Koefferlein 1e3d62ca3a Provide bulk label for blackboxed cells 2019-07-09 20:23:47 +02:00
Matthias Koefferlein cef96902ad Boundary for circuits, reverted automatic generation of global pins
- global pins have been generated for device cells too and lead
  to implicit pins which may not be desired. The original problem
  was how to make abstract circuits comparable. This has to be
  solved differently.
- Circuit boundaries are good for displaying the boxes for
  abstract circuits
2019-07-09 19:55:48 +02:00
Matthias Koefferlein bdb8a7bcc2 WIP: reverted modifications on SPICE reader. 2019-07-08 21:51:59 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein b48453633f WIP: some fixes and small enhancements. New tests. 2019-07-08 00:09:10 +02:00
Matthias Koefferlein bc2d9448d6 Providing LVS tests. 2019-07-07 21:33:28 +02:00
Matthias Koefferlein 95a1e38fe3 WIP: better reproducablility for .lvsdb layer names, updated tests. 2019-07-07 19:39:00 +02:00
Matthias Koefferlein 5ce8dd2684 WIP: added circuit blankout. 2019-07-06 19:50:20 +02:00
Matthias Koefferlein 0595ec2e0f WIP: one more test for LVS 2019-07-06 09:08:32 +02:00
Matthias Koefferlein 2f6aae7204 WIP: refactoring, added first tests for LVS 2019-07-06 08:52:40 +02:00
Matthias Koefferlein 71777670de Fixed unit tests. 2019-07-04 01:24:19 +02:00
Matthias Koefferlein 8aa6f4edcf WIP: added more test data, doc links 2019-07-02 02:03:58 +02:00
Matthias Koefferlein ae71356052 Added reference circuit 2019-07-02 00:30:50 +02:00
Matthias Koefferlein 5bfed544b7 Added inverter test layout 2019-07-02 00:27:05 +02:00
Matthias Koefferlein 9f26553d4b Added inverter test layout 2019-07-02 00:25:31 +02:00
Matthias Koefferlein ef1441e546 WIP: fixed unit tests. 2019-06-28 17:08:04 +02:00
Matthias Koefferlein 37012efba0 WIP: fixed unit tests, bug fix in DeepRegion -> and and not shall return a DeepRegion always. 2019-06-24 20:56:20 +02:00
Matthias Koefferlein 717e7ca0ab WIP: Fixed Spice reader/writer delegate, tests. 2019-06-23 00:08:49 +02:00
Matthias Koefferlein a1a0b62a10 WIP: doc fixes, added Netlist::simplify as convenience method 2019-06-22 22:18:55 +02:00
Matthias Koefferlein 621c3f74ed WIP: reader delegate - GSI binding, tests. 2019-06-22 22:03:32 +02:00
Matthias Koefferlein 343e340e22 WIP: SPICE reader delegate, unit tests + debugging 2019-06-22 19:44:33 +02:00
Matthias Koefferlein d174fb73fd WIP: preparations for SPICE reader delegate. 2019-06-22 18:37:32 +02:00
Matthias Koefferlein 46dafd50ea WIP: unit tests updated 2019-06-22 10:15:32 +02:00
Matthias Koefferlein 9647c94c68 WIP: added NE parameter for BJT3/4, AE and NE are primary parameters now. 2019-06-21 23:41:08 +02:00
Matthias Koefferlein a4d2be7fbf Merge remote-tracking branch 'origin/master' into dvb 2019-06-19 23:14:27 +02:00
Matthias Köfferlein 9ca1a8ae5a
Merge pull request #279 from KLayout/issue-275
Fixed #275 (don't write PCell context with OASIS)
2019-06-18 18:45:08 +02:00
Matthias Köfferlein 38ec560458
Merge pull request #280 from KLayout/issue-276
Fixed #276 (Layer properties name cannot be updated)
2019-06-18 18:44:55 +02:00
Matthias Koefferlein b521269805 Added missing test case files. 2019-06-18 01:56:46 +02:00
Matthias Koefferlein 2389d2b391 Fixed #281 (proper reporting of width/space violations in the kissing-corner case) 2019-06-17 20:48:07 +02:00
Matthias Koefferlein 56c622053f Fixed #276 (Layer properties name cannot be updated)
In addition, this fix includes Python-related fixes: because
of the short lifetime of Python references, the functionality
was not as expected sometimes. Keeping copies of LayerPropertiesIterators
helped. Some tweaks were required to maintain the delete() semantics.
2019-06-16 21:42:07 +02:00
Matthias Koefferlein c7fe1cb189 Fixed #275 (don't write PCell context with OASIS)
The ability to disable PCell context on OASIS output
with the "write_context_info" option was added.
2019-06-16 16:48:30 +02:00
Matthias Koefferlein 0794290fb5 WIP: added RBA basic tests for device extractors. 2019-06-15 21:48:02 +02:00
Matthias Koefferlein a91c3d3a4e WIP: fixed BJT4 class, added RBA tests for new device classes. 2019-06-15 21:11:15 +02:00
Matthias Koefferlein e939d51104 WIP: BJT4 device, more parameters for resistor (W,L), BJT devices for Spice writer, tests updated 2019-06-15 18:22:04 +02:00
Matthias Koefferlein 1b2a611d83 WIP: diode extraction test. 2019-06-15 09:34:04 +02:00
Matthias Koefferlein c717eb1efa WIP: fixed RBA unit tests. 2019-06-15 00:01:40 +02:00
Matthias Koefferlein 0b5db06ca8 WIP: tests for BJT extraction 2019-06-14 23:45:04 +02:00
Matthias Koefferlein 4212a783a5 WIP: test cases for device extractors R/C with bulk 2019-06-14 21:21:11 +02:00
Matthias Koefferlein dd63d55304 Updated test data 2019-06-13 13:40:57 +02:00
Matthias Koefferlein 0d623bc57a Avoid netlist extraction issues with duplicate instances
So far, duplicate instances have lead to net propagation
into parent cells and floating nets. This is fixed by ignoring
duplicate instances where possible.
2019-06-13 13:33:28 +02:00
Matthias Koefferlein 8e1dadbe59 Updated golden data of unit tests. 2019-06-13 09:02:47 +02:00
Matthias Koefferlein 3dd2978d1f Added RBA tests for LayoutToNetlist#build_nets and LayoutToNetlist#build_all_nets 2019-06-12 23:32:10 +02:00
Matthias Koefferlein ebd00c186b Enhancements for net export feature
- some refactoring
- better performance (was slow because layer iteration
  was done outside of loop and recursive cluster iterator)
- with selected nets, only the required hierarchy is
  produced. For this a new argument is added to
  LayoutToNetlist::create_cell_mapping (nets) which
  allows selecting the nets for which a cell mapping
  is requested
2019-06-12 22:55:24 +02:00
Matthias Koefferlein 0f666d528c Updated golden data for MSVC 2019-06-11 23:38:58 +02:00
Matthias Koefferlein 93be648ee1 Updated golden data for MSVC 2019-06-11 21:37:23 +02:00
Matthias Koefferlein 7d6237a90a Unescaping of net names on Spice reader -> writer/reader should be self-compatible. 2019-05-31 22:55:09 +02:00
Matthias Koefferlein 985cffc099 Unique net names for Spice netlist writer 2019-05-31 22:19:51 +02:00
Matthias Koefferlein c684633dd6 Some enhancements for netlist extraction and writer
* Spice writer can now be configure to skip the debug
  comments
* < and > are allowed chars in spice names now
* global net names have second prio over labels now
2019-05-31 00:11:28 +02:00
Matthias Koefferlein 1764ce04af Special golden data for MSVC/dev ex test 2019-05-29 23:37:50 +02:00
Matthias Koefferlein 9bf1263efa Special golden data for MSVC/LVS test 2019-05-29 23:34:55 +02:00
Matthias Koefferlein 9c6ed3e956 Merge remote-tracking branch 'origin/master' into dvb 2019-05-29 22:32:05 +02:00
Matthias Koefferlein 0816ec03b2 Added alternative golden data for MSVC 2019-05-29 22:14:34 +02:00
Matthias Koefferlein 1935ee7ff9 Tried to fix unit tests for MSVC 2019-05-29 22:09:39 +02:00
Matthias Koefferlein dea2b76dc8 Added unit tests for res and cap device extractors. 2019-05-29 21:35:02 +02:00
Matthias Koefferlein 3b3791204d Fixed two more unit tests and renamed new 'define_layer' to 'define_opt_layer' for disambiguation 2019-05-29 01:22:11 +02:00
Matthias Koefferlein 10667d8e35 Bugfixed last commit, fixed unit tests. 2019-05-29 00:51:42 +02:00
Matthias Koefferlein 7e62d04ffe Fixed rba unit tests. 2019-05-27 21:00:02 +02:00
Matthias Koefferlein 85e6cb074d Added pya test for NetlistCrossReference 2019-05-27 20:58:04 +02:00
Matthias Koefferlein 9a1f4e1973 Added pya test for LayoutVsSchematic 2019-05-27 20:36:53 +02:00
Matthias Koefferlein 759cc835d9 Added LayoutToNetlist test for pya. 2019-05-27 20:28:48 +02:00
Matthias Koefferlein eb81a7e5a6 GSI binding of LVS objects. 2019-05-26 09:01:21 +02:00
Matthias Koefferlein 89cbe930ae WIP: GSI binding of LVS framework, tests and debugging 2019-05-26 01:37:45 +02:00
Matthias Koefferlein f8646412ca Added missing files 2019-05-25 01:19:32 +02:00
Matthias Koefferlein f1fc16d55f WIP: LVS DB model 2019-05-22 00:46:15 +02:00
Matthias Koefferlein 252622e3f8 Fixed unit tests, support floating pins for netlist compare 2019-05-20 23:48:07 +02:00
Matthias Koefferlein 625b173379 Reworked l2n and lvsdb format such that reading/writing gets more reproducible: maintain unnamed state of devices, subcircuits and pins 2019-05-20 22:33:23 +02:00
Matthias Koefferlein 834dcc7474 WIP: LVSDB reader/writer fixes 2019-05-19 23:42:31 +02:00
Matthias Koefferlein ea8320dcf8 WIP: LVSDB reader/writer: bugfixes, refactoring, tests. 2019-05-19 22:55:03 +02:00
Matthias Koefferlein f72790e808 WIP: glob pattern - GSI binding to enable compatible implementations. 2019-05-11 22:35:50 +02:00
Matthias Koefferlein 0f0dd42b4d Refactoring and GSI binding for combined device interface. 2019-05-10 18:32:05 +02:00
Matthias Koefferlein ea28530c55 L2N: combined device persistance (complex concept - needs simplification?) 2019-05-10 00:15:51 +02:00
Matthias Koefferlein 8aeab5f131 Provide alternative golden data to make test pass on CentOS 7 (different hasher?) 2019-05-07 20:55:23 +02:00
Matthias Koefferlein 90ef5f9c2e Added missing files 2019-05-06 19:01:34 +02:00
Matthias Koefferlein 30fdb0089b Integration of netlist extractor with net tracer plugin (-> "trace all nets") 2019-05-05 22:30:07 +02:00
Matthias Koefferlein c33fd40ec9 Switched l2n format to relative mode by default (relative mode is an option and maybe shorter) 2019-05-04 23:06:18 +02:00
Matthias Koefferlein 548f16f1df WIP: tried to provide a more consistent net building feature (here: building hierarchical nets with properties as net annotation - needs cell variants if properties are assigned to subcells too) 2019-05-04 00:37:38 +02:00
Matthias Koefferlein 2aaec56adb WIP: netlist browser - extended the net export scheme of build_net to support net annotation and flattening. 2019-05-03 23:33:37 +02:00
Matthias Koefferlein e661bac0a7 Netlist browser: fixed a segfault on 'unload all' 2019-04-28 22:57:06 +02:00
Matthias Koefferlein 7f9da5e8de Introduced concept of device class templates
This concept allows to persist at least the standard
(built-in) device classes into L2N DB files. This way
device classes are persisted.
2019-04-23 19:44:07 +02:00
Matthias Koefferlein 8121f70e65 Netlist compare: Net mismatches reported if nets don't match but we still will proceed 2019-04-18 00:01:21 +02:00
Matthias Koefferlein 213a6f306b More robust unit tests. 2019-04-17 22:16:57 +02:00
Matthias Koefferlein 66eabe9aec Test data normalization for netlist writer test (Ruby) 2019-04-17 22:05:51 +02:00
Matthias Koefferlein 3de4a8408e Merge remote-tracking branch 'origin/dvb' 2019-04-16 18:55:37 +02:00
Matthias Koefferlein 86f05456b8 Fixed pya:qtbinding test 2019-04-16 07:07:19 +02:00
Matthias Koefferlein eabf558186 netlist exaction: selective net joining with labels
Now, a glob pattern can be used to identify the labels
which implicitly join nets. Also, net joining now
only happens on top level.
2019-04-15 23:24:27 +02:00
Matthias Koefferlein 92524dcf57 WIP: netlist compare - bugfixed latest version and updated tests. 2019-04-13 19:56:08 +02:00
Matthias Koefferlein e855d8df35 WIP: fixed unit tests. 2019-04-12 00:31:48 +02:00
Matthias Koefferlein 648aa9e077 WIP: fixed unit tests. 2019-04-12 00:23:45 +02:00
Matthias Koefferlein f34d161e2f WIP: new backtracking algorithm for net matching. 2019-04-09 23:13:40 +02:00
Matthias Koefferlein 2e9422a753 Netlist compare: a little less freedom when picking derived net pairs ... 2019-04-08 21:32:41 +02:00
Matthias Koefferlein 7cdd40dabb Netlist compare: more detailed derivation of net assignments from known nets (pairing by deduction) 2019-04-08 21:21:34 +02:00
Matthias Koefferlein f6836b96a2 WIP: some enhancements
Spice writer: don't prefix model name with "M"
Added "device_class_mismatch" message to netlist compare
Assertion if device classes or circuits are nil on
"same_..."
2019-04-07 10:15:57 +02:00
Matthias Koefferlein df2bd5e80a Netlist: flatten subcircuits, circuits 2019-04-06 23:36:08 +02:00
Matthias Koefferlein aad52b77ba Netlist compare: added the ability to filter small caps and high resistance devices 2019-04-06 19:46:13 +02:00
Matthias Koefferlein da5680ef24 Netlist compare: configurable device parameter compare scheme. 2019-04-06 15:19:43 +02:00
Matthias Koefferlein 43f65e4d29 Added tests for GSI binding of dbNetlistCompare 2019-04-06 00:18:37 +02:00
Matthias Koefferlein 52fb8b0f65 Merge remote-tracking branch 'remotes/origin/master' into dvb 2019-04-04 07:35:43 +02:00
Ruben Undheim d287b6958b A few more spelling fixes 2019-04-03 08:23:27 +02:00
Matthias Koefferlein 89ffd7e3da WIP: Simple SPICE reader. 2019-04-01 22:46:33 +02:00
Matthias Koefferlein 9613ad72c8 WIP: netlist compare - using it for more tests
Issue solved: some circuit pins may not have a net - these
need to be ignored.

Requirement: all pins with a net must be mapped.

Detached pins are not present in the mapping table.
A dummy mapping table was introduced to allow dropping
of pins in the second circuit too.

Output of compare should not depend on memory location
anymore and pin mismatch reporting should include all
pins.
2019-03-31 23:59:43 +02:00
Ruben Undheim 5d26cf4c77 Spelling errors in code and comments fixed 2019-03-31 15:25:18 +00:00
Matthias Koefferlein d255617051 WIP: netlist compare - tests for device class equivalence mapping, added Netlist#device_class_by_name 2019-03-28 18:01:22 +01:00
Matthias Koefferlein 0003c38918 Netlist normalization for unit tests also for RBA test. 2019-03-23 09:29:37 +01:00
Matthias Koefferlein e545d6af3f Refined solution for issue-245 by providing a better name mapping (checked with ngspice) 2019-03-22 00:05:17 +01:00
Matthias Koefferlein 9356f32026 Fixed issue-245 (support Spice netlist with names instead of numbers)
The option is in the Spice writer (writer.use_net_names=true).
2019-03-21 23:34:16 +01:00
Matthias Koefferlein 2d4f23abd1 Updated tests. 2019-03-19 00:08:47 +01:00
Matthias Koefferlein 41fdd74189 Custom devices for device extractor - tests in the DRC framework 2019-03-10 22:37:32 +01:00
Matthias Koefferlein 510c675d21 Test cases for DRC-based net extraction and flat extraction
Flat extraction requires that texts of subcells are not
considered. Otherwise they pollute the net namespace of
the top cell.
2019-03-10 19:35:13 +01:00
Matthias Koefferlein ab8107de2d Bugfix: Spice writer needs 'P' suffix for source/drain area of MOS 2019-03-10 01:26:52 +01:00
Matthias Koefferlein 6932977273 A few bug fixes and test updates
- edge pairs are normalized before turning them into polygons.
  This makes flat and deep implementation more consistent.
- deep region and flat regions were not cooperating in geo
  checks
- unnamed layers are not registered in make_layer - this
  does not make sense and will just hold a fake ref
- tests now use GDS to represent texts after transformation
  (with orientation, OASIS can't do this)
- texts are more consistently handled in the tests
- test debug output is not written in the same format
  than golden data unless special normalization is
  requested.
- a non-orientable polygon was converted to orientable in
  a text because this can be represented in GDS consistently
- DRC testsuite uses "polygons" instead of "input" to achieve
  identical behavior for deep and flat mode with respect to
  texts
- dbRegionTests are updated because texts are not allowed
  for non-original layers too
2019-03-09 19:40:38 +01:00
Matthias Koefferlein 745696507f Two bug fixes in DRC related to flatten:
- Merge semantics wasn't transferred to flat region
- Merge semantics wasn't set at all in deep region
2019-03-09 09:59:23 +01:00
Matthias Koefferlein b30a9278d6 WIP: updated test cases. 2019-03-06 07:41:44 +01:00
Matthias Koefferlein 1b450c6499 Added missing file. 2019-03-06 00:36:05 +01:00
Matthias Koefferlein 8b29b30ff9 WIP: more consistent text handling
Texts are not only kept inside original layers, but
also inside deep layers. This enables using texts
from DRC.

However, texts in deep layers are kept as markers.
Mostly they are converted back to texts, but the
orientation will be lost.

The change eliminates the need to using Iterators
in DRC instead of original layers and use of
label layers in deep mode.

A drawback is the presence of marker shapes in
deep mode (unless polygon layers are created).
Also, text output to RDB is not supported from
deep layers currently.
2019-03-06 00:34:56 +01:00
Matthias Koefferlein bacd565d05 Bugfix: Spice writer added one pin too much to MOS4 transistors. 2019-03-04 17:26:35 +01:00
Matthias Koefferlein 9c75ee8c92 Added DRC tests for antenna check. 2019-03-02 11:23:40 +01:00
Matthias Koefferlein 261fb027fd GSI binding of antenna check function + tests. 2019-03-02 00:38:51 +01:00
Matthias Koefferlein 8d3b94201e Antenna check: tests added, 'catchall' diode protection 2019-03-01 23:07:28 +01:00
Matthias Koefferlein 9f4f2d58d7 First version of antenna check. 2019-02-28 23:56:49 +01:00
Matthias Koefferlein fccdee5186 WIP: provisions for DRC/network extractor integration. 2019-02-28 00:55:06 +01:00
Matthias Koefferlein d4ed21f42a Just new tests 2019-02-25 22:34:06 +01:00
Matthias Koefferlein 3c6aafcc0c Region: hierarchical text object detection implementated. 2019-02-23 00:56:55 +01:00
Matthias Koefferlein c7b17fb65a Merged master into dvb branch 2019-02-22 23:16:44 +01:00
Matthias Koefferlein 792de1e0e9 'break' function for regions (split polygons into pieces if required) 2019-02-22 23:10:26 +01:00
Matthias Koefferlein 18f74bac1e Enabled transformations for deep regions/edges/edge pairs - important for handling layouts with different DBUs in DRC 2019-02-22 01:02:48 +01:00
Matthias Koefferlein 91407ddaa9 Added tests for region processors. 2019-02-20 21:40:43 +01:00
Matthias Koefferlein 496b695ef0 Refactoring of the polygon processing in Region 2019-02-19 22:11:55 +01:00
Matthias Koefferlein 0111b3916c Included a test for DRC's 'flatten' method 2019-02-18 23:51:39 +01:00
Matthias Koefferlein 7f71cc3a56 Some bug fixes, added tests for hier DRC (at least for what is there yet) 2019-02-18 22:24:34 +01:00
Matthias Koefferlein 9ec6b44c93 Added some tests for the previous commit. 2019-02-18 00:15:26 +01:00
Matthias Koefferlein b91edbabde Enabled deep mode for DRC 2019-02-17 23:21:23 +01:00
Matthias Koefferlein 311318c578 Ported edge/edge DRC functions to hierarchical mode. 2019-02-17 18:54:33 +01:00
Matthias Koefferlein c40f147dc7 Edge/edge and edge/polygon interaction test ported to hierarchical mode. 2019-02-17 18:36:15 +01:00
Matthias Koefferlein 7ef0451ca8 Partial segments of edges converted to hierarchical operations. 2019-02-17 17:53:21 +01:00
Matthias Koefferlein 74006b6208 Hierarchical implementation of extended method for edges 2019-02-17 17:34:31 +01:00
Matthias Koefferlein ae783a2245 Hiearchical implementation of edge filter. 2019-02-17 16:18:24 +01:00
Matthias Koefferlein 61d766bd4c Hierarchical implementation of edge to region operations. 2019-02-17 16:05:39 +01:00
Matthias Koefferlein e6ee1c064e Hierarchical implementation of edge/edge booleans. 2019-02-17 15:07:16 +01:00
Matthias Koefferlein 8e5bffcf18 Hierarchical angle check. 2019-02-17 11:42:30 +01:00
Matthias Koefferlein a7bfaac424 Cell variant resolution by propagation, grid check now implementation hierarchically (with propagation) 2019-02-17 10:59:04 +01:00
Matthias Koefferlein 6e35e80963 Hierarchical implementation of polygon vs. edge interact 2019-02-15 23:43:45 +01:00
Matthias Koefferlein 78617930dd Hierarchical implementation of self-overlap merge. 2019-02-13 22:41:12 +01:00
Matthias Koefferlein ddcfda8761 Some optimization: keep merged state in deep region. 2019-02-13 17:17:03 +01:00
Matthias Koefferlein 68947bedd2 Updated golden test data. 2019-02-13 01:11:15 +01:00
Matthias Koefferlein b0fc2be96e Deep regions: some more operations implemented hierarchically
- snap (!) - but only for gx == gy
- filtering
- interact/inside/outside/overlap + not_... variants
- edges
2019-02-13 01:07:32 +01:00
Matthias Koefferlein 7404ad8f3a WIP: added a comment. 2019-02-12 00:10:52 +01:00
Matthias Koefferlein 6404ca6b1d WIP: Deep edge pairs 2019-02-12 00:08:47 +01:00
Matthias Koefferlein 82ad528dbe Added one more testcase for inserting a plain region into a RDB 2019-02-11 19:24:24 +01:00
Matthias Koefferlein 43014d6923 WIP: some testing and bug fixes for hierarchical report db generation. 2019-02-11 00:22:19 +01:00
Matthias Koefferlein 2d9a3aaaa6 WIP: Hierarchical production of error db's. Needs testing. 2019-02-11 00:11:03 +01:00
Matthias Koefferlein d35e86e189 Updated tests after last change (edge transformation behaviour) 2019-02-10 16:21:44 +01:00
Matthias Koefferlein a81a8cdbc8 Modified edge transformation to maintain the orientation paradigm
When the transformation is mirroring, edges now swap their
points to maintain the right-is-inside paradigm.
2019-02-10 16:03:46 +01:00
Matthias Koefferlein 4abc38a5cc Test for deep/flat collaboration 2019-02-10 08:28:48 +01:00
Matthias Koefferlein e8e45b7272 Some tests, smooth and round method of deep region 2019-02-09 23:51:35 +01:00
Matthias Koefferlein 404f0f8328 Added a missing test golden data. 2019-02-09 22:56:44 +01:00
Matthias Koefferlein b6dd149f53 Changed variant suffix to to be consistent with cell name suffix generation in KLayout. 2019-02-09 19:21:14 +01:00
Matthias Koefferlein 1f3af7bbfe Hierarchical area and perimeter and sizing
Area and perimeter computation happens hierarchically
now. Magnified instances are supported.

Sizing is implemented hierarchically.

For anisotropic sizing, orientation variants may be
generated. For both isotropic and anisotropic
magnification variants will be created.
2019-02-09 19:13:54 +01:00
Matthias Koefferlein bbf7b2768b WIP: cell variant collecting and building. 2019-02-09 16:29:34 +01:00
Matthias Koefferlein ac7baf96ff Added golden data for deep region regression test. 2019-02-07 21:08:52 +01:00
Matthias Koefferlein decc5ede13 Robustification of Region
- Tests for merge
- Locking the layout when writing back the data for
  performance improvement
2019-02-05 23:39:31 +01:00
Matthias Koefferlein 9c0123df20 Implemented implicit joining of nets with the same label. 2019-02-03 21:34:23 +01:00
Matthias Koefferlein 3f1cd226a5 Made net name optional in l2n format. 2019-02-03 13:33:58 +01:00
Matthias Koefferlein f9c33733b9 l2n format writer and reader: more compact output 2019-02-03 01:49:48 +01:00
Matthias Koefferlein 99f111fe01 Attempt to achieve reproducibility between MSVC and gcc
Applies to dbHierProcessor.cc:

The issue was related to std::unordered_set/map which
(as the name says) is not ordered. The output of the
boolean core computation step is currently dependent
on the order (it's single pass), hence the order of
the contexts matters.

Using ordered sets where possible and explicit
sorting might help.
2019-02-02 22:43:42 +01:00
Matthias Koefferlein c90f7e4af9 Introduced perimeter parameters for MOS3/MOS4 2019-02-02 01:29:28 +01:00
Matthias Koefferlein 57305977a4 Spice writer delegate fix
- Changed to const & objects in the Spice writer delegate
  to non-const & for Ruby/Python reimplementation (as const/non-const
  ambiguity is an issue for Ruby/Python we cannot efficiently
  work with const refs)
- Updated test data because the previous implementation wasn't
  using refs but rather copies of device and device class
  objects.
2019-01-31 22:23:58 +01:00
Matthias Koefferlein 30e26c4f96 Avoid an issue with virtual functions
Reimplementing virtual functions with
"const &" arguments wasn't behaving as
expected because these arguments were
copied.

Now, "const &" for arguments (in virtual
function reimplementation) is not implemented
as a copy.

In addition, now it's possible to declare
results as references always (also if const &).

See gsiTest.cc:1078 for example:

  //  gsi::arg_make_reference makes the function's return value
  //  always being taken as a reference
  gsi::method<C_P, const CopyDetector &, const CopyDetector &, gsi::arg_make_reference> ("pass_cd_cref_as_ref", &C_P::pass_cd_cref)
2019-01-31 01:07:15 +01:00
Matthias Koefferlein 7b07782cdf Avoid an issue with virtual functions
Reimplementing virtual functions with
"const &" arguments wasn't behaving as
expected because these arguments were
copied.

Now, "const &" for arguments (in virtual
function reimplementation) is not implemented
as a copy.

In addition, now it's possible to declare
results as references always (also if const &).

See gsiTest.cc:1078 for example:

  //  gsi::arg_make_reference makes the function's return value
  //  always being taken as a reference
  gsi::method<C_P, const CopyDetector &, const CopyDetector &, gsi::arg_make_reference> ("pass_cd_cref_as_ref", &C_P::pass_cd_cref)
2019-01-31 00:36:44 +01:00
Matthias Koefferlein 4068478887 Implemented SPICE writer + tests. 2019-01-31 00:07:10 +01:00
Matthias Koefferlein 4712ee0f29 Activated DeviceAbstract for GSI. 2019-01-25 22:40:41 +01:00
Matthias Koefferlein 29264013b0 WIP: more consistent handling of polygon splitting parameters. 2019-01-25 22:28:25 +01:00
Matthias Koefferlein 6da9bc5e85 Updated tests after switching to boolean core. 2019-01-25 21:38:45 +01:00
Matthias Koefferlein f83e1dae43 Refactoring, some bugfixes, GSI bindings for L2N methods. 2019-01-20 23:12:27 +01:00
Matthias Koefferlein 4c7f43d749 More l2n reader tests. 2019-01-20 17:31:58 +01:00
Matthias Koefferlein dd39168dc8 WIP: Enabled layout generation from read l2n data. 2019-01-20 02:50:23 +01:00
Matthias Koefferlein a5e2cf58c3 l2n dump format is leaner (device terminal shapes dropped from nets as they are contained in the device abstracts). Some refactoring. 2019-01-19 23:00:19 +01:00
Matthias Koefferlein 8213e71a79 WIP: l2n reader implementation, some bug fixes, refactoring. 2019-01-19 22:19:08 +01:00
Matthias Koefferlein 56bb39a273 LayoutToNetlist enhancements in the area of the dumper. 2019-01-16 22:45:58 +01:00
Matthias Koefferlein 5962d66940 WIP: major enhancements with respect to device handling
The device handling in the netlist extractor was now
entirely moved to device cells. New options are introduced
for exporting these cells. Tests have been updated.
2019-01-15 21:33:41 +01:00
Matthias Koefferlein 1af81b74d2 WIP: refactoring - turning devices into cells for better backannotation. 2019-01-14 00:59:47 +01:00
Matthias Koefferlein aeeb6d7c87 Fixed #200 by introducing layout locking during iteration
The cause for the problem was that the layout got updated
while iterating causing the mess within the iterator.

This solution is to lock the layout while an iterator
is present. This happens for various Cell and Shapes
iterator, so it's a major enhancement.
2019-01-09 01:06:11 +01:00
Matthias Koefferlein 9fa5618034 Added test for device combination. 2019-01-08 23:49:12 +01:00
Matthias Koefferlein d4d7ea8022 Updated copyright. 2019-01-08 01:09:25 +01:00
Matthias Koefferlein b0d7f5f7f5 Updated copyright. 2019-01-08 00:58:45 +01:00
Matthias Koefferlein feb2b69aa9 Merge remote-tracking branch 'origin/master' into dvb 2019-01-08 00:49:16 +01:00
Matthias Koefferlein fb4048d317 Added RBA tests for four-terminal MOS extraction plus global nets. 2019-01-08 00:17:58 +01:00
Matthias Koefferlein 294f1701b5 Added a test for joining of layers through multiple global net assignment. 2019-01-07 23:57:52 +01:00
Matthias Koefferlein 315bcdd016 WIP: bugfixed netlist extractor with global nets. 2019-01-07 23:33:57 +01:00
Matthias Koefferlein c80e335cd6 WIP: global nets integration in cluster builder. 2019-01-07 02:08:59 +01:00
Matthias Koefferlein a4f0fd665e Provided a solution for connectivity through global nets. 2019-01-06 17:50:51 +01:00
Matthias Koefferlein 64c2548ab8 WIP: first steps towards global nets. 2019-01-06 15:28:40 +01:00
Matthias Koefferlein eb435d5d85 WIP: refactoring - separated pins of net into outgoing and subcircuit. 2019-01-06 12:53:22 +01:00
Matthias Koefferlein 261b14a260 WIP: GSI binding of LayoutToNetlist::build_nets 2019-01-06 02:15:04 +01:00
Matthias Koefferlein 8d51d1e4bb WIP: better optimization of hierarchical net output. 2019-01-06 01:54:36 +01:00
Matthias Koefferlein ec3a3b0f8c WIP: added ability to export nets to layouts. 2019-01-06 01:32:20 +01:00
Matthias Koefferlein bc4f9efa5d One more test for probing with a slightly more complex hierarchy. 2019-01-05 23:21:37 +01:00
Matthias Koefferlein f86f8149eb Fixed a bug that caused a segfault in the Layout2Netlist object (array repo references to original layout rather than to the working layout) 2019-01-05 22:40:53 +01:00
Matthias Koefferlein 6e468b43e0 WIP: bugfix - local to instance interaction did shortcut too early. 2019-01-05 10:12:55 +01:00
Matthias Koefferlein c31c87916c WIP: bugfix - array reference were not always considered correctly. 2019-01-05 01:34:10 +01:00
Matthias Koefferlein ad6d9b5715 WIP: provide a less memory intensive way to deliver shapes from nets. 2019-01-04 17:41:09 +01:00
Matthias Koefferlein 3fd99407a3 WIP: bugfix - hierarchical net extractor wasn't considering self-interactions between instance array elements. 2019-01-03 23:25:28 +01:00
Matthias Koefferlein 62d9941c4a WIP: Bugfix - hierarchy was dropping instances. 2019-01-03 22:09:19 +01:00
Matthias Koefferlein e3b8d3635c Small bugfix: object._destroy wasn't working for directly passed objects. 2019-01-02 23:18:14 +01:00
Matthias Koefferlein 9c607d7663 Added a first version of the layout to netlist extraction feature
The main entry point is RBA::LayoutToNetlist which is the
GSI binding for the layout to netlist extractor. For a first
impression about the abilities of this extractor see the
Ruby tests in testdata/ruby/dbLayoutToNetlist.rb.

The framework itself consists of many classes, specifically

- RBA::Netlist for the netlist representation
- RBA::DeviceClass and superclasses (e.g. RBA::DeviceClassResistor and
  RBA::DeviceClassMOS3Transistor) for the description of devices.
- RBA::DeviceExtractor and superclasses (i.e. RBA::DeviceExtractorMOS3Transistor or
  the generic RBA::GenericDeviceExtractor) for the implementation of the
  device extraction.
- RBA::Connectivity for the description of inter- and intra-layer connections.
2018-12-30 22:43:56 +01:00
Matthias Koefferlein f989a85642 WIP: introduced Circuit::is_external_net 2018-12-30 18:44:30 +01:00
Matthias Koefferlein 72a140957d WIP: added test for recursive net shape retrieval 2018-12-30 18:22:45 +01:00
Matthias Koefferlein a787204e77 WIP: connect and disconnect terminal by name in GSI 2018-12-30 13:28:11 +01:00
Matthias Koefferlein 293c6f496e WIP: more query functions for netlist classes (i.e. net by name, device by name etc.), some refactoring, GSI bindings, tests. 2018-12-30 13:00:03 +01:00