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Another update of golden data.

This commit is contained in:
Matthias Koefferlein 2019-11-23 23:38:38 +01:00
parent ed00503d41
commit 1a92bae3a8
1 changed files with 9 additions and 18 deletions
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27
testdata/algo/lvs_test2b_au.lvsdb.1 vendored
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@ -951,11 +951,8 @@ reference(
net(4 name('4'))
net(5 name('6'))
net(6 name('5'))
net(7 name('101'))
net(8 name('8'))
net(9 name('102'))
net(10 name('7'))
net(11 name('103'))
net(7 name('8'))
net(8 name('7'))
# Outgoing pins and their connections to nets
pin(1 name('1'))
@ -986,26 +983,23 @@ reference(
pin(0 4)
pin(1 3)
pin(2 4)
pin(3 7)
pin(4 6)
pin(5 8)
pin(5 7)
pin(6 3)
)
circuit(4 INV2PAIR name($4)
pin(0 4)
pin(1 3)
pin(2 4)
pin(3 9)
pin(4 8)
pin(5 10)
pin(4 7)
pin(5 8)
pin(6 3)
)
circuit(5 INV2PAIR name($5)
pin(0 4)
pin(1 3)
pin(2 4)
pin(3 11)
pin(4 10)
pin(4 8)
pin(5 5)
pin(6 3)
)
@ -1090,11 +1084,8 @@ xref(
)
circuit(RINGO RINGO nomatch
xref(
net(() 7 mismatch)
net(() 9 mismatch)
net(() 11 mismatch)
net(() 6 mismatch)
net(() 8 mismatch)
net(() 7 mismatch)
net(5 () mismatch)
net(6 () mismatch)
net(7 () mismatch)
@ -1102,7 +1093,7 @@ xref(
net(11 () mismatch)
net(12 () mismatch)
net(10 1 mismatch)
net(8 10 mismatch)
net(8 8 mismatch)
net(1 5 mismatch)
net(2 2 match)
net(3 3 match)
@ -1120,7 +1111,7 @@ xref(
circuit(3 () mismatch)
circuit(4 () mismatch)
circuit(5 () mismatch)
circuit(1 1 mismatch)
circuit(1 1 match)
)
)
)