Version bump

Co-authored-by: James Bailey <[email protected]>

.clang-format

@@ -63,6 +63,8 @@ ForEachMacros:
 SortIncludes:    true
 IncludeBlocks:   Regroup
 IncludeCategories:
+  - Regex:           '"V3Pch.*\.h"'
+    Priority:        -2 # Precompiled headers
   - Regex:           '"(config_build|verilated_config|verilatedos)\.h"'
     Priority:        -1 # Sepecials before main header
   - Regex:           '(<|")verilated.*'
@@ -112,6 +114,9 @@ SpacesBeforeTrailingComments: 2
 SpacesInAngles:  false
 SpacesInContainerLiterals: true
 SpacesInCStyleCastParentheses: false
+SpacesInLineCommentPrefix:
+  Minimum: 0
+  Maximum: -1
 SpacesInParentheses: false
 SpacesInSquareBrackets: false
 Standard:        Cpp11

.clang-tidy

@@ -1,4 +1,4 @@
-Checks:          '*,-hicpp*,-android-cloexec-fopen,-cert-dcl50-cpp,-cert-env33-c,-cert-err34-c,-cert-err58-cpp,-clang-analyzer-core.UndefinedBinaryOperatorResult,-clang-analyzer-security*,-cppcoreguidelines-avoid-magic-numbers,-cppcoreguidelines-no-malloc,-cppcoreguidelines-owning-memory,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-constant-array-index,-cppcoreguidelines-pro-bounds-pointer-arithmetic,-cppcoreguidelines-pro-type-const-cast,-cppcoreguidelines-pro-type-reinterpret-cast,-cppcoreguidelines-pro-type-static-cast-downcast,-cppcoreguidelines-pro-type-union-access,-cppcoreguidelines-pro-type-vararg,-cppcoreguidelines-special-member-functions,-fuchsia-*,-google-default-arguments,-google-readability-todo,-google-runtime-references,-llvm-header-guard,-llvm-include-order,-misc-string-integer-assignment,-misc-string-literal-with-embedded-nul,-modernize-use-auto,-modernize-use-trailing-return-type,-readability-braces-around-statements,-readability-container-size-empty,-readability-delete-null-pointer,-readability-else-after-return,-readability-implicit-bool-conversion,-readability-named-parameter,-readability-static-accessed-through-instance'
+Checks:          '*,-hicpp*,-android-cloexec-fopen,-cert-dcl50-cpp,-cert-env33-c,-cert-err34-c,-cert-err58-cpp,-clang-analyzer-core.UndefinedBinaryOperatorResult,-clang-analyzer-security*,-cppcoreguidelines-avoid-magic-numbers,-cppcoreguidelines-no-malloc,-cppcoreguidelines-owning-memory,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-constant-array-index,-cppcoreguidelines-pro-bounds-pointer-arithmetic,-cppcoreguidelines-pro-type-const-cast,-cppcoreguidelines-pro-type-reinterpret-cast,-cppcoreguidelines-pro-type-static-cast-downcast,-cppcoreguidelines-pro-type-union-access,-cppcoreguidelines-pro-type-vararg,-cppcoreguidelines-special-member-functions,-fuchsia-*,-google-default-arguments,-google-readability-todo,-google-runtime-references,-llvm-header-guard,-llvm-include-order,-misc-string-integer-assignment,-misc-string-literal-with-embedded-nul,-modernize-use-auto,-modernize-use-trailing-return-type,-readability-braces-around-statements,-readability-container-size-empty,-readability-delete-null-pointer,-readability-else-after-return,-readability-implicit-bool-conversion,-readability-named-parameter,-readability-static-accessed-through-instance,-llvmlibc-*,-altera-*'
 WarningsAsErrors: ''
 HeaderFilterRegex: ''
 FormatStyle:     none

.devcontainer/devcontainer.json

@@ -0,0 +1,8 @@
+{
+	"name": "Verilator Build Environment",
+
+	"build": {
+        "dockerfile": "../ci/docker/buildenv/Dockerfile"
+    }
+
+}

.github/ISSUE_TEMPLATE/bug_report.md

@@ -11,8 +11,12 @@ Thanks for taking the time to report this.
 
 Can you attach an example that shows the issue?  (Must be openly licensed, ideally in test_regress format.)
 
+What 'verilator' command line do we use to run your example?
+
 What 'verilator --version' are you using?  Did you try it with the git master version?
 
 What OS and distribution are you using?
 
 May we assist you in trying to fix this in Verilator yourself?
+
+(Please avoid attaching screenshots that show text - you can convert images to text using e.g. https://ocr.space)

.github/ISSUE_TEMPLATE/feature.md

@@ -11,6 +11,8 @@ Thanks for taking the time to report this.
 
 What would you like added/supported?
 
+What 'verilator --version' are you using?  Did you try it with the git master version?
+
 Can you attach an example that runs on other simulators?  (Must be openly licensed, ideally in test_regress format.)
 
 May we assist you in trying to fix this in Verilator yourself?

.github/ISSUE_TEMPLATE/questions.md

@@ -8,3 +8,5 @@ assignees: ''
 ---
 
 How may we help - what is your question?
+
+(If reporting a bug or requesting a feature please use one of the other issue templates.)

.github/workflows/build.yml

@@ -17,12 +17,18 @@ env:
   CCACHE_COMPRESS: 1
   CCACHE_DIR: ${{ github.workspace }}/.ccache
   CCACHE_LIMIT_MULTIPLE: 0.95
+  INSTALL_DIR: ${{ github.workspace }}/install
+  RELOC_DIR: ${{ github.workspace }}/relloc
 
 defaults:
   run:
     shell: bash
     working-directory: repo
 
+concurrency:
+  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  cancel-in-progress: true
+
 jobs:
 
   build:
@@ -33,40 +39,29 @@ jobs:
         compiler:
           - { cc: clang, cxx: clang++ }
           - { cc: gcc,   cxx: g++     }
-        m32: [0, 1]
-        exclude:
-          # Build pull requests only with ubuntu-22.04 and without m32
-          - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-18.04' || 'do-not-exclude' }}
-          - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-20.04' || 'do-not-exclude' }}
-          - m32: ${{ github.event_name == 'pull_request' && 1              || 'do-not-exclude' }}
-          # Build -m32 only on ubuntu-22.04
-          - {os: ubuntu-18.04, m32: 1}
-          - {os: ubuntu-20.04, m32: 1}
         include:
           # Build GCC 10 on ubuntu-20.04
           - os: ubuntu-20.04
             compiler: { cc: gcc-10, cxx: g++-10 }
-            m32: 0
     runs-on: ${{ matrix.os }}
-    name: Build | ${{ matrix.os }} | ${{ matrix.compiler.cc }} ${{ matrix.m32 && '| -m32' || '' }}
+    name: Build | ${{ matrix.os }} | ${{ matrix.compiler.cc }}
     env:
       CI_BUILD_STAGE_NAME: build
       CI_RUNS_ON: ${{ matrix.os }}
-      CI_M32: ${{ matrix.m32 }}
       CC: ${{ matrix.compiler.cc }}
       CXX: ${{ matrix.compiler.cxx }}
-      CACHE_BASE_KEY: build-${{ matrix.os }}-${{ matrix.compiler.cc }}-m32=${{ matrix.m32 }}
+      CACHE_BASE_KEY: build-${{ matrix.os }}-${{ matrix.compiler.cc }}
-      CCACHE_MAXSIZE: 250M # Per build matrix entry (2000M in total)
+      CCACHE_MAXSIZE: 1000M # Per build matrix entry (* 5 = 5000M in total)
-      VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}${{ matrix.m32 && '-m32' || '' }}.tar.gz
+      VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}.tar.gz
     steps:
 
     - name: Checkout
-      uses: actions/checkout@v3
+      uses: actions/checkout@v4
       with:
         path: repo
 
     - name: Cache $CCACHE_DIR
-      uses: actions/cache@v3
+      uses: actions/cache@v4
       env:
         CACHE_KEY: ${{ env.CACHE_BASE_KEY }}-ccache
       with:
@@ -86,7 +81,7 @@ jobs:
       run: tar --posix -c -z -f ${{ env.VERILATOR_ARCHIVE }} repo
 
     - name: Upload tar archive
-      uses: actions/upload-artifact@v3
+      uses: actions/upload-artifact@v4
       with:
         path: ${{ github.workspace }}/${{ env.VERILATOR_ARCHIVE }}
         name: ${{ env.VERILATOR_ARCHIVE }}
@@ -101,38 +96,38 @@ jobs:
         compiler:
           - { cc: clang, cxx: clang++ }
           - { cc: gcc,   cxx: g++     }
-        m32: [0, 1]
+        reloc: [0]
-        suite: [dist-vlt-0, dist-vlt-1, dist-vlt-2, vltmt-0, vltmt-1]
+        suite: [dist-vlt-0, dist-vlt-1, dist-vlt-2, dist-vlt-3, vltmt-0, vltmt-1]
-        exclude:
-          # Build pull requests only with ubuntu-22.04 and without m32
-          - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-18.04' || 'do-not-exclude' }}
-          - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-20.04' || 'do-not-exclude' }}
-          - m32: ${{ github.event_name == 'pull_request' && 1              || 'do-not-exclude' }}
-          # Build -m32 only on ubuntu-22.04
-          - {os: ubuntu-18.04, m32: 1}
-          - {os: ubuntu-20.04, m32: 1}
         include:
-          # Test with GCC 10 on ubuntu-20.04 without m32
+          # Test with GCC 10 on ubuntu-20.04
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: dist-vlt-0}
+          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, suite: dist-vlt-0}
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: dist-vlt-1}
+          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, suite: dist-vlt-1}
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: dist-vlt-2}
+          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, suite: dist-vlt-2}
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: vltmt-0}
+          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, suite: dist-vlt-3}
-          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, m32: 0, suite: vltmt-1}
+          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, suite: vltmt-0}
+          - {os: ubuntu-20.04, compiler: { cc: gcc-10, cxx: g++-10 }, suite: vltmt-1}
+          # Test relocated installation - on most common platform only
+          - {os: ubuntu-22.04, compiler: { cc: gcc, cxx: g++ }, reloc: 1, suite: dist-vlt-0}
+          - {os: ubuntu-22.04, compiler: { cc: gcc, cxx: g++ }, reloc: 1, suite: dist-vlt-1}
+          - {os: ubuntu-22.04, compiler: { cc: gcc, cxx: g++ }, reloc: 1, suite: dist-vlt-2}
+          - {os: ubuntu-22.04, compiler: { cc: gcc, cxx: g++ }, reloc: 1, suite: dist-vlt-3}
+          - {os: ubuntu-22.04, compiler: { cc: gcc, cxx: g++ }, reloc: 1, suite: vltmt-0}
+          - {os: ubuntu-22.04, compiler: { cc: gcc, cxx: g++ }, reloc: 1, suite: vltmt-1}
     runs-on: ${{ matrix.os }}
-    name: Test | ${{ matrix.os }} | ${{ matrix.compiler.cc }} | ${{ matrix.suite }} ${{ matrix.m32 && '| -m32' || '' }}
+    name: Test | ${{ matrix.os }} | ${{ matrix.compiler.cc }} | ${{ matrix.reloc && 'reloc | ' || '' }} ${{ matrix.suite }}
     env:
       CI_BUILD_STAGE_NAME: test
       CI_RUNS_ON: ${{ matrix.os }}
-      CI_M32: ${{ matrix.m32 }}
+      CI_RELOC: ${{ matrix.reloc }}
       CC: ${{ matrix.compiler.cc }}
       CXX: ${{ matrix.compiler.cxx }}
-      CACHE_BASE_KEY: test-${{ matrix.os }}-${{ matrix.compiler.cc }}-m32=${{ matrix.m32 }}-${{ matrix.suite }}
+      CACHE_BASE_KEY: test-${{ matrix.os }}-${{ matrix.compiler.cc }}-${{ matrix.reloc }}-${{ matrix.suite }}
-      CCACHE_MAXSIZE: 64M # Per build matrix entry (2160M in total)
+      CCACHE_MAXSIZE: 100M # Per build per suite (* 5 * 5 = 2500M in total)
-      VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}${{ matrix.m32 && '-m32' || '' }}.tar.gz
+      VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}.tar.gz
     steps:
 
     - name: Download tar archive
-      uses: actions/download-artifact@v3
+      uses: actions/download-artifact@v4
       with:
         name: ${{ env.VERILATOR_ARCHIVE }}
         path: ${{ github.workspace }}
@@ -142,9 +137,9 @@ jobs:
       run: tar -x -z -f ${{ env.VERILATOR_ARCHIVE }}
 
     - name: Cache $CCACHE_DIR
-      uses: actions/cache@v3
+      uses: actions/cache@v4
       env:
-        CACHE_KEY: ${{ env.CACHE_BASE_KEY }}-ccache
+        CACHE_KEY: ${{ env.CACHE_BASE_KEY }}-ccache2
       with:
         path: ${{ env.CCACHE_DIR }}
         key: ${{ env.CACHE_KEY }}-${{ github.sha }}
@@ -158,3 +153,29 @@ jobs:
       env:
         TESTS: ${{ matrix.suite }}
       run: ./ci/ci-script.bash
+
+  lint-py:
+    runs-on: ubuntu-22.04
+    name: Lint Python
+    env:
+      CI_BUILD_STAGE_NAME: build
+      CI_RUNS_ON: ubuntu-22.04
+    steps:
+    - name: Checkout
+      uses: actions/checkout@v4
+      with:
+        path: repo
+
+    - name: Install packages for build
+      run: ./ci/ci-install.bash
+
+    # We use specific version numbers, otherwise a Python package
+    # update may add a warning and break our build
+    - name: Install packages for lint
+      run: sudo pip3 install pylint==3.0.2 ruff==0.1.3 clang sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff
+
+    - name: Configure
+      run: autoconf && ./configure --enable-longtests --enable-ccwarn
+
+    - name: Lint
+      run: make -k lint-py

.github/workflows/contributor.yml

@@ -13,5 +13,5 @@ jobs:
     name: "'docs/CONTRIBUTORS' was signed"
     runs-on: ubuntu-22.04
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
     - run: test_regress/t/t_dist_contributors.pl

.github/workflows/coverage.yml

@@ -11,7 +11,6 @@ on:
 env:
   CI_OS_NAME: linux
   CI_COMMIT: ${{ github.sha }}
-  CI_M32: 0
   COVERAGE: 1
   VERILATOR_ARCHIVE: verilator-coverage-${{ github.sha }}.tar.gz
 
@@ -31,7 +30,7 @@ jobs:
     steps:
 
     - name: Checkout
-      uses: actions/checkout@v3
+      uses: actions/checkout@v4
       with:
         path: repo
 
@@ -46,7 +45,7 @@ jobs:
       run: tar --posix -c -z -f ${{ env.VERILATOR_ARCHIVE }} repo
 
     - name: Upload tar archive
-      uses: actions/upload-artifact@v3
+      uses: actions/upload-artifact@v4
       with:
         path: ${{ github.workspace }}/${{ env.VERILATOR_ARCHIVE }}
         name: ${{ env.VERILATOR_ARCHIVE }}
@@ -81,7 +80,7 @@ jobs:
     steps:
 
     - name: Download tar archive
-      uses: actions/download-artifact@v3
+      uses: actions/download-artifact@v4
       with:
         name: ${{ env.VERILATOR_ARCHIVE }}
         path: ${{ github.workspace }}
@@ -97,3 +96,10 @@ jobs:
       env:
         TESTS: coverage-${{ matrix.test }}${{ matrix.num }}
       run: ./ci/ci-script.bash
+
+    - name: Upload coverage data to Codecov
+      env:
+        CODECOV_TOKEN: ${{ secrets.CODECOV_TOKEN }}
+      run: |
+        find . -name '*.gcno' -exec rm {} \;
+        ./ci/codecov -v upload-process -Z --sha ${{ github.sha }} -f nodist/obj_dir/coverage/app_total.info

.github/workflows/docker.yml

@@ -0,0 +1,85 @@
+# Build and push verilator docker image when tags are pushed to the repository.
+# The following variable(s) must be configured in the github repository:
+# DOCKER_HUB_NAMESPACE: docker hub namespace.
+# The following secrets must be configured in the github repository:
+# DOCKER_HUB_USER: user name for logging into docker hub
+# DOCKER_HUB_ACCESS_TOKEN: docker hub access token.
+name: Build Verilator Container
+
+on:
+  push:
+    tags: [ 'v*' ]
+  workflow_dispatch:
+    inputs:
+      manual_tag:
+        description: 'Git tag to use for image build'
+        required: true
+        type: string
+      add_latest_tag:
+        description: 'Tag workflow_dispatch docker image as "latest"'
+        required: true
+        type: boolean
+        default: false
+
+jobs:
+
+  build:
+
+    runs-on: ubuntu-22.04
+
+    strategy:
+      matrix:
+        contexts:
+          - "ci/docker/run:verilator"
+          # - "ci/docker/buildenv:verilator-buildenv"
+
+    steps:
+    - name: Checkout
+      uses: actions/checkout@v4
+
+    - name: Extract context variables
+      run: |
+        echo "${{ matrix.contexts }}" | sed -r 's/(.*):.*/build_context=\1/' >> "$GITHUB_ENV"
+        echo "${{ matrix.contexts }}" | sed -r 's/.*:(.*)/image_name=\1/' >> "$GITHUB_ENV"
+        echo "git_tag=${GITHUB_REF#refs/*/}" >> "$GITHUB_ENV"
+
+    - name: Use manual tag
+      if: ${{ inputs.manual_tag }}
+      run: |
+        echo "git_tag=${{ inputs.manual_tag }}" >> "$GITHUB_ENV"
+
+    - name: Docker meta
+      id: docker_meta
+      uses: docker/metadata-action@v4
+      with:
+        images: |
+          ${{ vars.DOCKER_HUB_NAMESPACE }}/${{ env.image_name }}
+        tags: |
+          type=match,pattern=(v.*),group=1,enable=${{ startsWith(github.ref, 'refs/tags/v') }}
+          type=raw,value=${{ inputs.manual_tag }},enable=${{ inputs.manual_tag != '' }}
+          type=raw,value=latest,enable=${{ inputs.add_latest_tag == true }}
+
+    - name: Set up QEMU
+      uses: docker/setup-qemu-action@v2
+
+    - name: Set up Docker Buildx
+      uses: docker/setup-buildx-action@v2
+      with:
+          buildkitd-flags: --debug
+
+    - name: Login to Docker Hub
+      uses: docker/login-action@v2
+      with:
+        username: ${{ secrets.DOCKER_HUB_USER }}
+        password: ${{ secrets.DOCKER_HUB_ACCESS_TOKEN }}
+
+    - name: Build and Push to Docker
+      uses: docker/build-push-action@v4
+      if: startsWith(github.ref, 'refs/tags/v')
+      with:
+        context: ${{ env.build_context }}
+        build-args: SOURCE_COMMIT=${{ env.git_tag }}
+        platforms: linux/arm64,linux/amd64
+        push: ${{ !env.ACT && startsWith(github.ref, 'refs/tags/v') }}
+        tags: ${{ steps.docker_meta.outputs.tags }}
+        labels: ${{ steps.docker_meta.outputs.labels }}

.github/workflows/format.yml

@@ -16,10 +16,9 @@ jobs:
       CI_OS_NAME: linux
       CI_RUNS_ON: ubuntu-22.04
       CI_COMMIT: ${{ github.sha }}
-      CI_M32: 0
     steps:
       - name: Checkout
-        uses: actions/checkout@v3
+        uses: actions/checkout@v4
         with:
           token: ${{ secrets.GITHUB_TOKEN }}
       - name: Install packages for build

.github/workflows/msbuild.yml

@@ -22,17 +22,21 @@ defaults:
   run:
     working-directory: repo
 
+concurrency:
+  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  cancel-in-progress: true
+
 jobs:
 
    windows:
     name: run on windows
     runs-on: windows-latest
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
       with:
         path: repo
     - name: Cache $CCACHE_DIR
-      uses: actions/cache@v3
+      uses: actions/cache@v4
       with:
         path: ${{ env.CCACHE_DIR }}
         key: msbuild-msvc-cmake
@@ -45,7 +49,7 @@ jobs:
     - name: Zip up repository
       run: Compress-Archive -LiteralPath install -DestinationPath verilator.zip
     - name: Upload zip archive
-      uses: actions/upload-artifact@v3
+      uses: actions/upload-artifact@v4
       with:
         path: ${{ github.workspace }}/repo/verilator.zip
         name: verilator-win.zip

.gitignore

@@ -41,3 +41,11 @@ verilator-config-version.cmake
 **/_build/*
 **/obj_dir/*
 /.vscode/
+/.idea/
+/cmake-build-*/
+/test_regress/snapshot/
+xmverilog.*
+xrun.history
+
+# Normal CMake build directory
+/build

CITATION.cff

@@ -0,0 +1,27 @@
+# See https://citation-file-format.github.io/
+cff-version: 1.2.0
+title: Verilator
+message: >-
+  If you use this software, please cite it using the
+  metadata from this file.
+type: software
+authors:
+  - given-names: Wilson
+    family-names: Snyder
+    email: [email protected]
+    affiliation: Veripool
+  - given-names: Paul
+    family-names: Wasson
+  - given-names: Duane
+    family-names: Galbi
+  - name: 'et al'
+repository-code: 'https://github.com/verilator/verilator'
+url: 'https://verilator.org'
+abstract: >-
+  The Verilator package converts Verilog and SystemVerilog hardware
+  description language (HDL) designs into a fast C++ or SystemC model
+  that, after compiling, can be executed.  Verilator is not a
+  traditional simulator but a compiler.
+license:
+  - LGPL-3.0-only
+  - Artistic-2.0

CMakeLists.txt

@@ -4,7 +4,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2024 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -15,7 +15,7 @@
 cmake_minimum_required(VERSION 3.15)
 cmake_policy(SET CMP0091 NEW) # Use MSVC_RUNTIME_LIBRARY to select the runtime
 project(Verilator
-    VERSION 5.010
+    VERSION 5.028
     HOMEPAGE_URL https://verilator.org
     LANGUAGES CXX
 )
@@ -24,18 +24,19 @@ option(DEBUG_AND_RELEASE_AND_COVERAGE
     "Builds both the debug and release binaries, overriding CMAKE_BUILD_TYPE. Not supported under MSBuild.")
 
 find_package(Python3 COMPONENTS Interpreter)
-set(PYTHON3 Python3::Interpreter)
+set(PYTHON3 ${Python3_EXECUTABLE})
 set(CMAKE_INSTALL_DATADIR ${CMAKE_INSTALL_PREFIX})
 include(GNUInstallDirs)
 include(CMakePackageConfigHelpers)
 include(CheckStructHasMember)
 include(ExternalProject)
+include(FindThreads)
 
 if (NOT WIN32)
     message(WARNING "CMake support on Linux/OSX is experimental.")
 endif()
 
-if (MSVC)
+if (WIN32)
     if (DEFINED ENV{WIN_FLEX_BISON})
         set(WIN_FLEX_BISON "$ENV{WIN_FLEX_BISON}")
     endif()
@@ -48,6 +49,27 @@ if (MSVC)
     set(CMAKE_CXX_STANDARD 20)
 endif()
 
+set(OBJCACHE "" CACHE STRING "Path for ccache, auto-detected if empty")
+option(OBJCACHE_ENABLED "Compile Verilator with ccache" ON)
+
+if (OBJCACHE_ENABLED)
+    if (OBJCACHE STREQUAL "")
+        find_program(OBJCACHE_PATH ccache)
+        if (OBJCACHE_PATH STREQUAL "OBJCACHE_PATH-NOTFOUND")
+            set(OBJCACHE_PATH "")
+        endif()
+    else()
+        set(OBJCACHE_PATH "${OBJCACHE}")
+    endif()
+    if (NOT OBJCACHE_PATH STREQUAL "")
+        execute_process(COMMAND "${OBJCACHE_PATH}" --version
+                OUTPUT_VARIABLE objcache_version)
+        string(REGEX MATCH "[^\n\r]+" objcache_version "${objcache_version}")
+        message(STATUS "Found ccache: ${OBJCACHE_PATH} (\"${objcache_version}\")")
+        set(CMAKE_CXX_COMPILER_LAUNCHER "${OBJCACHE_PATH}")
+    endif()
+endif()
+
 find_package(BISON)
 find_package(FLEX)
 
@@ -74,10 +96,14 @@ endif()
 
 set(PACKAGE_NAME ${PROJECT_NAME})
 set(PACKAGE_VERSION ${PROJECT_VERSION})
+set(CXX ${CMAKE_CXX_COMPILER})
+set(AR ${CMAKE_AR})
 
 configure_file(include/verilated_config.h.in include/verilated_config.h @ONLY)
+configure_file(include/verilated.mk.in include/verilated.mk @ONLY)
 
 install(FILES ${CMAKE_CURRENT_BINARY_DIR}/include/verilated_config.h DESTINATION ${CMAKE_INSTALL_PREFIX}/include)
+install(FILES ${CMAKE_CURRENT_BINARY_DIR}/include/verilated.mk DESTINATION ${CMAKE_INSTALL_PREFIX}/include)
 
 configure_package_config_file(verilator-config.cmake.in verilator-config.cmake
     INSTALL_DESTINATION ${CMAKE_INSTALL_PREFIX}
@@ -97,6 +123,7 @@ foreach (program
     verilator_ccache_report
     verilator_difftree
     verilator_profcfunc
+    verilator_includer
 )
     install(PROGRAMS bin/${program} TYPE BIN)
 endforeach()
@@ -109,7 +136,6 @@ install(DIRECTORY examples TYPE DATA FILES_MATCHING
 
 install(DIRECTORY include TYPE DATA FILES_MATCHING
     PATTERN "include/verilated_config.h"
-    PATTERN "include/verilated.mk"
     PATTERN "include/*.[chv]"
     PATTERN "include/*.cpp"
     PATTERN "include/*.sv"

Changes

@@ -8,6 +8,573 @@ The changes in each Verilator version are described below.  The
 contributors that suggested a given feature are shown in []. Thanks!
 
 
+Verilator 5.028 2024-08-21
+==========================
+
+**Minor:**
+
+* Support state-dependent constraints (#5217). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support cross-module clocking variable access (#5184). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support inline constraints for class randomization methods (#5234). [Krzysztof Boroński]
+* Support clocking blocks in virtual interfaces (#5235). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support `$assertcontrol` assertion_type (#5236). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Support conditional constraints (#5245). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support`--compiler-include` headers in user-supplied cpp files  (#5271). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Support `rand_mode` (#5273). [Krzysztof Bieganski, Antmicro Ltd.]
+* Support `this.randomize with` (#5282). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support foreach constraints (#5302). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support `parameter type` in hierarchical blocks (#5309) (#5333). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Support assertcontrol directive type  (#5310). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Support inline random variable control (#5317). [Krzysztof Bieganski, Antmicro Ltd.]
+* Support streaming operator on arrays and wide data (#5326). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support streams to/from arrays of wide data (#5334). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support `constraint_mode` (#5338). [Krzysztof Bieganski, Antmicro Ltd.]
+* Support constraining AstSel (#5344). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support default value on module input (#5358) (#5373). [Drew Ranck]
+* Add `--compiler-include` for additional C++ includes (#5139) (#5202). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Add `--emit-accessors` (#5182) (#5227). [Ryan Ziegler]
+* Add suggestions on misspelled PLI functions.
+* Add warning on dist in constraints (#5264). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Add more `rand_mode` unsupported errors (#5329). [Krzysztof Bieganski, Antmicro Ltd.]
+* Add parsing but otherwise ignore std::randomize (#5354). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Add Verilated cc define when `--timing` used (#5383). [Kaleb Barrett]
+* Improve emitted code to use a reference for VlSelf (#5254). [Yangyu Chen]
+* Fix monitor block sensitivity items (#4400) (#5294). [Udaya Raj Subedi]
+* Fix fusing macro arguments to not ignore whitespace (#5061). [Tudor Timi]
+* Fix optimized-out sensitivity trees with `--timing` (#5080) (#5349). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix classes/modules of case-similar names (#5109). [Arkadiusz Kozdra]
+* Fix mis-removing $value$plusargs calls (#5127) (#5137). [Seth Pellegrino]
+* Fix incorrect result of width mismatch (#5186) (#5189). [Yutetsu TAKATSUKASA]
+* Fix compiler coroutine check (#5190) (#5300). [Ricardo Barbedo]
+* Fix shortened module names when searching for files (#5196) (#5246). [Tim Hutt]
+* Fix `--x-assign` to be independent from `+verilator+rand+reset` (#5214). [Andrew Nolte]
+* Fix splitting if statements with impure conditions (#5219). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix unknown conversion on queues (#5220). [Alex Solomatnikov]
+* Fix top-level unpacked structure resets (#5221).
+* Fix concurrency for mailbox and semaphores (#5222). [Liam Braun]
+* Fix forks capturing non-input ports in tasks (#5237) (#5343). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix toggle coverage aggregation on same line (#5248). [Krzysztof Obłonczek]
+* Fix error on empty generate with -O0 (#5250).
+* Fix unconstrained randomization of unpacked structs (#5252). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix inlining of variables driven from forced vars (#5259). [Geza Lore]
+* Fix tracing with `--main-top-name -` (#5261). [Ethan Sifferman]
+* Fix randomization when used with inheritance (#5268). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix inline constraints creating class random generator (#5280). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix WIDTHEXPAND on left shift of intuitive amount (#5284). [Greg Taylor]
+* Fix elaborating foreach loops (#5285). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Fix initializing static array in dynamic arrays and queues (#5287). [Baruch Sterin]
+* Fix static variable initializers in procedures (#5296). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix randomizing current object with `rand` class instance member (#5292). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix handling of rand fields not referenced in constraints (#5305). [Ryszard Rozak, Antmicro Ltd.]
+* Fix Python3 path discovery in make flows to avoid mixing system and user python interpreters (#5307) [Markus Krause]
+* Fix make flows to pass PYTHON3 (like PERL) (#5307) (#5308). [Markus Krause]
+* Fix assert on wide expression (#5319) (#5324). [Varun Koyyalagunta]
+* Fix output clock variable overwriting signal (#5320)  (#5347). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix stringify in nested preprocessor macros (#5323). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix $sformat with array arguments (#5330). [Abe Jordan]
+* Fix -Wunused-but-set-variable clang warning (#5331). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix purity of functions with AstJumpBlock or AstStmtExpr (#5332). [Ryszard Rozak, Antmicro Ltd.]
+* Fix compilation error on unreachable disable fork / wait fork (#5339). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Fix missing type coercion in 'inside {array}' (#5340). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Fix +: and -: unpacked array slicing when array has nonzero low index (#5345) (#5387). [James Bailey]
+* Fix tracing_{on,off} in the presence of non-inlined modules (#5346). [Geza Lore]
+* Fix NBAs in suspendables (#5348). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix lint_off on Errors (#5351) (#5363). [Ethan Sifferman]
+* Fix cache config file resolution performance (#5369). [Geza Lore]
+* Fix capturing fields from superclass in `randomize() with` (#5389). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix virtual interface null checks (#5391). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix ==? and !=? with X values.
+* Fix CPU time being zero.
+* Fix inline function ref port persistence.
+
+
+Verilator 5.026 2024-06-15
+==========================
+
+**Major:**
+
+* Support constrained randomization with external solvers (#4947). [Arkadiusz Kozdra, Antmicro Ltd.]
+
+**Minor:**
+
+* Support `$psprintf` system function (#4314) (#5169). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support 2D dynamic array initialization (#4700) (#5122). [Valentin Atepalikhin]
+* Support __en/__out signals on top level inout ports (#4812) (#4856). [Paul Wright]
+* Support empty queue as dynarray default value (#5055). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support vpiInertialDelay (#5087). [Todd Strader]
+* Support NBAs to arrays inside loops (#5092). [Geza Lore]
+* Support parsing and otherwise ignoring inline constraints (#5126). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support `inout` clocking items (#5160). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Support StructSel in unpacked array assignments (#5176). [Geza Lore]
+* Add error on zero width select (#5028).
+* Add CITATION.cff (#5057) (#5058). [Gijs Burghoorn]
+* Add VPI eval needed tracking (#5065). [Todd Strader]
+* Add `--localize-max-size` option and optimization (#5072).
+* Add parameterless assert control system tasks (#5010). [Bartłomiej Chmiel]
+* Add traceCapable indication to model header (#5053). [Vito Gamberini]
+* Add increasing of stack size when possible (#5071) (#5104). [Yinan Xu]
+* Add assertion on reusing VerilatedContext (#5167).
+* Add `--pins-sc-uint-bool` to force SystemC uint type (#5192). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Improve DFG regularization in cyclic graphs (#5142). [Geza Lore]
+* Improve VerilatedVpiPutHolder storage requirements (#5144). [Kaleb Barrett]
+* Fix coroutines without awaits to have a co_return (#4208) (#5175). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Fix missing flex include path variable (#4970) (#4971). [Christopher Taylor]
+* Fix missing parameters with comma to be errors (#4979) (#5012). [Paul Swirhun]
+* Fix 'experimental/coroutine' file not found on MacOS (#5030) (#5031) (#5151). [Paul Bowen-Huggett]
+* Fix bound queue printing (#5032). [Aleksander Kiryk, Antmicro Ltd.]
+* Fix consecutive zero-delays (#5038). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix attempted to destroy locked thread pool error (#5040). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix `$system` with string argument (#5042).
+* Fix width extension on delays (#5043).
+* Fix `$typename` on array.min and others (#5049). [Gökçe Aydos]
+* Fix `make $(info)` which cannot be silenced (#5059). [Gökçe Aydos]
+* Fix CMake builds to export VERILATOR_ROOT (#5063). [Michael Bikovitsky]
+* Fix false ASSIGNIN on functions with explicit port map (#5069).
+* Fix 4-state value support for $readmem (#5070) (#5078). [Ethan Sifferman]
+* Fix DFG assertion with SystemC (#5076). [Geza Lore]
+* Fix `$typename` string to be more standard (#5082) (#5083). [Andrew Nolte]
+* Fix missed optimization in V3Delayed (#5089). [Geza Lore]
+* Fix macro expansion in strings per 1800-2023 (#5094). [Geza Lore]
+* Fix width extension of unpacked array select (#5095). [Varun Koyyalagunta]
+* Fix MacOS missing <type_traits> header (#5096) (#5097). [Vito Gamberini]
+* Fix assertion failure in V3Gate (#5101). [Yutetsu TAKATSUKASA]
+* Fix aliases for forced port signals (#5105). [Geza Lore]
+* Fix tracing interface functions (#5108). [Alex Solomatnikov]
+* Fix method calls parsing in constraints (#5110). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Fix vpiInertialDelay for memories (#5113). [Todd Strader]
+* Fix hierarchical compilation with nested -F (#5114) (#5124). [Alex Solomatnikov]
+* Fix references to ports in forks (#5123). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix output C++ type error on change detect of I/O arrays (#5125) (#5131). [Pawel Jewstafjew]
+* Fix x-valued parameters with `--x-assign unique` (#5129). [Ethan Sifferman]
+* Fix overflow of string on VPI reads (#5145) (#5146). [Kaleb Barrett]
+* Fix VerilatedVpiPutHolder class (#5156). [Kaleb Barrett]
+* Fix extending out-of-range select (#5159) (#5164). [Geza Lore]
+* Fix radix in width warnings (#5166). [Geza Lore]
+* Fix SystemC BITS_PER_DIGIT in VL_ASSIGN_SBW (#5170). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix non-constant replication in concats (#5171). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Fix table optimization when applied on real data type (#5172) (#5173). [Arthur Rosa]
+* Fix signed types emitted in hierarchical Verilation (#5178). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix DPI import of null C-string (#5179).
+* Fix CMake installation missing verilated.mk (#5187) (#5188). [Philip Axer]
+* Fix linking with pthreads on CMake (#5194). [Tim Hutt]
+* Fix clang-17 coroutines configuration with -std=gnu++20 (#5200). [Gus Smith]
+
+
+Verilator 5.024 2024-04-05
+==========================
+
+**Major:**
+
+* Add printing summary reports, use `--quiet` or `+verilator+quiet` to suppress (#4909).
+* Support 1800-2023 keywords, and parsing with UNDEFINED warnings.
+* Support 1800-2023 preprocessor ifdef expressions.
+
+**Minor:**
+
+* Change 1800-2023 to be default language version.
+* Add DFG 'regularize' pass, and improve variable removal (#4937). [Geza Lore]
+* Add error when pass net to function argument (#4132) (#4966). [Fuad Ismail]
+* Add `UNUSEDLOOP` when unused loop is removed (#4926). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Add custom version for verilator --version packaging (#4954). [Nolan Poe]
+* Add error on missing pure virtual functions (#4961).
+* Add error on calling static function without object (#4962).
+* Add JSON AST dumps (#5020). [Szymon Gizler]
+* Support 1800-2023 DPI headers, svGetTime/svgGetTimeUnit/svGetTimePrecision methods.
+* Support 1800-2023 class and function :initial, :extends, :final virtual overrides (#5025).
+* Support public packed struct / union (#860) (#4878). [Kefa Chen]
+* Support stream operation on unpacked array (#4714) (#5006). [Fuad Ismail]
+* Support implicitly-typed variable definitions in for-loop initializers (#4945) (#4986). [Kevin Nygaard]
+* Support inside range with implicit type conversion (#5026). [Arkadiusz Kozdra, Antmicro Ltd.]
+* Improve installation to be relocatable (#4927). [Geza Lore]
+* Improve internal ordering code (#4957) (#4990) (#4994) et al. [Geza Lore]
+* Fix generate blocks in vpi_iterate (#3609) (#4913). [Andrew Nolte]
+* Fix __Vlip undefined error in --freloop (#4824). [Justin Yao Du]
+* Fix missing VPI scopes (#4918). [Andrew Nolte]
+* Fix invalid cast on string structure creation (#4921).
+* Fix try-lock spuriously fails (#4931) (#4938). [Kamil Rakoczy]
+* Fix V3Unknown unpacked struct x-assign (#4934). [Yan Xu]
+* Fix DFG removing forceable signals (#4942). [Geza Lore]
+* Fix null characters in shortened identifiers (#4946). [Abdul Hameed]
+* Fix assignment of null into struct member (#4952).
+* Fix VPI missing scopes 2 (#4965). [Andrew Nolte]
+* Fix object assignment from conditionals (#4968).
+* Fix GCC14 warnings on template specialization syntax (#4974) (#4975). [Nolan Poe]
+* Fix unpacked structure upper bit cleaning (#4978).
+* Fix tests on MacOS (#4984) (#4985). [Kevin Nygaard]
+* Fix `--prof-exec` predicted time values (#4988). [Geza Lore]
+* Fix class type as an associative array parameter (#4997).
+* Fix inout ports of unpacked struct type (#5000). [Ryszard Rozak, Antmicro Ltd.]
+* Fix `unique {}` constraints missing semicolon (#5001).
+* Fix preprocessor to respect strings in joins (#5007).
+* Fix tracing class parameters (#5014).
+* Fix memory leaks (#5016). [Geza Lore]
+* Fix $readmem with missing newline (#5019). [Josse Van Delm]
+* Fix internal error on missing pattern key (#5023).
+* Fix tracing replicated hierarchical models (#5027).
+
+
+Verilator 5.022 2024-02-24
+==========================
+
+**Minor:**
+
+* Add predicted stack overflow warning (#4799).
+* Add `+verilator+coverage+file` runtime option.
+* Add `--assert-case` option (#4919). [Yutetsu TAKATSUKASA]
+* Add `--decorations node` for inserting debug comments into emitted code.
+* Add `--json-only` and related JSON dumping (#4715) (#4831). [Szymon Gizler, Antmicro Ltd.]
+* Add `--[no]-stop-fail` option for continuing after assertions (#4904). [Yutetsu TAKATSUKASA]
+* Add `--runtime-debug` for Verilated executable runtime debugging.
+* Add `--valgrind` switch (#4828). [Szymon Gizler]
+* Add `unroll_disable` and `unroll_full` loop control metacomments (#3260). [Jiaxun Yang]
+* Remove deprecated 32-bit pointer mode (`gcc -m32`).
+* Deprecate --xml-only and XML dumping (#4715) (#4831).
+* Change zero replication width error to ZEROREPL warning (#4753) (#4762). [Pengcheng Xu]
+* Improve message for priority case assertion failure (#4905). [Yutetsu TAKATSUKASA]
+* Support dumping coverage with `--main`.
+* Support dumping DFG patterns with `--stats` (#4889). [Geza Lore]
+* Support `vpiConstType` in `vpi_get_str()` (#4797). [Marlon James]
+* Support SystemC 3.0.0 public review version (#4805) (#4807). [Anthony Donlon]
+* Support parsing anonymous primitive instantiations (#4809). [Anthony Donlon]
+* Fix to not emit already waived warnings in waiver output (#4574) (#4818). [Jonathan Schröter]
+* Fix `this` in member initialization (#4710). [eliasphanna]
+* Fix localparam elaboration (#3858) (#4794). [Andrew Nolte]
+* Fix lint_off disables on preprocessor warnings (#4703). [Srinivasan Venkataramanan]
+* Fix $time not rounding up (#4790) (#4792). [Paul Wright]
+* Fix `vpi_get()` and `vpi_get64()` to return vpiUndefined on errors (#4795). [Marlon James]
+* Fix VPI parameter iteration (#4798). [Marlon James]
+* Fix delays using wrong timeunit when modules inlined (#4806). [Paul Wright]
+* Fix warnings in verilated_sc_trace.h for Clang. (#4807) (#4827). [Anthony Donlon]
+* Fix null pointer dereference (#4810) (#4825). [Adrian Sampson]
+* Fix compilation error on multi-inherited interface class usage (#4819).
+* Fix maybe-uninitialized compiler warning (#4820) (#4822). [Larry Doolittle]
+* Fix mis-splitting of dump control functions (#4821). [Fan Shupei]
+* Fix wrong utimes() parameter (#4829). [Szymon Gizler]
+* Fix incorrect bit-op-tree NOT optimization (#4832) (#4847). [Yutetsu TAKATSUKASA]
+* Fix width calculation in replaceShiftOp (#4837) (#4841) (#4849). [Yutetsu TAKATSUKASA]
+* Fix unsafe write in wide array insertion (#4850) (#4855). [Paul Swirhun]
+* Fix NOT when checking EQ/NEQ under AND/OR tree (#4857) (#4863). [Yutetsu TAKATSUKASA]
+* Fix tracing chandles (#4860). [Nathan Graybeal]
+* Fix $fwrite of null (#4862). [Jose Tejada]
+* Fix -fno-const-bit-op-tree wrong runtime result (#4864) (#4867). [Yutetsu TAKATSUKASA]
+* Fix SystemC biguint sign desynchronization (#4870). [Bartłomiej Chmiel]
+* Fix incorrect temporary insertion in loop conditions with statements (#4873). [Geza Lore]
+* Fix timing with expr on assign LHS (#4880). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix assertion for unique case (#4892). [Yutetsu TAKATSUKASA]
+* Fix GCC tautological-compare warnings.
+* Fix compile error on structs with queues (and ignore toggle coverage on queues).
+* Fix toggle coverage error on multi-edge driven signals.
+* Fix whitespace in `pragma protect version` (#4902) (#4914). [Paul Swirhun]
+* Fix incorrect code generation for change expression on typedefed unpacked array (#4915). [Geza Lore]
+* Fix inconsistent driver resolution with typedefs (#4917). [Geza Lore]
+
+
+Verilator 5.020 2024-01-01
+==========================
+
+**Major:**
+
+* Support compilation with precompiled headers with Make, and GCC or CLang.
+* Change include to systemc instead of systemc.h (#4622) (#4623). [Chih-Mao Chen]
+  This may require that SystemC programs add 'using namespace sc_core', 'using namespace sc_dt'.
+
+**Minor:**
+
+* Add devcontainer support (#4748). [Stefan Wallentowitz]
+* Support `iff` in sensitivity list (#1482) (#4626). [Krzysztof Bieganski, Antmicro Ltd.]
+* Support parameterized virtual interfaces (#4047) (#4743). [Ryszard Rozak, Antmicro Ltd.]
+* Support --timing triggers for virtual interfaces (#4673). [Krzysztof Bieganski, Antmicro Ltd.]
+* Support ccache when compiling Verilator with CMake (#4678). [Anthony Donlon]
+* Support passing constraints to --xml-only output (still otherwise unsupported) (#4683). [Shahid Ikram]
+* Support node memory usage information in --stats (#4684). [Geza Lore]
+* Support vpiConstType in vpi_get() (#4761). [Todd Strader]
+* Support vpi_iterate on packages with vpiInstance (#4726). [Todd Strader]
+* Support multiple parameters in virtual interfaces (#4745). [Ryszard Rozak, Antmicro Ltd.]
+* Support user C/C++ code in final archive, and make a lib{model}.a (#4749) (#4754). [Fan Shupei]
+* Support inside operator on unpacked arrays and queues (#4751). [Ryszard Rozak, Antmicro Ltd.]
+* Support VPI parameter iteration (#4765). [Todd Strader]
+* Support packages in vpi_handle_by_name() (#4768). [Todd Strader]
+* Support invoking interface methods on virtual interface variables (#4774) (#4775). [Jordan McConnon]
+* Remove deprecated options (#4663). [Geza Lore]
+* Remove older compiler support; require C++14 or newer (#4784) (#4786).
+* Optimize timing-delayed queue (#4584). [qrqiuren]
+* Optimize substitute optimization memory usage (#4687). [Geza Lore]
+* Optimize wide primitive operations with -Oz (#4733). [Geza Lore]
+* Optimize V3Premit performance etc. (#4736). [Geza Lore]
+* Fix VPI TOP level variable iteration (#3919) (#4618). [Marlon James]
+* Fix display with no % printing assoc array (#4376). [Alex Solomatnikov]
+* Fix scheduling of external force signals (#4577) (#4668). [Geza Lore]
+* Fix a memory leak in V3Fork (#4628). [Krzysztof Boroński]
+* Fix linking parameterized hierarchical blocks and recursive hierarchical blocks (#4654). [Anthony Donlon]
+* Fix identifiers that end with '_' on Windows (#4655). [Anthony Donlon]
+* Fix 'for' loop with outside variable reference (#4660). [David Harris]
+* Fix tracing FST enums (#4661) (#4756). [Todd Strader]
+* Fix interface parameters used in loop generate constructs (#4664) (#4665). [Anthony Donlon]
+* Fix C++20 compilation errors (#4670).
+* Fix deadlocks in error handler (#4672). [Mariusz Glebocki, Antmicro Ltd.]
+* Fix MingW compilation (#4675). [David Ledger]
+* Fix trace when using SystemC with certain configurations (#4676). [Anthony Donlon]
+* Fix range access to classes depending on parameter resolution (#4681). [Krzysztof Boroński]
+* Fix select into constant And/Or/Xor pattern (#4689). [Geza Lore]
+* Fix access type of function arguments (#4692) (#4694). [Ryszard Rozak, Antmicro Ltd.]
+* Fix dynamic NBAs with automatic vars (#4696). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix # 0 delays for process resumption, etc. (#4697). [Krzysztof Boroński]
+* Fix conflicted namespace for coroutines (#4701) (#4707). [Jinyan Xu]
+* Fix compilers seeing empty input due to file system races (#4708). [Flavien Solt]
+* Fix shift of > 32-bit number (#4719). [Flavien Solt]
+* Fix Windows include gates in filesystem Flush implementation. (#4720). [William D. Jones]
+* Fix power operator with wide numbers and constants (#4721) (#4763). [Flavien Solt]
+* Fix parameter passing to ports (#4723). [Ryszard Rozak, Antmicro Ltd.]
+* Fix block names of nested do..while loops (#4728). [Ryszard Rozak, Antmicro Ltd.]
+* Fix class name in error on 'new' on virtual class (#4739). [Ryszard Rozak, Antmicro Ltd.]
+* Fix typedefs pointing to parameterized classes (#4747). [Ryszard Rozak, Antmicro Ltd.]
+* Fix $finish twice to no longer exit (#4757). [Tim Hutt]
+* Fix dynamic NBA conditions (#4773). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix `V3Fork` stage to run only if `--timing` is set (#4778). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix max multiply width and add runtime assertions if too small. (#4781)
+* Fix select value too wide (#5148) (#5153). [Dercury]
+
+
+Verilator 5.018 2023-10-30
+==========================
+
+**Major:**
+
+* Support compilation with precompiled headers with Make and GCC or CLang.
+* Change include of systemc instead of systemc.h (#4622) (#4623). [Chih-Mao Chen]
+  This may require that SystemC programs add 'using namespace sc_core', 'using namespace sc_dt'.
+
+**Minor:**
+
+* Add SIDEEFFECT warning on mishandled side effect cases.
+* Add trace() API even when Verilated without --trace (#4462). [phelter]
+* Add warning on interface instantiation without parens (#4094). [Gökçe Aydos]
+* Add sv_vpi_user.h from IEEE 1800-2017 Annex M (#4606). [Marlon James]
+* Support 'disable fork' (#4125) (#4569). [Aleksander Kiryk, Antmicro Ltd.]
+* Support 'wait fork' (#4586). [Aleksander Kiryk, Antmicro Ltd.]
+* Support 'randc' (#4349).
+* Support assigning events (#4403). [Krzysztof Boroński]
+* Support resizing function call inout arguments (#4467).
+* Support NBAs in non-inlined functions/tasks (#4496) (#4572). [Krzysztof Bieganski, Antmicro Ltd.]
+* Support converting parameters inside modules to localparams (#4511). [Anthony Donlon]
+* Support concatenation of unpacked arrays (#4558). [Yutetsu TAKATSUKASA]
+* Support Clang 16 (#4592). [Mariusz Glebocki]
+* Support VPI variables of real and string data types (#4594). [Marlon James]
+* Support making VL_LOCK_SPINS configurable (#4599). [Geza Lore]
+* Change code --stats output (#4597). [Geza Lore]
+* Change --prof-exec infrastructure and report (#4602). [Geza Lore]
+* Change lint_off to not propagate upwards to files including where the lint_off is.
+* Optimize empty expression statements (#4544).
+* Optimize trace internals (#4610) (#4612). [Geza Lore]
+* Optimize internal performance issues (#4638). [Geza Lore]
+* Fix conversion of impure logical expressions to bit expressions (#487 partial) (#4437). [Ryszard Rozak, Antmicro Ltd.]
+* Fix enum functions in localparams (#3999). [Andrew Nolte]
+* Fix passing arguments by reference (#3385 partial) (#4489). [Ryszard Rozak, Antmicro Ltd.]
+* Fix multithreading handling to separate by code units that use/never use it (#4228). [Mariusz Glebocki, Antmicro Ltd.]
+* Fix usage of annotation options (#4486) (#4504). [Michal Czyz]
+* Fix detecting local vars in nested forks (#4493) (#4506). [Kamil Rakoczy]
+* Fix handling input file path separator (#4515) (#4516). [Anthony Donlon]
+* Fix mis-support for parameterized UDPs (#4518). [Anthony Donlon]
+* Fix constant conversion of $realtobits, $bitstoreal (#4522).  [Andrew Nolte]
+* Fix conversion of integers in $display '%e' (#4528). [muzafferkal]
+* Fix non-inlined interface tracing (#3984) (#4530). [Todd Strader]
+* Fix stream operations with operands of struct type (#4531) (#4532). [Ryszard Rozak, Antmicro Ltd.]
+* Fix 'this' in a constructor (#4533). [Ryszard Rozak, Antmicro Ltd.]
+* Fix stream shift operator of 32 bits (#4536). [Julien Faucher]
+* Fix object destruction after a copy constructor (#4540) (#4541). [Ryszard Rozak, Antmicro Ltd.]
+* Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
+* Fix broken link error for enum references (#4551). [Anthony Donlon]
+* Fix logical expressions with class objects - caching in v3Const (#4552). [Ryszard Rozak, Antmicro Ltd.]
+* Fix using functions/tasks following class definition inside module (#4553). [Anthony Donlon]
+* Fix large constant buffer overflow (#4556). [Varun Koyyalagunta]
+* Fix instance arrays connecting to array of structs (#4557). [raphmaster]
+* Fix error message for invalid parameter overrides (#4559). [Anthony Donlon]
+* Fix shift to remove operation side effects (#4563).
+* Fix compile warning on unused member function variable (#4567).
+* Fix method narrowing conversion compiler error (#4568).
+* Fix interface comparison (#4570). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix dynamic triggers for named events (#4571). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix dictionaries with keys of class types (#4576). [Ryszard Rozak, Antmicro Ltd.]
+* Fix to not remap local assign intervals in forks (#4583). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix display optimization ignoring side effects (#4585).
+* Fix PLI/DPI user defined system task/function grammar (#4587) (#4588). [Quentin Corradi]
+* Fix fault on empty clocking block (#4593). [Alex Mykyta]
+* Fix creating implicit nets for inputs of gate primitives (#4603). [Geza Lore]
+* Fix try_put method of unbounded mailbox (#4608). [Ryszard Rozak, Antmicro Ltd.]
+* Fix stable name generation in V3Fork (#4615) (#4624). [Krzysztof Boroński]
+* Fix virtual methods (#4616). [Ryszard Rozak, Antmicro Ltd.]
+* Fix insertion at queue end (#4619). [Krzysztof Boroński]
+* Fix rand fields of reference types (#4627). [Ryszard Rozak, Antmicro Ltd.]
+* Fix dynamic casts of null values (#4631). [Ryszard Rozak, Antmicro Ltd.]
+* Fix signals read via virtual interfaces being misoptimized (#4645). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix handling of static keyword in methods (#4649). [Ryszard Rozak, Antmicro Ltd.]
+* Fix preprocessor to show `line 2 on resumed file.
+
+
+Verilator 5.016 2023-09-16
+==========================
+
+**Minor:**
+
+* Add prepareClone and atClone APIs for Verilated models (#3503) (#4444). [Yinan Xu]
+* Add check for conflicting options e.g. binary and lint-only (#4409). [Ethan Sifferman]
+* Add --no-trace-top to not trace top signals (#4412) (#4422). [Frans Skarman]
+* Support recursive function calls (#3267).
+* Support assignments of packed values to stream expressions on queues (#4401). [Ryszard Rozak, Antmicro Ltd]
+* Support no-parentheses calls to static methods (#4432). [Krzysztof Boroński]
+* Support block_item_declaration in forks (#4455). [Krzysztof Boroński]
+* Support assignments of stream expressions on queues to packed values (#4458). [Ryszard Rozak, Antmicro Ltd]
+* Support function non-constant default arguments (#4470).
+* Support 'let'.
+* Optimize Verilator executable size by refactoring error reporting routines (#4446). [Anthony Donlon]
+* Optimize Verilation runtime pointers and graphs (#4396) (#4397) (#4398). [Krzysztof Bieganski, Antmicro Ltd]
+* Optimize preparations towards multithreaded Verilation (#4291) (#4463) (#4476) (#4477) (#4479).  [Kamil Rakoczy, Antmicro Ltd]
+* Fix Windows filename format, etc (#3873) (#4421). [Anthony Donlon].
+* Fix t_dist_cppstyle Perl performance issue (#4085). [Srinivasan Venkataramanan]
+* Fix using type in parameterized classes without #() (#4281) (#4440). [Anthony Donlon]
+* Fix false INFINITELOOP on forever..mailbox.get() (#4323). [Srinivasan Venkataramanan]
+* Fix data type of condition operation on class objects (#4345) (#4352). [Ryszard Rozak, Antmicro Ltd]
+* Fix variables mutated under fork..join_none/join_any blocks into anonymous objects (#4356). [Krzysztof Boroński]
+* Fix V3CUse, do not consider implementations (.cpp) at all (#4386). [Krzysztof Boroński]
+* Fix ++/-- under statements (#4399). [Aleksander Kiryk, Antmicro Ltd]
+* Fix detection of mixed blocking and nonblocking assignment in nested assignments (#4404). [Ryszard Rozak, Antmicro Ltd]
+* Fix jumping over object initialization (#4411). [Krzysztof Boroński]
+* Fix multiple issues towards short circuit support (#4413) (#4460). [Ryszard Rozak, Antmicro Ltd]
+* Fix variable lifetimes in extern methods (#4414). [Krzysztof Boroński]
+* Fix multiple function definitions in V3Sched (#4416). [Hennadii Chernyshchyk]
+* Fix false UNUSEDPARAM on generate localparam (#4427). [Bill Pringlemeir]
+* Fix checking for parameter and port connections in the wrong place (#4428). [Anthony Donlon]
+* Fix coroutine handle movement during queue manipulation (#4431). [Aleksander Kiryk, Antmicro Ltd]
+* Fix nested assignments on the LHS (#4435). [Ryszard Rozak, Antmicro Ltd]
+* Fix false MULTITOP on bound interfaces (#4438). [Alex Solomatnikov]
+* Fix internal error on real conversion (#4447). [vdhotre-ventana]
+* Fix lifetime unknown error on enum.name (#4448). [jwoutersymatra]
+* Fix unstable output of VHashSha256 (#4453). [Anthony Donlon]
+* Fix static cast from a stream type (#4469) (#4485). [Ryszard Rozak, Antmicro Ltd]
+* Fix error on enum with VARHIDDEN of cell (#4482). [Michail Rontionov]
+* Fix lint of case statements with enum and wildcard bits (#4464) (#4487). [Anthony Donlon]
+* Fix reference to extended class in parameterized class (#4466).
+* Fix recursive display causing segfault (#4480). [Kuoping Hsu]
+* Fix the error message when the type of ref argument is wrong (#4490). [Ryszard Rozak, Antmicro Ltd]
+* Fix display %x formatting of real.
+* Fix mis-warning on #() in classes' own functions.
+* Fix IGNOREDRETURN to not warn on void-cast static function calls.
+* Fix ZERODLY to not warn on 'wait(0)'.
+
+
+Verilator 5.014 2023-08-06
+==========================
+
+**Minor:**
+
+* Deprecation planned for 32-bit pointer -m32 mode (#4268).
+* Deprecate CMake config below version 3.13 (#4389) (#4390). [Vito Gamberini]
+* Support some stream operations on queues (#4292). [Ryszard Rozak, Antmicro Ltd]
+* Support property declaration with empty parentheses (#4313) (#4317). [Anthony Donlon]
+* Support locator methods with "with" on assoc arrays (#4335). [Ryszard Rozak, Antmicro Ltd]
+* Support string replication with variable (#4341). [Aleksander Kiryk, Antmicro Ltd]
+* Support more types in wait (#4374). [Aleksander Kiryk, Antmicro Ltd]
+* Support static method calls as default values of function arguments (#4378). [Ryszard Rozak, Antmicro Ltd]
+* Add GENUNNAMED lint warning. [Srinivasan Venkataramanan, Deepa Palaniappan]
+* Add MISINDENT lint warning for misleading indentation.
+* Fix 'VlForkSync' redeclaration (#4277). [Krzysztof Bieganski, Antmicro Ltd]
+* Fix processes that can outlive their parents (#4253). [Krzysztof Boronski, Antmicro Ltd]
+* Fix duplicate fork names (#4295). [Ryszard Rozak, Antmicro Ltd]
+* Fix splitting coroutines (#4297) (#4307). [Jiamin Zhu]
+* Fix error when multiple duplicate DPI exports (#4301).
+* Fix class reference assignment checking (#4296). [Ryszard Rozak, Antmicro Ltd]
+* Fix handling of ref types in initial values of type parameters (#4304). [Ryszard Rozak, Antmicro Ltd]
+* Fix comparison of string parameters (#4308). [Ryszard Rozak, Antmicro Ltd]
+* Fix state update for always processes (#4311). [Aleksander Kiryk, Antmicro Ltd]
+* Fix multiple edge timing controls in class methods (#4318) (#4320) (#4344). [Krzysztof Bieganski, Antmicro Ltd]
+* Fix implicit calls of base class constructors with optional arguments (#4319). [Ryszard Rozak, Antmicro Ltd]
+* Fix propagation of process requirement (#4321). [Krzysztof Boroński]
+* Fix unhandled overloads in V3InstrCount (#4324). [Krzysztof Boroński]
+* Fix selects of static members (#4326). [Ryszard Rozak, Antmicro Ltd]
+* Fix references to members of results of static methods (#4327). [Ryszard Rozak, Antmicro Ltd]
+* Fix unique..with method on queues of class objects (#4328). [Ryszard Rozak, Antmicro Ltd]
+* Fix queue slicing (#4329). [Aleksander Kiryk, Antmicro Ltd]
+* Fix wildcard referring types (#4336) (#4342). [Aleksander Kiryk, Antmicro Ltd]
+* Fix comparison of class objects (#4346). [Ryszard Rozak, Antmicro Ltd]
+* Fix unexpected RefDType on assoc arrays (#4337). [Aleksander Kiryk, Antmicro Ltd]
+* Fix cmake astgen for Rocky Linux 8.7 (#4343). [Julian Daube]
+* Fix class timescale in class packages (#4348). [Krzysztof Bieganski, Antmicro Ltd]
+* Fix string concatenations (#4354). [Ryszard Rozak, Antmicro Ltd]
+* Fix unlinked task error from broken context (#4355) (#4402). [Aleksander Kiryk, Antmicro Ltd]
+* Fix selects on unpacked structs (#4359). [Ryszard Rozak, Antmicro Ltd]
+* Fix select operation on assoc array with wide keys (#4360). [Ryszard Rozak, Antmicro Ltd]
+* Fix non-public methods with wide output (#4364). [Ryszard Rozak, Antmicro Ltd]
+* Fix handling of super.new calls (#4366). [Ryszard Rozak, Antmicro Ltd]
+* Fix assign to input var in methods (#4367). [Aleksander Kiryk, Antmicro Ltd]
+* Fix VlProcess not found (#4368). [Aleksander Kiryk, Antmicro Ltd]
+* Fix order of evaluation of function calls in statements (#4375). [Ryszard Rozak, Antmicro Ltd]
+* Fix config_build.h issues (#4380) (#4381). [Andrew Miloradovsky]
+
+
+Verilator 5.012 2023-06-13
+==========================
+
+**Major:**
+
+* With -j or --build-jobs, multithread Verilator's emit phase of Verilation. [Kamil Rakoczy, Antmicro Ltd]
+  Additional Verilator-internal stages will become multithreaded over time.
+
+**Minor:**
+
+* Add --main-top-name option for C main TOP name (#4235) (#4249). [Don Williamson]
+* Add creating __inputs.vpp file with --debug (#4177). [Tudor Timi]
+* Add NEWERSTD warning when using feature in newer language standard (#4168) (#4172). [Ethan Sifferman]
+* Add warning that timing controls in DPI exports are unsupported (#4238). [Krzysztof Bieganski, Antmicro Ltd]
+* Support std::process class (#4212). [Aleksander Kiryk, Antmicro Ltd]
+* Support inside expressions with strings and doubles (#4138) (#4139). [Krzysztof Boroński]
+* Support get_randstate/set_randstate class method functions.
+* Support for condition operator on class objects (#4214). [Ryszard Rozak, Antmicro Ltd]
+* Support array max (#4275). [Aleksander Kiryk, Antmicro Ltd]
+* Optimize VPI callValueCbs (#4155). [Hennadii Chernyshchyk]
+* Configure for faster C++ linking using 'mold', if it is installed.
+* Fix crash on duplicate imported modules (#3231). [Robert Balas]
+* Fix false WIDTHEXPAND on array declarations (#3959). [Jose Tejada]
+* Fix marking overridden methods as coroutines (#4120) (#4169). [Krzysztof Bieganski, Antmicro Ltd]
+* Fix SystemC signal copy macro use (#4135). [Josep Sans]
+* Fix duplicate static names in blocks in functions (#4144) (#4160). [Stefan Wallentowitz]
+* Fix initialization order of initial static after function/task (#4159). [Kamil Rakoczy, Antmicro Ltd]
+* Fix linking AstRefDType if it has parameterized class ref (#4164) (#4170). [Ryszard Rozak, Antmicro Ltd]
+* Fix crash caused by $display() optimization (#4165) (#4166). [Tudor Timi]
+* Fix arrays of unpacked structs (#4173). [Risto Pejašinović]
+* Fix $fscanf of decimals overflowing variables (#4174). [Ahmed El-Mahmoudy]
+* Fix super.new missing data type (#4147). [Tudor Timi]
+* Fix missing class forward declarations (#4151). [Krzysztof Boroński]
+* Fix hashes of instances of parameterized classes (#4182). [Ryszard Rozak, Antmicro Ltd]
+* Fix forced assignments that override non-continuous assignments (#4183) (#4192). [Krzysztof Bieganski, Antmicro Ltd]
+* Fix wide structure VL_TOSTRING_W generation (#4188) (#4189). [Aylon Chaim Porat]
+* Fix references to members of parameterized base classes (#4196). [Ryszard Rozak, Antmicro Ltd]
+* Fix tracing undefined alignment (#4201) (#4288) [John Wehle]
+* Fix class specific same methods for AstVarScope, AstVar, and AstScope (#4203) (#4250). [John Wehle]
+* Fix dotted references in parameterized classes (#4206). [Ryszard Rozak, Antmicro Ltd]
+* Fix bit selections under parameterized classes (#4210). [Ryszard Rozak, Antmicro Ltd]
+* Fix duplicate std:: declaration with -I (#4215). [Harald Pretl]
+* Fix deep traversal of class inheritance timing (#4216). [Krzysztof Boroński]
+* Fix class parameters of enum types (#4219). [Ryszard Rozak, Antmicro Ltd]
+* Fix static methods with prototypes (#4220). [Ryszard Rozak, Antmicro Ltd]
+* Fix LATCH warning on function local variables (#4221) (#4284) [Julien Margetts]
+* Fix VCD scope types (#4227) (#4282). [Àlex Torregrosa]
+* Fix incorrect multi-driven lint warning (#4231) (#4248). [Adrien Le Masle]
+* Fix missing assignment for wide unpacked structs (#4233). [Jiamin Zhu]
+* Fix unpacked struct == and != operators (#4234) (#4240). [Risto Pejašinović]
+* Fix AstStructSel clean when data type is structure (#4241) (#4244). [Risto Pejašinović]
+* Fix function calls in with statements (#4245). [Ryszard Rozak, Antmicro Ltd]
+* Fix operator == for unpacked struct, if elements are VlUnpacked arrays (#4247). [Risto Pejašinović]
+* Fix STATIC lifetime for variables created from clocking items (#4262). [Krzysztof Boroński]
+* Fix names of foreach blocks (#4264). [Ryszard Rozak, Antmicro Ltd]
+* Fix iterated variables in foreach loops to have VAUTOM lifetimes (#4265). [Krzysztof Boroński]
+* Fix missing assignment for wide class members (#4267). [Jiamin Zhu]
+* Fix the global uses timing flag when forks exist (#4274). [Krzysztof Bieganski, Antmicro Ltd]
+* Fix struct redefinition (#4276). [Aleksander Kiryk, Antmicro Ltd]
+* Fix detection of wire/reg duplicates.
+* Fix false IMPLICITSTATIC on package functions.
+* Fix method calls on function return values.
+
+
 Verilator 5.010 2023-04-30
 ==========================
 
@@ -138,7 +705,7 @@ Verilator 5.006 2023-01-22
 **Minor:**
 
 * Support clocking blocks (#3674). [Krzysztof Bieganski, Antmicro Ltd]
-* Support packed structs (#3802). [Aleksander Kiryk, Antmicro Ltd]
+* Support unpacked structs (#3802). [Aleksander Kiryk, Antmicro Ltd]
 * Support Windows-native builds using cmake (#3814). [Kritik Bhimani]
 * Support p format for UnpackArray (#3877). [Aleksander Kiryk, Antmicro Ltd]
 * Support property calls without parenthesis (#3879) (#3893). [Ryszard Rozak, Antmicro Ltd]
@@ -270,7 +837,7 @@ Verilator 5.002 2022-10-29
 * Fix null access on optimized-out fork statements (#3658). [Krzysztof Bieganski, Antmicro Ltd]
 * Fix VPI inline module naming mismatch (#3690) (#3694). [Jiuyang Liu]
 * Fix deadlock in timeprecision when using SystemC (#3707). [Kamil Rakoczy, Antmicro Ltd]
-* Fix width mismatch on inside operator (#3714). [Alex Torregrosa]
+* Fix width mismatch on inside operator (#3714). [Àlex Torregrosa]
 
 
 Verilator 4.228 2022-10-01
@@ -500,7 +1067,7 @@ Verilator 4.214 2021-10-17
 * Fix removing if statement with side effect in condition (#3131). [Alexander Grobman]
 * Fix --waiver-output for multiline warnings (#2429) (#3141). [Keith Colbert]
 * Fix internal error on bad widths (#3140) (#3145). [Zhanglei Wang]
-* Fix crash on clang 12/13 (#3148). [Kouping Hsu]
+* Fix crash on clang 12/13 (#3148). [Kuoping Hsu]
 * Fix cygwin compile error due to missing -std=gnu++14 (#3149). [Sun Kim]
 * Fix $urandom_range when the range is 0 ... UINT_MAX (#3161). [Iru Cai]
 * Fix constructor-parameter argument comma-separation in C++ (#3162). [Matthew Ballance]
@@ -615,12 +1182,12 @@ Verilator 4.202 2021-04-24
 * Mark --no-relative-cfuncs as scheduled for deprecation.
 * Add --coverage-max-width (#2853). [xuejiazidi]
 * Add VerilatedCovContext::forcePerInstance (#2793). [Kevin Laeufer]
-* Add FST SystemC tracing (#2806). [Alex Torregrosa]
+* Add FST SystemC tracing (#2806). [Àlex Torregrosa]
 * Add PINNOTFOUND warning in place of error (#2868). [Udi Finkelstein]
 * Support overlaps in priority case statements (#2864). [Rupert Swarbrick]
 * Support for null ports (#2875). [Udi Finkelstein]
 * Fix class unpacked-array compile error (#2774). [Iru Cai]
-* Fix scope types in FST and VCD traces (#2805). [Alex Torregrosa]
+* Fix scope types in FST and VCD traces (#2805). [Àlex Torregrosa]
 * Fix exceeding command-line ar limit (#2834). [Yinan Xu]
 * Fix false $dumpfile warning on model save (#2834). [Yinan Xu]
 * Fix --timescale-override not suppressing TIMESCALEMOD (#2838). [Kaleb Barrett]
@@ -677,7 +1244,7 @@ Verilator 4.110 2021-02-25
 **Minor:**
 
 * Support concat selection (#2721).
-* Support struct scopes when dumping structs to VCD (#2776) [Alex Torregrosa]
+* Support struct scopes when dumping structs to VCD (#2776) [Àlex Torregrosa]
 * Generate SELRANGE for potentially unreachable code (#2625) (#2754) [Pierre-Henri Horrein]
 * For --flatten, override inlining of public and no_inline modules (#2761) [James Hanlon]
 * Fix little endian interface pin swizzling (#2475). [Don Owen]
@@ -688,7 +1255,7 @@ Verilator 4.110 2021-02-25
 * Fix class extends with VM_PARALLEL_BUILDS (#2775). [Iru Cai]
 * Fix shifts by > 32 bit values (#2785). [qrq992]
 * Fix examples not flushing vcd (#2787). [Richard E George]
-* Fix little endian packed array pattern assignment (#2795). [Alex Torregrosa]
+* Fix little endian packed array pattern assignment (#2795). [Àlex Torregrosa]
 
 
 Verilator 4.108 2021-01-10
@@ -1029,6 +1596,7 @@ Verilator 4.026 2020-01-11
 * Fix expand optimization slowing --lint-only. Closes #2091. [Thomas Watts]
 * Fix %{number}s with strings. #2093. [agrobman]
 * Fix shebang breaking some shells. Closes #2067. [zdave]
+* Fix errors on using string in incorrect format (#5240). [John Demme]
 
 
 Verilator 4.024 2019-12-08
@@ -1164,7 +1732,7 @@ Verilator 4.014 2019-05-08
 **Minor:**
 
 * Add --trace-fst-thread.
-* Support '#' comments in $readmem. (#1411) [Frederick Requin]
+* Support '#' comments in $readmem. (#1411) [Frédéric Requin]
 * Support "'dx" constants. (#1423) [Udi Finkelstein]
 * For FST tracing use LZ4 compression. [Tony Bybell]
 * Add error when use parameters without value. (#1424) [Peter Gerst]
@@ -1434,19 +2002,19 @@ Verilator 3.912 2017-09-23
 
 **Minor:**
 
-* Support or/and/xor array intrinsic methods. (#1210) [Mike Popoloski]
+* Support or/and/xor array intrinsic methods. (#1210) [Michael Popoloski]
 * Support package export. (#1217) [Usuario Eda]
-* Support module port parameters without defaults. (#1213) [Mike Popoloski]
+* Support module port parameters without defaults. (#1213) [Michael Popoloski]
 * Add performance information to --stats file.
 * Simplify VL_CONST_W macro generation for faster compiles.
 * Optimize improvements for Shift-And, and replication constructs.
-* Fix ordering of arrayed cell wide connections. (#1202 partial) [Mike Popoloski]
+* Fix ordering of arrayed cell wide connections. (#1202 partial) [Michael Popoloski]
-* Fix LITENDIAN warning on arrayed cells. (#1202) [Mike Popoloski]
+* Fix LITENDIAN warning on arrayed cells. (#1202) [Michael Popoloski]
-* Fix enum ranges without colons. (#1204) [Mike Popoloski]
+* Fix enum ranges without colons. (#1204) [Michael Popoloski]
-* Fix GCC noreturn compile error. (#1209) [Mike Popoloski]
+* Fix GCC noreturn compile error. (#1209) [Michael Popoloski]
-* Fix constant function default parameters. (#1211) [Mike Popoloski]
+* Fix constant function default parameters. (#1211) [Michael Popoloski]
-* Fix non-colon array of interface modports. (#1212) [Mike Popoloski]
+* Fix non-colon array of interface modports. (#1212) [Michael Popoloski]
-* Fix .name connections on interfaces. (#1214) [Mike Popoloski]
+* Fix .name connections on interfaces. (#1214) [Michael Popoloski]
 * Fix wide array indices causing compile error.
 
 
@@ -1568,8 +2136,8 @@ Verilator 3.888 2016-10-14
 
 **Minor:**
 
-* Add --no-decoration to remove output comments, msg2015. [Frederic Requin]
+* Add --no-decoration to remove output comments, msg2015. [Frédéric Requin]
-* If VM_PARALLEL_BUILDS=1, use OPT_FAST and OPT_SLOW. [Frederic Requin]
+* If VM_PARALLEL_BUILDS=1, use OPT_FAST and OPT_SLOW. [Frédéric Requin]
   Set VM_DEFAULT_RULES=0 for old behavior.
 * Add error on DPI functions > 32 bits. (#1898) [Elliot Mednick]
 * Improve Verilation performance on internal strings. (#1896) [Johan Bjork]
@@ -1605,7 +2173,7 @@ Verilator 3.884 2016-05-18
 * Fix --output-split of constructors. (#1035) [Johan Bjork]
 * Fix removal of empty packages, modules and cells. (#1034) [Johan Bjork]
 * Fix core dump on Arch Linux/GCC 6.1.1. (#1058) [Jannis Harder]
-* Fix $value$plusargs to string. (#1880) [Frederic Requin]
+* Fix $value$plusargs to string. (#1880) [Frédéric Requin]
 
 
 Verilator 3.882 2016-03-01
@@ -1684,13 +2252,13 @@ Verilator 3.876 2015-08-12
 
 **Minor:**
 
-* Add tracing_on, etc to vlt files. (#932) [Frederic Requin]
+* Add tracing_on, etc to vlt files. (#932) [Frédéric Requin]
 * Support extraction of enum bits. (#951) [Jonathon Donaldson]
 * Fix MinGW compiler error. (#927) (#929) [Hans Tichelaar]
 * Fix .c files to be treated as .cpp. (#930) [Jonathon Donaldson]
 * Fix string-to-int space conversion. (#931) [Fabrizio Ferrandi]
 * Fix dpi imports inside generates. [Michael Tresidder]
-* Fix rounding in trace $timescale. (#946) [Frederic Requin]
+* Fix rounding in trace $timescale. (#946) [Frédéric Requin]
 * Fix $fopen with SV string. (#947) [Sven Stucki]
 * Fix hashed error with typedef inside block. (#948) [Sven Stucki]
 * Fix makefile with --coverage. (#953) [Eivind Liland]
@@ -1930,7 +2498,7 @@ Verilator 3.852 2013-09-29
 
 * Support named function and task arguments. [Chris Randall]
 * Report SELRANGE warning for non-generate if. (#675) [Roland Kruse]
-* Fix ordering of $fgetc. (#1808) [Frederic Requin]
+* Fix ordering of $fgetc. (#1808) [Frédéric Requin]
 * Fix --output-split-cfunc to count internal functions. [Chris Randall]
 * Fix crash on 32-bit Ubuntu. (#670) [Mark Jackson Pulver]
 
@@ -1998,7 +2566,7 @@ Verilator 3.846 2013-03-09
 * Fix DETECTARRAY on packed structures. (#610) [Jeremy Bennett]
 * Fix LITENDIAN on unpacked structures. (#614) [Wai Sum Mong]
 * Fix 32-bit OS VPI scan issue. (#615)  [Jeremy Bennett, Rich Porter]
-* Fix opening a VerilatedVcdC file multiple times. (#1774) [Frederic Requin]
+* Fix opening a VerilatedVcdC file multiple times. (#1774) [Frédéric Requin]
 * Fix UNOPTFLAT circular array bounds crossing. (#630) [Jie Xu]
 
 
@@ -3310,7 +3878,7 @@ Verilator 3.460 2005-07-27 Beta
 * Fix false warning when a clock is constant.
 * Fix X/Z in decimal numbers. [Wim Michiels]
 * Fix genvar statements in non-named generate blocks.
-* Fix core dump when missing newline in `define. [David van der bokke]
+* Fix core dump when missing newline in `define. [David van der Bokke]
 
 
 Verilator 3.450 2005-07-12
@@ -4206,7 +4774,7 @@ Verilator 0.0 1994-07-08
 Copyright
 =========
 
-Copyright 2001-2023 by Wilson Snyder. This program is free software; you
+Copyright 2001-2024 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

Makefile.in

@@ -7,7 +7,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2024 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -91,6 +91,7 @@ datarootdir = @datarootdir@
 CFG_WITH_CCWARN = @CFG_WITH_CCWARN@
 CFG_WITH_DEFENV = @CFG_WITH_DEFENV@
 CFG_WITH_LONGTESTS = @CFG_WITH_LONGTESTS@
+CFG_WITH_SOLVER = @CFG_WITH_SOLVER@
 PACKAGE_VERSION = @PACKAGE_VERSION@
 
 #### End of system configuration section. ####
@@ -112,7 +113,7 @@ SUBDIRS = docs src test_regress \
 	examples/make_tracing_c \
 	examples/make_tracing_sc \
 	examples/make_protect_lib \
-	examples/xml_py \
+	examples/json_py \
 
 INFOS = verilator.html verilator.pdf
 
@@ -173,6 +174,10 @@ smoke-test: all_nomsg
 test_regress: all_nomsg
 	$(MAKE) -C test_regress
 
+.PHONY: test-snap test-diff
+test-snap test-diff:
+	$(MAKE) -C test_regress $@
+
 examples: all_nomsg
 	for p in $(EXAMPLES) ; do \
 	  $(MAKE) -C $$p VERILATOR_ROOT=`pwd` || exit 10; \
@@ -199,11 +204,21 @@ verilator.html:
 verilator.pdf: Makefile
 	$(MAKE) -C docs verilator.pdf
 
-# See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
+# Public executables intended to be invoked directly by the user
-VL_INST_BIN_FILES = verilator verilator_bin$(EXEEXT) verilator_bin_dbg$(EXEEXT) verilator_coverage_bin_dbg$(EXEEXT) \
+# Don't put wildcards in these variables, it might cause an uninstall of other stuff
-	verilator_ccache_report verilator_coverage verilator_difftree verilator_gantt verilator_includer verilator_profcfunc
+VL_INST_PUBLIC_SCRIPT_FILES = verilator \
-# Some scripts go into both the search path and pkgdatadir,
+                              verilator_coverage \
-# so they can be found by the user, and under $VERILATOR_ROOT.
+                              verilator_gantt \
+                              verilator_profcfunc \
+
+VL_INST_PUBLIC_BIN_FILES = verilator_bin$(EXEEXT) \
+                           verilator_bin_dbg$(EXEEXT) \
+                           verilator_coverage_bin_dbg$(EXEEXT) \
+
+# Private executabels intended to be invoked by internals
+# Don't put wildcards in these variables, it might cause an uninstall of other stuff
+VL_INST_PRIVATE_SCRIPT_FILES = verilator_ccache_report \
+                               verilator_includer \
 
 VL_INST_INC_BLDDIR_FILES = \
 	include/verilated_config.h \
@@ -222,19 +237,34 @@ VL_INST_DATA_SRCDIR_FILES = \
 	examples/*/Makefile* \
 	examples/*/vl_* \
 
-installbin:
+mkbindirs:
-	$(MKINSTALLDIRS) $(DESTDIR)$(bindir)
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator $(DESTDIR)$(bindir)/verilator )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_coverage $(DESTDIR)$(bindir)/verilator_coverage )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_gantt $(DESTDIR)$(bindir)/verilator_gantt )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_profcfunc $(DESTDIR)$(bindir)/verilator_profcfunc )
-	( cd bin ; $(INSTALL_PROGRAM) verilator_bin$(EXEEXT) $(DESTDIR)$(bindir)/verilator_bin$(EXEEXT) )
-	( cd bin ; $(INSTALL_PROGRAM) verilator_bin_dbg$(EXEEXT) $(DESTDIR)$(bindir)/verilator_bin_dbg$(EXEEXT) )
-	( cd bin ; $(INSTALL_PROGRAM) verilator_coverage_bin_dbg$(EXEEXT) $(DESTDIR)$(bindir)/verilator_coverage_bin_dbg$(EXEEXT) )
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/bin
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_includer $(DESTDIR)$(pkgdatadir)/bin/verilator_includer )
+	$(MKINSTALLDIRS) $(DESTDIR)$(bindir)
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_ccache_report $(DESTDIR)$(pkgdatadir)/bin/verilator_ccache_report )
+
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_difftree $(DESTDIR)$(pkgdatadir)/bin/verilator_difftree )
+installbin: | mkbindirs
+	cd $(srcdir)/bin; \
+	for p in $(VL_INST_PUBLIC_SCRIPT_FILES) ; do \
+	  $(INSTALL_PROGRAM) $$p $(DESTDIR)$(pkgdatadir)/bin/$$p; \
+	done
+	cd bin; \
+	for p in $(VL_INST_PUBLIC_BIN_FILES) ; do \
+	  $(INSTALL_PROGRAM) $$p $(DESTDIR)$(pkgdatadir)/bin/$$p; \
+	done
+	cd $(srcdir)/bin; \
+	for p in $(VL_INST_PRIVATE_SCRIPT_FILES) ; do \
+	  $(INSTALL_PROGRAM) $$p $(DESTDIR)$(pkgdatadir)/bin/$$p; \
+	done
+
+installredirect: installbin | mkbindirs
+	cp ${srcdir}/bin/redirect ${srcdir}/bin/redirect.tmp
+	perl -p -i -e 'use File::Spec;' \
+	           -e' $$path = File::Spec->abs2rel("$(realpath $(DESTDIR)$(pkgdatadir)/bin)", "$(realpath $(DESTDIR)$(bindir))");' \
+	           -e 's/RELPATH.*/"$$path";/g' -- "${srcdir}/bin/redirect.tmp"
+	cd $(srcdir)/bin; \
+	for p in $(VL_INST_PUBLIC_SCRIPT_FILES) $(VL_INST_PUBLIC_BIN_FILES) ; do \
+	  $(INSTALL_PROGRAM) redirect.tmp $(DESTDIR)$(bindir)/$$p; \
+	done
+	rm ${srcdir}/bin/redirect.tmp
 
 # Man files can either be part of the original kit, or built in current directory
 # So important we use $^ so VPATH is searched
@@ -265,7 +295,7 @@ installdata:
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
-	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/xml_py
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/json_py
 	cd $(srcdir) \
 	; for p in $(VL_INST_DATA_SRCDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
@@ -277,8 +307,11 @@ installdata:
 
 # We don't trust rm -rf, so rmdir instead as it will fail if user put in other files
 uninstall:
-	-cd $(DESTDIR)$(bindir) && rm -f $(VL_INST_BIN_FILES)
+	-cd $(DESTDIR)$(bindir) && rm -f $(VL_INST_PUBLIC_SCRIPT_FILES)
-	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_BIN_FILES)
+	-cd $(DESTDIR)$(bindir) && rm -f $(VL_INST_PUBLIC_BIN_FILES)
+	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_PUBLIC_SCRIPT_FILES)
+	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_PUBLIC_BIN_FILES)
+	-cd $(DESTDIR)$(pkgdatadir)/bin && rm -f $(VL_INST_PRIVATE_SCRIPT_FILES)
 	-cd $(DESTDIR)$(mandir)/man1 && rm -f $(VL_INST_MAN_FILES)
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_BLDDIR_FILES)
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_SRCDIR_FILES)
@@ -301,13 +334,13 @@ uninstall:
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/xml_py
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/json_py
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples
 	-rmdir $(DESTDIR)$(pkgdatadir)
 	-rmdir $(DESTDIR)$(pkgconfigdir)
 
 install: all_nomsg install-all
-install-all: installbin installman installdata install-msg
+install-all: installbin installredirect installman installdata install-msg
 
 install-here: installman info
 
@@ -336,7 +369,7 @@ CPPCHECK_FLAGS = --enable=all --inline-suppr \
 	--suppress=useStlAlgorithm
 CPPCHECK_FLAGS += --xml
 CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CHECK_CPP))
-CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/src/obj_dbg -I$(srcdir)/src
+CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/include/gtkwave -I$(srcdir)/include/vltstd -I$(srcdir)/src/obj_dbg -I$(srcdir)/src
 
 cppcheck: cppcheck-1 cppcheck-2 cppcheck-3 cppcheck-4 cppcheck-5 cppcheck-6 cppcheck-7 cppcheck-8
 cppcheck-1:
@@ -395,8 +428,8 @@ PY_PROGRAMS = \
 	bin/verilator_gantt \
 	bin/verilator_includer \
 	bin/verilator_profcfunc \
-	examples/xml_py/vl_file_copy \
+	examples/json_py/vl_file_copy \
-	examples/xml_py/vl_hier_graph \
+	examples/json_py/vl_hier_graph \
 	docs/guide/conf.py \
 	docs/bin/vl_sphinx_extract \
 	docs/bin/vl_sphinx_fix \
@@ -406,6 +439,7 @@ PY_PROGRAMS = \
 	src/cppcheck_filtered \
 	src/flexfix \
 	src/vlcovgen \
+	src/.gdbinit.py \
 	test_regress/t/*.pf \
 	nodist/clang_check_attributes \
 	nodist/code_coverage \
@@ -413,6 +447,7 @@ PY_PROGRAMS = \
 	nodist/fuzzer/actual_fail \
 	nodist/fuzzer/generate_dictionary \
 	nodist/install_test \
+	nodist/log_changes \
 
 PY_FILES = \
 	$(PY_PROGRAMS) \
@@ -424,17 +459,21 @@ YAPF_FLAGS = -i
 yapf:
 	$(YAPF) $(YAPF_FLAGS) $(PY_FILES)
 
-FLAKE8 = flake8
-FLAKE8_FLAGS = \
-	--extend-exclude=fastcov.py \
-	--ignore=E123,E129,E251,E402,E501,W503,W504,E701
-
 PYLINT = pylint
 PYLINT_FLAGS = --score=n --disable=R0801
 
+RUFF = ruff
+RUFF_FLAGS = check --ignore=E402,E501,E701
+
+# "make -k" so can see all tool result errors
 lint-py:
-	-$(FLAKE8) $(FLAKE8_FLAGS) $(PY_PROGRAMS)
+	$(MAKE) -k lint-py-pylint lint-py-ruff
-	-$(PYLINT) $(PYLINT_FLAGS) $(PY_PROGRAMS)
+
+lint-py-pylint:
+	$(PYLINT) $(PYLINT_FLAGS) $(PY_PROGRAMS)
+
+lint-py-ruff:
+	$(RUFF) $(RUFF_FLAGS) $(PY_PROGRAMS)
 
 format-pl-exec:
 	-chmod a+x test_regress/t/*.pl
@@ -451,8 +490,8 @@ install-msg:
 
 IN_WILD := ${srcdir}/*.in ${srcdir}/*/*.in
 
-# autoheader might not change config_build.h.in, so touch it
+# autoheader might not change config_package.h.in, so touch it
-${srcdir}/config_build.h: ${srcdir}/config_build.h.in configure
+${srcdir}/config_package.h: ${srcdir}/config_package.h.in configure
 	cd ${srcdir} && autoheader
 	touch $@
 Makefile: Makefile.in config.status $(IN_WILD)

README.rst

@@ -1,17 +1,23 @@
 .. Github doesn't render images unless absolute URL
 .. Do not know of a conditional tag, "only: github" nor "github display" works
 
-.. image:: https://img.shields.io/badge/License-LGPL%20v3-blue.svg
+|badge1| |badge2| |badge3| |badge4| |badge5| |badge6| |badge7| |badge8|
-    :target: https://www.gnu.org/licenses/lgpl-3.0]
+
-.. image:: https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg
+.. |badge1| image:: https://img.shields.io/badge/Website-Verilator.org-181717.svg
+    :target: https://verilator.org
+.. |badge2| image:: https://img.shields.io/badge/License-LGPL%20v3-blue.svg
+    :target: https://www.gnu.org/licenses/lgpl-3.0
+.. |badge3| image:: https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg
     :target: https://opensource.org/licenses/Artistic-2.0
-.. image:: https://repology.org/badge/tiny-repos/verilator.svg?header=distro%20packages
+.. |badge4| image:: https://repology.org/badge/tiny-repos/verilator.svg?header=distro%20packages
     :target: https://repology.org/project/verilator/versions
-.. image:: https://api.codacy.com/project/badge/Grade/fa78caa433c84a4ab9049c43e9debc6f
+.. |badge5| image:: https://img.shields.io/docker/pulls/verilator/verilator
+    :target: https://hub.docker.com/r/verilator/verilator
+.. |badge6| image:: https://api.codacy.com/project/badge/Grade/fa78caa433c84a4ab9049c43e9debc6f
     :target: https://www.codacy.com/gh/verilator/verilator
-.. image:: https://codecov.io/gh/verilator/verilator/branch/master/graph/badge.svg
+.. |badge7| image:: https://codecov.io/gh/verilator/verilator/branch/master/graph/badge.svg
     :target: https://codecov.io/gh/verilator/verilator
-.. image:: https://github.com/verilator/verilator/workflows/build/badge.svg
+.. |badge8| image:: https://github.com/verilator/verilator/workflows/build/badge.svg
     :target: https://github.com/verilator/verilator/actions?query=workflow%3Abuild
 
 
@@ -57,17 +63,16 @@ files, the "Verilated" code.
 
 These Verilated C++/SystemC files are then compiled by a C++ compiler
 (gcc/clang/MSVC++), optionally along with a user's own C++/SystemC wrapper
-file to instantiate the Verilated model. Executing the resulting executable
+file, to instantiate the Verilated model. Executing the resulting
-performs the design simulation. Verilator also supports linking Verilated
+executable performs the design simulation. Verilator also supports linking
-generated libraries, optionally encrypted, into other simulators.
+Verilated generated libraries, optionally encrypted, into other simulators.
 
 Verilator may not be the best choice if you are expecting a full-featured
-replacement for a closed-source Verilog simulator, needs SDF annotation,
+replacement for a closed-source Verilog simulator, need SDF annotation,
 mixed-signal simulation, or are doing a quick class project (we recommend
-`Icarus Verilog`_ for classwork.)  However, if you are looking for a path
+`Icarus Verilog`_ for classwork).  However, if you are looking for a path
 to migrate SystemVerilog to C++/SystemC, or want high-speed simulation of
-synthesizable designs containing limited verification constructs, Verilator
+designs, Verilator is the tool for you.
-is the tool for you.
 
 
 Performance
@@ -77,17 +82,16 @@ Verilator does not directly translate Verilog HDL to C++ or SystemC. Rather,
 Verilator compiles your code into a much faster optimized and optionally
 thread-partitioned model, which is in turn wrapped inside a C++/SystemC
 module. The results are a compiled Verilog model that executes even on a
-single-thread over 10x faster than standalone SystemC, and on a single
+single thread over 10x faster than standalone SystemC, and on a single
 thread is about 100 times faster than interpreted Verilog simulators such
 as `Icarus Verilog`_. Another 2-10x speedup might be gained from
 multithreading (yielding 200-1000x total over interpreted simulators).
 
-Verilator has typically similar or better performance versus the
+Verilator has typically similar or better performance versus closed-source
-closed-source Verilog simulators (Carbon Design Systems Carbonator,
+Verilog simulators (e.g., Aldec Riviera-Pro, Cadence Incisive/NC-Verilog,
-Modelsim/Questa, Cadence Incisive/NC-Verilog, Synopsys VCS, VTOC, and
+Mentor ModelSim/Questa, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But,
-Pragmatic CVer/CVC). But, Verilator is open-sourced, so you can spend on
+Verilator is open-sourced, so you can spend on computes rather than
-computes rather than licenses. Thus, Verilator gives you the best
+licenses. Thus, Verilator gives you the best simulation cycles/dollar.
-cycles/dollar.
 
 
 Installation & Documentation
@@ -139,7 +143,7 @@ Related Projects
 Open License
 ============
 
-Verilator is Copyright 2003-2023 by Wilson Snyder. (Report bugs to
+Verilator is Copyright 2003-2024 by Wilson Snyder. (Report bugs to
 `Verilator Issues <https://verilator.org/issues>`_.)
 
 Verilator is free software; you can redistribute it and/or modify it under
@@ -147,7 +151,7 @@ the terms of either the GNU Lesser General Public License Version 3 or the
 Perl Artistic License Version 2.0. See the documentation for more details.
 
 .. _CHIPS Alliance: https://chipsalliance.org
-.. _Icarus Verilog: http://iverilog.icarus.com
+.. _Icarus Verilog: https://steveicarus.github.io/iverilog
 .. _Linux Foundation: https://www.linuxfoundation.org
 .. |Logo| image:: https://www.veripool.org/img/verilator_256_200_min.png
 .. |verilator multithreaded performance| image:: https://www.veripool.org/img/verilator_multithreaded_performance_bg-min.png

bin/redirect

@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+######################################################################
+#
+# Copyright 2003-2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+#
+######################################################################
+
+require 5.006_001;
+use warnings;
+use FindBin qw($RealBin $RealScript);
+use strict;
+
+my $relpath = RELPATH;  # Substituted during Verilator 'make install'
+
+unshift @ARGV, $RealScript;
+
+exec { "$RealBin/$relpath/$RealScript" } @ARGV;
+die "%Error: Exec failed,";

bin/verilator

@@ -1,7 +1,7 @@
 #!/usr/bin/env perl
 ######################################################################
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2024 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -15,6 +15,7 @@ use Getopt::Long;
 use FindBin qw($RealBin $RealScript);
 use IO::File;
 use Pod::Usage;
+use Cwd qw(realpath);
 
 use strict;
 use vars qw($Debug @Opt_Verilator_Sw);
@@ -32,6 +33,7 @@ my $opt_rr;
 my $opt_gdbbt;
 my $opt_quiet_exit;
 my $opt_unlimited_stack = 1;
+my $opt_valgrind;
 
 # No arguments can't do anything useful.  Give help
 if ($#ARGV < 0) {
@@ -56,15 +58,29 @@ if (! GetOptions(
           # Switches
           "gdb!"             => \$opt_gdb,
           "gdbbt!"           => \$opt_gdbbt,
+          "quiet!"           => \$opt_quiet_exit,  # As -quiet implies -quiet-exit
           "quiet-exit!"      => \$opt_quiet_exit,
           "rr!"              => \$opt_rr,
           "unlimited-stack!" => \$opt_unlimited_stack,
+          "valgrind!"        => \$opt_valgrind,
           # Additional parameters
           "<>"               => sub {},      # Ignored
     )) {
     pod2usage(-exitstatus => 2, -verbose => 0);
 }
 
+my $verilator_root = realpath("$RealBin/..");
+if (defined $ENV{VERILATOR_ROOT}) {
+    if ((!-d $ENV{VERILATOR_ROOT}) || $verilator_root ne realpath($ENV{VERILATOR_ROOT})) {
+        warn "%Error: verilator: VERILATOR_ROOT is set to inconsistent path. Suggest leaving it unset.\n";
+        warn "%Error: VERILATOR_ROOT=$ENV{VERILATOR_ROOT}\n";
+        exit 1;
+    }
+} else {
+    print "export VERILATOR_ROOT='$verilator_root'\n" if $Debug;
+    $ENV{VERILATOR_ROOT} = $verilator_root;
+}
+
 if ($opt_gdbbt && !gdb_works()) {
     warn "-Info: --gdbbt ignored: gdb doesn't seem to be working\n" if $Debug;
     $opt_gdbbt = 0;
@@ -109,6 +125,18 @@ if ($opt_gdb) {
          . " -ex \"run " . join(' ', @quoted_sw)."\""
          . " -ex 'set width 0'"
          . " -ex 'bt' -ex 'quit'");
+} elsif ($opt_valgrind) {
+    # Run under valgrind
+    my $valgrind_bin = ($ENV{VERILATOR_VALGRIND} || "valgrind --error-exitcode=1 --max-stackframe=2815880"
+        # Magic number sugested by valgrind, may need to be increased in future
+        # if you get warnings. See: https://valgrind.org/docs/manual/manual-core.html#opt.max-stackframe
+        );
+
+    run (ulimit_stack_unlimited()
+         . aslr_off()
+         . $valgrind_bin
+         . " " . verilator_bin()
+         . " " . join(' ', @quoted_sw));
 } elsif ($Debug) {
     # Debug
     run(ulimit_stack_unlimited()
@@ -137,30 +165,13 @@ sub debug {
 # Builds
 
 sub verilator_bin {
-    my $bin = "";
-    # Use VERILATOR_ROOT if defined, else assume verilator_bin is in the search path
     my $basename = ($ENV{VERILATOR_BIN}
                     || ($Debug ? "verilator_bin_dbg" : "verilator_bin"));
-    if (defined($ENV{VERILATOR_ROOT})) {
+    if (-x "$RealBin/$basename" || -x "$RealBin/$basename.exe") {
-        my $dir = $ENV{VERILATOR_ROOT};
+        return "$RealBin/$basename";
-        if (-x "$dir/bin/$basename"
-            || -x "$dir/bin/$basename.exe") {  # From a "make install" into VERILATOR_ROOT
-            $bin = "$dir/bin/$basename";
-        } else {
-            $bin = "$dir/$basename";  # From pointing to kit directory
-        }
     } else {
-        if (-x "$RealBin/$basename"
+        return $basename;  # Find in PATH
-            || -x "$RealBin/$basename.exe") {
-            $bin = "$RealBin/$basename";  # From path/to/verilator with verilator_bin installed
-        } else {
-            $bin = $basename;  # Find in PATH
-        }
-        # Note we don't look under bin/$basename which would be right if running
-        # in the kit dir. Running that would likely break, since
-        # VERILATOR_ROOT wouldn't be set and Verilator won't find internal files.
     }
-    return $bin;
 }
 
 #######################################################################
@@ -298,7 +309,9 @@ detailed descriptions of these arguments.
      +1800-2009ext+<ext>        Use SystemVerilog 2009 with file extension <ext>
      +1800-2012ext+<ext>        Use SystemVerilog 2012 with file extension <ext>
      +1800-2017ext+<ext>        Use SystemVerilog 2017 with file extension <ext>
+     +1800-2023ext+<ext>        Use SystemVerilog 2023 with file extension <ext>
     --assert                    Enable all assertions
+    --assert-case               Enable unique/unique0/priority case related checks
     --autoflush                 Flush streams after all $displays
     --bbox-sys                  Blackbox unknown $system calls
     --bbox-unsup                Blackbox unsupported language features
@@ -307,11 +320,11 @@ detailed descriptions of these arguments.
     --build-dep-bin <filename>  Override build dependency Verilator binary
     --build-jobs <jobs>         Parallelism for --build
     --cc                        Create C++ output
-    --cdc                       Clock domain crossing analysis
      -CFLAGS <flags>            C++ compiler arguments for makefile
     --clk <signal-name>         Mark specified signal as clock
     --no-clk <signal-name>      Prevent marking specified signal as clock
     --compiler <compiler-name>  Tune for specified C++ compiler
+    --compiler-include          Include additional header in the precompiled one
     --converge-limit <loops>    Tune convergence settle time
     --coverage                  Enable all coverage
     --coverage-line             Enable line coverage
@@ -325,7 +338,8 @@ detailed descriptions of these arguments.
     --no-debug-leak             Disable leaking memory in --debug mode
     --debugi <level>            Enable debugging at a specified level
     --debugi-<srcfile> <level>  Enable debugging a source file at a level
-    --no-decoration             Disable comments and symbol decorations
+    --decorations <level>       Set output comment and spacing level
+    --no-decoration             Disable comments and lower spacing level
     --default-language <lang>   Default language to parse
      +define+<var>=<value>      Set preprocessor define
     --dpi-hdr-only              Only produce the DPI header file
@@ -334,12 +348,16 @@ detailed descriptions of these arguments.
     --dump-graph                Enable dumping V3Graphs to .dot files
     --dump-tree                 Enable dumping Ast .tree files
     --dump-tree-addrids         Use short identifiers instead of addresses
+    --dump-tree-dot             Enable dumping Ast .tree.dot debug files
+    --dump-tree-json            Enable dumping Ast .tree.json files and .tree.meta.json file
     --dump-<srcfile>            Enable dumping everything in source file
     --dumpi-dfg <level>         Enable dumping DfgGraphs to .dot files at level
     --dumpi-graph <level>       Enable dumping V3Graphs to .dot files at level
     --dumpi-tree <level>        Enable dumping Ast .tree files at level
+    --dumpi-tree-json <level>   Enable dumping Ast .tree.json files at level
     --dumpi-<srcfile> <level>   Enable dumping everything in source file at level
      -E                         Preprocess, but do not compile
+    --emit-accessors            Emit getter and setter methods for model top class
     --error-limit <value>       Abort after this number of errors
     --exe                       Link to create executable
     --expand-limit <value>      Set expand optimization limit
@@ -347,6 +365,8 @@ detailed descriptions of these arguments.
      -f <file>                  Parse arguments from a file
      -FI <file>                 Force include of a file
     --flatten                   Force inlining of all modules, tasks and functions
+    --future0 <option>          Ignore an option for compatibility
+    --future1 <option>          Ignore an option with argument for compatibility
      -fno-<optimization>        Disable internal optimization stage
      -G<name>=<value>           Overwrite top-level parameter
     --gate-stmts <value>        Tune gate optimizer depth
@@ -355,8 +375,9 @@ detailed descriptions of these arguments.
     --generate-key              Create random key for --protect-key
     --getenv <var>              Get environment variable with defaults
     --get-supported <feature>   Get if feature is supported
-    --help                      Display this help
+    --help                      Show this help
     --hierarchical              Enable hierarchical Verilation
+    --hierarchical-params-file <name> Internal option that specifies parameters file for hier blocks
      -I<dir>                    Directory to search for includes
     --if-depth <value>          Tune IFDEPTH warning
      +incdir+<dir>              Directory to search for includes
@@ -369,9 +390,11 @@ detailed descriptions of these arguments.
     --lib-create <name>         Create a DPI library
      +libext+<ext>+[ext]...     Extensions for finding modules
     --lint-only                 Lint, but do not make output
+    --localize-max-size <value>  Tune localize optimization variable size
     --make <build-tool>         Generate scripts for specified build tool
      -MAKEFLAGS <flags>         Arguments to pass to make during --build
     --main                      Generate C++ main() file
+    --main-top-name             Specify top name passed to Verilated model in generated C++ main
     --max-num-width <value>     Maximum number width (default: 64K)
     --Mdir <directory>          Name of output object directory
     --MMD                       Create .d dependency files
@@ -382,14 +405,15 @@ detailed descriptions of these arguments.
      -O3                        High-performance optimizations
      -O<optimization-letter>    Selectable optimizations
      -o <executable>            Name of final executable
-    --no-order-clock-delay      Disable ordering clock enable assignments
     --output-split <statements>          Split .cpp files into pieces
     --output-split-cfuncs <statements>   Split model functions
     --output-split-ctrace <statements>   Split tracing functions
      -P                         Disable line numbers and blanks with -E
     --pins-bv <bits>            Specify types for top-level ports
+    --pins-inout-enables        Specify that __en and __out signals be created for inouts
     --pins-sc-biguint           Specify types for top-level ports
     --pins-sc-uint              Specify types for top-level ports
+    --pins-sc-uint-bool         Specify types for top-level ports
     --pins-uint8                Specify types for top-level ports
     --no-pins64                 Don't use uint64_t's for 33-64 bit sigs
     --pipe-filter <command>     Filter all input through a script
@@ -403,24 +427,29 @@ detailed descriptions of these arguments.
     --protect-ids               Hash identifier names for obscurity
     --protect-key <key>         Key for symbol protection
     --protect-lib <name>        Create a DPI protected library
-    --public                    Debugging; see docs
+    --public                    Mark signals as public; see docs
+    --public-depth <level>      Mark public to specified module depth
     --public-params             Mark all parameters as public_flat
     --public-flat-rw            Mark all variables, etc as public_flat_rw
      -pvalue+<name>=<value>     Overwrite toplevel parameter
+    --quiet                     Minimize additional printing
     --quiet-exit                Don't print the command on failure
+    --quiet-stats               Don't print statistics
     --relative-includes         Resolve includes relative to current file
     --reloop-limit              Minimum iterations for forming loops
     --report-unoptflat          Extra diagnostics for UNOPTFLAT
     --rr                        Run Verilator and record with rr
+    --runtime-debug             Enable model runtime debugging
     --savable                   Enable model save-restore
     --sc                        Create SystemC output
     --no-skip-identical         Disable skipping identical output
     --stats                     Create statistics file
     --stats-vars                Provide statistics on variables
     --no-std                    Prevent parsing standard library
+    --no-stop-fail              Do not call $stop when assertion fails
     --structs-packed            Convert all unpacked structures to packed structures
      -sv                        Enable SystemVerilog parsing
-     +systemverilogext+<ext>    Synonym for +1800-2017ext+<ext>
+     +systemverilogext+<ext>    Synonym for +1800-2023ext+<ext>
     --threads <threads>         Enable multithreading
     --threads-dpi <mode>        Enable multithreaded DPI
     --threads-max-mtasks <mtasks>  Tune maximum mtask partitioning
@@ -434,11 +463,12 @@ detailed descriptions of these arguments.
     --trace-coverage            Enable tracing of coverage
     --trace-depth <levels>      Depth of tracing
     --trace-fst                 Enable FST waveform creation
-    --trace-max-array <depth>   Maximum bit width for tracing
+    --trace-max-array <depth>   Maximum array depth for tracing
-    --trace-max-width <width>   Maximum array depth for tracing
+    --trace-max-width <width>   Maximum bit width for tracing
     --trace-params              Enable tracing of parameters
     --trace-structs             Enable tracing structure names
     --trace-threads <threads>   Enable FST waveform creation on separate threads
+    --no-trace-top              Do not emit traces for signals in the top module generated by verilator
     --trace-underscore          Enable tracing of _signals
      -U<var>                    Undefine preprocessor define
     --no-unlimited-stack        Don't disable stack size limit
@@ -447,11 +477,12 @@ detailed descriptions of these arguments.
     --unused-regexp <regexp>    Tune UNUSED lint signals
      -V                         Verbose version and config
      -v <filename>              Verilog library
+    --valgrind                  Run Verilator under valgrind
     --verilate-jobs             Job threads for Verilation stage
     --no-verilate               Skip Verilation and just compile previously Verilated code
      +verilog1995ext+<ext>      Synonym for +1364-1995ext+<ext>
      +verilog2001ext+<ext>      Synonym for +1364-2001ext+<ext>
-    --version                   Displays program version and exits
+    --version                   Show program version and exits
     --vpi                       Enable VPI compiles
     --waiver-output <filename>  Create a waiver file based on the linter warnings
      -Wall                      Enable all style warnings
@@ -469,6 +500,11 @@ detailed descriptions of these arguments.
     --x-assign <mode>           Assign non-initial Xs to this value
     --x-initial <mode>          Assign initial Xs to this value
     --x-initial-edge            Enable initial X->0 and X->1 edge triggers
+    --no-json-edit-nums         Don't dump editNum in .tree.json files
+    --no-json-ids               Don't use short identifiers instead of adresses/paths in .tree.json
+    --json-only                 Create JSON parser output (.tree.json and .meta.json)
+    --json-only-output          .tree.json output filename
+    --json-only-meta-output     .tree.meta.json output filename
     --xml-only                  Create XML parser output
     --xml-output                XML output filename
      -y <dir>                   Directory to search for modules
@@ -480,26 +516,28 @@ description of these arguments.
 
 =for VL_SPHINX_EXTRACT "_build/gen/args_verilated.rst"
 
-     +verilator+debug                  Enable debugging
+     +verilator+debug                      Enable debugging
-     +verilator+debugi+<value>         Enable debugging at a level
+     +verilator+debugi+<value>             Enable debugging at a level
-     +verilator+error+limit+<value>    Set error limit
+     +verilator+coverage+file+<filename>   Set coverage output filename
-     +verilator+help                   Display help
+     +verilator+error+limit+<value>        Set error limit
-     +verilator+noassert               Disable assert checking
+     +verilator+help                       Show help
+     +verilator+noassert                   Disable assert checking
      +verilator+prof+exec+file+<filename>  Set execution profile filename
      +verilator+prof+exec+start+<value>    Set execution profile starting point
      +verilator+prof+exec+window+<value>   Set execution profile duration
      +verilator+prof+vlt+file+<filename>   Set PGO profile filename
-     +verilator+rand+reset+<value>     Set random reset technique
+     +verilator+quiet                      Minimize additional printing
-     +verilator+seed+<value>           Set random seed
+     +verilator+rand+reset+<value>         Set random reset technique
-     +verilator+V                      Verbose version and config
+     +verilator+seed+<value>               Set random seed
-     +verilator+version                Show version and exit
+     +verilator+V                          Show verbose version and config
+     +verilator+version                    Show version and exit
 
 
 =head1 DISTRIBUTION
 
 The latest version is available from L<https://verilator.org>.
 
-Copyright 2003-2023 by Wilson Snyder. This program is free software; you can
+Copyright 2003-2024 by Wilson Snyder. This program is free software; you can
 redistribute it and/or modify the Verilator internals under the terms of
 either the GNU Lesser General Public License Version 3 or the Perl Artistic
 License Version 2.0.

bin/verilator_ccache_report

@@ -17,7 +17,7 @@ parser = argparse.ArgumentParser(
     For documentation see
     https://verilator.org/guide/latest/exe_verilator_ccache_report.html""",
     epilog=
-    """Copyright 2002-2023 by Wilson Snyder. This program is free software; you
+    """Copyright 2002-2024 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

bin/verilator_coverage

@@ -1,7 +1,7 @@
 #!/usr/bin/env perl
 ######################################################################
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2024 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -154,9 +154,9 @@ verilator_coverage - Verilator coverage analyzer
 
     verilator_coverage --annotate <obj>
 
-    verilator_coverage  -write merged.dat -read <datafiles>...
+    verilator_coverage  -write merged.dat <datafiles>...
 
-    verilator_coverage  -write-info merged.info -read <datafiles>...
+    verilator_coverage  -write-info merged.info <datafiles>...
 
 Verilator_coverage processes Verilated model-generated coverage reports.
 
@@ -177,18 +177,18 @@ L<https://verilator.org/guide/latest/exe_verilator_coverage.html>.
     --write <filename>            Write aggregate coverage results.
     --write-info <filename.info>  Write lcov .info.
 
-    +libext+I<ext>+I<ext>...      Extensions for Verilog files.
+    +libext+<ext>+<ext>...        Extensions for Verilog files.
-    +define+I<var>+I<value>       Defines the given variable.
+    +define+<var>+<value>         Defines the given variable.
-    -DI<var>=I<value>             Defines the given variable.
+    -D<var>=<value>               Defines the given variable.
-    +incdir+I<dir>                Add directory for finding include files.
+    +incdir+<dir>                 Add directory for finding include files.
-    -II<dir>                      Add directory for finding include files.
+    -I<dir>                       Add directory for finding include files.
-    -y I<dir>                     Specifies module search directory.
+    -y <dir>                      Specifies module search directory.
 
 =head1 DISTRIBUTION
 
 The latest version is available from L<https://verilator.org>.
 
-Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+Copyright 2003-2024 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify the Verilator internals under the terms
 of either the GNU Lesser General Public License Version 3 or the Perl
 Artistic License Version 2.0.

bin/verilator_difftree

@@ -110,7 +110,7 @@ Verilator_difftree is used for debugging Verilator tree output files.
 It performs a diff between two files, or all files common between two
 directories, ignoring irrelevant pointer differences.""",
     epilog=
-    """Copyright 2005-2023 by Wilson Snyder. This program is free software; you
+    """Copyright 2005-2024 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

bin/verilator_gantt

@@ -1,33 +1,32 @@
 #!/usr/bin/env python3
-# pylint: disable=C0103,C0114,C0116,C0209,C0301,R0914,R0912,R0915,W0511,eval-used
+# pylint: disable=C0103,C0114,C0116,C0209,C0301,R0914,R0912,R0915,W0511,W0603,eval-used
 ######################################################################
 
 import argparse
+import bisect
 import collections
 import math
 import re
 import statistics
 # from pprint import pprint
 
-Threads = collections.defaultdict(lambda: collections.defaultdict(lambda: {}))
+Sections = []
-Mtasks = collections.defaultdict(lambda: {})
+LongestVcdStrValueLength = 0
-Evals = collections.defaultdict(lambda: {})
+Threads = collections.defaultdict(lambda: [])  # List of records per thread id
-EvalLoops = collections.defaultdict(lambda: {})
+Mtasks = collections.defaultdict(lambda: {'elapsed': 0, 'end': 0})
+Cpus = collections.defaultdict(lambda: {'mtask_time': 0})
 Global = {
     'args': {},
     'cpuinfo': collections.defaultdict(lambda: {}),
-    'rdtsc_cycle_time': 0,
     'stats': {}
 }
+ElapsedTime = None  # total elapsed time
+ExecGraphTime = 0  # total elapsed time excuting an exec graph
+ExecGraphIntervals = []  # list of (start, end) pairs
 
 ######################################################################
 
 
-def process(filename):
-    read_data(filename)
-    report()
-
-
 def read_data(filename):
     with open(filename, "r", encoding="utf8") as fh:
         re_thread = re.compile(r'^VLPROFTHREAD (\d+)$')
@@ -39,14 +38,17 @@ def read_data(filename):
         re_arg1 = re.compile(r'VLPROF arg\s+(\S+)\+([0-9.]*)\s*')
         re_arg2 = re.compile(r'VLPROF arg\s+(\S+)\s+([0-9.]*)\s*$')
         re_stat = re.compile(r'VLPROF stat\s+(\S+)\s+([0-9.]+)')
-        re_time = re.compile(r'rdtsc time = (\d+) ticks')
         re_proc_cpu = re.compile(r'VLPROFPROC processor\s*:\s*(\d+)\s*$')
         re_proc_dat = re.compile(r'VLPROFPROC ([a-z_ ]+)\s*:\s*(.*)$')
         cpu = None
         thread = None
+        execGraphStart = None
 
-        lastEvalBeginTick = None
+        global LongestVcdStrValueLength
-        lastEvalLoopBeginTick = None
+        global ExecGraphTime
+
+        SectionStack = []
+        mTaskThread = {}
 
         for line in fh:
             recordMatch = re_record.match(line)
@@ -54,29 +56,31 @@ def read_data(filename):
                 kind, tick, payload = recordMatch.groups()
                 tick = int(tick)
                 payload = payload.strip()
-                if kind == "EVAL_BEGIN":
+                if kind == "SECTION_PUSH":
-                    Evals[tick]['start'] = tick
+                    LongestVcdStrValueLength = max(LongestVcdStrValueLength,
-                    lastEvalBeginTick = tick
+                                                   len(payload))
-                elif kind == "EVAL_END":
+                    SectionStack.append(payload)
-                    Evals[lastEvalBeginTick]['end'] = tick
+                    Sections.append((tick, tuple(SectionStack)))
-                    lastEvalBeginTick = None
+                elif kind == "SECTION_POP":
-                elif kind == "EVAL_LOOP_BEGIN":
+                    assert SectionStack, "SECTION_POP without SECTION_PUSH"
-                    EvalLoops[tick]['start'] = tick
+                    SectionStack.pop()
-                    lastEvalLoopBeginTick = tick
+                    Sections.append((tick, tuple(SectionStack)))
-                elif kind == "EVAL_LOOP_END":
-                    EvalLoops[lastEvalLoopBeginTick]['end'] = tick
-                    lastEvalLoopBeginTick = None
                 elif kind == "MTASK_BEGIN":
                     mtask, predict_start, ecpu = re_payload_mtaskBegin.match(
                         payload).groups()
                     mtask = int(mtask)
                     predict_start = int(predict_start)
                     ecpu = int(ecpu)
-                    Threads[thread][tick]['mtask'] = mtask
+                    mTaskThread[mtask] = thread
-                    Threads[thread][tick]['predict_start'] = predict_start
+                    records = Threads[thread]
-                    Threads[thread][tick]['cpu'] = ecpu
+                    assert not records or records[-1]['start'] <= records[-1][
-                    if 'elapsed' not in Mtasks[mtask]:
+                        'end'] <= tick
-                        Mtasks[mtask] = {'end': 0, 'elapsed': 0}
+                    records.append({
+                        'start': tick,
+                        'mtask': mtask,
+                        'predict_start': predict_start,
+                        'cpu': ecpu
+                    })
                     Mtasks[mtask]['begin'] = tick
                     Mtasks[mtask]['thread'] = thread
                     Mtasks[mtask]['predict_start'] = predict_start
@@ -86,11 +90,18 @@ def read_data(filename):
                     mtask = int(mtask)
                     predict_cost = int(predict_cost)
                     begin = Mtasks[mtask]['begin']
-                    Threads[thread][begin]['end'] = tick
+                    record = Threads[mTaskThread[mtask]][-1]
-                    Threads[thread][begin]['predict_cost'] = predict_cost
+                    record['end'] = tick
+                    record['predict_cost'] = predict_cost
                     Mtasks[mtask]['elapsed'] += tick - begin
                     Mtasks[mtask]['predict_cost'] = predict_cost
                     Mtasks[mtask]['end'] = max(Mtasks[mtask]['end'], tick)
+                elif kind == "EXEC_GRAPH_BEGIN":
+                    execGraphStart = tick
+                elif kind == "EXEC_GRAPH_END":
+                    ExecGraphTime += tick - execGraphStart
+                    ExecGraphIntervals.append((execGraphStart, tick))
+                    execGraphStart = None
                 elif Args.debug:
                     print("-Unknown execution trace record: %s" % line)
             elif re_thread.match(line):
@@ -109,7 +120,7 @@ def read_data(filename):
             elif re_proc_cpu.match(line):
                 match = re_proc_cpu.match(line)
                 cpu = int(match.group(1))
-            elif cpu and re_proc_dat.match(line):
+            elif cpu is not None and re_proc_dat.match(line):
                 match = re_proc_dat.match(line)
                 term = match.group(1)
                 value = match.group(2)
@@ -121,11 +132,6 @@ def read_data(filename):
                 pass
             elif Args.debug:
                 print("-Unk: %s" % line)
-            # TODO -- this is parsing text printed by a client.
-            # Really, verilator proper should generate this
-            # if it's useful...
-            if re_time.match(line):
-                Global['rdtsc_cycle_time'] = re_time.group(1)
 
 
 def re_match_result(regexp, line, result_to):
@@ -144,125 +150,33 @@ def report():
         plus = "+" if re.match(r'^\+', arg) else " "
         print("  %s%s%s" % (arg, plus, Global['args'][arg]))
 
+    for records in Threads.values():
+        for record in records:
+            cpu = record['cpu']
+            elapsed = record['end'] - record['start']
+            Cpus[cpu]['mtask_time'] += elapsed
+
+    global ElapsedTime
+    ElapsedTime = int(Global['stats']['ticks'])
     nthreads = int(Global['stats']['threads'])
-    Global['cpus'] = {}
+    ncpus = max(len(Cpus), 1)
-    for thread in Threads:
-        # Make potentially multiple characters per column
-        for start in Threads[thread]:
-            if not Threads[thread][start]:
-                continue
-            cpu = Threads[thread][start]['cpu']
-            elapsed = Threads[thread][start]['end'] - start
-            if cpu not in Global['cpus']:
-                Global['cpus'][cpu] = {'cpu_time': 0}
-            Global['cpus'][cpu]['cpu_time'] += elapsed
 
-    measured_mt_mtask_time = 0
+    print("\nSummary:")
-    predict_mt_mtask_time = 0
+    print("  Total elapsed time = {} rdtsc ticks".format(ElapsedTime))
-    long_mtask_time = 0
+    print("  Parallelized code  = {:.2%} of elapsed time".format(
-    measured_last_end = 0
+        ExecGraphTime / ElapsedTime))
-    predict_last_end = 0
+    print("  Total threads      = %d" % nthreads)
-    for mtask in Mtasks:
+    print("  Total CPUs used    = %d" % ncpus)
-        measured_mt_mtask_time += Mtasks[mtask]['elapsed']
+    print("  Total mtasks       = %d" % len(Mtasks))
-        predict_mt_mtask_time += Mtasks[mtask]['predict_cost']
+    print("  Total yields       = %d" % int(Global['stats'].get('yields', 0)))
-        measured_last_end = max(measured_last_end, Mtasks[mtask]['end'])
-        predict_last_end = max(
-            predict_last_end,
-            Mtasks[mtask]['predict_start'] + Mtasks[mtask]['predict_cost'])
-        long_mtask_time = max(long_mtask_time, Mtasks[mtask]['elapsed'])
-    Global['measured_last_end'] = measured_last_end
-    Global['predict_last_end'] = predict_last_end
-
-    # If we know cycle time in the same (rdtsc) units,
-    # this will give us an actual utilization number,
-    # (how effectively we keep the cores busy.)
-    #
-    # It also gives us a number we can compare against
-    # serial mode, to estimate the overhead of data sharing,
-    # which will show up in the total elapsed time. (Overhead
-    # of synchronization and scheduling should not.)
-    print("\nAnalysis:")
-    print("  Total threads             = %d" % nthreads)
-    print("  Total mtasks              = %d" % len(Mtasks))
-    ncpus = max(len(Global['cpus']), 1)
-    print("  Total cpus used           = %d" % ncpus)
-    print("  Total yields              = %d" %
-          int(Global['stats'].get('yields', 0)))
-    print("  Total evals               = %d" % len(Evals))
-    print("  Total eval loops          = %d" % len(EvalLoops))
-    if Mtasks:
-        print("  Total eval time           = %d rdtsc ticks" %
-              Global['measured_last_end'])
-        print("  Longest mtask time        = %d rdtsc ticks" % long_mtask_time)
-        print("  All-thread mtask time     = %d rdtsc ticks" %
-              measured_mt_mtask_time)
-        long_efficiency = long_mtask_time / (Global.get(
-            'measured_last_end', 1) or 1)
-        print("  Longest-thread efficiency = %0.1f%%" %
-              (long_efficiency * 100.0))
-        mt_efficiency = measured_mt_mtask_time / (
-            Global.get('measured_last_end', 1) * nthreads or 1)
-        print("  All-thread efficiency     = %0.1f%%" %
-              (mt_efficiency * 100.0))
-        print("  All-thread speedup        = %0.1f" %
-              (mt_efficiency * nthreads))
-        if Global['rdtsc_cycle_time'] > 0:
-            ut = measured_mt_mtask_time / Global['rdtsc_cycle_time']
-            print("tot_mtask_cpu=" + measured_mt_mtask_time + " cyc=" +
-                  Global['rdtsc_cycle_time'] + " ut=" + ut)
-
-        predict_mt_efficiency = predict_mt_mtask_time / (
-            Global.get('predict_last_end', 1) * nthreads or 1)
-        print("\nPrediction (what Verilator used for scheduling):")
-        print("  All-thread efficiency     = %0.1f%%" %
-              (predict_mt_efficiency * 100.0))
-        print("  All-thread speedup        = %0.1f" %
-              (predict_mt_efficiency * nthreads))
-
-        p2e_ratios = []
-        min_p2e = 1000000
-        min_mtask = None
-        max_p2e = -1000000
-        max_mtask = None
-
-        for mtask in sorted(Mtasks.keys()):
-            if Mtasks[mtask]['elapsed'] > 0:
-                if Mtasks[mtask]['predict_cost'] == 0:
-                    Mtasks[mtask]['predict_cost'] = 1  # don't log(0) below
-                p2e_ratio = math.log(Mtasks[mtask]['predict_cost'] /
-                                     Mtasks[mtask]['elapsed'])
-                p2e_ratios.append(p2e_ratio)
-
-                if p2e_ratio > max_p2e:
-                    max_p2e = p2e_ratio
-                    max_mtask = mtask
-                if p2e_ratio < min_p2e:
-                    min_p2e = p2e_ratio
-                    min_mtask = mtask
-
-        print("\nMTask statistics:")
-        print("  min log(p2e) = %0.3f" % min_p2e, end="")
-        print("  from mtask %d (predict %d," %
-              (min_mtask, Mtasks[min_mtask]['predict_cost']),
-              end="")
-        print(" elapsed %d)" % Mtasks[min_mtask]['elapsed'])
-        print("  max log(p2e) = %0.3f" % max_p2e, end="")
-        print("  from mtask %d (predict %d," %
-              (max_mtask, Mtasks[max_mtask]['predict_cost']),
-              end="")
-        print(" elapsed %d)" % Mtasks[max_mtask]['elapsed'])
-
-        stddev = statistics.pstdev(p2e_ratios)
-        mean = statistics.mean(p2e_ratios)
-        print("  mean = %0.3f" % mean)
-        print("  stddev = %0.3f" % stddev)
-        print("  e ^ stddev = %0.3f" % math.exp(stddev))
 
+    report_mtasks()
     report_cpus()
+    report_sections()
 
     if nthreads > ncpus:
         print()
-        print("%%Warning: There were fewer CPUs (%d) then threads (%d)." %
+        print("%%Warning: There were fewer CPUs (%d) than threads (%d)." %
               (ncpus, nthreads))
         print("        : See docs on use of numactl.")
     else:
@@ -279,32 +193,130 @@ def report():
     print()
 
 
+def report_mtasks():
+    if not Mtasks:
+        return
+
+    nthreads = int(Global['stats']['threads'])
+
+    # If we know cycle time in the same (rdtsc) units,
+    # this will give us an actual utilization number,
+    # (how effectively we keep the cores busy.)
+    #
+    # It also gives us a number we can compare against
+    # serial mode, to estimate the overhead of data sharing,
+    # which will show up in the total elapsed time. (Overhead
+    # of synchronization and scheduling should not.)
+    total_mtask_time = 0
+    thread_mtask_time = collections.defaultdict(lambda: 0)
+    long_mtask_time = 0
+    long_mtask = None
+    predict_mtask_time = 0
+    predict_elapsed = 0
+    for mtaskId in Mtasks:
+        record = Mtasks[mtaskId]
+        predict_mtask_time += record['predict_cost']
+        total_mtask_time += record['elapsed']
+        thread_mtask_time[record['thread']] += record['elapsed']
+        predict_end = record['predict_start'] + record['predict_cost']
+        predict_elapsed = max(predict_elapsed, predict_end)
+        if record['elapsed'] > long_mtask_time:
+            long_mtask_time = record['elapsed']
+            long_mtask = mtaskId
+    Global['predict_last_end'] = predict_elapsed
+
+    serialTime = ElapsedTime - ExecGraphTime
+
+    def subReport(elapsed, work):
+        print("  Thread utilization = {:7.2%}".format(work /
+                                                      (elapsed * nthreads)))
+        print("  Speedup            = {:6.3}x".format(work / elapsed))
+
+    print("\nParallelized code, measured:")
+    subReport(ExecGraphTime, total_mtask_time)
+
+    print("\nParallelized code, predicted during static scheduling:")
+    subReport(predict_elapsed, predict_mtask_time)
+
+    print("\nAll code, measured:")
+    subReport(ElapsedTime, serialTime + total_mtask_time)
+
+    print("\nAll code, measured, scaled by predicted speedup:")
+    expectedParallelSpeedup = predict_mtask_time / predict_elapsed
+    scaledElapsed = serialTime + total_mtask_time / expectedParallelSpeedup
+    subReport(scaledElapsed, serialTime + total_mtask_time)
+
+    p2e_ratios = []
+    min_p2e = 1000000
+    min_mtask = None
+    max_p2e = -1000000
+    max_mtask = None
+
+    for mtask in sorted(Mtasks.keys()):
+        if Mtasks[mtask]['elapsed'] > 0:
+            if Mtasks[mtask]['predict_cost'] == 0:
+                Mtasks[mtask]['predict_cost'] = 1  # don't log(0) below
+            p2e_ratio = math.log(Mtasks[mtask]['predict_cost'] /
+                                 Mtasks[mtask]['elapsed'])
+            p2e_ratios.append(p2e_ratio)
+
+            if p2e_ratio > max_p2e:
+                max_p2e = p2e_ratio
+                max_mtask = mtask
+            if p2e_ratio < min_p2e:
+                min_p2e = p2e_ratio
+                min_mtask = mtask
+
+    print("\nMTask statistics:")
+    print("  Longest mtask id = {}".format(long_mtask))
+    print("  Longest mtask time = {:.2%} of time elapsed in parallelized code".
+          format(long_mtask_time / ExecGraphTime))
+    print("  min log(p2e) = %0.3f" % min_p2e, end="")
+
+    print("  from mtask %d (predict %d," %
+          (min_mtask, Mtasks[min_mtask]['predict_cost']),
+          end="")
+    print(" elapsed %d)" % Mtasks[min_mtask]['elapsed'])
+    print("  max log(p2e) = %0.3f" % max_p2e, end="")
+    print("  from mtask %d (predict %d," %
+          (max_mtask, Mtasks[max_mtask]['predict_cost']),
+          end="")
+    print(" elapsed %d)" % Mtasks[max_mtask]['elapsed'])
+
+    stddev = statistics.pstdev(p2e_ratios)
+    mean = statistics.mean(p2e_ratios)
+    print("  mean = %0.3f" % mean)
+    print("  stddev = %0.3f" % stddev)
+    print("  e ^ stddev = %0.3f" % math.exp(stddev))
+
+
 def report_cpus():
-    print("\nCPUs:")
+    print("\nCPU info:")
 
     Global['cpu_sockets'] = collections.defaultdict(lambda: 0)
     Global['cpu_socket_cores'] = collections.defaultdict(lambda: 0)
 
-    for cpu in sorted(Global['cpus'].keys()):
+    print("   Id | Time spent executing MTask | Socket | Core | Model")
-        print("  cpu %d: " % cpu, end='')
+    print("      | % of elapsed ticks / ticks |        |      |")
-        print("cpu_time=%d" % Global['cpus'][cpu]['cpu_time'], end='')
+    print("  ====|============================|========|======|======")
-
+    for cpu in sorted(Cpus):
-        socket = None
+        socket = ""
+        core = ""
+        model = ""
         if cpu in Global['cpuinfo']:
             cpuinfo = Global['cpuinfo'][cpu]
             if 'physical_id' in cpuinfo and 'core_id' in cpuinfo:
-                socket = int(cpuinfo['physical_id'])
+                socket = cpuinfo['physical_id']
                 Global['cpu_sockets'][socket] += 1
-                print(" socket=%d" % socket, end='')
+                core = cpuinfo['core_id']
-
+                Global['cpu_socket_cores'][socket + "__" + core] += 1
-                core = int(cpuinfo['core_id'])
-                Global['cpu_socket_cores'][str(socket) + "__" + str(core)] += 1
-                print(" core=%d" % core, end='')
 
             if 'model_name' in cpuinfo:
                 model = cpuinfo['model_name']
-                print("  %s" % model, end='')
+
-        print()
+        print("  {:3d} | {:7.2%} / {:16d} | {:>6s} | {:>4s} | {}".format(
+            cpu, Cpus[cpu]['mtask_time'] / ElapsedTime,
+            Cpus[cpu]['mtask_time'], socket, core, model))
 
     if len(Global['cpu_sockets']) > 1:
         Global['cpu_sockets_warning'] = True
@@ -313,25 +325,68 @@ def report_cpus():
                 Global['cpu_socket_cores_warning'] = True
 
 
+def report_sections():
+    if not Sections:
+        return
+    print("\nSection profile:")
+
+    totalTime = collections.defaultdict(lambda: 0)
+    selfTime = collections.defaultdict(lambda: 0)
+
+    sectionTree = [0, {}, 1]  # [selfTime, childTrees, numberOfTimesEntered]
+    prevTime = 0
+    prevStack = ()
+    for time, stack in Sections:
+        if len(stack) > len(prevStack):
+            scope = sectionTree
+            for item in stack:
+                scope = scope[1].setdefault(item, [0, {}, 0])
+            scope[2] += 1
+        dt = time - prevTime
+        scope = sectionTree
+        for item in prevStack:
+            scope = scope[1].setdefault(item, [0, {}, 0])
+        scope[0] += dt
+
+        if prevStack:
+            for name in prevStack:
+                totalTime[name] += dt
+            selfTime[prevStack[-1]] += dt
+        prevTime = time
+        prevStack = stack
+
+    def treeSum(tree):
+        n = tree[0]
+        for subTree in tree[1].values():
+            n += treeSum(subTree)
+        return n
+
+    # Make sure the tree sums to the elapsed time
+    sectionTree[0] += ElapsedTime - treeSum(sectionTree)
+
+    def printTree(prefix, name, entries, tree):
+        print("  {:7.2%} | {:7.2%} | {:8} | {:10.2f} | {}".format(
+            treeSum(tree) / ElapsedTime, tree[0] / ElapsedTime, tree[2],
+            tree[2] / entries, prefix + name))
+        for k in sorted(tree[1], key=lambda _: -treeSum(tree[1][_])):
+            printTree(prefix + "  ", k, tree[2], tree[1][k])
+
+    print(" Total    | Self    | Total    | Relative   | Section")
+    print(" time     | time    | entries  | entries    |  name  ")
+    print("==========|=========|==========|============|========")
+    printTree("", "*TOTAL*", 1, sectionTree)
+
+
 ######################################################################
 
 
 def write_vcd(filename):
     print("Writing %s" % filename)
     with open(filename, "w", encoding="utf8") as fh:
-        vcd = {
+        # dict of dicts of hierarchy elements/signal name  -> (code, width)
-            'values':
+        scopeSigs = {}
-            collections.defaultdict(lambda: {}),  # {<time>}{<code>} = value
+        # map from time -> code -> value
-            'sigs': {
+        values = collections.defaultdict(lambda: {})
-                'predicted_threads': {},
-                'measured_threads': {},
-                'cpus': {},
-                'evals': {},
-                'mtasks': {},
-                'Stats': {}
-            }  # {<module>}{<sig}} = code
-        }
-        code = 0
 
         parallelism = {
             'measured': collections.defaultdict(lambda: 0),
@@ -340,132 +395,139 @@ def write_vcd(filename):
         parallelism['measured'][0] = 0
         parallelism['predicted'][0] = 0
 
-        # Measured graph
+        nextFreeCode = 0
-        for thread in sorted(Threads.keys()):
-            sig = "thread%d_mtask" % thread
-            if sig not in vcd['sigs']['measured_threads']:
-                vcd['sigs']['measured_threads'][sig] = code
-                code += 1
-            mcode = vcd['sigs']['measured_threads'][sig]
 
-            for start in sorted(Threads[thread]):
+        def getCode(width, *names):
-                mtask = Threads[thread][start]['mtask']
+            nonlocal nextFreeCode
-                end = Threads[thread][start]['end']
+            scope = scopeSigs
-                cpu = Threads[thread][start]['cpu']
+            *path, name = names
-                vcd['values'][start][mcode] = mtask
+            for item in path:
-                vcd['values'][end][mcode] = None
+                scope = scope.setdefault(item, {})
+            code, oldWidth = scope.setdefault(name, (nextFreeCode, width))
+            assert oldWidth == width
+            if code == nextFreeCode:
+                nextFreeCode += 1
+            return code
+
+        def addValue(code, time, val):
+            if isinstance(val, str):
+                buf = ""
+                for c in val:
+                    buf += bin(ord(c))[2:].rjust(8, "0")
+                val = buf.ljust(LongestVcdStrValueLength * 8, "0")
+            values[time][code] = val
+
+        # Measured graph
+        for thread in sorted(Threads):
+            mcode = getCode(32, 'measured', 't%d_mtask' % thread)
+            for record in Threads[thread]:
+                start = record['start']
+                mtask = record['mtask']
+                end = record['end']
+                cpu = record['cpu']
+                addValue(mcode, start, mtask)
+                addValue(mcode, end, None)
                 parallelism['measured'][start] += 1
                 parallelism['measured'][end] -= 1
 
-                sig = "cpu%d_thread" % cpu
+                code = getCode(32, 'measured', 'cpu%d_thread' % cpu)
-                if sig not in vcd['sigs']['cpus']:
+                addValue(code, start, thread)
-                    vcd['sigs']['cpus'][sig] = code
+                addValue(code, end, None)
-                    code += 1
-                ccode = vcd['sigs']['cpus'][sig]
-                vcd['values'][start][ccode] = thread
-                vcd['values'][end][ccode] = None
 
-                sig = "mtask%d_cpu" % mtask
+                code = getCode(32, 'measured', 'cpu%d_mtask' % cpu)
-                if sig not in vcd['sigs']['mtasks']:
+                addValue(code, start, mtask)
-                    vcd['sigs']['mtasks'][sig] = code
+                addValue(code, end, None)
-                    code += 1
-                ccode = vcd['sigs']['mtasks'][sig]
-                vcd['values'][start][ccode] = cpu
-                vcd['values'][end][ccode] = None
 
-        # Eval graph
+        tStart = sorted(_['start'] for records in Threads.values()
-        vcd['sigs']['evals']["eval"] = code
+                        for _ in records)
-        elcode = code
+        tEnd = sorted(_['end'] for records in Threads.values()
-        code += 1
+                      for _ in records)
-        n = 0
-        for eval_start in Evals:
-            eval_end = Evals[eval_start]['end']
-            n += 1
-            vcd['values'][eval_start][elcode] = n
-            vcd['values'][eval_end][elcode] = None
 
-        # Eval_loop graph
+        # Predicted graph
-        vcd['sigs']['evals']["eval_loop"] = code
+        for start, end in ExecGraphIntervals:
-        elcode = code
+            # Find the earliest MTask start after the start point, and the
-        code += 1
+            # latest MTask end before the end point, so we can scale to the
-        n = 0
+            # same range
-        for eval_start in EvalLoops:
+            start = tStart[bisect.bisect_left(tStart, start)]
-            eval_end = EvalLoops[eval_start]['end']
+            end = tEnd[bisect.bisect_right(tEnd, end) - 1]
-            n += 1
+            # Compute scale so predicted graph is of same width as interval
-            vcd['values'][eval_start][elcode] = n
+            measured_scaling = (end - start) / Global['predict_last_end']
-            vcd['values'][eval_end][elcode] = None
+            # Predict mtasks that fill the time the execution occupied
+            for mtask in Mtasks:
+                thread = Mtasks[mtask]['thread']
+                pred_scaled_start = start + int(
+                    Mtasks[mtask]['predict_start'] * measured_scaling)
+                pred_scaled_end = start + int(
+                    (Mtasks[mtask]['predict_start'] +
+                     Mtasks[mtask]['predict_cost']) * measured_scaling)
+                if pred_scaled_start == pred_scaled_end:
+                    continue
 
-        if Mtasks:
+                mcode = getCode(32, 'predicted', 't%d_mtask' % thread)
-            # Predicted graph
+                addValue(mcode, pred_scaled_start, mtask)
-            for eval_start in EvalLoops:
+                addValue(mcode, pred_scaled_end, None)
-                eval_end = EvalLoops[eval_start]['end']
-                # Compute scale so predicted graph is of same width as eval
-                measured_scaling = (eval_end -
-                                    eval_start) / Global['predict_last_end']
-                # Predict mtasks that fill the time the eval occupied
-                for mtask in Mtasks:
-                    thread = Mtasks[mtask]['thread']
-                    pred_scaled_start = eval_start + int(
-                        Mtasks[mtask]['predict_start'] * measured_scaling)
-                    pred_scaled_end = eval_start + int(
-                        (Mtasks[mtask]['predict_start'] +
-                         Mtasks[mtask]['predict_cost']) * measured_scaling)
-                    if pred_scaled_start == pred_scaled_end:
-                        continue
 
-                    sig = "predicted_thread%d_mtask" % thread
+                parallelism['predicted'][pred_scaled_start] += 1
-                    if sig not in vcd['sigs']['predicted_threads']:
+                parallelism['predicted'][pred_scaled_end] -= 1
-                        vcd['sigs']['predicted_threads'][sig] = code
-                        code += 1
-                    mcode = vcd['sigs']['predicted_threads'][sig]
 
-                    vcd['values'][pred_scaled_start][mcode] = mtask
+        # Parallelism graph
-                    vcd['values'][pred_scaled_end][mcode] = None
+        for measpred in ('measured', 'predicted'):
+            pcode = getCode(32, 'stats', '%s_parallelism' % measpred)
+            value = 0
+            for time in sorted(parallelism[measpred].keys()):
+                value += parallelism[measpred][time]
+                addValue(pcode, time, value)
 
-                    parallelism['predicted'][pred_scaled_start] += 1
+        # Section graph
-                    parallelism['predicted'][pred_scaled_end] -= 1
+        if Sections:
-
+            scode = getCode(LongestVcdStrValueLength * 8, "section", "trace")
-            # Parallelism graph
+            dcode = getCode(32, "section", "depth")
-            for measpred in ('measured', 'predicted'):
+            for time, stack in Sections:
-                vcd['sigs']['Stats']["%s_parallelism" % measpred] = code
+                addValue(scode, time, stack[-1] if stack else None)
-                pcode = code
+                addValue(dcode, time, len(stack))
-                code += 1
-                value = 0
-                for time in sorted(parallelism[measpred].keys()):
-                    value += parallelism[measpred][time]
-                    vcd['values'][time][pcode] = value
 
         # Create output file
         fh.write("$version Generated by verilator_gantt $end\n")
         fh.write("$timescale 1ns $end\n")
         fh.write("\n")
 
-        all_codes = {}
+        all_codes = set()
+
+        def writeScope(scope):
+            assert isinstance(scope, dict)
+            for key in sorted(scope):
+                val = scope[key]
+                if isinstance(val, dict):
+                    fh.write("  $scope module %s $end\n" % key)
+                    writeScope(val)
+                    fh.write("  $upscope $end\n")
+                else:
+                    (code, width) = val
+                    all_codes.add(code)
+                    fh.write("   $var wire %d v%x %s [%d:0] $end\n" %
+                             (width, code, key, width - 1))
+
         fh.write(" $scope module gantt $end\n")
-        for module in sorted(vcd['sigs'].keys()):
+        writeScope(scopeSigs)
-            fh.write("  $scope module %s $end\n" % module)
-            for sig in sorted(vcd['sigs'][module].keys()):
-                code = vcd['sigs'][module][sig]
-                fh.write("   $var wire 32 v%x %s [31:0] $end\n" % (code, sig))
-                all_codes[code] = 1
-            fh.write("  $upscope $end\n")
         fh.write(" $upscope $end\n")
         fh.write("$enddefinitions $end\n")
         fh.write("\n")
 
         first = True
-        for time in sorted(vcd['values']):
+        for time in sorted(values):
             if first:
                 first = False
                 # Start with Z for any signals without time zero data
-                for code in sorted(all_codes.keys()):
+                for code in sorted(all_codes):
-                    if code not in vcd['values'][time]:
+                    if code not in values[time]:
-                        vcd['values'][time][code] = None
+                        addValue(code, time, None)
             fh.write("#%d\n" % time)
-            for code in sorted(vcd['values'][time].keys()):
+            for code in sorted(values[time]):
-                value = vcd['values'][time][code]
+                value = values[time][code]
                 if value is None:
                     fh.write("bz v%x\n" % code)
+                elif isinstance(value, str):
+                    fh.write("b%s v%x\n" % (value, code))
                 else:
                     fh.write("b%s v%x\n" % (format(value, 'b'), code))
 
@@ -484,7 +546,7 @@ Verilator_gantt creates a visual representation to help analyze Verilator
 For documentation see
 https://verilator.org/guide/latest/exe_verilator_gantt.html""",
     epilog=
-    """Copyright 2018-2023 by Wilson Snyder. This program is free software; you
+    """Copyright 2018-2024 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.
@@ -504,7 +566,8 @@ parser.add_argument('filename',
 
 Args = parser.parse_args()
 
-process(Args.filename)
+read_data(Args.filename)
+report()
 if not Args.no_vcd:
     write_vcd(Args.vcd)
 

bin/verilator_includer

@@ -1,7 +1,7 @@
 #!/usr/bin/env python3
 # pylint: disable=C0114,C0209
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2024 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify the Verilator internals under the terms
 # of either the GNU Lesser General Public License Version 3 or the Perl
 # Artistic License Version 2.0.

bin/verilator_profcfunc

@@ -181,7 +181,7 @@ in each Verilog block.
 For documentation see
 https://verilator.org/guide/latest/exe_verilator_profcfunc.html""",
     epilog=
-    """Copyright 2002-2023 by Wilson Snyder. This program is free software; you
+    """Copyright 2002-2024 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

ci/ci-ccache-maint.bash

@@ -26,4 +26,5 @@ if git log --format=%B -n 1 "$COMMIT" | grep -q -i '\[CI\s\+ccache\s\+clear\]';
 fi
 
 # Dump stats, then zero stats
+# 22.04: ccache -s -v -z
 ccache -s -z

ci/ci-install.bash

@@ -27,12 +27,6 @@ fatal() {
   echo "ERROR: $(basename "$0"): $1" >&2; exit 1;
 }
 
-if [ "$CI_M32" = "0" ]; then
-  unset CI_M32
-elif [ "$CI_M32" != "1" ]; then
-  fatal "\$CI_M32 must be '0' or '1'";
-fi
-
 if [ "$CI_OS_NAME" = "linux" ]; then
   MAKE=make
 elif [ "$CI_OS_NAME" = "osx" ]; then
@@ -61,7 +55,7 @@ if [ "$CI_BUILD_STAGE_NAME" = "build" ]; then
     sudo apt-get update
     sudo apt-get install ccache help2man libfl-dev ||
     sudo apt-get install ccache help2man libfl-dev
-    if [ "$CI_RUNS_ON" != "ubuntu-22.04" ]; then
+    if [ "$CI_RUNS_ON" = "ubuntu-20.04" ]; then
       # Some conflict of libunwind verison on 22.04, can live without it for now
       sudo apt-get install libgoogle-perftools-dev ||
       sudo apt-get install libgoogle-perftools-dev
@@ -70,13 +64,13 @@ if [ "$CI_BUILD_STAGE_NAME" = "build" ]; then
       sudo apt-get install libsystemc libsystemc-dev ||
       sudo apt-get install libsystemc libsystemc-dev
     fi
+    if [ "$CI_RUNS_ON" = "ubuntu-22.04" ]; then
+      sudo apt-get install bear mold ||
+      sudo apt-get install bear mold
+    fi
     if [ "$COVERAGE" = 1 ]; then
       yes yes | sudo cpan -fi Parallel::Forker
     fi
-    if [ "$CI_M32" = 1 ]; then
-      sudo apt-get install gcc-multilib g++-multilib ||
-      sudo apt-get install gcc-multilib g++-multilib
-    fi
   elif [ "$CI_OS_NAME" = "osx" ]; then
     brew update
     brew install ccache perl gperftools
@@ -98,29 +92,24 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
     sudo apt-get update ||
     sudo apt-get update
     # libfl-dev needed for internal coverage's test runs
-    sudo apt-get install gdb gtkwave lcov libfl-dev ccache ||
+    sudo apt-get install gdb gtkwave lcov libfl-dev ccache jq z3 ||
-    sudo apt-get install gdb gtkwave lcov libfl-dev ccache
+    sudo apt-get install gdb gtkwave lcov libfl-dev ccache jq z3
     # Required for test_regress/t/t_dist_attributes.pl
     if [ "$CI_RUNS_ON" = "ubuntu-22.04" ]; then
-      sudo apt-get install libclang-dev ||
+      sudo apt-get install python3-clang mold ||
-      sudo apt-get install libclang-dev
+      sudo apt-get install python3-clang mold
-      pip3 install clang==14.0
     fi
     if [ "$CI_RUNS_ON" = "ubuntu-20.04" ] || [ "$CI_RUNS_ON" = "ubuntu-22.04" ]; then
       sudo apt-get install libsystemc-dev ||
       sudo apt-get install libsystemc-dev
     fi
-    if [ "$CI_M32" = 1 ]; then
-      sudo apt-get install lib32z1-dev gcc-multilib g++-multilib ||
-      sudo apt-get install lib32z1-dev gcc-multilib g++-multilib
-    fi
   elif [ "$CI_OS_NAME" = "osx" ]; then
     brew update
     # brew cask install gtkwave # fst2vcd hangs at launch, so don't bother
-    brew install ccache perl
+    brew install ccache perl jq z3
   elif [ "$CI_OS_NAME" = "freebsd" ]; then
     # fst2vcd fails with "Could not open '<input file>', exiting."
-    sudo pkg install -y ccache gmake perl5 python3
+    sudo pkg install -y ccache gmake perl5 python3 jq z3
   else
     fatal "Unknown os: '$CI_OS_NAME'"
   fi
@@ -130,6 +119,8 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
   fi
   yes yes | sudo cpan -M $CI_CPAN_REPO -fi Parallel::Forker
   install-vcddiff
+  # Workaround -fsanitize=address crash
+  sudo sysctl -w vm.mmap_rnd_bits=28
 else
   ##############################################################################
   # Unknown build stage

ci/ci-script.bash

@@ -21,12 +21,6 @@ fatal() {
   echo "ERROR: $(basename "$0"): $1" >&2; exit 1;
 }
 
-if [ "$CI_M32" = "0" ]; then
-  unset CI_M32
-elif [ "$CI_M32" != "1" ]; then
-  fatal "\$CI_M32 must be '0' or '1'";
-fi
-
 if [ "$CI_OS_NAME" = "linux" ]; then
   export MAKE=make
   NPROC=$(nproc)
@@ -46,9 +40,10 @@ if [ "$CI_BUILD_STAGE_NAME" = "build" ]; then
 
   if [ "$COVERAGE" != 1 ]; then
     autoconf
-    ./configure --enable-longtests --enable-ccwarn ${CI_M32:+--enable-m32}
+    ./configure --enable-longtests --enable-ccwarn --prefix="$INSTALL_DIR"
     ccache -z
     "$MAKE" -j "$NPROC" -k
+    # 22.04: ccache -s -v
     ccache -s
     if [ "$CI_OS_NAME" = "osx" ]; then
       file bin/verilator_bin
@@ -89,26 +84,43 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
     export VERILATOR_TEST_NO_GPROF=1 # gprof is a bit different on FreeBSD, disable
   fi
 
-  # Run sanitize on Ubuntu 20.04 only
+  # Run sanitize on Ubuntu 22.04 only
-  [ "$CI_RUNS_ON" = 'ubuntu-20.04' ] && [ "$CI_M32" = "" ] && sanitize='--sanitize' || sanitize=''
+  [ "$CI_RUNS_ON" = 'ubuntu-22.04' ] && sanitize='--sanitize' || sanitize=''
+
+  TEST_REGRESS=test_regress
+  if [ "$CI_RELOC" == 1 ]; then
+     # Testing that the installation is relocatable.
+     "$MAKE" install
+     mkdir -p "$RELOC_DIR"
+     mv "$INSTALL_DIR" "$RELOC_DIR/relocated-install"
+     export VERILATOR_ROOT="$RELOC_DIR/relocated-install/share/verilator"
+     TEST_REGRESS="$RELOC_DIR/test_regress"
+     mv test_regress "$TEST_REGRESS"
+     # Feeling brave?
+     find . -delete
+     ls -la .
+  fi
 
   # Run the specified test
   ccache -z
   case $TESTS in
     dist-vlt-0)
-      "$MAKE" -C test_regress SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=0/3
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=0/4
       ;;
     dist-vlt-1)
-      "$MAKE" -C test_regress SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=1/3
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=1/4
       ;;
     dist-vlt-2)
-      "$MAKE" -C test_regress SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=2/3
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=2/4
+      ;;
+    dist-vlt-3)
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS="--dist --vlt $sanitize" DRIVER_HASHSET=--hashset=3/4
       ;;
     vltmt-0)
-      "$MAKE" -C test_regress SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=0/2
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=0/2
       ;;
     vltmt-1)
-      "$MAKE" -C test_regress SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=1/2
+      "$MAKE" -C "$TEST_REGRESS" SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=1/2
       ;;
     coverage-all)
       nodist/code_coverage --stages 1-
@@ -180,12 +192,10 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
       fatal "Unknown test: $TESTS"
       ;;
   esac
+
+  # 22.04: ccache -s -v
   ccache -s
 
-  # Upload coverage data
-  if [[ $TESTS == coverage-* ]]; then
-    bash <(cat ci/coverage-upload.sh) -f nodist/obj_dir/coverage/app_total.info
-  fi
 else
   ##############################################################################
   # Unknown build stage

ci/ci-win-compile.ps1

@@ -1,3 +1,15 @@
+# DESCRIPTION: Verilator: CI Windows Power Shell - Compile Verilator
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+################################################################################
+
+Set-PSDebug -Trace 1
+
 if (-Not (Test-Path $PWD/../.ccache/win_bison.exe)) {
 	git clone --depth 1 https://github.com/lexxmark/winflexbison
 	cd winflexbison
@@ -8,6 +20,7 @@ if (-Not (Test-Path $PWD/../.ccache/win_bison.exe)) {
 	cmake --install . --prefix $PWD/../../../.ccache
 	cd ../..
 }
+
 mkdir build
 cd build
 cmake .. --install-prefix $PWD/../install

ci/ci-win-test.ps1

@@ -1,3 +1,16 @@
+# DESCRIPTION: Verilator: CI Windows Power Shell - Verilate a test
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+################################################################################
+
+
+Set-PSDebug -Trace 1
+
 cd install
 $Env:VERILATOR_ROOT=$PWD
 cd examples/cmake_tracing_c
@@ -5,6 +18,9 @@ mkdir build
 cd build
 cmake ..
 cmake --build . --config Release -j 3
-Release/example.exe
+
+# TODO put this back in, see issue# 5163
+# Release/example.exe
+
 cd ..
 Remove-Item -path build -recurse

ci/docker/buildenv/Dockerfile

@@ -8,6 +8,16 @@
 
 FROM ubuntu:22.04
 
+# Create the user
+RUN groupadd verilator \
+    && useradd -g verilator -m verilator -s /bin/bash \
+    && apt-get update \
+    && apt-get install --no-install-recommends -y sudo \
+    && apt-get clean \
+    && rm -rf /var/lib/apt/lists/* \
+    && echo verilator ALL=\(root\) NOPASSWD:ALL > /etc/sudoers.d/verilator \
+    && chmod 0440 /etc/sudoers.d/verilator
+
 RUN apt-get update \
     && DEBIAN_FRONTEND=noninteractive \
        apt-get install --no-install-recommends -y \
@@ -33,7 +43,7 @@ RUN apt-get update \
                         perl \
                         python3 \
                         wget \
-                        zlibc \
+                        z3 \
                         zlib1g \
                         zlib1g-dev \
     && apt-get clean \
@@ -52,6 +62,8 @@ COPY build.sh /tmp/build.sh
 
 ENV VERILATOR_AUTHOR_SITE=1
 
+USER verilator
+
 WORKDIR /work
 
 ENTRYPOINT [ "/tmp/build.sh" ]

ci/docker/buildenv/README.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 Verilator Build Docker Container

ci/docker/run/Dockerfile

@@ -19,10 +19,16 @@ RUN apt-get update \
                         ccache \
                         flex \
                         git \
+                        help2man \
+                        libfl2 \
                         libfl-dev \
                         libgoogle-perftools-dev \
+                        numactl \
                         perl \
+                        perl-doc \
                         python3 \
+                        zlib1g \
+                        zlib1g-dev \
     && apt-get clean \
     && rm -rf /var/lib/apt/lists/*
 
@@ -39,7 +45,7 @@ RUN git clone "${REPO}" verilator && \
     git checkout "${SOURCE_COMMIT}" && \
     autoconf && \
     ./configure && \
-    make -j "$(nproc)" && \
+    make && \
     make install && \
     cd .. && \
     rm -r verilator

ci/docker/run/README.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 Verilator Executable Docker Container
@@ -11,10 +11,11 @@ easily as a docker image, e.g.:
 
    docker run -ti verilator/verilator:latest --version
 
-This will install the container, run the latest Verilator and print
+This will pull the container from `docker hub
+<https://hub.docker.com/r/verilator/verilator>`_, run the latest Verilator and print
 Verilator's version.
 
-Containers are automatically built for all released versions, so you may
+Containers are automatically built and pushed to docker hub for all released versions, so you may
 easily compare results across versions, e.g.:
 
 ::

codecov.yml

@@ -1,6 +1,6 @@
 # DESCRIPTION: codecov.io config
 #
-# Copyright 2020-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2020-2024 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

configure.ac

@@ -1,20 +1,20 @@
 # DESCRIPTION: Process this file with autoconf to produce a configure script.
 #
-# Copyright 2003-2023 by Wilson Snyder. Verilator is free software; you
+# Copyright 2003-2024 by Wilson Snyder. Verilator is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-# When releasing, also update header of Changes file,
+# When releasing, also update header of Changes file, and CMakeLists.txt,
 # and commit using "devel release" or "Version bump" message
 # Then 'make maintainer-dist'
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[5.010 2023-04-30],
+AC_INIT([Verilator],[5.028 2024-08-21],
         [https://verilator.org],
         [verilator],[https://verilator.org])
 
-AC_CONFIG_HEADERS(src/config_build.h)
+AC_CONFIG_HEADERS(src/config_package.h)
 AC_CONFIG_FILES(Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc verilator-config.cmake verilator-config-version.cmake)
 
 # Version
@@ -24,6 +24,10 @@ AC_SUBST(PACKAGE_VERSION_NUMBER)
 AC_DEFINE_UNQUOTED([PACKAGE_VERSION_NUMBER_STRING],["$PACKAGE_VERSION_NUMBER"],[Package version as a number])
 VERILATOR_VERSION_INTEGER=`AS_ECHO("$PACKAGE_VERSION") | [sed 's/\([0-9]\)\.\([0-9][0-9][0-9]\) .*/\1\2000/g']`
 AC_SUBST(VERILATOR_VERSION_INTEGER)
+AC_DEFINE_UNQUOTED([PACKAGE_VERSION_STRING_CHAR],
+        [static const char* const PACKAGE_STRING_UNUSED = "$PACKAGE_STRING";],
+        [Package version as a number])
+AC_SUBST(PACKAGE_VERSION_STRING_CHAR)
 
 # Ignore automake flags passed by Ubuntu builds
 AC_ARG_ENABLE([dependency-tracking],
@@ -63,20 +67,6 @@ AC_ARG_ENABLE([tcmalloc],
               [CFG_WITH_TCMALLOC=check;])
 AC_MSG_RESULT($CFG_WITH_TCMALLOC)
 
-# Flag to enable -m32 build
-AC_MSG_CHECKING(whether to use -m32)
-AC_ARG_ENABLE([m32],
-              [AS_HELP_STRING([--enable-m32],
-                              [Use -m32 for all compilation and link,
-                               including Verilator and generated models.])],
-              [case "${enableval}" in
-                yes) CFG_ENABLE_M32=yes ;;
-                no)  CFG_ENABLE_M32=no ;;
-                *)   AC_MSG_ERROR([bad value '${enableval}' for --enable-m32]) ;;
-               esac],
-               CFG_ENABLE_M32=no)
-AC_MSG_RESULT($CFG_ENABLE_M32)
-
 # Flag to enable coverage build
 AC_MSG_CHECKING(whether to build for coverage collection)
 AC_ARG_ENABLE([coverage],
@@ -144,6 +134,28 @@ AC_ARG_ENABLE([longtests],
 AC_SUBST(CFG_WITH_LONGTESTS)
 AC_MSG_RESULT($CFG_WITH_LONGTESTS)
 
+AC_CHECK_PROG(HAVE_Z3,z3,yes)
+AC_CHECK_PROG(HAVE_CVC5,cvc5,yes)
+AC_CHECK_PROG(HAVE_CVC4,cvc4,yes)
+
+# Special Substitutions - CFG_WITH_SOLVER
+AC_MSG_CHECKING(for SMT solver)
+AC_ARG_WITH([solver],
+              [AS_HELP_STRING([--with-solver='z3 --in'],
+                              [set default SMT solver for constrained randomization])],
+              [CFG_WITH_SOLVER="${withval}"],
+              [CFG_WITH_SOLVER=no
+               if test "x$HAVE_Z3" = "xyes"; then
+                CFG_WITH_SOLVER="z3 --in"
+               elif test "x$HAVE_CVC5" = "xyes"; then
+                CFG_WITH_SOLVER="cvc5 --incremental"
+               elif test "x$HAVE_CVC4" = "xyes"; then
+                CFG_WITH_SOLVER="cvc4 --lang=smt2 --incremental"
+               fi]
+              )
+AC_SUBST(CFG_WITH_SOLVER)
+AC_MSG_RESULT($CFG_WITH_SOLVER)
+
 # Compiler flags (ensure they are not empty to avoid configure defaults)
 CFLAGS="$CFLAGS "
 CPPFLAGS="$CPPFLAGS "
@@ -276,6 +288,43 @@ AC_DEFUN([_MY_CXX_CHECK_OPT],
     _MY_CXX_CHECK_IFELSE($2, $1="$$1 $2")
    ])
 
+AC_DEFUN([_MY_CXX_CHECK_CORO_SET],
+   [# _MY_CXX_CHECK_CORO_SET(variable,option)
+    # Check if compiler supports coroutines with specific option. If it does,
+    # set variable to option, only if not previously set.
+    # Define HAVE_COROUTINES if supported.
+    if test "$$1" = ""; then
+      if test "$2" != ""; then
+        _my_msg_opt=" with $2"
+      else
+        _my_msg_opt=""
+      fi
+      AC_MSG_CHECKING([whether coroutines are supported by $CXX$_my_msg_opt])
+      ACO_SAVE_CXXFLAGS="$CXXFLAGS"
+      CXXFLAGS="$CXXFLAGS $2"
+      AC_LINK_IFELSE(
+         [AC_LANG_PROGRAM([
+            #if defined(__clang__) && !defined(__cpp_impl_coroutine)
+            #define __cpp_impl_coroutine 1
+            #endif
+            #include <coroutine>
+          ],[[std::coroutine_handle<> h;]])],
+         [_my_result=yes],
+         [AC_LINK_IFELSE(
+             [AC_LANG_PROGRAM(
+                [#include <experimental/coroutine>],
+                [[std::experimental::coroutine_handle<> h;]])],
+             [_my_result=yes],
+             [_my_result=no])])
+      AC_MSG_RESULT($_my_result)
+      CXXFLAGS="$ACO_SAVE_CXXFLAGS"
+      if test "$_my_result" = "yes" ; then
+        $1="$2"
+        AC_DEFINE([HAVE_COROUTINES],[1],[Defined if coroutines are supported by $CXX])
+      fi
+    fi
+  ])
+
 AC_DEFUN([_MY_LDLIBS_CHECK_FLAG],
    [# _MY_LDLIBS_CHECK_FLAG(flag) -- Check if linker supports specific options
     # Set $_my_result appropriately
@@ -315,15 +364,7 @@ AC_DEFUN([_MY_LDLIBS_CHECK_OPT],
     _MY_LDLIBS_CHECK_IFELSE($2, $1="$$1 $2")
    ])
 
-# When using -m32. Check this first as later checks may fail with the -m32 flag.
+# Add the coverage flags early as they influence later checks.
-if test "$CFG_ENABLE_M32" = "yes"; then
-  _MY_CXX_CHECK_IFELSE(
-    -m32,
-    [CXX="$CXX -m32"],
-    [AC_MSG_ERROR([--enable-m32 was given but compiler does not support -m32])])
-fi
-
-# Similarly, add the coverage flags early as they influence later checks.
 if test "$CFG_ENABLE_COVERAGE" = "yes"; then
   _MY_CXX_CHECK_OPT(CXX,--coverage)
   # Otherwise inline may not show as uncovered
@@ -350,7 +391,7 @@ AC_SUBST(CFG_CXXFLAGS_PROFILE)
 # Macros work such that first option that passes is the one we take
 # Currently enable c++17/c++14 due to packaged SystemC dependency
 # c++17 is the newest that Verilator is regularly tested to support
-# c++11 is the oldest that Verilator supports
+# c++14 is the oldest that Verilator supports
 # gnu is required for Cygwin to compile verilated.h successfully
 #_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++20)
 #_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++20)
@@ -358,8 +399,6 @@ _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++14)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++14)
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++11)
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++11)
 AC_SUBST(CFG_CXXFLAGS_STD_NEWEST)
 
 # Flags for compiling Verilator internals including parser, and Verilated files
@@ -371,33 +410,12 @@ _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_WEXTRA,-Wthread-safety)
 AC_SUBST(CFG_CXXFLAGS_WEXTRA)
 
 # Flags for coroutine support for dynamic scheduling
-_MY_CXX_CHECK_IFELSE(
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES, "")
-  -fcoroutines-ts,
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines-ts)
-  [CFG_CXXFLAGS_COROUTINES="-fcoroutines-ts"],
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines)
-  [CFG_CXXFLAGS_COROUTINES="-fcoroutines"])
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines-ts -Wno-deprecated-experimental-coroutine)
+_MY_CXX_CHECK_CORO_SET(CFG_CXXFLAGS_COROUTINES,-std=gnu++20)
 AC_SUBST(CFG_CXXFLAGS_COROUTINES)
-
-# HAVE_COROUTINES
-# Check if coroutines are supported at all
-AC_MSG_CHECKING([whether coroutines are supported by $CXX])
-ACO_SAVE_CXXFLAGS="$CXXFLAGS"
-CXXFLAGS="$CXXFLAGS $CFG_CXXFLAGS_COROUTINES"
-AC_LINK_IFELSE(
-    [AC_LANG_PROGRAM([
-#ifdef __clang__
-#define __cpp_impl_coroutine 1
-#endif
-#include <coroutine>
-    ],[[]])],
-    [_my_result=yes
-     AC_DEFINE([HAVE_COROUTINES],[1],[Defined if coroutines are supported by $CXX])],
-    [AC_LINK_IFELSE(
-        [AC_LANG_PROGRAM([#include <experimental/coroutine>],[[]])],
-        [_my_result=yes
-         AC_DEFINE([HAVE_COROUTINES],[1],[Defined if coroutines are supported by $CXX])],
-        [_my_result=no])])
-AC_MSG_RESULT($_my_result)
-CXXFLAGS="$ACO_SAVE_CXXFLAGS"
 AC_SUBST(HAVE_COROUTINES)
 
 # Flags for compiling Verilator internals including parser always
@@ -442,14 +460,19 @@ m4_foreach([cflag],[
         [-mno-cet],
         [-Qunused-arguments],
         [-Wno-bool-operation],
-        [-Wno-tautological-bitwise-compare],
+        [-Wno-c++11-narrowing],
+        [-Wno-constant-logical-operand],
+        [-Wno-non-pod-varargs],
         [-Wno-parentheses-equality],
+        [-Wno-shadow],
         [-Wno-sign-compare],
+        [-Wno-tautological-bitwise-compare],
+        [-Wno-tautological-compare],
         [-Wno-uninitialized],
+        [-Wno-unused-but-set-parameter],
         [-Wno-unused-but-set-variable],
         [-Wno-unused-parameter],
-        [-Wno-unused-variable],
+        [-Wno-unused-variable]],[
-        [-Wno-shadow]],[
     _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,cflag)
     # CMake will test what flags work itself, so pass all flags through to it
     CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE cflag"
@@ -470,6 +493,10 @@ m4_foreach([ldflag], [
 AC_SUBST(CFG_LDLIBS_THREADS)
 AC_SUBST(CFG_LDFLAGS_THREADS_CMAKE)
 
+# If 'mold' is installed, use it to link for faster buildtimes
+_MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_SRC, -fuse-ld=mold)
+_MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_VERILATED, -fuse-ld=mold)
+
 # When linking partially statically
 if test "$CFG_ENABLE_PARTIAL_STATIC" = "yes"; then
   _MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_SRC, -static-libgcc)
@@ -480,12 +507,14 @@ else
   LTCMALLOC=-ltcmalloc_minimal
 fi
 AC_SUBST(CFG_LDFLAGS_SRC)
+AC_SUBST(CFG_LDFLAGS_VERILATED)
 
 # The pthread library is required by tcmalloc, so add it if it exists. If it
 # does not, the tcmalloc check below will fail anyway, and linking against
 # pthreads is harmless otherwise.
 CFG_LIBS="$LIBS $CFG_LIBS"
 _MY_LDLIBS_CHECK_OPT(CFG_LIBS, -lpthread)
+_MY_LDLIBS_CHECK_OPT(CFG_LIBS, -latomic)
 
 # Check libraries for MingW
 _MY_LDLIBS_CHECK_OPT(CFG_LIBS, -lbcrypt)
@@ -508,14 +537,14 @@ _MY_LDLIBS_CHECK_IFELSE(
    fi])
 AC_SUBST(CFG_LIBS)
 
-# Need C++11 at least
+# Need C++14 at least
-#Alternative: AX_CXX_COMPILE_STDCXX([11])
+#Alternative: AX_CXX_COMPILE_STDCXX([14])
 AC_DEFUN([_MY_CXX_CHECK_CXX_VER],
-   [# _MY_CXX_CHECK_CXX_VER(flag) -- Check if compiler runs C++11
+   [# _MY_CXX_CHECK_CXX_VER(flag) -- Check if compiler runs C++14
     # Set $_my_result
     AC_LINK_IFELSE(
      [AC_LANG_PROGRAM([#include <thread>
-#if (__cplusplus < 201103L)
+#if (__cplusplus < 201402L)
 # error "Too old"
 #endif
     ], [[ ]])],
@@ -531,13 +560,13 @@ AC_DEFUN([_MY_CXX_CHECK_CXX_VER],
 # Add $CFG_CXXFLAGS_STD only if can't compile correctly otherwise,
 # as adding std= when not needed can cause errors with the C++ std library.
 CFG_CXXFLAGS_STD=$CFG_CXXFLAGS_STD_NEWEST
-AC_MSG_CHECKING(whether $CXX supports C++11)
+AC_MSG_CHECKING(whether $CXX supports C++14)
 _MY_CXX_CHECK_CXX_VER()
 AC_MSG_RESULT($_my_result)
 if test "$_my_result" = "no" ; then
    CXXFLAGS="$CXXFLAGS $CFG_CXXFLAGS_STD"
    CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE $CFG_CXXFLAGS_STD"
-   AC_MSG_CHECKING(whether $CXX supports C++11 with $CFG_CXXFLAGS_STD)
+   AC_MSG_CHECKING(whether $CXX supports C++14 with $CFG_CXXFLAGS_STD)
    _MY_CXX_CHECK_CXX_VER()
    AC_MSG_RESULT($_my_result)
 else
@@ -547,13 +576,28 @@ else
 fi
 if test "$_my_result" = "no" ; then
    AC_MSG_NOTICE([[]])
-   AC_MSG_ERROR([[the $CXX compiler appears to not support C++11.
+   AC_MSG_ERROR([[the $CXX compiler appears to not support C++14.
 
-Verilator requires a C++11 or newer compiler.]])
+Verilator requires a C++14 or newer compiler.]])
 
 fi
 AC_SUBST(CFG_CXXFLAGS_STD)
 
+# Compiler precompiled header options (assumes either gcc or clang++)
+AC_MSG_CHECKING([for $CXX precompile header include option])
+if $CXX --help | grep include-pch >/dev/null 2>/dev/null ; then
+   # clang
+   CFG_CXXFLAGS_PCH_I=-include-pch
+   CFG_GCH_IF_CLANG=.gch
+else
+   # GCC
+   CFG_CXXFLAGS_PCH_I=-include
+   CFG_GCH_IF_CLANG=
+fi
+AC_MSG_RESULT($CFG_CXXFLAGS_PCH_I)
+AC_SUBST(CFG_CXXFLAGS_PCH_I)
+AC_SUBST(CFG_GCH_IF_CLANG)
+
 # Checks for library functions.
 AC_CHECK_MEMBER([struct stat.st_mtim.tv_nsec],
     [AC_DEFINE([HAVE_STAT_NSEC],[1],[Defined if struct stat has st_mtim.tv_nsec])],
@@ -568,7 +612,7 @@ ACO_SAVE_LIBS="$LIBS"
 LIBS="$LIBS -lsystemc"
 AC_LINK_IFELSE(
     [AC_LANG_PROGRAM([[#include <systemc.h>
-                     extern "C" int sc_main(int argc, char* argv[]) {}
+                     extern "C" int sc_main(int argc, char* argv[]) { return 0; }
                      ]],[[sc_version()]])],
     [_my_result=yes
      AC_DEFINE([HAVE_SYSTEMC],[1],[Defined if have SystemC library])],

docs/CONTRIBUTORS

@@ -4,55 +4,80 @@ under the Developer Certificate of Origin (https://developercertificate.org/).
 Please see the Verilator manual for 200+ additional contributors. Thanks to all.
 
 Adam Bagley
+Adrian Sampson
 Adrien Le Masle
 Ahmed El-Mahmoudy
 Aleksander Kiryk
 Alex Chadwick
+Alex Solomatnikov
 Àlex Torregrosa
 Aliaksei Chapyzhenka
 Ameya Vikram Singh
+Andrea Calabrese
 Andreas Kuster
+Andrei Kostovski
+Andrew Miloradovsky
 Andrew Nolte
+Anthony Donlon
 Arkadiusz Kozdra
+Arthur Rosa
+Aylon Chaim Porat
+Bartłomiej Chmiel
 Cameron Kirk
+Chih-Mao Chen
+Chris Bachhuber
 Chris Randall
+Christopher Taylor
 Chuxuan Wang
+Chykon
 Conor McCullough
 Dan Petrisko
 Daniel Bates
 David Horton
+David Ledger
 David Metz
 David Stanford
 David Turner
+Dercury
+Don Williamson
 Drew Ranck
 Drew Taussig
 Driss Hafdi
 Edgar E. Iglesias
 Eric Rippey
+Ethan Sifferman
 Eyck Jentzsch
 Fan Shupei
+february cozzocrea
 Felix Neumärker
 Felix Yan
+Frans Skarman
+Fuad Ismail
+G-A. Kamendje
 Garrett Smith
 Geza Lore
 Gianfranco Costamagna
+Gijs Burghoorn
 Glen Gibb
 Gökçe Aydos
 Graham Rushton
 Guokai Chen
+Gus Smith
 Gustav Svensk
-G-A. Kamendje
 Harald Heckmann
+Hennadii Chernyshchyk
 Howard Su
 Huang Rui
 Huanghuang Zhou
 HungMingWu
 HyungKi Jeong
+Ícaro Lima
+Ilya Barkov
 Iru Cai
 Ivan Vnučec
-Ilya Barkov
 Iztok Jeras
 Jake Merdich
+James Bailey
 James Hanlon
 James Hutchinson
 James Pallister
@@ -60,31 +85,46 @@ James Shi
 Jamey Hicks
 Jamie Iles
 Jan Van Winkel
+Jiangjie Weng
 Jean Berniolles
 Jeremy Bennett
 Jesse Taube
 Jevin Sweval
 Jiacheng Qian
+Jiamin Zhu
+Jinyan Xu
 Jiuyang Liu
 Joey Liu
 John Coiner
 John Demme
+John Wehle
 Jonathan Drolet
-Joseph Nwabueze
+Jonathan Schröter
+Jordan McConnon
+Jose Loyola
 Josep Sans
+Joseph Nwabueze
 Josh Redford
+Julian Daube
 Julie Schwartz
 Julien Margetts
+Justin Thiel
 Kaleb Barrett
 Kamil Rakoczy
 Kanad Kanhere
+Kefa Chen
 Keith Colbert
 Kevin Kiningham
+Kevin Nygaard
 Kritik Bhimani
 Krzysztof Bieganski
+Krzysztof Boronski
 Krzysztof Boroński
+Krzysztof Obłonczek
 Kuba Ober
 Larry Doolittle
+Liam Braun
+Luca Colagrande
 Ludwig Rogiers
 Lukasz Dalek
 Maarten De Braekeleer
@@ -98,8 +138,10 @@ Marshal Qiao
 Martin Schmidt
 Martin Stadler
 Matthew Ballance
+Michael Bikovitsky
 Michael Killough
 Michaël Lefebvre
+Michal Czyz
 Mike Popoloski
 Miodrag Milanović
 Mladen Slijepcevic
@@ -108,34 +150,48 @@ Mostafa Gamal
 Nandu Raj
 Nathan Kohagen
 Nathan Myers
+Nolan Poe
+Oleh Maksymenko
 Patrick Stewart
+Paul Bowen-Huggett
+Paul Swirhun
 Paul Wright
+Pawel Jewstafjew
 Pawel Sagan
+Pengcheng Xu
 Peter Debacker
 Peter Horvath
 Peter Monsson
+Philip Axer
 Philipp Wagner
 Pierre-Henri Horrein
 Pieter Kapsenberg
 Piotr Binkowski
 Qingyao Sun
+Quentin Corradi
 Rafal Kapuscik
+Rasfunk
 Raynard Qiao
+Ricardo Barbedo
 Richard Myers
 Risto Pejašinović
 Robert Balas
 Rupert Swarbrick
+Ryan Ziegler
 Ryszard Rozak
 Samuel Riedel
 Sean Cross
 Sebastien Van Cauwenberghe
 Sergi Granell
+Seth Pellegrino
 Srinivasan Venkataramanan
 Stefan Wallentowitz
 Stephen Henry
 Steven Hugg
+Szymon Gizler
 Sören Tempel
 Teng Huang
+Tim Hutt
 Tim Snyder
 Tobias Rosenkranz
 Tobias Wölfel
@@ -143,22 +199,31 @@ Todd Strader
 Tomasz Gorochowik
 Topa Topino
 Toru Niina
+Tudor Timi
 Tymoteusz Blazejczyk
 Udi Finkelstein
 Unai Martinez-Corral
+Udaya Raj Subedi
+Valentin Atepalikhin
 Varun Koyyalagunta
 Vassilis Papaefstathiou
 Veripool API Bot
 Victor Besyakov
+Vito Gamberini
 William D. Jones
 Wilson Snyder
 Xi Zhang
+Yan Xu
+Yangyu Chen
 Yinan Xu
 Yoda Lee
 Yossi Nivin
+Yu-Sheng Lin
 Yuri Victorovich
 Yutetsu TAKATSUKASA
-Yu-Sheng Lin
 Yves Mathieu
 Zhanglei Wang
+Zhou Shen
 Zixi Li
+أحمد المحمودي
+404allen404

docs/Makefile

@@ -5,7 +5,7 @@
 #
 # Code available from: https://verilator.org
 #
-# Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2024 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -18,12 +18,16 @@
 RST2HTML = rst2html
 PYTHON3 = python3
 DOXYGEN = doxygen
-SPHINXOPTS ?= -c guide
 SPHINXBUILD ?= sphinx-build
 
 SOURCEDIR = guide
 BUILDDIR = _build
 
+SPHINXOPTS ?= -c guide
+ifneq ($(VERILATOR_ANALYTICS_ID),)
+SPHINXOPTS += -D html_theme_options.analytics_id=$(VERILATOR_ANALYTICS_ID)
+endif
+
 ######################################################################
 
 .SUFFIXES:

docs/README.rst

@@ -0,0 +1,21 @@
+Verilator Documentation
+=======================
+
+This folder contains sources for Verilator documentation.
+
+For formatted documentation see:
+
+- `Verilator README <https://github.com/verilator/verilator>`_
+
+- `Verilator installation and package directory structure
+  <https://verilator.org/install>`_
+
+- `Verilator manual (HTML) <https://verilator.org/verilator_doc.html>`_,
+  or `Verilator manual (PDF) <https://verilator.org/verilator_doc.pdf>`_
+
+- `Subscribe to Verilator announcements
+  <https://github.com/verilator/verilator-announce>`_
+
+- `Verilator forum <https://verilator.org/forum>`_
+
+- `Verilator issues <https://verilator.org/issues>`_

docs/bin/vl_sphinx_extract

@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# pylint: disable=C0112,C0114,C0115,C0116,C0209,C0301,R0201,R0903
+# pylint: disable=C0112,C0114,C0115,C0116,C0209,C0301,R0903
 # -*- Python -*- See copyright, etc below
 ######################################################################
 
@@ -40,7 +40,7 @@ parser = argparse.ArgumentParser(
     formatter_class=argparse.RawDescriptionHelpFormatter,
     description="""Read a file and extract documentation data.""",
     epilog=
-    """ Copyright 2021-2023 by Wilson Snyder.  This package is free software;
+    """ Copyright 2021-2024 by Wilson Snyder.  This package is free software;
 you can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

docs/bin/vl_sphinx_fix

@@ -55,7 +55,7 @@ parser = argparse.ArgumentParser(
     formatter_class=argparse.RawDescriptionHelpFormatter,
     description="""Post-process Sphinx HTML.""",
     epilog=
-    """ Copyright 2021-2023 by Wilson Snyder.  This package is free software;
+    """ Copyright 2021-2024 by Wilson Snyder.  This package is free software;
 you can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

docs/gen/ex_MULTIDRIVEN_msg.rst

@@ -1,6 +1,6 @@
 .. comment: generated by t_lint_multidriven_bad
 .. code-block::
 
-   %Warning-MULTIDRIVEN: example.v:1:22 Signal has multiple driving blocks with different clocking: 'out2'
+   %Warning-MULTIDRIVEN: example.v:1:22 Signal has multiple driving blocks with different clocking: 't.mem'
                          example.v:1:7 ... Location of first driving block
                          example.v:1:7 ... Location of other driving block

docs/gen/ex_PINMISSING_faulty.rst

@@ -0,0 +1,11 @@
+.. comment: generated by t_lint_pinmissing_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 2
+
+   module t;
+      sub sub();  // <--- Warning
+   endmodule
+   module sub
+     (output port);
+   endmodule

docs/gen/ex_PINMISSING_msg.rst

@@ -0,0 +1,4 @@
+.. comment: generated by t_lint_pinmissing_bad
+.. code-block::
+
+   %Warning-PINMISSING: example.v:1:8 Cell has missing pin: 'port'

docs/gen/ex_PKGNODECL_faulty.rst

@@ -0,0 +1,11 @@
+.. comment: generated by t_lint_pkgnodecl_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 2
+
+   module t;
+      initial Pkg::hello();  //<--- Warning
+   endmodule
+   package Pkg;
+      function void hello(); endfunction
+   endpackage

docs/gen/ex_PKGNODECL_msg.rst

@@ -0,0 +1,4 @@
+.. comment: generated by t_lint_pkgnodecl_bad
+.. code-block::
+
+   %Error-PKGNODECL: example.v:1:12 Package/class 'Pkg' not found, and needs to be predeclared (IEEE 1800-2023 26.3)

docs/guide/changes.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ****************

docs/guide/conf.py

@@ -1,7 +1,7 @@
 # pylint: disable=C0103,C0114,C0116,C0301,E0402,W0622
 #
 # Configuration file for Verilator's Sphinx documentation builder.
-# Copyright 2003-2023 by Wilson Snyder.
+# Copyright 2003-2024 by Wilson Snyder.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 # This file only contains overridden options. For a full list:
@@ -31,7 +31,7 @@ def get_vlt_version():
             if match:
                 try:
                     data = os.popen('git log -n 1 --pretty=%cs').read()
-                except Exception:
+                except Exception:  # pylint: disable=broad-except
                     data = ""  # fallback, and Sphinx will fill in today's date
                 return "Devel " + match.group(1), data
     return "unknown", "unknown"
@@ -45,7 +45,7 @@ def setup(app):
 # -- Project information
 
 project = 'Verilator'
-copyright = '2022 by Wilson Snyder, under LGPL-3.0 or Artistic-2.0'
+copyright = '2024 by Wilson Snyder, under LGPL-3.0 or Artistic-2.0'
 author = 'Wilson Snyder'
 
 # The master toctree document.
@@ -115,7 +115,6 @@ html_theme = 'sphinx_rtd_theme'
 html_theme_path = [sphinx_rtd_theme.get_html_theme_path()]
 
 html_theme_options = {
-    'analytics_id': 'G-D27B0C9QEB',
     'logo_only': True,
     'style_nav_header_background': "#45acf8",  # Default is #2980B9
     # 'canonical_url':
@@ -231,4 +230,4 @@ spelling_ignore_contributor_names = True
 
 breathe_projects = {"verilated": "_build/doxygen/verilated/xml/"}
 breathe_default_project = "verilated"
-breathe_default_members = ('members')
+breathe_default_members = 'members'

docs/guide/connecting.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Connecting:
@@ -128,6 +128,43 @@ in the distribution.  These headers use Doxygen comments, `///` and `//<`,
 to indicate and document those functions that are part of the Verilated
 public API.
 
+Process-Level Clone APIs
+--------------------------
+
+Modern operating systems support process-level clone (a.k.a copying, forking)
+with system call interfaces in C/C++, e.g., :code:`fork()` in Linux.
+
+However, after cloning a parent process, some resources cannot be inherited
+in the child process. For example, in POSIX systems, when you fork a process,
+the child process inherits all the memory of the parent process. However,
+only the thread that called fork is replicated in the child process. Other
+threads are not.
+
+Therefore, to support the process-level clone mechanisms, Verilator supports
+:code:`prepareClone()` and :code:`atClone()` APIs to allow the user to manually
+re-construct the model in the child process. The two APIs handle all necessary
+resources required for releasing and re-initializing before and after cloning.
+
+The two APIs are supported in the verilated models. Here is an example of usage
+with Linux :code:`fork()` and :code:`pthread_atfork` APIs:
+
+.. code-block:: C++
+
+    // static function pointers to fit pthread_atfork
+    static auto prepareClone = [](){ topp->prepareClone(); };
+    static auto atClone = [](){ topp->atClone(); };
+
+    // in main function, register the handlers:
+    pthread_atfork(prepareClone, atClone, atClone);
+
+For better flexibility, you can also manually call the handlers before and
+after :code:`fork()`.
+
+With the process-level clone APIs, users can create process-level snapshots
+for the verilated models. While the Verilator save/restore option provides
+persistent and circuit-dependent snapshots, the process-level clone APIs
+enable in-memory, circuit-transparent, and highly efficient snapshots.
+
 
 Direct Programming Interface (DPI)
 ==================================
@@ -370,6 +407,16 @@ only a couple of instructions.
 For signal callbacks to work the main loop of the program must call
 :code:`VerilatedVpi::callValueCbs()`.
 
+Verilator also tracks when the model state has been modified via the VPI with
+an :code:`evalNeeded` flag.  This flag can be checked with :code:`VerilatedVpi::evalNeeded()`
+and it can be cleared with :code:`VerilatedVpi::clearEvalNeeded()`.  Used together
+it is possible to skip :code:`eval()` calls if no model state has been changed
+since the last :code:`eval()`.
+
+Any data written via :code:`vpi_put_value` with :code:`vpiInertialDelay` will
+be deferred for later.  These delayed values can be flushed to the model with
+:code:`VerilatedVpi::doInertialPuts()`.
+
 
 .. _VPI Example:
 
@@ -463,7 +510,7 @@ the user should call:
      any delayed events pending,
    * :code:`designp->nextTimeSlot()`, which returns the simulation time of the
      next delayed event. This method can only be called if
-     :code:`designp->nextTimeSlot()` returned :code:`true`.
+     :code:`designp->eventsPending()` returned :code:`true`.
 
 Call :code:`eventsPending()` to check if you should continue with the
 simulation, and then :code:`nextTimeSlot()` to move simulation time forward.

docs/guide/contributing.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *******************************

docs/guide/contributors.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ************************
@@ -27,107 +27,137 @@ Alliance <https://chipsalliance.org>`_, `Antmicro Ltd
 <https://antmicro.com>`_ and `Shunyao CAD <https://shunyaocad.com>`_.
 
 Previous major corporate sponsors of Verilator, by providing significant
-contributions of time or funds include: Atmel Corporation, Cavium
+contributions of time or funds include: Antmicro Ltd., Atmel Corporation,
-Inc., Compaq Corporation, Digital Equipment Corporation, Embecosm Ltd.,
+Compaq Corporation, Digital Equipment Corporation, Embecosm Ltd., Hicamp
-Hicamp Systems, Intel Corporation, Mindspeed Technologies Inc., MicroTune
+Systems, Intel Corporation, Marvell Inc., Mindspeed Technologies Inc.,
-Inc., picoChip Designs Ltd., Sun Microsystems Inc., Nauticus Networks Inc.,
+MicroTune Inc., picoChip Designs Ltd., Sun Microsystems Inc., Nauticus
-SiCortex Inc, and Shunyao CAD.
+Networks Inc., SiCortex Inc, Shunyao CAD, and Western Digital Inc.
 
-The contributors of major functionality are: Krzysztof
+The contributors of major functionality are: Jeremy Bennett, Krzysztof
-Bieganski, Byron Bradley, Jeremy Bennett, Lane Brooks, John Coiner, Duane
+Bieganski, Byron Bradley, Lane Brooks, John Coiner, Duane Galbi, Geza Lore,
-Galbi, Geza Lore, Todd Strader, Stefan Wallentowitz, Paul Wasson, Jie Xu,
+Todd Strader, Yutetsu Takatsukasa, Stefan Wallentowitz, Paul Wasson, Jie
-and Wilson Snyder.  Major testers included Jeff Dutton, Jonathon Donaldson,
+Xu, and Wilson Snyder.
-Ralf Karge, David Hewson, Iztok Jeras, Wim Michiels, Alex Solomatnikov,
-Sebastien Van Cauwenberghe, Gene Weber, and Clifford Wolf.
 
 Some of the people who have provided ideas, and feedback for Verilator
 include:
 
-David Addison, Tariq B. Ahmad, Nikana Anastasiadis, Vasu Arasanipalai, Jens
+David Addison, Tariq B. Ahmad, Nikana Anastasiadis, John David Anglin,
-Arm, Sharad Bagri, Matthew Ballance, Andrew Bardsley, Matthew Barr, Geoff
+Frederic Antonin, Hans Van Antwerpen, Vasu Arasanipalai, Jens Arm, Rohan
-Barrett, Kaleb Barrett, Julius Baxter, Jeremy Bennett, Michael Berman, Jean
+Arshid, Gökçe Aydos, Adam Bagley, Sharad Bagri, Robert Balas, Marco
-Berniolles, Victor Besyakov, Moinak Bhattacharyya, Krzysztof Bieganski,
+Balboni, Matthew Ballance, Andrew Bardsley, Ilya Barkov, Matthew Barr,
-David Binderman, Piotr Binkowski, Johan Bjork, David Black, Tymoteusz
+Geoff Barrett, Kaleb Barrett, Daniel Bates, Julius Baxter, Michael Berman,
-Blazejczyk, Daniel Bone, Gregg Bouchard, Christopher Boumenot, Nick Bowler,
+Jean Berniolles, Victor Besyakov, Narayan Bhagavatula, Moinak
-Byron Bradley, Bryan Brady, Maarten De Braekeleer, Charlie Brej, J Briquet,
+Bhattacharyya, Kritik Bhimani, David Biancolin, David Binderman, Piotr
-Lane Brooks, John Brownlee, Jeff Bush, Lawrence Butcher, Tony Bybell, Iru
+Binkowski, Johan Björk, David Black, Tymoteusz Blazejczyk, Scott Bleiweiss,
-Cai, Ted Campbell, Chris Candler, Lauren Carlson, Donal Casey, Alex
+David van der Bokke, Daniel Bone, Guy Bonneau, Krzysztof Boroński, Gregg
-Chadwick, Marcel Chang, Aliaksei Chapyzhenka, Guokai Chen, Terry Chen,
+Bouchard, Christopher Boumenot, Nick Bowler, Bryan Brady, Maarten De
-Yi-Chung Chen, Enzo Chi, Robert A. Clark, Ryan Clarke, Allan Cochrane, John
+Braekeleer, Charlie Brej, J Briquet, John Brownlee, KC Buckenmaier, Jeff
-Coiner, Keith Colbert, Gianfranco Costamagna, Sean Cross, George Cuan, Joe
+Bush, Lawrence Butcher, Tony Bybell, Iru Cai, Ted Campbell, Anthony Campos,
-DErrico, Lukasz Dalek, Gunter Dannoritzer, Ashutosh Das, Bernard Deadman,
+Chris Candler, Lauren Carlson, Gregory Carver, Donal Casey, Sebastien Van
-John Demme, Mike Denio, John Deroo, Philip Derrick, John Dickol, Ruben
+Cauwenberghe, Alex Chadwick, Greg Chadwick, Marcel Chang, Aliaksei
-Diez, Danny Ding, Jacko Dirks, Ivan Djordjevic, Jonathon Donaldson, Larry
+Chapyzhenka, Chih-Mao Chen, Guokai Chen, Terry Chen, Yi-Chung Chen, Yurii
-Doolittle, Sebastian Dressler, Jonathan Drolet, Alex Duller, Jeff Dutton,
+Cherkasov, Hennadii Chernyshchyk, Enzo Chi, Robert A. Clark, Ryan Clarke,
-Tomas Dzetkulic, Usuario Eda, Charles Eddleston, Chandan Egbert, Joe Eiler,
+Allan Cochrane, Keith Colbert, Quentin Corradi, Nassim Corteggiani,
-Ahmed El-Mahmoudy, Trevor Elbourne, Mats Engstrom, Robert Farrell, Eugen
+Gianfranco Costamagna, February Cozzocrea, Sean Cross, George Cuan, Michal
-Fekete, Fabrizio Ferrandi, Udi Finkelstein, Brian Flachs, Bill Flynn,
+Czyz, Joe DErrico, Jim Dai, Lukasz Dalek, Laurens van Dam, Gunter
-Andrea Foletto, Bob Fredieu, Duane Galbi, Mostafa Gamal, Benjamin Gartner,
+Dannoritzer, Ashutosh Das, Julian Daube, Bernard Deadman, Peter Debacker,
-Christian Gelinek, Richard E George, Peter Gerst, Glen Gibb, Michael
+John Demme, Mike Denio, John Deroo, Philip Derrick, Aadi Desai, John
-Gielda, Barbara Gigerl, Shankar Giri, Dan Gisselquist, Petr Gladkikh, Sam
+Dickol, Ruben Diez, Danny Ding, Jacko Dirks, Ivan Djordjevic, Brad Dobbie,
-Gladstone, Mariusz Glebocki, Andrew Goessling, Amir Gonnen, Chitlesh
+Paul Donahue, Jonathon Donaldson, Anthony Donlon, Caleb Donovick, Larry
-Goorah, Tomasz Gorochowik, Kai Gossner, Sergi Granell, Al Grant, Nathan
+Doolittle, Leendert van Doorn, Sebastian Dressler, Jonathan Drolet, Maciej
-Graybeal, Alexander Grobman, Graham Rushton, Xuan Guo, Driss Hafdi, Neil
+Dudek, Alex Duller, Jeff Dutton, Tomas Dzetkulic, Usuario Eda, Charles
-Hamilton, James Hanlon, Oyvind Harboe, Jannis Harder, Junji Hashimoto,
+Eddleston, Chandan Egbert, Joe Eiler, Ahmed El-Mahmoudy, Trevor Elbourne,
-Thomas Hawkins, Mitch Hayenga, Harald Heckmann, Robert Henry, Stephen
+Mats Engstrom, Robert Farrell, Julien Faucher, Olivier Faure, Eugen Fekete,
-Henry, David Hewson, Jamey Hicks, Joel Holdsworth, Andrew Holme, Hiroki
+Fabrizio Ferrandi, Udi Finkelstein, Brian Flachs, Bill Flynn, Andrea
-Honda, Alex Hornung, Pierre-Henri Horrein, David Horton, Peter Horvath, Jae
+Foletto, Alex Forencich, Aurelien Francillon, Bob Fredieu, Manuel
-Hossell, Kuoping Hsu, Teng Huang, Steven Hugg, Alan Hunter, James
+Freiberger, Mostafa Gamal, Vito Gamberini, Mostafa Garnal, Benjamin
-Hutchinson, Ehab Ibrahim, Edgar E. Iglesias, Jamie Iles, Vighnesh Iyer, Ben
+Gartner, Christian Gelinek, Richard E George, Peter Gerst, Glen Gibb,
-Jackson, Shareef Jalloq, Marlon James, Krzysztof Jankowski, HyungKi Jeong,
+Michael Gielda, Barbara Gigerl, Nimrod Gileadi, Shankar Giri, Dan
-Iztok Jeras, Alexandre Joannou, James Johnson, Christophe Joly, Franck
+Gisselquist, Petr Gladkikh, Sam Gladstone, Mariusz Glebocki, Embedded Go,
-Jullien, James Jung, Mike Kagen, Arthur Kahlich, Kaalia Kahn, Guy-Armand
+Andrew Goessling, Amir Gonnen, Chitlesh Goorah, Tomasz Gorochowik, Kai
+Gossner, Tarik Graba, Sergi Granell, Al Grant, Nathan Graybeal, Alexander
+Grobman, Qian Gu, Xuan Guo, Prabhat Gupta, Driss Hafdi, Neil Hamilton,
+James Hanlon, Tang Haojin, Øyvind Harboe, Jannis Harder, David Harris,
+Junji Hashimoto, Thomas Hawkins, Mitch Hayenga, Harald Heckmann, Robert
+Henry, Stephen Henry, Sebastian Hesselbarth, David Hewson, Jamey Hicks,
+Joel Holdsworth, Andrew Holme, Peter Holmes, Hiroki Honda, Alex Hornung,
+Pierre-Henri Horrein, David Horton, Peter Horvath, Jae Hossell, Kuoping
+Hsu, Teng Huang, Steven Hugg, Huanghuang Zhou, Alan Hunter, James
+Hutchinson, Tim Hutt, Ehab Ibrahim, Edgar E. Iglesias, Shahid Ikram, Jamie
+Iles, Vighnesh Iyer, Ben Jackson, Daniel Jacques, Shareef Jalloq, Marlon
+James, Krzysztof Jankowski, Eyck Jentzsch, HyungKi Jeong, Iztok Jeras,
+Alexandre Joannou, James Johnson, Christophe Joly, Justin Jones,
+William D. Jones, Larry Darryl Lee Jr., Franck Jullien, James Jung,
+Yoshitomo Kaneda, Mike Kagen, Arthur Kahlich, Kaalia Kahn, Guy-Armand
 Kamendje, Vasu Kandadi, Kanad Kanhere, Patricio Kaplan, Pieter Kapsenberg,
 Rafal Kapuscik, Ralf Karge, Per Karlsson, Dan Katz, Sol Katzman, Ian
-Kennedy, Michael Killough, Sun Kim, Jonathan Kimmitt, Olof Kindgren, Kevin
+Kennedy, Ami Keren, Michael Killough, Sun Kim, Jonathan Kimmitt, Olof
-Kiningham, Dan Kirkham, Aleksander Kiryk, Sobhan Klnv, Gernot Koch, Jack
+Kindgren, Kevin Kiningham, Cameron Kirk, Dan Kirkham, Aleksander Kiryk,
-Koenig, Soon Koh, Nathan Kohagen, Steve Kolecki, Brett Koonce, Will
+Sobhan Klnv, Gernot Koch, Jack Koenig, Soon Koh, Nathan Kohagen, Steve
-Korteland, Wojciech Koszek, Varun Koyyalagunta, Arkadiusz Kozdra, Markus
+Kolecki, Brett Koonce, Will Korteland, Andrei Kostovski, Wojciech Koszek,
-Krause, David Kravitz, Roland Kruse, Andreas Kuster, Sergey Kvachonok,
+Varun Koyyalagunta, Arkadiusz Kozdra, Markus Krause, David Kravitz, Adam
-Charles Eric LaForest, Ed Lander, Steve Lang, Stephane Laurent, Walter
+Krolnik, Roland Kruse, Mahesh Kumashikar, Andreas Kuster, Sergey Kvachonok,
-Lavino, Christian Leber, Larry Lee, Yoda Lee, Michaël Lefebvre, Igor Lesik,
+Charles Eric LaForest, Kevin Laeufer, Ed Lander, Steve Lang, Pierre
-John Li, Eivind Liland, Yu Sheng Lin, Charlie Lind, Andrew Ling, Jiuyang
+Laroche, Stephane Laurent, Walter Lavino, Christian Leber, David Ledger,
-Liu, Paul Liu, Derek Lockhart, Jake Longo, Geza Lore, Arthur Low, Stefan
+Alex Lee, Larry Lee, Yoda Lee, Michaël Lefebvre, Dag Lem, Igor Lesik, John
-Ludwig, Dan Lussier, Fred Ma, Duraid Madina, Affe Mao, Julien Margetts,
+Li, Kay Li, Zixi Li, Davide Libenzi, Nandor Licker, Eivind Liland, Ícaro
+Lima, Kevin Lin, Yu-Sheng Lin, Charlie Lind, Andrew Ling, Jiuyang Liu, Joey
+Liu, Paul Liu, Derek Lockhart, Jake Longo, Arthur Low, Jose Loyola, Stefan
+Ludwig, Dan Lussier, Konstantin Lübeck, Fred Ma, Liwei Ma, Duraid Madina,
+Oleh Maksymenko, Affe Mao, Julien Margetts, Chick Markley, Alexis Marquet,
 Mark Marshall, Alfonso Martinez, Unai Martinez-Corral, Adrien Le Masle,
-Yves Mathieu, Patrick Maupin, Conor McCullough, Jason McMullan, Elliot
+Yves Mathieu, Vladimir Matveyenko, Patrick Maupin, Stan Mayer, Conor
-Mednick, David Metz, Wim Michiels, Miodrag Milanovic, Kevin Millis, Wai Sum
+McCullough, Jason McMullan, Elliot Mednick, Yuan Mei, Andy Meier,
-Mong, Peter Monsson, Sean Moore, Dennis Muhlestein, John Murphy, Matt
+Rodrigo A. Melo, Benjamin Menküc, Jake Merdich, David Metz, Wim Michiels,
-Myers, Nathan Myers, Richard Myers, Dimitris Nalbantis, Peter Nelson, Bob
+Miodrag Milanović, Darryl Miles, Kevin Millis, Andrew Miloradovsky, Wai Sum
-Newgard, Rachit Nigam, Paul Nitza, Yossi Nivin, Pete Nixon, Lisa Noack,
+Mong, Peter Monsson, Sean Moore, Stuart Morris, Dennis Muhlestein, John
-Mark Nodine, Kuba Ober, Andreas Olofsson, Baltazar Ortiz, Aleksander Osman,
+Murphy, Matt Myers, Nathan Myers, Richard Myers, Alex Mykyta, Dimitris
-Don Owen, James Pallister, Vassilis Papaefstathiou, Brad Parker, Morten
+Nalbantis, Peter Nelson, Felix Neumärker, Bob Newgard, Cong Van Nguyen,
-Borup Petersen, Dan Petrisko, Maciej Piechotka, David Pierce, Cody
+Rachit Nigam, Toru Niina, Paul Nitza, Yossi Nivin, Pete Nixon, Lisa Noack,
-Piersall, Michael Platzer, Dominic Plunkett, David Poole, Mike Popoloski,
+Mark Nodine, Michael Nolan, Andrew Nolte, Joseph Nwabueze, Kuba Ober,
-Roman Popov, Rich Porter, Stefan Post, Niranjan Prabhu, Damien Pretet, Usha
+Andreas Olofsson, Baltazar Ortiz, Aleksander Osman, Don Owen, Tim Paine,
-Priyadharshini, Mark Jackson Pulver, Prateek Puri, Marshal Qiao, Nandu Raj,
+Deepa Palaniappan, James Pallister, Vassilis Papaefstathiou, Sanggyu Park,
-Kamil Rakoczy, Danilo Ramos, Drew Ranck, Chris Randall, Anton Rapp, Josh
+Brad Parker, Risto Pejašinović, Morten Borup Petersen, Dan Petrisko, Wesley
-Redford, Odd Magne Reitan, Frederic Requin, Dustin Richmond, Samuel Riedel,
+Piard, Maciej Piechotka, David Pierce, Cody Piersall, T. Platz, Michael
-Alberto Del Rio, Eric Rippey, Oleg Rodionov, Ludwig Rogiers, Paul Rolfe,
+Platzer, Dominic Plunkett, David Poole, Michael Popoloski, Roman Popov,
-Arjen Roodselaar, Tobias Rosenkranz, Ryszard Rozak, Huang Rui, Graham
+Aylon Chaim Porat, Oron Port, Rich Porter, Rick Porter, Stefan Post,
-Rushton, Jan Egil Ruud, Denis Rystsov, John Sanguinetti, Martin Schmidt,
+Niranjan Prabhu, Damien Pretet, Harald Pretl, Bill Pringlemeir, Usha
-Julie Schwartz, Galen Seitz, Joseph Shaker, Salman Sheikh, Hao Shi, Mike
+Priyadharshini, Mark Jackson Pulver, Prateek Puri, Jiacheng Qian, Marshal
-Shinkarovsky, Rafael Shirakawa, Jeffrey Short, Fan Shupei, Anderson Ignacio
+Qiao, Raynard Qiao, Yujia Qiao, Jasen Qin, Frank Qiu, Nandu Raj, Kamil
-da Silva, Rodney Sinclair, Ameya Vikram Singh, Steven Slatter, Mladen
+Rakoczy, Danilo Ramos, Drew Ranck, Chris Randall, Anton Rapp, Josh Redford,
-Slijepcevic, Brian Small, Garrett Smith, Tim Snyder, Wilson Snyder, Maciej
+Odd Magne Reitan, Frédéric Requin, Dustin Richmond, Samuel Riedel, Alberto
+Del Rio, Eric Rippey, Oleg Rodionov, Ludwig Rogiers, Paul Rolfe, Michail
+Rontionov, Arjen Roodselaar, Tobias Rosenkranz, Yernagula Roshit, Ryszard
+Rozak, Huang Rui, Graham Rushton, Jan Egil Ruud, Denis Rystsov, Pawel
+Sagan, Robert Sammelson, John Sanguinetti, Josep Sans, Luca Sasselli,
+Martin Scharrer, Martin Schmidt, Julie Schwartz, Galen Seitz, Joseph
+Shaker, Mark Shaw, Salman Sheikh, Zhou Shen, Hao Shi, James Shi, Michael
+Shinkarovsky, Rafael Shirakawa, Jeffrey Short, S Shuba, Fan Shupei, Ethan
+Sifferman, Anderson Ignacio da Silva, Rodney Sinclair, Ameya Vikram Singh,
+Sanjay Singh, Frans Skarman, Nate Slager, Steven Slatter, Mladen
+Slijepcevic, Brian Small, Garrett Smith, Gus Smith, Tim Snyder, Maciej
 Sobkowski, Stan Sokorac, Alex Solomatnikov, Flavien Solt, Wei Song, Trefor
 Southwell, Martin Stadler, Art Stamness, David Stanford, John Stevenson,
-Pete Stevenson, Patrick Stewart, Rob Stoddard, Todd Strader, John Stroebel,
+Pete Stevenson, Patrick Stewart, Rob Stoddard, Tood Strader, John Stroebel,
-Sven Stucki, Howard Su, Emerson Suguimoto, Gene Sullivan, Qingyao Sun,
+Ray Strouble, Sven Stucki, Howard Su, Emerson Suguimoto, Gene Sullivan,
-Renga Sundararajan, Gustav Svensk, Rupert Swarbrick, Yutetsu Takatsukasa,
+Qingyao Sun, Renga Sundararajan, Kuba Sunderland-Ober, Gustav Svensk,
-Thierry Tambe, Drew Taussig, Jose Tejada, Peter Tengstrand, Wesley
+Rupert Swarbrick, Jevin Sweval, Shinya T-Y, Thierry Tambe, Jesse Taube,
-Terpstra, Rui Terra, Stefan Thiede, Gary Thomas, Ian Thompson, Kevin
+Drew Taussig, Jose Tejada, Sören Tempel, Peter Tengstrand, Wesley Terpstra,
-Thompson, Mike Thyer, Hans Tichelaar, Viktor Tomov, Steve Tong, Topa
+Rui Terra, Stefan Thiede, Justin Thiel, Gary Thomas, Ian Thompson, Kevin
-Topino, Alex Torregrosa, Michael Tresidder, David Turner, Neil Turton, Mike
+Thompson, Mike Thyer, Hans Tichelaar, Tudor Timi, Viktor Tomov, Steve Tong,
-Urbach, Hans Van Antwerpen, Sebastien Van Cauwenberghe, Laurens van Dam,
+Topa Topino, Àlex Torregrosa, Topa Tota, Michael Tresidder, Lenny Truong,
-Leendert van Doorn, Cong Van Nguyen, Jan Van Winkel, Srini Vemuri, Yuri
+David Turner, Neil Turton, Hideto Ueno, Mike Urbach, Joel Vandergriendt,
-Victorovich, Bogdan Vukobratovic, Holger Waechtler, Philipp Wagner, Stefan
+Srini Vemuri, Srinivasan Venkataramanan, Yuri Victorovich, Ivan Vnučec,
-Wallentowitz, Shawn Wang, Zhanglei Wang, Paul Wasson, Greg Waters, Thomas
+Bogdan Vukobratovic, Holger Waechtler, Philipp Wagner, Johannes Walter, CY
-Watts, Eugene Weber, David Welch, Thomas J Whatson, Martin Whitaker, Marco
+Wang, Chuxuan Wang, Shawn Wang, Zhanglei Wang, Greg Waters, Thomas Watts,
-Widmer, Leon Wildman, Daniel Wilkerson, Gerald Williams, Trevor Williams,
+Eugene Weber, John Wehle, Tianrui Wei, David Welch, Thomas J Whatson,
-Jeff Winston, Joshua Wise, Clifford Wolf, Tobias Wolfel, Johan Wouters,
+Martin Whitaker, Marco Widmer, Leon Wildman, Daniel S. Wilkerson, Daniel
-Paul Wright, Junyi Xi, Ding Xiaoliang, Jie Xu, Mandy Xu, Yinan Xu, Luke
+Wilkerson, Gerald Williams, Trevor Williams, Don Williamson, Jan Van
-Yang, Amir Yazdanbakhsh, Keyi Zhang, and Xi Zhang.
+Winkel, Jeff Winston, Joshua Wise, Clifford Wolf, Johan Wouters, Paul
+Wright, Tobias Wölfel, Junyi Xi, Ding Xiaoliang, Liu Xiaoyi, Mandy Xu,
+Shanshan Xu, Yinan Xu, SU YANG, Felix Yan, Luke Yang, Amir Yazdanbakhsh,
+Chentai (Seven) Yuan, Florian Zaruba, Mat Zeno, Keyi Zhang, Xi Zhang, Yike
+Zhou, Jiamin Zhu.
 
 Thanks to them, and all those we've missed mentioning above, and to those
 whom have wished to remain anonymous.

docs/guide/copyright.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *********
@@ -8,7 +8,7 @@ Copyright
 The latest version of Verilator is available from `https://verilator.org
 <https://verilator.org>`_.
 
-Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+Copyright 2003-2024 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify the Verilator internals under the terms
 of either the GNU Lesser General Public License Version 3 or the Perl
 Artistic License Version 2.0.

docs/guide/deprecations.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 Deprecations
@@ -6,34 +6,14 @@ Deprecations
 
 The following deprecated items are scheduled for future removal:
 
-C++11 compiler support
+C++14 compiler support
   Verilator currently requires a C++20 or newer compiler for timing, and a
-  C++11 or newer compiler for no-timing.
+  C++14 or newer compiler for both compiling Verilator and compiling
-
+  Verilated models with --no-timing.
-  Verilator will require C++14 or newer compilers for both compiling
-  Verilator and compiling Verilated models with --no-timing no sooner than
-  January 2023.
 
   Verilator will require C++20 or newer compilers for both compiling
   Verilator and compiling all Verilated models no sooner than January 2025.
 
-Verilated_heavy.h
+XML output
-  The legacy "verilated_heavy.h" include was replaced with just including
+  Verilator currently supports XML parser output (enabled with `--xml-only`).
-  "verilated.h". Verilated_heavy.h is planned for removal no sooner than
+  Support for `--xml-*` options will be deprecated no sooner than January 2025.
-  July 2022.
-
-Option `-O<letter>`
-  The debug `-O<letter>` options have been replaced with
-  `-fno-<optimization>` debug options to match GCC. The old options are
-  planned for removal no sooner than June 2023.
-
-Option `--prof-threads`
-  The `--prof-threads` option has been superseded by the `--prof-exec` and
-  `--prof-pgo` options and is planned for removal no sooner than April 2023.
-
-Verilated model options `+verilator+prof+threads+*`
-  The `+verilator+prof+threads+start`, `+verilator+prof+threads+window` and
-  `+verilator+prof+threads+file` options have been superseded by the
-  `+verilator+prof+exec+start`, `+verilator+prof+exec+window` and
-  `+verilator+prof+exec+file` options respectively and are planned for removal
-  no sooner than April 2023.

docs/guide/environment.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 Environment
@@ -29,7 +29,7 @@ associated programs.
 .. option:: OBJCACHE
 
    Optionally specifies a caching or distribution program to place in front
-   of all runs of the C++ compiler.  For example, "ccache".  If using
+   of all runs of the C++ compiler.  For example, "ccache" or "sccache".  If using
    :command:`distcc` or :command:`icecc`/:command:`icecream`, they would
    generally be run under :command:`ccache`; see the documentation for
    those programs.  If OBJCACHE is not set, and at configure time ccache
@@ -91,9 +91,83 @@ associated programs.
 
 .. option:: VERILATOR_ROOT
 
-   Specifies the directory containing the distribution kit.  This is used
+   The ``VERILATOR_ROOT`` environment variable is used in several places:
-   to find the executable, Perl library, and include files.  If not
+
-   specified, it will come from a default optionally specified at configure
+   * At ``./configure`` time: If set, it is embedded into the binary, and
-   time (before Verilator was compiled).  It should not be specified if
+     at runtime if ``VERILATOR_ROOT`` is not set, the embedded value is
-   using a pre-compiled Verilator package as the hard-coded value should be
+     used for the runtime default.
-   correct.  See :ref:`Installation`.
+
+   * When ``verilator`` is run: If ``VERILATOR_ROOT`` is set it will be
+     used to find the ``verilator_bin`` executable (this is the actual
+     Verilator binary; ``verilator`` is a Perl wrapper). If not set, the
+     ``verilator`` script uses other methods to find ``verilator_bin``
+     (looking in the same directory and falling back to ``$PATH``).
+
+   * When ``make`` is run on the Makefile generated by ``verilator``: The
+     value of ``VERILATOR_ROOT`` (falling back to the value embedded in the
+     binary if not set) is used to find the include files
+     (``include/verilated.mk``).
+
+   If you are using a pre-compiled Verilator package, you should not need
+   to set ``VERILATOR_ROOT`` - the value embedded in the binary should be
+   correct.  In fact this option *does not work* with Verilator packages
+   that have been installed with ``make install``. If a Verilator package
+   has been installed using ``./configure --prefix=/some/path && make
+   install`` and then moved to another location, you cannot use
+   ``VERILATOR_ROOT`` to point to the new version.
+
+   See :ref:`Installation` for more details.
+
+.. option:: VERILATOR_SOLVER
+
+   If set, the command to run as a constrained randomization backend, such
+   as :command:`cvc4 --lang=smt2 --incremental`.  If not specified, it will use
+   the one supplied or found during configure, or :command:`z3 --in` if empty.
+
+.. option:: VERILATOR_VALGRIND
+
+   If set, the command to run when using the :vlopt:`--valgrind` option, such as
+   "valgrind --tool=callgrind".  If not specified, it will use "valgrind".
+
+
+Make Variables
+==============
+
+This section describes the make variables used by Verilator. These may be
+set by passing them to make e.g. ``make CXX=my-gcc ...``.
+
+.. option:: AR
+
+   Optionally overrides the default :command:`ar` (archive) binary used by
+   the Verilated makefiles. If AR is not set, the version found at
+   configure time is used.
+
+.. option:: CXX
+
+   Optionally overrides the default compiler binary used by the Verilated
+   makefiles. If CXX is not set, the version found at configure time is
+   used.  Note the default flags passed to the compiler are determined at
+   configuration time, so changing the CXX compiler version using this
+   variable, as opposed to passing it at configuration time, may not give
+   desired results.
+
+.. option:: LINK
+
+   Optionally overrides the default linker binary used by the Verilated
+   makefiles. If LINK is not set, the version found at configure time is
+   used.  Note the default flags passed to the linker are determined at
+   configuration time, so changing the LINK version using this variable, as
+   opposed to passing it at configuration time, may not give desired
+   results.
+
+.. option:: PERL
+
+   Optionally overrides the default :command:`perl` binary used by the
+   Verilated makefiles. If PERL is not set, the version found at configure
+   time, and compiled into the Verilator binary, is used.
+
+.. option:: PYTHON3
+
+   Optionally overrides the default :command:`python3` binary used by the
+   Verilated makefiles. If PYTHON3 is not set, the version found at
+   configure time is used.

docs/guide/example_binary.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Example Create-Binary Execution:

docs/guide/example_cc.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Example C++ Execution:

docs/guide/example_common_install.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 First you need Verilator installed, see :ref:`Installation`.  In brief, if

docs/guide/example_dist.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Examples in the Distribution:

docs/guide/example_sc.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Example SystemC Execution:

docs/guide/examples.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Examples:
@@ -9,6 +9,7 @@ Examples
 
 This section covers the following examples:
 
+* :ref:`Example Create-Binary Execution`
 * :ref:`Example C++ Execution`
 * :ref:`Example SystemC Execution`
 * :ref:`Examples in the Distribution`

docs/guide/exe_sim.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Simulation Runtime Arguments:
@@ -19,11 +19,20 @@ Summary:
    .. include:: ../_build/gen/args_verilated.rst
 
 
+.. option:: +verilator+coverage+file+<filename>
+
+   When a model was Verilated using :vlopt:`--coverage`, sets the filename
+   to write coverage data into.  Defaults to :file:`coverage.dat`.
+
 .. option:: +verilator+debug
 
    Enable simulation runtime debugging.  Equivalent to
    :vlopt:`+verilator+debugi+4 <+verilator+debugi+\<value\>>`.
 
+   To be useful, the model typically must first be compiled with debug
+   capabilities by Verilating with :vlopt:`--runtime-debug` or `-CFLAGS
+   -DVL_DEBUG=1`.
+
 .. option:: +verilator+debugi+<value>
 
    Enable simulation runtime debugging at the provided level.
@@ -64,15 +73,18 @@ Summary:
 
 .. option:: +verilator+prof+threads+file+<filename>
 
-   Deprecated. Alias for :vlopt:`+verilator+prof+exec+file+\<filename\>`
+   Removed in 5.020. Was an alias for
+   :vlopt:`+verilator+prof+exec+file+\<filename\>`
 
 .. option:: +verilator+prof+threads+start+<value>
 
-   Deprecated. Alias for :vlopt:`+verilator+prof+exec+start+\<value\>`
+   Removed in 5.020. Was an alias for
+   :vlopt:`+verilator+prof+exec+start+\<value\>`
 
 .. option:: +verilator+prof+threads+window+<value>
 
-   Deprecated. Alias for :vlopt:`+verilator+prof+exec+window+\<value\>`
+   Removed in 5.020. Was an alias for
+   :vlopt:`+verilator+prof+exec+window+\<value\>`
 
 .. option:: +verilator+prof+vlt+file+<filename>
 
@@ -80,6 +92,11 @@ Summary:
    profile-guided optimization data runtime filename to dump to.  Defaults
    to :file:`profile.vlt`.
 
+.. option:: +verilator+quiet
+
+   Disable printing the simulation summary report, see :ref:`Simulation
+   Summary Report`.
+
 .. option:: +verilator+rand+reset+<value>
 
    When a model was Verilated using

docs/guide/exe_verilator.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 verilator Arguments
@@ -51,6 +51,8 @@ Summary:
 
 .. option:: +1800-2017ext+<ext>
 
+.. option:: +1800-2023ext+<ext>
+
    Specifies the language standard to be used with a specific filename
    extension, <ext>.
 
@@ -85,7 +87,11 @@ Summary:
 
 .. option:: --assert
 
-   Enable all assertions.
+   Enable all assertions. Implies :vlopt:`--assert-case`.
+
+.. option:: --assert-case
+
+   Enable unique/unique0/priority case related checks.
 
 .. option:: --autoflush
 
@@ -125,9 +131,12 @@ Summary:
 
    After generating the SystemC/C++ code, Verilator will invoke the
    toolchain to build the model library (and executable when :vlopt:`--exe`
-   is also used). Verilator manages the build itself, and for this --build
+   is also used).  Verilator manages the build itself, and for this --build
    requires GNU Make to be available on the platform.
 
+   :vlopt:`--build` cannot be specified when using :vlopt:`-E`,
+   :vlopt:`--dpi-hdr-only`, :vlopt:`--lint-only`, or :vlopt:`--xml-only`.
+
 .. option:: --build-dep-bin <filename>
 
    Rarely needed.  When a dependency (.d) file is created, this filename
@@ -192,9 +201,10 @@ Summary:
 
 .. option:: --compiler <compiler-name>
 
-   Enables workarounds for the specified C++ compiler (list below).
+   Enables workarounds for the specified C++ compiler (list below).  This
-   This does not change any performance tuning options, but it may
+   does not change any performance tuning options, but it may in the
-   in the future.
+   future.  This also does not change default compiler flags; these are
+   determined when Verilator was configured.
 
    clang
      Tune for clang.  This may reduce execution speed as it enables several
@@ -212,6 +222,13 @@ Summary:
      expressions into sub-expressions to avoid error C1009, and breaking
      deep blocks into functions to avoid error C1061.
 
+.. option:: --compiler-include <header-path>
+
+   Specifies additional headers to be included in the final PCH header.
+   It is required to add them to this header, due to compilers'
+   limitation that allow only one precompiled header per compilation.
+   Use this instead of ::vlopt:`-CFLAGS` with `-include <header-path>`.
+
 .. option:: --converge-limit <loops>
 
    Rarely needed.  Specifies the maximum number of runtime iterations
@@ -301,19 +318,47 @@ Summary:
    detailed messages.  See :vlopt:`--debug` for other implications of
    enabling debug.
 
+.. option:: --decorations none
+
+.. option:: --decorations medium
+
+.. option:: --decorations node
+
+   When creating output Verilated code, set level of comment and whitespace
+   decoration.
+
+   With "--decorations none",
+     Minimize comments, white space, symbol names, and other decorative
+     items, at the cost of reduced readability. This may assist C++ compile
+     times. This will not typically change the ultimate model's
+     performance, but may in some cases.  See also :vlopt:`--no-decoration`
+     option.
+
+   With "--decorations medium",
+     The default, put a small amount of comments and white space, for
+     typical level of readability.
+
+   With "--decorations node",
+     Include comments indicating what caused generation of the following
+     text, including what node pointer (corresponding to
+     :vlopt:`--dump-tree` .tree printed data), and the source Verilog
+     filename and line number.  If subsequent following statements etc have
+     the same filename/line number these comments are omitted.  This
+     enables easy debug when looking at the C++ code to determine what
+     Verilog source may be related.  As node pointers are not stable
+     between different Verilator runs, this may harm compile caching and
+     should only be used for debug.
+
 .. option:: --no-decoration
 
-   When creating output Verilated code, minimize comments, white space,
+   Alias for ``--decorations none``.
-   symbol names, and other decorative items, at the cost of reduced
-   readability. This may assist C++ compile times. This will not typically
-   change the ultimate model's performance, but may in some cases.
 
 .. option:: --default-language <value>
 
    Select the language used by default when first processing each
    Verilog file.  The language value must be "VAMS", "1364-1995",
    "1364-2001", "1364-2001-noconfig", "1364-2005", "1800-2005",
-   "1800-2009", "1800-2012", "1800-2017", or "1800+VAMS".
+   "1800-2009", "1800-2012", "1800-2017", "1800-2023", or "1800+VAMS".
 
    Any language associated with a particular file extension (see the
    various +<lang>*\ ext+ options) will be used in preference to the
@@ -326,7 +371,7 @@ Summary:
    ``+<lang>ext+`` options should be used.
 
    If no language is specified, either by this option or ``+<lang>ext+``
-   options, then the latest SystemVerilog language (IEEE 1800-2017) is
+   options, then the latest SystemVerilog language (IEEE 1800-2023) is
    used.
 
 .. option:: +define+<var>=<value>
@@ -375,6 +420,12 @@ Summary:
    :vlopt:`--debug --no-dump-tree <--dump-tree>` may be useful if the dump
    files are large and not desired.
 
+.. option:: --dump-tree-json
+
+   Rarely needed.  Enable dumping Ast .json.tree debug files with dumping level 3,
+   which dumps the standard critical stages.  For details on the format, see
+   the Verilator Internals manual.
+
 .. option:: --dump-tree-dot
 
    Rarely needed.  Enable dumping Ast .tree.dot debug files in Graphviz
@@ -410,6 +461,11 @@ Summary:
    Rarely needed - for developer use.  Set internal Ast dumping level
    globally to the specified value.
 
+.. option:: --dumpi-tree-json <level>
+
+   Rarely needed - for developer use.  Set internal Ast JSON dumping level
+   globally to the specified value.
+
 .. option:: --dumpi-<srcfile> <level>
 
    Rarely needed - for developer use. Set the dumping level in the
@@ -427,6 +483,12 @@ Summary:
    See also :vlopt:`--dump-defines`, :vlopt:`-P`, and
    :vlopt:`--pp-comments` options.
 
+.. option:: --emit-accessors
+
+   Emit getter and setter methods for each top-level signal in the
+   model top class. Signals are still available as public members,
+   but with the `__Vm_sig_` prefix.
+
 .. option:: --error-limit <value>
 
    After this number of errors are encountered during Verilator run, exit.
@@ -661,6 +723,13 @@ Summary:
    :option:`/*verilator&32;hier_block*/` metacomment is ignored.  See
    :ref:`Hierarchical Verilation`.
 
+.. option:: --hierarchical-params-file <filename>
+
+   Internal flag inserted used during :vlopt:`--hierarchical`; specifies
+   name of hierarchical parameters file for deparametrized modules with
+   :option:`/*verilator&32;hier_block*/` metacomment. See
+   :ref:`Hierarchical Verilation`.
+
 .. option:: -I<dir>
 
    See :vlopt:`-y`.
@@ -768,6 +837,11 @@ Summary:
    If the design is not to be completely Verilated, see also the
    :vlopt:`--bbox-sys` and :vlopt:`--bbox-unsup` options.
 
+.. option:: --localize-max-size <value>
+
+   Rarely needed.  Set the maximum variable size in bytes for it to be
+   subject to localizing-to-stack optimization.  Defaults to 1024.
+
 .. option:: --make <build-tool>
 
    Generates a script for the specified build tool.
@@ -808,6 +882,13 @@ Summary:
 
    See also :vlopt:`--binary`.
 
+.. option:: --main-top-name <string>
+
+   Specify the name passed to the Verilated model being constructed, in the
+   generated C++ main() function.
+
+   If the string ``"-"`` is used, no top level scope is added.
+
 .. option:: --max-num-width <value>
 
    Set the maximum number literal width (e.g., in 1024'd22 this
@@ -929,6 +1010,13 @@ Summary:
    :option:`/*verilator&32;sc_bv*/` metacomment to select specific ports to
    be sc_bv.
 
+.. option:: --pins-inout-enables
+
+   Specifies that the __en and __out outputs will always be created for
+   inouts in the top-level module. The __en variable has a one in a bit
+   position to indicate the corresponding bit of the __out variable has
+   a value being driven from within the Verilated model.
+
 .. option:: --pins-sc-uint
 
    Specifies SystemC inputs/outputs greater than 2 bits wide should use
@@ -936,6 +1024,10 @@ Summary:
    :vlopt:`--pins-sc-biguint` combination, it results in sc_uint being used
    between 2 and 64 and sc_biguint being used between 65 and 512.
 
+.. option:: --pins-sc-uint-bool
+
+   Specifies SystemC inputs/outputs one bit wide should use sc_uint<1>.
+
 .. option:: --pins-sc-biguint
 
    Specifies SystemC inputs/outputs greater than 65 bits wide should use
@@ -1026,7 +1118,7 @@ Summary:
 
 .. option:: --prof-threads
 
-   Deprecated. Same as --prof-exec and --prof-pgo together.
+   Removed in 5.020. Was an alias for --prof-exec and --prof-pgo together.
 
 .. option:: --protect-ids
 
@@ -1118,11 +1210,20 @@ Summary:
    Overwrites the given parameter(s) of the top-level module. See
    :vlopt:`-G <-G<name>>` for a detailed description.
 
+.. option:: --quiet
+
+   Alias for :vlopt:`--quiet-exit` :vlopt:`--quiet-stats`.
+
 .. option:: --quiet-exit
 
    When exiting due to an error, do not display the "Exiting due to Errors"
    nor "Command Failed" messages.
 
+.. option:: --quiet-stats
+
+   Disable printing the Verilation statistics report, see :ref:`Verilation
+   Summary Report`.
+
 .. option:: --relative-includes
 
    When a file references an include file, resolve the filename relative to
@@ -1173,6 +1274,40 @@ Summary:
    Run Verilator and record with the :command:`rr` command.  See
    `https://rr-project.org <https://rr-project.org>`_.
 
+.. option:: --runtime-debug
+
+   Enable including debug assertions in the generated model. This may
+   significantly decrease model performance. This option will only work
+   with gcc/clang.
+
+   This option has the same effect as the following flags:
+
+   :vlopt:`--decorations node <--decorations>`
+     Instructs Verilator to add comments to the Verilated C++ code to
+     assist determining what Verilog code was responsible for each C++
+     statement.
+
+   ``-CFLAGS -ggdb  -LDFLAGS -ggdb``
+     Instructs the compiler and linker to enable debugger symbols.
+
+   ``-CFLAGS -fsanitize=address,undefined  -LDFLAGS -fsanitize=address,undefined``
+     Instructs the compiler and linker to enable the address sanitizer, and
+     undefined behavior sanitizer.
+
+   ``-CFLAGS -D_GLIBCXX_DEBUG``
+     Instructs the compiler to enable C++ library (glibc) internal
+     assertions to find library-misuse issues.
+
+   ``-CFLAGS -DVL_DEBUG=1``
+     Instructs the compiler to enable Verilator's runtime assertions and
+     debug capabilities.  To enable debug print messages at runtime, see
+     :vlopt:`+verilator+debug`.
+
+   The :vlopt:`-CFLAGS` and/or :vlopt:`-LDFLAGS` options used here pass the
+   following argument into the generated Makefile for use as compiler or
+   linker options respectively.  If you are using your own Makefiles, adapt
+   appropriately to pass the suggested flags to the compiler and linker.
+
 .. option:: --savable
 
    Enable including save and restore functions in the generated model.  See
@@ -1195,6 +1330,8 @@ Summary:
 
    Creates a dump file with statistics on the design in
    :file:`<prefix>__stats.txt`.
+   Also dumps DFG patterns to
+   :file:`<prefix>__stats_dfg_patterns__*.txt`.
 
 .. option:: --stats-vars
 
@@ -1206,6 +1343,10 @@ Summary:
 
    Prevents parsing standard library.
 
+.. option:: --no-stop-fail
+
+   Don't call $stop when assertion fails. Simulation will continue.
+
 .. option:: --structs-packed
 
    Converts all unpacked structures to packed structures, and issues an
@@ -1216,12 +1357,12 @@ Summary:
 .. option:: -sv
 
    Specifies SystemVerilog language features should be enabled; equivalent
-   to :vlopt:`--language 1800-2017 <--language>`.  This option is selected
+   to :vlopt:`--language 1800-2023 <--language>`.  This option is selected
    by default; it exists for compatibility with other simulators.
 
 .. option:: +systemverilogext+<ext>
 
-   A synonym for :vlopt:`+1800-2017ext+\<ext\>`.
+   A synonym for :vlopt:`+1800-2023ext+\<ext\>`.
 
 .. option:: --threads <threads>
 
@@ -1307,6 +1448,7 @@ Summary:
    This is not needed with standard designs with only one top.  See also
    :option:`MULTITOP` warning.
 
+
 .. option:: --trace
 
    Adds waveform tracing code to the model using VCD format. This overrides
@@ -1352,13 +1494,13 @@ Summary:
    Enable FST waveform tracing in the model. This overrides
    :vlopt:`--trace`.  See also :vlopt:`--trace-threads` option.
 
-.. option:: --trace-max-array *depth*
+.. option:: --trace-max-array <depth>
 
    Rarely needed.  Specify the maximum array depth of a signal that may be
    traced.  Defaults to 32, as tracing large arrays may greatly slow traced
    simulations.
 
-.. option:: --trace-max-width *width*
+.. option:: --trace-max-width <width>
 
    Rarely needed.  Specify the maximum bit width of a signal that may be
    traced.  Defaults to 256, as tracing large vectors may greatly slow
@@ -1375,7 +1517,7 @@ Summary:
    format constraints, this may result in significantly slower trace times
    and larger trace files.
 
-.. option:: --trace-threads *threads*
+.. option:: --trace-threads <threads>
 
    Enable waveform tracing using separate threads. This is typically faster
    in simulation runtime but uses more total compute. This option only
@@ -1385,6 +1527,17 @@ Summary:
    This option is accepted, but has absolutely no effect with
    :vlopt:`--trace`, which respects :vlopt:`--threads` instead.
 
+.. option:: --no-trace-top
+
+   Disables tracing for the input and output signals in the top wrapper which
+   Verilator adds to the design. The signals are still traced in the original
+   verilog top modules.
+
+   When combined with :option:`--main-top-name` set to "-" or when the name of
+   the top module is set to "" in its constructor, the generated trace file
+   will have the verilog top module as its root, rather than another module
+   added by Verilator.
+
 .. option:: --trace-underscore
 
    Enable tracing of signals or modules that start with an
@@ -1402,15 +1555,19 @@ Summary:
 
 .. option:: --unroll-count <loops>
 
-   Rarely needed.  Specifies the maximum number of loop iterations that may be
+   Rarely needed.  Specifies the maximum number of loop iterations that may
-   unrolled.  See also :option:`BLKLOOPINIT` warning.
+   be unrolled.  See also :option:`BLKLOOPINIT` warning, and
+   :option:`/*verilator&32;unroll_disable*/` and
+   :option:`/*verilator&32;unroll_full*/` metacomments.
 
-.. option:: --unroll-stmts *statements*
+.. option:: --unroll-stmts <statements>
 
    Rarely needed.  Specifies the maximum number of statements in a loop for
-   that loop to be unrolled. See also :option:`BLKLOOPINIT` warning.
+   that loop to be unrolled.  See also :option:`BLKLOOPINIT` warning, and
+   :option:`/*verilator&32;unroll_disable*/` and
+   :option:`/*verilator&32;unroll_full*/` metacomments.
 
-.. option:: --unused-regexp *regexp*
+.. option:: --unused-regexp <regexp>
 
    Rarely needed.  Specifies a simple regexp with \* and ? that, if a signal
    name matches, will suppress the :option:`UNUSED` warning.  Defaults to
@@ -1422,12 +1579,17 @@ Summary:
    into Verilator.  (Similar to :command:`perl -V`.)  See also
    :vlopt:`--getenv` option.
 
-.. option:: -v *filename*
+.. option:: -v <filename>
 
    Read the filename as a Verilog library.  Any modules in the file may be
    used to resolve instances in the top-level module, otherwise, they are
    ignored.  Note "-v" is relatively standard across Verilog tools.
 
+.. option:: --valgrind
+
+   Run Verilator under `Valgrind <https://valgrind.org/>`_.  The command may be
+   changed with :option:`VERILATOR_VALGRIND`.
+
 .. option:: --no-verilate
 
    When using :vlopt:`--build`, disable the generation of C++/SystemC code, and
@@ -1459,7 +1621,7 @@ Summary:
 
    Enable the use of VPI and linking against the :file:`verilated_vpi.cpp` files.
 
-.. option:: --waiver-output *filename*
+.. option:: --waiver-output <filename>
 
    Generate a waiver file that contains all waiver statements to suppress
    the warnings emitted during this Verilator run. This, in particular, is
@@ -1467,8 +1629,11 @@ Summary:
    them systematically.
 
    The generated file is in the Verilator Configuration format, see
-   :ref:`Configuration Files`, and can directly be consumed by
+   :ref:`Configuration Files`. The standard file extension is ".vlt".
-   Verilator. The standard file extension is ".vlt".
+   These files can directly be consumed by Verilator, typically by placing
+   the filename as part of the Verilator command line options. Waiver files
+   need to be listed on the command line before listing the files they are
+   waiving.
 
 .. option:: -Wall
 
@@ -1513,13 +1678,15 @@ Summary:
 
 .. option:: -Wno-lint
 
-   Disable all lint-related warning messages, and all style warnings.  This is
+   Disable all lint-related warning messages, and all style warnings.  This
-   equivalent to ``-Wno-ALWCOMBORDER -Wno-ASCRANGE -Wno-BSSPACE -Wno-CASEINCOMPLETE
+   is equivalent to ``-Wno-ALWCOMBORDER`` ``-Wno-ASCRANGE``
-   -Wno-CASEOVERLAP -Wno-CASEX -Wno-CASTCONST -Wno-CASEWITHX -Wno-CMPCONST -Wno-COLONPLUS
+   ``-Wno-BSSPACE`` ``-Wno-CASEINCOMPLETE`` ``-Wno-CASEOVERLAP``
-   -Wno-IMPLICIT -Wno-IMPLICITSTATIC -Wno-PINCONNECTEMPTY
+   ``-Wno-CASEX`` ``-Wno-CASTCONST`` ``-Wno-CASEWITHX`` ``-Wno-CMPCONST``
-   -Wno-PINMISSING -Wno-STATICVAR -Wno-SYNCASYNCNET -Wno-UNDRIVEN -Wno-UNSIGNED
+   ``-Wno-COLONPLUS`` ``-Wno-IMPLICIT`` ``-Wno-IMPLICITSTATIC``
-   -Wno-UNUSEDGENVAR -Wno-UNUSEDPARAM -Wno-UNUSEDSIGNAL
+   ``-Wno-PINCONNECTEMPTY`` ``-Wno-PINMISSING`` ``-Wno-STATICVAR``
-   -Wno-WIDTH`` plus the list shown for Wno-style.
+   ``-Wno-SYNCASYNCNET`` ``-Wno-UNDRIVEN`` ``-Wno-UNSIGNED``
+   ``-Wno-UNUSEDGENVAR`` ``-Wno-UNUSEDPARAM`` ``-Wno-UNUSEDSIGNAL``
+   ``-Wno-WIDTH``, plus the list shown for :vlopt:`-Wno-style`.
 
    It is strongly recommended that you clean up your code rather than using this
    option; it is only intended to be used when running test-cases of code
@@ -1527,12 +1694,13 @@ Summary:
 
 .. option:: -Wno-style
 
-   Disable all code style related warning messages (note that by default, they are
+   Disable all code style related warning messages (note that by default,
-   already disabled).  This is equivalent to ``-Wno-DECLFILENAME -Wno-DEFPARAM
+   they are already disabled).  This is equivalent to ``-Wno-DECLFILENAME``
-   -Wno-EOFNEWLINE -Wno-IMPORTSTAR -Wno-INCABSPATH -Wno-PINCONNECTEMPTY
+   ``-Wno-DEFPARAM`` ``-Wno-EOFNEWLINE`` ``-Wno-GENUNNAMED``
-   -Wno-PINNOCONNECT -Wno-SYNCASYNCNET -Wno-UNDRIVEN
+   ``-Wno-IMPORTSTAR`` ``-Wno-INCABSPATH`` ``-Wno-PINCONNECTEMPTY``
-   -Wno-UNUSEDGENVAR -Wno-UNUSEDPARAM -Wno-UNUSEDSIGNAL
+   ``-Wno-PINNOCONNECT`` ``-Wno-SYNCASYNCNET`` ``-Wno-UNDRIVEN``
-   -Wno-VARHIDDEN``.
+   ``-Wno-UNUSEDGENVAR`` ``-Wno-UNUSEDPARAM`` ``-Wno-UNUSEDSIGNAL``
+   ``-Wno-VARHIDDEN``.
 
 .. option:: -Wpedantic
 
@@ -1550,19 +1718,25 @@ Summary:
 
 .. option:: -Wwarn-lint
 
-   Enable all lint-related warning messages (note that by default, they are already
+   Enable all lint-related warning messages (note that by default, they are
-   enabled), but do not affect style messages.  This is equivalent to
+   already enabled), but do not affect style messages.  This is equivalent
-   ``-Wwarn-ALWCOMBORDER -Wwarn-BSSPACE -Wwarn-CASEINCOMPLETE
+   to ``-Wwarn-ALWCOMBORDER`` ``-Wwarn-ASCRANGE`` ``-Wwarn-BSSPACE``
-   -Wwarn-CASEOVERLAP -Wwarn-CASEX -Wwarn-CASTCONST -Wwarn-CASEWITHX -Wwarn-CMPCONST
+   ``-Wwarn-CASEINCOMPLETE`` ``-Wwarn-CASEOVERLAP`` ``-Wwarn-CASEWITHX``
-   -Wwarn-COLONPLUS -Wwarn-IMPLICIT -Wwarn-ASCRANGE
+   ``-Wwarn-CASEX`` ``-Wwarn-CASTCONST`` ``-Wwarn-CMPCONST``
-   -Wwarn-PINMISSING -Wwarn-REALCVT -Wwarn-UNSIGNED -Wwarn-WIDTH``.
+   ``-Wwarn-COLONPLUS`` ``-Wwarn-IMPLICIT`` ``-Wwarn-IMPLICITSTATIC``
+   ``-Wwarn-LATCH`` ``-Wwarn-MISINDENT`` ``-Wwarn-NEWERSTD``
+   ``-Wwarn-PINMISSING`` ``-Wwarn-REALCVT`` ``-Wwarn-STATICVAR``
+   ``-Wwarn-UNSIGNED`` ``-Wwarn-WIDTHTRUNC`` ``-Wwarn-WIDTHEXPAND``
+   ``-Wwarn-WIDTHXZEXPAND``.
 
 .. option:: -Wwarn-style
 
    Enable all code style-related warning messages.  This is equivalent to
-   ``-Wwarn ASSIGNDLY -Wwarn-DECLFILENAME -Wwarn-DEFPARAM -Wwarn-EOFNEWLINE
+   ``-Wwarn-ASSIGNDLY`` ``-Wwarn-DECLFILENAME`` ``-Wwarn-DEFPARAM``
-   -Wwarn-INCABSPATH -Wwarn-PINNOCONNECT -Wwarn-SYNCASYNCNET -Wwarn-UNDRIVEN
+   ``-Wwarn-EOFNEWLINE`` ``-Wwarn-GENUNNAMED`` ``-Wwarn-INCABSPATH``
-   -Wwarn-UNUSEDGENVAR -Wwarn-UNUSEDPARAM -Wwarn-UNUSEDSIGNAL -Wwarn-VARHIDDEN``.
+   ``-Wwarn-PINNOCONNECT`` ``-Wwarn-SYNCASYNCNET`` ``-Wwarn-UNDRIVEN``
+   ``-Wwarn-UNUSEDGENVAR`` ``-Wwarn-UNUSEDPARAM`` ``-Wwarn-UNUSEDSIGNAL``
+   ``-Wwarn-VARHIDDEN``.
 
 .. option:: --x-assign 0
 
@@ -1594,9 +1768,9 @@ Summary:
 
    .. note::
 
-      This option applies only to values explicitly written as X
+      This option applies only to values explicitly written as X in modules
-      in modules (not classes) in the Verilog source code. Initial values
+      (not classes, nor parameters) in the Verilog source code. Initial
-      of clocks are set to 0 unless `--x-initial-edge` is
+      values of clocks are set to 0 unless `--x-initial-edge` is
       specified. Initial values of all other state holding variables are
       controlled with `--x-initial`.
 
@@ -1661,19 +1835,58 @@ Summary:
       iterations. This may be another indication of problems with the
       modeled design that should be addressed.
 
+.. option:: --json-only
+
+   Create JSON output only, do not create any other output.
+
+   The JSON format is intended to be used to leverage Verilator's parser and
+   elaboration to feed to other downstream tools. For details on the format, see
+   the Verilator Internals manual. Be aware that the JSON
+   format is still evolving; there will be some changes in future versions.
+
+   This option disables some more aggressive transformations and dumps only
+   the final state of the AST. For more granular and unaltered dumps, meant
+   mainly for debugging see :vlopt:`--dump-tree-json`.
+
+.. option:: --json-only-meta-output <filename>
+
+   Specifies the filename for the metadata output file (`.tree.meta.json`) of --json-only.
+   Using this option automatically sets :vlopt:`--json-only`.
+
+.. option:: --json-only-output <filename>
+
+   Specifies the filename for the main output file (`.tree.json`) of --json-only.
+   Using this option automatically sets :vlopt:`--json-only`.
+
+.. option:: --no-json-edit-nums
+
+   Don't dump edit number in .tree.json files.  This may make the file more
+   run-to-run stable for easier comparison.
+
+.. option:: --no-json-ids
+
+   Don't use short identifiers instead of addresses/paths in .tree.json.
+
 .. option:: --xml-only
 
    Create XML output only, do not create any other output.
 
    The XML format is intended to be used to leverage Verilator's parser and
-   elaboration to feed to other downstream tools. Be aware that the XML
+   elaboration to feed to other downstream tools.
-   format is still evolving; there will be some changes in future versions.
+
+   .. note::
+
+      This feature is deprecated in favor of :vlopt:`--json-only`.
 
 .. option:: --xml-output <filename>
 
    Specifies the filename for the XML output file. Using this option
    automatically sets :vlopt:`--xml-only`.
 
+   .. note::
+
+      This feature is deprecated in favor of :vlopt:`--json-only`.
+
 .. option:: -y <dir>
 
    Add the directory to the list of directories that should be searched to find
@@ -1790,6 +2003,13 @@ The grammar of configuration commands is as follows:
    that the setting is ignored unless the :vlopt:`--hierarchical` option is
    specified.  See :ref:`Hierarchical Verilation`.
 
+.. option:: hier_params -module "<modulename>"
+
+   Specifies that the module contains parameters a :vlopt:`--hierarchical` block. This option
+   is used internally to specify parameters for deparametrized hier block instances.
+   This option should not be used directly.
+   See :ref:`Hierarchical Verilation`.
+
 .. option:: inline -module "<modulename>"
 
    Specifies the module may be inlined into any modules that use this

docs/guide/exe_verilator_coverage.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 verilator_coverage
@@ -37,9 +37,9 @@ verilator_coverage Example Usage
 
     verilator_coverage --annotate <obj>
 
-    verilator_coverage  -write merged.dat -read <datafiles>...
+    verilator_coverage  -write merged.dat <datafiles>...
 
-    verilator_coverage  -write-info merged.info -read <datafiles>...
+    verilator_coverage  -write-info merged.info <datafiles>...
 
 
 verilator_coverage Arguments
@@ -64,30 +64,59 @@ if there are multiple coverage points on a single line they will merge.
 The minimum coverage across all merged points will be used to report
 coverage of the line.
 
-The first character of the line shows a summary of the coverage; this
+Coverage data is annotated at the beginning of the line and is formatted
-allows use of grep to filter the report.  `%` indicates at least one point
+as a special character followed by the number of coverage hits. The special
-on the line was below the coverage limit.  `+` indicates an
+characters " ,%,+,-" indicate summary of the coverage, and allow use of grep
-:option:`--annotate-points` point was at or above the limit, and `-` that
+to filter the report.
-the point was below the limit.
+
+* " " (whitespace) indicates that all points on the line are above the coverage limit.
+* "%" indicates at least one point on the line was below the coverage limit.
+* "+" coverage point was at or above the limit. Only used with :option:`--annotate-points`.
+* "-" coverage point was below the limit.  Only used with :option:`--annotate-points`.
+
+.. code-block::
+
+   100000  input logic a;   // Begins with whitespace, because
+                            // number of hits (100000) is above the limit.
+  +100000  point: comment=a // Begins with +, because
+                            // number of hits (100000) is above the limit.
+  %000000  input logic b;   // Begins with %, because
+                            // number of hits (0) is below the limit.
+  -000000  point: comment=b // Begins with -, because
+                            // number of hits (0) is below the limit.
 
 .. option:: --annotate-all
 
 Specifies all files should be shown.  By default, only those source files
 with low coverage are written to the output directory.
 
+This option should be used together with :option:`--annotate`.
+
 .. option:: --annotate-min <count>
 
-Specifies if the coverage point does not include the count number of
+Specifies the threshold (<count>) below which coverage point is considered
-coverage hits, then the coverage point will be considered above the
+sufficient. If the threshold is not exceeded, then the annotation will begin
-threshold, and the coverage report will put a "%" to indicate the coverage
+with a "%" symbol to indicate the coverage is insufficient.
-is insufficient.  Defaults to 10.
+
+The <count> threshold defaults to 10.
+
+This option should be used together with :option:`--annotate`.
+
 
 .. option:: --annotate-points
 
 Specifies all coverage points should be shown after each line of text.  By
 default, only source lines are shown.
 
-with low coverage are written to the output directory.
+.. code-block::
+
+  100000  input logic a, b, c;
+ +100000 point: comment=a // These lines are only shown
+ +200000 point: comment=b // with option --annotate-points
+ +300000 point: comment=c // enabled.
+
+
+This option should be used together with :option:`--annotate`.
 
 .. option:: --help
 

docs/guide/exe_verilator_gantt.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 verilator_gantt
@@ -30,15 +30,13 @@ Gantt Chart VCD Signals
 In waveforms, there are the following signals. In GTKWave, use "decimal"
 data format to remove the leading zeros and make the traces easier to read.
 
-evals
+trace/section
-  Increments each time when eval_step was measured to be active.  This
+  Shows the name of the current top of the execution section stack.
-  allow visualization of how much time eval_step was active.
+  Set GTKWave data format to "ASCII".
 
-eval_loop
+trace/depth
-  Increments each time when the evaluation loop within eval_step was
+  Shows the depth of the execution section stack.
-  measured to be active.  For best performance, there is only a single
+  Set GTKWave data format to "Analog".
-  evaluation loop within each eval_step call; that is, the eval_loop
-  waveform looks identical to the evals waveform.
 
 measured_parallelism
   The number of mtasks active at this time, for best performance, this will

docs/guide/exe_verilator_profcfunc.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 verilator_profcfunc

docs/guide/executables.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *********************************

docs/guide/extensions.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *******************
@@ -17,19 +17,26 @@ or "`ifdef`"'s may break other tools.
 
 .. option:: `__LINE__
 
-   The :option:`\`__LINE__` define expands to the current filename as a
+   The :option:`\`__LINE__` define expands to the current line number like
-   string, like C++'s __LINE__.  This Verilator feature added in 2006 was
+   C++'s __LINE__.  This Verilator feature added in 2006 was incorporated
-   incorporated into IEEE 1800-2009.
+   into IEEE 1800-2009.
 
 .. option:: `error [string]
 
-   This will report an error when encountered, like C++'s #error.
+   This will report an error when the preprocessor emits it, similar to
+   C++'s #error.
+
+.. option:: `line
+
+   As a special case `\`line \`__LINE__ "filename"` allows setting the
+   filename, without changing the line number. This is used for some
+   internal tests, so that debugging can leave the line numbers correctly
+   referring to the test file's line numbers.
 
 .. option:: """ [string] """
 
    A triple-quoted block specifies a string that may include newlines and
-   single quotes.  This extension is experimental and may be removed
+   single quotes.  This extension was standardized in IEEE 1800-2023.
-   without deprecation.
 
 .. option:: $c([string], ...);
 
@@ -569,6 +576,10 @@ or "`ifdef`"'s may break other tools.
 
 .. option:: /*verilator&32;trace_init_task*/
 
+   Removed.
+
+   In versions before 5.024:
+
    Attached to a DPI import to indicate that function should be called when
    initializing tracing. This attribute is indented only to be used
    internally in code that Verilator generates when :vlopt:`--lib-create`
@@ -586,6 +597,23 @@ or "`ifdef`"'s may break other tools.
    Re-enable waveform tracing for all future signals or instances that are
    declared.
 
+.. option:: /*verilator&32;unroll_disable*/
+
+   Used in a statement position to indicate the immediately following loop
+   at the same statement level should not be unrolled by Verilator,
+   ignoring :vlopt:`--unroll-count`.  This is similar to clang's ``#pragma
+   clang loop unroll(disable)``.
+
+   This option does not currently disable the C++ compiler's unrolling (or
+   not) of any loops that make it through to the Verilated C++ code.
+
+.. option:: /*verilator&32;unroll_full*/
+
+   Rarely needed. Used in a statement position to indicate the immediately
+   following loop at the same statement level should always be fully
+   unrolled by Verilator, ignoring :vlopt:`--unroll-count`.  This is
+   similar to clang's ``#pragma clang loop unroll(full)``.
+
 .. option:: $stacktrace
 
    Called as a task, print a stack trace.  Called as a function, return a
@@ -594,4 +622,4 @@ or "`ifdef`"'s may break other tools.
    symbols.  Also, the data represents the C++ stack; the SystemVerilog
    functions/tasks involved may be renamed and/or inlined before becoming
    the C++ functions that may be visible in the stack trace.  This
-   extension is experimental and may be removed without deprecation.
+   extension was standardized in IEEE 1800-2023.

docs/guide/faq.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ******************************
@@ -128,10 +128,13 @@ How do I generate waveforms (traces) in C++?
 
 See also the next question for tracing in SystemC mode.
 
-A. Pass the :vlopt:`--trace` option to Verilator, and in your top-level C
+A. Pass the :vlopt:`--trace` option to Verilator.  Then you may use ``$dumpfile`` and
-   code, call ``Verilated::traceEverOn(true)``.  Then you may use
+   ``$dumpvars`` to enable traces, the same as with any Verilog simulator,
-   ``$dumpfile`` and ``$dumpvars`` to enable traces, the same as with any
+   although Verilator ignores the arguments to ``$dumpvars``. See
-   Verilog simulator. See ``examples/make_tracing_c`` in the distribution.
+   ``examples/make_tracing_c`` in the distribution.
+
+   If writing the top-level C code, call ``Verilated::traceEverOn(true)``;
+   this is done for you if using :vlopt:`--binary`.
 
 B. Or, for finer-grained control, or C++ files with multiple Verilated
    modules, you may also create the trace purely from C++.  Create a
@@ -220,24 +223,20 @@ This is done for you if you are using the Verilator :vlopt:`--binary` or
 You can call :code:`->trace()` on multiple Verilated objects with the same
 trace file if you want all data to land in the same output file.
 
-When using SystemC 2.3, the SystemC library must have been built with the
-experimental simulation phase callback-based tracing disabled. This is
-disabled by default when building SystemC with its configure based build
-system, but when building SystemC with CMake, you must pass
-``-DENABLE_PHASE_CALLBACKS_TRACING=OFF`` to disable this feature.
-
 
 How do I generate FST waveforms (traces) in C++ or SystemC?
 """""""""""""""""""""""""""""""""""""""""""""""""""""""""""
 
 FST is a trace file format developed by GTKWave.  Verilator provides basic
 FST support.  To dump traces in FST format, add the :vlopt:`--trace-fst`
-option to Verilator and either A. use :code:`$dumpfile & $dumpvars` in
+option to Verilator and either:
-Verilog as described in the VCD example above,
+
+Use :code:`$dumpfile & $dumpvars` in Verilog as described in the VCD
+example above,
 
 Or, in C++ change the include described in the VCD example above:
 
-.. code-block:: C++
+  .. code-block:: C++
 
       #include "verilated_fst_c.h"
       VerilatedFstC* tfp = new VerilatedFstC;
@@ -245,14 +244,14 @@ Or, in C++ change the include described in the VCD example above:
 
 Or, in SystemC, change the include described in the VCD example above:
 
-.. code-block:: C++
+  .. code-block:: C++
 
       #include "verilated_fst_sc.h"
       VerilatedFstC* tfp = new VerilatedFstSc;
 
 
-Currently, supporting FST and VCD in a single simulation is impossible, but
+Currently, supporting FST and VCD in a single simulation is not supported,
-such requirement should be rare.  You can however ifdef around the trace
+but such usage should be unlikely.  You can however ifdef around the trace
 format in your C++ main loop, and select VCD or FST at compile time.
 
 
@@ -260,9 +259,11 @@ How do I view waveforms (aka dumps or traces)?
 """"""""""""""""""""""""""""""""""""""""""""""
 
 Verilator creates standard VCD (Value Change Dump) and FST files.  VCD
-files are viewable with the open-source GTKWave (recommended), or Dinotrace
+files are viewable with the open-source
-(legacy) programs, or any of the many closed-source offerings; FST is
+`GTKWave <http://gtkwave.sourceforge.net/>`_,
-supported only by GTKWave.
+`Surfer <https://surfer-project.org/>`_, Dinotrace (legacy), or any of the
+many closed-source viewer offerings; FST is supported only by GTKWave and
+Surfer.
 
 
 How do I speed up writing large waveform (trace) files?
@@ -356,8 +357,8 @@ Why do I get "undefined reference to \`VL_RAND_RESET_I' or \`Verilated::...'"?
 You need to link your compiled Verilated code against the
 :code:`verilated.cpp` file found in the include directory of the Verilator
 kit.  This is one target in the ``$(VK_GLOBAL_OBJS)`` make variable, which
-should be part of your Makefile's link rule.  If you use :vlopt:`--exe`,
+should be part of your Makefile's link rule.  If you use :vlopt:`--exe` or
-this is done for you.
+:vlopt:`--binary`, this is done for you.
 
 
 Is the PLI supported?
@@ -401,7 +402,7 @@ How do I get faster build times?
 * Use a recent compiler.  Newer compilers tend to be faster.
 
 * Compile in parallel on many machines and use caching; see the web for the
-  ccache, distcc, and icecream packages. ccache will skip GCC runs between
+  ccache, sccache, distcc, or icecream packages. ccache will skip GCC runs between
   identical source builds, even across different users.  If ccache was
   installed when Verilator was built, it is used, or see OBJCACHE
   environment variable to override this. Also see the
@@ -486,7 +487,7 @@ From the sc_main.cpp file, you'd then:
 
       #include "Vour.h"
       #include "Vour_our.h"
-      cout << "clock is " << top->our->clk << endl;
+      std::cout << "clock is " << top->our->clk << std::endl;
 
 
 In this example, clk is a bool you can read or set as any other variable.

docs/guide/files.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *****
@@ -48,12 +48,6 @@ For --cc/--sc, it creates:
      - Make include file for compiling (from --make gmake)
    * - *{prefix}*\ _classes.mk
      - Make include file with class names (from --make gmake)
-   * - *{prefix}*\ _hier.mk
-     - Make file for hierarchy blocks (from --make gmake)
-   * - *{prefix}*\ _hierMkArgs.f
-     - Arguments for hierarchical Verilation (from --make gmake)
-   * - *{prefix}*\ _hierCMakeArgs.f
-     - Arguments for hierarchical Verilation (from --make cmake)
    * - *{prefix}*\ .h
      - Model header
    * - *{prefix}*\ .cpp
@@ -95,16 +89,24 @@ For --cc/--sc, it creates:
    * - *{prefix}{each_verilog_module}{__DepSet_hash__n}*\ .cpp
      - Additional lower C++ files (hashed to reduce build times)
 
-For --hierarchy mode, it creates:
+For --hierarchical mode, it creates:
 
 .. list-table::
 
    * - V\ *{hier_block}*\ /
-     - Directory to Verilate each hierarchy block (from --hierarchy)
+     - Directory to Verilate each hierarchical block (from --hierarchical)
    * - *{prefix}*\ __hierVer.d
-     - Make dependencies of the top module (from --hierarchy)
+     - Make dependencies of the top module (from --hierarchical)
+   * - *{prefix}*\ _hier.mk
+     - Make file for hierarchical blocks (from --make gmake)
+   * - *{prefix}*\ __hierCMakeArgs.f
+     - Arguments for hierarchical Verilation (from --make cmake)
+   * - *{prefix}*\ __hierMkArgs.f
+     - Arguments for hierarchical Verilation (from --make gmake)
+   * - *{prefix}*\ __hierParameters.v
+     - Module parameters for hierarchical blocks
    * - *{prefix}*\ __hier.dir
-     - Directory to store .dot, .vpp, .tree of top module (from --hierarchy)
+     - Directory to store .dot, .vpp, .tree of top module (from --hierarchical)
 
 In specific debug and other modes, it also creates:
 
@@ -112,6 +114,10 @@ In specific debug and other modes, it also creates:
 
    * - *{prefix}*\ .xml
      - XML tree information (from --xml)
+   * - *{prefix}*\ .tree.json
+     - JSON tree information (from --json-only)
+   * - *{prefix}*\ .tree.meta.json
+     - JSON tree metadata (from --json-only)
    * - *{prefix}*\ __cdc.txt
      - Clock Domain Crossing checks (from --cdc)
    * - *{prefix}*\ __stats.txt
@@ -126,8 +132,10 @@ In specific debug and other modes, it also creates:
      - Debugging graph files (from --debug)
    * - *{prefix}{misc}*\ .tree
      - Debugging files (from --debug)
-   * - {mod_prefix}_{each_verilog_base_filename}*\ .vpp
+   * - *{prefix}*\ __inputs\ .vpp
-     - Pre-processed verilog (from --debug)
+     - Pre-processed verilog for all files (from --debug)
+   * - *{prefix}*\ _ *{each_verilog_base_filename}*\ .vpp
+     - Pre-processed verilog for each file (from --debug)
 
 After running Make, the C++ compiler may produce the following:
 
@@ -143,6 +151,10 @@ After running Make, the C++ compiler may produce the following:
      - Intermediate objects
    * - *{prefix}*\
      - Final executable (from --exe)
+   * - lib\ *{prefix}*\ .a
+     - Final archive (default lib mode)
+   * - libverilated.a
+     - Runtime for verilated model (default lib mode)
    * - *{prefix}*\ __ALL.a
      - Library of all Verilated objects
    * - *{prefix}*\ __ALL.cpp

docs/guide/index.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ######################

docs/guide/install-cmake.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _CMakeInstallation:

docs/guide/install.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Installation:
@@ -39,7 +39,7 @@ In brief, to install from git:
 ::
 
    # Prerequisites:
-   #sudo apt-get install git perl python3 make autoconf g++ flex bison ccache
+   #sudo apt-get install git help2man perl python3 make autoconf g++ flex bison ccache
    #sudo apt-get install libgoogle-perftools-dev numactl perl-doc
    #sudo apt-get install libfl2  # Ubuntu only (ignore if gives error)
    #sudo apt-get install libfl-dev  # Ubuntu only (ignore if gives error)
@@ -104,6 +104,7 @@ for good performance:
 ::
 
    sudo apt-get install ccache  # If present at build, needed for run
+   sudo apt-get install mold  # If present at build, needed for run
    sudo apt-get install libgoogle-perftools-dev numactl
 
 The following is optional but is recommended for nicely rendered command line
@@ -124,9 +125,10 @@ Those developing Verilator itself may also want these (see internals.rst):
 
 ::
 
-   sudo apt-get install gdb graphviz cmake clang clang-format-14 gprof lcov
+   sudo apt-get install clang clang-format-14 cmake gdb gprof graphviz lcov
-   sudo apt-get install libclang-dev yapf3
+   sudo apt-get install python3-clang yapf3 bear jq
-   sudo pip3 install clang sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe
+   sudo pip3 install sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff
+   sudo pip3 install git+https://github.com/antmicro/astsee.git
    cpan install Pod::Perldoc
    cpan install Parallel::Forker
 
@@ -150,6 +152,17 @@ To make use of Verilator FST tracing you will want `GTKwave
 required at Verilator build time.
 
 
+Install Z3
+^^^^^^^^^^
+
+In order to use constrained randomization the `Z3 Theorem Prover
+<https://github.com/z3prover/z3#readme>`__ must be installed, however this is
+not required at Verilator build time. There are other compatible SMT solvers,
+like CVC5/CVC4, but they are not guaranteed to work. Since different solvers are
+faster for different scenarios, the solver to use at run-time can be specified
+by the environment variable :option:`VERILATOR_SOLVER`.
+
+
 .. _Obtain Sources:
 
 Obtain Sources
@@ -191,8 +204,9 @@ Eventual Installation Options
 Before configuring the build, you must decide how you're going to
 eventually install Verilator onto your system. Verilator will be compiling
 the current value of the environment variables :option:`VERILATOR_ROOT`,
-:option:`SYSTEMC_INCLUDE`, and :option:`SYSTEMC_LIBDIR` as defaults into
+:option:`VERILATOR_SOLVER`, :option:`SYSTEMC_INCLUDE`, and
-the executable, so they must be correct before configuring.
+:option:`SYSTEMC_LIBDIR` as defaults into the executable, so they must be
+correct before configuring.
 
 These are the installation options:
 
@@ -201,8 +215,9 @@ These are the installation options:
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 Our personal favorite is to always run Verilator in-place from its Git
-directory. This allows the easiest experimentation and upgrading, and
+directory (don't run ``make install``). This allows the easiest
-allows many versions of Verilator to co-exist on a system.
+experimentation and upgrading, and allows many versions of Verilator to
+co-exist on a system.
 
 ::
 
@@ -211,17 +226,18 @@ allows many versions of Verilator to co-exist on a system.
    ./configure
    # Running will use files from $VERILATOR_ROOT, so no install needed
 
-Note after installing (below steps), a calling program or shell must set
+Note after installing (see `Installation`_), a calling program or shell
-the environment variable :option:`VERILATOR_ROOT` to point to this Git
+must set the environment variable :option:`VERILATOR_ROOT` to point to this
-directory, then execute ``$VERILATOR_ROOT/bin/verilator``, which will find
+Git directory, then execute ``$VERILATOR_ROOT/bin/verilator``, which will
-the path to all needed files.
+find the path to all needed files.
 
 
-2. Install into a specific location
+2. Install into a Specific Prefix
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-You may eventually be installing onto a project/company-wide "CAD" tools
+You may be an OS package maintainer building a Verilator package, or you
-disk that may support multiple versions of every tool. Tell configure the
+may eventually be installing onto a project/company-wide "CAD" tools disk
+that may support multiple versions of every tool. Tell configure the
 eventual destination directory name.  We recommend that the destination
 location include the Verilator version name:
 
@@ -232,7 +248,8 @@ location include the Verilator version name:
    # For the tarball, use the version number instead of git describe
    ./configure --prefix /CAD_DISK/verilator/`git describe | sed "s/verilator_//"`
 
-Note after installing (below steps), if you use `modulecmd
+Note after installing (see `Installation`_), you need to add the path to
+the ``bin`` directory to your ``PATH``. Or, if you use `modulecmd
 <http://modules.sourceforge.net/>`__, you'll want a module file like the
 following:
 
@@ -245,23 +262,7 @@ following:
    prepend-path PKG_CONFIG_PATH $install_root/share/pkgconfig
 
 
-3. Install into a Specific Path
+3. Install System Globally
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-You may eventually install Verilator into a specific installation prefix,
-as most GNU tools support:
-
-::
-
-   unset VERILATOR_ROOT      # if your shell is bash
-   unsetenv VERILATOR_ROOT   # if your shell is csh
-   ./configure --prefix /opt/verilator-VERSION
-
-Then after installing (below steps), you will need to add
-``/opt/verilator-VERSION/bin`` to your ``$PATH`` environment variable.
-
-
-4. Install System Globally
 ^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 The final option is to eventually install Verilator globally, using
@@ -273,8 +274,8 @@ configure's default system paths:
    unsetenv VERILATOR_ROOT   # if your shell is csh
    ./configure
 
-Then after installing (below), the binaries should be in a location
+Then after installing (see `Installation`_), the binaries should be in a
-already in your ``$PATH`` environment variable.
+location already in your ``$PATH`` environment variable.
 
 
 Configure

docs/guide/languages.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ***************
@@ -62,12 +62,23 @@ Verilator supports the 2017 "for" loop constructs and several cleanups IEEE
 made in 1800-2017.
 
 
+SystemVerilog 2023 (IEEE 1800-2023) Support
+-------------------------------------------
+
+Verilator supports some of the 2023 improvements, including triple-quoted
+string blocks that may include newlines and single quotes.
+
+Verilator implements a full IEEE 1800-2023 compliant preprocessor,
+including triple-quoted strings, and \`ifdef expressions.
+
+
 Verilog AMS Support
 -------------------
 
 Verilator implements a very small subset of Verilog AMS (Verilog Analog and
 Mixed-Signal Extensions) with the subset corresponding to those VMS
-keywords with near-equivalents in Verilog 2005 or SystemVerilog 2017.
+keywords with near-equivalents in Verilog IEEE 1364 or SystemVerilog
+IEEE 1800.
 
 AMS parsing is enabled with :vlopt:`--language VAMS <--language>` or
 :vlopt:`--language 1800+VAMS <--language>`.
@@ -237,11 +248,9 @@ optimizations will be disabled around the latch.
 Structures and Unions
 ---------------------
 
-Presently Verilator only supports packed structs and packed unions.  Rand
+All structures and unions are scheduled together, which means that
-and randc tags on members are ignored.  All structures and unions are
+generating one member of a structure from blocking, and another from
-represented as a single vector, which means that generating one member of a
+non-blocking assignments is unsupported.
-structure from blocking, and another from non-blocking assignments is
-unsupported.
 
 
 .. _Unknown States:
@@ -320,20 +329,6 @@ there will be considered a two-state variable that is read and written
 instead of a four-state variable.
 
 
-Functions & Tasks
------------------
-
-All functions and tasks will be inlined (will not become functions in C.)
-The only support provided is simple statements in tasks (which may
-affect global variables).
-
-Recursive functions and tasks are not supported.  All inputs and outputs
-are automatic as if they had the Verilog 2001 "automatic" keyword
-prepended.  (If you don't know what this means, Verilator will do what you
-probably expect, what C does. The default behavior of Verilog is
-different.)
-
-
 Gate Primitives
 ---------------
 
@@ -383,24 +378,6 @@ Verilator does not support SEREs yet.  All assertion and coverage
 statements must be simple expressions that complete in one cycle.
 
 
-Force statement
----------------
-
-Verilator supports the procedural `force` (and corresponding `release`)
-statement. However, the behavior of the `force` statement does not entirely
-comply with IEEE 1800. According to the standard,
-when a procedural statement of the form `force a = b;` is executed, the
-simulation should behave as if, from that point forwards, a continuous
-assignment `assign a = b;` has been added to override the drivers of `a`.
-More specifically: the value of `a` should be updated whenever the value of
-`b` changes, until a `release a;` statement is executed.
-Verilator instead evaluates the current value of `b` when the `force`
-statement is executed, and forces `a` to that value, without updating it
-until a new `force` or `release` statement is encountered that applies to
-`a`. This non-standard behavior is nevertheless consistent with some other
-simulators.
-
-
 Encrypted Verilog
 -----------------
 
@@ -471,6 +448,21 @@ disable
   provide loop break and continue functionality before SystemVerilog added
   the break and continue keywords.
 
+force, release
+  Verilator supports the procedural `force` (and corresponding `release`)
+  statement. However, the behavior of the `force` statement does not
+  entirely comply with IEEE 1800. According to the standard, when a
+  procedural statement of the form `force a = b;` is executed, the
+  simulation should behave as if, from that point forwards, a continuous
+  assignment `assign a = b;` has been added to override the drivers of `a`.
+  More specifically: the value of `a` should be updated whenever the value
+  of `b` changes, until a `release a;` statement is executed.  Verilator
+  instead evaluates the current value of `b` when the `force` statement is
+  executed, and forces `a` to that value, without updating it until a new
+  `force` or `release` statement is encountered that applies to `a`. This
+  non-standard behavior is nevertheless consistent with some other
+  simulators.
+
 inside
   Inside expressions may not include unpacked array traversal or $ as an
   upper bound.  Case inside and case matches are also unsupported.

docs/guide/overview.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ********
@@ -23,12 +23,12 @@ resulting model's C++ or SystemC code is output as .cpp and .h files. This
 is referred to as "Verilating", and the process is "to Verilate"; the
 output is a "Verilated" model.
 
-2. For simulation, a small-user written C++ wrapper file is required, the
+2. For simulation, a small user-written C++ wrapper file is required, the
 "wrapper".  This wrapper defines the C++ standard function "main()", which
 instantiates the Verilated model as a C++/SystemC object.
 
 3. The user C++ wrapper, the files created by Verilator, a "runtime
-library" provided by Verilator, and, if applicable SystemC libraries are
+library" provided by Verilator, and, if applicable, SystemC libraries are
 then compiled using a C++ compiler to create a simulation executable.
 
 4. The resulting executable will perform the actual simulation during
@@ -44,12 +44,12 @@ The best place to get started is to try the :ref:`Examples`.
 .. [#] Verilog is defined by the `Institute of Electrical and Electronics
        Engineers (IEEE) Standard for Verilog Hardware Description
        Language`, Std. 1364, released in 1995, 2001, and 2005.  The
-       Verilator documentation uses the shorthand, e.g., "IEEE 1394-2005",
+       Verilator documentation uses the shorthand, e.g., "IEEE 1364-2005",
        to refer to the, e.g., 2005 version of this standard.
 
 .. [#] SystemVerilog is defined by the `Institute of Electrical and
        Electronics Engineers (IEEE) Standard for SystemVerilog - Unified
        Hardware Design, Specification, and Verification Language`, Standard
-       1800, released in 2005, 2009, 2012, and 2017.  The Verilator
+       1800, released in 2005, 2009, 2012, 2017, and 2023.  The Verilator
-       documentation uses the shorthand e.g., "IEEE 1800-2017", to refer to
+       documentation uses the shorthand e.g., "IEEE 1800-2023", to refer to
-       the, e.g., 2017 version of this standard.
+       the, e.g., 2023 version of this standard.

docs/guide/simulating.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Simulating:
@@ -12,6 +12,60 @@ Verilated model's executable.  For the runtime arguments to a simulated
 model, see :ref:`Simulation Runtime Arguments`.
 
 
+.. _Simulation Summary Report:
+
+Simulation Summary Report
+=========================
+
+When simulation finishes, it will print a report to stdout summarizing the
+simulation. This requires the model being Verilated with :vlopt:`--main`.
+The report may be disabled with :vlopt:`+verilator+quiet`.
+
+For example:
+
+.. code-block::
+
+   - S i m u l a t i o n   R e p o r t: Verilator ...
+   - Verilator: End at simtime 123 ns; walltime 1234.001 s; speed 123 ns/s
+   - Verilator: cpu 22.001 s on 4 threads; alloced 123 MB
+
+The information in this report is:
+
+.. describe:: "Verilator ..."
+
+   Program version.
+
+.. describe:: "End at simtime 123 ns"
+
+   Verilog $time at which the model finished or stopped.
+
+.. describe:: "walltime 1234.001 s"
+
+   Real elapsed wall time in seconds.
+
+.. describe:: "speed 123.1 ns/s"
+
+   Simulated time (if non-zero) divided by wall time. e.g. `123 ns/s` means
+   123 simulated nanoseconds took 1 second of wall time; for a model with
+   only a 1 GHz clock that would be equivalent to 123.1 cycles per
+   second. The units are automatically selected to give a number between 1
+   and 1000.  The wall time includes initialization, initial and final
+   process blocks, so indicates a slower speed than if the model had a
+   longer runtime.
+
+.. describe:: "cpu 22 s"
+
+   CPU time used total across all CPU threads in seconds.
+
+.. describe:: "4 threads"
+
+   Number of simultaneous threads used.
+
+.. describe:: "alloced 123 MB"
+
+   Total memory used during simulation in megabytes.
+
+
 .. _Benchmarking & Optimization:
 
 Benchmarking & Optimization
@@ -143,7 +197,7 @@ Functional Coverage
 -------------------
 
 With :vlopt:`--coverage` or :vlopt:`--coverage-user`, Verilator will
-translate functional coverage points the user has inserted manually win
+translate functional coverage points the user has inserted manually in
 SystemVerilog code through into the Verilated model.
 
 Currently, all functional coverage points are specified using SystemVerilog
@@ -230,14 +284,20 @@ Coverage Collection
 When any coverage flag is used to Verilate, Verilator will add appropriate
 coverage point insertions into the model and collect the coverage data.
 
-To get the coverage data from the model, in the user wrapper code,
+To get the coverage data from the model, write the coverage with either:
-typically at the end once a test passes, call
+
-:code:`Verilated::threadContextp()->coveragep()->write` with an argument of the filename for
+1. Using :vlopt:`--binary` or :vlopt:`--main`, and Verilator will dump
-the coverage data file to write coverage data to (typically
+   coverage when the test completes to the filename specified with
-"logs/coverage.dat").
+   :vlopt:`+verilator+coverage+file+\<filename\>`.
+
+2. In the user wrapper code, typically at the end once a test passes, call
+   :code:`Verilated::threadContextp()->coveragep()->write` with an argument
+   of the filename for the coverage data file to write coverage data to
+   (typically "logs/coverage.dat").
 
 Run each of your tests in different directories, potentially in parallel.
-Each test will create a :file:`logs/coverage.dat` file.
+Each test will create the file specified above,
+e.g. :file:`logs/coverage.dat`.
 
 After running all of the tests, execute the :command:`verilator_coverage`
 command, passing arguments pointing to the filenames of all the
@@ -273,13 +333,17 @@ profiled C++ code functions.
 
 To use profiling:
 
-#. Use Verilator's :vlopt:`--prof-cfuncs`.
+#. Make sure the Verilog code will call `$finish` at the end of simulation
+   (otherwise the C library may not correctly create the `gmon.out` file in
+   the later steps below).
+#. Run Verilator, adding the :vlopt:`--prof-cfuncs` option.
 #. Build and run the simulation model.
-#. The model will create gmon.out.
+#. The model will create `gmon.out`.
-#. Run :command:`gprof` to see where in the C++ code the time is spent.
+#. Run :command:`gprof gmon.out > gprof.log` to see where in the C++ code
-#. Run the gprof output through the :command:`verilator_profcfunc` program,
+   the time is spent.
-   and it will tell you what Verilog line numbers on which most of the time
+#. Run :command:`verilator_profcfunc gprof.log > profcfunc.log` to take the
-   is being spent.
+   gprof output and translate into output showing the Verilog line numbers
+   on which most of the time is being spent.
 
 
 .. _Execution Profiling:
@@ -500,18 +564,35 @@ feedback-directed optimization.  See the appropriate compiler
 documentation.
 
 
-.. _Runtime Debugging
+.. _Runtime Debugging:
 
 Runtime Debugging
 =================
 
-To debug a Verilated executable, use the standard GNU debugger ``gdb`` or a
+To debug a Verilated executable, Verilate with :vlopt:`--runtime-debug`.
-similar tool. Typically you will want to have debugger symbols inserted by
+This will instruct the compiler to insert debugger, and enable various
-the compiler, assertions enabled in the C library, and assertions enabled
+library assertions. These options slow down the executable, so do this
-in the Verilated library. (These options slow down the executable, so do
+only when debugging.
-this only when debugging.) To enable this, Verilate with:
 
-    -CFLAGS -ggdb  -LDFLAGS -ggdb  -CFLAGS -DVL_DEBUG=1  -CFLAGS -D_GLIBCXX_DEBUG
+If you are using your own Makefiles, adapt appropriately to pass the
+options documented under :vlopt:`--runtime-debug` to the compiler and
+linker.
 
-The :vlopt:`-CFLAGS` and/or :vlopt:`-LDFLAGS` options pass arguments
+Once you have a debugging-enabled executable, run it using the the standard
-directly to the compiler or linker.
+GNU debugger ``gdb`` or a similar tool, and create a backtrace; e.g.:
+
+   .. code-block:: bash
+
+      gdb obj_dir/Vtop
+        run {Vtop_command_arguments}
+        {Vtop prints output, perhaps a segmentation faults}
+        bt
+
+Rarely the bug may disappear with :vlopt:`--runtime-debug`; if so, try
+instead using the sub-options that :vlopt:`--runtime-debug` documents, to
+find the maximum subset that still shows the issue.  E.g. it is likely that
+using `-CFLAGS -D_GLIBCXX_DEBUG` will not hide any bug, so may be used.
+
+Using :vlopt:`--runtime-debug` or `-CFLAGS -DVL_DEBUG=1` will only print a
+message if something goes wrong.  To enable debug print messages at
+runtime, additionally use the :vlopt:`+verilator+debug` runtime option.

docs/guide/verilating.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 **********
@@ -7,9 +7,13 @@ Verilating
 
 Verilator may be used in five major ways:
 
+* With the :vlopt:`--binary` option, Verilator will translate the design
+  into an executable, via generating C++ and compiling it.  See
+  :ref:`Binary, C++ and SystemC Generation`.
+
 * With the :vlopt:`--cc` or :vlopt:`--sc` options, Verilator will translate
-  the design into C++ or SystemC code, respectively.  See :ref:`C++ and
+  the design into C++ or SystemC code, respectively.  See :ref:`Binary, C++
-  SystemC Generation`.
+  and SystemC Generation`.
 
 * With the :vlopt:`--lint-only` option, Verilator will lint the design to
   check for warnings but will not typically create any output files.
@@ -24,13 +28,15 @@ Verilator may be used in five major ways:
   expanded.
 
 
-.. _C++ and SystemC Generation:
+.. _Binary, C++ and SystemC Generation:
 
-C++ and SystemC Generation
+Binary, C++ and SystemC Generation
-==========================
+==================================
 
 Verilator will translate a SystemVerilog design into C++ with the
-:vlopt:`--cc` option, or into SystemC with the :vlopt:`--sc` option.
+:vlopt:`--cc` option, or into SystemC with the :vlopt:`--sc` option.  It
+will translate into C++ and compile it into an executable binary with the
+:vlopt:`--binary` option.
 
 When using these options:
 
@@ -45,14 +51,19 @@ When using these options:
    The prefix is set with :vlopt:`--prefix`, or defaults to the name of the
    top module.
 
-#. If :vlopt:`--exe` is used, Verilator creates makefiles to generate a
+#. If :vlopt:`--binary` or :vlopt:`--main` is used, Verilator creates a C++
-   simulation executable, otherwise, it creates makefiles to generate an
+   top wrapper to read command line arguments, create the model, and
-   archive (.a) containing the objects.
+   execute the model.
 
-#. If :vlopt:`--build` option was used, it calls :ref:`GNU Make` or
+#. If :vlopt:`--binary` or :vlopt:`--exe` is used, Verilator creates
-   :ref:`CMake` to build the model.
+   makefiles to generate a simulation executable, otherwise, it creates
+   makefiles to generate an archive (.a) containing the objects.
 
-Once a model is built, it is then typically run, see :ref:`Simulating`.
+#. If :vlopt:`--binary` or :vlopt:`--build` is used, it calls :ref:`GNU
+   Make` or :ref:`CMake` to build the model.
+
+Once a model is built, the next step is typically for the user to run it,
+see :ref:`Simulating`.
 
 
 .. _Hierarchical Verilation:
@@ -165,7 +176,7 @@ compiled on the different target system.
 
 To support this, none of the files that Verilator produces will reference
 any configure-generated build-system-specific files, such as
-:file:`config.h` (which is renamed in Verilator to :file:`config_build.h`
+:file:`config.h` (which is renamed in Verilator to :file:`config_package.h`
 to reduce confusion.)  The disadvantage of this approach is that
 :file:`include/verilatedos.h` must self-detect the requirements of the
 target system, rather than using configure.
@@ -293,9 +304,9 @@ GNU Make
 ========
 
 Verilator defaults to creating GNU Make makefiles for the model.  Verilator
-will call make automatically when the :vlopt:'--build' option is used.
+will call make automatically when the :vlopt:`--build` option is used.
 
-If calling Verilator from a makefile, the :vlopt:'-MMD' option will create
+If calling Verilator from a makefile, the :vlopt:`--MMD` option will create
 a dependency file, allowing Make to only run Verilator if input Verilog
 files change.
 
@@ -487,3 +498,78 @@ The search paths can be configured by setting some variables:
 
    Sets the installation prefix of an installed SystemC library. (Same as
    SYSTEMC_ROOT).
+
+
+.. _Verilation Summary Report:
+
+Verilation Summary Report
+=========================
+
+When Verilator generates code, unless :vlopt:`--quiet-stats` is used, it
+will print a report to stdout summarizing the build. For example:
+
+.. code-block::
+
+    - V e r i l a t i o n   R e p o r t: Verilator ....
+    - Verilator: Built from 354 MB sources in 247 modules,
+        into 74 MB in 89 C++ files needing 0.192 MB
+    - Verilator: Walltime 26.580 s (elab=2.096, cvt=18.268,
+        bld=2.100); cpu 26.548 s on 1 threads; alloced 2894.672 MB
+
+The information in this report is:
+
+.. describe:: "Verilator ..."
+
+   Program version.
+
+.. describe:: "234 MB sources"
+
+   Characters of post-preprocessed text in all input
+   Verilog and Verilator Control files in megabytes.
+
+.. describe:: "247 modules"
+
+   Number of interfaces/modules/classes/packages in design before
+   elaboration.
+
+.. describe:: "into 74 MB"
+
+   Characters of output C++ code, including comments in megabytes.
+
+.. describe:: "89 C++ files"
+
+   Number of .cpp files created.
+
+.. describe:: "needing 192MB"
+
+   Verilation-time minimum-bound estimate of memory needed to run model in
+   megabytes. (Expect to need significantly more.)
+
+.. describe:: "Walltime 26.580 s"
+
+   Real elapsed wall time for Verilation and build.
+
+.. describe:: "elab=2.096"
+
+   Wall time to read in files and complete elaboration.
+
+.. describe:: "cvt=18.268"
+
+   Wall time for Verilator to process and write output.
+
+.. describe:: "bld=2.1"
+
+   Wall time to compile gcc/clang (if using :vlopt:`--build`).
+
+.. describe:: "cpu 22.548 s"
+
+   CPU time used, total across all CPU threads.
+
+.. describe:: "4 threads"
+
+   Number of simultaneous threads used.
+
+.. describe:: "alloced 123 MB"
+
+   Total memory used during build by Verilator executable (excludes
+   :vlopt:`--build` compiler's usage) in megabytes.

docs/guide/warnings.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2023 by Wilson Snyder.
+.. Copyright 2003-2024 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *******************
@@ -12,10 +12,18 @@ Disabling Warnings
 
 Warnings may be disabled in multiple ways:
 
-#. Disable the warning in the source code.  When the warning is printed, it
+#. Disable the warning globally by invoking Verilator with the
-   will include a warning code.  Surround the offending line with a
+   :code:`-Wno-{warning-code}` option.
-   :code:`/*verilator&32;lint_off*/` and :code:`/*verilator&32;lint_on*/`
+
-   metacomment pair:
+   Global disables should be avoided, as they removes all checking across
+   the source files, and prevents other users from compiling the sources
+   without knowing the magic set of disables needed to compile those
+   sources successfully.
+
+#. Disable the warning in the design source code.  When the warning is
+   printed, it will include a warning code.  Surround the offending line
+   with a :code:`/*verilator&32;lint_off*/` and
+   :code:`/*verilator&32;lint_on*/` metacomment pair:
 
    .. code-block:: sv
 
@@ -23,6 +31,12 @@ Warnings may be disabled in multiple ways:
          if (`DEF_THAT_IS_EQ_ZERO <= 3) $stop;
          // verilator lint_on UNSIGNED
 
+
+   A lint_off in the design source code will propagate down to any child
+   files (files later included by the file with the lint_off), but will not
+   propagate upwards to any parent file (file that included the file with
+   the lint_off).
+
 #. Disable the warning using :ref:`Configuration Files` with a
    :option:`lint_off` command.  This is useful when a script suppresses
    warnings, and the Verilog source should not be changed.  This method also
@@ -32,12 +46,6 @@ Warnings may be disabled in multiple ways:
 
          lint_off -rule UNSIGNED -file "*/example.v" -line 1
 
-#. Disable the warning globally invoking Verilator with the
-   :code:`-Wno-{warning-code}` option.  This should be avoided, as it
-   removes all checking across the designs, and prevents other users from
-   compiling your code without knowing the magic set of disables needed to
-   compile your design successfully.
-
 
 Error And Warning Format
 ========================
@@ -153,8 +161,8 @@ List Of Warnings
 .. option:: BADSTDPRAGMA
 
    An error that a pragma is badly formed, for pragmas defined by IEEE
-   1800-2017.  For example, an empty pragma line, or an incorrectly used
+   1800-2023.  For example, an empty pragma line, or an incorrectly used
-   'pragma protect'.  Third-party pragmas not defined by IEEE 1800-2017 are
+   'pragma protect'.  Third-party pragmas not defined by IEEE 1800-2023 are
    ignored.
 
 
@@ -202,22 +210,35 @@ List Of Warnings
 
 .. option:: BLKLOOPINIT
 
-   .. TODO better example
+   Indicates certain constructs where non-blocking assignments to unpacked
-
+   arrays (memories) are not supported inside loops. These typically appear in
-   This indicates that the initialization of an array needs to use
+   initialization/reset code:
-   non-delayed assignments.  This is done in the interest of speed; if
-   delayed assignments were used, the simulator would have to copy large
-   arrays every cycle.  (In smaller loops, loop unrolling allows the
-   delayed assignment to work, though it's a bit slower than a non-delayed
-   assignment.)  Here's an example
 
    .. code-block:: sv
 
          always @(posedge clk)
             if (~reset_l)
                 for (i=0; i<`ARRAY_SIZE; i++)
-                    array[i] = 0;  // Non-delayed for verilator
+                    array[i] <= 0;  // Non-blocking assignment inside loop
+            else
+                array[address] <= data;
 
+   While this is supported in typical synthesizeable code (including the
+   example above), some complicated cases are not supported. Namely:
+
+   1. If the above loop is inside a suspendable process or fork statement.
+
+   2. If the variable is also the target of a '<=' non-blocking assignment
+   in a suspendable process or fork statement (in addition to a synthesizable
+   loop).
+
+   3. If the element type of the array is a compound type.
+
+   4. In versions before 5.026, any delayed assignment to an array.
+
+   It might slightly improve run-time performance if you change the
+   non-blocking assignment inside the loop into a blocking assignment
+   (that is: use '=' instead of '<='), if possible.
 
    This message is only seen on large or complicated loops because
    Verilator generally unrolls small loops.  You may want to try increasing
@@ -275,7 +296,7 @@ List Of Warnings
    Unique case statements that select on an enumerated variable, where all
    of the enumerated values are covered by case items, are considered
    complete even if the case statement does not cover illegal
-   non-enumerated values (IEEE 1800-2017 12.5.3).  To check that illegal
+   non-enumerated values (IEEE 1800-2023 12.5.3).  To check that illegal
    values are not hit, use :vlopt:`--assert`.
 
    Ignoring this warning will only suppress the lint check; it will
@@ -398,9 +419,9 @@ List Of Warnings
 
 .. option:: CONSTRAINTIGN
 
-   Warns that Verilator does not support :code:`constraint`,
+   Warns that Verilator does not support certain forms of
-   :code:`constraint_mode`, or :code:`rand_mode`, and the construct was are
+   :code:`constraint`, :code:`constraint_mode`, or :code:`rand_mode`, and
-   ignored.
+   the construct was are ignored.
 
    Ignoring this warning may make Verilator randomize() simulations differ
    from other simulators.
@@ -471,7 +492,7 @@ List Of Warnings
 
    .. code-block::
 
-         %Warning-DEFPARAM: example.v:5:15: defparam is deprecated (IEEE 1800-2017 C.4.1)
+         %Warning-DEFPARAM: example.v:5:15: defparam is deprecated (IEEE 1800-2023 C.4.1)
                                           : ... Suggest use instantiation with #(.MY_PARAM(...etc...))
 
    To repair use :code:`#(.PARAMETER(...))` syntax. Repaired Example:
@@ -670,6 +691,52 @@ List Of Warnings
    used as a clock.
 
 
+.. option:: GENUNNAMED
+
+   Warns that a generate block was unnamed and "genblk" will be used per
+   IEEE.
+
+   The potential issue is that adding additional generate blocks will
+   renumber the assigned names, which may cause eventual problems with
+   synthesis constraints or other tools that depend on hierarchical paths
+   remaining consistent.
+
+   Blocks that are empty may not be reported with this warning, as no
+   scopes are created for empty blocks, so there is no harm in having them
+   unnamed.
+
+   Disabled by default as this is a code-style warning; it will simulate
+   correctly.
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         generate
+            if (PARAM == 1) begin  //<--- Warning
+            end
+
+   Results in:
+
+   .. code-block::
+
+         %Warning-GENUNNAMED: example.v:2:9: Unnamed generate block (IEEE 1800-2023 27.6)
+
+   To fix this assign a label (often with the naming convention prefix of
+   :code:`gen_` or :code:`g_`), for example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         generate
+            if (PARAM == 1) begin : gen_param_1  //<--- Repaired
+            end
+
+   Other tools with similar warnings: Verible's generate-label, "All
+   generate block statements must have a label."
+
+
 .. option:: HIERBLOCK
 
    Warns that the top module is marked as a hierarchy block by the
@@ -709,7 +776,7 @@ List Of Warnings
 
    .. code-block::
 
-         %Warning-IGNOREDRETURN: example.v:5:9: Ignoring return value of non-void function (IEEE 1800-2017 13.4.1)
+         %Warning-IGNOREDRETURN: example.v:5:9: Ignoring return value of non-void function (IEEE 1800-2023 13.4.1)
 
    The portable way to suppress this warning (in SystemVerilog) is to use a
    void cast, for example:
@@ -769,11 +836,14 @@ List Of Warnings
    then automatic as static prevents the function from being reentrant,
    which may be a source of bugs, and/or performance issues.
 
-   If the function does not require static behavior, change it to "function
+   If the function is in a module, and does not require static behavior,
-   automatic".
+   change it to "function automatic".
 
-   If the function requires static behavior, change it to "function
+   If the function is in a module, and requires static behavior, change it
-   static".
+   to "function static".
+
+   If the function is in a package, it defaults to static, and label the
+   function's variables as static.
 
    Ignoring this warning will only suppress the lint check; it will
    simulate correctly.
@@ -873,6 +943,102 @@ List Of Warnings
    Ignoring this warning will only suppress the lint check; it will
    simulate correctly.
 
+.. option:: LIFETIME
+
+   Error when a variable is referenced in a process that can outlive the process
+   in which it was declared. This can happen when using 'fork..join_none' or
+   'fork..join_any' blocks, which spawn process that can outlive their parents.
+   This error occurs only when Verilator can't replace the reference with a
+   reference to copy of this variable, local to the forked process. For example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 3
+
+         task foo(int local_var);
+            fork
+               #10 local_var++;
+               #20 $display("local_var = %d", local_var);
+            join_none
+         endtask
+
+   In the example above 'local_var' exists only within scope of 'foo', once foo
+   finishes, the stack frame containing 'i' gets removed. However, the process
+   forked from foo continues, as it contains a delay. After 10 units of time
+   pass, this process attempts to modify 'local_var'. However, this variable no
+   longer exits. It can't be made local to the forked process upon spawning, because
+   it's modified and can be referenced somewhere else, for example in the other
+   forked process, that was delayed by 20 units of time in this example. Thus,
+   there's no viable stack allocation for it.
+
+   In order to fix it, if the intent is not to share the variable's state outside
+   of the process, then create a local copy of the variable.
+
+   For example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 4
+
+         task foo(int local_var);
+            fork
+               #10 begin
+                  int forked_var = local_var;
+                  forked_var++;
+               end
+               #20 begin
+                  // Note that we are going to print the original value here,
+                  // as `forked_var`is a local copy that was initialized while
+                  // `foo` was still alive.
+                  int forked_var = local_var;
+                  $display("forked_var = %d", forked_var)
+               end
+            join_none
+         endtask
+
+   If you need to share its state, another strategy is to ensure it's allocated
+   statically:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 1
+
+         int static_var;
+
+         task foo();
+            fork
+               #10 static_var++;
+               #20 $display("static_var = %d", static_var);
+            join_none
+         endtask
+
+   However, if you need to be able to instantiate at runtime, the solution would be to
+   wrap it in an object, since the forked process can hold a reference to that object
+   and ensure that the variable stays alive this way:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         class Wrapper;
+            int m_var;
+
+            // Here we implicitly hold a reference to `this`
+            task foo();
+               fork
+                  #10 m_var++;
+                  #20 $display("this.m_var = %d", m_var);
+               join_none
+            endtask
+         endclass
+
+         // Here we explicitly hold a handle to an object
+         task bar(Wrapper wrapper);
+            fork
+               #10 wrapper.m_var++;
+               #20 $display("wrapper.m_var = %d", wrapper.m_var);
+            join_none
+         endtask
 
 .. option:: LITENDIAN
 
@@ -894,6 +1060,51 @@ List Of Warnings
    unsupported. Verilator uses only the typical delay value.
 
 
+.. option:: MISINDENT
+
+   Warns that the indentation of a statement is misleading, suggesting the
+   statement is part of a previous :code:`if` or :code:`while` block while
+   it is not.
+
+   Verilator suppresses this check when there is an inconsistent mix of
+   spaces and tabs, as it cannot ensure the width of tabs.  Verilator also
+   ignores blocks with :code:`begin`/:code:`end`, as the :code:`end`
+   visually indicates the earlier statement's end.
+
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+   For example
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 3
+
+         if (something)
+            statement_in_if;
+            statement_not_in_if;  //<--- Warning
+
+   Results in:
+
+   .. code-block::
+
+         %Warning-MISINDENT: example.v:3:9: Misleading indentation
+
+   To fix this repair the indentation to match the correct earlier
+   statement, for example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 3
+
+         if (something)
+            statement_in_if;
+         statement_not_in_if;  //<--- Repaired
+
+   Other tools with similar warnings: GCC -Wmisleading-indentation,
+   clang-tidy readability-misleading-indentation.
+
+
 .. option:: MODDUP
 
    .. TODO better example
@@ -972,6 +1183,21 @@ List Of Warnings
    (neither :vlopt:`--timing` nor :vlopt:`--no-timing` option was provided).
 
 
+.. option:: NEWERSTD
+
+   Warns that a feature requires a newer standard of Verilog or SystemVerilog
+   than the one specified by the :vlopt:`--language` option. For example, unsized
+   unbased literals (`'0`, `'1`, `'z`, `'x`) require IEEE 1800-2005 or later.
+
+   To avoid this warning, use a Verilog or SystemVerilog standard that
+   supports the feature. Alternatively, modify your code to use a different
+   syntax that is supported by the Verilog/SystemVerilog standard specified
+   by the :vlopt:`--language` option.
+
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+
 .. option:: NOLATCH
 
    .. TODO better example
@@ -991,6 +1217,14 @@ List Of Warnings
    :vlopt:`--no-timing` option.
 
 
+.. option:: NONSTD
+
+   Warns when a non-standard language feature is used that has a standard
+   equivalent, which might behave differently in corner cases. For example
+   :code:`$psprintf` system function is replaced by its standard equivalent
+   :code:`$sformatf`.
+
+
 .. option:: NULLPORT
 
    Warns that a null port was detected in the module definition port
@@ -1030,7 +1264,7 @@ List Of Warnings
 
 .. option:: PINMISSING
 
-   .. TODO better example
+   .. TODO better example (frequent)
 
    Warns that a module has a pin that is not mentioned in an instance.  If
    a pin is not missing it should still be specified on the instance
@@ -1039,6 +1273,22 @@ List Of Warnings
    Ignoring this warning will only suppress the lint check; it will
    simulate correctly.
 
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_PKGNODECL_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_PKGNODECL_msg.rst
+
+   Repaired example:
+
+   .. code-block:: sv
+      :emphasize-lines: 2
+
+         sub sub (
+                  .port());
+
    Other tools with similar warnings: Icarus Verilog's portbind, "warning:
    Instantiating module ... with dangling input port (...)". Slang's
    unconnected-port, "port '...' has no connection".
@@ -1070,7 +1320,7 @@ List Of Warnings
          generate
             if (A==0) begin
                b b_inst1 (.x(1'b0));  //<--- error nonexistent port
-               b #(.PX(1'b0)) b_inst2 (); //<--- error nonexistent parameter
+               b #(.PX(1'b0)) b_inst2 ();  //<--- error nonexistent parameter
             end
           endgenerate
        endmodule
@@ -1112,11 +1362,47 @@ List Of Warnings
 
 .. option:: PKGNODECL
 
-   .. TODO better example
+   An error that a package/class appears to have been referenced that has
+   not yet been declared.  According to IEEE 1800-2023 26.3, all packages
+   must be declared before being used.
 
-   An error that a package/class appears to have been referenced that has not
+   Faulty example:
-   yet been declared.  According to IEEE 1800-2017 26.3, all packages must
+
-   be declared before being used.
+   .. include:: ../../docs/gen/ex_PKGNODECL_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_PKGNODECL_msg.rst
+
+   Often the package is declared in its own header file.  In this case add
+   an include of that package header file to the referencing file.  (And
+   make sure you have header guards in the package's header file to prevent
+   multiple declarations of the package.)
+
+
+.. option:: PREPROCZERO
+
+   Warns that a preprocessor \`ifdef/\`ifndef expression (added in IEEE
+   1800-2023) evaluates a define value which has a value of :code:`0`.
+   This will evaluate in the expression as :code:`1` because the define has
+   a definition, unlike in the C preprocessor, which evaluates using the
+   define's value (of :code:`1`).
+
+   Referring to a define with an empty value does not give this warning, as
+   in C, the preprocessor will give an error on a preprocessor expression
+   of a define that is empty.
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+       `define ZERO 0
+       `ifdef (ZERO || ZERO)  //<--- warning PREPROCZERO
+        `error This_will_error_which_might_be_not_the_intent
+       `endif
+
+   The portable way to suppress this warning is to use a define value other
+   than zero, when it is to be used in a preprocessor expression.
 
 
 .. option:: PROCASSWIRE
@@ -1155,7 +1441,10 @@ List Of Warnings
 
 .. option:: RANDC
 
-   Warns that the :code:`randc` keyword is unsupported and being converted
+   Historical, never issued since version 5.018, when :code:`randc` became
+   fully supported.
+
+   Warned that the :code:`randc` keyword was unsupported and was converted
    to :code:`rand`.
 
 
@@ -1298,6 +1587,39 @@ List Of Warnings
    modeled values, or DPI calls.
 
 
+.. option:: SIDEEFFECT
+
+   Warns that an expression has a side effect that might not properly be
+   executed by Verilator.
+
+   This often represents a bug in Verilator, as opposed to a bad code
+   construct, however the Verilog code can typically be changed to avoid
+   the warning.
+
+   Faulty example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 1
+
+         x = y[a++];
+
+   This example warns because Verilator does not currently handle side
+   effects inside array subscripts; the a++ may be executed multiple times.
+
+   Rewrite the code to avoid expression side effects, typically by using a
+   temporary:
+
+   .. code-block:: sv
+      :linenos:
+
+         temp = a++;
+         x = y[temp];
+
+   Ignoring this warning may make Verilator simulations differ from other
+   simulators.
+
+
 .. option:: SPLITVAR
 
    Warns that a variable with a :option:`/*verilator&32;split_var*/`
@@ -1458,7 +1780,7 @@ List Of Warnings
 
    .. code-block::
 
-         %Warning-TIMESCALEMOD: example.v:1:8: Timescale missing on this module as other modules have it (IEEE 1800-2017 3.14.2.3)
+         %Warning-TIMESCALEMOD: example.v:1:8: Timescale missing on this module as other modules have it (IEEE 1800-2023 3.14.2.3)
 
    Recommend using :vlopt:`--timescale` argument, or in front of all
    modules use:
@@ -1602,7 +1924,8 @@ List Of Warnings
 
 .. option:: UNPACKED
 
-   Warns that unpacked structs and unions are not supported.
+   Warns that unpacked structs and unions are not supported because
+   :vlopt:`--structs-packed` was used, or by up through version 5.004.
 
    Ignoring this warning will make Verilator treat the structure as packed,
    which may make Verilator simulations differ from other simulators. This
@@ -1653,14 +1976,16 @@ List Of Warnings
 
    .. TODO better example
 
-   Warns that the specified genvar is never used/consumed.
+   Warns that the specified genvar is never used/consumed. See similar
+   :option:`UNUSEDSIGNAL`.
 
 
 .. option:: UNUSEDPARAM
 
    .. TODO better example
 
-   Warns that the specified parameter is never used/consumed.
+   Warns that the specified parameter is never used/consumed. See similar
+   :option:`UNUSEDSIGNAL`.
 
 
 .. option:: UNUSEDSIGNAL
@@ -1700,7 +2025,7 @@ List Of Warnings
 .. option:: USERERROR
 
    A SystemVerilog elaboration-time assertion error was executed.
-   IEEE 1800-2017 20.11 requires this error.
+   IEEE 1800-2023 20.11 requires this error.
 
    Faulty example:
 
@@ -1716,7 +2041,7 @@ List Of Warnings
 .. option:: USERFATAL
 
    A SystemVerilog elaboration-time assertion fatal was executed.
-   IEEE 1800-2017 20.11 requires this error.
+   IEEE 1800-2023 20.11 requires this error.
 
    Faulty example:
 
@@ -1732,7 +2057,7 @@ List Of Warnings
 .. option:: USERINFO
 
    A SystemVerilog elaboration-time assertion print was executed.  This is
-   not an error or warning, and IEEE 1800-2017 20.11 requires this
+   not an error or warning, and IEEE 1800-2023 20.11 requires this
    behavior.
 
    Example:
@@ -1747,7 +2072,7 @@ List Of Warnings
 .. option:: USERWARN
 
    A SystemVerilog elaboration-time assertion warning was executed.
-   IEEE 1800-2017 20.11 requires this warning.
+   IEEE 1800-2023 20.11 requires this warning.
 
    Faulty example:
 
@@ -1783,13 +2108,19 @@ List Of Warnings
 
 .. option:: WAITCONST
 
-   .. code-block:: sv
-
-         wait(0);  // Blocks forever
-
    Warns that a `wait` statement awaits a constant condition, which means it
    either blocks forever or never blocks.
 
+   As a special case `wait(0)` with the literal constant `0` (as opposed to
+   something that elaborates to zero), does not warn, as it is presumed the
+   code is making the intent clear.
+
+   Faulty example:
+
+   .. code-block:: sv
+
+         wait(1);  // Blocks forever
+
 
 .. option:: WIDTH
 
@@ -1826,7 +2157,7 @@ List Of Warnings
 
    .. include:: ../../docs/gen/ex_WIDTHEXPAND_1_faulty.rst
 
-   Results in a WIDTHEXPAND warning:
+   Results in a :option:`WIDTHEXPAND` warning:
 
    .. include:: ../../docs/gen/ex_WIDTHEXPAND_1_msg.rst
 
@@ -1834,17 +2165,21 @@ List Of Warnings
 
    .. include:: ../../docs/gen/ex_WIDTHEXPAND_1_fixed.rst
 
+
 .. option:: WIDTHTRUNC
 
-   A more granular WIDTH warning, for when a value is truncated
+   A more granular :option:`WIDTH` warning, for when a value is
+   truncated. See :option:`WIDTH`.
 
 .. option:: WIDTHEXPAND
 
-   A more granular WIDTH warning, for when a value is zero expanded
+   A more granular :option:`WIDTH` warning, for when a value is zero
+   expanded. See :option:`WIDTH`.
 
 .. option:: WIDTHXZEXPAND
 
-   A more granular WIDTH warning, for when a value is X/Z expanded
+   A more granular :option:`WIDTH` warning, for when a value is X/Z
+   expanded. See :option:`WIDTH`.
 
 .. option:: WIDTHCONCAT
 
@@ -1877,3 +2212,46 @@ List Of Warnings
    Inactive region. Such processes do get resumed in the same time slot
    somewhere in the Active region. Issued only if Verilator is run with the
    :vlopt:`--timing` option.
+
+.. option:: ZEROREPL
+
+   Warns that zero is used as the replication value in the replication
+   operator. This is specified as an error by IEEE 1800-2023 11.4.12.1.
+
+   Faulty example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 5
+
+         module dut
+            #(parameter int MY_PARAM = 0);
+           reg [7:0] data;
+           always @* begin
+             data = {MY_PARAM{1'b1}};  //<--- Warning
+           end
+         endmodule
+
+   Results in the following error:
+
+   .. code-block::
+
+       %Error-ZEROREPL: test.v:5:22: Replication value of 0 is only legal under a concatenation (IEEE 1800-2023 11.4.12.1)
+
+   Note that in some cases, this warning may be false, when a condition
+   upstream or downstream of the access means the zero replication will
+   never execute or be used.
+
+   Repaired example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         module dut
+            #(parameter int MY_PARAM = 1);  //<--- REPAIRED
+           reg [7:0] data;
+           always @* begin
+             data = {MY_PARAM{1'b1}};
+           end
+         endmodule

docs/internals.rst

@@ -224,7 +224,7 @@ Scheduling
 ----------
 
 Verilator implements the Active and NBA regions of the SystemVerilog scheduling
-model as described in IEEE 1800-2017 chapter 4, and in particular sections
+model as described in IEEE 1800-2023 chapter 4, and in particular sections
 4.5 and Figure 4.1. The static (Verilation time) scheduling of SystemVerilog
 processes is performed by code in the ``V3Sched`` namespace. The single
 entry point to the scheduling algorithm is ``V3Sched::schedule``. Some
@@ -312,7 +312,7 @@ Scheduling of clocked and combinational logic
 For performance, clocked and combinational logic needs to be ordered.
 Conceptually this minimizes the iterations through the evaluation loop
 presented in the reference algorithm in the SystemVerilog standard (IEEE
-1800-2017 section 4.5), by evaluating logic constructs in data-flow order.
+1800-2023 section 4.5), by evaluating logic constructs in data-flow order.
 Without going into a lot of detail here, accept that well thought out ordering
 is crucial to good simulation performance, and also enables further
 optimizations later on.
@@ -407,7 +407,7 @@ triggered due to a combinational signal change from the previous evaluation
 pass, and a combinational loop settling due to hybrid logic, if the clocked
 logic reads the not yet settled combinationally driven signal. Such a race
 is indeed possible, but our evaluation is consistent with the SystemVerilog
-scheduling semantics (IEEE 1800-2017 chapter 4), and therefore any program
+scheduling semantics (IEEE 1800-2023 chapter 4), and therefore any program
 that exhibits such a race has non-deterministic behavior according to the
 SystemVerilog semantics, so we accept this.
 
@@ -638,7 +638,22 @@ condition. See the `Timing Pass` section for more details.
 Timing Pass
 ~~~~~~~~~~~
 
-The visitor in ``V3Timing.cpp`` transforms each timing control into a ``co_await``.
+There are two visitors in ``V3Timing.cpp``.
+
+The first one, ``TimingSuspendableVisitor``, does not perform any AST
+transformations. It is responsible for marking processes and C++ functions that
+contain timing controls as suspendable. Processes that call suspendable
+functions are also marked as suspendable. Functions that call, are overridden
+by, or override suspendable functions are marked as suspendable as well.
+
+The visitor keeps a dependency graph of functions and processes to handle such
+cases. A function or process is dependent on a function if it calls it. A
+virtual class method is dependent on another class method if it calls it,
+overrides it, or is overriden by it.
+
+The second visitor in ``V3Timing.cpp``, ``TimingControlVisitor``, uses the
+information provided by ``TimingSuspendableVisitor`` and transforms each timing
+control into a ``co_await``.
 
 * event controls are turned into ``co_await`` on a trigger scheduler's
   ``trigger`` method. The awaited trigger scheduler is the one corresponding to
@@ -670,14 +685,9 @@ Each sub-statement of a ``fork`` is put in an ``AstBegin`` node for easier
 grouping. In a later step, each of these gets transformed into a new, separate
 function. See the `Forks` section for more detail.
 
-Processes that use awaits are marked as suspendable. Later, during ``V3Sched``,
+Suspendable functions get the return type of ``VlCoroutine``, which makes them
-they are transformed into coroutines. Functions that use awaits get the return
+coroutines. Later, during ``V3Sched``, suspendable processes are also
-type of ``VlCoroutine``. This immediately makes them coroutines. Note that if a
+transformed into coroutines.
-process calls a function that is a coroutine, the call gets wrapped in an
-await, which means the process itself will be marked as suspendable. A virtual
-function is a coroutine if any of its overriding or overridden functions are
-coroutines. The visitor keeps a dependency graph of functions and processes to
-handle such cases.
 
 Scheduling with timing
 ~~~~~~~~~~~~~~~~~~~~~~
@@ -1021,15 +1031,100 @@ the evaluation process records a bitmask of variables that might have
 changed; if clear, checking those signals for changes may be skipped.
 
 
+Constrained randomization
+-------------------------
+
+Because general constrained randomization is a co-NP-hard problem, not all
+cases are implemented in Verilator, and an external specialized SMT solver is
+used for any non-obvious ones.
+
+The ``randomize()`` method spawns an SMT solver in a sub-process. Then the
+solver gets a setup query, then the definition of variables, then all the
+constraints (SMT assertions) about the variables. Since the solver has no
+information about the class' PRNG state, if the problem is satisfiable,
+the solution space is further constrained by adding extra random constraints,
+and querying the values satisfying the problem statement.
+The constraint is currently constructed as fixing a simple xor of randomly
+chosen bits of the variables being randomized.
+
+The runtime classes used for handling the randomization are  defined in
+``verilated_random.h`` and ``verilated_random.cpp``.
+
+
+``VlSubprocess``
+~~~~~~~~~~~~~~~~
+
+Subprocess handle, responsible for keeping track of the resources like child
+PID, read and write file descriptors, and presenting them as a C++ iostream.
+
+
+``VlRandomizer``
+~~~~~~~~~~~~~~~~
+
+Randomizer class, responsible for keeping track of variables and constraints,
+and communicating with the solver subprocess.
+
+The solver gets the constraints in `SMT-LIB2
+<https://smtlib.cs.uiowa.edu/>`__ textual format in the following syntax:
+
+::
+
+    (set-info :smt-lib-version 2.0)
+    (set-option :produce-models true)
+    (set-logic QF_BV)
+
+    (declare-fun v () (_ BitVec 16))
+    (declare-fun w () (_ BitVec 64))
+    (declare-fun x () (_ BitVec 48))
+    (declare-fun z () (_ BitVec 24))
+    (declare-fun t () (_ BitVec 23))
+    (assert (or (= v #x0003) (= v #x0008)))
+    (assert (= w #x0000000000000009))
+    (assert (or (or (= x #x000000000001) (= x #x000000000002)) (or (= x #x000000000004) (= x #x000000000009))))
+    (assert (bvult ((_ zero_extend 8) z) #x00000015))
+    (assert (bvugt ((_ zero_extend 8) z) #x0000000d))
+
+    (check-sat)
+
+The solver responds with either ``sat`` or ``unsat``. Then the initial solution
+is queried with:
+
+::
+
+    (get-value (v w x z t ))
+
+The solver then responds with e.g.:
+
+::
+
+    ((v #x0008)
+     (w #x0000000000000005)
+     (x #x000000000002)
+     (z #x000010)
+     (t #b00000000000000000000000))
+
+And then a follow-up query (or a series thereof) is asked, and the solver gets
+reset, so that it can be reused by subsequent randomization attempts:
+
+::
+
+    (assert (= (bvxor (bvxor <...> (bvxor ((_ extract 21 21) z) ((_ extract 39 39) x)) ((_ extract 5 5) w)) <...> ((_ extract 10 10) w)) #b0))
+    (check-sat)
+    (get-value)
+    ...
+    (reset)
+
+
+
 Coding Conventions
 ==================
 
 
-Compiler Version and C++11
+Compiler Version and C++14
 --------------------------
 
-Verilator requires C11. Verilator does not require any newer versions, but
+Verilator requires C14. Verilator does not require any newer versions, but
-is maintained to build successfully with C14/C17/C20.
+is maintained to build successfully with C17/C20.
 
 
 Indentation and Naming Style
@@ -1212,9 +1307,9 @@ There are three ways data is passed between visitor functions.
 
 2. User attributes. Each ``AstNode`` (**Note.** The AST node, not the
    visitor) has five user attributes, which may be accessed as an
-   integer using the ``user1()`` through ``user5()`` methods, or as a
+   integer using the ``user1()`` through ``user4()`` methods, or as a
    pointer (of type ``AstNUser``) using the ``user1p()`` through
-   ``user5p()`` methods (a common technique lifted from graph traversal
+   ``user4p()`` methods (a common technique lifted from graph traversal
    packages).
 
    A visitor first clears the one it wants to use by calling
@@ -1390,7 +1485,7 @@ Controlling the Test Driver
 ---------------------------
 
 The test driver script `driver.pl` runs tests; see the `Test Driver`
-section.  The individual test drivers are written in PERL; see `Test
+section.  The individual test drivers are written in Perl; see `Test
 Language`.
 
 
@@ -1422,7 +1517,7 @@ Developers will also want to call ./configure with two extra flags:
    disabled by default, as SystemC installation problems would otherwise
    falsely indicate a Verilator problem.
 
-When enabling the long tests, some additional PERL modules are needed,
+When enabling the long tests, some additional Perl modules are needed,
 which you can install using cpan.
 
 ::
@@ -1452,6 +1547,19 @@ There are some traps to avoid when running regression tests
   system-dependent, but on Fedora Linux it would require editing the
   ``/etc/security/limits.conf`` file as root.
 
+Diffing generated code after changes
+------------------------------------
+
+When making a change in the code generation area that should not change the
+actual emitted code, it is useful to perform a diff to make sure the emitted
+code really did not change. To do this, the top level Makefile provides the
+*test-snap* and *test-diff* targets:
+
+- Run the test suite with ``make test``
+- Take a snapshot with ``make test-snap``
+- Apply your changes
+- Run the test suite again with ``make test``
+- See the changes in the output with ``make test-diff``
 
 Continuous Integration
 ----------------------
@@ -1503,8 +1611,19 @@ debug level 5, with the V3Width.cpp file at level 9.
 --debug
 -------
 
-When you run with ``--debug``, there are two primary output file types
+When you run with ``--debug``, there are three primary output file types
-placed into the obj_dir, .tree and .dot files.
+placed into the obj_dir, .vpp, .tree and .dot files.
+
+.vpp Output
+-----------
+
+Verilator creates a *{mod_prefix}*\ __inputs\ .vpp file containing all the
+files that were read, filtered by preprocessing. This file can be fed back
+into Verilator, replacing on the command line all of the previous input
+files, to enable simplification of test cases.
+
+Verilator also creates .vpp files for each individual file passed on the
+command line.
 
 
 .dot Output
@@ -1619,7 +1738,7 @@ Source file and line
    file is ``a``, the 26th is ``z``, the 27th is ``aa``, and so on.
 
 User pointers
-   Shows the value of the node's user1p...user5p, if non-NULL.
+   Shows the value of the node's user1p...user4p, if non-NULL.
 
 Data type
    Many nodes have an explicit data type. "@dt=0x..." indicates the
@@ -1662,6 +1781,84 @@ Similarly, the ``NETLIST`` has a list of modules referred to by its
 ``op1p()`` pointer.
 
 
+.tree.json Output
+-----------------
+
+``.tree.json``` is an alternative dump format to ``.tree`` that is meant for
+programmatic processing (e.g. with `astsee <https://github.com/antmicro/astsee>`_).
+To enable this dump format, use :vlopt:`--dump-tree-json` or :vlopt:`--json-only`.
+
+Structure:
+::
+
+  {
+    /* Attributes that are common to all types of nodes */
+    "type": "VAR",
+    "name": "cyc",
+    /* By default addresses and filenames use short/stable ids rather than real value */
+    "addr": "(H)",
+    "loc": "a,25:12,26:15", /* "fileid,firstLine:firstCol,lastLine:endCol" (endCol is right exclusive) */
+    "editNum": 602,
+    /* Fields that are specific to AstVar nodes:  */
+    "origName": "cyc",
+    "isSc": false,
+    "ioDirection": "NONE",
+    "isConst": false,
+    "isPullup": false,
+    "isPulldown": false,
+    "isUsedClock": false,
+    "isSigPublic": false,
+    "isLatched": false,
+    "isUsedLoopIdx": false,
+    "noReset": false,
+    "attrIsolateAssign": false,
+    "attrFileDescr": false,
+    "isDpiOpenArray": false,
+    "isFuncReturn": false,
+    "isFuncLocal": false,
+    "attrClocker": "UNKNOWN",
+    "lifetime": "NONE",
+    "varType": "VAR",
+    /* Lists of child nodes (which use similar structure as their parent): */
+    "childDTypep": [ /* ... */ ],
+    "delayp": [ /* ... */ ],
+    "valuep": [ /* ... */ ],
+    "attrsp": [ /* ... */ ]
+  }
+
+.tree.meta.json Output
+----------------
+.tree.meta.json contains metadata that is common across the whole AST tree
+(in case of --dump-tree-json, multiple trees share one meta file).
+
+Besides de-duplication of data shared between multiple stages, .meta.json enables offloading
+unstable data (that can vary from machine-to-machine or run-to-run) from main .tree.json.
+This offloading allows, for example, to use byte-to-byte comparisons of AST dumps in tests.
+
+::
+
+  {"files": {
+    /* Map id to filename, and other metadata */
+    "d": {"filename":"/home/ant/tmp/verilator/include/verilated_std.sv", "realpath":"/home/ant/tmp/verilator/include/verilated_std.sv", "language":"1800-2023"},
+    "a": {"filename":"<built-in>", "realpath":"<built-in>", "language":"1800-2023"},
+    "b": {"filename":"<command-line>", "realpath":"<command-line>", "language":"1800-2023"},
+    "c": {"filename":"input.vc", "realpath":"/home/ant/tmp/verilator/test_regress/input.vc", "language":"1800-2023"},
+    "e": {"filename":"t/t_EXAMPLE.v", "realpath":"/home/ant/tmp/verilator/test_regress/t/t_EXAMPLE.v", "language":"1800-2023"}
+   },"pointers": {
+    /* Map id to real address */
+    "(AG)": "0x562997289180",
+    "(YF)": "0x5629971c50b0",
+    "(WF)": "0x5629971e7ae0",
+    /* ... /*
+   },"ptrFieldNames": [
+    /* List of fields that are used for storing pointers */
+    "aboveScopep",
+    "voidp",
+    "addr",
+    /* ... */
+ ]}
+
+
 .tree.dot Output
 ----------------
 
@@ -1734,6 +1931,20 @@ To print a node:
    pnt nodep
    # or: call dumpTreeGdb(nodep)  # aliased to "pnt" in src/.gdbinit
 
+``src/.gdbinit`` and ``src/.gdbinit.py`` define handy utilities for working with
+JSON AST dumps. For example:
+
+* ``jstash nodep`` - Perform a JSON AST dump and save it into GDB value history (e.g. ``$1``)
+* ``jtree nodep`` - Perform a JSON AST dump and pretty print it using ``astsee_verilator``.
+* ``jtree $1`` - Pretty print a dump that was previously saved by ``jstash``.
+* ``jtree nodep -d '.file, .timeunit'`` - Perform a JSON AST dump, filter out some fields and pretty print it.
+* ``jtree 0x55555613dca0`` - Pretty print using address literal (rather than actual pointer).
+* ``jtree $1 nodep`` - Diff ``nodep`` against an older dump.
+
+A detailed description of ``jstash`` and ``jtree`` can be displayed using ``gdb``'s ``help`` command.
+
+These commands require `astsee <https://github.com/antmicro/astsee>`_ to be installed.
+
 When GDB halts, it is useful to understand that the backtrace will commonly
 show the iterator functions between each invocation of ``visit`` in the
 backtrace. You will typically see a frame sequence something like:
@@ -1795,21 +2006,21 @@ Verilator ideally would support all of IEEE, and has the goal to get close
 to full support. However the following IEEE sections and features are not
 anticipated to be ever implemented for the reasons indicated.
 
-IEEE 1800-2017 3.3 modules within modules
+IEEE 1800-2023 3.3 modules within modules
     Little/no tool support, and arguably not a good practice.
-IEEE 1800-2017 6.12 "shortreal"
+IEEE 1800-2023 6.12 "shortreal"
     Little/no tool support, and easily promoted to real.
-IEEE 1800-2017 11.11 Min, typ, max
+IEEE 1800-2023 11.11 Min, typ, max
     No SDF support, so will always use typical.
-IEEE 1800-2017 20.16 Stochastic analysis
+IEEE 1800-2023 20.16 Stochastic analysis
     Little industry use.
-IEEE 1800-2017 20.17 PLA modeling
+IEEE 1800-2023 20.17 PLA modeling
     Little industry use and outdated technology.
-IEEE 1800-2017 31 Timing checks
+IEEE 1800-2023 31 Timing checks
     No longer relevant with static timing analysis tools.
-IEEE 1800-2017 32 SDF annotation
+IEEE 1800-2023 32 SDF annotation
     No longer relevant with static timing analysis tools.
-IEEE 1800-2017 33 Config
+IEEE 1800-2023 33 Config
     Little industry use.
 
 
@@ -1850,6 +2061,10 @@ driver.pl Non-Scenario Arguments
   files with dumping level 3, which dumps the standard critical stages.
   For details on the format see `.tree Output`.
 
+--fail-max <numtests>
+  Set the number of failing tests, after which the driver will stop running
+  additional tests.  Defaults to 20, 0 disables.
+
 --gdb
   Same as ``verilator --gdb``: Run Verilator under the debugger.
 
@@ -1903,6 +2118,9 @@ driver.pl Non-Scenario Arguments
 --trace
   Set the simulator specific flags to request waveform tracing.
 
+--valgrind
+  Same as ``verilator --valgrind``: Run Verilator under `Valgrind <https://valgrind.org/>`_.
+
 --verbose
   Compile and run the test in verbose mode. This means ``TEST_VERBOSE``
   will be defined for the test (Verilog and any C++/SystemC wrapper).
@@ -1946,6 +2164,9 @@ simultaneously.
 --vltmt
   Run Verilator tests in multithreaded mode.
 
+--xrun
+  Run Cadence Xcelium simulator tests.
+
 --xsim
   Run Xilinx XSim simulator tests.
 
@@ -1989,6 +2210,10 @@ VERILATOR_ROOT
   Standard path to Verilator distribution root; see primary Verilator
   documentation.
 
+VERILATOR_SOLVER
+  SMT solver command for constrained randomization; see primary Verilator
+  documentation.
+
 VERILATOR_TESTS_SITE
   Used with ``--site``, a colon-separated list of directories with tests to
   be added to testlist.
@@ -2102,7 +2327,7 @@ Or in a hand-written C++ wrapper:
 ::
 
    #ifdef TEST_VERBOSE
-      cout << "Read a=" << a << endl;
+      std::cout << "Read a=" << a << std::endl;
    #endif
 
 A filename that should be used to check the output results is given with
@@ -2203,7 +2428,7 @@ xsim_flags / xsim_flags2 / xsim_run_flags
 Distribution
 ============
 
-Copyright 2008-2023 by Wilson Snyder. Verilator is free software; you can
+Copyright 2008-2024 by Wilson Snyder. Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

docs/spelling.txt

@@ -1,4 +1,5 @@
 ABCp
+Aadi
 Accellera
 Affe
 Aleksander
@@ -13,53 +14,69 @@ Antonin
 Antwerpen
 Arasanipalai
 Arjen
+Arshid
 Asciidoc
 Ashutosh
 Ast
 Atmel
 Aurelien
 Bagri
+Balboni
 Baltazar
 Bardsley
 Benchmarking
 Berman
 Bhagavatula
 Bhattacharyya
+Biancolin
 Binderman
+Björk
 Bleiweiss
 Bogdan
+Bonneau
 Bouchard
 Boumenot
 Brej
 Briquet
 Brownlee
 Buckenmaier
+Burghoorn
 Bybell
+CLang
 CMake
 Cai
 Cavium
 Cfuncs
 Chandan
+Chentai
+Cherkasov
+Chih
 Chitlesh
 Christophe
 Cochrane
 Conda
 Corteggiani
+Cozzocrea
 Cuan
 Cygwin
 DErrico
 DFG
 Da
+Dai
 Danilo
 Dannoritzer
 Das
+Davide
 Dcache
 Deadman
 Debacker
+Deepa
 Defparams
+Delm
 Denio
 Deprecations
 Deroo
+Desai
 Dickol
 Diez
 Dimitris
@@ -68,9 +85,11 @@ Djordjevic
 Dobbie
 Dockerfile
 Donal
+Donovick
 Doorn
 Doxygen
 Dressler
+Dudek
 Duraid
 Dutton
 Dzetkulic
@@ -88,14 +107,20 @@ Engstrom
 Enzo
 Eugen
 Fabrizio
+Faucher
+Faure
 Fekete
 Ferrandi
 Flachs
 Flavien
+Florian
 Foletto
+Forencich
 Forker
 Francillon
 Fredieu
+Freiberger
+Frédéric
 GTKWave
 Galbi
 Gantt
@@ -107,6 +132,7 @@ Gernot
 Gerst
 Gielda
 Gigerl
+Gijs
 Gileadi
 Giri
 Gisselquist
@@ -115,18 +141,24 @@ Goessling
 Gonnen
 Goorah
 Gossner
+Graba
 Graphviz
 Graybeal
 Grobman
 Grulfen
+Gu
 Gunter
 Guo
+Hameed
 Hao
+Haojin
 Harboe
 Hashimoto
 Hayenga
+Hesselbarth
 Hewson
 Hicamp
+Hideto
 Hiroki
 Holdsworth
 Holme
@@ -134,8 +166,11 @@ Homebrew
 Hornung
 Hossell
 Hsu
+Huggett
+Hutt
 Hyperthreading
 Ibrahim
+Ikram
 Iles
 Inlines
 Inout
@@ -147,11 +182,14 @@ Jae
 Jalloq
 Jankowski
 Jannis
+Jasen
 Jens
 Jeras
+Jiaxun
 Jiuyang
 Joannou
 Joly
+Josse
 Jullien
 Junji
 Junyi
@@ -162,6 +200,7 @@ Kahn
 Kai
 Kamendje
 Kandadi
+Kaneda
 Kaplan
 Karge
 Karlsson
@@ -177,6 +216,7 @@ Klnv
 Koenig
 Koh
 Kolecki
+Konstantin
 Koonce
 Korteland
 Koszek
@@ -188,17 +228,23 @@ Kumashikar
 Kuoping
 Kurachi
 Laeufer
+Laroche
 Laurens
 Lavino
 Leber
 Leendert
 Lem
 Lesik
+Libenzi
+Licker
 Liland
 Liu
+Liwei
 Lockhart
 Longo
+Luca
 Lussier
+Lübeck
 MMD
 MODDUP
 MTasks
@@ -208,11 +254,17 @@ Mahesh
 Mahmoudy
 Makefile
 Makefiles
+Maksymenko
+Markley
+Marquet
 Matveyenko
 Maupin
 Mdir
 Mednick
+Mei
+Melo
 Menküc
+Michail
 Michiels
 Microsystems
 Milanovic
@@ -228,9 +280,11 @@ Mong
 Muhlestein
 Multithreaded
 Multithreading
+Mykyta
 NOUNOPTFLAT
 NaN
 Nalbantis
+Nandor
 Narayan
 Nassim
 Nauticus
@@ -241,15 +295,20 @@ Niranjan
 Nitza
 Noack
 Nodine
+Ober
 Oleg
 Olof
 Olofsson
+Oron
 Oyvind
 PLI
+Palaniappan
 Patricio
 Petr
+Piard
 Piechotka
 Piersall
+Platz
 Platzer
 Plunkett
 Popolon
@@ -260,10 +319,14 @@ Prateek
 Pre
 Preprocess
 Pretet
+Pretl
+Pringlemeir
 Priyadharshini
 Pullup
 Pulver
 Puri
+Qin
+Qiu
 Questa
 Rachit
 Ralf
@@ -273,27 +336,37 @@ Reitan
 Renga
 Requin
 Rodionov
+Rohan
 Rolfe
+Rontionov
 Roodselaar
+Roshit
 Runtime
 Ruud
 Rystsov
 STandarD
 Salman
+Sammelson
+Sanggyu
 Sanguinetti
 Sanjay
+Sasselli
 Scharrer
 Seitz
+Shahid
 Shankar
 Shanshan
 Sharad
 Shareef
+Shen
 Sheng
 Shi
 Shinkarovsky
+Shinya
 Shirakawa
 Shuba
 Shunyao
+Slager
 Slatter
 SoC
 Sobhan
@@ -306,6 +379,7 @@ Srini
 Srinivasan
 Stamness
 Stephane
+Sterin
 Stoddard
 Stroebel
 Strouble
@@ -313,6 +387,7 @@ Stucki
 Su
 Suguimoto
 Sundararajan
+Sunderland
 Suse
 Syms
 Synopsys
@@ -320,6 +395,7 @@ SystemC
 SystemVerilog
 Takatsukasa
 Tambe
+Tarik
 Tariq
 Tejada
 Tengstrand
@@ -327,6 +403,7 @@ Terpstra
 Thiede
 Thierry
 Thyer
+Tianrui
 Tichelaar
 Timi
 Tomov
@@ -337,9 +414,11 @@ Trefor
 Tresidder
 Tri
 Tristate
+Truong
 Turton
 UNOPTFLAT
 Ubixum
+Ueno
 Uints
 Undefines
 Unsized
@@ -348,6 +427,7 @@ Uselib
 Usha
 Usuario
 VERILATOR
+Vandergriendt
 Vasu
 Vdeeptemp
 Vdly
@@ -365,6 +445,7 @@ Verilog
 Vighnesh
 Viktor
 Vilp
+Vlip
 Vm
 Vukobratovic
 Wai
@@ -375,23 +456,32 @@ Wfuture
 Whatson
 Wildman
 Wim
+Wmisleading
 Wno
 Wojciech
 Wolfel
 Wouters
 Wpedantic
+Wunused
 Wwarn
 XSim
 Xcelium
 Xiaoliang
+Xiaoyi
 Xuan
 Xuanqi
+Yao
 Yazdanbakhsh
+Yernagula
 Yi
 Yike
 Yinan
+Yoshitomo
 Yosys
 Yu
+Yujia
+Yurii
+Zaruba
 Zhang
 abirkmanis
 accessor
@@ -409,7 +499,10 @@ architected
 args
 arrarys
 assertOn
+assertcontrol
+astgen
 async
+atClone
 ato
 atoi
 autoconf
@@ -438,6 +531,7 @@ buildenv
 bv
 bvs
 callValueCbs
+callgrind
 casex
 casez
 casted
@@ -472,10 +566,12 @@ constexpr
 constpool
 coredump
 coroutine
+coroutines
 countbits
 countones
 cout
 cpp
+cppstyle
 cpu
 ctor
 ctrace
@@ -496,12 +592,15 @@ defname
 defparam
 demangling
 dep
+deparametrized
 der
 dereference
 desassign
 destructor
+desynchronization
 detections
 dev
+devcontainer
 devel
 dir
 displayb
@@ -510,6 +609,7 @@ doxygen
 dpiGetContext
 dpic
 dsvf
+dt
 dtor
 dumpall
 dumpfile
@@ -528,6 +628,7 @@ dut
 dx
 dynarray
 elab
+eliasphanna
 elike
 elsif
 endcase
@@ -550,6 +651,7 @@ envvar
 eof
 errae
 erroring
+esynr
 et
 eval
 evals
@@ -581,6 +683,7 @@ foreach
 fprintf
 fprofile
 fread
+freloop
 frewind
 fs
 fscanf
@@ -602,6 +705,9 @@ genvar
 genvars
 getenv
 getline
+getter
+ggdb
+glibc
 gmake
 gmon
 gotFinish
@@ -613,6 +719,7 @@ hh
 hier
 hierCMakeArgs
 hierMkArgs
+hierParameters
 hierVer
 hx
 hyperthreading
@@ -646,6 +753,8 @@ ish
 isunbounded
 isunknown
 jobserver
+json
+jwoutersymatra
 killua
 lang
 lcov
@@ -657,6 +766,7 @@ libext
 libgoogle
 libsystemc
 libtcmalloc
+libverilated
 linkers
 linter
 linux
@@ -685,6 +795,7 @@ miree
 mis
 misconnected
 misconversion
+misoptimized
 missized
 mk
 mno
@@ -709,6 +820,7 @@ multithreading
 musl
 mutexes
 mux
+muzafferkal
 myftptoyman
 mysignal
 namespace
@@ -739,6 +851,8 @@ parallelized
 param
 parameterization
 parameterized
+parameterized
+parameterless
 params
 parens
 pawel
@@ -747,6 +861,7 @@ pdf
 perf
 perftools
 pgo
+phelter
 picoChip
 pinIndex
 pinout
@@ -764,7 +879,9 @@ pragma
 pragmas
 pre
 precisions
+precompiled
 predefines
+prepareClone
 prepend
 prepended
 preprocess
@@ -779,7 +896,9 @@ profcfunc
 profiler
 prototyptes
 ps
+psprintf
 pthread
+pthreads
 ptr
 pulldown
 pulldowns
@@ -788,9 +907,12 @@ pvalue
 pwd
 py
 qrq
+qrqiuren
 radix
 randc
 randcase
+randstate
+raphmaster
 rarr
 rdtsc
 reStructuredText
@@ -800,11 +922,13 @@ readmemb
 readmemh
 realpath
 realtime
+realtobits
 recoding
 recrem
 redeclaring
 regs
 reloop
+replaceShiftOp
 resetall
 respecified
 rodata
@@ -818,6 +942,7 @@ sVerilator
 sawatzke
 sc
 scalared
+sccache
 sccanf
 seg
 setuphold
@@ -842,6 +967,7 @@ stdin
 stdout
 stime
 stmts
+str
 strcasecmp
 stringification
 stringified
@@ -855,13 +981,20 @@ submakes
 submodule
 submodules
 substring
+superclass
+suspendable
+suspendables
 sv
 svBitVal
 svBitVecVal
 svGet
+svGetTime
+svGetTimePrecision
 svLogicVal
 svdpi
+svgGetTimeUnit
 swrite
+synthesizeable
 sys
 systemc
 tenghtt
@@ -880,6 +1013,7 @@ toolchain
 topcell
 toplevel
 toupper
+traceCapable
 traceEverOn
 tran
 treei
@@ -896,10 +1030,12 @@ typedefs
 typename
 uint
 un
+unbased
 undef
 undefineall
 undriven
 ungetc
+unhandled
 uniquified
 unistd
 unlink
@@ -914,13 +1050,17 @@ unsup
 untyped
 urandom
 uselib
+utimes
 uwire
 uwires
+valgrind
 vc
 vcd
 vcddiff
 vcoverage
+vdhotre
 vec
+ventana
 ver
 verFiles
 verible
@@ -936,13 +1076,17 @@ vlt
 vltstd
 vluint
 vpi
+vpiConstType
 vpiDefName
+vpiInertialDelay
+vpiInstance
 vpiLeftRange
 vpiModule
 vpiSize
 vpiSuppressVal
 vpiTimeUnit
 vpiType
+vpiUndefined
 vpm
 vpp
 warmup
@@ -966,3 +1110,6 @@ ypq
 yurivict
 zdave
 Øyvind
+Алексеевич
+Исаак
+

docs/xml.rst

@@ -70,7 +70,7 @@ The XML document consists of 4 sections within the top level
 Distribution
 ============
 
-Copyright 2020-2023 by Wilson Snyder. Verilator is free software; you can
+Copyright 2020-2024 by Wilson Snyder. Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

examples/cmake_hello_c/CMakeLists.txt

@@ -30,6 +30,7 @@ endif()
 
 # Create a new executable target that will contain all your sources
 add_executable(example ../make_hello_c/sim_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)
 
 # Add the Verilated circuit to the target
 verilate(example

examples/cmake_hello_c/Makefile

@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)

examples/cmake_hello_sc/CMakeLists.txt

@@ -37,6 +37,7 @@ find_package(SystemCLanguage QUIET)
 
 # Create a new executable target that will contain all your sources
 add_executable(example ../make_hello_sc/sc_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)
 
 set_property(
   TARGET example

examples/cmake_hello_sc/Makefile

@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 	TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)

examples/cmake_protect_lib/CMakeLists.txt

@@ -30,9 +30,12 @@ endif()
 
 # Create the main executable target
 add_executable(example ../make_protect_lib/sim_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)
 
 # Create a secret library
 add_library(verilated_secret STATIC) # or SHARED for a shared library
+target_compile_features(verilated_secret PUBLIC cxx_std_14)
+
 target_link_libraries(example PRIVATE verilated_secret)
 # To create both libraries on CMake >= 3.12 replace the above 2 lines with the following:
 # add_library(verilated_secret OBJECT)

examples/cmake_protect_lib/Makefile

@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)

examples/cmake_tracing_c/CMakeLists.txt

@@ -30,6 +30,7 @@ endif()
 
 # Create a new executable target that will contain all your sources
 add_executable(example ../make_tracing_c/sim_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)
 
 # Add the Verilated circuit to the target
 verilate(example COVERAGE TRACE

examples/cmake_tracing_c/Makefile

@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)

examples/cmake_tracing_sc/CMakeLists.txt

@@ -38,6 +38,7 @@ find_package(SystemCLanguage QUIET)
 
 # Create a new executable target that will contain all your sources
 add_executable(example ../make_tracing_sc/sc_main.cpp)
+target_compile_features(example PUBLIC cxx_std_14)
 
 set_property(
   TARGET example

examples/cmake_tracing_sc/Makefile

@@ -31,7 +31,7 @@ endif
 ifeq ($(shell which cmake),)
 	TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)

examples/json_py/vl_file_copy

@@ -1,15 +1,15 @@
 #!/usr/bin/env python3
 # -*- Python -*- See copyright, etc below
-# pylint: disable=C0114,C0115,C0209,R0903
+# pylint: disable=C0103,C0114,C0115,C0209,R0903
 ######################################################################
 
 import argparse
+import json
 import os
 import re
 import subprocess
-import tempfile
-import xml.etree.ElementTree as ET
 from shutil import copy2
+from tempfile import NamedTemporaryFile
 # from pprint import pprint, pformat
 
 #######################################################################
@@ -25,29 +25,30 @@ class VlFileCopy:
 
         self.debug = debug
 
-        with tempfile.NamedTemporaryFile() as xml_temp:
+        with NamedTemporaryFile() as tree_temp, NamedTemporaryFile(
+        ) as meta_temp:
             vargs = [
-                '--xml-output',
+                '--json-only-output',
-                xml_temp.name,
+                tree_temp.name,
+                '--json-only-meta-output',
+                meta_temp.name,
                 '--bbox-sys',  # Parse some stuff can't translate
                 '--bbox-unsup',
-                '--prefix vlxml'
+                '--prefix vljson'
-            ]  # So we know name of .xml output
+            ]
             vargs += verilator_args
             self.run_verilator(vargs)
-            self.tree = ET.parse(xml_temp.name)
+            self.tree = json.load(tree_temp)
+            self.meta = json.load(meta_temp)
 
         os.makedirs(output_dir, 0o777, True)
 
-        # Find and copy the files
+        for file_id in self.meta['files']:
-        root = self.tree.getroot()
+            path = self.meta['files'][file_id]['realpath']
-        xfiles = root.find('files')
+            if not re.match('^<', path):  # e.g. <built-in>
-        for xfile in xfiles.findall('file'):
-            filename = xfile.get('filename')
-            if not re.match('^<', filename):  # e.g. <built-in>
                 if self.debug:
-                    print("\tcp %s %s" % (filename, output_dir))
+                    print("\tcp %s %s" % (path, output_dir))
-                copy2(filename, output_dir)
+                copy2(path, output_dir)
 
     def run_verilator(self, vargs):
         """Run Verilator command, check errors"""
@@ -60,8 +61,8 @@ class VlFileCopy:
             print("\t%s " % command)
         status = subprocess.call(command, shell=True)
         if status != 0:
-            raise Exception("Command failed running Verilator with '" +
+            raise RuntimeError("Command failed running Verilator with '" +
-                            command + "', stopped")
+                               command + "', stopped")
 
 
 #######################################################################
@@ -71,7 +72,7 @@ if __name__ == '__main__':
         allow_abbrev=False,
         formatter_class=argparse.RawTextHelpFormatter,
         description=
-        """Example of using Verilator XML output to copy a list of files to an
+        """Example of using Verilator JSON output to copy a list of files to an
 output directory (-odir, defaults to 'copied'), e.g. to easily create a
 tarball of the design to pass to others.
 

examples/json_py/vl_hier_graph

@@ -4,10 +4,10 @@
 ######################################################################
 
 import argparse
+import json
 import os
 import subprocess
-import tempfile
+from tempfile import NamedTemporaryFile
-import xml.etree.ElementTree as ET
 # from pprint import pprint, pformat
 
 #######################################################################
@@ -22,19 +22,23 @@ class VlHierGraph:
             output_filename='graph.dot'):  # output filename
         self.debug = debug
         self.next_vertex_number = 0
-        self.name_to_number = {}
+        self.addr_to_number = {}
 
-        with tempfile.NamedTemporaryFile() as xml_temp:
+        with NamedTemporaryFile() as tree_temp, NamedTemporaryFile(
+        ) as meta_temp:
             vargs = [
-                '--xml-output',
+                '--json-only-output',
-                xml_temp.name,
+                tree_temp.name,
+                '--json-only-meta-output',
+                meta_temp.name,
                 '--bbox-sys',  # Parse some stuff can't translate
                 '--bbox-unsup',
-                '--prefix vlxml'
+                '--prefix vljson'
-            ]  # So we know name of .xml output
+            ]
             vargs += verilator_args
             self.run_verilator(vargs)
-            self.tree = ET.parse(xml_temp.name)
+            self.tree = json.load(tree_temp)
+            self.meta = json.load(meta_temp)
 
         with open(output_filename, "w", encoding="utf8") as fh:
             # For more serious purposes, use the python graphviz package instead
@@ -46,31 +50,45 @@ class VlHierGraph:
             )
             fh.write("  edge [fontsize=6]")
             # Find cells
-            root = self.tree.getroot()
+            modules = self.flatten(self.tree, lambda n: n['type'] == "MODULE")
-            netlist = root.find('netlist')
+            top_module = True
-            for module in netlist.findall('module'):
+            for mod in modules:
                 # origNames are before parameterization, name if after
-                mod_name = module.get('name')
+                mod_number = self.addr_to_vertex_number(mod['addr'])
-                mod_number = self.name_to_vertex_number(mod_name)
+                fh.write("  n%d [label=\"%s\"" % (mod_number, mod['name']))
-                fh.write("  n%d [label=\"%s\"" % (mod_number, mod_name))
+                if top_module:
-                if module.get('topModule'):
                     fh.write(" color=\"red\" rank=1")
+                    top_module = False
                 fh.write("];\n")
 
-                for instance in module.findall('instance'):
+                cells = self.flatten(mod, lambda n: n['type'] == "CELL")
-                    inst_name = instance.get('name')
+                for cell in cells:
-                    def_name = instance.get('defName')
+                    def_number = self.addr_to_vertex_number(cell['modp'])
-                    def_number = self.name_to_vertex_number(def_name)
                     fh.write("  n%d->n%d [label=\"%s\"];\n" %
-                             (mod_number, def_number, inst_name))
+                             (mod_number, def_number, cell['name']))
 
             fh.write("}\n")
 
-    def name_to_vertex_number(self, name):
+    def flatten(self, node, accept_cb=lambda n: True):
-        if name not in self.name_to_number:
+        """Flatten tree to list using DFS.
+        accept_cb(node) should return True for nodes you want to save"""
+        arr = []
+        self.dfs(node, lambda n: accept_cb(n) and arr.append(n))
+        return arr
+
+    def dfs(self, node, node_cb):
+        """Traverse given tree using DFS and apply node_cb(node) on each one"""
+        node_cb(node)
+        for _, v in node.items():
+            if isinstance(v, list):  # childlist
+                for child in v:
+                    self.dfs(child, node_cb)
+
+    def addr_to_vertex_number(self, name):
+        if name not in self.addr_to_number:
             self.next_vertex_number += 1
-            self.name_to_number[name] = self.next_vertex_number
+            self.addr_to_number[name] = self.next_vertex_number
-        return self.name_to_number[name]
+        return self.addr_to_number[name]
 
     def run_verilator(self, vargs):
         """Run Verilator command, check errors"""
@@ -83,8 +101,8 @@ class VlHierGraph:
             print("\t%s " % command)
         status = subprocess.call(command, shell=True)
         if status != 0:
-            raise Exception("Command failed running Verilator with '" +
+            raise RuntimeError("Command failed running Verilator with '" +
-                            command + "', stopped")
+                               command + "', stopped")
 
 
 #######################################################################
@@ -94,7 +112,7 @@ if __name__ == '__main__':
         allow_abbrev=False,
         formatter_class=argparse.RawTextHelpFormatter,
         description=
-        """Example of using Verilator XML output to create a .dot file showing the
+        """Example of using Verilator JSON output to create a .dot file showing the
 design module hierarchy.
 
 Example usage:

examples/make_hello_c/sim_main.cpp

@@ -19,14 +19,14 @@ int main(int argc, char** argv) {
     // e.g. examples/c_tracing.
 
     // Construct a VerilatedContext to hold simulation time, etc.
-    VerilatedContext* contextp = new VerilatedContext;
+    VerilatedContext* const contextp = new VerilatedContext;
 
     // Pass arguments so Verilated code can see them, e.g. $value$plusargs
     // This needs to be called before you create any model
     contextp->commandArgs(argc, argv);
 
     // Construct the Verilated model, from Vtop.h generated from Verilating "top.v"
-    Vtop* top = new Vtop{contextp};
+    Vtop* const top = new Vtop{contextp};
 
     // Simulate until $finish
     while (!contextp->gotFinish()) {