Version bump

First half of #6301

.bake.toml

@@ -0,0 +1,30 @@
+# mbake configuration file
+
+[formatter]
+# Indentation settings
+use_tabs = true
+tab_width = 2
+
+# Spacing settings
+space_around_assignment = true
+space_before_colon = false
+space_after_colon = true
+
+# Line continuation settings
+normalize_line_continuations = true
+max_line_length = 100
+
+# PHONY settings
+group_phony_declarations = false
+phony_at_top = false
+auto_insert_phony_declarations = false
+
+# General settings
+remove_trailing_whitespace = true
+ensure_final_newline = true
+normalize_empty_lines = true
+max_consecutive_empty_lines = 2
+
+# Global settings
+debug = false
+verbose = false

.github/workflows/build.yml

@@ -12,13 +12,16 @@ on:
   schedule:
     - cron: '0 0 * * 0'  # weekly
 
+permissions:
+  contents: read
+
 defaults:
   run:
     shell: bash
     working-directory: repo
 
 concurrency:
-  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  group: ${{ github.workflow }}-${{ github.actor }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
   cancel-in-progress: true
 
 jobs:

.github/workflows/contributor.yml

@@ -7,10 +7,12 @@ on:
   push:
   pull_request:
   workflow_dispatch:
+permissions:
+  contents: read
 jobs:
   Test:
     name: "'docs/CONTRIBUTORS' was signed"
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
     steps:
       - uses: actions/checkout@v4
       - run: test_regress/t/t_dist_contributors.py

.github/workflows/coverage.yml

@@ -9,6 +9,9 @@ on:
   schedule:
     - cron: '0 0 * * 0'  # weekly
 
+permissions:
+  contents: read
+
 env:
   CI_OS_NAME: linux
   CI_COMMIT: ${{ github.sha }}
@@ -23,10 +26,12 @@ defaults:
 jobs:
 
   Build:
-    runs-on: ubuntu-22.04
+    # Only run scheduled jobs if explicitly enabled for that repo (e.g.: not on forks)
+    if: ${{ github.event_name != 'schedule' || vars.ENABLE_SCHEDULED_JOBS == 'true' }}
+    runs-on: ubuntu-24.04
     env:
       CI_BUILD_STAGE_NAME: build
-      CI_RUNS_ON: ubuntu-22.04
+      CI_RUNS_ON: ubuntu-24.04
     steps:
 
       - name: Checkout
@@ -59,11 +64,11 @@ jobs:
         num: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9]
         include:
           - {test: dist, num: ''}
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
     name: test-${{ matrix.test }}${{ matrix.num }}
     env:
       CI_BUILD_STAGE_NAME: test
-      CI_RUNS_ON: ubuntu-22.04
+      CI_RUNS_ON: ubuntu-24.04
     steps:
 
       - name: Download tar archive

.github/workflows/docker.yml

@@ -22,11 +22,14 @@ on:
         type: boolean
         default: false
 
+permissions:
+  contents: write
+
 jobs:
 
   build:
 
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
 
     strategy:
       matrix:

.github/workflows/format.yml

@@ -7,13 +7,15 @@ on:
   push:
   pull_request_target:
   workflow_dispatch:
+permissions:
+  contents: write
 jobs:
   format:
-    runs-on: ubuntu-22.04
-    name: Ubuntu 22.04 | format
+    runs-on: ubuntu-24.04
+    name: Ubuntu 24.04 | format
     env:
       CI_OS_NAME: linux
-      CI_RUNS_ON: ubuntu-22.04
+      CI_RUNS_ON: ubuntu-24.04
       CI_COMMIT: ${{ github.sha }}
     steps:
       - name: Checkout
@@ -25,14 +27,15 @@ jobs:
           CI_BUILD_STAGE_NAME: build
         run: |
           bash ci/ci-install.bash &&
-          sudo apt-get install clang-format-14 yapf3 &&
+          sudo apt-get install clang-format-18 yapf3 &&
+          sudo pip3 install gersemi mbake &&
           git config --global user.email "[email protected]" &&
           git config --global user.name "github action"
       - name: Format code
         run: |
           autoconf &&
           ./configure &&
-          make -j 2 format CLANGFORMAT=clang-format-14 &&
+          make -j 2 format CLANGFORMAT=clang-format-18 &&
           git status
       - name: Push
         run: |

.github/workflows/msbuild.yml

@@ -10,6 +10,8 @@ on:
   workflow_dispatch:
   schedule:
     - cron: 0 0 * * 0  # weekly
+permissions:
+  contents: read
 env:
   CI_OS_NAME: win
   CI_COMMIT: ${{ github.sha }}
@@ -20,12 +22,12 @@ defaults:
   run:
     working-directory: repo
 concurrency:
-  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  group: ${{ github.workflow }}-${{ github.actor }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
   cancel-in-progress: true
 jobs:
   windows:
     name: run on windows
-    runs-on: windows-latest
+    runs-on: windows-2025
     steps:
       - uses: actions/checkout@v4
         with:

.github/workflows/reusable-build.yml

@@ -1,6 +1,5 @@
 ---
 # DESCRIPTION: Github actions config
-# This name is key to badges in README.rst, so we use the name build
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 name: reusable-build

.github/workflows/reusable-rtlmeter-build.yml

@@ -1,6 +1,5 @@
 ---
 # DESCRIPTION: Github actions config
-# This name is key to badges in README.rst, so we use the name build
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 name: reusable-rtlmeter-build

.github/workflows/reusable-rtlmeter-run.yml

@@ -1,6 +1,5 @@
 ---
 # DESCRIPTION: Github actions config
-# This name is key to badges in README.rst, so we use the name build
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 name: reusable-rtlmeter-run
@@ -8,6 +7,10 @@ name: reusable-rtlmeter-run
 on:
   workflow_call:
     inputs:
+      tag:
+        description: "Unique identifier for storing results"
+        type: string
+        required: true
       runs-on:
         description: "Runner to use, e.g.: ubuntu-24.04"
         type: string
@@ -16,10 +19,17 @@ on:
         description: "Compiler to use: 'gcc' or 'clang'"
         type: string
         required: true
+      # Note: The combination of 'cases' and 'run-name' must be unique for all
+      # invocations of this workflow within a run of the parent workflow.
+      # These two are used together to generate a unique results file name.
       cases:
         description: "RTLMeter cases to run"
         type: string
         required: true
+      run-name:
+        description: "Run name (identifier) to add to collated results"
+        type: string
+        required: true
       compileArgs:
         description: "Additional Verilator command line arguments"
         type: string
@@ -84,7 +94,7 @@ jobs:
 
       - name: Execute cases
         working-directory: rtlmeter
-        continue-on-error: true # Do not fail on error, so we can at leat save the successful results
+        continue-on-error: true  # Do not fail on error, so we can at leat save the successful results
         run: |
           ./rtlmeter run --verbose --cases='${{ inputs.cases }}' --compileArgs='${{ inputs.compileArgs }}' --executeArgs='${{ inputs.executeArgs }}'
           # My YAML highlighter sucks, so I put this comment here wiht a phony closing quote mark to make it work: '
@@ -93,10 +103,10 @@ jobs:
         id: results
         working-directory: rtlmeter
         run: |
-          # 'inputs.cases' has special characters, use its md5sum as unique id
-          hash=$(md5sum <<< '${{ inputs.cases }}' | awk '{print $1}')
+          # Use 'inputs.cases' and 'inputs.run-name' to generate a unique file name
+          hash=$(md5sum <<< '${{ inputs.cases }} ${{ inputs.run-name }}' | awk '{print $1}')
           echo "hash=${hash}" >> $GITHUB_OUTPUT
-          ./rtlmeter collate > ../results-${hash}.json
+          ./rtlmeter collate --runName "${{ inputs.run-name }}"  > ../results-${hash}.json
 
       - name: Report results
         working-directory: rtlmeter
@@ -107,7 +117,7 @@ jobs:
         uses: actions/upload-artifact@v4
         with:
           path: results-${{ steps.results.outputs.hash }}.json
-          name: rtlmeter-results-${{ inputs.runs-on }}-${{ inputs.cc }}-${{ steps.results.outputs.hash }}
+          name: rtlmeter-results-${{ inputs.tag }}-${{ steps.results.outputs.hash }}
           overwrite: true
           retention-days: 2
 

.github/workflows/reusable-test.yml

@@ -1,9 +1,8 @@
 ---
 # DESCRIPTION: Github actions config
-# This name is key to badges in README.rst, so we use the name build
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-name: reusable-build
+name: reusable-test
 
 on:
   workflow_call:

.github/workflows/rtlmeter.yml

@@ -9,18 +9,45 @@ on:
   workflow_dispatch:
   schedule:
     - cron: '0 2 * * *'  # Daily, starting at 02:00 UTC
+  pull_request:
+    types:
+      - opened
+      - synchronize
+      - reopened
+      - labeled
+      - unlabeled
+
+permissions:
+  contents: read
 
 defaults:
   run:
     shell: bash
 
 concurrency:
-  group: RTLMeter
-  cancel-in-progress: false
+  group: ${{ github.ref }}
+  cancel-in-progress: ${{ github.event_name != 'schedule' }}
 
 jobs:
+  start:
+    name: Start
+    # Only run scheduled jobs if explicitly enabled for that repo (e.g.: not on forks)
+    # Only run pull request jobs if labelled as needing an RTLMeter run
+    # Always run workflow dispatch jobs
+    if: |
+      (github.event_name == 'schedule'
+        && vars.ENABLE_SCHEDULED_JOBS == 'true') ||
+      (github.event_name == 'pull_request'
+        && contains(github.event.pull_request.labels.*.name, 'pr: rtlmeter')) ||
+      (github.event_name == 'workflow_dispatch')
+    runs-on: ubuntu-24.04
+    steps:
+      - name: Startup
+        run: echo
+
   build-gcc:
     name: Build GCC
+    needs: start
     uses: ./.github/workflows/reusable-rtlmeter-build.yml
     with:
       runs-on: ubuntu-24.04
@@ -28,6 +55,7 @@ jobs:
 
   build-clang:
     name: Build Clang
+    needs: start
     uses: ./.github/workflows/reusable-rtlmeter-build.yml
     with:
       runs-on: ubuntu-24.04
@@ -38,21 +66,23 @@ jobs:
     needs: build-gcc
     uses: ./.github/workflows/reusable-rtlmeter-run.yml
     with:
+      tag: gcc
       runs-on: ubuntu-24.04
       cc: gcc
       cases: ${{ matrix.cases }}
+      run-name: "gcc"
       compileArgs: ""
       executeArgs: ""
     strategy:
       fail-fast: false
-      max-parallel: 2
+      max-parallel: ${{ github.event == 'schedule' && 2 || 7 }}
       matrix:
         cases:
           - "NVDLA:*"
           - "OpenPiton:1x1:*"
           - "OpenPiton:2x2:*"
           - "OpenPiton:4x4:*"
-          # - "OpenTitan:*"
+          - "OpenTitan:*"
           - "VeeR-EH1:asic*"
           - "VeeR-EH1:default*"
           - "VeeR-EH1:hiperf*"
@@ -64,10 +94,10 @@ jobs:
           - "VeeR-EL2:hiperf*"
           - "Vortex:mini:*"
           - "Vortex:sane:*"
-          # - "XiangShan:default-chisel3:* !*:linux"
-          # - "XiangShan:default-chisel6:* !*:linux"
+          - "XiangShan:default-chisel3:* !*:linux"
+          - "XiangShan:default-chisel6:* !*:linux"
           - "XiangShan:mini-chisel3:* !*:linux"
-          # - "XiangShan:mini-chisel6:* !*:linux"
+          - "XiangShan:mini-chisel6:* !*:linux"
           - "XuanTie-E902:*"
           - "XuanTie-E906:*"
           - "XuanTie-C906:*"
@@ -78,21 +108,23 @@ jobs:
     needs: build-clang
     uses: ./.github/workflows/reusable-rtlmeter-run.yml
     with:
+      tag: clang
       runs-on: ubuntu-24.04
       cc: clang
       cases: ${{ matrix.cases }}
+      run-name: "clang --threads 4"
       compileArgs: "--threads 4"
       executeArgs: ""
     strategy:
       fail-fast: false
-      max-parallel: 2
+      max-parallel: ${{ github.event == 'schedule' && 2 || 7 }}
       matrix:
         cases:
           - "NVDLA:*"
           - "OpenPiton:1x1:*"
           - "OpenPiton:2x2:*"
           - "OpenPiton:4x4:*"
-          # - "OpenTitan:*"
+          - "OpenTitan:*"
           - "VeeR-EH1:asic*"
           - "VeeR-EH1:default*"
           - "VeeR-EH1:hiperf*"
@@ -115,44 +147,176 @@ jobs:
 
   combine-results:
     name: Combine results
-    needs:
-      - run-gcc
-      - run-clang
-    if: ${{ always() }} # Run even if dependencies failed
+    needs: [run-gcc, run-clang]
+    # Run if any of the dependencies have run, even if failed.
+    # That is: do not run if all skipped, or the workflow was cancelled.
+    if: ${{ (contains(needs.*.result, 'success') || contains(needs.*.result, 'failure')) && !cancelled() }}
+    runs-on: ubuntu-24.04
+    strategy:
+      fail-fast: false
+      matrix:
+        tag:
+          - gcc
+          - clang
+    steps:
+      - name: Checkout RTLMeter
+        uses: actions/checkout@v4
+        with:
+          repository: "verilator/rtlmeter"
+          path: rtlmeter
+      - name: Setup RTLMeter venv
+        working-directory: rtlmeter
+        run: make venv
+      - name: Download all results
+        uses: actions/download-artifact@v4
+        with:
+          pattern: rtlmeter-results-${{ matrix.tag }}-*
+          path: all-results-${{ matrix.tag }}
+          merge-multiple: true
+      - name: Combine results
+        working-directory: rtlmeter
+        run: |
+          ./rtlmeter collate ../all-results-${{ matrix.tag }}/*.json > ../all-results-${{ matrix.tag }}.json
+      - name: Upload combined results
+        uses: actions/upload-artifact@v4
+        with:
+          path: all-results-${{ matrix.tag }}.json
+          name: all-results-${{ matrix.tag }}
+          overwrite: true
+          retention-days: 30
+
+  publish-scheduled-results:
+    name: Publish results to verilator/verilator-rtlmeter-results
+    needs: combine-results
+    # Only run on scheduled builds on the main repository. We also restrict
+    # the publishing to run only on the first run_attempt. This is required
+    # to prevent multiple uploads the same day (if rerunning), as the
+    # dashboard UI currently assumes there is only one data point per
+    # calendar day. Results from reruns can be imported manually if needed.
+    if: ${{ github.event_name == 'schedule' && github.repository == 'verilator/verilator' && github.run_attempt == 1 && contains(needs.*.result, 'success') && !cancelled() }}
     runs-on: ubuntu-24.04
     steps:
-      - name: Download all GCC results
+      - name: Download combined results
         uses: actions/download-artifact@v4
         with:
-          pattern: rtlmeter-results-ubuntu-24.04-gcc-*
-          path: all-results-gcc-${{ github.run_id }}
+          pattern: all-results-*
+          path: results
           merge-multiple: true
-      - name: Download all Clang results
-        uses: actions/download-artifact@v4
+      - name: Upload published results
+        uses: actions/upload-artifact@v4
         with:
-          pattern: rtlmeter-results-ubuntu-24.04-clang-*
-          path: all-results-clang-${{ github.run_id }}
-          merge-multiple: true
-      - name: Tar up results
+          path: results/*.json
+          name: published-results
+      # Pushing to verilator/verilator-rtlmeter-results requires elevated permissions
+      - name: Generate access token
+        id: generate-token
+        uses: actions/[email protected]
+        with:
+          app-id: ${{ vars.VERILATOR_CI_ID }}
+          private-key: ${{ secrets.VERILATOR_CI_KEY }}
+          owner: verilator
+          repositories: verilator-rtlmeter-results
+          permission-contents: write
+      - name: Checkout verilator-rtlmeter-results
+        uses: actions/checkout@v4
+        with:
+          repository: "verilator/verilator-rtlmeter-results"
+          token: ${{ steps.generate-token.outputs.token }}
+          path: verilator-rtlmeter-results
+      - name: Import results
+        id: import-results
+        working-directory: verilator-rtlmeter-results
         run: |
-          # Ensure combined result directories exists in case of no results
-          mkdir -p all-results-gcc-${{ github.run_id }}
-          mkdir -p all-results-clang-${{ github.run_id }}
-          ls -la all-results*
-          # Tar up each directory
-          tar --posix -c -z -f all-results-gcc-${{ github.run_id }}.tar.gz all-results-gcc-${{ github.run_id }}
-          tar --posix -c -z -f all-results-clang-${{ github.run_id }}.tar.gz all-results-clang-${{ github.run_id }}
-      - name: Upload combined GCC results
-        uses: actions/upload-artifact@v4
+          for f in $(find ../results -name "*.json"); do \
+            echo "Importing $f"; \
+            ./bin/add-rtlmeter-result $f; \
+          done
+          test -z "$(git status --porcelain)" || echo "valid=1" >> "$GITHUB_OUTPUT"
+      - name: Push to verilator-rtlmeter-results
+        if: ${{ steps.import-results.outputs.valid }}
+        working-directory: verilator-rtlmeter-results
+        run: |
+          git config --global user.email "[email protected]"
+          git config --global user.name "github action"
+          git add .
+          git commit -m "Verilator CI: Results of 'RTLMeter' workflow run #${{ github.run_number }}"
+          git push origin
+
+  #publish-pr-results:
+  #  name: Publish results to Pull Request
+  #  needs: combine-results
+  #  if: ${{ github.event_name == 'pull_request' && github.repository == 'verilator/verilator' && github.run_attempt == 1 && contains(needs.*.result, 'success') && !cancelled() }}
+  #  runs-on: ubuntu-24.04
+  #  steps:
+  #    - name: Checkout RTLMeter
+  #      uses: actions/checkout@v4
+  #      with:
+  #        repository: "verilator/rtlmeter"
+  #        path: rtlmeter
+  #    - name: Setup RTLMeter venv
+  #      working-directory: rtlmeter
+  #      run: make venv
+  #    - name: Download combined results
+  #      uses: actions/download-artifact@v4
+  #      with:
+  #        pattern: all-results-*
+  #        path: all-results
+  #        merge-multiple: true
+  #    - name: Get scheduled run info
+  #      id: scheduled-info
+  #      run:
+  #        IDLATEST=$(gh run list --workflow RTLMeter --event schedule --status success --limit 1 --json databaseId --jq ".[0].databaseId")
+  #        echo "id=$IDLATEST" >> $GITHUB_OUTPUT
+  #        URL=$(gh run view $IDLATEST --json url --jq ".url")
+  #        echo "url=$URL" >> $GITHUB_OUTPUT
+  #        NUM=$(gh run view $IDLATEST --json number --jq ".number")
+  #        echo "num=$NUM" >> $GITHUB_OUTPUT
+  #    # Fetching artifacts from different workflow requires elevated privilege
+  #    - name: Generate access token
+  #      id: generate-token
+  #      uses: actions/[email protected]
+  #      with:
+  #        app-id: ${{ vars.VERILATOR_CI_ID }}
+  #        private-key: ${{ secrets.VERILATOR_CI_KEY }}
+  #        owner: verilator
+  #        repositories: verilator
+  #        permission-actions: read
+  #    - name: Download scheduled run results
+  #      uses: actions/download-artifact@v4
+  #      with:
+  #        name: published-results
+  #        path: nightly-results
+  #        run-id: ${{ steps.schedueld-info.outputs.id }}
+  #        github-token: ${{ steps.generate-token.outputs.token }}
+  #    # TODO: diff and present
+
+  # Create GitHub issue for failed schedueld jobs
+  # This should always be the last job (we want an issue if anything breaks)
+  create-issue:
+    name: Create issue on failure
+    needs: publish-scheduled-results
+    if: ${{ github.event_name == 'schedule' && github.repository == 'verilator/verilator' && github.run_attempt == 1 && failure() && !cancelled() }}
+    runs-on: ubuntu-24.04
+    steps:
+      # Creating issues requires elevated privilege
+      - name: Generate access token
+        id: generate-token
+        uses: actions/[email protected]
         with:
-          path: all-results-gcc-${{ github.run_id }}.tar.gz
-          name: "all-results-gcc"
-          overwrite: true
-          retention-days: 30
-      - name: Upload combined Clang results
-        uses: actions/upload-artifact@v4
-        with:
-          path: all-results-clang-${{ github.run_id }}.tar.gz
-          name: "all-results-clang"
-          overwrite: true
-          retention-days: 30
+          app-id: ${{ vars.VERILATOR_CI_ID }}
+          private-key: ${{ secrets.VERILATOR_CI_KEY }}
+          owner: verilator
+          repositories: verilator
+          permission-issues: write
+      - name: Create issue
+        env:
+          GH_TOKEN: ${{ steps.generate-token.outputs.token }}
+        run: |
+          echo "This issue was created automatically by the GitHub Actions CI due to the failure of a scheduled RTLMeter run." >> body.txt
+          echo "" >> body.txt
+          echo "Workflow status: ${{ github.server_url }}/${{ github.repository }}/actions/runs/${{ github.run_id }}" >> body.txt
+          gh issue --repo ${{ github.repository }} create \
+            --title "RTLMeter run #${{ github.run_number }} Failed" \
+            --body-file body.txt \
+            --label new \
+            --assignee gezalore,wsnyder

CMakeLists.txt

@@ -16,7 +16,7 @@ cmake_minimum_required(VERSION 3.15)
 cmake_policy(SET CMP0091 NEW) # Use MSVC_RUNTIME_LIBRARY to select the runtime
 project(
     Verilator
-    VERSION 5.036
+    VERSION 5.040
     HOMEPAGE_URL https://verilator.org
     LANGUAGES CXX
 )

Changes

@@ -5,7 +5,206 @@ Revision History and Change Log
 ===============================
 
 The changes in each Verilator version are described below.  The
-contributors that suggested a given feature are shown in []. Thanks!
+contributors that suggested or implemented a given issue are shown in []. Thanks!
+
+
+Verilator 5.040 2025-08-30
+==========================
+
+**Other:**
+
+* Add ENUMITEMWIDTH error, and apply to X-extended and ranged values.
+* Add NOEFFECT warning, replacing previous `foreach` error.
+* Add SPECIFYIGN warning for specify constructs that were previously silently ignored.
+* Add PARAMNODEFAULT error, for parameters without defaults.
+* Add enum base data type, wire data type, and I/O versus data declaration checking per IEEE.
+* Add PROTOTYPEMIS error on missing and mismatching prototypes (#6206) (#6207). [Alex Solomatnikov]
+* Add error when trying to assign class object to variable of non-class types (#6237). [Igor Zaworski, Antmicro Ltd.]
+* Add ALWNEVER warning, for `always @*` that never execute (#6291).
+* Add separate coverage counters for toggles 0->1 and 1->0 (#6086). [Ryszard Rozak, Antmicro Ltd.]
+* Add error on class 'function static'.
+* Add error on force/release non-constant selects.
+* Add `-DVERILATOR=1` definition to compiler flags when using verilated.mk.
+* Support member-level triggers for virtual interfaces (#5166) (#6148). [Yilou Wang]
+* Support unassigned virtual interfaces (#5265) (#6245). [Szymon Gizler, Antmicro Ltd.]
+* Support randomization of scope variables with 'std::randomize()' (#5438) (#6185). [Yilou Wang]
+* Support disabling a fork in additional contexts (#5432 partial) (#6174) (#6183). [Ryszard Rozak, Antmicro Ltd.]
+* Support bit queue streaming (#5830) (#6103). [Paul Swirhun]
+* Support `$fread` with missing start (#6125). [Iztok Jeras]
+* Support unpacked array `with` methods (#6134).
+* Support Verilog real ports as SystemC double ports (#6136) (#6158). [George Polack]
+* Support `$countones` in constraints (#6144 partial) (#6235). [Ryszard Rozak, Antmicro Ltd.]
+* Support disable dotted references (#6154). [Ryszard Rozak, Antmicro Ltd.]
+* Support randomize() on class member selects (#6161) (#6195). [Igor Zaworski, Ryszard Rozak, Antmicro Ltd.]
+* Support multiple variables on RHS of a `force` assignment (#6163). [Artur Bieniek, Antmicro Ltd.]
+* Support covergroup extends, etc., as unsupported (#6160). [Artur Bieniek, Antmicro Ltd.]
+* Support parameter resolution of 1D unpacked array slices (#6257) (#6268). [Michael Bedford Taylor]
+* Support generic interfaces (#6272). [Igor Zaworski, Antmicro Ltd.]
+* Support disabling a fork from within that fork (#6314). [Ryszard Rozak, Antmicro Ltd.]
+* Support future sampled value functions.
+* Support simple disable within task (#6334). [Ryszard Rozak, Antmicro Ltd.]
+* Support recursive constant functions.
+* Change control file `public_flat_*` and other signal attributes to support __ in names (#6140).
+* Change runtime to exit() instead of abort(), unless under +verilated+debug.
+* Change `$display("%p")` to remove space after `}`.
+* Improve `--skip-identical` to skip on identical input file contents (#6109).
+* Improve testing on FreeBSD (#6328). [Aleksander Kiryk]
+* Optimize to return memory when using -build (#6192) (#6226). [Michael B. Taylor]
+* Optimize 2 ** X to 1 << X if base is signed (#6203). [Max Wipfli]
+* Optimize more complex combinational logic in DFG (#6205) (#6209) (#6298). [Geza Lore]
+* Optimize combinational cycles through arrays in DFG (#6210). [Geza Lore]
+* Optimize variable removal in scoped DFG (#6260). [Geza Lore]
+* Optimize acyclic DFG components into the original acyclic sub-graph. (#6261). [Geza Lore]
+* Optimize multiplexers in DFG synthesis (#6331). [Geza Lore]
+* Optimize interfaces in DFG (#6332). [Geza Lore]
+* Optimize logic in non-virtual interfaces with DFG (#6347). [Geza Lore]
+* Fix loop initialization visibility outside loop (#4237).
+* Fix constructor parameters in inheritance hierarchies (#6036) (#6070). [Petr Nohavica]
+* Fix replicate of negative giving 'REPLICATE has no expected width' internal error (#6048) (#6229).
+* Fix cmake `-Wno` compiler flag testing (#6145). [Martin Stadler]
+* Fix class extends dotted error (#6162). [Igor Zaworski, Antmicro Ltd.]
+* Fix genvar error with `-O0` (#6165). [Max Wipfli]
+* Fix uninitialized thread PGO counters (#6167). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix additional UNOPTFLAT combinational cycles automatically in DFG (#6168) (#6173) (#6176). [Geza Lore]
+* Fix omitting error when assigning to an input (#6169). [Artur Bieniek, Antmicro Ltd.]
+* Fix parameter-dependent type linking (#6170). [Igor Zaworski, Antmicro Ltd.]
+* Fix param-dependent class typedef linking (#6171). [Igor Zaworski, Antmicro Ltd.]
+* Fix virtual interface member propagation (#6175) (#6184). [Yilou Wang]
+* Fix `--coverage-expr` null pointer dereference (#6181). [Igor Zaworski, Antmicro Ltd.]
+* Fix conflicting function/class name linking error (#6182). [Igor Zaworski, Antmicro Ltd.]
+* Fix negate of wide structure selections (#6186).
+* Fix VPI signal range order (#6189) (#6200). [Ibrahim Burak Yorulmaz]
+* Fix structure select causing 'Wide Op' error (#6191). [Danny Oler]
+* Fix automatic task variables in unrolled loops with forks (#6194) (#6201). [Danny Oler]
+* Fix 'driver same component' assertion (#6211) (#6215). [Geza Lore]
+* Fix `--stats` overridden by skipping identical build (#6220). [Geza Lore]
+* Fix MODDUP with duplicate packages to take first package (#6222).
+* Fix replicate with unsigned count but MSB set (#6231) (#6233). [Geza Lore]
+* Fix randomize on function-local variable (#6234).
+* Fix queue typedef with unbounded slice (#6236).
+* Fix error when force assignment is used with ref function args (#6244). [Ryszard Rozak, Antmicro Ltd.]
+* Fix write of 0 in '%c' (#6248) (#6249). [Rodrigo Batista de Moraes]
+* Fix coverage of variables of complex types (#6250). [Ryszard Rozak, Antmicro Ltd.]
+* Fix broken support of unassigned virtual interfaces (#6253) (#6338). [Szymon Gizler, Antmicro Ltd.]
+* Fix partial DFG conversion of concat assignments (#6255). [Geza Lore]
+* Fix dynamic cast purity (#6267). [Igor Zaworski, Antmicro Ltd.]
+* Fix same variable on the RHS forced to two different LHSs. (#6269). [Artur Bieniek, Antmicro Ltd.]
+* Fix spurious VPI value change callbacks (#6274). [Todd Strader]
+* Fix stray ']' in Verilog code output for non-constant select (#6277). [Geza Lore]
+* Fix hierarchical NBAs (#6286) (#6300). [Geza Lore]
+* Fix variables hiding package imports (#6289). [Johan Wouters]
+* Fix DFG circular driver tracing. [Geza Lore]
+* Fix no matching function calls for randomized `VlWide` in unpacked and dynamic arrays (#6290). [Mateusz Gancarz, Antmicro Ltd.]
+* Fix PowerPC support (#6292). [Sergey Fedorov]
+* Fix referencing module variables above classes (#6304). [Artur Bieniek, Antmicro Ltd.]
+* Fix direct NBA to dynamically-sized variable (#6310). [Artur Bieniek, Antmicro Ltd.]
+* Fix static vars under member select (#6313). [Igor Zaworski, Antmicro Ltd.]
+* Fix expression type comparison (#6316). [Igor Zaworski, Antmicro Ltd.]
+* Fix of inline constraints with member selects  (#6321). [Igor Zaworski, Antmicro Ltd.]
+* Fix corner case bugs in module and variable inlining (#6322). [Geza Lore]
+* Fix queue extend to check bounds (#6324). [Aleksander Kiryk]
+* Fix gathering sensitivities from virtual interface members (#6325). [Aleksander Kiryk]
+* Fix FreeBSD missing headers (#6326). [Aleksander Kiryk]
+* Fix to select UDPs when they are the only candidate for a top module.
+* Fix splitting of assignments to SC variables (#6329) (#6336). [Geza Lore]
+* Fix to localize for super constructors with function calls as arguments (#6330). [Igor Zaworski, Antmicro Ltd.]
+* Fix wide select expansion and substitution (#6341) (#6345). [Geza Lore]
+* Fix upcasting class type parameters (#6344). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix undefined weak link for Apple GCC etc (#6348). [Congcong Cai]
+
+
+Verilator 5.038 2025-07-08
+==========================
+
+**Important:**
+
+* Change `--assert` to be the default; use `--no-assert` for legacy behavior and faster runtimes.
+
+**Other:**
+
+* Support redeclaring type as non-type; major parsing change (#2412) (#6020) (#6042) (#6044).
+* Support scoped `new` (#4199).
+* Support elaboration-time printing of unpacked array with `%p` (#4732).
+* Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
+* Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
+* Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
+* Support 1-bit params with -G and -pvalue (#6051) (#6082). [Paul Swirhun]
+* Support `specparam` (#5767) (#6142).
+* Support `$timeformat` with missing arguments (#6113). [Alex Solomatnikov]
+* Support non-overlapping blocking/non-blocking assignments (#6137). [Geza Lore]
+* Support parameter forward types.
+* Support constant functions with left-hand-side concatenates.
+* Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
+* Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
+* Add ternary operator into branch coverage (#5880). [Ryszard Rozak, Antmicro Ltd.]
+* Add aggregate type error checks (#5570) (#5950). [Shou-Li Hsu]
+* Add `--work` library-selection option (#5891 partial).
+* Add `--filter-type` to verilator_coverage (#6030). [Ryszard Rozak, Antmicro Ltd.]
+* Add `--hierarchical-threads` (#6037). [Bartłomiej Chmiel]
+* Add `MODMISSING` error, in place of unnamed error (#6054). [Paul Swirhun]
+* Add DFG binToOneHot pass to generate one-hot decoders (#6096). [Geza Lore]
+* Add hint of the signed right-hand-side in oversized replication error (#6098). [Peter Birch]
+* Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Improve memory usage for SenTrees in V3OrderProcessDomains (#6112). [Geza Lore]
+* Improve docker image size (#6139). [Tobias Rosenkranz, bitaggregat GmbH]
+* Update docker base image to Ubuntu 24.04 (#6147). [Tobias Rosenkranz, bitaggregat GmbH]
+* Optimize DFG De Morgan patterns (#6090). [Geza Lore]
+* Optimize DFG variable elimination (#6091). [Geza Lore]
+* Optimize DFG PUSH_SEL_THROUGH_CONCAT pattern (#6092). [Geza Lore]
+* Optimize DFG before V3Gate (#6141). [Geza Lore]
+* Optimize DFG peephole patterns (#6149). [Geza Lore]
+* Optimize constification within Expand and Subst stages (#6111). [Geza Lore]
+* Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025) (#6075). [Todd Strader]
+* Fix trace hierarchical-name runtime errors (#5668) (#6076). [Paul Swirhun]
+* Fix streaming operator packing order (#5903) (#6077). [Paul Swirhun]
+* Fix filename backslash escapes in C code (#5947).
+* Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
+* Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix constant propagation of post-expand stages (#5955) (#5963) (#5969) (#5972) (#5983).
+* Fix sign extension of signed compared with unsigned case items (#5968).
+* Fix always processes ignoring $finish (#5971). [Hennadii Chernyshchyk]
+* Fix method calls and new to access interface arrays (#5973). [Nick Brereton]
+* Fix streaming to/from packed arrays (#5976). [Geza Lore]
+* Fix segfault writing timestamp to VCD after buffer flush (#5978) (#5980). [Dominick Grochowina]
+* Fix inconsistent assignment error with split-var (#5984) (#5988). [Yutetsu TAKATSUKASA]
+* Fix AstAssignW conversion (#5991) (#5992). [Ryszard Rozak, Antmicro Ltd.]
+* Fix const-bit-op-tree with single-bit masks (#5993) (#5998). [Yutetsu TAKATSUKASA]
+* Fix arithmetic right-shift by constants over 32 bits (#5994). [Zhen Yan]
+* Fix array bounds checking with class member selects (#5996) (#5997). [Krzysztof Starecki]
+* Fix checking for too-wide divide and modulus (#6003) (#6006). [Zhen Yan]
+* Fix folding of LteS in DfgPeephole (#6000) (#6004). [Geza Lore]
+* Fix slicing of AstExprStmt nodes (#6005). [Ryszard Rozak, Antmicro Ltd.]
+* Fix skipped generate blocks in toggle coverage (#6010). [Ryszard Rozak, Antmicro Ltd.]
+* Fix arithmetic left-shift by constants over 32 bits (#6007) (#6015). [Zhen Yan]
+* Fix concatenation and type casting (#6012) (#6013). [Todd Strader]
+* Fix wrong optimization result of shifted out variable (#6016) (#6019). [Yutetsu TAKATSUKASA]
+* Fix missing FreeBSD include (#6027) (#6028). [Joel Bodenmann]
+* Fix associative arrays with enum keys (#6034) (#6035). [Petr Nohavica]
+* Fix GCC 10 read-only linker error (#6040). [Todd Strader]
+* Fix WIDTHCONCAT on packed pattern assignment (#6045). [Dan Petrisko]
+* Fix type operator for interface signals (#6049) (#6050). [Todd Strader]
+* Fix V3OrderParallel scoring contraction hang (#6052). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix virtual interface array typedef expressions (#6057).
+* Fix DFG peephole select conditionals (#6064) (#6071). [Geza Lore]
+* Fix `--skip-identical` skipping on some errors (#6066). [Todd Strader]
+* Fix class typedef elaboration (#6080). [Kamil Rakoczy, Antmicro Ltd.]
+* Fix unpacked to packed parameter assignment (#6081) (#6088). [Todd Strader]
+* Fix casting reals to large integrals (#6085). [Todd Strader]
+* Fix nested hier blocks workers error (#6087). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix `--lib-create` with double-underscore (#6099).
+* Fix DFG binToOneHot table index missing driver (#6100). [Geza Lore]
+* Fix decoding octal string escapes with 1-2 digits (#6108).
+* Fix colon-divide operator without space (#6121). [Alex Solomatnikov]
+* Fix variables declared in fork after taskify (#6126). [Kamil Rakoczy, Antmicro Ltd.]
+* Fix method calls without parenthesis (#6127). [Alex Solomatnikov]
+* Fix `pre_randomize`/`post_randomize` when no randomize (#6128). [Alex Solomatnikov]
+* Fix wide non-blocking assignment mis-optimization (#6150) (#6152) (#6155). [Todd Strader]
+* Fix interface array connections with non-zero low declaration index.
+* Fix developer build error on MacOS/Flex2.6.4 (#6153). [Paul Swirhun]
+* Fix crash with --dumpi-V3LinkDot without --debug (#6159). [Igor Zaworski, Antmicro Ltd.]
+* Fix dereferencing stale iterator in DfgVertex::scopep() (#6225) (#6227). [Geza Lore]
+* Fix component numbers of new Vertices in V3DfgBreakCycles (#6225) (#6228). [Geza Lore]
 
 
 Verilator 5.036 2025-04-27
@@ -16,7 +215,7 @@ Verilator 5.036 2025-04-27
 * Change `--output-groups` to default to value of `--build-jobs` (#5751).
   Those using build farms may need to now use `--output-groups 0` or otherwise.
 * Support user-defined primitives (UDPs) (#468) (#5807) (#5936). [Zhou Shen, Krzysztof Sychla, et al]
-* Add `--trace-saif` for SAIF power traces (#5812) (#5914). [Mateusz Gancarz]
+* Add `--trace-saif` for SAIF power traces (#5812) (#5914). [Mateusz Gancarz, Antmicro Ltd.]
 
 **Other:**
 
@@ -744,7 +943,7 @@ Verilator 5.016 2023-09-16
 * Fix nested assignments on the LHS (#4435). [Ryszard Rozak, Antmicro Ltd]
 * Fix false MULTITOP on bound interfaces (#4438). [Alex Solomatnikov]
 * Fix internal error on real conversion (#4447). [vdhotre-ventana]
-* Fix lifetime unknown error on enum.name (#4448). [jwoutersymatra]
+* Fix lifetime unknown error on enum.name (#4448). [Johan Wouters]
 * Fix unstable output of VHashSha256 (#4453). [Anthony Donlon]
 * Fix static cast from a stream type (#4469) (#4485). [Ryszard Rozak, Antmicro Ltd]
 * Fix error on enum with VARHIDDEN of cell (#4482). [Michail Rontionov]

Makefile.in

@@ -104,45 +104,45 @@ PACKAGE_VERSION = @PACKAGE_VERSION@
 SHELL = /bin/sh
 
 SUBDIRS = docs src test_regress \
-	examples/cmake_hello_c \
-	examples/cmake_hello_sc \
-	examples/cmake_tracing_c \
-	examples/cmake_tracing_sc \
-	examples/cmake_protect_lib \
-	examples/make_hello_binary \
-	examples/make_hello_c \
-	examples/make_hello_sc \
-	examples/make_tracing_c \
-	examples/make_tracing_sc \
-	examples/make_protect_lib \
-	examples/json_py \
+  examples/cmake_hello_c \
+  examples/cmake_hello_sc \
+  examples/cmake_tracing_c \
+  examples/cmake_tracing_sc \
+  examples/cmake_protect_lib \
+  examples/make_hello_binary \
+  examples/make_hello_c \
+  examples/make_hello_sc \
+  examples/make_tracing_c \
+  examples/make_tracing_sc \
+  examples/make_protect_lib \
+  examples/json_py \
 
 INFOS = verilator.html verilator.pdf
 
 INFOS_OLD = README README.html README.pdf
 
 EXAMPLES_FIRST = \
-	examples/make_hello_c \
-	examples/make_hello_sc \
+  examples/make_hello_c \
+  examples/make_hello_sc \
 
 EXAMPLES = $(EXAMPLES_FIRST) $(filter-out $(EXAMPLES_FIRST), $(sort $(wildcard examples/*)))
 
 # See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 # No verilator_ccache_report.1, verilator_difftree.1 as those are not bin/ installed
 VL_INST_MAN_FILES = \
-	verilator.1 \
-	verilator_coverage.1 \
-	verilator_gantt.1 \
-	verilator_profcfunc.1 \
+  verilator.1 \
+  verilator_coverage.1 \
+  verilator_gantt.1 \
+  verilator_profcfunc.1 \
 
 default: all
 all: all_nomsg msg_test
 all_nomsg: verilator_exe $(VL_INST_MAN_FILES)
 
-.PHONY:verilator_exe
-.PHONY:verilator_bin$(EXEEXT)
-.PHONY:verilator_bin_dbg$(EXEEXT)
-.PHONY:verilator_coverage_bin_dbg$(EXEEXT)
+.PHONY: verilator_exe
+.PHONY: verilator_bin$(EXEEXT)
+.PHONY: verilator_bin_dbg$(EXEEXT)
+.PHONY: verilator_coverage_bin_dbg$(EXEEXT)
 verilator_exe verilator_bin$(EXEEXT) verilator_bin_dbg$(EXEEXT) verilator_coverage_bin_dbg$(EXEEXT):
 	@echo ------------------------------------------------------------
 	@echo "making verilator in src"
@@ -151,7 +151,7 @@ verilator_exe verilator_bin$(EXEEXT) verilator_bin_dbg$(EXEEXT) verilator_covera
 ######################################################################
 # Tests
 
-.PHONY:msg_test
+.PHONY: msg_test
 msg_test: all_nomsg
 	@echo "Build complete!"
 	@echo
@@ -213,8 +213,8 @@ verilator.html:
 verilator.pdf: Makefile
 	$(MAKE) -C docs verilator.pdf
 
-TAGFILES=${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/*.in \
-	${srcdir}/*.in ${srcdir}/*.pod
+TAGFILES = ${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/*.in \
+  ${srcdir}/*.in ${srcdir}/*.pod
 
 TAGS: $(TAGFILES)
 	etags $(TAGFILES)
@@ -224,42 +224,49 @@ TAGS: $(TAGFILES)
 doxygen:
 	$(MAKE) -C docs doxygen
 
+.PHONY: spelling
+spelling:
+	$(MAKE) -C docs spelling
+
 ######################################################################
 # Install
 
 # Public executables intended to be invoked directly by the user
 # Don't put wildcards in these variables, it might cause an uninstall of other stuff
-VL_INST_PUBLIC_SCRIPT_FILES = verilator \
-                              verilator_coverage \
-                              verilator_gantt \
-                              verilator_profcfunc \
+VL_INST_PUBLIC_SCRIPT_FILES = \
+  verilator \
+  verilator_coverage \
+  verilator_gantt \
+  verilator_profcfunc \
 
-VL_INST_PUBLIC_BIN_FILES = verilator_bin$(EXEEXT) \
-                           verilator_bin_dbg$(EXEEXT) \
-                           verilator_coverage_bin_dbg$(EXEEXT) \
+VL_INST_PUBLIC_BIN_FILES = \
+  verilator_bin$(EXEEXT) \
+  verilator_bin_dbg$(EXEEXT) \
+  verilator_coverage_bin_dbg$(EXEEXT) \
 
 # Private executabels intended to be invoked by internals
 # Don't put wildcards in these variables, it might cause an uninstall of other stuff
-VL_INST_PRIVATE_SCRIPT_FILES = verilator_ccache_report \
-                               verilator_includer \
+VL_INST_PRIVATE_SCRIPT_FILES = \
+  verilator_ccache_report \
+  verilator_includer \
 
 VL_INST_INC_BLDDIR_FILES = \
-	include/verilated_config.h \
-	include/verilated.mk \
+  include/verilated_config.h \
+  include/verilated.mk \
 
 # Files under srcdir, instead of build time
 VL_INST_INC_SRCDIR_FILES = \
-	include/*.[chv]* \
-	include/*.vlt \
-	include/*.sv \
-	include/gtkwave/*.[chv]* \
-	include/vltstd/*.[chv]* \
+  include/*.[chv]* \
+  include/*.vlt \
+  include/*.sv \
+  include/gtkwave/*.[chv]* \
+  include/vltstd/*.[chv]* \
 
 VL_INST_DATA_SRCDIR_FILES = \
-	examples/*/*.[chv]* \
-	examples/*/CMakeLists.txt \
-	examples/*/Makefile* \
-	examples/*/vl_* \
+  examples/*/*.[chv]* \
+  examples/*/CMakeLists.txt \
+  examples/*/Makefile* \
+  examples/*/vl_* \
 
 mkbindirs:
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/bin
@@ -385,55 +392,55 @@ install-msg:
 ######################################################################
 # Format/Lint
 
-# Use --xml flag to see the cppcheck code to use for suppression
-CPPCHECK1_CPP = $(wildcard $(srcdir)/include/*.cpp)
-CPPCHECK2_CPP = $(wildcard $(srcdir)/examples/*/*.cpp)
-CPPCHECK3_CPP = $(wildcard $(srcdir)/src/Vlc*.cpp)
-CPPCHECK4_CPP = $(wildcard $(srcdir)/src/V3[A-D]*.cpp $(srcdir)/src/Verilator*.cpp)
-CPPCHECK5_CPP = $(wildcard $(srcdir)/src/V3[E-I]*.cpp)
-CPPCHECK6_CPP = $(wildcard $(srcdir)/src/V3[P-Z]*.cpp)
-CPPCHECK7_CPP = $(wildcard $(srcdir)/src/V3[L-R]*.cpp)
-CPPCHECK8_CPP = $(wildcard $(srcdir)/src/V3[S-Z]*.cpp)
-CHECK_CPP = $(CPPCHECK1_CPP) $(CPPCHECK2_CPP) $(CPPCHECK3_CPP) $(CPPCHECK4_CPP) \
-	$(CPPCHECK5_CPP) $(CPPCHECK6_CPP) $(CPPCHECK7_CPP) $(CPPCHECK8_CPP)
+CPPCHECK_VERILATOR_CPP = $(wildcard $(srcdir)/src/V3*.cpp $(srcdir)/src/Verilator*.cpp)
+CPPCHECK_RUNTIME_CPP = $(wildcard $(srcdir)/include/*.cpp)
+CPPCHECK_VLC_CPP = $(wildcard $(srcdir)/src/Vlc*.cpp)
+CPPCHECK_EXAMPLES_CPP = $(wildcard $(srcdir)/examples/*/*.cpp)
+CHECK_CPP = $(CPPCHECK_VERILATOR_CPP) $(CPPCHECK_RUNTIME_CPP) $(CPPCHECK_VLC_CPP) $(CPPCHECK_EXAMPLES_CPP)
 CHECK_H = $(wildcard \
-	$(srcdir)/include/*.h \
-	$(srcdir)/src/*.h )
+  $(srcdir)/include/*.h \
+  $(srcdir)/src/*.h )
 CHECK_YL = $(wildcard \
-	$(srcdir)/src/*.y \
-	$(srcdir)/src/*.l )
-CPPCHECK = src/cppcheck_filtered cppcheck
-CPPCHECK_FLAGS = --enable=all --inline-suppr \
-	--suppress=cstyleCast --suppress=useInitializationList \
-	--suppress=nullPointer --suppress=nullPointerRedundantCheck --suppress=ctunullpointer \
-	--suppress=unusedFunction --suppress=unusedScopedObject \
-	--suppress=useStlAlgorithm
-CPPCHECK_FLAGS += --xml
-CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CHECK_CPP))
-CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/include/gtkwave -I$(srcdir)/include/vltstd -I$(srcdir)/src/obj_dbg -I$(srcdir)/src
+  $(srcdir)/src/*.y \
+  $(srcdir)/src/*.l )
+CPPCHECK = cppcheck
+CPPCHECK_JOBS = $(shell nproc)
+CPPCHECK_CACHE = $(srcdir)/src/obj_dbg/cppcheck-cache
+CPPCHECK_FLAGS = --enable=all
+CPPCHECK_FLAGS += --inline-suppr
+CPPCHECK_FLAGS += --suppressions-list=$(srcdir)/src/cppcheck-suppressions.txt
+CPPCHECK_FLAGS += --cppcheck-build-dir=$(CPPCHECK_CACHE)
+CPPCHECK_FLAGS += -DVL_DEBUG=1 -DVL_CPPCHECK=1 -DINFILTER_PIPE=1 -D__GNUC__=1
+CPPCHECK_FLAGS += -j$(CPPCHECK_JOBS)
+CPPCHECK_INC = -I$(srcdir)/include
+CPPCHECK_INC += -I$(srcdir)/include/gtkwave
+CPPCHECK_INC += -I$(srcdir)/include/vltstd
+CPPCHECK_INC += -I$(srcdir)/src/obj_dbg
+CPPCHECK_INC += -I$(srcdir)/src
 
-cppcheck: cppcheck-1 cppcheck-2 cppcheck-3 cppcheck-4 cppcheck-5 cppcheck-6 cppcheck-7 cppcheck-8
-cppcheck-1:
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK1_CPP)
-cppcheck-2:
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK2_CPP)
-cppcheck-3:
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK3_CPP)
-cppcheck-4:
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK4_CPP)
-cppcheck-5:
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK5_CPP)
-cppcheck-6:
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK6_CPP)
-cppcheck-7:
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK7_CPP)
-cppcheck-8:
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $(CPPCHECK8_CPP)
+$(CPPCHECK_CACHE): $(CHECK_CPP) $(CHECK_H) $(CHECK_YL)
+	/bin/rm -rf $@
+	/bin/mkdir -p $@
+
+cppcheck-verilator: | $(CPPCHECK_CACHE)
+	$(CPPCHECK) $(CPPCHECK_FLAGS) $(CPPCHECK_INC) $(CPPCHECK_VERILATOR_CPP)
+cppcheck-runtime: | $(CPPCHECK_CACHE)
+	$(CPPCHECK) $(CPPCHECK_FLAGS) $(CPPCHECK_INC) $(CPPCHECK_RUNTIME_CPP)
+cppcheck-vlc: | $(CPPCHECK_CACHE)
+	$(CPPCHECK) $(CPPCHECK_FLAGS) $(CPPCHECK_INC) $(CPPCHECK_VLC_CPP)
+cppcheck-examples: | $(CPPCHECK_CACHE)
+	$(CPPCHECK) $(CPPCHECK_FLAGS) $(CPPCHECK_INC) $(CPPCHECK_EXAMPLES_CPP)
+
+cppcheck:
+	$(MAKE) cppcheck-vlc
+	$(MAKE) cppcheck-examples
+	$(MAKE) cppcheck-runtime
+	$(MAKE) cppcheck-verilator
 
 CLANGTIDY = clang-tidy
 CLANGTIDY_FLAGS = -config='' \
-	-header-filter='.*' \
-	-checks='-fuchsia-*,-cppcoreguidelines-avoid-c-arrays,-cppcoreguidelines-init-variables,-cppcoreguidelines-avoid-goto,-modernize-avoid-c-arrays,-readability-magic-numbers,-readability-simplify-boolean-expr,-cppcoreguidelines-macro-usage' \
+  -header-filter='.*' \
+  -checks='-fuchsia-*,-cppcoreguidelines-avoid-c-arrays,-cppcoreguidelines-init-variables,-cppcoreguidelines-avoid-goto,-modernize-avoid-c-arrays,-readability-magic-numbers,-readability-simplify-boolean-expr,-cppcoreguidelines-macro-usage' \
 
 CLANGTIDY_DEP = $(subst .cpp,.cpp.tidy,$(CHECK_CPP))
 CLANGTIDY_DEFS = -DVL_DEBUG=1 -DVL_CPPCHECK=1
@@ -453,15 +460,16 @@ analyzer-include:
 	scan-build $(MAKE) -k examples
 
 format:
-	$(MAKE) -j 4 format-c format-py format-exec
+	$(MAKE) -j 5 format-c format-cmake format-exec format-py
 
-CLANGFORMAT = clang-format-14
+CLANGFORMAT = clang-format-18
 CLANGFORMAT_FLAGS = -i
 CLANGFORMAT_FILES = $(CHECK_CPP) $(CHECK_H) $(CHECK_YL) test_regress/t/*.c* test_regress/t/*.h
 
 format-c clang-format:
-	@$(CLANGFORMAT) --version | egrep 14.0 > /dev/null \
-		|| echo "*** You are not using clang-format-14, indents may differ from master's ***"
+	$(CLANGFORMAT) --version
+	@$(CLANGFORMAT) --version | fgrep 'version 18' > /dev/null \
+	|| echo "*** You are not using clang-format-18, indents may differ from master's ***"
 	$(CLANGFORMAT) $(CLANGFORMAT_FLAGS) $(CLANGFORMAT_FILES)
 
 YAMLFIX = YAMLFIX_WHITELINES=1 YAMLFIX_LINE_LENGTH=130 YAMLFIX_preserve_quotes=true yamlfix
@@ -471,63 +479,77 @@ yamlfix:
 
 # CMake files
 CMAKE_FILES = \
-	CMakeLists.txt \
-	examples/*/CMakeLists.txt \
-	src/CMakeLists.txt \
-	test_regress/CMakeLists.txt \
-	*.cmake.in \
+  CMakeLists.txt \
+  examples/*/CMakeLists.txt \
+  src/CMakeLists.txt \
+  test_regress/CMakeLists.txt \
+  *.cmake.in \
+
+# Makefiles
+MAKE_FILES = \
+  Makefile*.in \
+  docs/Makefile* \
+  include/verilated.mk.in \
+  examples/*/Makefile* \
+  src/Makefile*.in \
+  test_regress/Makefile* \
 
 # Python programs, subject to format and lint
 PY_PROGRAMS = \
-	bin/verilator_ccache_report \
-	bin/verilator_difftree \
-	bin/verilator_gantt \
-	bin/verilator_includer \
-	bin/verilator_profcfunc \
-	examples/json_py/vl_file_copy \
-	examples/json_py/vl_hier_graph \
-	docs/guide/conf.py \
-	docs/bin/vl_sphinx_extract \
-	docs/bin/vl_sphinx_fix \
-	src/astgen \
-	src/bisonpre \
-	src/config_rev \
-	src/cppcheck_filtered \
-	src/flexfix \
-	src/vlcovgen \
-	src/.gdbinit.py \
-	test_regress/*.py \
-	test_regress/t/*.pf \
-	nodist/clang_check_attributes \
-	nodist/code_coverage \
-	nodist/dot_importer \
-	nodist/fuzzer/actual_fail \
-	nodist/fuzzer/generate_dictionary \
-	nodist/install_test \
-	nodist/log_changes \
+  bin/verilator_ccache_report \
+  bin/verilator_difftree \
+  bin/verilator_gantt \
+  bin/verilator_includer \
+  bin/verilator_profcfunc \
+  examples/json_py/vl_file_copy \
+  examples/json_py/vl_hier_graph \
+  docs/guide/conf.py \
+  docs/bin/vl_sphinx_extract \
+  docs/bin/vl_sphinx_fix \
+  src/astgen \
+  src/bisonpre \
+  src/config_rev \
+  src/flexfix \
+  src/vlcovgen \
+  src/.gdbinit.py \
+  test_regress/*.py \
+  test_regress/t/*.pf \
+  nodist/clang_check_attributes \
+  nodist/code_coverage \
+  nodist/dot_importer \
+  nodist/fuzzer/actual_fail \
+  nodist/fuzzer/generate_dictionary \
+  nodist/install_test \
+  nodist/log_changes \
 
 # Python files, subject to format but not lint
 PY_FILES = \
-	$(PY_PROGRAMS) \
-	nodist/code_coverage.dat \
-	test_regress/t/*.py \
+  $(PY_PROGRAMS) \
+  nodist/code_coverage.dat \
+  test_regress/t/*.py \
 
 # Python files, test_regress tests
-PY_TEST_FILES = \
-	test_regress/t/*.py \
+PY_TEST_FILES = test_regress/t/*.py
 
 YAPF = yapf3
 YAPF_FLAGS = -i --parallel
 
 format-py yapf:
+	$(YAPF) --version
 	$(YAPF) $(YAPF_FLAGS) $(PY_FILES)
 
 GERSEMI = gersemi
-GERSEMI_FLAGS = -i
+GERSEMI_FLAGS = -i --no-warn-about-unknown-commands
 
 format-cmake:
 	$(GERSEMI) $(GERSEMI_FLAGS) $(CMAKE_FILES)
 
+MBAKE = mbake
+MBAKE_FLAGS = format --config ./.bake.toml
+
+format-make:
+	$(MBAKE) $(MBAKE_FLAGS) $(MAKE_FILES)
+
 format-yaml: yamlfix
 
 PYLINT = pylint

README.rst

@@ -1,7 +1,7 @@
 .. Github doesn't render images unless absolute URL
 .. Do not know of a conditional tag, "only: github" nor "github display" works
 
-|badge1| |badge2| |badge3| |badge4| |badge5| |badge7|
+|badge1| |badge2| |badge3| |badge4| |badge5| |badge7| |badge8|
 
 .. |badge1| image:: https://img.shields.io/badge/Website-Verilator.org-181717.svg
     :target: https://verilator.org
@@ -15,6 +15,8 @@
     :target: https://hub.docker.com/r/verilator/verilator
 .. |badge7| image:: https://github.com/verilator/verilator/workflows/build/badge.svg
     :target: https://github.com/verilator/verilator/actions?query=workflow%3Abuild
+.. |badge8| image:: https://img.shields.io/github/actions/workflow/status/verilator/verilator/rtlmeter.yml?branch=master&event=schedule&label=benchmarks
+    :target: https://verilator.github.io/verilator-rtlmeter-results
 
 
 Welcome to Verilator
@@ -129,7 +131,7 @@ organizations; please see `Verilator Commercial Support
 Related Projects
 ================
 
-- `GTKwave <http://gtkwave.sourceforge.net/>`_ - Waveform viewer for
+- `GTKwave <https://gtkwave.sourceforge.net/>`_ - Waveform viewer for
   Verilator traces.
 
 - `Icarus Verilog`_ - Icarus is a highly-featured interpreted Verilog

bin/verilator

@@ -130,7 +130,7 @@ if ($opt_gdb) {
 } elsif ($opt_valgrind) {
     # Run under valgrind
     my $valgrind_bin = ($ENV{VERILATOR_VALGRIND} || "valgrind --error-exitcode=1 --max-stackframe=2815880"
-        # Magic number sugested by valgrind, may need to be increased in future
+        # Magic number suggested by Valgrind, may need to be increased in future
         # if you get warnings. See: https://valgrind.org/docs/manual/manual-core.html#opt.max-stackframe
         );
 
@@ -311,8 +311,8 @@ detailed descriptions of these arguments.
      +1800-2012ext+<ext>        Use SystemVerilog 2012 with file extension <ext>
      +1800-2017ext+<ext>        Use SystemVerilog 2017 with file extension <ext>
      +1800-2023ext+<ext>        Use SystemVerilog 2023 with file extension <ext>
-    --assert                    Enable all assertions
-    --assert-case               Enable unique/unique0/priority case related checks
+    --no-assert                 Disable all assertions
+    --no-assert-case            Disable unique/unique0/priority-case assertions
     --autoflush                 Flush streams after all $displays
     --bbox-sys                  Blackbox unknown $system calls
     --bbox-unsup                Blackbox unsupported language features
@@ -345,6 +345,8 @@ detailed descriptions of these arguments.
     --decorations <level>       Set output comment and spacing level
     --default-language <lang>   Default language to parse
      +define+<var>=<value>      Set preprocessor define
+    --diagnostics-sarif         Enable SARIF diagnostics output
+    --diagnostics-sarif-output <filename>  Set SARIF diagnostics output file
     --dpi-hdr-only              Only produce the DPI header file
     --dump-<srcfile>            Enable dumping everything in source file
     --dump-defines              Show preprocessor defines with -E
@@ -381,6 +383,7 @@ detailed descriptions of these arguments.
     --help                      Show this help
     --hierarchical              Enable hierarchical Verilation
     --hierarchical-params-file <name> Internal option that specifies parameters file for hier blocks
+    --hierarchical-threads <threads>  Number of threads for hierarchical scheduling
      -I<dir>                    Directory to search for includes
     --if-depth <value>          Tune IFDEPTH warning
      +incdir+<dir>              Directory to search for includes
@@ -388,10 +391,10 @@ detailed descriptions of these arguments.
     --instr-count-dpi <value>   Assumed dynamic instruction count of DPI imports
      -j <jobs>                  Parallelism for --build-jobs/--verilate-jobs
     --no-json-edit-nums         Don't dump editNum in .tree.json files
-    --no-json-ids               Don't use short identifiers instead of adresses/paths in .tree.json
+    --no-json-ids               Don't use short identifiers instead of addresses/paths in .tree.json
     --json-only                 Create JSON parser output (.tree.json and .meta.json)
-    --json-only-meta-output     .tree.meta.json output filename
-    --json-only-output          .tree.json output filename
+    --json-only-meta-output <filename>  Set .tree.meta.json output filename
+    --json-only-output <filename>       Set .tree.json output filename
     --l2-name <value>           Verilog scope name of the top module
     --language <lang>           Default language standard to parse
      -LDFLAGS <flags>           Linker pre-object arguments for makefile
@@ -448,7 +451,7 @@ detailed descriptions of these arguments.
     --quiet-exit                Don't print the command on failure
     --quiet-stats               Don't print statistics
     --relative-includes         Resolve includes relative to current file
-    --reloop-limit              Minimum iterations for forming loops
+    --reloop-limit <value>      Minimum iterations for forming loops
     --report-unoptflat          Extra diagnostics for UNOPTFLAT
     --rr                        Run Verilator and record with rr
     --runtime-debug             Enable model runtime debugging
@@ -510,6 +513,7 @@ detailed descriptions of these arguments.
      -Wno-fatal                 Disable fatal exit on warnings
      -Wno-lint                  Disable all lint warnings
      -Wno-style                 Disable all style warnings
+     -work <libname>            Set config library for following files
      -Wpedantic                 Warn on compliance-test issues
      -Wwarn-<message>           Enable specified warning message
      -Wwarn-lint                Enable lint warning message

bin/verilator_coverage

@@ -170,6 +170,7 @@ L<https://verilator.org/guide/latest/exe_verilator_coverage.html>.
     --annotate-all                All files should be shown.
     --annotate-min <count>        Minimum occurrence count for uncovered.
     --annotate-points             Annotates info from each coverage point.
+    --filter-type <regex>         Keep only records of given coverage type.
     --help                        Displays this message and version and exits.
     --rank                        Compute relative importance of tests.
     --unlink                      With --write, unlink all inputs

bin/verilator_gantt

@@ -238,6 +238,7 @@ def report_mtasks():
     thread_mtask_time = collections.defaultdict(lambda: 0)
     long_mtask_time = 0
     long_mtask = None
+    long_mtask_hier_block = None
     predict_mtask_time = 0
     predict_elapsed = 0
     for (hier_block, mtask_id) in Mtasks:
@@ -279,6 +280,9 @@ def report_mtasks():
     max_p2e = -1000000
     max_mtask = None
 
+    min_hier_block = None
+    max_hier_block = None
+
     for (hier_block, mtask_id) in sorted(Mtasks.keys()):
         mtask = Mtasks[(hier_block, mtask_id)]
         if mtask['elapsed'] > 0:
@@ -613,7 +617,7 @@ SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0""")
 
 parser.add_argument('--debug', action='store_true', help='enable debug')
 parser.add_argument('--no-vcd', help='disable creating vcd', action='store_true')
-parser.add_argument('--vcd', help='filename for vcd outpue', default='profile_exec.vcd')
+parser.add_argument('--vcd', help='filename for vcd output', default='profile_exec.vcd')
 parser.add_argument('filename',
                     help='input profile_exec.dat filename to process',
                     default='profile_exec.dat')

ci/docker/buildenv/Dockerfile

@@ -6,7 +6,7 @@
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-FROM ubuntu:22.04
+FROM ubuntu:24.04
 
 # Create the user
 RUN groupadd verilator \
@@ -36,12 +36,14 @@ RUN apt-get update \
                         help2man \
                         libfl2 \
                         libfl-dev \
+                        libclang-rt-18-dev \
                         libgoogle-perftools-dev \
                         libsystemc \
                         libsystemc-dev \
                         numactl \
                         perl \
                         python3 \
+                        python3-distro \
                         wget \
                         z3 \
                         zlib1g \

ci/docker/buildenv/README.rst

@@ -13,7 +13,7 @@ Verilator build. It uses the following parameters:
 
 -  Source revision (default: master)
 
--  Compiler (GCC 10.3.0, clang 10.0.0, default: 10.3.0)
+-  Compiler (GCC 13.3.0, clang 18.1.3, default: 13.3.0)
 
 The container is published as ``verilator/verilator-buildenv`` on `docker
 hub
@@ -31,18 +31,18 @@ To also run tests:
 
    docker run -ti verilator/verilator-buildenv test
 
-To change the compiler:
+To change the compiler use the `-e` switch to pass environment variables:
 
 ::
 
-   docker run -ti -e CC=clang-10 -e CXX=clang++-10 verilator/verilator-buildenv test
+   docker run -ti -e CC=clang-18 -e CXX=clang++-18 verilator/verilator-buildenv test
 
-The tests that involve gdb are not working due to security restrictions.
-To run those too:
+The tests, that involve numactl are not working due to security restrictions.
+To run those too, add the CAP_SYS_NICE capability during the start of the container:
 
 ::
 
-   docker run -ti -e CC=clang-10 -e CXX=clang++-10 --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
+   docker run -ti --cap-add=CAP_SYS_NICE verilator/verilator-buildenv test
 
 Rather then building using a remote git repository you may prefer to use a
 working copy on the local filesystem. Mount the local working copy path as
@@ -52,7 +52,7 @@ top of a repository:
 
 ::
 
-   docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
+   docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` verilator/verilator-buildenv test
 
 
 Rebuilding

ci/docker/run/Dockerfile

@@ -6,7 +6,7 @@
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-FROM ubuntu:22.04
+FROM ubuntu:24.04
 
 RUN apt-get update \
     && DEBIAN_FRONTEND=noninteractive \
@@ -48,7 +48,8 @@ RUN git clone "${REPO}" verilator && \
     make && \
     make install && \
     cd .. && \
-    rm -r verilator
+    rm -r verilator && \
+    ccache -C
 
 COPY verilator-wrap.sh /usr/local/bin/verilator-wrap.sh
 

configure.ac

@@ -7,10 +7,11 @@
 
 # When releasing, also update header of Changes file, and CMakeLists.txt,
 # and commit using "devel release" or "Version bump" message
+# Then 'make distclean' 'autoconf' './configure' 'make' 'make test'
 # Then 'make maintainer-dist'
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[5.036 2025-04-27],
+AC_INIT([Verilator],[5.040 2025-08-30],
         [https://verilator.org],
         [verilator],[https://verilator.org])
 
@@ -68,6 +69,7 @@ AC_ARG_ENABLE([tcmalloc],
                 *)   AC_MSG_ERROR([bad value '${enableval}' for --enable-tcmalloc]) ;;
                esac],
               [CFG_WITH_TCMALLOC=check;])
+AC_SUBST(CFG_WITH_TCMALLOC)
 AC_MSG_RESULT($CFG_WITH_TCMALLOC)
 
 # Flag to enable coverage build
@@ -177,7 +179,7 @@ AC_PROG_INSTALL
 
 AC_LANG_PUSH(C++)
 CFG_CXX_VERSION=`$CXX --version | head -1`
-AC_MSG_RESULT([compiler $CXX --version = $CFG_CXX_VERSION])
+AC_MSG_RESULT([compiler version... $CXX --version = $CFG_CXX_VERSION])
 AC_SUBST(CFG_CXX_VERSION)
 
 AC_MSG_CHECKING([that C++ compiler can compile simple program])
@@ -432,10 +434,10 @@ AC_SUBST(HAVE_COROUTINES)
 
 # Flags for compiling Verilator internals including parser always
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Qunused-arguments)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-shadow)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-unused-parameter)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Xclang -fno-pch-timestamp)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-faligned-new)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-unused-parameter)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-shadow)
 AC_SUBST(CFG_CXXFLAGS_SRC)
 
 # Flags for compiling Verilator parser always (in addition to above CFG_CXXFLAGS_SRC)
@@ -476,6 +478,7 @@ m4_foreach([cflag],[
         [-Wno-bool-operation],
         [-Wno-c++11-narrowing],
         [-Wno-constant-logical-operand],
+        [-Wno-int-in-bool-context],
         [-Wno-non-pod-varargs],
         [-Wno-parentheses-equality],
         [-Wno-shadow],
@@ -546,10 +549,12 @@ _MY_LDLIBS_CHECK_IFELSE(
     _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-calloc)
     _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-realloc)
     _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-free)
+    AC_DEFINE([HAVE_TCMALLOC],[1],[Defined if have tcmalloc])
    fi],
   [if test "$CFG_WITH_TCMALLOC" = "yes"; then
     AC_MSG_ERROR([--enable-tcmalloc was given but test for ${LTCMALLOC} failed])
    fi])
+AC_SUBST(HAVE_TCMALLOC)
 AC_SUBST(CFG_LIBS)
 
 # Need C++14 at least

docs/CONTRIBUTORS

@@ -3,6 +3,7 @@ under the Developer Certificate of Origin (https://developercertificate.org/).
 
 Please see the Verilator manual for 200+ additional contributors. Thanks to all.
 
+404allen404
 Adam Bagley
 Adrian Sampson
 Adrien Le Masle
@@ -11,7 +12,6 @@ Aidan McNay
 Aleksander Kiryk
 Alex Chadwick
 Alex Solomatnikov
-Àlex Torregrosa
 Aliaksei Chapyzhenka
 Ameya Vikram Singh
 Andrea Calabrese
@@ -24,6 +24,7 @@ Anthony Donlon
 Anthony Moore
 Arkadiusz Kozdra
 Arthur Rosa
+Artur Bieniek
 Aylon Chaim Porat
 Bartłomiej Chmiel
 Brian Li
@@ -34,17 +35,20 @@ Chris Randall
 Christopher Taylor
 Chuxuan Wang
 Chykon
+Congcong Cai
 Conor McCullough
 Dan Petrisko
+Danny Oler
 Daniel Bates
+Dave Sargeant
 David Horton
 David Ledger
 David Metz
-Dave Sargeant
 David Stanford
 David Turner
 Dercury
 Diego Roux
+Dominick Grochowina
 Don Williamson
 Drew Ranck
 Drew Taussig
@@ -54,27 +58,27 @@ Eric Müller
 Eric Rippey
 Ethan Sifferman
 Eyck Jentzsch
-Furqan Nadir
 Fabian Keßler
 Fan Shupei
-february cozzocrea
 Felix Neumärker
 Felix Yan
 Frans Skarman
 Fuad Ismail
+Furqan Nadir
 G-A. Kamendje
 Garrett Smith
+George Polack
 Geza Lore
 Gianfranco Costamagna
 Gijs Burghoorn
 Gilberto Abram
 Glen Gibb
-Gökçe Aydos
 Graham Rushton
 Greg Davill
 Guokai Chen
 Gus Smith
 Gustav Svensk
+Gökçe Aydos
 Han Qi
 Harald Heckmann
 Hennadii Chernyshchyk
@@ -83,7 +87,8 @@ Huang Rui
 Huanghuang Zhou
 HungMingWu
 HyungKi Jeong
-Ícaro Lima
+Ibrahim Burak Yorulmaz
+Igor Zaworski
 Ilya Barkov
 Iru Cai
 Ivan Vnučec
@@ -97,16 +102,17 @@ James Shi
 Jamey Hicks
 Jamie Iles
 Jan Van Winkel
-Jiangjie Weng
 Jean Berniolles
 Jeremy Bennett
 Jesse Taube
 Jevin Sweval
 Jiacheng Qian
 Jiamin Zhu
-Jitesh Nayak
+Jiangjie Weng
 Jinyan Xu
+Jitesh Nayak
 Jiuyang Liu
+Joel Bodenmann
 Joey Liu
 John Coiner
 John Demme
@@ -155,10 +161,12 @@ Martin Schmidt
 Martin Stadler
 Mateusz Gancarz
 Matthew Ballance
+Max Wipfli
+Michael Bedford Taylor
 Michael Bikovitsky
 Michael Killough
-Michaël Lefebvre
 Michal Czyz
+Michaël Lefebvre
 Mike Popoloski
 Miodrag Milanović
 Mladen Slijepcevic
@@ -180,9 +188,11 @@ Paul Wright
 Pawel Jewstafjew
 Pawel Sagan
 Pengcheng Xu
+Peter Birch
 Peter Debacker
 Peter Horvath
 Peter Monsson
+Petr Nohavica
 Philip Axer
 Philipp Wagner
 Pierre-Henri Horrein
@@ -198,37 +208,40 @@ Richard Myers
 Risto Pejašinović
 Robert Balas
 Robin Heinemann
+Rodrigo Batista de Moraes
 Rupert Swarbrick
 Ryan Ziegler
 Ryszard Rozak
 Samuel Riedel
 Sean Cross
 Sebastien Van Cauwenberghe
+Sergey Fedorov
 Sergi Granell
 Seth Pellegrino
+Shou-Li Hsu
 Srinivasan Venkataramanan
 Stefan Wallentowitz
 Stephen Henry
 Steven Hugg
-sumpster
 Szymon Gizler
 Sören Tempel
 Teng Huang
-Tom Manner
 Tim Hutt
 Tim Snyder
+Tobias Jensen
 Tobias Rosenkranz
 Tobias Wölfel
 Todd Strader
+Tom Manner
 Tomasz Gorochowik
 Topa Topino
 Toru Niina
 Trung Nguyen
 Tudor Timi
 Tymoteusz Blazejczyk
+Udaya Raj Subedi
 Udi Finkelstein
 Unai Martinez-Corral
-Udaya Raj Subedi
 Valentin Atepalikhin
 Varun Koyyalagunta
 Vassilis Papaefstathiou
@@ -249,9 +262,11 @@ Yuri Victorovich
 Yutetsu TAKATSUKASA
 Yves Mathieu
 Zhanglei Wang
+Zhen Yan
 Zhou Shen
 Zhouyi Shen
 Zixi Li
-أحمد المحمودي
-404allen404
-Tobias Jensen
+february cozzocrea
+sumpster
+Àlex Torregrosa
+Ícaro Lima

docs/Makefile

@@ -25,7 +25,7 @@ BUILDDIR = _build
 
 SPHINXOPTS ?= -c guide -j 4
 ifneq ($(VERILATOR_ANALYTICS_ID),)
-SPHINXOPTS += -D html_theme_options.analytics_id=$(VERILATOR_ANALYTICS_ID)
+  SPHINXOPTS += -D html_theme_options.analytics_id=$(VERILATOR_ANALYTICS_ID)
 endif
 
 ######################################################################
@@ -68,11 +68,16 @@ pdf:
 
 ######################################################################
 
-html latex linkcheck spelling::
+html latex linkcheck::
 	$(MAKE) vl-extract
 	$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS)
 	$(PYTHON3) bin/vl_sphinx_fix _build
 
+spelling::
+	$(MAKE) vl-extract
+	$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS)
+	sort -o guide/spelling.txt guide/spelling.txt
+
 help:
 	@$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS)
 

docs/gen/ex_ALWNEVER_faulty.rst

@@ -0,0 +1,4 @@
+.. comment: generated by t_event_control_star_never_bad
+.. code-block:: sv
+
+     always @* a = 100;

docs/gen/ex_ALWNEVER_msg.rst

@@ -0,0 +1,4 @@
+.. comment: generated by t_event_control_star_never_bad
+.. code-block::
+
+   %Warning-ALWNEVER: example.v:1:3 'always @*' will never execute as expression list is empty (no variables read)

docs/gen/ex_BADVLTPRAGMA_faulty.rst

@@ -0,0 +1,5 @@
+.. comment: generated by t_lint_badvltpragma_bad
+.. code-block:: sv
+   :emphasize-lines: 1
+
+      // verilator lintt_off WIDTH  //<--- Warning (lint_off misspelled)

docs/gen/ex_BADVLTPRAGMA_msg.rst

@@ -0,0 +1,7 @@
+.. comment: generated by t_lint_badvltpragma_bad
+.. code-block::
+   :emphasize-lines: 1,2
+
+   %Error-BADVLTPRAGMA: example.v:1:4 Unknown verilator comment: '/*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/'
+       7 |    /*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/
+         |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

docs/gen/ex_DIDNOTCONVERGE_msg.rst

@@ -1,5 +1,5 @@
 .. comment: generated by t_lint_didnotconverge_bad
 .. code-block::
 
-   -V{t#,#}         'stl' region trigger index 1 is active: @([hybrid] a)
+   -V{t#,#}         'stl' region trigger index 1 is active: @([hybrid] b)
    %Error: t/t_lint_didnotconverge_bad.v:7: Settle region did not converge.

docs/gen/ex_PARAMNODEFAULT_faulty.rst

@@ -0,0 +1,7 @@
+.. comment: generated by t_lint_paramnodefault_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 2
+
+   module sub;
+     parameter NODEF;  //<--- Warning

docs/gen/ex_PARAMNODEFAULT_msg.rst

@@ -0,0 +1,6 @@
+.. comment: generated by t_lint_paramnodefault_bad
+.. code-block::
+
+   %Error-PARAMNODEFAULT: example.v:1:13 Parameter without default requires ANSI-style parameter list (IEEE 1800-2023 6.20.1): 'NODEF'
+       8 |   parameter NODEF;
+         |             ^~~~~

docs/gen/ex_PINMISSING_msg.rst

@@ -1,4 +1,4 @@
 .. comment: generated by t_lint_pinmissing_bad
 .. code-block::
 
-   %Warning-PINMISSING: example.v:1:8 Cell has missing pin: 'port'
+   %Warning-PINMISSING: example.v:1:8 Instance has missing pin: 'port'

docs/gen/ex_PKGNODECL_faulty.rst

@@ -1,11 +0,0 @@
-.. comment: generated by t_lint_pkgnodecl_bad
-.. code-block:: sv
-   :linenos:
-   :emphasize-lines: 2
-
-   module t;
-      initial Pkg::hello();  //<--- Warning
-   endmodule
-   package Pkg;
-      function void hello(); endfunction
-   endpackage

docs/gen/ex_PKGNODECL_msg.rst

@@ -1,4 +0,0 @@
-.. comment: generated by t_lint_pkgnodecl_bad
-.. code-block::
-
-   %Error-PKGNODECL: example.v:1:12 Package/class 'Pkg' not found, and needs to be predeclared (IEEE 1800-2023 26.3)

docs/gen/ex_PROCASSINIT_faulty.rst

@@ -0,0 +1,12 @@
+.. comment: generated by t_lint_procassinit_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 1,5
+
+      logic flop_out = 1;  // <--- Warning
+
+      always @(posedge clk, negedge reset_l) begin
+         if (enable) begin
+            flop_out <= ~in;  // <--- Use of initialized
+         end
+      end

docs/gen/ex_PROCASSINIT_fixed.rst

@@ -0,0 +1,15 @@
+.. comment: generated by t_lint_procassinit_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 5
+
+      logic flop2_out;
+
+      always @(posedge clk, negedge reset_l) begin
+         if (!reset_l) begin
+            flop2_out <= '1;  // <--- Added reset init
+         end
+         else if (enable) begin
+            flop2_out <= ~in;
+         end
+      end

docs/gen/ex_PROCASSINIT_msg.rst

@@ -0,0 +1,12 @@
+.. comment: generated by t_lint_procassinit_bad
+.. code-block::
+
+   %Warning-PROCASSINIT: example.v:1:21 Procedural assignment to declaration with initial value: 'flop_out'
+                                                         : ... note: In instance 't'
+                                                         : ... Location of variable initialization
+      26 |    logic flop_out = 1;
+         |                     ^
+                         example.v:1:10 ... Location of variable process write
+                                                         : ... Perhaps should initialize instead using a reset in this process
+      30 |          flop_out <= ~in;
+         |          ^~~~~~~~

docs/gen/ex_WIDTHEXPAND_1_faulty.rst

@@ -3,6 +3,6 @@
    :linenos:
    :emphasize-lines: 3
 
-      int array[5];
-      bit [1:0] rd_addr;
-      wire int rd_value = array[rd_addr];  //<--- Warning
+     logic [31:0] array[5];
+     bit [1:0] rd_addr;
+     wire [31:0] rd_value = array[rd_addr];  //<--- Warning

docs/gen/ex_WIDTHEXPAND_1_fixed.rst

@@ -2,4 +2,4 @@
 .. code-block:: sv
    :emphasize-lines: 1
 
-      wire int rd_value = array[{1'b0, rd_addr}];  //<--- Fixed
+     wire [31:0] rd_value = array[{1'b0, rd_addr}];  //<--- Fixed

docs/gen/ex_WIDTHEXPAND_1_msg.rst

@@ -1,4 +1,4 @@
 .. comment: generated by t_lint_widthexpand_docs_bad
 .. code-block::
 
-   %Warning-WIDTHEXPAND: example.v:3:29 Bit extraction of array[4:0] requires 3 bit index, not 2 bits.
+   %Warning-WIDTHEXPAND: example.v:3:31 Bit extraction of array[4:0] requires 3 bit index, not 2 bits.

docs/guide/contributors.rst

@@ -23,8 +23,8 @@ Contributors
 Many people have provided ideas and other assistance with Verilator.
 
 Verilator is receiving significant development support from the `CHIPS
-Alliance <https://chipsalliance.org>`_, `Antmicro Ltd
-<https://antmicro.com>`_ and `Shunyao CAD <https://shunyaocad.com>`_.
+Alliance <https://chipsalliance.org>`_, and `Antmicro Ltd
+<https://antmicro.com>`_.
 
 Previous major corporate sponsors of Verilator, by providing significant
 contributions of time or funds include: Antmicro Ltd., Atmel Corporation,

docs/guide/exe_verilator.rst

@@ -1,9 +1,9 @@
 .. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-=====================
- verilator Arguments
-=====================
+===================
+verilator Arguments
+===================
 
 The following arguments may be passed to the "verilator" executable.
 
@@ -32,7 +32,9 @@ Summary:
    makefile's VPATH the appropriate directory to find the file.
 
    See also :vlopt:`-CFLAGS` and :vlopt:`-LDFLAGS` options, which are
-   useful when the C++ files need special compiler flags.
+   useful when the C++ files need special compiler flags.  The compiler
+   flags add by default `-DVERILATOR=1`, so an `#ifdef VERILATOR` may be
+   used to conditionally preprocess .cpp code for different simulators.
 
 .. option:: <file.v>
 
@@ -86,13 +88,19 @@ Summary:
       grammar and other semantic extensions which might not be legal when
       set to an older standard.
 
-.. option:: --assert
+.. option:: --no-assert
 
-   Enable all assertions. Implies :vlopt:`--assert-case`.
+   Disable all assertions. Implies :vlopt:`--no-assert-case`.
 
-.. option:: --assert-case
+   In versions before 5.038, these were disabled by default, and `--assert`
+   was required to enable assertions.
 
-   Enable unique/unique0/priority case related checks.
+.. option:: --no-assert-case
+
+   Disable unique/unique0/priority case related checks.
+
+   In versions before 5.038, these were disabled by default, and `--assert`
+   or `--assert-case` was required to enable case assertions.
 
 .. option:: --autoflush
 
@@ -183,7 +191,7 @@ Summary:
    With :vlopt:`--clk`, the specified signal is marked as a clock signal.
 
    The provided signal name is specified using a RTL hierarchy path. For
-   example, v.foo.bar.  If the signal is the input to top-module, then
+   example, v.foo.bar.  If the signal is the input to the top-module, then
    directly provide the signal name. Alternatively, use a
    :option:`/*verilator&32;clocker*/` metacomment in RTL file to mark the
    signal directly.
@@ -393,6 +401,22 @@ Summary:
    standard across Verilog tools while :vlopt:`-D <-D<var>>` is similar to
    :command:`gcc -D`.
 
+.. option:: --diagnostics-sarif
+
+   Enables diagnostics output into a Static Analysis Results Interchange
+   Format (SARIF) file, a standard, JSON-based format for the output of
+   static analysis tools such as linters.  See
+   [SARIF](https://sarifweb.azurewebsites.net/),
+   [sarif-tools](https://github.com/microsoft/sarif-tools), and the [SARIF
+   web-based viewer](https://microsoft.github.io/sarif-web-component/).
+
+.. option:: --diagnostics-sarif-output <filename>
+
+   Specifies the filename for the SARIF output file (`.sarif`) of
+   :vlopt:`--diagnostics-sarif`.  Using this option automatically sets
+   :vlopt:`--diagnostics-sarif`.  If not specified, output defaults to
+   :file:`<prefix>.sarif`.
+
 .. option:: --dpi-hdr-only
 
    Only generate the DPI header file.  This option does not affect on the
@@ -446,9 +470,9 @@ Summary:
 
 .. option:: --dump-tree-dot
 
-   Rarely needed.  Enable dumping Ast .tree.dot debug files in Graphviz
-   Dot format. This option implies :vlopt:`--dump-tree`, unless
-   :vlopt:`--dumpi-tree` was passed explicitly.
+   Rarely needed - for developer use.  Enable dumping Ast .tree.dot debug
+   files in Graphviz Dot format. This option implies :vlopt:`--dump-tree`,
+   unless :vlopt:`--dumpi-tree` was passed explicitly.
 
 .. option:: --dump-tree-json
 
@@ -540,6 +564,10 @@ Summary:
    Any :code:`$VAR`, :code:`$(VAR)`, or :code:`${VAR}` will be replaced
    with the specified environment variable.
 
+.. option:: -fdfg-synthesize-all
+
+   Rarely needed. Attempt to synthesize all combinational logic in DFG.
+
 .. option:: -FI <file>
 
    Force include of the specified C++ header file.  All generated C++ files
@@ -568,34 +596,45 @@ Summary:
 
 .. option:: -fno-const-before-dfg
 
-   Do not apply any global expression folding prior to the DFG pass. This
-   option is solely for the purpose of DFG testing and should not be used
-   otherwise.
+   Rarely needed. Do not apply any global expression folding prior to the
+   DFG pass. This option is solely for the purpose of DFG testing and
+   should not be used otherwise.
 
 .. option:: -fno-const-bit-op-tree
 
+.. option:: -fno-const-eager
+
 .. option:: -fno-dedup
 
 .. option:: -fno-dfg
 
-   Disable all use of the DFG-based combinational logic optimizer.
-   Alias for :vlopt:`-fno-dfg-pre-inline` and :vlopt:`-fno-dfg-post-inline`.
+   Rarely needed. Disable all use of the DFG-based combinational logic
+   optimizer.  Alias for :vlopt:`-fno-dfg-pre-inline`,
+   :vlopt:`-fno-dfg-post-inline` and :vlopt:`-fno-dfg-scoped`.
+
+.. option:: -fno-dfg-break-cycles
+
+   Rarely needed. Disable breaking combinational cycles during DFG.
 
 .. option:: -fno-dfg-peephole
 
-   Disable the DFG peephole optimizer.
+   Rarely needed. Disable the DFG peephole optimizer.
 
 .. option:: -fno-dfg-peephole-<pattern>
 
-   Disable individual DFG peephole optimizer pattern.
+   Rarely needed. Disable individual DFG peephole optimizer pattern.
 
 .. option:: -fno-dfg-post-inline
 
-   Do not apply the DFG optimizer after inlining.
+   Rarely needed. Do not apply the DFG optimizer after inlining.
 
 .. option:: -fno-dfg-pre-inline
 
-   Do not apply the DFG optimizer before inlining.
+   Rarely needed. Do not apply the DFG optimizer before inlining.
+
+.. option:: -fno-dfg-scoped
+
+   Rarely needed. Do not apply the DFG optimizer across module scopes.
 
 .. option:: -fno-expand
 
@@ -607,6 +646,10 @@ Summary:
 
 .. option:: -fno-gate
 
+   Rarely needed. Do not apply the gate-level wire optimizations. Using
+   this is not recommended as may cause additional warnings and ordering
+   issues.
+
 .. option:: -fno-inline
 
 .. option:: -fno-inline-funcs
@@ -643,8 +686,9 @@ Summary:
 
 .. option:: -fno-var-split
 
-   Do not attempt to split variables automatically. Variables explicitly
-   annotated with :option:`/*verilator&32;split_var*/` are still split.
+   Rarely needed. Do not attempt to split variables
+   automatically. Variables explicitly annotated with
+   :option:`/*verilator&32;split_var*/` are still split.
 
 .. option:: -future0 <option>
 
@@ -750,10 +794,19 @@ Summary:
 
 .. option:: --hierarchical-params-file <filename>
 
-   Internal flag inserted used during :vlopt:`--hierarchical`; specifies
-   name of hierarchical parameters file for deparametrized modules with
-   :option:`/*verilator&32;hier_block*/` metacomment. See
-   :ref:`Hierarchical Verilation`.
+   Rarely needed - internal use. Internal flag inserted used during
+   :vlopt:`--hierarchical`; specifies name of hierarchical parameters file
+   for deparametrized modules with :option:`/*verilator&32;hier_block*/`
+   metacomment. See :ref:`Hierarchical Verilation`.
+
+.. option:: --hierarchical-threads <threads>
+
+   Specifies the number of threads used for scheduling hierarchical blocks.
+   This allows scheduling multi-thread hierarchical blocks on multiple
+   threads, without increasing the parallelism of the entire design.
+
+   Set to :vlopt:`--threads` by default. For optimal performance should not
+   exceed the CPU thread count.
 
 .. option:: -I<dir>
 
@@ -824,13 +877,15 @@ Summary:
 
 .. option:: --json-only-meta-output <filename>
 
-   Specifies the filename for the metadata output file (`.tree.meta.json`) of --json-only.
-   Using this option automatically sets :vlopt:`--json-only`.
+   Specifies the filename for the metadata output file (`.tree.meta.json`)
+   of :vlopt:`--json-only`.  Using this option automatically sets
+   :vlopt:`--json-only`.
 
 .. option:: --json-only-output <filename>
 
-   Specifies the filename for the main output file (`.tree.json`) of --json-only.
-   Using this option automatically sets :vlopt:`--json-only`.
+   Specifies the filename for the main output file (`.tree.json`) of
+   :vlopt:`--json-only`.  Using this option automatically sets
+   :vlopt:`--json-only`.
 
 .. option:: --l2-name <value>
 
@@ -956,7 +1011,7 @@ Summary:
 
 .. option:: --max-num-width <value>
 
-   Set the maximum number literal width (e.g., in 1024'd22 this
+   Set the maximum number literal width (e.g., in 1024'd22 the
    1024).  Defaults to 64K.
 
 .. option:: --Mdir <directory>
@@ -1184,8 +1239,8 @@ Summary:
 
 .. option:: --private
 
-   Opposite of :vlopt:`--public`.  This is the default; this option exists for
-   backwards compatibility.
+   Rarely needed. Opposite of :vlopt:`--public`.  This is the default; this
+   option exists for backwards compatibility.
 
 .. option:: --prof-c
 
@@ -1273,8 +1328,8 @@ Summary:
 
 .. option:: --public
 
-   This is only for historical debugging use and using it may result in
-   mis-simulation of generated clocks.
+   Rarely needed. This is only for historical debugging use and using it
+   may result in mis-simulation of generated clocks.
 
    Declares all signals and modules public.  This will turn off signal
    optimizations as if all signals had a :option:`/*verilator&32;public*/`
@@ -1340,7 +1395,7 @@ Summary:
    the path of the referencing file, instead of relative to the current
    directory.
 
-.. option:: --reloop-limit
+.. option:: --reloop-limit <value>
 
    Rarely needed. Verilator attempts to turn some common sequences of
    statements into loops in the output. This argument specifies the minimum
@@ -1561,9 +1616,8 @@ Summary:
    When the input Verilog contains more than one top-level module,
    it specifies the name of the module to become the top-level module,
    and sets the default for :vlopt:`--prefix` if not explicitly specified.
-   This is not needed with standard designs with only one top.  See also
-   :option:`MULTITOP` warning.
-
+   This is not needed with standard designs with only one top.
+   See :ref:`Finding and Binding Modules`.
 
 .. option:: --trace
 
@@ -1720,8 +1774,8 @@ Summary:
 
 .. option:: --valgrind
 
-   Run Verilator under `Valgrind <https://valgrind.org/>`_.  The command may be
-   changed with :option:`VERILATOR_VALGRIND`.
+   Rarely needed. Run Verilator under `Valgrind <https://valgrind.org/>`_.
+   The command may be changed with :option:`VERILATOR_VALGRIND`.
 
 .. option:: --no-verilate
 
@@ -1774,7 +1828,7 @@ Summary:
    them systematically.
 
    The generated file is in the Verilator Configuration format, see
-   :ref:`Configuration Files`. The standard file extension is ".vlt".
+   :ref:`Verilator Control Files`. The standard file extension is ".vlt".
    These files can directly be consumed by Verilator, typically by placing
    the filename as part of the Verilator command line options. Waiver files
    need to be listed on the command line before listing the files they are
@@ -1847,6 +1901,19 @@ Summary:
    ``-Wno-UNUSEDGENVAR`` ``-Wno-UNUSEDPARAM`` ``-Wno-UNUSEDSIGNAL``
    ``-Wno-VARHIDDEN``.
 
+.. option:: -work <libname>
+
+   Use the specified Verilog config library name for all cells read after
+   this argument.  May be specified multiple times, it will apply to cells
+   read between the given arguments.  E.g. `-work liba a.v -work libb b.v`
+   will use `liba` for modules inside `a.v` or in cells resolved
+   hierarchically under those modules, and will use `libb` for modules
+   inside `b.v` or hierarchically under.
+
+   Defaults to "work" (IEEE 1800-2023 3.3.1).
+
+   See :ref:`Finding and Binding Modules`.
+
 .. option:: -Wpedantic
 
    Warn on any construct demanded by IEEE, and disable all Verilator
@@ -1880,9 +1947,9 @@ Summary:
    ``-Wwarn-ASSIGNDLY`` ``-Wwarn-BLKSEQ`` ``-Wwarn-DECLFILENAME``
    ``-Wwarn-DEFPARAM`` ``-Wwarn-EOFNEWLINE`` ``-Wwarn-GENUNNAMED``
    ``-Wwarn-IMPORTSTAR`` ``-Wwarn-INCABSPATH`` ``-Wwarn-PINCONNECTEMPTY``
-   ``-Wwarn-PINNOCONNECT`` ``-Wwarn-SYNCASYNCNET`` ``-Wwarn-UNDRIVEN``
-   ``-Wwarn-UNUSEDGENVAR`` ``-Wwarn-UNUSEDLOOP`` ``-Wwarn-UNUSEDPARAM``
-   ``-Wwarn-UNUSEDSIGNAL`` ``-Wwarn-VARHIDDEN``.
+   ``-Wwarn-PINNOCONNECT`` ``-Wwarn-PROCASSINIT`` ``-Wwarn-SYNCASYNCNET``
+   ``-Wwarn-UNDRIVEN`` ``-Wwarn-UNUSEDGENVAR`` ``-Wwarn-UNUSEDLOOP``
+   ``-Wwarn-UNUSEDPARAM`` ``-Wwarn-UNUSEDSIGNAL`` ``-Wwarn-VARHIDDEN``.
 
 .. option:: --x-assign <mode>
 
@@ -1906,14 +1973,13 @@ Summary:
      different seeds on different executions. This method is the slowest,
      but safest for finding reset bugs.
 
-     If using `--x-assign unique`, you may want to seed your random number
-     generator such that each regression run gets a different randomization
-     sequence. The simplest is to use the
-     :vlopt:`+verilator+seed+\<value\>` runtime option.  Alternatively, use
-     the system's :code:`srand48()` or for Windows :code:`srand()` function
-     to do this.  You'll probably also want to print any seeds selected,
-     and code to enable rerunning with that same seed so you can reproduce
-     bugs.
+     If using `--x-assign unique`, use the
+     :vlopt:`+verilator+rand+reset+2 <+verilator+rand+reset+\<value\>>`
+     runtime option, and seed the runtime random number generator such that
+     each regression run gets a different randomization sequence with
+     :vlopt:`+verilator+seed+\<value\>`.  You'll probably also want to
+     print any seeds selected, and code to enable rerunning with that same
+     seed, so you can reproduce bugs.
 
    .. note::
 
@@ -1936,6 +2002,14 @@ Summary:
      use for each initialization. This gives the greatest flexibility and
      allows for finding reset bugs.  See :ref:`Unknown states`.
 
+     If using `--x-initial unique`, use the
+     :vlopt:`+verilator+rand+reset+2 <+verilator+rand+reset+\<value\>>`
+     runtime option, and seed the runtime random number generator such that
+     each regression run gets a different randomization sequence with
+     :vlopt:`+verilator+seed+\<value\>`.  You'll probably also want to
+     print any seeds selected, and code to enable rerunning with that same
+     seed, so you can reproduce bugs.
+
    With "--x-initial fast",
      is best for performance, and initializes all variables to a state
      Verilator determines is optimal.  This may allow further code
@@ -2015,18 +2089,20 @@ Summary:
    filenames.
 
 
-.. _Configuration Files:
+.. _Verilator Control Files:
 
-=====================
- Configuration Files
-=====================
+=======================
+Verilator Control Files
+=======================
 
 In addition to the command line, warnings and other features for the
-:command:`verilator` command may be controlled with configuration files,
-typically named with the `.vlt` extension (what makes it a configuration
-file is the :option:`\`verilator_config` directive).  These files, when
-named `.vlt`, are read before source code files; if this behavior is
-undesired, name the config file with a `.v` suffix.
+:command:`verilator` command may be controlled with Verilator Control
+Files, not to be confused with IEEE Configurations blocks
+(`config...endconfig`).  Typically named with the `.vlt` extension, what
+makes it a Verilator Control File is the :option:`\`verilator_config`
+directive.  These files, when named `.vlt`, are read before source code
+files; if this behavior is undesired, name the control file with a `.v` or
+other suffix.
 
 An example:
 
@@ -2038,19 +2114,20 @@ An example:
 
 This disables WIDTH warnings globally, and CASEX for a specific file.
 
-Configuration files are fed through the normal Verilog preprocessor prior
-to parsing, so "\`ifdef", "\`define", and comments may be used as if the
-configuration file was standard Verilog code.
+Verilator control files are fed through the normal Verilog
+preprocessor prior to parsing, so "\`ifdef", "\`define", and comments may
+be used as if the control file was standard Verilog code.
 
-Note that file or line-specific configuration only applies to files read
-after the configuration file. It is therefore recommended to pass the
-configuration file to Verilator as the first file.
+Note that file or line-specific control only applies to files read
+after the control file. It is therefore recommended to pass the
+control file to Verilator as the first file.
 
-The grammar of configuration commands is as follows:
+The grammar of control commands is as follows:
 
 .. option:: `verilator_config
 
-   Take the remaining text and treat it as Verilator configuration commands.
+   Take the remaining text and treat it as Verilator Control File commands.
+   See :ref:`Verilator Control Files`.
 
 .. option:: clock_enable -module "<modulename>" -var "<signame>"
 
@@ -2201,7 +2278,7 @@ The grammar of configuration commands is as follows:
    wildcard should be designed to match a single line; it is unspecified if
    the wildcard is allowed to match across multiple lines. The input
    contents does not include :vlopt:`--std <--no-std>` standard files, nor
-   configuration files (with :code:`verilator_config`). Typical use for
+   control files (with :code:`verilator_config`). Typical use for
    this is to match a version number present in the Verilog sources, so
    that the waiver will only apply to that version of the sources.
 
@@ -2235,13 +2312,13 @@ The grammar of configuration commands is as follows:
    order to improve model runtime performance.  This option is not expected
    to be used by users directly.  See :ref:`Thread PGO`.
 
-.. option:: public [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>"
+.. option:: public [-module "<modulename>"] [-task/-function "<taskname>"] [-var "<signame>"]
 
-.. option:: public_flat [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>"
+.. option:: public_flat [-module "<modulename>"] [-task/-function "<taskname>"] [-var "<signame>"]
 
-.. option:: public_flat_rd [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>"
+.. option:: public_flat_rd [-module "<modulename>"] [-task/-function "<taskname>"] [-var "<signame>"]
 
-.. option:: public_flat_rw [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>" "@(edge)"
+.. option:: public_flat_rw [-module "<modulename>"] [-task/-function "<taskname>"] [-var "<signame>" "@(edge)"]
 
    Sets the variable to be public.  Same as
    :option:`/*verilator&32;public*/` or

docs/guide/exe_verilator_coverage.rst

@@ -124,6 +124,12 @@ verilator_coverage Arguments
 
    This option should be used together with :option:`--annotate`.
 
+.. option:: --filter-type <regex>
+
+   Skips records of coverage types that matches with <regex>
+   Possible values are `toggle`, `line`, `branch`, `expr`, `user` and
+   a wildcard with `\*` or `?`. The default value is `\*`.
+
 .. option:: --help
 
    Displays a help summary, the program version, and exits.

docs/guide/extensions.rst

@@ -30,7 +30,7 @@ or "`ifdef`"'s may break other tools.
 
    Specifies the entire begin/end block should be ignored for coverage
    analysis.  Must be inside a code block, e.g., within a begin/end pair.
-   Same as :option:`coverage_block_off` in :ref:`Configuration Files`.
+   Same as :option:`coverage_block_off` in :ref:`Verilator Control Files`.
 
 .. option:: `error [string]
 
@@ -135,14 +135,15 @@ or "`ifdef`"'s may break other tools.
 
 .. option:: `verilator_config
 
-   Take the remaining text up to the next :option:`\`verilog` mode switch and
-   treat it as Verilator configuration commands.  See :ref:`Configuration Files`.
+   Take the remaining text up to the next :option:`\`verilog` mode switch
+   and treat it as Verilator Control File commands.  See :ref:`Verilator
+   Control Files`.
 
 .. option:: `VERILATOR_TIMING
 
    The VERILATOR_TIMING define is set when :vlopt:`--timing` is used to
    allow an "\`ifdef" of code dependent on this feature.  Note that this define
-   is not affected by the :option:`timing_off` configuration file option
+   is not affected by the :option:`timing_off` control file option
    nor timing metacomments.
 
 .. option:: `verilog
@@ -245,7 +246,7 @@ or "`ifdef`"'s may break other tools.
    the scheduling algorithm, sometimes required for correct clock behavior,
    and always improving performance.
 
-   Same as :option:`clock_enable` configuration file option.
+   Same as :option:`clock_enable` control file option.
 
 
    .. t_dist_docs_style ignore /*verilator&32;no_clocker*/
@@ -264,7 +265,7 @@ or "`ifdef`"'s may break other tools.
    Specifies the entire begin/end block should be ignored for coverage
    analysis purposes.
 
-   Same as :option:`coverage_block_off` configuration file option.
+   Same as :option:`coverage_block_off` control file option.
 
 .. option:: /*verilator&32;coverage_off*/
 
@@ -312,7 +313,7 @@ or "`ifdef`"'s may break other tools.
    submodules will be named :code:`{submodule}__DOT__{subsignal}` as C++
    does not allow "." in signal names.
 
-   Same as :option:`inline` configuration file option.
+   Same as :option:`inline` control file option.
 
 .. option:: /*verilator&32;isolate_assignments*/
 
@@ -355,7 +356,7 @@ or "`ifdef`"'s may break other tools.
            end
          end
 
-   Same as :option:`isolate_assignments` configuration file option.
+   Same as :option:`isolate_assignments` control file option.
 
 .. option:: /*verilator&32;lint_off <msg>*/
 
@@ -394,7 +395,7 @@ or "`ifdef`"'s may break other tools.
    Specifies the module the comment appears in should not be inlined into
    any modules that use this module.
 
-   Same as :option:`no_inline` configuration file option.
+   Same as :option:`no_inline` control file option.
 
 .. option:: /*verilator&32;no_inline_task*/
 
@@ -405,7 +406,7 @@ or "`ifdef`"'s may break other tools.
    must be pure; they cannot reference any variables outside the task
    itself.
 
-   Same as :option:`no_inline` configuration file option.
+   Same as :option:`no_inline` control file option.
 
 .. option:: /*verilator&32;public*/ (on parameter)
 
@@ -439,7 +440,7 @@ or "`ifdef`"'s may break other tools.
    You may want to use DPI exports instead, as it's compatible with other
    simulators.
 
-   Same as :option:`public` configuration file option.
+   Same as :option:`public` control file option.
 
 .. option:: /*verilator&32;public*/ (on typedef enum)
 
@@ -462,7 +463,7 @@ or "`ifdef`"'s may break other tools.
    function that accesses the variable.  This is nicer as it provides an
    obvious entry point compatible across simulators.
 
-   Same as :option:`public` configuration file option.
+   Same as :option:`public` control file option.
 
 .. option:: /*verilator&32;public_[|flat|flat_rd|flat_rw]_on [@(<edge_list>)]*/ (as scope)
 
@@ -495,14 +496,14 @@ or "`ifdef`"'s may break other tools.
    the name of the signal or path to it may change based upon the module
    inlining which takes place.
 
-   Same as :option:`public_flat` configuration file option.
+   Same as :option:`public_flat` control file option.
 
 .. option:: /*verilator&32;public_flat_rd*/ (on variable)
 
    Used after an input, output, register, or wire declaration to indicate
    the signal should be declared public_flat (see above), but read-only.
 
-   Same as :option:`public_flat_rd` configuration file option.
+   Same as :option:`public_flat_rd` control file option.
 
 .. option:: /*verilator&32;public_flat_rw @(<edge_list>)*/ (on variable)
 
@@ -512,7 +513,7 @@ or "`ifdef`"'s may break other tools.
    given sensitivity edge list. Use of this is implied when using the
    :vlopt:`--public-flat-rw` option.
 
-   Same as :option:`public_flat_rw` configuration file option.
+   Same as :option:`public_flat_rw` control file option.
 
 .. option:: /*verilator&32;public_module*/
 
@@ -522,7 +523,7 @@ or "`ifdef`"'s may break other tools.
    contains public signals or \`systemc_ directives.  Use of this is
    implied when using the :vlopt:`--public` option.
 
-   Same as :option:`public` configuration file option.
+   Same as :option:`public` control file option.
 
 .. option:: /*verilator&32;public_off*/
 
@@ -537,7 +538,7 @@ or "`ifdef`"'s may break other tools.
    In general, you should avoid using this attribute when unnecessary, as
    the performance decreases significantly with increasing usage of sc_bv.
 
-   Same as :option:`sc_bv` configuration file option.
+   Same as :option:`sc_bv` control file option.
 
 .. option:: /*verilator&32;sc_clock*/
 
@@ -555,7 +556,7 @@ or "`ifdef`"'s may break other tools.
    $display-like behavior.  See the :file:`test_regress/t/t_dpi_display.v`
    file for an example.
 
-   Same as :option:`sformat` configuration file option.
+   Same as :option:`sformat` control file option.
 
 .. option:: /*verilator&32;split_var*/
 
@@ -602,7 +603,7 @@ or "`ifdef`"'s may break other tools.
          assign bar    = tmp[1] + c;
 
 
-   Same as :option:`split_var` configuration file option.
+   Same as :option:`split_var` control file option.
 
 .. option:: /*verilator&32;tag <text...>*/
 
@@ -617,14 +618,14 @@ or "`ifdef`"'s may break other tools.
    :option:`--no-timing`), and :code:`fork`/:code:`join*` blocks are
    converted into :code:`begin`/:code:`end` blocks.
 
-   Same as :option:`timing_off` configuration file option.
+   Same as :option:`timing_off` control file option.
 
 .. option:: /*verilator&32;timing_on*/
 
    Re-enable all timing constructs after this metacomment (only applicable
    after :option:`timing_off`).
 
-   Same as :option:`timing_on` configuration file option.
+   Same as :option:`timing_on` control file option.
 
 .. option:: /*verilator&32;trace_init_task*/
 

docs/guide/faq.rst

@@ -260,7 +260,7 @@ How do I view waveforms (aka dumps or traces)?
 
 Verilator creates standard VCD (Value Change Dump) and FST files.  VCD
 files are viewable with the open-source
-`GTKWave <http://gtkwave.sourceforge.net/>`_,
+`GTKWave <https://gtkwave.sourceforge.net/>`_,
 `Surfer <https://surfer-project.org/>`_, Dinotrace (legacy), or any of the
 many closed-source viewer offerings; FST is supported only by GTKWave and
 Surfer.
@@ -335,7 +335,7 @@ How do I prevent my assertions from firing during reset?
 
 Call :code:`Verilated::assertOn(false)` before you first call the model,
 then turn it back on after reset.  It defaults to true.  When false, all
-assertions controlled by :vlopt:`--assert` are disabled.
+assertions are disabled.
 
 
 Why do I get "undefined reference to sc_time_stamp()?

docs/guide/files.rst

@@ -112,12 +112,14 @@ In specific debug and other modes, it also creates:
 
 .. list-table::
 
-   * - *{prefix}*\ .xml
-     - XML tree information (from --xml)
+   * - *{prefix}*\ .sarif
+     - SARIF diagnostics (from --diagnostics-sarif)
    * - *{prefix}*\ .tree.json
      - JSON tree information (from --json-only)
    * - *{prefix}*\ .tree.meta.json
      - JSON tree metadata (from --json-only)
+   * - *{prefix}*\ .xml
+     - XML tree information (from --xml)
    * - *{prefix}*\ __cdc.txt
      - Clock Domain Crossing checks (from --cdc)
    * - *{prefix}*\ __stats.txt

docs/guide/install.rst

@@ -153,13 +153,13 @@ need to be present to run Verilator:
 
    sudo apt-get install git autoconf flex bison
 
-Those developing Verilator itself may also want these (see internals.rst):
+Those developing Verilator itself also need these (see internals.rst):
 
 .. code-block:: shell
 
-   sudo apt-get install clang clang-format-14 cmake gdb gprof graphviz lcov
+   sudo apt-get install clang clang-format-18 cmake gdb gprof graphviz lcov
    sudo apt-get install python3-clang python3-distro yapf3 bear jq
-   sudo pip3 install sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff
+   sudo pip3 install sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe gersemi mbake ruff sarif-tools
    sudo pip3 install git+https://github.com/antmicro/astsee.git
    cpan install Pod::Perldoc
 
@@ -182,7 +182,7 @@ Install GTKWave
 ^^^^^^^^^^^^^^^
 
 To make use of Verilator FST tracing you will want `GTKwave
-<http://gtkwave.sourceforge.net/>`__ installed, however this is not
+<https://gtkwave.sourceforge.net/>`__ installed, however this is not
 required at Verilator build time.
 
 .. code-block:: shell
@@ -194,7 +194,7 @@ Install Z3
 ^^^^^^^^^^
 
 In order to use constrained randomization the `Z3 Theorem Prover
-<https://github.com/z3prover/z3#readme>`__ must be installed, however this is
+<https://github.com/z3prover/z3>`__ must be installed, however this is
 not required at Verilator build time. There are other compatible SMT solvers,
 like CVC5/CVC4, but they are not guaranteed to work. Since different solvers are
 faster for different scenarios, the solver to use at run-time can be specified
@@ -288,7 +288,7 @@ location include the Verilator version name:
 
 Note after installing (see `Installation`_), you need to add the path to
 the ``bin`` directory to your ``PATH``. Or, if you use `modulecmd
-<http://modules.sourceforge.net/>`__, you'll want a module file like the
+<https://modules.sourceforge.net/>`__, you'll want a module file like the
 following:
 
 .. code-block:: shell

docs/guide/languages.rst

@@ -6,7 +6,7 @@ Input Languages
 ***************
 
 This section describes the languages Verilator takes as input.  See also
-:ref:`Configuration Files`.
+:ref:`Verilator Control Files`.
 
 
 Language Standard Support
@@ -90,14 +90,14 @@ wreal.
 Synthesis Directive Assertion Support
 -------------------------------------
 
-With the :vlopt:`--assert` option, Verilator reads any
+Verilator reads any :code:`//synopsys full_case` or :code:`//synopsys
+parallel_case` directives.  The same applies to any :code:`//ambit
+synthesis`, :code:`//cadence` or :code:`//pragma` directives of the same
+form.
 
-:code:`//synopsys full_case` or :code:`//synopsys parallel_case`
-directives.  The same applies to any :code:`//ambit synthesis`,
-:code:`//cadence` or :code:`//pragma` directives of the same form.
-
-When these synthesis directives are discovered, Verilator will either
-formally prove the directive to be true, or, failing that, will insert the
+When these synthesis directives are discovered, unless
+:vlopt:`--no-assert-case` option is used, Verilator will either formally
+prove the directive to be true, or, failing that, will insert the
 appropriate code to detect failing cases at simulation runtime and print an
 "Assertion failed" error message.
 
@@ -168,7 +168,7 @@ files. The :option:`/*verilator&32;timing_off*/` and
 the encompassed timing controls and forks, regardless of the chosen
 :vlopt:`--timing` or :vlopt:`--no-timing` option. This can also be achieved
 using the :option:`timing_off` and :option:`timing_off` options in Verilator
-configuration files.
+Control Files.
 
 
 .. _Language Limitations:
@@ -478,7 +478,8 @@ shortreal
   other simulators either do not support float, or convert likewise.
 
 specify specparam
-  All specify blocks and timing checks are ignored.
+  All timing checks and specify blocks (except specparam, which is
+  supported) are ignored.
 
 uwire
   Verilator does not perform warning checking on uwires; it treats the
@@ -536,4 +537,4 @@ $test$plusargs, $value$plusargs
         {VerilatedContext*} ->commandArgs(argc, argv);
 
   to register the command line before calling $test$plusargs or
-  $value$plusargs.
+  $value$plusargs. Or use :vlopt:`--binary` or :vlopt:`--main`.

docs/guide/simulating.rst

@@ -76,12 +76,14 @@ Benchmarking & Optimization
 For best performance, run Verilator with the :vlopt:`-O3`
 :vlopt:`--x-assign fast <--x-assign>`
 :vlopt:`--x-initial fast <--x-initial>`
-:vlopt:`--noassert <--assert>` options.  The :vlopt:`-O3`
+:vlopt:`--no-assert` options.  The :vlopt:`-O3`
 option will require a longer time to run Verilator, and
 :vlopt:`--x-assign fast <--x-assign>`
 :vlopt:`--x-initial fast <--x-assign>`
-may increase the risk of reset bugs in trade for performance; see the above
-documentation for these options.
+may increase the risk of reset bugs in trade for performance.  The
+:vlopt:`--no-assert` will suppress checking assertions, which is faster and
+appropriate for known-good models running software, but may hide design
+errors.  See the above documentation for these options.
 
 If using Verilated multithreaded, consider overriding Verilator's default
 thread-to-processor assignment by using ``numactl``; see
@@ -203,9 +205,6 @@ With :vlopt:`--coverage` or :vlopt:`--coverage-user`, Verilator will
 translate functional coverage points the user has inserted manually in
 SystemVerilog code through into the Verilated model.
 
-Currently, all functional coverage points are specified using SystemVerilog
-assertion syntax, which must be separately enabled with :vlopt:`--assert`.
-
 For example, the following SystemVerilog statement will add a coverage
 point under the coverage name "DefaultClock":
 
@@ -315,7 +314,7 @@ Suppressing Coverage
 Using :option:`/*verilator&32;coverage_off*/` and
 :option:`/*verilator&32;coverage_on*/` around a block of code will disable
 and enable coverage respectively around that block. Or, use the
-:option:`coverage_block_off` configuration file option.
+:option:`coverage_block_off` control file option.
 
 Verilator automatically disables coverage of lines and branches with a
 $stop in them, as it is assumed that $stop branches contain an error check

docs/guide/verilating.rst

@@ -66,6 +66,40 @@ Once a model is built, the next step is typically for the user to run it,
 see :ref:`Simulating`.
 
 
+.. _Finding and Binding Modules:
+
+Finding and Binding Modules
+===========================
+
+Verilator provides several mechanisms to find the source code containing a
+module, primitive, interface, or program ("module" in this section) and
+bind them to an instantiation.  These capabilities are similar to the
+"Precompiling in a single-pass" use model described in IEEE 1800-2023
+33.5.1, although `config` is not yet supported.
+
+Verilator first reads all files provided on the command line and
+:vlopt:`-f` files, and parses all modules within.  Each module is assigned
+to the most recent library specified with :vlopt:`-work`, thus `-work liba
+a.v -work libb b.v` will assign modules in `a.v` to `liba` and modules in
+`b.v` to `libb`.
+
+If a module is not defined from a file on the command-line, Verilator
+attempts to find a filename constructed from the module name using
+:vlopt:`-y` and `+libext`.
+
+Binding begins with the :vlopt:`--top` module, if provided. If not provided
+Verilator attempts to figure out the top module itself, and if multiple
+tops result a :option:`MULTITOP` warning is issued which may be suppressed
+(see details in :option:`MULTITOP`).
+
+Verilator will attempt to bind lower unresolved instances first in the same
+library name as the parent's instantiation library, and if not found search
+globally across all libraries in the order modules were declared.  This
+allows otherwise conflicting duplicate module names between libraries to
+coexist uniquely within each library name.  When IEEE `config use` is
+supported, more complicated selections will be able to be specified.
+
+
 .. _Hierarchical Verilation:
 
 Hierarchical Verilation
@@ -94,7 +128,7 @@ There are two ways to mark a module:
 
 * Write :option:`/*verilator&32;hier_block*/` metacomment in HDL code.
 
-* Add a :option:`hier_block` line in the :ref:`Configuration Files`.
+* Add a :option:`hier_block` line in the :ref:`Verilator Control Files`.
 
 Then pass the :vlopt:`--hierarchical` option to Verilator.
 
@@ -113,8 +147,6 @@ Hierarchy blocks have some limitations, including:
 * The hierarchy block cannot be accessed using dot (.) from the upper
   module(s) or other hierarchy blocks.
 
-* Signals in the block cannot be traced.
-
 * Modport cannot be used at the hierarchical block boundary.
 
 * The simulation speed is likely not as fast as flat Verilation, in which

docs/guide/warnings.rst

@@ -37,7 +37,7 @@ Warnings may be disabled in multiple ways:
    propagate upwards to any parent file (file that included the file with
    the lint_off).
 
-#. Disable the warning using :ref:`Configuration Files` with a
+#. Disable the warning using :ref:`Verilator Control Files` with a
    :option:`lint_off` command.  This is useful when a script suppresses
    warnings, and the Verilog source should not be changed.  This method also
    allows matching on the warning text.
@@ -68,6 +68,10 @@ source code corresponding to the error, prefixed by the line number and a "
 | ".  Following this is typically an arrow and ~ pointing at the error on
 the source line directly above.
 
+Instead of parsing this text diagnostic output, tools that need to
+understand Verilator's warning output should read the SARIF JSON output
+created with :vlopt:`--diagnostics-sarif`.
+
 
 List Of Warnings
 ================
@@ -107,6 +111,27 @@ List Of Warnings
    simulate correctly.
 
 
+.. option:: ALWNEVER
+
+   Warning that an `always @*` statement has no variables being read,
+   therefore the event list is empty, and as there are no events to wake
+   the process up, the always will never execute.
+
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_ALWNEVER_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_ALWNEVER_msg.rst
+
+   To repair, assuming the intent was to execute the statements at e.g.
+   time zero, instead use an `always_comb` statement.
+
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+
 .. option:: ASCRANGE
 
    .. TODO better example
@@ -167,6 +192,28 @@ List Of Warnings
    'pragma protect'.  Third-party pragmas not defined by IEEE 1800-2023 are
    ignored.
 
+   This error may be disabled with a lint_off BADSTDPRAGMA metacomment.
+
+   Ignoring this warning will cause the pragma to be ignored.
+
+
+.. option:: BADVLTPRAGMA
+
+   An error that a `/*verilator ...*/` metacomment pragma is badly formed
+   or not understood.
+
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_BADVLTPRAGMA_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_BADVLTPRAGMA_msg.rst
+
+   This error may be disabled with a lint_off BADVLTPRAGMA metacomment.
+
+   Ignoring this warning will cause the pragma to be ignored.
+
 
 .. option:: BLKANDNBLK
 
@@ -185,23 +232,32 @@ List Of Warnings
    public task, or when the blocking and non-blocking assignments have
    non-overlapping bits and structure members.
 
+   From Verilator 5.038, this warning is only issued when Verilator can't prove that
+   the assignments are to non-overlapping sub-parts, and the blocking
+   assignment is in combinational logic (which is the case where simulation
+   results might differ from other simulators). Review any BLKANDNBLK
+   cases carefully after this version, and sign them off as
+   described above, only if know for sure the updates are not to overlapping
+   parts of the signal.
+
    Generally, this is caused by a register driven by both combo logic and a
    flop:
 
    .. code-block:: sv
 
-         logic [1:0] foo;
-         always @(posedge clk)  foo[0] <= ...
-         always_comb foo[1] = ...
+         logic [3:0] foo;
+         always @(posedge clk) foo[index] <= ...  // With index != 0
+         always_comb foo[0] = ...
 
    Instead, use a different register for the flop:
 
    .. code-block:: sv
 
-         logic [1:0] foo;
-         always @(posedge clk)  foo_flopped[0] <= ...
-         always_comb foo[0] = foo_flopped[0];
-         always_comb foo[1] = ...
+         logic [3:0] foo;
+         logic [3:1] foo_flopped;
+         always @(posedge clk) foo_flopped[index] <= ... // With index != 0
+         always_comb foo[0] = ...
+         always_comb foo[3:1] = foo_flopped;
 
    Or, this may also avoid the error:
 
@@ -298,8 +354,8 @@ List Of Warnings
    Unique case statements that select on an enumerated variable, where all
    of the enumerated values are covered by case items, are considered
    complete even if the case statement does not cover illegal
-   non-enumerated values (IEEE 1800-2023 12.5.3).  To check that illegal
-   values are not hit, use :vlopt:`--assert`.
+   non-enumerated values (IEEE 1800-2023 12.5.3).  Verilator checks that
+   illegal values are not hit, unless :vlopt:`--no-assert-case` was used.
 
    Ignoring this warning will only suppress the lint check; it will
    simulate correctly.
@@ -337,8 +393,8 @@ List Of Warnings
 
    Warns that it is better style to use casez, and "?" in place of
    "x"'s.  See
-   `http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase_rev1_1.pdf
-   <http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase_rev1_1.pdf>`_
+   `http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase.pdf
+   <http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase.pdf>`_
 
    Ignoring this warning will only suppress the lint check; it will
    simulate correctly.
@@ -412,8 +468,8 @@ List Of Warnings
    is suppressed, Verilator, like synthesis, will convert this to a
    non-delayed assignment, which may result in logic races or other
    nasties.  See
-   `http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA_rev1_2.pdf
-   <http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA_rev1_2.pdf>`_
+   `http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA.pdf
+   <http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA.pdf>`_
 
    Ignoring this warning may make Verilator simulations differ from other
    simulators.
@@ -423,7 +479,7 @@ List Of Warnings
 
    Warns that Verilator does not support certain forms of
    :code:`constraint`, :code:`constraint_mode`, or :code:`rand_mode`, and
-   the construct was are ignored.
+   the construct was ignored.
 
    Ignoring this warning may make Verilator randomize() simulations differ
    from other simulators.
@@ -451,7 +507,7 @@ List Of Warnings
 
    Warns that Verilator does not support certain forms of
    :code:`covergroup`, :code:`coverpoint`, and coverage options, and the
-   construct was are ignored.
+   construct was ignored.
 
    Disabling the :option:`UNSUPPORTED` error also disables this warning.
 
@@ -476,7 +532,8 @@ List Of Warnings
 
 .. option:: DEFOVERRIDE
 
-   Warns that a macro definition within the code is being overridden by a command line directive:
+   Warns that a macro definition within the code is being overridden by a
+   command line directive:
 
    For example, running Verilator with :code:`<+define+\<DUP\>=\<def2\>>` and
 
@@ -673,6 +730,28 @@ List Of Warnings
    missing."
 
 
+.. option:: ENUMITEMWIDTH
+
+   An error that an enum item value is being assigned from a value which
+   would be truncated (similar to :option:`WIDTHTRUNC`), or from a sized
+   literal constant with a different bit width (similar to
+   :option:`WIDTHTRUNC` or :option:`WIDTHEXPAND`).  IEEE requires this
+   error, but it may be disabled.
+
+   Faulty example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 2
+
+         typedef enum [3:0] {
+            WRONG_WIDTH = 33'h3  //<--- Warning
+         } enum_t;
+
+   To repair, correct the size of the item's value directly, or use a cast,
+   so the resulting width matches the enum's width.
+
+
 .. option:: ENUMVALUE
 
    An error that an enum data type value is being assigned from another data
@@ -1081,8 +1160,6 @@ List Of Warnings
 
 .. option:: LITENDIAN
 
-   .. TODO better example
-
    The naming of this warning is in contradiction with the common
    interpretation of little endian. It was therefore renamed to
    :option:`ASCRANGE`. While :option:`LITENDIAN` remains for
@@ -1158,6 +1235,19 @@ List Of Warnings
    discarded.
 
 
+.. option:: MODMISSING
+
+   .. TODO better example
+
+   Error that a module, typically referenced by a cell, was not found.
+   This is typically fatal, but may be suppressed in some linting
+   situations with missing libraries.
+
+   Ignoring this error will cause the cell definition to be discarded.
+   Simulation results will likely be wrong, so typically used only with
+   lint-only.
+
+
 .. option:: MULTIDRIVEN
 
    Warns that the specified signal comes from multiple :code:`always`
@@ -1214,6 +1304,8 @@ List Of Warnings
    modules' signals seem identical, e.g., multiple modules with a "clk"
    input.
 
+   Ignoring this warning will make multiple tops, as described in (3) above.
+
 
 .. option:: NEEDTIMINGOPT
 
@@ -1237,6 +1329,21 @@ List Of Warnings
    simulate correctly.
 
 
+.. option:: NOEFFECT
+
+   Warns that the statement will have no effect and is roughly equivalent
+   to not being present.  This is only issued when it is "non-obvious",
+   e.g. a :code:`if (0)` will not result in this warning.
+
+   Faulty example:
+
+   .. code-block:: sv
+
+         foreach (array[]) begin ... end  //<--- Warning
+
+   For a fix, remove the statement.
+
+
 .. option:: NOLATCH
 
    .. TODO better example
@@ -1256,6 +1363,9 @@ List Of Warnings
    :code:`$psprintf` system function is replaced by its standard equivalent
    :code:`$sformatf`.
 
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
 
 .. option:: NOTIMING
 
@@ -1289,6 +1399,27 @@ List Of Warnings
    simulate correctly.
 
 
+.. option:: PARAMNODEFAULT
+
+   An error that a parameter is being declared that has no default value,
+   and this is being done in a non-ANSI block while this is only legal in
+   ANSI-style `#(...)` declarations.  IEEE 1800-2023 6.20.1 requires this
+   error, but some simulators accept this syntax.
+
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_PARAMNODEFAULT_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_PARAMNODEFAULT_msg.rst
+
+   To fix the issue, move to an ANSI-style declaration.
+
+   Suppressing this error will only suppress the IEEE-required check; it
+   will simulate correctly.
+
+
 .. option:: PINCONNECTEMPTY
 
    .. TODO better example
@@ -1315,11 +1446,11 @@ List Of Warnings
 
    Faulty example:
 
-   .. include:: ../../docs/gen/ex_PKGNODECL_faulty.rst
+   .. include:: ../../docs/gen/ex_PINMISSING_faulty.rst
 
    Results in:
 
-   .. include:: ../../docs/gen/ex_PKGNODECL_msg.rst
+   .. include:: ../../docs/gen/ex_PINMISSING_msg.rst
 
    Repaired example:
 
@@ -1379,22 +1510,11 @@ List Of Warnings
 
 .. option:: PKGNODECL
 
-   An error that a package/class appears to have been referenced that has
-   not yet been declared.  According to IEEE 1800-2023 26.3, all packages
-   must be declared before being used.
-
-   Faulty example:
-
-   .. include:: ../../docs/gen/ex_PKGNODECL_faulty.rst
-
-   Results in:
-
-   .. include:: ../../docs/gen/ex_PKGNODECL_msg.rst
-
-   Often the package is declared in its own header file.  In this case add
-   an include of that package header file to the referencing file.  (And
-   make sure you have header guards in the package's header file to prevent
-   multiple declarations of the package.)
+   Never issued since version 5.038.  Historically an error that a
+   package/class appears to have been referenced that has not yet been
+   declared.  According to IEEE 1800-2023 26.3, all packages must be
+   declared before being used. However, several standard libraries
+   including UVM violate this, and other tools do not warn.
 
 
 .. option:: PORTSHORT
@@ -1444,6 +1564,40 @@ List Of Warnings
    The portable way to suppress this warning is to use a define value other
    than zero, when it is to be used in a preprocessor expression.
 
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+
+.. option:: PROCASSINIT
+
+   Warns that the specified signal is given an initial value where it is
+   declared, and is also driven in an always process.  Typically such
+   initial values should instead be set using a reset signal inside the
+   process, to match requirements of ASIC synthesis tools.  However,
+   declaration initializers are a valid FPGA design idiom and therefore,
+   FPGA users may want to disable this warning.
+
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_PROCASSINIT_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_PROCASSINIT_msg.rst
+
+   One possible fix, adding a reset to the always:
+
+   .. include:: ../../docs/gen/ex_PROCASSINIT_fixed.rst
+
+   Alternatively, use an initial block for the initialization:
+
+   .. code-block:: sv
+
+      initial flop_out = 1;  // <--- Fixed
+
+   Disabled by default as this is a code-style warning; it will simulate
+   correctly.
+
 
 .. option:: PROCASSWIRE
 
@@ -1475,10 +1629,23 @@ List Of Warnings
    inside the protected region will be partly checked for correctness but is
    otherwise ignored.
 
-   Suppressing the warning may make Verilator differ from a simulator that
+   Ignoring the warning may make Verilator differ from a simulator that
    accepts the protected code.
 
 
+.. option:: PROTOTYPEMIS
+
+   Error that a function prototype does not match in some respects the
+   out-of-block declaration of that function. IEEE requires this error.
+
+   The typical solution is to fix the prototype to match the declaration
+   exactly, including in number of arguments, name of arguments, argument
+   data types, and return data type (for functions).
+
+   Disabling this error will cause Verilator to ignore the prototype and
+   may make the code illegal in other tools.
+
+
 .. option:: RANDC
 
    Historical, never issued since version 5.018, when :code:`randc` became
@@ -1493,6 +1660,9 @@ List Of Warnings
    Warns that a real number is being implicitly rounded to an integer, with
    possible loss of precision.
 
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
    Faulty example:
 
    .. code-block:: sv
@@ -1522,8 +1692,12 @@ List Of Warnings
 
 .. option:: REDEFMACRO
 
-   Warns that the code has redefined the same macro with a different value,
-   for example:
+   Warns that the code has redefined the same macro with a different value.
+
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+   For example:
 
    .. code-block:: sv
       :linenos:
@@ -1660,6 +1834,18 @@ List Of Warnings
    simulators.
 
 
+.. option:: SPECIFYIGN
+
+   Warns that Verilator does not support certain constructs in
+   :code:`specify` blocks, nor :code:`$sdf_annotate`, and the construct was
+   ignored.
+
+   Disabling the :option:`UNSUPPORTED` error also disables this warning.
+
+   Ignoring this warning may make Verilator ignore lint checking on the
+   construct, and get different results from other simulators.
+
+
 .. option:: SPLITVAR
 
    Warns that a variable with a :option:`/*verilator&32;split_var*/`
@@ -2146,7 +2332,7 @@ List Of Warnings
 
    .. include:: ../../docs/gen/ex_VARHIDDEN_msg.rst
 
-   To resolve this, rename the variable to an unique name.
+   To resolve this, rename the inner or outer variable to an unique name.
 
 
 .. option:: WAITCONST

docs/internals.rst

@@ -450,7 +450,7 @@ as defined in the standard:
 - All other logic is assigned to the 'nba' region.
 
 For completeness, note that a subset of the 'act' region logic, specifically,
-the logic related to the pre-assignments of NBA updates (i.e., AstAssignPre
+the logic related to the pre-assignments of NBA updates (i.e., AstAlwaysPre
 nodes), is handled separately, but is executed as part of the 'act' region.
 
 Also note that all logic representing the committing of an NBA (i.e., Ast*Post)
@@ -1131,7 +1131,7 @@ Indentation and Naming Style
 ----------------------------
 
 We will work with contributors to fix up indentation style issues, but it
-is appreciated if you could match our style:
+is appreciated if you could match our style for C/C++:
 
 - Use "mixedCapsSymbols" instead of "underlined_symbols".
 
@@ -1143,9 +1143,8 @@ is appreciated if you could match our style:
   calls. (This convention has not been applied retroactively.)
 
 C and Python indentation is automatically maintained with "make format"
-using clang-format version 10.0.0, and yapf for python, and is
-automatically corrected in the CI actions. For those manually formatting C
-code:
+using clang-format version 18, and yapf for Python, and is automatically
+corrected in the CI actions. For those manually formatting C code:
 
 - Use four spaces per level, and no tabs.
 
@@ -1157,6 +1156,58 @@ code:
 - No spaces before semicolons, nor between a function's name and open
   parenthesis (only applies to functions; if/else has a following space).
 
+Verilog indentation is not yet automatically maintained, but:
+
+- Use two spaces per level, and no tabs.
+
+- Place `begin` on the same line as the earlier starting statement
+  e.g. `if`, and place the `end` on a separate line indented the same as
+  the starting statement.
+
+
+Commit messages
+---------------
+
+Pull requests do not typically edit ``Changes`` in order to reduce
+potential merge conflicts.  Instead, contributors should use an appropriate
+first line of the git commit message.  Maintainers periodically run
+``nodist/log_changes`` which analyzes the commit messages to suggest edits
+to the ``Changes`` file.
+
+The format of a commit message should be typically of the forms below.  The
+github issue number, and github pull number if different should be
+included.
+
+"Add <some feature> (#1234)"
+   For adding a new feature.
+"Fix <some item> (#1234)"
+   For a bug fix.
+"Improve <some item> (#1234)"
+   For improving something that previously existed.
+"Optimize <some item> (#1234)"
+   For improving performance.
+"Support <some feature> (#1234)"
+   For features that are described by IEEE were previously not supported.
+"Commentary"
+   For a super-trivial change to e.g. documentation.
+   These will typically not get described in the Changes file.
+"CI: <Add/Improve/etc as above> (#1234)"
+   For changes that only concern github actions.
+   These will typically not get described in the Changes file.
+"Tests: <Add/Improve/etc as above> (#1234)"
+   For changes that only concern tests.
+   These will typically not get described in the Changes file.
+"Internals: <Add/Improve/etc as above> (#1234)"
+   For changes that only concern developers, e.g. code cleanups.
+   These will typically not get described in the Changes file.
+
+The line's grammar should match the phrasing used in the Changes file.
+
+If the change does not affect user-visible function, also add "No
+functional change." if it's 99% certain not to change behavior, or "No
+functional change expected." if no change was expected but there may be
+uncertainty.
+
 
 The ``astgen`` Script
 ---------------------
@@ -1164,7 +1215,7 @@ The ``astgen`` Script
 The ``astgen`` script is used to generate some of the repetitive C++ code
 related to the ``AstNode`` type hierarchy. An example is the abstract ``visit``
 methods in ``VNVisitor``. There are other uses; please see the ``*__gen*``
-files in the bulid directories and the ``astgen`` script for details.  A
+files in the build directories and the ``astgen`` script for details.  A
 description of the more advanced features of ``astgen`` are provided here.
 
 
@@ -1470,7 +1521,7 @@ Preparing to Run Tests
 
 For all tests to pass, you must install the following packages:
 
--  SystemC to compile the SystemC outputs, see http://systemc.org
+-  SystemC to compile the SystemC outputs, see https://systemc.org
 
 -  vcddiff to find differences in VCD outputs. See the readme at
    https://github.com/veripool/vcddiff
@@ -1569,6 +1620,41 @@ environment can check their branches too by enabling the build workflow:
 
 -  Click Enable workflow.
 
+Benchmarking
+------------
+
+For benchmarking the effects of changes (simulation speed, memory consumption,
+Verilation time, etc.), you can use `RTLMeter
+<https://github.com/verilator/rtlmeter>`__, a benchmark suite designed for this
+purpose. The scripts provided with RTLMeter have many capabilities. For full
+details, see the `documentation of RTLMeter
+<https://verilator.github.io/rtlmeter>`__ itself.
+
+For a quick check, you an run the following after putting ``verilator`` on your
+``PATH``:
+
+.. code:: shell
+
+  ./rtlmeter run --cases "+standard" --workRoot work-a
+  ./rtlmeter report work-a
+
+To compare against an alternate version, again put that alternate ``verilator``
+on your ``PATH`` then run:
+
+.. code:: shell
+
+  ./rtlmeter run --cases "+standard" --workRoot work-b
+  ./rtlmeter compare work-a work-b
+
+The continuous integration system in GitHub Actions runs this benchmark suite
+nightly on the master branch. The performance numbers from these nightly runs
+can be viewed via the `RTLMeter results dashboard
+<https://verilator.github.io/verilator-rtlmeter-results>`__. Note that these
+results are collected on GitHub hosted runners. These are virtual machines
+operating in a potentially noisy environment, so time measurements can have
+significant variance. Experience shows that a ~20% time difference can be
+reliably measured on GitHub hosted runners, and smaller differences are
+noticeable over a few days of reruns as trends emerge from the noise.
 
 Fuzzing
 -------
@@ -1633,7 +1719,7 @@ scaled so it can be more useful with large graphs.
 
 For interactive graph viewing consider `xdot
 <https://github.com/jrfonseca/xdot.py>`__ or `ZGRViewer
-<http://zvtm.sourceforge.net/zgrviewer.html>`__. If you know of better
+<https://zvtm.sourceforge.net/zgrviewer.html>`__. If you know of better
 viewers (especially for large graphs) please let us know.
 
 
@@ -1903,7 +1989,7 @@ find what made a <e#*#*> line in the tree dumps):
 
 ::
 
-   watch AstNode::s_editCntGbl==####
+   watch AstNode::s_editCntGbl=####
 
 Then, when the watch fires, to break at every following change to that
 node:
@@ -1960,10 +2046,8 @@ Generally, what would you do to add a new feature?
 
 2. Make a testcase in the test_regress/t/t_EXAMPLE format, see `Testing`.
 
-3. If grammar changes are needed, look at the git version of VerilogPerl's
-   src/VParseGrammar.y, as this grammar supports the full SystemVerilog
-   language and has a lot of back-and-forth with Verilator's grammar. Copy
-   the appropriate rules to src/verilog.y and modify the productions.
+3. If grammar changes are needed, look at the IEEE 1800-2023 Appendix A, as
+   src/verilog.y generally follows the same rule layout.
 
 4. If a new Ast type is needed, add it to the appropriate V3AstNode*.h.
    Follow the convention described above about the AstNode type hierarchy.
@@ -2030,6 +2114,14 @@ the regression tests with OBJCACHE enabled and in parallel on a machine
 with many cores.  See the -j option and OBJCACHE environment variable.
 
 
+driver.py Pass-Thru Arguments
+-----------------------------
+
+Arguments not understood by `driver.py` which begin with `+verilator+` are
+passed through as Verilated executable arguments. Other not-understood
+arguments are passed as Verilator arguments.
+
+
 driver.py Non-Scenario Arguments
 --------------------------------
 

docs/security.rst

@@ -0,0 +1,41 @@
+.. for github, vim: syntax=reStructuredText
+
+Security Policy
+===============
+
+If you believe you have found a security issue in any Verilator-owned
+repository, create a `GitHub repository security advisory
+<https://docs.github.com/en/code-security/security-advisories/working-with-repository-security-advisories/creating-a-repository-security-advisory>`__.
+We request that you please not publicly disclose the issue until it has
+been addressed by us.
+
+SystemVerilog Security
+----------------------
+
+The SystemVerilog language includes `$system`, etc. operating system calls,
+and as such executables created by Verilator should be considered insecure.
+In contrast, it is a security issue if a Verilator-created data file, such
+as a coverage data file, when read with `verilator_coverage`, allows
+arbitrary code execution.
+
+Bug bounties
+------------
+
+While we encourage reports of suspected security problems, we are an open
+source project, and do not run any bug bounty programs.
+
+Preferred Languages
+-------------------
+
+We prefer all communications to be in English.
+
+Policy
+------
+
+We follow the principle of `Coordinated Vulnerability Disclosure
+<https://en.wikipedia.org/wiki/Coordinated_vulnerability_disclosure>`__.
+
+Distribution
+------------
+
+SPDX-License-Identifier: CC0-1.0

docs/spelling.txt

@@ -144,6 +144,7 @@ Gileadi
 Giri
 Gisselquist
 Gladkikh
+GmbH
 Goessling
 Gonnen
 Goorah
@@ -246,10 +247,12 @@ Lesik
 Libenzi
 Licker
 Liland
+LinkDot
 Liu
 Liwei
 Lockhart
 Longo
+LteS
 Luca
 Luiza
 Lussier
@@ -273,6 +276,7 @@ Mednick
 Mei
 Melo
 Menküc
+Menon
 Michail
 Michiels
 Microsystems
@@ -303,12 +307,14 @@ Nauticus
 Newgard
 Nigam
 Nikana
+Niraj
 Niranjan
 Nitza
 Noack
 Nodine
 Ober
 Oleg
+Oler
 Olof
 Olofsson
 Oron
@@ -329,6 +335,7 @@ Prabhat
 Prabhu
 Prateek
 Pre
+Precompiling
 Preprocess
 Pretet
 Pretl
@@ -402,6 +409,7 @@ Stroebel
 Strouble
 Stucki
 Su
+Subst
 Suguimoto
 Sundararajan
 Sunderland
@@ -437,6 +445,7 @@ UNOPTFLAT
 Ubixum
 Ueno
 Uints
+Undefine
 Undefines
 Unsized
 Urbach
@@ -462,6 +471,7 @@ Verilog
 Vighnesh
 Viktor
 Vilp
+VlWide
 Vlip
 Vm
 Vukobratovic
@@ -473,6 +483,7 @@ Wfuture
 Whatson
 Wildman
 Wim
+Wipfli
 Wmisleading
 Wno
 Wojciech
@@ -503,6 +514,7 @@ Zhang
 abirkmanis
 accessor
 accessors
+acyclic
 adrienlemasle
 agrobman
 ahouska
@@ -533,10 +545,12 @@ basename
 bbox
 benchmarking
 biguint
+binToOneHot
 bindir
 biops
 bisonpre
 bitOpTree
+bitaggregat
 bitop
 bitstoreal
 blackbox
@@ -575,19 +589,24 @@ combinational
 combinatorial
 commandArgsPlusMatch
 compilable
+computable
 concat
+concatenatable
 concats
 conf
 config
 const
 constexpr
+constification
 constpool
+contify
 coredump
 coroutine
 coroutines
 countbits
 countones
 cout
+covergroup
 cpp
 cppstyle
 cpu
@@ -612,9 +631,13 @@ defparam
 demangling
 dep
 deparametrized
+deque
 der
 dereference
+dereferenced
+dereferencing
 desassign
+deserialize
 destructor
 desynchronization
 detections
@@ -622,6 +645,7 @@ dev
 devcontainer
 devel
 dir
+disambiguates
 displayb
 distcc
 doxygen
@@ -650,6 +674,7 @@ elab
 eliasphanna
 elike
 elsif
+enablement
 endcase
 endcelldefine
 endclass
@@ -742,6 +767,8 @@ hierCMakeArgs
 hierMkArgs
 hierParameters
 hierVer
+html
+https
 hx
 hyperthreading
 hyperthreads
@@ -790,6 +817,7 @@ libtcmalloc
 libverilated
 linkers
 linter
+linters
 linux
 liu
 livelock
@@ -839,6 +867,7 @@ multithread
 multithreaded
 multithreading
 musl
+mutex
 mutexes
 mux
 muzafferkal
@@ -868,6 +897,7 @@ onehot
 ooo
 oprofile
 ortegon
+oversized
 oversubscription
 parallelized
 param
@@ -904,6 +934,7 @@ pre
 precisions
 precompiled
 predefines
+prefetch
 prepareClone
 prepend
 prepended
@@ -949,6 +980,8 @@ realtime
 realtobits
 recoding
 recrem
+recurse
+recurses
 redeclaring
 regs
 reloop
@@ -965,6 +998,7 @@ runtimes
 rw
 sVerilator
 saif
+sarif
 sawatzke
 sc
 scalared
@@ -1023,6 +1057,7 @@ swrite
 synthesizeable
 sys
 systemc
+taskify
 tcmalloc
 tenghtt
 testbench
@@ -1060,6 +1095,7 @@ typename
 uint
 un
 unbased
+uncomment
 undef
 undefineall
 undriven
@@ -1077,6 +1113,7 @@ unroller
 unsized
 unsup
 untyped
+upcasting
 urandom
 uselib
 utimes

examples/cmake_hello_c/Makefile

@@ -20,28 +20,28 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-TARGET := nocmake
+  TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifeq ($(CMAKE_GT_3_8),true)
-TARGET := run
-else
-TARGET := oldcmake
-endif
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifeq ($(CMAKE_GT_3_8),true)
+    TARGET := run
+  else
+    TARGET := oldcmake
+  endif
 endif
 
 default: $(TARGET)

examples/cmake_hello_sc/Makefile

@@ -20,46 +20,44 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-	TARGET := nocmake
-else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifneq ($(CMAKE_GT_3_8),true)
-TARGET := oldcmake
+  TARGET := nocmake
 else
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifneq ($(CMAKE_GT_3_8),true)
+    TARGET := oldcmake
+  else
+    # Check if SC exists via a verilator call (empty if not)
+    SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
 
-# Check if SC exists via a verilator call (empty if not)
-SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
+    # Test whether SystemC is installed with CMake support
+    # This will print a CMake error about processing arguments that can (currently) be ignored.
+    ifneq (,$(SYSTEMC_EXISTS))
+      FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
+      ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
+        SYSTEMC_SET := true
+      endif
+    endif
 
-# Test whether SystemC is installed with CMake support
-# This will print a CMake error about processing arguments that can (currently) be ignored.
-ifneq (,$(SYSTEMC_EXISTS))
-FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
-ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
-SYSTEMC_SET := true
-endif
-endif
-
-ifeq ($(SYSTEMC_SET), true)
-TARGET := run
-else
-TARGET := nosc
-endif
-
-endif
+    ifeq ($(SYSTEMC_SET), true)
+      TARGET := run
+    else
+      TARGET := nosc
+    endif
+  endif
 endif
 
 default: $(TARGET)

examples/cmake_protect_lib/Makefile

@@ -20,28 +20,28 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-TARGET := nocmake
+  TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifeq ($(CMAKE_GT_3_8),true)
-TARGET := run
-else
-TARGET := oldcmake
-endif
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifeq ($(CMAKE_GT_3_8),true)
+    TARGET := run
+  else
+    TARGET := oldcmake
+  endif
 endif
 
 default: $(TARGET)

examples/cmake_tracing_c/Makefile

@@ -20,28 +20,28 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-TARGET := nocmake
+  TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifeq ($(CMAKE_GT_3_8),true)
-TARGET := run
-else
-TARGET := oldcmake
-endif
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifeq ($(CMAKE_GT_3_8),true)
+    TARGET := run
+  else
+    TARGET := oldcmake
+  endif
 endif
 
 default: $(TARGET)

examples/cmake_tracing_sc/Makefile

@@ -20,46 +20,44 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-	TARGET := nocmake
-else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifneq ($(CMAKE_GT_3_8),true)
-TARGET := oldcmake
+  TARGET := nocmake
 else
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifneq ($(CMAKE_GT_3_8),true)
+    TARGET := oldcmake
+  else
+    # Check if SC exists via a verilator call (empty if not)
+    SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
 
-# Check if SC exists via a verilator call (empty if not)
-SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
+    # Test whether SystemC is installed with CMake support
+    # This will print a CMake error about processing arguments that can (currently) be ignored.
+    ifneq (,$(SYSTEMC_EXISTS))
+      FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
+      ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
+        SYSTEMC_SET := true
+      endif
+    endif
 
-# Test whether SystemC is installed with CMake support
-# This will print a CMake error about processing arguments that can (currently) be ignored.
-ifneq (,$(SYSTEMC_EXISTS))
-FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
-ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
-SYSTEMC_SET := true
-endif
-endif
-
-ifeq ($(SYSTEMC_SET), true)
-TARGET := run
-else
-TARGET := nosc
-endif
-
-endif
+    ifeq ($(SYSTEMC_SET), true)
+      TARGET := run
+    else
+      TARGET := nosc
+    endif
+  endif
 endif
 
 default: $(TARGET)

examples/json_py/Makefile

@@ -15,10 +15,10 @@
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 DOT = dot
@@ -31,17 +31,15 @@ PYTHON_VERSION_MINOR := $(word 2,${PYTHON_VERSION_FULL})
 PYTHON_GE_3_5 := $(shell [ ${PYTHON_VERSION_MAJOR} -eq 3 -a ${PYTHON_VERSION_MINOR} -ge 5 ] && echo true)
 
 ifeq (${PYTHON_GE_3_5},true)
-default: test
+  default: test
 else
-default: python_message
+  default: python_message
 endif
 
 python_message:
 	@echo "Found Python version ${PYTHON_VERSION}, but require >= 3.5"
 
-test: \
-	test-vl_file_copy \
-	test-vl_hier_graph \
+test: test-vl_file_copy test-vl_hier_graph
 
 test-vl_file_copy:
 	@echo "-- vl_file_copy example"

examples/json_py/sub.v

@@ -7,12 +7,12 @@
 
 module sub
   #(parameter type TYPE_t = logic)
-   (
-    input  TYPE_t in,
-    output TYPE_t out
-    );
+  (
+   input  TYPE_t in,
+   output TYPE_t out
+   );
 
-   // Some simple logic
-   always_comb out = ~in;
+  // Some simple logic
+  always_comb out = ~in;
 
 endmodule

examples/json_py/vl_hier_graph

@@ -58,11 +58,11 @@ class VlHierGraph:
                     top_module = False
                 fh.write("];\n")
 
-                cells = self.flatten(mod, lambda n: n['type'] == "CELL")
-                for cell in cells:
-                    def_number = self.addr_to_vertex_number(cell['modp'])
+                instances = self.flatten(mod, lambda n: n['type'] == "CELL")
+                for inst in instances:
+                    def_number = self.addr_to_vertex_number(inst['modp'])
                     fh.write("  n%d->n%d [label=\"%s\"];\n" %
-                             (mod_number, def_number, cell['name']))
+                             (mod_number, def_number, inst['name']))
 
             fh.write("}\n")
 

examples/make_hello_binary/Makefile

@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -26,10 +26,10 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 default:

examples/make_hello_binary/top.v

@@ -7,8 +7,8 @@
 // See also https://verilator.org/guide/latest/examples.html"
 
 module top;
-   initial begin
-      $display("Hello World!");
-      $finish;
-   end
+  initial begin
+    $display("Hello World!");
+    $finish;
+  end
 endmodule

examples/make_hello_c/Makefile

@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -26,10 +26,10 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 default:

examples/make_hello_c/top.v

@@ -7,8 +7,8 @@
 // See also https://verilator.org/guide/latest/examples.html"
 
 module top;
-   initial begin
-      $display("Hello World!");
-      $finish;
-   end
+  initial begin
+    $display("Hello World!");
+    $finish;
+  end
 endmodule

examples/make_hello_sc/Makefile

@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -26,19 +26,19 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 # Check if SC exists via a verilator call (empty if not)
 SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
 
 ifneq ($(SYSTEMC_EXISTS),)
-default: run
+  default: run
 else
-default: nosc
+  default: nosc
 endif
 
 run:

examples/make_hello_sc/top.v

@@ -7,8 +7,8 @@
 // See also https://verilator.org/guide/latest/examples.html"
 
 module top;
-   initial begin
-      $display("Hello World!");
-      $finish;
-   end
+  initial begin
+    $display("Hello World!");
+    $finish;
+  end
 endmodule

examples/make_protect_lib/Makefile

@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -23,10 +23,10 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 VERILATOR_FLAGS =
@@ -90,7 +90,6 @@ run:
 	@echo "To see waveforms, open logs/vlt_dump.vcd in a waveform viewer"
 	@echo
 
-
 ######################################################################
 # Other targets
 

examples/make_protect_lib/secret_impl.v

@@ -9,22 +9,29 @@
 
 module secret_impl
   (
-   input [31:0]        a,
-   input [31:0]        b,
+   input [31:0]      a,
+   input [31:0]      b,
    output logic [31:0] x,
-   input               clk);
+   input          clk,
+   input          reset_l);
 
-   logic [31:0]        accum_q = 0;
-   logic [31:0]        secret_value = 9;
+  logic [31:0] accum_q;
+  logic [31:0] secret_value;
 
-   initial $display("[%0t] %m: initialized", $time);
+  initial $display("[%0t] %m: initialized", $time);
 
-   always @(posedge clk) begin
+  always @(posedge clk) begin
+    if (!reset_l) begin
+      accum_q <= 0;
+      secret_value <= 9;
+    end
+    else begin
       accum_q <= accum_q + a;
       if (accum_q > 10)
         x <= b;
       else
         x <= a + b + secret_value;
-   end
+    end
+  end
 
 endmodule

examples/make_protect_lib/top.v

@@ -8,29 +8,39 @@
 
 module top (input clk);
 
-   integer cyc = 0;
-   logic [31:0] a = 0;
-   logic [31:0] b = 0;
-   logic [31:0] x;
+  int cyc;
+  logic reset_l;
+  logic [31:0] a;
+  logic [31:0] b;
+  logic [31:0] x;
 
-   verilated_secret secret (.a, .b, .x, .clk);
+  verilated_secret secret (.a, .b, .x, .clk, .reset_l);
 
-   always @(posedge clk) begin
-      $display("[%0t] cyc=%0d a=%0d b=%0d x=%0d", $time, cyc, a, b, x);
-      cyc <= cyc + 1;
-      if (cyc == 0) begin
-         a <= 5;
-         b <= 7;
-      end else if (cyc == 1) begin
-         a <= 6;
-         b <= 2;
-      end else if (cyc == 2) begin
-         a <= 1;
-         b <= 9;
-      end else if (cyc > 3) begin
-         $display("Done");
-         $finish;
-      end
-   end
+  always @(posedge clk) begin
+    $display("[%0t] cyc=%0d a=%0d b=%0d x=%0d", $time, cyc, a, b, x);
+    cyc <= cyc + 1;
+    if (cyc == 0) begin
+      reset_l <= 0;
+      a <= 0;
+      b <= 0;
+    end
+    else if (cyc == 1) begin
+      reset_l <= 1;
+      a <= 5;
+      b <= 7;
+    end
+    else if (cyc == 2) begin
+      a <= 6;
+      b <= 2;
+    end
+    else if (cyc == 3) begin
+      a <= 1;
+      b <= 9;
+    end
+    else if (cyc > 4) begin
+      $display("Done");
+      $finish;
+    end
+  end
 
 endmodule

examples/make_tracing_c/Makefile

@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -23,12 +23,12 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 
 # Generate C++ in executable form
@@ -89,7 +89,6 @@ run:
 	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
 	@echo
 
-
 ######################################################################
 # Other targets
 

examples/make_tracing_c/Makefile_obj

@@ -32,7 +32,7 @@ CPPFLAGS += -DVL_DEBUG=1
 # For testing inside Verilator, "configure --enable-ccwarn" will do this
 # automatically; otherwise you may want this unconditionally enabled
 ifeq ($(CFG_WITH_CCWARN),yes)  # Local... Else don't burden users
-USER_CPPFLAGS_WALL += -W -Werror -Wall
+  USER_CPPFLAGS_WALL += -W -Werror -Wall
 endif
 
 # See the benchmarking section of bin/verilator.
@@ -51,5 +51,5 @@ OPT_FAST = -Os -fstrict-aliasing
 
 DEPS := $(wildcard *.d)
 ifneq ($(DEPS),)
-include $(DEPS)
+  include $(DEPS)
 endif

examples/make_tracing_c/sub.v

@@ -11,32 +11,32 @@ module sub
    input reset_l
    );
 
-   // Example counter/flop
-   reg [31:0] count_c;
-   always_ff @(posedge clk) begin
-      if (!reset_l) begin
-         /*AUTORESET*/
-         // Beginning of autoreset for uninitialized flops
-         count_c <= 32'h0;
-         // End of automatics
+  // Example counter/flop
+  reg [31:0] count_c;
+  always_ff @(posedge clk) begin
+    if (!reset_l) begin
+      /*AUTORESET*/
+      // Beginning of autoreset for uninitialized flops
+      count_c <= 32'h0;
+      // End of automatics
+    end
+    else begin
+      count_c <= count_c + 1;
+      if (count_c >= 3) begin
+        // This write is a magic value the Makefile uses to make sure the
+        // test completes successfully.
+        $write("*-* All Finished *-*\n");
+        $finish;
       end
-      else begin
-         count_c <= count_c + 1;
-         if (count_c >= 3) begin
-            // This write is a magic value the Makefile uses to make sure the
-            // test completes successfully.
-            $write("*-* All Finished *-*\n");
-            $finish;
-         end
-      end
-   end
+    end
+  end
 
-   // An example assertion
-   always_ff @(posedge clk) begin
-      AssertionExample : assert (!reset_l || count_c < 100);
-   end
+  // An example assertion
+  always_ff @(posedge clk) begin
+    AssertionExample : assert (!reset_l || count_c < 100);
+  end
 
-   // And example coverage analysis
-   cover property (@(posedge clk) count_c == 3);
+  // And example coverage analysis
+  cover property (@(posedge clk) count_c == 3);
 
 endmodule

examples/make_tracing_c/top.v

@@ -11,36 +11,36 @@
 module top
   (
    // Declare some signals so we can see how I/O works
-   input              clk,
-   input              reset_l,
+   input          clk,
+   input          reset_l,
 
    output wire [1:0]  out_small,
    output wire [39:0] out_quad,
    output wire [69:0] out_wide,
-   input [1:0]        in_small,
-   input [39:0]       in_quad,
-   input [69:0]       in_wide
+   input [1:0]      in_small,
+   input [39:0]     in_quad,
+   input [69:0]     in_wide
    );
 
-   // Connect up the outputs, using some trivial logic
-   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
-   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
-   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+  // Connect up the outputs, using some trivial logic
+  assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
+  assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+  assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
 
-   // And an example sub module. The submodule will print stuff.
-   sub sub (/*AUTOINST*/
-            // Inputs
-            .clk                        (clk),
-            .reset_l                    (reset_l));
+  // And an example sub module. The submodule will print stuff.
+  sub sub (/*AUTOINST*/
+           // Inputs
+           .clk                         (clk),
+           .reset_l                     (reset_l));
 
-   // Print some stuff as an example
-   initial begin
-      if ($test$plusargs("trace") != 0) begin
-         $display("[%0t] Tracing to logs/vlt_dump.vcd...\n", $time);
-         $dumpfile("logs/vlt_dump.vcd");
-         $dumpvars();
-      end
-      $display("[%0t] Model running...\n", $time);
-   end
+  // Print some stuff as an example
+  initial begin
+    if ($test$plusargs("trace") != 0) begin
+      $display("[%0t] Tracing to logs/vlt_dump.vcd...\n", $time);
+      $dumpfile("logs/vlt_dump.vcd");
+      $dumpvars();
+    end
+    $display("[%0t] Model running...\n", $time);
+  end
 
 endmodule

examples/make_tracing_sc/Makefile

@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -23,12 +23,12 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 
 VERILATOR_FLAGS =
@@ -60,9 +60,9 @@ SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
 ######################################################################
 
 ifneq ($(SYSTEMC_EXISTS),)
-default: run
+  default: run
 else
-default: nosc
+  default: nosc
 endif
 
 run:
@@ -98,7 +98,6 @@ run:
 	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
 	@echo
 
-
 ######################################################################
 # Other targets
 

examples/make_tracing_sc/Makefile_obj

@@ -31,7 +31,7 @@ CPPFLAGS += -Wno-deprecated
 # For testing inside Verilator, "configure --enable-ccwarn" will do this
 # automatically; otherwise you may want this unconditionally enabled
 ifeq ($(CFG_WITH_CCWARN),yes)  # Local... Else don't burden users
-USER_CPPFLAGS_WALL += -W -Werror -Wall
+  USER_CPPFLAGS_WALL += -W -Werror -Wall
 endif
 
 # If you build your own rules from scratch, note you need to include
@@ -61,5 +61,5 @@ sim_main.o: sim_main.cpp $(VM_PREFIX).h
 
 DEPS := $(wildcard *.d)
 ifneq ($(DEPS),)
-include $(DEPS)
+  include $(DEPS)
 endif

examples/make_tracing_sc/sub.v

@@ -12,47 +12,47 @@ module sub
    input reset_l
    );
 
-   // Example counter/flop
-   reg [31:0] count_f;
-   always_ff @(posedge fastclk) begin
-      if (!reset_l) begin
-         /*AUTORESET*/
-         // Beginning of autoreset for uninitialized flops
-         count_f <= 32'h0;
-         // End of automatics
-      end
-      else begin
-         count_f <= count_f + 1;
-      end
-   end
+  // Example counter/flop
+  reg [31:0] count_f;
+  always_ff @(posedge fastclk) begin
+    if (!reset_l) begin
+      /*AUTORESET*/
+      // Beginning of autoreset for uninitialized flops
+      count_f <= 32'h0;
+      // End of automatics
+    end
+    else begin
+      count_f <= count_f + 1;
+    end
+  end
 
-   // Another example flop
-   reg [31:0] count_c;
-   always_ff @(posedge clk) begin
-      if (!reset_l) begin
-         /*AUTORESET*/
-         // Beginning of autoreset for uninitialized flops
-         count_c <= 32'h0;
-         // End of automatics
+  // Another example flop
+  reg [31:0] count_c;
+  always_ff @(posedge clk) begin
+    if (!reset_l) begin
+      /*AUTORESET*/
+      // Beginning of autoreset for uninitialized flops
+      count_c <= 32'h0;
+      // End of automatics
+    end
+    else begin
+      count_c <= count_c + 1;
+      if (count_c >= 3) begin
+        $display("[%0t] fastclk is %0d times faster than clk\n", $time, count_f / count_c);
+        // This write is a magic value the Makefile uses to make sure the
+        // test completes successfully.
+        $write("*-* All Finished *-*\n");
+        $finish;
       end
-      else begin
-         count_c <= count_c + 1;
-         if (count_c >= 3) begin
-            $display("[%0t] fastclk is %0d times faster than clk\n", $time, count_f / count_c);
-            // This write is a magic value the Makefile uses to make sure the
-            // test completes successfully.
-            $write("*-* All Finished *-*\n");
-            $finish;
-         end
-      end
-   end
+    end
+  end
 
-   // An example assertion
-   always_ff @(posedge clk) begin
-      AssertionExample : assert (!reset_l || count_c < 100);
-   end
+  // An example assertion
+  always_ff @(posedge clk) begin
+    AssertionExample : assert (!reset_l || count_c < 100);
+  end
 
-   // And example coverage analysis
-   cover property (@(posedge clk) count_c == 3);
+  // And example coverage analysis
+  cover property (@(posedge clk) count_c == 3);
 
 endmodule

examples/make_tracing_sc/top.v

@@ -23,21 +23,21 @@ module top
    input [69:0]       in_wide
    );
 
-   // Connect up the outputs, using some trivial logic
-   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
-   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
-   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+  // Connect up the outputs, using some trivial logic
+  assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
+  assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+  assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
 
-   // And an example sub module. The submodule will print stuff.
-   sub sub (/*AUTOINST*/
-            // Inputs
-            .clk                        (clk),
-            .fastclk                    (fastclk),
-            .reset_l                    (reset_l));
+  // And an example sub module. The submodule will print stuff.
+  sub sub (/*AUTOINST*/
+           // Inputs
+           .clk                         (clk),
+           .fastclk                     (fastclk),
+           .reset_l                     (reset_l));
 
-   // Print some stuff as an example
-   initial begin
-      $display("[%0t] Model running...\n", $time);
-   end
+  // Print some stuff as an example
+  initial begin
+    $display("[%0t] Model running...\n", $time);
+  end
 
 endmodule

include/verilated.cpp

@@ -72,7 +72,7 @@
 # include <execinfo.h>
 # define _VL_HAVE_STACKTRACE
 #endif
-#if defined(__linux) || (defined(__APPLE__) && defined(__MACH__))
+#if defined(__unix__) || (defined(__APPLE__) && defined(__MACH__))
 # include <sys/time.h>
 # include <sys/resource.h>
 # define _VL_HAVE_GETRLIMIT
@@ -168,7 +168,12 @@ void vl_fatal(const char* filename, int linenum, const char* hier, const char* m
 
     // Callbacks prior to termination
     Verilated::runExitCallbacks();
-    std::abort();
+
+    if (Verilated::debug()) {
+        std::abort();
+    } else {
+        std::exit(1);
+    }
 }
 #endif
 
@@ -406,6 +411,58 @@ IData VL_URANDOM_SEEDED_II(IData seed) VL_MT_SAFE {
     Verilated::threadContextp()->randSeed(static_cast<int>(seed));
     return VL_RANDOM_I();
 }
+
+IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() == 0) return 0;
+    IData data = ~0;
+    if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
+        VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
+        data = rng.rand64();
+    }
+    data &= VL_MASK_I(obits);
+    return data;
+}
+
+QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() == 0) return 0;
+    QData data = ~0ULL;
+    if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
+        VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
+        data = rng.rand64();
+    }
+    data &= VL_MASK_Q(obits);
+    return data;
+}
+
+WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                 uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() != 2) { return VL_RAND_RESET_W(obits, outwp); }
+    VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
+    for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = rng.rand64();
+    outwp[VL_WORDS_I(obits) - 1] = rng.rand64() & VL_MASK_E(obits);
+    return outwp;
+}
+
+IData VL_SCOPED_RAND_RESET_ASSIGN_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
+    const IData data = rng.rand64() & VL_MASK_I(obits);
+    return data;
+}
+
+QData VL_SCOPED_RAND_RESET_ASSIGN_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
+    const QData data = rng.rand64() & VL_MASK_Q(obits);
+    return data;
+}
+
+WDataOutP VL_SCOPED_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                        uint64_t salt) VL_MT_UNSAFE {
+    VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
+    for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = rng.rand64();
+    outwp[VL_WORDS_I(obits) - 1] = rng.rand64() & VL_MASK_E(obits);
+    return outwp;
+}
+
 IData VL_RAND_RESET_I(int obits) VL_MT_SAFE {
     if (Verilated::threadContextp()->randReset() == 0) return 0;
     IData data = ~0;
@@ -415,7 +472,6 @@ IData VL_RAND_RESET_I(int obits) VL_MT_SAFE {
     data &= VL_MASK_I(obits);
     return data;
 }
-IData VL_RAND_RESET_ASSIGN_I(int obits) VL_MT_SAFE { return VL_RANDOM_I() & VL_MASK_I(obits); }
 
 QData VL_RAND_RESET_Q(int obits) VL_MT_SAFE {
     if (Verilated::threadContextp()->randReset() == 0) return 0;
@@ -427,18 +483,11 @@ QData VL_RAND_RESET_Q(int obits) VL_MT_SAFE {
     return data;
 }
 
-QData VL_RAND_RESET_ASSIGN_Q(int obits) VL_MT_SAFE { return VL_RANDOM_Q() & VL_MASK_Q(obits); }
-
 WDataOutP VL_RAND_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE {
     for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = VL_RAND_RESET_I(32);
     outwp[VL_WORDS_I(obits) - 1] = VL_RAND_RESET_I(32) & VL_MASK_E(obits);
     return outwp;
 }
-WDataOutP VL_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp) VL_MT_SAFE {
-    for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = VL_RAND_RESET_ASSIGN_I(32);
-    outwp[VL_WORDS_I(obits) - 1] = VL_RAND_RESET_ASSIGN_I(32) & VL_MASK_E(obits);
-    return outwp;
-}
 WDataOutP VL_ZERO_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE {
     // Not inlined to speed up compilation of slowpath code
     return VL_ZERO_W(obits, outwp);
@@ -577,14 +626,12 @@ WDataOutP VL_POW_WWW(int obits, int, int rbits, WDataOutP owp, const WDataInP lw
     const int owords = VL_WORDS_I(obits);
     VL_DEBUG_IFDEF(assert(owords <= VL_MULS_MAX_WORDS););
     owp[0] = 1;
-    for (int i = 1; i < VL_WORDS_I(obits); i++) owp[i] = 0;
-    // cppcheck-has-bug-suppress variableScope
+    for (int i = 1; i < VL_WORDS_I(obits); ++i) owp[i] = 0;
     VlWide<VL_MULS_MAX_WORDS> powstore;  // Fixed size, as MSVC++ doesn't allow [words] here
     VlWide<VL_MULS_MAX_WORDS> lastpowstore;  // Fixed size, as MSVC++ doesn't allow [words] here
     VlWide<VL_MULS_MAX_WORDS> lastoutstore;  // Fixed size, as MSVC++ doesn't allow [words] here
-    // cppcheck-has-bug-suppress variableScope
     VL_ASSIGN_W(obits, powstore, lwp);
-    for (int bit = 0; bit < rbits; bit++) {
+    for (int bit = 0; bit < rbits; ++bit) {
         if (bit > 0) {  // power = power*power
             VL_ASSIGN_W(obits, lastpowstore, powstore);
             VL_MUL_W(owords, powstore, lastpowstore, lastpowstore);
@@ -1335,7 +1382,6 @@ IData _vl_vsscanf(FILE* fp,  // If a fscanf
                     _vl_vsss_skipspace(fp, floc, fromp, fstr);
                     _vl_vsss_read_str(fp, floc, fromp, fstr, t_tmp, "+-.0123456789eE");
                     if (!t_tmp[0]) goto done;
-                    // cppcheck-has-bug-suppress unusedStructMember, unreadVariable
                     union {
                         double r;
                         int64_t ld;
@@ -1700,6 +1746,48 @@ IData VL_SSCANF_INNX(int, const std::string& ld, const std::string& format, int
     return got;
 }
 
+// MurmurHash64A
+uint64_t VL_MURMUR64_HASH(const char* key) VL_PURE {
+    const size_t len = strlen(key);
+    const uint64_t seed = 0;
+    const uint64_t m = 0xc6a4a7935bd1e995ULL;
+    const int r = 47;
+
+    uint64_t h = seed ^ (len * m);
+
+    const uint64_t* data = reinterpret_cast<const uint64_t*>(key);
+    const uint64_t* end = data + (len / 8);
+
+    while (data != end) {
+        uint64_t k = *data++;
+
+        k *= m;
+        k ^= k >> r;
+        k *= m;
+
+        h ^= k;
+        h *= m;
+    }
+
+    const unsigned char* data2 = reinterpret_cast<const unsigned char*>(data);
+
+    switch (len & 7) {
+    case 7: h ^= uint64_t(data2[6]) << 48; /* fallthrough */
+    case 6: h ^= uint64_t(data2[5]) << 40; /* fallthrough */
+    case 5: h ^= uint64_t(data2[4]) << 32; /* fallthrough */
+    case 4: h ^= uint64_t(data2[3]) << 24; /* fallthrough */
+    case 3: h ^= uint64_t(data2[2]) << 16; /* fallthrough */
+    case 2: h ^= uint64_t(data2[1]) << 8; /* fallthrough */
+    case 1: h ^= uint64_t(data2[0]); h *= m; /* fallthrough */
+    };
+
+    h ^= h >> r;
+    h *= m;
+    h ^= h >> r;
+
+    return h;
+}
+
 IData VL_FREAD_I(int width, int array_lsb, int array_size, void* memp, IData fpi, IData start,
                  IData count) VL_MT_SAFE {
     // While threadsafe, each thread can only access different file handles
@@ -1770,7 +1858,7 @@ std::string VL_STACKTRACE_N() VL_MT_SAFE {
     if (!strings) return "Unable to backtrace\n";
 
     std::string result = "Backtrace:\n";
-    for (int j = 0; j < nptrs; j++) result += std::string{strings[j]} + "\n"s;
+    for (int j = 0; j < nptrs; ++j) result += std::string{strings[j]} + "\n"s;
     free(strings);
     return result;
 }
@@ -2042,7 +2130,7 @@ static const char* formatBinary(int nBits, uint32_t bits) {
     assert((nBits >= 1) && (nBits <= 32));
 
     static thread_local char t_buf[64];
-    for (int i = 0; i < nBits; i++) {
+    for (int i = 0; i < nBits; ++i) {
         const bool isOne = bits & (1 << (nBits - 1 - i));
         t_buf[i] = (isOne ? '1' : '0');
     }
@@ -2060,7 +2148,6 @@ VlReadMem::VlReadMem(bool hex, int bits, const std::string& filename, QData star
     if (VL_UNLIKELY(!m_fp)) {
         // We don't report the Verilog source filename as it slow to have to pass it down
         VL_WARN_MT(filename.c_str(), 0, "", "$readmem file not found");
-        // cppcheck-has-bug-suppress resourceLeak  // m_fp is nullptr
         return;
     }
 }
@@ -2200,7 +2287,6 @@ VlWriteMem::VlWriteMem(bool hex, int bits, const std::string& filename, QData st
     m_fp = std::fopen(filename.c_str(), "w");
     if (VL_UNLIKELY(!m_fp)) {
         VL_FATAL_MT(filename.c_str(), 0, "", "$writemem file not found");
-        // cppcheck-has-bug-suppress resourceLeak  // m_fp is nullptr
         return;
     }
 }
@@ -2384,7 +2470,6 @@ static const char* vl_time_str(int scale) VL_PURE {
 double vl_time_multiplier(int scale) VL_PURE {
     // Return timescale multiplier -18 to +18
     // For speed, this does not check for illegal values
-    // cppcheck-has-bug-suppress arrayIndexOutOfBoundsCond
     if (scale < 0) {
         static const double neg10[] = {1.0,
                                        0.1,
@@ -2405,7 +2490,6 @@ double vl_time_multiplier(int scale) VL_PURE {
                                        0.0000000000000001,
                                        0.00000000000000001,
                                        0.000000000000000001};
-        // cppcheck-has-bug-suppress arrayIndexOutOfBoundsCond
         return neg10[-scale];
     } else {
         static const double pow10[] = {1.0,
@@ -2427,7 +2511,6 @@ double vl_time_multiplier(int scale) VL_PURE {
                                        10000000000000000.0,
                                        100000000000000000.0,
                                        1000000000000000000.0};
-        // cppcheck-has-bug-suppress arrayIndexOutOfBoundsCond
         return pow10[scale];
     }
 }
@@ -2477,12 +2560,13 @@ void VL_PRINTTIMESCALE(const char* namep, const char* timeunitp,
     VL_PRINTF_MT("Time scale of %s is %s / %s\n", namep, timeunitp,
                  contextp->timeprecisionString());
 }
-void VL_TIMEFORMAT_IINI(int units, int precision, const std::string& suffix, int width,
+void VL_TIMEFORMAT_IINI(bool hasUnits, int units, bool hasPrecision, int precision, bool hasSuffix,
+                        const std::string& suffix, bool hasWidth, int width,
                         VerilatedContext* contextp) VL_MT_SAFE {
-    contextp->impp()->timeFormatUnits(units);
-    contextp->impp()->timeFormatPrecision(precision);
-    contextp->impp()->timeFormatSuffix(suffix);
-    contextp->impp()->timeFormatWidth(width);
+    if (hasUnits) contextp->impp()->timeFormatUnits(units);
+    if (hasPrecision) contextp->impp()->timeFormatPrecision(precision);
+    if (hasSuffix) contextp->impp()->timeFormatSuffix(suffix);
+    if (hasWidth) contextp->impp()->timeFormatWidth(width);
 }
 
 //======================================================================
@@ -2722,7 +2806,7 @@ void VerilatedContext::internalsDump() const VL_MT_SAFE {
     VerilatedImp::userDump();
 }
 
-void VerilatedContext::addModel(VerilatedModel* modelp) {
+void VerilatedContext::addModel(const VerilatedModel* modelp) {
     if (!quiet()) {
         // CPU time isn't read as starting point until model creation, so that quiet() is set
         // Thus if quiet(), avoids slow OS read affecting some usages that make many models
@@ -2760,7 +2844,7 @@ VerilatedVirtualBase* VerilatedContext::threadPoolp() {
 void VerilatedContext::prepareClone() { delete m_threadPool.release(); }
 
 VerilatedVirtualBase* VerilatedContext::threadPoolpOnClone() {
-    if (VL_UNLIKELY(m_threadPool)) m_threadPool.release();
+    if (VL_UNLIKELY(m_threadPool)) (void)m_threadPool.release();
     m_threadPool = std::unique_ptr<VlThreadPool>(new VlThreadPool{this, m_threads - 1});
     return m_threadPool.get();
 }
@@ -2974,7 +3058,9 @@ void VerilatedContext::statsPrintSummary() VL_MT_UNSAFE {
         = vl_timescaled_double((cputime != 0.0) ? (simtimeInUnits / cputime) : 0, "%0.3f %s");
     VL_PRINTF("- Verilator: %s at %s; walltime %0.3f s; speed %s/s\n", endwhy.c_str(),
               simtime.c_str(), walltime, simtimePerf.c_str());
-    const double modelMB = VlOs::memUsageBytes() / 1024.0 / 1024.0;
+    uint64_t memPeak, memCurrent;
+    VlOs::memUsageBytes(memPeak /*ref*/, memCurrent /*ref*/);
+    const double modelMB = memPeak / 1024.0 / 1024.0;
     VL_PRINTF("- Verilator: cpu %0.3f s on %u threads; alloced %0.0f MB\n", cputime,
               threadsInModels(), modelMB);
 }
@@ -3039,7 +3125,7 @@ void VerilatedContext::trace(VerilatedTraceBaseC* tfp, int levels, int options)
         VL_FATAL_MT("", 0, "",
                     "Testbench C call to 'VerilatedContext::trace()' requires model(s) Verilated"
                     " with --trace-fst or --trace-vcd option");
-    for (auto& cbr : m_ns.m_traceBaseModelCbs) cbr(tfp, levels, options);
+    for (const auto& cbr : m_ns.m_traceBaseModelCbs) cbr(tfp, levels, options);
 }
 void VerilatedContext::traceBaseModelCbAdd(traceBaseModelCb_t cb) VL_MT_SAFE {
     // Model creation registering a callback for when Verilated::trace() called
@@ -3054,7 +3140,6 @@ VerilatedSyms::VerilatedSyms(VerilatedContext* contextp)
     : _vm_contextp__(contextp ? contextp : Verilated::threadContextp()) {
     VerilatedContext::checkMagic(_vm_contextp__);
     Verilated::threadContextp(_vm_contextp__);
-    // cppcheck-has-bug-suppress noCopyConstructor
     __Vm_evalMsgQp = new VerilatedEvalMsgQueue;
 }
 
@@ -3294,7 +3379,7 @@ VerilatedModule::VerilatedModule(const char* namep)
 
 VerilatedModule::~VerilatedModule() {
     // Memory cleanup - not called during normal operation
-    // NOLINTNEXTLINE(google-readability-casting)
+    // cppcheck-suppress cstyleCast  // NOLINTNEXTLINE(google-readability-casting)
     if (m_namep) VL_DO_CLEAR(free((void*)(m_namep)), m_namep = nullptr);
 }
 
@@ -3456,16 +3541,16 @@ void VerilatedScope::scopeDump() const {
                          VerilatedImp::exportName(i));
         }
     }
-    if (const VerilatedVarNameMap* const varsp = this->varsp()) {
-        for (const auto& i : *varsp) VL_PRINTF_MT("       VAR %p: %s\n", &(i.second), i.first);
+    if (const VerilatedVarNameMap* const ivarsp = this->varsp()) {
+        for (const auto& i : *ivarsp) VL_PRINTF_MT("       VAR %p: %s\n", &(i.second), i.first);
     }
 }
 
-void VerilatedHierarchy::add(VerilatedScope* fromp, VerilatedScope* top) {
+void VerilatedHierarchy::add(const VerilatedScope* fromp, const VerilatedScope* top) {
     VerilatedImp::hierarchyAdd(fromp, top);
 }
 
-void VerilatedHierarchy::remove(VerilatedScope* fromp, VerilatedScope* top) {
+void VerilatedHierarchy::remove(const VerilatedScope* fromp, const VerilatedScope* top) {
     VerilatedImp::hierarchyRemove(fromp, top);
 }
 

include/verilated.h

@@ -39,8 +39,8 @@
 #endif
 
 // clang-format off
-#include "verilatedos.h"
 #include "verilated_config.h"
+#include "verilatedos.h"
 #if VM_SC
 # include "verilated_sc.h"  // Get SYSTEMC_VERSION and time declarations
 #endif
@@ -113,6 +113,7 @@ class VerilatedVcdSc;
 //=========================================================================
 // Basic types
 
+// Type letters
 // clang-format off
 //    P                     // Packed data of bit type (C/S/I/Q/W)
 using CData = uint8_t;    ///< Data representing 'bit' of 1-8 packed bits
@@ -124,6 +125,8 @@ using WData = EData;        ///< Data representing >64 packed bits (used as poin
 //    F     = float;        // No typedef needed; Verilator uses float
 //    D     = double;       // No typedef needed; Verilator uses double
 //    N     = std::string;  // No typedef needed; Verilator uses string
+//    U     = VlUnpacked;
+//    R     = VlQueue;
 // clang-format on
 
 using WDataInP = const WData*;  ///< 'bit' of >64 packed bits as array input to a function
@@ -641,7 +644,7 @@ public:
     }
 
     // Internal: Model and thread setup
-    void addModel(VerilatedModel*);
+    void addModel(const VerilatedModel* modelp);
     VerilatedVirtualBase* threadPoolp();
     void prepareClone();
     VerilatedVirtualBase* threadPoolpOnClone();
@@ -760,8 +763,8 @@ public:  // But internals only - called from VerilatedModule's
 
 class VerilatedHierarchy final {
 public:
-    static void add(VerilatedScope* fromp, VerilatedScope* top);
-    static void remove(VerilatedScope* fromp, VerilatedScope* top);
+    static void add(const VerilatedScope* fromp, const VerilatedScope* top);
+    static void remove(const VerilatedScope* fromp, const VerilatedScope* top);
 };
 
 //===========================================================================

include/verilated.mk.in

@@ -69,7 +69,7 @@ export CCACHE_SLOPPINESS
 # Make checks
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -81,20 +81,21 @@ UNAME_S := $(shell uname -s)
 
 # Add -MMD -MP if you're using a recent version of GCC.
 VK_CPPFLAGS_ALWAYS += \
-		-MMD \
-		-I$(VERILATOR_ROOT)/include \
-		-I$(VERILATOR_ROOT)/include/vltstd \
-		-DVM_COVERAGE=$(VM_COVERAGE) \
-		-DVM_SC=$(VM_SC) \
-		-DVM_TIMING=$(VM_TIMING) \
-		-DVM_TRACE=$(VM_TRACE) \
-		-DVM_TRACE_FST=$(VM_TRACE_FST) \
-		-DVM_TRACE_VCD=$(VM_TRACE_VCD) \
-		-DVM_TRACE_SAIF=$(VM_TRACE_SAIF) \
-		$(CFG_CXXFLAGS_NO_UNUSED) \
+  -MMD \
+  -I$(VERILATOR_ROOT)/include \
+  -I$(VERILATOR_ROOT)/include/vltstd \
+  -DVERILATOR=1 \
+  -DVM_COVERAGE=$(VM_COVERAGE) \
+  -DVM_SC=$(VM_SC) \
+  -DVM_TIMING=$(VM_TIMING) \
+  -DVM_TRACE=$(VM_TRACE) \
+  -DVM_TRACE_FST=$(VM_TRACE_FST) \
+  -DVM_TRACE_VCD=$(VM_TRACE_VCD) \
+  -DVM_TRACE_SAIF=$(VM_TRACE_SAIF) \
+  $(CFG_CXXFLAGS_NO_UNUSED) \
 
 ifeq ($(CFG_WITH_CCWARN),yes)  # Local... Else don't burden users
-VK_CPPFLAGS_WALL += -Wall $(CFG_CXXFLAGS_WEXTRA) -Werror
+  VK_CPPFLAGS_WALL += -Wall $(CFG_CXXFLAGS_WEXTRA) -Werror
 endif
 
 CPPFLAGS += -I. $(VK_CPPFLAGS_WALL) $(VK_CPPFLAGS_ALWAYS)
@@ -103,7 +104,7 @@ VPATH += ..
 VPATH += $(VERILATOR_ROOT)/include
 VPATH += $(VERILATOR_ROOT)/include/vltstd
 
-LDFLAGS  += $(CFG_LDFLAGS_VERILATED)
+LDFLAGS += $(CFG_LDFLAGS_VERILATED)
 
 #OPT = -ggdb -DPRINTINITSTR -DDETECTCHANGE
 #OPT = -ggdb -DPRINTINITSTR
@@ -112,19 +113,19 @@ CPPFLAGS += $(OPT)
 # On macOS, specify all weak symbols as dynamic_lookup.
 # Otherwise, you get undefined symbol errors.
 ifeq ($(UNAME_S),Darwin)
-	LDFLAGS += -Wl,-U,__Z15vl_time_stamp64v,-U,__Z13sc_time_stampv
+  LDFLAGS += -Wl,-U,__Z15vl_time_stamp64v,-U,__Z13sc_time_stampv
 endif
 
 # Allow upper level user makefiles to specify flags they want.
 # These aren't ever set by Verilator, so users are free to override them.
 CPPFLAGS += $(USER_CPPFLAGS)
-LDFLAGS  += $(USER_LDFLAGS)
-LDLIBS   += $(USER_LDLIBS)
+LDFLAGS += $(USER_LDFLAGS)
+LDLIBS += $(USER_LDLIBS)
 
 # Add flags from -CFLAGS and -LDFLAGS on Verilator command line
 CPPFLAGS += $(VM_USER_CFLAGS)
-LDFLAGS  += $(VM_USER_LDFLAGS)
-LDLIBS   += $(VM_USER_LDLIBS)
+LDFLAGS += $(VM_USER_LDFLAGS)
+LDLIBS += $(VM_USER_LDLIBS)
 
 ######################################################################
 # Optimization control.
@@ -148,7 +149,7 @@ OPT_GLOBAL = -Os
 
 ifeq ($(VM_PROFC),1)
   CPPFLAGS += $(CFG_CXXFLAGS_PROFILE)
-  LDFLAGS  += $(CFG_CXXFLAGS_PROFILE)
+  LDFLAGS += $(CFG_CXXFLAGS_PROFILE)
 endif
 
 #######################################################################
@@ -156,12 +157,12 @@ endif
 
 ifeq ($(VM_SC),1)
   CPPFLAGS += $(SYSTEMC_CXX_FLAGS) $(addprefix -I, $(SYSTEMC_INCLUDE))
-  LDFLAGS  += $(SYSTEMC_CXX_FLAGS) $(addprefix -L, $(SYSTEMC_LIBDIR))
-  SC_LIBS   = -lsystemc
- ifneq ($(wildcard $(SYSTEMC_LIBDIR)/*numeric_bit*),)
-  # SystemC 1.2.1beta
-  SC_LIBS   += -lnumeric_bit -lqt
- endif
+  LDFLAGS += $(SYSTEMC_CXX_FLAGS) $(addprefix -L, $(SYSTEMC_LIBDIR))
+  SC_LIBS = -lsystemc
+  ifneq ($(wildcard $(SYSTEMC_LIBDIR)/*numeric_bit*),)
+    # SystemC 1.2.1beta
+    SC_LIBS += -lnumeric_bit -lqt
+  endif
 endif
 
 #######################################################################
@@ -171,12 +172,11 @@ CPPFLAGS += $(CFG_CXXFLAGS_STD)
 LDLIBS += $(CFG_LDLIBS_THREADS)
 
 ifneq ($(VM_TIMING),0)
- ifneq ($(VM_TIMING),)
-  CPPFLAGS += $(CFG_CXXFLAGS_COROUTINES)
- endif
+  ifneq ($(VM_TIMING),)
+    CPPFLAGS += $(CFG_CXXFLAGS_COROUTINES)
+  endif
 endif
 
-
 #######################################################################
 ### Aggregates
 
@@ -258,7 +258,6 @@ endif
 
 $(VM_PREFIX)__ALL.a: $(VK_OBJS) $(VM_HIER_LIBS)
 
-
 ######################################################################
 ### Compile rules
 
@@ -269,24 +268,24 @@ ifneq ($(VM_DEFAULT_RULES),0)
 #
 # These rules put OPT_FAST/OPT_SLOW/OPT_GLOBAL before the other flags to
 # allow USER_CPPFLAGS to override them
-%.o: %.cpp
+  %.o: %.cpp
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
 
-$(VK_OBJS_FAST): %.o: %.cpp $(VK_PCH_H).fast.gch
+  $(VK_OBJS_FAST): %.o: %.cpp $(VK_PCH_H).fast.gch
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) $(VK_PCH_I_FAST) -c -o $@ $<
 
-$(VK_OBJS_SLOW): %.o: %.cpp $(VK_PCH_H).slow.gch
+  $(VK_OBJS_SLOW): %.o: %.cpp $(VK_PCH_H).slow.gch
 	$(OBJCACHE) $(CXX) $(OPT_SLOW) $(CXXFLAGS) $(CPPFLAGS) $(VK_PCH_I_SLOW) -c -o $@ $<
 
-$(VK_GLOBAL_OBJS): %.o: %.cpp
+  $(VK_GLOBAL_OBJS): %.o: %.cpp
 	$(OBJCACHE) $(CXX) $(OPT_GLOBAL) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
 
 # Precompile a header file
 # PCH's compiler flags must match exactly the rules' above FAST/SLOW
 # arguments used for the .cpp files, or the PCH file won't be used.
-%.fast.gch: %
+  %.fast.gch: %
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) $(CFG_CXXFLAGS_PCH) $< -o $@
-%.slow.gch: %
+  %.slow.gch: %
 	$(OBJCACHE) $(CXX) $(OPT_SLOW) $(CXXFLAGS) $(CPPFLAGS) $(CFG_CXXFLAGS_PCH) $< -o $@
 
 endif
@@ -313,22 +312,22 @@ ifneq ($(findstring ccache-report,$(MAKECMDGOALS)),)
   # Remove previous logfiles and report
   $(shell rm -rf $(VK_CCACHE_LOGDIR) $(VK_CCACHE_REPORT))
 
-$(VK_CCACHE_LOGDIR):
+  $(VK_CCACHE_LOGDIR):
 	mkdir -p $@
 
-$(VK_OBJS): | $(VK_CCACHE_LOGDIR)
+  $(VK_OBJS): | $(VK_CCACHE_LOGDIR)
 
-$(VK_OBJS): export CCACHE_LOGFILE=$(VK_CCACHE_LOGDIR)/[email protected]
+  $(VK_OBJS): export CCACHE_LOGFILE=$(VK_CCACHE_LOGDIR)/[email protected]
 
-$(VK_CCACHE_REPORT): $(VK_OBJS)
+  $(VK_CCACHE_REPORT): $(VK_OBJS)
 	$(VERILATOR_CCACHE_REPORT) -o $@ $(VK_CCACHE_LOGDIR)
 
-.PHONY: ccache-report
-ccache-report: $(VK_CCACHE_REPORT)
+  .PHONY: ccache-report
+  ccache-report: $(VK_CCACHE_REPORT)
 	@cat $<
 
 # ccache-report runs last
-ccache-report: $(VK_OTHER_GOALS)
+  ccache-report: $(VK_OTHER_GOALS)
 endif
 
 ######################################################################
@@ -358,5 +357,5 @@ debug-make::
 
 DEPS := $(wildcard *.d)
 ifneq ($(DEPS),)
-include $(DEPS)
+  include $(DEPS)
 endif

include/verilated_cov.cpp

@@ -255,17 +255,21 @@ private:
 
 public:
     // PUBLIC METHODS
+    // cppcheck-suppress duplInheritedMember
     std::string defaultFilename() VL_MT_SAFE { return m_contextp->coverageFilename(); }
+    // cppcheck-suppress duplInheritedMember
     void forcePerInstance(const bool flag) VL_MT_SAFE_EXCLUDES(m_mutex) {
         Verilated::quiesce();
         const VerilatedLockGuard lock{m_mutex};
         m_forcePerInstance = flag;
     }
+    // cppcheck-suppress duplInheritedMember
     void clear() VL_MT_SAFE_EXCLUDES(m_mutex) {
         Verilated::quiesce();
         const VerilatedLockGuard lock{m_mutex};
         clearGuts();
     }
+    // cppcheck-suppress duplInheritedMember
     void clearNonMatch(const char* const matchp) VL_MT_SAFE_EXCLUDES(m_mutex) {
         Verilated::quiesce();
         const VerilatedLockGuard lock{m_mutex};
@@ -281,10 +285,11 @@ public:
             m_items = newlist;
         }
     }
+    // cppcheck-suppress duplInheritedMember
     void zero() VL_MT_SAFE_EXCLUDES(m_mutex) {
         Verilated::quiesce();
         const VerilatedLockGuard lock{m_mutex};
-        for (const auto& itemp : m_items) itemp->zero();
+        for (const VerilatedCovImpItem* const itemp : m_items) itemp->zero();
     }
 
     // We assume there's always call to i/f/p in that order
@@ -307,15 +312,17 @@ public:
         valps[0] = m_insertFilenamep;
         const std::string linestr = std::to_string(m_insertLineno);
         ckeyps[1] = "lineno";
+        // cppcheck-suppress autoVariables  // Used only below for insert
         valps[1] = linestr.c_str();
         // Default page if not specified
         const char* fnstartp = m_insertFilenamep;
         while (const char* foundp = std::strchr(fnstartp, '/')) fnstartp = foundp + 1;
         const char* fnendp = fnstartp;
-        for (; *fnendp && *fnendp != '.'; fnendp++) {}
+        for (; *fnendp && *fnendp != '.'; ++fnendp) {}
         const size_t page_len = fnendp - fnstartp;
         const std::string page_default = "sp_user/" + std::string{fnstartp, page_len};
         ckeyps[2] = "page";
+        // cppcheck-suppress autoVariables  // Used only below for insert
         valps[2] = page_default.c_str();
 
         // Keys -> strings
@@ -357,6 +364,7 @@ public:
         m_insertp = nullptr;
     }
 
+    // cppcheck-suppress duplInheritedMember
     void write(const std::string& filename) VL_MT_SAFE_EXCLUDES(m_mutex) {
         Verilated::quiesce();
         const VerilatedLockGuard lock{m_mutex};
@@ -390,6 +398,10 @@ public:
                         hier = val;
                     } else {
                         // Print it
+                        if (key == "page") {
+                            const std::string type = val.substr(2, val.find('/') - 2);
+                            name += keyValueFormatter(VL_CIK_TYPE, type);
+                        }
                         name += keyValueFormatter(key, val);
                     }
                 }

include/verilated_cov.h

@@ -75,6 +75,70 @@ class VerilatedCovImp;
         ccontextp->_insertp("hier", name, __VA_ARGS__); \
     } while (false)
 
+static inline void VL_COV_TOGGLE_CHG_ST_I(const int width, uint32_t* covp, const IData newData,
+                                          const IData oldData) {
+    const IData chgData = newData ^ oldData;
+    for (int i = 0; i < width; ++i) {
+        *(covp + 2 * i + ((newData >> i) & 1)) += (chgData >> i) & 1;
+    }
+}
+
+static inline void VL_COV_TOGGLE_CHG_ST_Q(const int width, uint32_t* covp, const QData newData,
+                                          const QData oldData) {
+    const QData chgData = newData ^ oldData;
+    for (int i = 0; i < width; ++i) {
+        *(covp + 2 * i + ((newData >> i) & 1)) += (chgData >> i) & 1;
+    }
+}
+
+static inline void VL_COV_TOGGLE_CHG_ST_W(const int width, uint32_t* covp, WDataInP newData,
+                                          WDataInP oldData) {
+    for (int i = 0; i < VL_WORDS_I(width); ++i) {
+        const EData chgData = newData[i] ^ oldData[i];
+        if (chgData) {
+            for (int j = 0; j < width - i * VL_EDATASIZE; ++j) {
+                *(covp + (i * VL_EDATASIZE + j) * 2 + ((newData[i] >> j) & 1))
+                    += (chgData >> j) & 1;
+            }
+        }
+    }
+}
+
+static inline void VL_COV_TOGGLE_CHG_MT_I(const int width, std::atomic<uint32_t>* covp,
+                                          const IData newData, const IData oldData) VL_MT_SAFE {
+    const IData chgData = newData ^ oldData;
+    for (int i = 0; i < width; ++i) {
+        if (VL_BITISSET_I(chgData, i)) {
+            (covp + 2 * i + ((newData >> i) & 1))->fetch_add(1, std::memory_order_relaxed);
+        }
+    }
+}
+
+static inline void VL_COV_TOGGLE_CHG_MT_Q(const int width, std::atomic<uint32_t>* covp,
+                                          const QData newData, const QData oldData) VL_MT_SAFE {
+    const QData chgData = newData ^ oldData;
+    for (int i = 0; i < width; ++i) {
+        if (VL_BITISSET_Q(chgData, i)) {
+            (covp + 2 * i + ((newData >> i) & 1))->fetch_add(1, std::memory_order_relaxed);
+        }
+    }
+}
+
+static inline void VL_COV_TOGGLE_CHG_MT_W(const int width, std::atomic<uint32_t>* covp,
+                                          WDataInP newData, WDataInP oldData) VL_MT_SAFE {
+    for (int i = 0; i < VL_WORDS_I(width); ++i) {
+        const EData chgData = newData[i] ^ oldData[i];
+        if (chgData) {
+            for (int j = 0; j < width - i * VL_EDATASIZE; ++j) {
+                if (VL_BITISSET_E(chgData, j)) {
+                    (covp + (i * VL_EDATASIZE + j) * 2 + ((newData[i] >> j) & 1))
+                        ->fetch_add(1, std::memory_order_relaxed);
+                }
+            }
+        }
+    }
+}
+
 //=============================================================================
 //  VerilatedCov
 /// Per-VerilatedContext coverage data class.

include/verilated_dpi.cpp

@@ -80,6 +80,7 @@ void svPutBitselLogic(svLogicVecVal* dp, int bit, svLogic s) {
 }
 
 void svGetPartselBit(svBitVecVal* dp, const svBitVecVal* sp, int lsb, int width) {
+    // Verilator supports > 32 bit widths, which is an extension to IEEE DPI
     // See also VL_SEL_WWI
     const int msb = lsb + width - 1;
     const int word_shift = VL_BITWORD_I(lsb);
@@ -103,6 +104,7 @@ void svGetPartselBit(svBitVecVal* dp, const svBitVecVal* sp, int lsb, int width)
     dp[VL_WORDS_I(width) - 1] &= VL_MASK_I(width);
 }
 void svGetPartselLogic(svLogicVecVal* dp, const svLogicVecVal* sp, int lsb, int width) {
+    // Verilator supports > 32 bit widths, which is an extension to IEEE DPI
     const int msb = lsb + width - 1;
     const int word_shift = VL_BITWORD_I(lsb);
     if (VL_BITBIT_I(lsb) == 0) {
@@ -288,7 +290,7 @@ static void _vl_svGetBitArrElemVecVal(svBitVecVal* d, const svOpenArrayHandle s,
         break;
     }
     case VLVT_WDATA: {
-        WDataOutP wdatap = (reinterpret_cast<WDataOutP>(datap));
+        WDataInP wdatap = (reinterpret_cast<WDataInP>(datap));
         for (int i = 0; i < VL_WORDS_I(varp->entBits()); ++i) d[i] = wdatap[i];
         return;
     }
@@ -327,7 +329,7 @@ static void _vl_svGetLogicArrElemVecVal(svLogicVecVal* d, const svOpenArrayHandl
         break;
     }
     case VLVT_WDATA: {
-        WDataOutP wdatap = (reinterpret_cast<WDataOutP>(datap));
+        WDataInP wdatap = (reinterpret_cast<WDataInP>(datap));
         for (int i = 0; i < VL_WORDS_I(varp->entBits()); ++i) {
             d[i].aval = wdatap[i];
             d[i].bval = 0;

include/verilated_fst_c.cpp

@@ -140,7 +140,6 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, uint32_t elemen
 // TODO: should return std::optional<fstScopeType>, but I can't have C++17
 static std::pair<bool, fstScopeType> toFstScopeType(VerilatedTracePrefixType type) {
     switch (type) {
-    case VerilatedTracePrefixType::ROOTIO_MODULE: return {true, FST_ST_VCD_MODULE};
     case VerilatedTracePrefixType::SCOPE_MODULE: return {true, FST_ST_VCD_MODULE};
     case VerilatedTracePrefixType::SCOPE_INTERFACE: return {true, FST_ST_VCD_INTERFACE};
     case VerilatedTracePrefixType::STRUCT_PACKED:
@@ -152,19 +151,23 @@ static std::pair<bool, fstScopeType> toFstScopeType(VerilatedTracePrefixType typ
 
 void VerilatedFst::pushPrefix(const std::string& name, VerilatedTracePrefixType type) {
     assert(!m_prefixStack.empty());  // Constructor makes an empty entry
-    std::string pname = name;
-    // An empty name means this is the root of a model created with name()=="".  The
-    // tools get upset if we try to pass this as empty, so we put the signals under a
-    // new scope, but the signals further down will be peers, not children (as usual
-    // for name()!="")
-    // Terminate earlier $root?
-    if (m_prefixStack.back().second == VerilatedTracePrefixType::ROOTIO_MODULE) popPrefix();
-    if (pname.empty()) {  // Start new temporary root
-        pname = "$rootio";  // VCD names are not backslash escaped
-        m_prefixStack.emplace_back("", VerilatedTracePrefixType::ROOTIO_WRAPPER);
-        type = VerilatedTracePrefixType::ROOTIO_MODULE;
+    // An empty name means this is the root of a model created with
+    // name()=="".  The tools get upset if we try to pass this as empty, so
+    // we put the signals under a new $rootio scope, but the signals
+    // further down will be peers, not children (as usual for name()!="").
+    const std::string prevPrefix = m_prefixStack.back().first;
+    if (name == "$rootio" && !prevPrefix.empty()) {
+        // Upper has name, we can suppress inserting $rootio, but still push so popPrefix works
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
+    } else if (name.empty()) {
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
     }
-    const std::string newPrefix = m_prefixStack.back().first + pname;
+
+    // This code assumes a signal at a given prefix level is declared before
+    // any pushPrefix are done at that same level.
+    const std::string newPrefix = prevPrefix + name;
     const auto pair = toFstScopeType(type);
     const bool properScope = pair.first;
     const fstScopeType scopeType = pair.second;
@@ -294,7 +297,7 @@ VerilatedFst::Buffer* VerilatedFst::getTraceBuffer(uint32_t fidx) {
 
 void VerilatedFst::commitTraceBuffer(VerilatedFst::Buffer* bufp) {
     if (offload()) {
-        OffloadBuffer* const offloadBufferp = static_cast<OffloadBuffer*>(bufp);
+        const OffloadBuffer* const offloadBufferp = static_cast<const OffloadBuffer*>(bufp);
         if (offloadBufferp->m_offloadBufferWritep) {
             m_offloadBufferWritep = offloadBufferp->m_offloadBufferWritep;
             return;  // Buffer will be deleted by the offload thread

include/verilated_funcs.h

@@ -101,6 +101,24 @@ inline IData VL_URANDOM_RANGE_I(IData hi, IData lo) {
     }
 }
 
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                        uint64_t salt) VL_MT_UNSAFE;
+
+/// Random reset a signal of given width (assign time only)
+extern IData VL_SCOPED_RAND_RESET_ASSIGN_I(int obits, uint64_t scopeHash,
+                                           uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (assign time only)
+extern QData VL_SCOPED_RAND_RESET_ASSIGN_Q(int obits, uint64_t scopeHash,
+                                           uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (assign time only)
+extern WDataOutP VL_SCOPED_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                               uint64_t salt) VL_MT_UNSAFE;
+
 /// Random reset a signal of given width (init time only)
 extern IData VL_RAND_RESET_I(int obits) VL_MT_SAFE;
 /// Random reset a signal of given width (init time only)
@@ -108,13 +126,6 @@ extern QData VL_RAND_RESET_Q(int obits) VL_MT_SAFE;
 /// Random reset a signal of given width (init time only)
 extern WDataOutP VL_RAND_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE;
 
-/// Random reset a signal of given width (assign time only)
-extern IData VL_RAND_RESET_ASSIGN_I(int obits) VL_MT_SAFE;
-/// Random reset a signal of given width (assign time only)
-extern QData VL_RAND_RESET_ASSIGN_Q(int obits) VL_MT_SAFE;
-/// Random reset a signal of given width (assign time only)
-extern WDataOutP VL_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp) VL_MT_SAFE;
-
 /// Zero reset a signal (slow - else use VL_ZERO_W)
 extern WDataOutP VL_ZERO_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE;
 
@@ -268,11 +279,11 @@ static inline IData VL_RTOI_I_D(double lhs) VL_PURE { return static_cast<int32_t
 
 // Sign extend such that if MSB set, we get ffff_ffff, else 0s
 // (Requires clean input)
-#define VL_SIGN_I(nbits, lhs) ((lhs) >> VL_BITBIT_I((nbits)-VL_UL(1)))
-#define VL_SIGN_Q(nbits, lhs) ((lhs) >> VL_BITBIT_Q((nbits)-1ULL))
-#define VL_SIGN_E(nbits, lhs) ((lhs) >> VL_BITBIT_E((nbits)-VL_EUL(1)))
+#define VL_SIGN_I(nbits, lhs) ((lhs) >> VL_BITBIT_I((nbits) - VL_UL(1)))
+#define VL_SIGN_Q(nbits, lhs) ((lhs) >> VL_BITBIT_Q((nbits) - 1ULL))
+#define VL_SIGN_E(nbits, lhs) ((lhs) >> VL_BITBIT_E((nbits) - VL_EUL(1)))
 #define VL_SIGN_W(nbits, rwp) \
-    ((rwp)[VL_BITWORD_E((nbits)-VL_EUL(1))] >> VL_BITBIT_E((nbits)-VL_EUL(1)))
+    ((rwp)[VL_BITWORD_E((nbits) - VL_EUL(1))] >> VL_BITBIT_E((nbits) - VL_EUL(1)))
 #define VL_SIGNONES_E(nbits, lhs) (-(VL_SIGN_E(nbits, lhs)))
 
 // Sign bit extended up to MSB, doesn't include unsigned portion
@@ -447,9 +458,11 @@ static inline void VL_ASSIGNBIT_WO(int bit, WDataOutP owp) VL_MT_SAFE {
 
 //===================================================================
 // SYSTEMC OPERATORS
-// Copying verilog format to systemc integers and bit vectors.
+// Copying verilog format to systemc integers, doubles, and bit vectors.
 // Get a SystemC variable
 
+#define VL_ASSIGN_DSD(obits, vvar, svar) \
+    { (vvar) = (svar).read(); }
 #define VL_ASSIGN_ISI(obits, vvar, svar) \
     { (vvar) = VL_CLEAN_II((obits), (obits), (svar).read()); }
 #define VL_ASSIGN_QSQ(obits, vvar, svar) \
@@ -493,9 +506,11 @@ static inline void VL_ASSIGNBIT_WO(int bit, WDataOutP owp) VL_MT_SAFE {
         (owp)[words - 1] &= VL_MASK_E(obits); \
     }
 
-// Copying verilog format from systemc integers and bit vectors.
+// Copying verilog format from systemc integers, doubles, and bit vectors.
 // Set a SystemC variable
 
+#define VL_ASSIGN_SDD(obits, svar, vvar) \
+    { (svar).write(vvar); }
 #define VL_ASSIGN_SII(obits, svar, vvar) \
     { (svar).write(vvar); }
 #define VL_ASSIGN_SQQ(obits, svar, vvar) \
@@ -543,8 +558,8 @@ static inline void VL_ASSIGNBIT_WO(int bit, WDataOutP owp) VL_MT_SAFE {
             lsb += BITS_PER_DIGIT; \
         } \
         if (lsb < (obits)) { \
-            const uint32_t msb_data = VL_SEL_IWII((obits) + 1, (rwp).data(), lsb, (obits)-lsb); \
-            *chunkp = msb_data & VL_MASK_E((obits)-lsb); \
+            const uint32_t msb_data = VL_SEL_IWII((obits) + 1, (rwp).data(), lsb, (obits) - lsb); \
+            *chunkp = msb_data & VL_MASK_E((obits) - lsb); \
         } \
         _butemp.set(0, *(rwp).data() & 1); /* force update the sign */ \
         (svar).write(_butemp); \
@@ -637,7 +652,7 @@ static inline IData VL_REDAND_IW(int lbits, WDataInP const lwp) VL_PURE {
     EData combine = lwp[0];
     for (int i = 1; i < words - 1; ++i) combine &= lwp[i];
     combine &= ~VL_MASK_E(lbits) | lwp[words - 1];
-    // cppcheck-has-bug-suppress knownConditionTrueFalse
+    // cppcheck-suppress knownConditionTrueFalse
     return ((~combine) == 0);
 }
 
@@ -1079,14 +1094,12 @@ static inline WDataOutP VL_MULS_WWW(int lbits, WDataOutP owp, WDataInP const lwp
     if (lneg) {  // Negate lhs
         lwusp = lwstore;
         VL_NEGATE_W(words, lwstore, lwp);
-        // cppcheck-has-bug-suppress unreadVariable
         lwstore[words - 1] &= VL_MASK_E(lbits);  // Clean it
     }
     const EData rneg = VL_SIGN_E(lbits, rwp[words - 1]);
     if (rneg) {  // Negate rhs
         rwusp = rwstore;
         VL_NEGATE_W(words, rwstore, rwp);
-        // cppcheck-has-bug-suppress unreadVariable
         rwstore[words - 1] &= VL_MASK_E(lbits);  // Clean it
     }
     VL_MUL_W(words, owp, lwusp, rwusp);
@@ -1594,26 +1607,28 @@ static inline WDataOutP VL_STREAML_WWI(int lbits, WDataOutP owp, WDataInP const
     return owp;
 }
 
-static inline IData VL_PACK_II(int obits, int lbits, const VlQueue<CData>& q) {
+static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<CData>& q) {
     IData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<IData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<IData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
-static inline IData VL_PACK_II(int obits, int lbits, const VlQueue<SData>& q) {
+static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<SData>& q) {
     IData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<IData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<IData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
-static inline IData VL_PACK_II(int obits, int lbits, const VlQueue<IData>& q) {
+static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<IData>& q) {
     IData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= q.at(i) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i) ret |= q.at(q.size() - 1 - i) << (i * lbits);
     return ret;
 }
 
 template <std::size_t N_Depth>
-static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<CData, N_Depth>& q) {
+static inline IData VL_PACK_I_UI(int obits, int lbits, const VlUnpacked<CData, N_Depth>& q) {
     IData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<IData>(q[N_Depth - 1 - i]) << (i * lbits);
@@ -1621,7 +1636,7 @@ static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<CData, N_D
 }
 
 template <std::size_t N_Depth>
-static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<SData, N_Depth>& q) {
+static inline IData VL_PACK_I_UI(int obits, int lbits, const VlUnpacked<SData, N_Depth>& q) {
     IData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<IData>(q[N_Depth - 1 - i]) << (i * lbits);
@@ -1629,32 +1644,35 @@ static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<SData, N_D
 }
 
 template <std::size_t N_Depth>
-static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<IData, N_Depth>& q) {
+static inline IData VL_PACK_I_UI(int obits, int lbits, const VlUnpacked<IData, N_Depth>& q) {
     IData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i) ret |= q[N_Depth - 1 - i] << (i * lbits);
     return ret;
 }
 
-static inline QData VL_PACK_QI(int obits, int lbits, const VlQueue<CData>& q) {
+static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<CData>& q) {
     QData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<QData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
-static inline QData VL_PACK_QI(int obits, int lbits, const VlQueue<SData>& q) {
+static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<SData>& q) {
     QData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<QData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
-static inline QData VL_PACK_QI(int obits, int lbits, const VlQueue<IData>& q) {
+static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<IData>& q) {
     QData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<QData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
 template <std::size_t N_Depth>
-static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<CData, N_Depth>& q) {
+static inline QData VL_PACK_Q_UI(int obits, int lbits, const VlUnpacked<CData, N_Depth>& q) {
     QData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<QData>(q[N_Depth - 1 - i]) << (i * lbits);
@@ -1662,7 +1680,7 @@ static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<CData, N_D
 }
 
 template <std::size_t N_Depth>
-static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<SData, N_Depth>& q) {
+static inline QData VL_PACK_Q_UI(int obits, int lbits, const VlUnpacked<SData, N_Depth>& q) {
     QData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<QData>(q[N_Depth - 1 - i]) << (i * lbits);
@@ -1670,50 +1688,53 @@ static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<SData, N_D
 }
 
 template <std::size_t N_Depth>
-static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<IData, N_Depth>& q) {
+static inline QData VL_PACK_Q_UI(int obits, int lbits, const VlUnpacked<IData, N_Depth>& q) {
     QData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<QData>(q[N_Depth - 1 - i]) << (i * lbits);
     return ret;
 }
 
-static inline QData VL_PACK_QQ(int obits, int lbits, const VlQueue<QData>& q) {
+static inline QData VL_PACK_Q_RQ(int obits, int lbits, const VlQueue<QData>& q) {
     QData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= q.at(i) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i) ret |= q.at(q.size() - 1 - i) << (i * lbits);
     return ret;
 }
 
 template <std::size_t N_Depth>
-static inline QData VL_PACK_QQ(int obits, int lbits, const VlUnpacked<QData, N_Depth>& q) {
+static inline QData VL_PACK_Q_UQ(int obits, int lbits, const VlUnpacked<QData, N_Depth>& q) {
     QData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i) ret |= q[N_Depth - 1 - i] << (i * lbits);
     return ret;
 }
 
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp, const VlQueue<CData>& q) {
+static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<CData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WI(owp, q.at(q.size() - i - 1), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp, const VlQueue<SData>& q) {
+static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<SData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WI(owp, q.at(q.size() - i - 1), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp, const VlQueue<IData>& q) {
+static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<IData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WI(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
 template <std::size_t N_Depth>
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<CData, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UI(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<CData, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WI(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
@@ -1721,8 +1742,8 @@ static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
 }
 
 template <std::size_t N_Depth>
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<SData, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UI(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<SData, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WI(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
@@ -1730,24 +1751,25 @@ static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
 }
 
 template <std::size_t N_Depth>
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<IData, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UI(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<IData, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WI(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
-static inline WDataOutP VL_PACK_WQ(int obits, int lbits, WDataOutP owp, const VlQueue<QData>& q) {
+static inline WDataOutP VL_PACK_W_RQ(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<QData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WQ(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WQ(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
 template <std::size_t N_Depth>
-static inline WDataOutP VL_PACK_WQ(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<QData, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UQ(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<QData, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WQ(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
@@ -1755,17 +1777,17 @@ static inline WDataOutP VL_PACK_WQ(int obits, int lbits, WDataOutP owp,
 }
 
 template <std::size_t N_Words>
-static inline WDataOutP VL_PACK_WW(int obits, int lbits, WDataOutP owp,
-                                   const VlQueue<VlWide<N_Words>>& q) {
+static inline WDataOutP VL_PACK_W_RW(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<VlWide<N_Words>>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WW(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WW(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
 template <std::size_t N_Depth, std::size_t N_Words>
-static inline WDataOutP VL_PACK_WW(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<VlWide<N_Words>, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UW(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<VlWide<N_Words>, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WW(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
@@ -2208,180 +2230,371 @@ static inline WDataOutP VL_SEL_WWII(int obits, int lbits, WDataOutP owp, WDataIn
     return owp;
 }
 
+template <typename T>
+static inline VlQueue<T> VL_CLONE_Q(const VlQueue<T>& from, int lbits, int srcElementBits,
+                                    int dstElementBits) {
+    VlQueue<T> ret;
+    VL_COPY_Q(ret, from, lbits, srcElementBits, dstElementBits);
+    return ret;
+}
+
+template <typename T>
+static inline VlQueue<T> VL_REVCLONE_Q(const VlQueue<T>& from, int lbits, int srcElementBits,
+                                       int dstElementBits) {
+    VlQueue<T> ret;
+    VL_REVCOPY_Q(ret, from, lbits, srcElementBits, dstElementBits);
+    return ret;
+}
+
+// Helper function to get a bit from a queue at a specific bit index
+template <typename T>
+static inline bool VL_GET_QUEUE_BIT(const VlQueue<T>& queue, int srcElementBits, size_t bitIndex) {
+    const size_t elemIdx = bitIndex / srcElementBits;
+    if (VL_UNLIKELY(elemIdx >= queue.size())) return false;
+
+    const T element = queue.at(elemIdx);
+    if (srcElementBits == 1) {
+        return element & 1;
+    } else {
+        const size_t bitInElem = bitIndex % srcElementBits;
+        const size_t actualBitPos = srcElementBits - 1 - bitInElem;
+        return (element >> actualBitPos) & 1;
+    }
+}
+
+// Helper function to set a bit in the destination queue
+template <typename T>
+static inline void VL_SET_QUEUE_BIT(VlQueue<T>& queue, int dstElementBits, size_t bitIndex,
+                                    bool value) {
+    if (dstElementBits == 1) {
+        if (VL_UNLIKELY(bitIndex >= queue.size())) return;
+        queue.atWrite(bitIndex) = value ? 1 : 0;
+    } else {
+        const size_t elemIdx = bitIndex / dstElementBits;
+        if (VL_UNLIKELY(elemIdx >= queue.size())) return;
+        const size_t bitInElem = bitIndex % dstElementBits;
+        const size_t actualBitPos = dstElementBits - 1 - bitInElem;
+        if (value) {
+            queue.atWrite(elemIdx) |= (static_cast<T>(1) << actualBitPos);
+        } else {
+            queue.atWrite(elemIdx) &= ~(static_cast<T>(1) << actualBitPos);
+        }
+    }
+}
+
+// Helper function to get a bit from a VlWide queue at a specific bit index
+template <std::size_t N_Words>
+static inline bool VL_GET_QUEUE_BIT(const VlQueue<VlWide<N_Words>>& queue, int srcElementBits,
+                                    size_t bitIndex) {
+    const size_t elemIdx = bitIndex / srcElementBits;
+    if (VL_UNLIKELY(elemIdx >= queue.size())) return false;
+
+    const VlWide<N_Words>& element = queue.at(elemIdx);
+    const size_t bitInElem = bitIndex % srcElementBits;
+    const size_t actualBitPos = srcElementBits - 1 - bitInElem;
+
+    return VL_BITISSET_W(element.data(), actualBitPos);
+}
+
+// Helper function to set a bit in a VlWide queue at a specific bit index
+template <std::size_t N_Words>
+static inline void VL_SET_QUEUE_BIT(VlQueue<VlWide<N_Words>>& queue, int dstElementBits,
+                                    size_t bitIndex, bool value) {
+    const size_t elemIdx = bitIndex / dstElementBits;
+    if (VL_UNLIKELY(elemIdx >= queue.size())) return;
+
+    const size_t bitInElem = bitIndex % dstElementBits;
+    const size_t actualBitPos = dstElementBits - 1 - bitInElem;
+
+    VlWide<N_Words>& element = queue.atWrite(elemIdx);
+    if (value) {
+        VL_ASSIGNBIT_WO(actualBitPos, element.data());
+    } else {
+        VL_ASSIGNBIT_WI(actualBitPos, element.data(), 0);
+    }
+}
+
+template <typename T>
+static inline void VL_ZERO_INIT_QUEUE_ELEM(T& elem) {
+    elem = 0;
+}
+
+template <std::size_t N_Words>
+static inline void VL_ZERO_INIT_QUEUE_ELEM(VlWide<N_Words>& elem) {
+    for (size_t j = 0; j < N_Words; ++j) { elem.at(j) = 0; }
+}
+
+// This specialization works for both VlQueue<CData> (and similar) as well
+// as VlQueue<VlWide<N>>.
+template <typename T>
+static inline void VL_COPY_Q(VlQueue<T>& q, const VlQueue<T>& from, int lbits, int srcElementBits,
+                             int dstElementBits) {
+    if (srcElementBits == dstElementBits) {
+        // Simple case: same element bit width, direct copy of each element
+        if (VL_UNLIKELY(&q == &from)) return;  // Skip self-assignment when it's truly a no-op
+        q = from;
+    } else {
+        // Different element bit widths: use streaming conversion
+        VlQueue<T> srcCopy = from;
+        const size_t srcTotalBits = from.size() * srcElementBits;
+        const size_t dstSize = (srcTotalBits + dstElementBits - 1) / dstElementBits;
+        q.renew(dstSize);
+        for (size_t i = 0; i < dstSize; ++i) { VL_ZERO_INIT_QUEUE_ELEM(q.atWrite(i)); }
+        for (size_t bitIndex = 0; bitIndex < srcTotalBits; ++bitIndex) {
+            VL_SET_QUEUE_BIT(q, dstElementBits, bitIndex,
+                             VL_GET_QUEUE_BIT(srcCopy, srcElementBits, bitIndex));
+        }
+    }
+}
+
+// This specialization works for both VlQueue<CData> (and similar) as well
+// as VlQueue<VlWide<N>>.
+template <typename T>
+static inline void VL_REVCOPY_Q(VlQueue<T>& q, const VlQueue<T>& from, int lbits,
+                                int srcElementBits, int dstElementBits) {
+    const size_t srcTotalBits = from.size() * srcElementBits;
+    const size_t dstSize = (srcTotalBits + dstElementBits - 1) / dstElementBits;
+
+    // Always make a copy to handle the case where q and from are the same queue
+    VlQueue<T> srcCopy = from;
+
+    // Initialize all elements to zero using appropriate method
+    q.renew(dstSize);
+    for (size_t i = 0; i < dstSize; ++i) VL_ZERO_INIT_QUEUE_ELEM(q.atWrite(i));
+
+    if (lbits == 1) {
+        // Simple bit reversal: write directly to destination
+        for (int i = srcTotalBits - 1; i >= 0; --i) {
+            VL_SET_QUEUE_BIT(q, dstElementBits, srcTotalBits - 1 - i,
+                             VL_GET_QUEUE_BIT(srcCopy, srcElementBits, i));
+        }
+    } else {
+        // Generalized block-reversal for lbits > 1:
+        // 1. Reverse all bits using 1-bit blocks
+        // 2. Split into lbits-sized blocks and pad incomplete blocks on the left
+        // 3. Reverse each lbits-sized block using 1-bit blocks
+        const size_t numCompleteBlocks = srcTotalBits / lbits;
+        const size_t remainderBits = srcTotalBits % lbits;
+        const size_t srcBlocks = numCompleteBlocks + (remainderBits > 0 ? 1 : 0);
+
+        size_t dstBitIndex = 0;
+
+        for (size_t block = 0; block < srcBlocks; ++block) {
+            const size_t blockStart = block * lbits;
+            const int bitsToProcess = VL_LIKELY(block < numCompleteBlocks) ? lbits : remainderBits;
+            for (int bit = bitsToProcess - 1; bit >= 0; --bit) {
+                const size_t reversedBitIndex = blockStart + bit;
+                const size_t originalBitIndex = srcTotalBits - 1 - reversedBitIndex;
+                VL_SET_QUEUE_BIT(q, dstElementBits, dstBitIndex++,
+                                 VL_GET_QUEUE_BIT(srcCopy, srcElementBits, originalBitIndex));
+            }
+            dstBitIndex += lbits - bitsToProcess;
+        }
+    }
+}
+
 //======================================================================
 // Expressions needing insert/select
 
-static inline void VL_UNPACK_II(int lbits, int rbits, VlQueue<CData>& q, IData from) {
+static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<CData>& q, IData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(size - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_II(int lbits, int rbits, VlQueue<SData>& q, IData from) {
+static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<SData>& q, IData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(size - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_II(int lbits, int rbits, VlQueue<IData>& q, IData from) {
+static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<IData>& q, IData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(size - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlQueue<CData>& q, QData from) {
+static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<CData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(size - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlQueue<SData>& q, QData from) {
+static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<SData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(size - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlQueue<IData>& q, QData from) {
+static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<IData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(size - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_QQ(int lbits, int rbits, VlQueue<QData>& q, QData from) {
+static inline void VL_UNPACK_RQ_Q(int lbits, int rbits, VlQueue<QData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const QData mask = VL_MASK_Q(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(size - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<CData>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RI_W(int lbits, int rbits, VlQueue<CData>& q, WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) {
-        q.atWrite(i) = VL_SEL_IWII(rbits, rwp, i * lbits, lbits) & mask;
+        // Extract from MSB to LSB: MSB goes to index 0
+        const int bitPos = rbits - (i + 1) * lbits;
+        const int actualBitPos = (bitPos < 0) ? 0 : bitPos;
+        const int actualWidth = (bitPos < 0) ? (lbits + bitPos) : lbits;
+        q.atWrite(i) = VL_SEL_IWII(rbits, rwp, actualBitPos, actualWidth) & mask;
     }
 }
 
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<SData>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RI_W(int lbits, int rbits, VlQueue<SData>& q, WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) {
-        q.atWrite(i) = VL_SEL_IWII(rbits, rwp, i * lbits, lbits) & mask;
+        // Extract from MSB to LSB: MSB goes to index 0
+        const int bitPos = rbits - (i + 1) * lbits;
+        const int actualBitPos = (bitPos < 0) ? 0 : bitPos;
+        const int actualWidth = (bitPos < 0) ? (lbits + bitPos) : lbits;
+        q.atWrite(i) = VL_SEL_IWII(rbits, rwp, actualBitPos, actualWidth) & mask;
     }
 }
 
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<IData>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RI_W(int lbits, int rbits, VlQueue<IData>& q, WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) {
-        q.atWrite(i) = VL_SEL_IWII(rbits, rwp, i * lbits, lbits) & mask;
+        // Extract from MSB to LSB: MSB goes to index 0
+        const int bitPos = rbits - (i + 1) * lbits;
+        const int actualBitPos = (bitPos < 0) ? 0 : bitPos;
+        const int actualWidth = (bitPos < 0) ? (lbits + bitPos) : lbits;
+        q.atWrite(i) = VL_SEL_IWII(rbits, rwp, actualBitPos, actualWidth) & mask;
     }
 }
 
-static inline void VL_UNPACK_QW(int lbits, int rbits, VlQueue<QData>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RQ_W(int lbits, int rbits, VlQueue<QData>& q, WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const QData mask = VL_MASK_Q(lbits);
     for (size_t i = 0; i < size; ++i) {
-        q.atWrite(i) = VL_SEL_QWII(rbits, rwp, i * lbits, lbits) & mask;
+        // Extract from MSB to LSB: MSB goes to index 0
+        const int bitPos = rbits - (i + 1) * lbits;
+        const int actualBitPos = (bitPos < 0) ? 0 : bitPos;
+        const int actualWidth = (bitPos < 0) ? (lbits + bitPos) : lbits;
+        q.atWrite(i) = VL_SEL_QWII(rbits, rwp, actualBitPos, actualWidth) & mask;
     }
 }
 
 template <std::size_t N_Words>
-static inline void VL_UNPACK_WW(int lbits, int rbits, VlQueue<VlWide<N_Words>>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RW_W(int lbits, int rbits, VlQueue<VlWide<N_Words>>& q,
+                                  WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     for (size_t i = 0; i < size; ++i) {
-        VL_SEL_WWII(lbits, rbits, q.atWrite(i), rwp, i * lbits, lbits);
+        // Extract from MSB to LSB: MSB goes to index 0
+        const int bitPos = rbits - (i + 1) * lbits;
+        const int actualBitPos = (bitPos < 0) ? 0 : bitPos;
+        const int actualWidth = (bitPos < 0) ? (lbits + bitPos) : lbits;
+        VL_SEL_WWII(actualWidth, rbits, q.atWrite(i), rwp, actualBitPos, actualWidth);
     }
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_II(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q, IData from) {
+static inline void VL_UNPACK_UI_I(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q,
+                                  IData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_II(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q, IData from) {
+static inline void VL_UNPACK_UI_I(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q,
+                                  IData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_II(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q, IData from) {
+static inline void VL_UNPACK_UI_I(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q,
+                                  IData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q, QData from) {
+static inline void VL_UNPACK_UI_Q(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q,
+                                  QData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q, QData from) {
+static inline void VL_UNPACK_UI_Q(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q,
+                                  QData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q, QData from) {
+static inline void VL_UNPACK_UI_Q(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q,
+                                  QData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_QQ(int lbits, int rbits, VlUnpacked<QData, N_Depth>& q, QData from) {
+static inline void VL_UNPACK_UQ_Q(int lbits, int rbits, VlUnpacked<QData, N_Depth>& q,
+                                  QData from) {
     const QData mask = VL_MASK_Q(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UI_W(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q,
+                                  WDataInP rwp) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i)
         q[i] = VL_SEL_IWII(rbits, rwp, (N_Depth - 1 - i) * lbits, lbits) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UI_W(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q,
+                                  WDataInP rwp) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i)
         q[i] = VL_SEL_IWII(rbits, rwp, (N_Depth - 1 - i) * lbits, lbits) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UI_W(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q,
+                                  WDataInP rwp) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i)
         q[i] = VL_SEL_IWII(rbits, rwp, (N_Depth - 1 - i) * lbits, lbits) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_QW(int lbits, int rbits, VlUnpacked<QData, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UQ_W(int lbits, int rbits, VlUnpacked<QData, N_Depth>& q,
+                                  WDataInP rwp) {
     const QData mask = VL_MASK_Q(lbits);
     for (size_t i = 0; i < N_Depth; ++i)
         q[i] = VL_SEL_QWII(rbits, rwp, (N_Depth - 1 - i) * lbits, lbits) & mask;
 }
 
 template <std::size_t N_Depth, std::size_t N_Words>
-static inline void VL_UNPACK_WW(int lbits, int rbits, VlUnpacked<VlWide<N_Words>, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UW_W(int lbits, int rbits, VlUnpacked<VlWide<N_Words>, N_Depth>& q,
+                                  WDataInP rwp) {
     for (size_t i = 0; i < N_Depth; ++i)
         VL_SEL_WWII(lbits, rbits, q[i], rwp, (N_Depth - 1 - i) * lbits, lbits);
 }
@@ -2545,6 +2758,7 @@ static inline void VL_SELASSIGN_WW(int rbits, int obits, WDataOutP iowp, WDataIn
         const int w = obits < upperbits ? obits : upperbits;
         const int insmask = VL_MASK_E(w);
         iowp[0] = (iowp[0] & ~insmask) | ((rwp[wordoff] >> lsb) & insmask);
+        // cppcheck-suppress knownConditionTrueFalse
         if (w == obits) return;
         obits -= w;
     }
@@ -2772,9 +2986,16 @@ extern IData VL_SSCANF_INNX(int lbits, const std::string& ld, const std::string&
 extern void VL_SFORMAT_NX(int obits_ignored, std::string& output, const std::string& format,
                           int argc, ...) VL_MT_SAFE;
 extern std::string VL_SFORMATF_N_NX(const std::string& format, int argc, ...) VL_MT_SAFE;
-extern void VL_TIMEFORMAT_IINI(int units, int precision, const std::string& suffix, int width,
+extern void VL_TIMEFORMAT_IINI(bool hasUnits, int units, bool hasPrecision, int precision,
+                               bool hasSuffix, const std::string& suffix, bool hasWidth, int width,
                                VerilatedContext* contextp) VL_MT_SAFE;
 extern IData VL_VALUEPLUSARGS_INW(int rbits, const std::string& ld, WDataOutP rwp) VL_MT_SAFE;
+inline IData VL_VALUEPLUSARGS_IND(int rbits, const std::string& ld, double& rdr) VL_MT_SAFE {
+    VlWide<2> rwp;
+    const IData got = VL_VALUEPLUSARGS_INW(rbits, ld, rwp);
+    if (got) rdr = VL_CVT_D_Q(VL_SET_QW(rwp));
+    return got;
+}
 inline IData VL_VALUEPLUSARGS_INI(int rbits, const std::string& ld, CData& rdr) VL_MT_SAFE {
     VlWide<2> rwp;
     const IData got = VL_VALUEPLUSARGS_INW(rbits, ld, rwp);
@@ -2807,6 +3028,8 @@ inline IData VL_VALUEPLUSARGS_INQ(int rbits, const std::string& ld, double& rdr)
 }
 extern IData VL_VALUEPLUSARGS_INN(int, const std::string& ld, std::string& rdr) VL_MT_SAFE;
 
+uint64_t VL_MURMUR64_HASH(const char* key) VL_PURE;
+
 //======================================================================
 
 #endif  // Guard

include/verilated_imp.h

@@ -363,7 +363,7 @@ private:
     VerilatedFpList fdToFpList(IData fdi) VL_REQUIRES(m_fdMutex) {
         VerilatedFpList fp;
         // cppverilator-suppress integerOverflow shiftTooManyBitsSigned
-        if ((fdi & (1 << 31)) != 0) {
+        if (VL_BITISSET_I(fdi, 31)) {
             // Non-MCD case
             const IData idx = fdi & VL_MASK_I(31);
             switch (idx) {

include/verilated_probdist.cpp

@@ -116,7 +116,7 @@ IData VL_DIST_ERLANG(IData& seedr, IData uk, IData umean) VL_MT_SAFE {
         return 0;
     }
     double x = 1.0;
-    for (int32_t i = 1; i <= k; i++) x = x * _vl_dbase_uniform(seedr, 0, 1);
+    for (int32_t i = 1; i <= k; ++i) x = x * _vl_dbase_uniform(seedr, 0, 1);
     const double a = static_cast<double>(mean);
     const double b = static_cast<double>(k);
     double r = -a * log(x) / b;

include/verilated_profiler.cpp

@@ -145,7 +145,7 @@ void VlExecutionProfiler::dump(const char* filenamep, uint64_t tickEnd)
     fprintf(fp, "VLPROF arg +verilator+prof+exec+window+%u\n",
             Verilated::threadContextp()->profExecWindow());
     std::string numa = "no threads";
-    if (VlThreadPool* const threadPoolp
+    if (const VlThreadPool* const threadPoolp
         = static_cast<VlThreadPool*>(Verilated::threadContextp()->threadPoolp())) {
         numa = threadPoolp->numaStatus();
     }

include/verilated_profiler.h

@@ -218,7 +218,7 @@ class VlPgoProfiler final {
     };
 
     // Counters are stored packed, all together to reduce cache effects
-    std::array<uint64_t, N_Entries> m_counters;  // Time spent on this record
+    std::array<uint64_t, N_Entries> m_counters{};  // Time spent on this record
     std::vector<Record> m_records;  // Record information
 
 public:

include/verilated_random.cpp

@@ -112,7 +112,7 @@ public:
         if (m_pidStatus) {
             std::stringstream msg;
             msg << "Subprocess command `" << m_cmd[0];
-            for (const char* const* arg = m_cmd + 1; *arg; arg++) msg << ' ' << *arg;
+            for (const char* const* arg = m_cmd + 1; *arg; ++arg) msg << ' ' << *arg;
             msg << "' failed: ";
             if (WIFSIGNALED(m_pidStatus))
                 msg << strsignal(WTERMSIG(m_pidStatus))
@@ -221,7 +221,7 @@ static Process& getSolver() {
     static std::vector<const char*> s_argv;
     static std::string s_program = Verilated::threadContextp()->solverProgram();
     s_argv.emplace_back(&s_program[0]);
-    for (char* arg = &s_program[0]; *arg; arg++) {
+    for (char* arg = &s_program[0]; *arg; ++arg) {
         if (*arg == ' ') {
             *arg = '\0';
             s_argv.emplace_back(arg + 1);
@@ -242,7 +242,7 @@ static Process& getSolver() {
     msg << "Unable to communicate with SAT solver, please check its installation or specify a "
            "different one in VERILATOR_SOLVER environment variable.\n";
     msg << " ... Tried: $";
-    for (const char* const* arg = cmd; *arg; arg++) msg << ' ' << *arg;
+    for (const char* const* arg = cmd; *arg; ++arg) msg << ' ' << *arg;
     msg << '\n';
     const std::string str = msg.str();
     VL_WARN_MT("", 0, "randomize", str.c_str());
@@ -294,7 +294,7 @@ void VlRandomVar::emitType(std::ostream& s) const { s << "(_ BitVec " << width()
 int VlRandomVar::totalWidth() const { return m_width; }
 static bool parseSMTNum(int obits, WDataOutP owp, const std::string& val) {
     int i;
-    for (i = 0; val[i] && val[i] != '#'; i++) {}
+    for (i = 0; val[i] && val[i] != '#'; ++i) {}
     if (val[i++] != '#') return false;
     switch (val[i++]) {
     case 'b': _vl_vsss_based(owp, obits, 1, &val[i], 0, val.size() - i); break;
@@ -345,7 +345,7 @@ void VlRandomizer::randomConstraint(std::ostream& os, VlRNG& rngr, int bits) {
     os << "(= #b";
     for (int i = bits - 1; i >= 0; i--) os << (VL_BITISSET_I(hash, i) ? '1' : '0');
     if (bits > 1) os << " (concat";
-    for (int i = 0; i < bits; i++) {
+    for (int i = 0; i < bits; ++i) {
         IData varBitsLeft = varBits;
         IData varBitsWant = (varBits + 1) / 2;
         if (varBits > 2) os << " (bvxor";
@@ -393,7 +393,7 @@ bool VlRandomizer::next(VlRNG& rngr) {
         f << "(reset)\n";
         return false;
     }
-    for (int i = 0; i < _VL_SOLVER_HASH_LEN_TOTAL && sat; i++) {
+    for (int i = 0; i < _VL_SOLVER_HASH_LEN_TOTAL && sat; ++i) {
         f << "(assert ";
         randomConstraint(f, rngr, _VL_SOLVER_HASH_LEN);
         f << ")\n";
@@ -455,8 +455,8 @@ bool VlRandomizer::parseSolution(std::iostream& f) {
         const auto it = m_vars.find(name);
         if (it == m_vars.end()) continue;
         const VlRandomVar& varr = *it->second;
-        if (m_randmode && !varr.randModeIdxNone()) {
-            if (!(m_randmode->at(varr.randModeIdx()))) continue;
+        if (m_randmodep && !varr.randModeIdxNone()) {
+            if (!m_randmodep->at(varr.randModeIdx())) continue;
         }
         if (!indices.empty()) {
             std::ostringstream oss;

include/verilated_random.h

@@ -45,11 +45,11 @@ public:
 
     ArrayInfo(const std::string& name, void* datap, int index, const std::vector<IData>& indices,
               const std::vector<size_t>& idxWidths)
-        : m_name(name)
-        , m_datap(datap)
-        , m_index(index)
-        , m_indices(indices)
-        , m_idxWidths(idxWidths) {}
+        : m_name{name}
+        , m_datap{datap}
+        , m_index{index}
+        , m_indices{indices}
+        , m_idxWidths{idxWidths} {}
 };
 using ArrayInfoMap = std::map<std::string, std::shared_ptr<const ArrayInfo>>;
 
@@ -143,7 +143,7 @@ public:
     }
     void emitGetValue(std::ostream& s) const override {
         const int elementCounts = countMatchingElements(*m_arrVarsRefp, name());
-        for (int i = 0; i < elementCounts; i++) {
+        for (int i = 0; i < elementCounts; ++i) {
             const std::string indexed_name = name() + std::to_string(i);
             const auto it = m_arrVarsRefp->find(indexed_name);
             if (it != m_arrVarsRefp->end()) {
@@ -200,7 +200,7 @@ class VlRandomizer final {
     std::map<std::string, std::shared_ptr<const VlRandomVar>> m_vars;  // Solver-dependent
                                                                        // variables
     ArrayInfoMap m_arr_vars;  // Tracks each element in array structures for iteration
-    const VlQueue<CData>* m_randmode;  // rand_mode state;
+    const VlQueue<CData>* m_randmodep = nullptr;  // rand_mode state;
     int m_index = 0;  // Internal counter for key generation
 
     // PRIVATE METHODS
@@ -382,8 +382,9 @@ public:
 
     // Register associative array of non-struct types
     template <typename T_Key, typename T_Value>
-    void write_var(VlAssocArray<T_Key, T_Value>& var, int width, const char* name, int dimension,
-                   std::uint32_t randmodeIdx = std::numeric_limits<std::uint32_t>::max()) {
+    typename std::enable_if<!VlContainsCustomStruct<T_Value>::value, void>::type
+    write_var(VlAssocArray<T_Key, T_Value>& var, int width, const char* name, int dimension,
+              std::uint32_t randmodeIdx = std::numeric_limits<std::uint32_t>::max()) {
         if (m_vars.find(name) != m_vars.end()) return;
         m_vars[name]
             = std::make_shared<const VlRandomArrayVarTemplate<VlAssocArray<T_Key, T_Value>>>(
@@ -394,16 +395,21 @@ public:
         }
     }
 
-    // TODO: Register associative array of structs
-
+    // Register associative array of structs
+    template <typename T_Key, typename T_Value>
+    typename std::enable_if<VlContainsCustomStruct<T_Value>::value, void>::type
+    write_var(VlAssocArray<T_Key, T_Value>& var, int width, const char* name, int dimension,
+              std::uint32_t randmodeIdx = std::numeric_limits<std::uint32_t>::max()) {
+        if (dimension > 0) record_struct_arr(var, name, dimension, {}, {});
+    }
     // ----------------------------------------
     // ---  Record Arrays: flat and struct  ---
     // ----------------------------------------
 
     // Record a flat (non-class) element into the array variable table
     template <typename T>
-    typename std::enable_if<!std::is_class<T>::value, void>::type
-    record_arr_table(T& var, const std::string name, int dimension, std::vector<IData> indices,
+    typename std::enable_if<!std::is_class<T>::value || VlIsVlWide<T>::value, void>::type
+    record_arr_table(T& var, const std::string& name, int dimension, std::vector<IData> indices,
                      std::vector<size_t> idxWidths) {
         const std::string key = generateKey(name, m_index);
         m_arr_vars[key] = std::make_shared<ArrayInfo>(name, &var, m_index, indices, idxWidths);
@@ -412,7 +418,7 @@ public:
 
     // Recursively record all elements in an unpacked array
     template <typename T, std::size_t N_Depth>
-    void record_arr_table(VlUnpacked<T, N_Depth>& var, const std::string name, int dimension,
+    void record_arr_table(VlUnpacked<T, N_Depth>& var, const std::string& name, int dimension,
                           std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if ((dimension > 0) && (N_Depth != 0)) {
             idxWidths.push_back(32);
@@ -428,7 +434,7 @@ public:
 
     // Recursively record all elements in a queue
     template <typename T>
-    void record_arr_table(VlQueue<T>& var, const std::string name, int dimension,
+    void record_arr_table(VlQueue<T>& var, const std::string& name, int dimension,
                           std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if ((dimension > 0) && (var.size() != 0)) {
             idxWidths.push_back(32);
@@ -443,8 +449,9 @@ public:
 
     // Recursively record all elements in an associative array
     template <typename T_Key, typename T_Value>
-    void record_arr_table(VlAssocArray<T_Key, T_Value>& var, const std::string name, int dimension,
-                          std::vector<IData> indices, std::vector<size_t> idxWidths) {
+    void record_arr_table(VlAssocArray<T_Key, T_Value>& var, const std::string& name,
+                          int dimension, std::vector<IData> indices,
+                          std::vector<size_t> idxWidths) {
         if ((dimension > 0) && (var.size() != 0)) {
             for (auto it = var.begin(); it != var.end(); ++it) {
                 const T_Key& key = it->first;
@@ -472,22 +479,25 @@ public:
     // Register a single structArray element via write_var
     template <typename T>
     typename std::enable_if<VlContainsCustomStruct<T>::value, void>::type
-    record_struct_arr(T& var, const std::string name, int dimension, std::vector<IData> indices,
+    record_struct_arr(T& var, const std::string& name, int dimension, std::vector<IData> indices,
                       std::vector<size_t> idxWidths) {
         std::ostringstream oss;
         for (size_t i = 0; i < indices.size(); ++i) {
-            oss << std::hex << static_cast<int>(indices[i]);
+            oss << std::hex << std::setw(int(idxWidths[i] / 4)) << std::setfill('0')
+                << static_cast<int>(indices[i]);
             if (i < indices.size() - 1) oss << ".";
         }
-        write_var(var, 1ULL, (name + "." + oss.str()).c_str(), 1ULL);
+        write_var(var, 1ULL,
+                  oss.str().length() > 0 ? (name + "." + oss.str()).c_str() : name.c_str(), 1ULL);
     }
 
     // Recursively process VlUnpacked of structs
     template <typename T, std::size_t N_Depth>
-    void record_struct_arr(VlUnpacked<T, N_Depth>& var, const std::string name, int dimension,
+    void record_struct_arr(VlUnpacked<T, N_Depth>& var, const std::string& name, int dimension,
                            std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if (dimension > 0 && N_Depth != 0) {
-            idxWidths.push_back(32);
+            constexpr size_t idx_width = 1 << VL_CLOG2_CE_Q(VL_CLOG2_CE_Q(N_Depth) + 1);
+            idxWidths.push_back(idx_width);
             for (size_t i = 0; i < N_Depth; ++i) {
                 indices.push_back(i);
                 record_struct_arr(var.operator[](i), name, dimension - 1, indices, idxWidths);
@@ -498,7 +508,7 @@ public:
 
     // Recursively process VlQueue of structs
     template <typename T>
-    void record_struct_arr(VlQueue<T>& var, const std::string name, int dimension,
+    void record_struct_arr(VlQueue<T>& var, const std::string& name, int dimension,
                            std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if ((dimension > 0) && (var.size() != 0)) {
             idxWidths.push_back(32);
@@ -510,16 +520,39 @@ public:
         }
     }
 
-    // TODO: Add support for associative arrays of structs
     // Recursively process associative arrays of structs
+    template <typename T_Key, typename T_Value>
+    void record_struct_arr(VlAssocArray<T_Key, T_Value>& var, const std::string& name,
+                           int dimension, const std::vector<IData>& indices,
+                           const std::vector<size_t>& idxWidths) {
+        if ((dimension > 0) && (!var.empty())) {
+            for (auto it = var.begin(); it != var.end(); ++it) {
+                const T_Key& key = it->first;
+                const T_Value& value = it->second;
 
+                std::string indexed_name;
+                std::vector<size_t> integral_index;
+                size_t idx_width = 0;
+
+                process_key(key, indexed_name, integral_index, name, idx_width);
+                std::ostringstream oss;
+                for (int i = 0; i < integral_index.size(); ++i)
+                    oss << std::hex << static_cast<int>(integral_index[i]);
+
+                std::string result = oss.str();
+                result.insert(result.begin(), int(idx_width / 4) - result.size(), '0');
+                record_struct_arr(var.at(key), name + "." + result, dimension - 1, indices,
+                                  idxWidths);
+            }
+        }
+    }
     // --------------------------
     // ---  Helper functions  ---
     // --------------------------
 
     // Helper: Register all members of a user-defined struct
     template <typename T, std::size_t... I>
-    void modifyMembers(T& obj, std::index_sequence<I...>, std::string baseName) {
+    void modifyMembers(T& obj, std::index_sequence<I...>, const std::string& baseName) {
         // Use the indices to access each member via std::get
         (void)std::initializer_list<int>{
             (write_var(std::get<I>(obj.getMembers(obj)), obj.memberWidth()[I],
@@ -541,10 +574,28 @@ public:
 
     void hard(std::string&& constraint);
     void clear();
-    void set_randmode(const VlQueue<CData>& randmode) { m_randmode = &randmode; }
+    void set_randmode(const VlQueue<CData>& randmode) { m_randmodep = &randmode; }
 #ifdef VL_DEBUG
     void dump() const;
 #endif
 };
 
+//=============================================================================
+// VlStdRandomizer provides a light wrapper for RNG used by std::randomize()
+// to support scope-level randomization.
+class VlStdRandomizer final {
+    // MEMBERS
+    VlRNG m_rng;  // Random number generator
+
+public:
+    // CONSTRUCTORS
+    VlStdRandomizer() = default;
+    ~VlStdRandomizer() = default;
+
+    template <typename T>
+    bool basicStdRandomization(T& value, size_t width) {
+        value = VL_MASK_I(width) & VL_RANDOM_RNG_I(m_rng);
+        return true;
+    }
+};
 #endif  // Guard

include/verilated_saif_c.cpp

@@ -110,7 +110,7 @@ public:
                       "The emitted value must be of integral type");
 
         const uint64_t dt = time - m_lastTime;
-        for (size_t i = 0; i < std::min(m_width, bits); i++) {
+        for (size_t i = 0; i < std::min(m_width, bits); ++i) {
             m_bits[i].aggregateVal(dt, (newval >> i) & 1);
         }
         updateLastTime(time);
@@ -475,18 +475,25 @@ void VerilatedSaif::printIndent() {
 }
 
 void VerilatedSaif::pushPrefix(const std::string& name, VerilatedTracePrefixType type) {
-    std::string pname = name;
-
-    if (m_prefixStack.back().second == VerilatedTracePrefixType::ROOTIO_MODULE) popPrefix();
-    if (pname.empty()) {
-        pname = "$rootio";
-        type = VerilatedTracePrefixType::ROOTIO_MODULE;
+    assert(!m_prefixStack.empty());  // Constructor makes an empty entry
+    // An empty name means this is the root of a model created with
+    // name()=="".  The tools get upset if we try to pass this as empty, so
+    // we put the signals under a new $rootio scope, but the signals
+    // further down will be peers, not children (as usual for name()!="").
+    const std::string prevPrefix = m_prefixStack.back().first;
+    if (name == "$rootio" && !prevPrefix.empty()) {
+        // Upper has name, we can suppress inserting $rootio, but still push so popPrefix works
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
+    } else if (name.empty()) {
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
     }
 
     if (type != VerilatedTracePrefixType::ARRAY_UNPACKED
         && type != VerilatedTracePrefixType::ARRAY_PACKED) {
 
-        std::string scopePath = m_prefixStack.back().first + pname;
+        std::string scopePath = prevPrefix + name;
         std::string scopeName = lastWord(scopePath);
 
         auto newScope = std::make_unique<VerilatedSaifActivityScope>(
@@ -502,23 +509,22 @@ void VerilatedSaif::pushPrefix(const std::string& name, VerilatedTracePrefixType
         m_currentScope = newScopePtr;
     }
 
-    std::string newPrefix = m_prefixStack.back().first + pname;
-    if (type != VerilatedTracePrefixType::ARRAY_UNPACKED
-        && type != VerilatedTracePrefixType::ARRAY_PACKED) {
-        newPrefix += ' ';
-    }
-
-    m_prefixStack.emplace_back(newPrefix, type);
+    const std::string newPrefix = prevPrefix + name;
+    bool properScope = (type != VerilatedTracePrefixType::ARRAY_UNPACKED
+                        && type != VerilatedTracePrefixType::ARRAY_PACKED
+                        && type != VerilatedTracePrefixType::ROOTIO_WRAPPER);
+    m_prefixStack.emplace_back(newPrefix + (properScope ? " " : ""), type);
 }
 
 void VerilatedSaif::popPrefix() {
     if (m_prefixStack.back().second != VerilatedTracePrefixType::ARRAY_UNPACKED
         && m_prefixStack.back().second != VerilatedTracePrefixType::ARRAY_PACKED
-        && m_currentScope != nullptr) {
+        && m_prefixStack.back().second != VerilatedTracePrefixType::ROOTIO_WRAPPER
+        && m_currentScope) {
         m_currentScope = m_currentScope->parentScope();
     }
-
     m_prefixStack.pop_back();
+    assert(!m_prefixStack.empty());  // Always one left, the constructor's initial one
 }
 
 void VerilatedSaif::declare(const uint32_t code, uint32_t fidx, const char* name,

include/verilated_save.cpp

@@ -220,7 +220,7 @@ void VerilatedRestore::fill() VL_MT_UNSAFE_ONE {
     if (VL_UNLIKELY(!isOpen())) return;
     // Move remaining characters down to start of buffer.  (No memcpy, overlaps allowed)
     uint8_t* rp = m_bufp;
-    for (uint8_t* sp = m_cp; sp < m_endp; *rp++ = *sp++) {}  // Overlaps
+    for (const uint8_t* sp = m_cp; sp < m_endp; *rp++ = *sp++) {}  // Overlaps
     m_endp = m_bufp + (m_endp - m_cp);
     m_cp = m_bufp;  // Reset buffer
     // Read into buffer starting at m_endp

include/verilated_save.h

@@ -47,8 +47,10 @@ protected:
     std::string m_filename;  // Filename, for error messages
     VerilatedAssertOneThread m_assertOne;  // Assert only called from single thread
 
-    static constexpr size_t bufferSize() { return 256 * 1024; }  // See below for slack calculation
-    static constexpr size_t bufferInsertSize() { return 16 * 1024; }
+    static constexpr size_t bufferSize() {
+        return 256 * 1024L;
+    }  // See below for slack calculation
+    static constexpr size_t bufferInsertSize() { return 16 * 1024L; }
 
     void header() VL_MT_UNSAFE_ONE;
     void trailer() VL_MT_UNSAFE_ONE;
@@ -119,8 +121,10 @@ protected:
     std::string m_filename;  // Filename, for error messages
     VerilatedAssertOneThread m_assertOne;  // Assert only called from single thread
 
-    static constexpr size_t bufferSize() { return 256 * 1024; }  // See below for slack calculation
-    static constexpr size_t bufferInsertSize() { return 16 * 1024; }
+    static constexpr size_t bufferSize() {
+        return 256 * 1024L;
+    }  // See below for slack calculation
+    static constexpr size_t bufferInsertSize() { return 16 * 1024L; }
 
     virtual void fill() = 0;
     void header() VL_MT_UNSAFE_ONE;
@@ -294,7 +298,7 @@ inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, std::string& r
     uint32_t len = 0;
     os >> len;
     rhs.resize(len);
-    // C cast is required below
+    // cppcheck-suppress cstyleCast  // NOLINTNEXTLINE(google-readability-casting)
     return os.read((void*)(rhs.data()), len);
 }
 VerilatedSerialize& operator<<(VerilatedSerialize& os, VerilatedContext* rhsp);

include/verilated_sc_trace.h

@@ -60,7 +60,7 @@ class VerilatedScTraceBase VL_NOT_FINAL : private sc_core::sc_object,
                                           private sc_core::sc_trace_file {
     bool m_enableDeltaCycles = false;
     bool m_traceFileAdded = false;
-    static void stubReportHandler(const sc_core::sc_report&, const sc_core::sc_actions&){};
+    static void stubReportHandler(const sc_core::sc_report&, const sc_core::sc_actions&) {};
 
 public:
     void enableDeltaCycles(bool flag = true) {

include/verilated_std.sv

@@ -175,6 +175,14 @@ package std;
 `endif
       endtask
 
+      static task killQueue(ref process processQueue[$]);
+`ifdef VERILATOR_TIMING
+         while (processQueue.size() > 0) begin
+            processQueue.pop_back().kill();
+         end
+`endif
+      endtask
+
       // Two process references are equal if the different classes' containing
       // m_process are equal. Can't yet use <=> as the base class template
       // comparisons doesn't define <=> as they don't yet require --timing and C++20.

include/verilated_threads.cpp

@@ -31,6 +31,10 @@
 #include <memory>
 #include <string>
 
+#ifdef __FreeBSD__
+#include <pthread_np.h>
+#endif
+
 //=============================================================================
 // Globals
 
@@ -131,7 +135,7 @@ bool VlThreadPool::isNumactlRunning() {
 }
 
 std::string VlThreadPool::numaAssign() {
-#if defined(__linux) || defined(CPU_ZERO)  // Linux-like; assume we have pthreads etc
+#if defined(__linux) || defined(CPU_ZERO) || defined(VL_CPPCHECK)  // Linux-like pthreads
     // If not under numactl, make a reasonable processor affinity selection
     if (isNumactlRunning()) return "running under numactl";  // User presumably set affinity
     const int num_threads = static_cast<int>(m_workers.size());
@@ -153,24 +157,25 @@ std::string VlThreadPool::numaAssign() {
     std::map<int, int> processor_core;
     std::multimap<int, int> core_processors;
     std::set<int> cores;
-    int processor = -1;
-    int core = -1;
-    while (!is.eof()) {
-        std::string line;
-        std::getline(is, line);
-        static std::string::size_type pos = line.find(":");
-        int number = -1;
-        if (pos != std::string::npos) number = atoi(line.c_str() + pos + 1);
-        if (line.compare(0, std::strlen("processor"), "processor") == 0) {
-            processor = number;
-            core = -1;
-        } else if (line.compare(0, std::strlen("core id"), "core id") == 0) {
-            core = number;
-            // std::cout << "p" << processor << " socket " << socket << " c" << core << std::endl;
-            cores.emplace(core);
-            processor_core[processor] = core;
-            core_processors.emplace(core, processor);
-            unassigned_processors.push_back(processor);
+    {
+        int processor = -1;
+        while (!is.eof()) {
+            std::string line;
+            std::getline(is, line);
+            static std::string::size_type pos = line.find(":");
+            int number = -1;
+            if (pos != std::string::npos) number = atoi(line.c_str() + pos + 1);
+            if (line.compare(0, std::strlen("processor"), "processor") == 0) {
+                processor = number;
+            } else if (line.compare(0, std::strlen("core id"), "core id") == 0) {
+                const int core = number;
+                // std::cout << "p" << processor << " socket " << socket << " c" << core <<
+                // std::endl;
+                cores.emplace(core);
+                processor_core[processor] = core;
+                core_processors.emplace(core, processor);
+                unassigned_processors.push_back(processor);
+            }
         }
     }