Fix true cycle detection in DFG

This commit is contained in:
Geza Lore 2025-08-05 14:47:51 +01:00
parent 25d968b833
commit 86c56e8e14
2 changed files with 2 additions and 2 deletions

View File

@ -54,7 +54,7 @@ class TraceDriver final : public DfgVisitor {
struct Equal final {
bool operator()(const Visited& a, const Visited& b) const {
return a.m_vtxp == b.m_vtxp && a.m_lsb == b.m_lsb && a.m_msb == b.m_lsb;
return a.m_vtxp == b.m_vtxp && a.m_lsb == b.m_lsb && a.m_msb == b.m_msb;
}
};
};

View File

@ -10,7 +10,7 @@ module t(
output wire [9:0] o
);
assign o[1:0] = o[9:8];
assign o[3:2] = {o[0], o[1]};
assign o[3:2] = o[1:0];
assign o[7:4] = 4'(o[3:2]);
assign o[9:8] = o[5:4];
endmodule