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Fix MODDUP with duplicate packages to take first package (#6222).

This commit is contained in:
Wilson Snyder 2025-07-28 01:45:03 -04:00
parent 47c5b220b3
commit e69df457fd
6 changed files with 67 additions and 11 deletions
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1
Changes
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@ -52,6 +52,7 @@ Verilator 5.039 devel
* Fix structure select causing 'Wide Op' error (#6191). [Danny Oler]
* Fix 'driver same component' assertion (#6211) (#6215). [Geza Lore]
* Fix `--stats` overridden by skipping identical build (#6220). [Geza Lore]
* Fix MODDUP with duplicate packages to take first package (#6222).
* Fix replicate with unsigned count but MSB set (#6231) (#6233). [Geza Lore]

12
src/V3LinkCells.cpp
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@ -628,20 +628,16 @@ class LinkCellsVisitor final : public VNVisitor {
if (!(libFoundp->fileline()->warnIsOff(V3ErrorCode::MODDUP)
|| nodep->fileline()->warnIsOff(V3ErrorCode::MODDUP)
|| hierBlocks.find(nodep->name()) != hierBlocks.end())) {
nodep->v3warn(MODDUP, "Duplicate declaration of module: "
nodep->v3warn(MODDUP, "Duplicate declaration of "
<< nodep->verilogKwd() << ": "
<< nodep->prettyNameQ() << '\n'
<< nodep->warnContextPrimary() << '\n'
<< libFoundp->warnOther()
<< "... Location of original declaration\n"
<< libFoundp->warnContextSecondary());
}
if (VN_IS(nodep, Package)) {
// Packages may be imported, we instead rename to be unique
nodep->name(nodep->name() + "__Vdedup" + cvtToStr(m_dedupNum++));
} else {
nodep->unlinkFrBack();
VL_DO_DANGLING(pushDeletep(nodep), nodep);
}
nodep->unlinkFrBack();
VL_DO_DANGLING(pushDeletep(nodep), nodep);
} else if (!libFoundp && globalFoundp && globalFoundp != nodep) {
// ...__LIB__ stripped by prettyName
const string newName = nodep->libname() + "__LIB__" + nodep->origName();

6
test_regress/t/t_package_dup_bad.out
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@ -1,4 +1,4 @@
%Warning-MODDUP: t/t_package_dup_bad.v:11:9: Duplicate declaration of module: 'pkg'
%Warning-MODDUP: t/t_package_dup_bad.v:11:9: Duplicate declaration of package: 'pkg'
11 | package pkg;
| ^~~
t/t_package_dup_bad.v:7:9: ... Location of original declaration
@ -6,13 +6,13 @@
| ^~~
... For warning description see https://verilator.org/warn/MODDUP?v=latest
... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.
%Warning-MODDUP: t/t_package_dup_bad.v:19:9: Duplicate declaration of module: 'pkg'
%Warning-MODDUP: t/t_package_dup_bad.v:19:9: Duplicate declaration of package: 'pkg'
19 | package pkg;
| ^~~
t/t_package_dup_bad.v:7:9: ... Location of original declaration
7 | package pkg;
| ^~~
%Warning-MODDUP: t/t_package_dup_bad.v:22:9: Duplicate declaration of module: 'pkg'
%Warning-MODDUP: t/t_package_dup_bad.v:22:9: Duplicate declaration of package: 'pkg'
22 | package pkg;
| ^~~
t/t_package_dup_bad.v:7:9: ... Location of original declaration

23
test_regress/t/t_package_dup_bad2.out Normal file
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@ -0,0 +1,23 @@
%Warning-MODDUP: t/t_package_dup_bad2.v:19:9: Duplicate declaration of package: 'Pkg'
19 | package Pkg;
| ^~~
t/t_package_dup_bad2.v:7:9: ... Location of original declaration
7 | package Pkg;
| ^~~
... For warning description see https://verilator.org/warn/MODDUP?v=latest
... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.
%Error-MODMISSING: t/t_package_dup_bad2.v:11:3: Cannot find file containing module: 'IOBUF'
11 | IOBUF iocell (
| ^~~~~
... For error description see https://verilator.org/warn/MODMISSING?v=latest
... Looked in:
t/IOBUF
t/IOBUF.v
t/IOBUF.sv
IOBUF
IOBUF.v
IOBUF.sv
obj_vlt/t_package_dup_bad2/IOBUF
obj_vlt/t_package_dup_bad2/IOBUF.v
obj_vlt/t_package_dup_bad2/IOBUF.sv
%Error: Exiting due to

16
test_regress/t/t_package_dup_bad2.py Executable file
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@ -0,0 +1,16 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2025 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('linter')
test.lint(fails=True, expect_filename=test.golden_filename)
test.passes()

20
test_regress/t/t_package_dup_bad2.v Normal file
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@ -0,0 +1,20 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2025 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
package Pkg;
endpackage
module t;
IOBUF iocell (
.O (in),
.IO(pad),
.I ('0),
.T (~oe)
);
endmodule
package Pkg;
endpackage