Version bump

Internals: Cleanup unused nodep in visitors. No functional change intended.
Cleanup misc clang-tidy warnings. No functional change intended
2026-10-02 16:13:34 +02:00 · 2020-04-04 08:40:47 -04:00 · 2020-04-04 08:31:14 -04:00 · 2020-04-03 22:31:54 -04:00 · 2020-04-03 20:08:24 -04:00 · 2020-04-03 20:07:46 -04:00
2955 changed files with 148282 additions and 73158 deletions
@@ -0,0 +1,111 @@
 ---
 Language:        Cpp
 # BasedOnStyle:  LLVM
 AccessModifierOffset: -4
 AlignAfterOpenBracket: Align
 AlignConsecutiveAssignments: false
 AlignConsecutiveDeclarations: false
 AlignEscapedNewlines: DontAlign
 AlignOperands:   true
 AlignTrailingComments: false
 AllowAllParametersOfDeclarationOnNextLine: true
 AllowShortBlocksOnASingleLine: true
 AllowShortCaseLabelsOnASingleLine: true
 AllowShortFunctionsOnASingleLine: All
 AllowShortIfStatementsOnASingleLine: true
 AllowShortLoopsOnASingleLine: false
 AlwaysBreakAfterDefinitionReturnType: None
 AlwaysBreakAfterReturnType: None
 AlwaysBreakBeforeMultilineStrings: false
 AlwaysBreakTemplateDeclarations: false
 BinPackArguments: true
 BinPackParameters: true
 BraceWrapping:   
  AfterClass:      false
  AfterControlStatement: false
  AfterEnum:       false
  AfterFunction:   false
  AfterNamespace:  false
  AfterObjCDeclaration: false
  AfterStruct:     false
  AfterUnion:      false
  AfterExternBlock: false
  BeforeCatch:     false
  BeforeElse:      false
  IndentBraces:    false
  SplitEmptyFunction: true
  SplitEmptyRecord: true
  SplitEmptyNamespace: true
 BreakBeforeBinaryOperators: All
 BreakBeforeBraces: Attach
 BreakBeforeInheritanceComma: false
 BreakBeforeTernaryOperators: true
 BreakConstructorInitializersBeforeComma: false
 BreakConstructorInitializers: BeforeComma
 BreakAfterJavaFieldAnnotations: false
 BreakStringLiterals: true
 ColumnLimit:     99
 CommentPragmas:  '^ IWYU pragma:'
 CompactNamespaces: false
 ConstructorInitializerAllOnOneLineOrOnePerLine: false
 ConstructorInitializerIndentWidth: 4
 ContinuationIndentWidth: 4
 Cpp11BracedListStyle: true
 DerivePointerAlignment: false
 DisableFormat:   false
 ExperimentalAutoDetectBinPacking: false
 FixNamespaceComments: true
 ForEachMacros:   
  - foreach
  - Q_FOREACH
  - BOOST_FOREACH
 IncludeBlocks:   Preserve
 IncludeCategories: 
  - Regex:           '^"(llvm|llvm-c|clang|clang-c)/'
    Priority:        2
  - Regex:           '^(<|"(gtest|gmock|isl|json)/)'
    Priority:        3
  - Regex:           '.*'
    Priority:        1
 IncludeIsMainRegex: '(Test)?$'
 IndentCaseLabels: false
 IndentPPDirectives: None
 IndentWidth:     4
 IndentWrappedFunctionNames: false
 JavaScriptQuotes: Leave
 JavaScriptWrapImports: true
 KeepEmptyLinesAtTheStartOfBlocks: true
 MacroBlockBegin: ''
 MacroBlockEnd:   ''
 MaxEmptyLinesToKeep: 1
 NamespaceIndentation: None
 ObjCBlockIndentWidth: 2
 ObjCSpaceAfterProperty: false
 ObjCSpaceBeforeProtocolList: true
 PenaltyBreakAssignment: 2
 PenaltyBreakBeforeFirstCallParameter: 19
 PenaltyBreakComment: 300
 PenaltyBreakFirstLessLess: 120
 PenaltyBreakString: 1000
 PenaltyExcessCharacter: 1000000
 PenaltyReturnTypeOnItsOwnLine: 60
 PointerAlignment: Left
 ReflowComments:  true
 SortIncludes:    false
 SortUsingDeclarations: true
 SpaceAfterCStyleCast: false
 SpaceAfterTemplateKeyword: true
 SpaceBeforeAssignmentOperators: true
 SpaceBeforeParens: ControlStatements
 SpaceInEmptyParentheses: false
 SpacesBeforeTrailingComments: 2
 SpacesInAngles:  false
 SpacesInContainerLiterals: true
 SpacesInCStyleCastParentheses: false
 SpacesInParentheses: false
 SpacesInSquareBrackets: false
 Standard:        Cpp03
 TabWidth:        8
 UseTab:          Never
 ...
@@ -0,0 +1,9 @@
 Checks:          'clang-diagnostic-*,clang-analyzer-*,*,-modernize*,-hicpp*,-android-cloexec-fopen,-cert-dcl50-cpp,-cert-env33-c,-cert-err34-c,-cert-err58-cpp,-clang-analyzer-core.UndefinedBinaryOperatorResult,-clang-analyzer-security*,-cppcoreguidelines-no-malloc,-cppcoreguidelines-owning-memory,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-constant-array-index,-cppcoreguidelines-pro-bounds-pointer-arithmetic,-cppcoreguidelines-pro-type-const-cast,-cppcoreguidelines-pro-type-reinterpret-cast,-cppcoreguidelines-pro-type-static-cast-downcast,-cppcoreguidelines-pro-type-union-access,-cppcoreguidelines-pro-type-vararg,-cppcoreguidelines-special-member-functions,-fuchsia-default-arguments,-fuchsia-overloaded-operator,-google-default-arguments,-google-readability-todo,-google-runtime-references,-llvm-header-guard,-llvm-include-order,-misc-string-integer-assignment,-misc-string-literal-with-embedded-nul,-readability-braces-around-statements,-readability-container-size-empty,-readability-delete-null-pointer,-readability-else-after-return,-readability-implicit-bool-conversion,-readability-named-parameter,-readability-static-accessed-through-instance'
 WarningsAsErrors: ''
 HeaderFilterRegex: ''
 FormatStyle:     none
 CheckOptions:
  - key:             google-readability-braces-around-statements.ShortStatementLines
    value:           '2'
  - key:             google-readability-namespace-comments.SpacesBeforeComments
    value:           '2'
@@ -0,0 +1,5 @@
 ---
 exclude_paths:
  - '.github/**'
  - 'ci/build_verilator.sh'
  - 'include/vltstd/**'
@@ -0,0 +1,4 @@
 *.v linguist-language=SystemVerilog
 *.vh linguist-language=SystemVerilog
 *.sv linguist-language=SystemVerilog
 nodist linguist-detectable=false
@@ -0,0 +1,14 @@
 ---
 name: Bug report
 about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
 title: ''
 labels: new
 assignees: ''
 ---
 Thanks for taking the time to report this.
 Can you attach an example that shows the issue?  (Must be openly licensed, ideally in test_regress format.)
 May we assist you in trying to fix this yourself?
@@ -0,0 +1,16 @@
 ---
 name: Feature Request
 about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
 title: ''
 labels: new
 assignees: ''
 ---
 Thanks for taking the time to report this.
 What would you like added/supported?
 Can you attach an example that runs on other simulators?  (Must be openly licensed, ideally in test_regress format.)
 May we assist you in trying to fix this yourself?
@@ -0,0 +1,10 @@
 ---
 name: Q and A, or Other
 about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
 title: ''
 labels: new
 assignees: ''
 ---
 How may we help - what is your question?
@@ -0,0 +1 @@
 We appreciate your contributing to Verilator.  If this is your first commit, please add your name to docs/CONTRIBUTORS, and read our contributing guidelines in docs/CONTRIBUTING.adoc.
@@ -0,0 +1,199 @@
 ["area: assertions"]
 color = "ffffe8"
 name = "area: assertions"
 description = "Issue involves assertions"
 ["area: configure/compiling"]
 color = "ffffe8"
 name = "area: configure/compiling"
 description = "Issue involves configuring or compilating Verilator itself"
 ["area: coverage"]
 color = "ffffe8"
 name = "area: coverage"
 description = "Issue involves coverage generation"
 ["area: data-types"]
 color = "ffffe8"
 name = "area: data-types"
 description = "Issue involves data-types"
 ["area: documentation"]
 color = "ffffe8"
 name = "area: documentation"
 description = "Issue involves documentation"
 ["area: elaboration"]
 color = "ffffe8"
 name = "area: elaboration"
 description = "Issue involves elaboration phase"
 ["area: invoking/options"]
 color = "ffffe8"
 name = "area: invoking/options"
 description = "Issue involves options passed to Verilator"
 ["area: lint"]
 color = "ffffe8"
 name = "area: lint"
 description = "Issue involves SystemVerilog lint checking"
 ["area: parser"]
 color = "ffffe8"
 name = "area: parser"
 description = "Issue involves SystemVerilog parsing"
 ["area: performance"]
 color = "ffffe8"
 name = "area: performance"
 description = "Issue involves performance issues"
 ["area: portability"]
 color = "ffffe8"
 name = "area: portability"
 description = "Issue involves operating system/compiler portability"
 ["area: runtime result"]
 color = "ffffe8"
 name = "area: runtime result"
 description = "Issue involves an incorrect runtine result from Verilated model"
 ["area: scheduling"]
 color = "ffffe8"
 name = "area: scheduling"
 description = "Issue involves scheduling/ordering of events"
 ["area: tests"]
 color = "ffffe8"
 name = "area: tests"
 description = "Issue involves the testing system"
 ["area: usability"]
 color = "ffffe8"
 name = "area: usability"
 description = "Issue involves general usability"
 ["effort: days"]
 color = "d0c0b0"
 name = "effort: days"
 description = "Expect this issue to require roughly days of invested effort to resolve"
 ["effort: hours"]
 color = "f5e6d6"
 name = "effort: hours"
 description = "Expect this issue to require roughly hours of invested effort to resolve"
 ["effort: minutes"]
 color = "f5e6d6"
 name = "effort: minutes"
 description = "Expect this issue to require less than an hour of invested effort to resolve"
 ["effort: weeks"]
 color = "d0c0b0"
 name = "effort: weeks"
 description = "Expect this issue to require weeks or more of invested effort to resolve"
 ["good first issue"]
 color = "7057ff"
 name = "good first issue"
 description = "Good for newcomers"
 ["help wanted"]
 color = "008672"
 name = "help wanted"
 description = "Extra attention is needed"
 ["new"]
 color = "ff4400"
 name = "new"
 description = "New issue, not yet seen by maintainers"
 ["resolution: abandoned"]
 color = "cfd3d7"
 name = "resolution: abandoned"
 description = "Closed; not enough information or otherwise never finished"
 ["resolution: answered"]
 color = "cfd3d7"
 name = "resolution: answered"
 description = "Closed; only applies to questions which were answered"
 ["resolution: duplicate"]
 color = "cfd3d7"
 name = "resolution: duplicate"
 description = "Closed; issue or pull request already exists"
 ["resolution: external"]
 color = "cfd3d7"
 name = "resolution: external"
 description = "Closed; passed to another tool's bug tracker"
 ["resolution: fixed"]
 color = "cfd3d7"
 name = "resolution: fixed"
 description = "Closed; fixed"
 ["resolution: invalid"]
 color = "cfd3d7"
 name = "resolution: invalid"
 description = "Closed; issue or pull request is no longer relevant"
 ["resolution: no fix needed"]
 color = "cfd3d7"
 name = "resolution: no fix needed"
 description = "Closed; no fix required (not a bug)"
 ["resolution: wontfix"]
 color = "cfd3d7"
 name = "resolution: wontfix"
 description = "Closed; work won't continue on an issue or pull request"
 ["status: asked reporter"]
 color = "ffffff"
 name = "status: asked reporter"
 description = "Bug is waiting for reporter to answer a question"
 ["status: assigned"]
 color = "a0f0ff"
 name = "status: assigned"
 description = "Issue is assigned to someone to work on"
 ["status: blocked"]
 color = "00007f"
 name = "status: blocked"
 description = "Issue is waiting for another bug, when other bug is fixed, then goes to 'status: assigned'"
 ["status: discussion"]
 color = "d876e3"
 name = "status: discussion"
 description = "Issue is waiting for discussions to resolve"
 ["status: ready"]
 color = "b6c92a"
 name = "status: ready"
 description = "Issue is ready for someone to fix; then goes to 'status: assigned'"
 ["type: bug"]
 color = "d73a4a"
 name = "type: bug"
 description = "Defect"
 ["type: feature-IEEE"]
 color = "cfccff"
 name = "type: feature-IEEE"
 description = "Request to add new feature, described in IEEE 1800"
 ["type: feature-non-IEEE"]
 color = "cfccff"
 name = "type: feature-non-IEEE"
 description = "Request to add new feature, outside IEEE 1800"
 ["type: maintenance"]
 color = "cfccff"
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 ["type: q and a"]
 color = "84ba34"
 name = "type: q and a"
 description = "Question and answer about some feature or user question"
@@ -1,6 +1,7 @@
 \#*
 .#*
 *~
 *.tidy
 *.old
 *.gz
 *.gz.uu
@@ -16,6 +17,7 @@
 README
 TAGS
 autom4te.cache
 compile_commands.json
 config.cache
 config.status
 configure
@@ -23,9 +25,12 @@ dddrun*
 doxygen-doc
 gdbrun*
 gmon.out
 ncverilog.history
 internals.txt
 verilator.txt
 verilator_bin*
 verilator_coverage_bin*
 verilator.pc
 verilator-config.cmake
 verilator-config-version.cmake
 **/obj_dir/*
@@ -0,0 +1,187 @@
 # DESCRIPTION: Travis-CI config
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 version: ~> 1.0
 os: linux
 language: cpp
 cache: ccache
 env:
  global:
    - VERILATOR_CACHE=$HOME/verilator_cache
    - VERILATOR_ROOT=$PWD
    - VERILATOR_NUM_JOBS=$(echo `nproc` + 1 | bc)
    - VERILATOR_CONFIG_FLAGS="--enable-maintainer-mode --enable-longtests"
    - VERILATOR_AUTHOR_SITE=1
    - OBJCACHE=ccache
 cache:
  directories:
    - $VERILATOR_CACHE
 before_install:
 # Perl modules needed for testing
 # Not listing Bit::Vector as slow to install, and only skips one test
  - yes yes | sudo cpan -fi Unix::Processors Parallel::Forker
  - sudo apt-get install gdb gtkwave
  - sudo apt-get install libgoogle-perftools-dev
 before_script:
  - bash -x ci/build_vcddiff.sh
  - bash -x ci/build_verilator.sh
 after_script:
  - ccache -s
 stages:
  - "Build Verilator"
  - test
 jobs:
  include:
    - if: type != cron
      stage: "Build Verilator"
      name: Build Verilator
      compiler: gcc
      script: echo "Done building Verilator"
 # Non-cron build will just run on whatever linux flavor we get
    - if: type != cron
      stage: test
      name: Dist test
      compiler: gcc
      script: ci/test.sh dist
    - if: type != cron
      stage: test
      name: Vlt test
      compiler: gcc
      script: ci/test.sh vlt
    - if: type != cron
      stage: test
      name: Vltmt set 0 test
      compiler: gcc
      script: ci/test.sh vltmt0
    - if: type != cron
      stage: test
      name: Vltmt set 1 test
      compiler: gcc
      script: ci/test.sh vltmt1
 # Cron builds try different OS/compiler combinations
    - if: type = cron
      stage: "Build Verilator"
      name: Build xenial gcc Verilator
      os: linux
      dist: xenial
      compiler: gcc
      script: echo "Done building Verilator"
    - if: type = cron
      stage: test
      name: Xenial gcc dist test
      os: linux
      dist: xenial
      compiler: gcc
      script: ci/test.sh dist
    - if: type = cron
      stage: test
      name: Xenial gcc vlt test
      os: linux
      dist: xenial
      compiler: gcc
      script: ci/test.sh vlt
    - if: type = cron
      stage: test
      name: Xenial gcc vltmt test
      os: linux
      dist: xenial
      compiler: gcc
      script: ci/test.sh vltmt
    - if: type = cron
      stage: "Build Verilator"
      name: Build xenial clang Verilator
      os: linux
      dist: xenial
      compiler: clang
      script: echo "Done building Verilator"
    - if: type = cron
      stage: test
      name: Xenial clang dist test
      os: linux
      dist: xenial
      compiler: clang
      script: ci/test.sh dist
    - if: type = cron
      stage: test
      name: Xenial clang vlt test
      os: linux
      dist: xenial
      compiler: clang
      script: ci/test.sh vlt
    - if: type = cron
      stage: test
      name: Xenial clang vltmt test
      os: linux
      dist: xenial
      compiler: clang
      script: ci/test.sh vltmt
 #    - if: type = cron
 #      stage: "Build Verilator"
 #      name: Build OSX gcc Verilator
 #      os: osx
 #      compiler: gcc
 #      script: echo "Done building Verilator"
 #    - if: type = cron
 #      stage: test
 #      name: OSX gcc dist test
 #      os: osx
 #      compiler: gcc
 #      script: ci/test.sh dist
 #    - if: type = cron
 #      stage: test
 #      name: OSX gcc vlt test
 #      os: osx
 #      compiler: gcc
 #      script: ci/test.sh vlt
 #    - if: type = cron
 #      stage: test
 #      name: OSX gcc vltmt test
 #      os: osx
 #      compiler: gcc
 #      script: ci/test.sh vltmt
    - if: type = cron
      stage: "Build Verilator"
      name: Build trusty gcc Verilator
      os: linux
      dist: trusty
      compiler: gcc
      script: echo "Done building Verilator"
    - if: type = cron
      stage: test
      name: Trusty gcc dist test
      os: linux
      dist: trusty
      compiler: gcc
      script: ci/test.sh dist
    - if: type = cron
      stage: test
      name: Trusty gcc vlt test
      os: linux
      dist: trusty
      compiler: gcc
      script: ci/test.sh vlt
    - if: type = cron
      stage: test
      os: linux
      dist: trusty
      name: Trusty gcc vltmt test
      compiler: gcc
      script: ci/test.sh vltmt
 notifications:
  email:
    if: repo = verilator/verilator
    recipients:
      - [email protected]
      - [email protected]
@@ -1,674 +0,0 @@
                    GNU GENERAL PUBLIC LICENSE
                       Version 3, 29 June 2007
 Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
 Everyone is permitted to copy and distribute verbatim copies
 of this license document, but changing it is not allowed.
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  The GNU General Public License is a free, copyleft license for
 software and other kinds of works.
  The licenses for most software and other practical works are designed
 to take away your freedom to share and change the works.  By contrast,
 the GNU General Public License is intended to guarantee your freedom to
 share and change all versions of a program--to make sure it remains free
 software for all its users.  We, the Free Software Foundation, use the
 GNU General Public License for most of our software; it applies also to
 any other work released this way by its authors.  You can apply it to
 your programs, too.
  When we speak of free software, we are referring to freedom, not
 price.  Our General Public Licenses are designed to make sure that you
 have the freedom to distribute copies of free software (and charge for
 them if you wish), that you receive source code or can get it if you
 want it, that you can change the software or use pieces of it in new
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  To protect your rights, we need to prevent others from denying you
 these rights or asking you to surrender the rights.  Therefore, you have
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  For example, if you distribute copies of such a program, whether
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  Developers that use the GNU GPL protect your rights with two steps:
 (1) assert copyright on the software, and (2) offer you this License
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  For the developers' and authors' protection, the GPL clearly explains
 that there is no warranty for this free software.  For both users' and
 authors' sake, the GPL requires that modified versions be marked as
 changed, so that their problems will not be attributed erroneously to
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  Some devices are designed to deny users access to install or run
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 have designed this version of the GPL to prohibit the practice for those
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  The precise terms and conditions for copying, distribution and
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 and you may offer support or warranty protection for a fee.
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  A compilation of a covered work with other separate and independent
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  You may convey a covered work in object code form under the terms
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 User Product is transferred to the recipient in perpetuity or for a
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 Corresponding Source conveyed under this section must be accompanied
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 if neither you nor any third party retains the ability to install
 modified object code on the User Product (for example, the work has
 been installed in ROM).
  The requirement to provide Installation Information does not include a
 requirement to continue to provide support service, warranty, or updates
 for a work that has been modified or installed by the recipient, or for
 the User Product in which it has been modified or installed.  Access to a
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 protocols for communication across the network.
  Corresponding Source conveyed, and Installation Information provided,
 in accord with this section must be in a format that is publicly
 documented (and with an implementation available to the public in
 source code form), and must require no special password or key for
 unpacking, reading or copying.
  7. Additional Terms.
  "Additional permissions" are terms that supplement the terms of this
 License by making exceptions from one or more of its conditions.
 Additional permissions that are applicable to the entire Program shall
 be treated as though they were included in this License, to the extent
 that they are valid under applicable law.  If additional permissions
 apply only to part of the Program, that part may be used separately
 under those permissions, but the entire Program remains governed by
 this License without regard to the additional permissions.
  When you convey a copy of a covered work, you may at your option
 remove any additional permissions from that copy, or from any part of
 it.  (Additional permissions may be written to require their own
 removal in certain cases when you modify the work.)  You may place
 additional permissions on material, added by you to a covered work,
 for which you have or can give appropriate copyright permission.
  Notwithstanding any other provision of this License, for material you
 add to a covered work, you may (if authorized by the copyright holders of
 that material) supplement the terms of this License with terms:
    a) Disclaiming warranty or limiting liability differently from the
    terms of sections 15 and 16 of this License; or
    b) Requiring preservation of specified reasonable legal notices or
    author attributions in that material or in the Appropriate Legal
    Notices displayed by works containing it; or
    c) Prohibiting misrepresentation of the origin of that material, or
    requiring that modified versions of such material be marked in
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    it) with contractual assumptions of liability to the recipient, for
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    those licensors and authors.
  All other non-permissive additional terms are considered "further
 restrictions" within the meaning of section 10.  If the Program as you
 received it, or any part of it, contains a notice stating that it is
 governed by this License along with a term that is a further
 restriction, you may remove that term.  If a license document contains
 a further restriction but permits relicensing or conveying under this
 License, you may add to a covered work material governed by the terms
 of that license document, provided that the further restriction does
 not survive such relicensing or conveying.
  If you add terms to a covered work in accord with this section, you
 must place, in the relevant source files, a statement of the
 additional terms that apply to those files, or a notice indicating
 where to find the applicable terms.
  Additional terms, permissive or non-permissive, may be stated in the
 form of a separately written license, or stated as exceptions;
 the above requirements apply either way.
  8. Termination.
  You may not propagate or modify a covered work except as expressly
 provided under this License.  Any attempt otherwise to propagate or
 modify it is void, and will automatically terminate your rights under
 this License (including any patent licenses granted under the third
 paragraph of section 11).
  However, if you cease all violation of this License, then your
 license from a particular copyright holder is reinstated (a)
 provisionally, unless and until the copyright holder explicitly and
 finally terminates your license, and (b) permanently, if the copyright
 holder fails to notify you of the violation by some reasonable means
 prior to 60 days after the cessation.
  Moreover, your license from a particular copyright holder is
 reinstated permanently if the copyright holder notifies you of the
 violation by some reasonable means, this is the first time you have
 received notice of violation of this License (for any work) from that
 copyright holder, and you cure the violation prior to 30 days after
 your receipt of the notice.
  Termination of your rights under this section does not terminate the
 licenses of parties who have received copies or rights from you under
 this License.  If your rights have been terminated and not permanently
 reinstated, you do not qualify to receive new licenses for the same
 material under section 10.
  9. Acceptance Not Required for Having Copies.
  You are not required to accept this License in order to receive or
 run a copy of the Program.  Ancillary propagation of a covered work
 occurring solely as a consequence of using peer-to-peer transmission
 to receive a copy likewise does not require acceptance.  However,
 nothing other than this License grants you permission to propagate or
 modify any covered work.  These actions infringe copyright if you do
 not accept this License.  Therefore, by modifying or propagating a
 covered work, you indicate your acceptance of this License to do so.
  10. Automatic Licensing of Downstream Recipients.
  Each time you convey a covered work, the recipient automatically
 receives a license from the original licensors, to run, modify and
 propagate that work, subject to this License.  You are not responsible
 for enforcing compliance by third parties with this License.
  An "entity transaction" is a transaction transferring control of an
 organization, or substantially all assets of one, or subdividing an
 organization, or merging organizations.  If propagation of a covered
 work results from an entity transaction, each party to that
 transaction who receives a copy of the work also receives whatever
 licenses to the work the party's predecessor in interest had or could
 give under the previous paragraph, plus a right to possession of the
 Corresponding Source of the work from the predecessor in interest, if
 the predecessor has it or can get it with reasonable efforts.
  You may not impose any further restrictions on the exercise of the
 rights granted or affirmed under this License.  For example, you may
 not impose a license fee, royalty, or other charge for exercise of
 rights granted under this License, and you may not initiate litigation
 (including a cross-claim or counterclaim in a lawsuit) alleging that
 any patent claim is infringed by making, using, selling, offering for
 sale, or importing the Program or any portion of it.
  11. Patents.
  A "contributor" is a copyright holder who authorizes use under this
 License of the Program or a work on which the Program is based.  The
 work thus licensed is called the contributor's "contributor version".
  A contributor's "essential patent claims" are all patent claims
 owned or controlled by the contributor, whether already acquired or
 hereafter acquired, that would be infringed by some manner, permitted
 by this License, of making, using, or selling its contributor version,
 but do not include claims that would be infringed only as a
 consequence of further modification of the contributor version.  For
 purposes of this definition, "control" includes the right to grant
 patent sublicenses in a manner consistent with the requirements of
 this License.
  Each contributor grants you a non-exclusive, worldwide, royalty-free
 patent license under the contributor's essential patent claims, to
 make, use, sell, offer for sale, import and otherwise run, modify and
 propagate the contents of its contributor version.
  In the following three paragraphs, a "patent license" is any express
 agreement or commitment, however denominated, not to enforce a patent
 (such as an express permission to practice a patent or covenant not to
 sue for patent infringement).  To "grant" such a patent license to a
 party means to make such an agreement or commitment not to enforce a
 patent against the party.
  If you convey a covered work, knowingly relying on a patent license,
 and the Corresponding Source of the work is not available for anyone
 to copy, free of charge and under the terms of this License, through a
 publicly available network server or other readily accessible means,
 then you must either (1) cause the Corresponding Source to be so
 available, or (2) arrange to deprive yourself of the benefit of the
 patent license for this particular work, or (3) arrange, in a manner
 consistent with the requirements of this License, to extend the patent
 license to downstream recipients.  "Knowingly relying" means you have
 actual knowledge that, but for the patent license, your conveying the
 covered work in a country, or your recipient's use of the covered work
 in a country, would infringe one or more identifiable patents in that
 country that you have reason to believe are valid.
  If, pursuant to or in connection with a single transaction or
 arrangement, you convey, or propagate by procuring conveyance of, a
 covered work, and grant a patent license to some of the parties
 receiving the covered work authorizing them to use, propagate, modify
 or convey a specific copy of the covered work, then the patent license
 you grant is automatically extended to all recipients of the covered
 work and works based on it.
  A patent license is "discriminatory" if it does not include within
 the scope of its coverage, prohibits the exercise of, or is
 conditioned on the non-exercise of one or more of the rights that are
 specifically granted under this License.  You may not convey a covered
 work if you are a party to an arrangement with a third party that is
 in the business of distributing software, under which you make payment
 to the third party based on the extent of your activity of conveying
 the work, and under which the third party grants, to any of the
 parties who would receive the covered work from you, a discriminatory
 patent license (a) in connection with copies of the covered work
 conveyed by you (or copies made from those copies), or (b) primarily
 for and in connection with specific products or compilations that
 contain the covered work, unless you entered into that arrangement,
 or that patent license was granted, prior to 28 March 2007.
  Nothing in this License shall be construed as excluding or limiting
 any implied license or other defenses to infringement that may
 otherwise be available to you under applicable patent law.
  12. No Surrender of Others' Freedom.
  If conditions are imposed on you (whether by court order, agreement or
 otherwise) that contradict the conditions of this License, they do not
 excuse you from the conditions of this License.  If you cannot convey a
 covered work so as to satisfy simultaneously your obligations under this
 License and any other pertinent obligations, then as a consequence you may
 not convey it at all.  For example, if you agree to terms that obligate you
 to collect a royalty for further conveying from those to whom you convey
 the Program, the only way you could satisfy both those terms and this
 License would be to refrain entirely from conveying the Program.
  13. Use with the GNU Affero General Public License.
  Notwithstanding any other provision of this License, you have
 permission to link or combine any covered work with a work licensed
 under version 3 of the GNU Affero General Public License into a single
 combined work, and to convey the resulting work.  The terms of this
 License will continue to apply to the part which is the covered work,
 but the special requirements of the GNU Affero General Public License,
 section 13, concerning interaction through a network will apply to the
 combination as such.
  14. Revised Versions of this License.
  The Free Software Foundation may publish revised and/or new versions of
 the GNU General Public License from time to time.  Such new versions will
 be similar in spirit to the present version, but may differ in detail to
 address new problems or concerns.
  Each version is given a distinguishing version number.  If the
 Program specifies that a certain numbered version of the GNU General
 Public License "or any later version" applies to it, you have the
 option of following the terms and conditions either of that numbered
 version or of any later version published by the Free Software
 Foundation.  If the Program does not specify a version number of the
 GNU General Public License, you may choose any version ever published
 by the Free Software Foundation.
  If the Program specifies that a proxy can decide which future
 versions of the GNU General Public License can be used, that proxy's
 public statement of acceptance of a version permanently authorizes you
 to choose that version for the Program.
  Later license versions may give you additional or different
 permissions.  However, no additional obligations are imposed on any
 author or copyright holder as a result of your choosing to follow a
 later version.
  15. Disclaimer of Warranty.
  THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
 APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
 HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
 OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
 THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
 IS WITH YOU.  SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
 ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
  16. Limitation of Liability.
  IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
 WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
 THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
 GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
 USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
 DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
 PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
 EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
 SUCH DAMAGES.
  17. Interpretation of Sections 15 and 16.
  If the disclaimer of warranty and limitation of liability provided
 above cannot be given local legal effect according to their terms,
 reviewing courts shall apply local law that most closely approximates
 an absolute waiver of all civil liability in connection with the
 Program, unless a warranty or assumption of liability accompanies a
 copy of the Program in return for a fee.
                     END OF TERMS AND CONDITIONS
            How to Apply These Terms to Your New Programs
  If you develop a new program, and you want it to be of the greatest
 possible use to the public, the best way to achieve this is to make it
 free software which everyone can redistribute and change under these terms.
  To do so, attach the following notices to the program.  It is safest
 to attach them to the start of each source file to most effectively
 state the exclusion of warranty; and each file should have at least
 the "copyright" line and a pointer to where the full notice is found.
    <one line to give the program's name and a brief idea of what it does.>
    Copyright (C) <year>  <name of author>
    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
 Also add information on how to contact you by electronic and paper mail.
  If the program does terminal interaction, make it output a short
 notice like this when it starts in an interactive mode:
    <program>  Copyright (C) <year>  <name of author>
    This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
    This is free software, and you are welcome to redistribute it
    under certain conditions; type `show c' for details.
 The hypothetical commands `show w' and `show c' should show the appropriate
 parts of the General Public License.  Of course, your program's commands
 might be different; for a GUI interface, you would use an "about box".
  You should also get your employer (if you work as a programmer) or school,
 if any, to sign a "copyright disclaimer" for the program, if necessary.
 For more information on this, and how to apply and follow the GNU GPL, see
 <http://www.gnu.org/licenses/>.
  The GNU General Public License does not permit incorporating your program
 into proprietary programs.  If your program is a subroutine library, you
 may consider it more useful to permit linking proprietary applications with
 the library.  If this is what you want to do, use the GNU Lesser General
 Public License instead of this License.  But first, please read
 <http://www.gnu.org/philosophy/why-not-lgpl.html>.
@@ -1,7 +1,7 @@
-		   GNU LESSER GENERAL PUBLIC LICENSE
+                   GNU LESSER GENERAL PUBLIC LICENSE
                       Version 3, 29 June 2007
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
 Everyone is permitted to copy and distribute verbatim copies
 of this license document, but changing it is not allowed.
@@ -1,6 +1,8 @@
-^CVS/
+\.clang-format
-/CVS/
+\.clang-tidy
 \.git/
 \.git$
 \.github/
 \.svn/
 \.(bak|old)/
 \.(bak|old)$
@@ -9,38 +11,58 @@
 .*\.log
 \..*\.swp
 .*\.tmp
 .*\.tidy
 .*\.tex
 .*\.key
 .*\.vcd
 .*\.1
-/obj_dir/
+\.codacy\.yml
 \.travis\.yml
 /build/
 /obj_dbg/
 /obj_dir/
 /obj_dist/
 /obj_iv/
 /obj_nc/
 /obj_opt/
-/INCA_libs/
+/obj_vcs/
 /obj_vlt/
 /obj_vltmt/
 INCA_libs/
 /cov_work/
 /logs/
 ^Makefile$
 README.html
 bin/verilator_bin.*
 bin/verilator_coverage_bin.*
 docs/.*\.html$
 docs/Makefile$
 docs/clang-format.txt$
 docs/doxygen-doc/.*
 examples/xml_py/copied/
 examples/xml_py/graph.*
 src/Makefile$
 src/Makefile_obj$
 include/verilated.mk$
 test_regress/.gdbinit$
 config.cache$
 config.status$
-verilator.log
+verilator\.log
-verilator.tex
+verilator\.tex
 verilator-config.cmake$
 verilator-config-version.cmake$
 verilator.pc$
 verilator_bin.*
 verilator_coverage_bin.*
 .vcsmx_rebuild$
 ncverilog.history
 autom4te\.cache/
 nodist/
 ci/
 /simv$
 /simv.daidir/
 /vc_hdrs.h$
 /csrc/
-doxygen-doc/.*
+obj_dir.*
 obj_dir/.*
 TAGS
 .*~
@@ -3,19 +3,15 @@
 #
 # This file is part of Verilator.
 #
-# Code available from: http://www.veripool.org/verilator
+# Code available from: https://verilator.org
 #
 #*****************************************************************************
 #
-# Copyright 2003-2018 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-# redistribute it and/or modify it under the terms of either the GNU
+# can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
-#
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 # Verilator is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 #
 #****************************************************************************/
 #
@@ -56,6 +52,7 @@ INSTALL_DATA = @INSTALL_DATA@
 MAKEINFO = makeinfo
 POD2TEXT = pod2text
 POD2LATEXFIX = $(srcdir)/src/pod2latexfix
 MKINSTALLDIRS = $(SHELL) $(srcdir)/src/mkinstalldirs
 PERL = @PERL@
 # Destination prefix for RPMs
@@ -82,7 +79,7 @@ infodir = @infodir@
 pkgdatadir = @pkgdatadir@
 # Directory in which to install pkgconfig file
-# Generall ${prefix}/share/pkgconfig
+# Generally ${prefix}/share/pkgconfig
 pkgconfigdir = @pkgconfigdir@
 # Directory in which to install data across multiple architectures
@@ -102,42 +99,74 @@ PACKAGE_VERSION = @PACKAGE_VERSION@
 SHELL = /bin/sh
-SUBDIRS = src test_regress \
+SUBDIRS = docs src test_regress \
-	examples/hello_world_c  examples/hello_world_sc \
+	examples/cmake_hello_c \
-	examples/tracing_c  examples/tracing_sc \
+	examples/cmake_hello_sc \
 	examples/cmake_tracing_c \
 	examples/cmake_tracing_sc \
 	examples/cmake_protect_lib \
 	examples/make_hello_c \
 	examples/make_hello_sc \
 	examples/make_tracing_c \
 	examples/make_tracing_sc \
 	examples/make_protect_lib \
 	examples/xml_py \
-INFOS = README README.html README.pdf internals.txt internals.html \
+INFOS = verilator.txt verilator.html verilator.pdf
-        internals.pdf verilator.txt verilator.html verilator.pdf \
+
-	$(VL_INST_MAN_FILES)
+INFOS_OLD = README README.html README.pdf
 # Files that can be generated, but should be up to date for a distribution.
 DISTDEP = info Makefile
-DISTFILES_INC = $(INFOS) .gitignore Artistic COPYING COPYING.LESSER \
+DISTFILES_INC = $(INFOS) .gitignore \
 	*.in *.ac \
-	Changes TODO \
+	Artistic \
 	Changes \
 	LICENSE \
 	MANIFEST.SKIP \
 	README.adoc \
 	verilator-config.cmake.in \
 	verilator-config-version.cmake.in \
 	bin/verilator \
 	bin/verilator_coverage \
 	bin/verilator_difftree \
 	bin/verilator_gantt \
 	bin/verilator_includer \
 	bin/verilator_profcfunc \
-	doxygen-mainpage doxygen.config veripool-logo.png \
+	docs/.gitignore \
-	install-sh configure mkinstalldirs *.pod \
+	docs/CONTRIBUTING.adoc \
 	docs/CONTRIBUTORS \
 	docs/Makefile.in \
 	docs/TODO \
 	docs/doxygen-mainpage \
 	docs/doxygen.config \
 	docs/install.adoc \
 	docs/internals.adoc \
 	docs/verilator_logo.png \
 	docs/xml.adoc \
 	install-sh configure *.pod \
 	include/*.[chv]* \
 	include/*.in \
 	include/.*ignore \
 	include/gtkwave/*.[chv]* \
 	include/vltstd/*.[chv]* \
 	.*attributes */.*attributes  */*/.*attributes \
 	src/.*ignore src/*.in src/*.cpp src/*.[chly] \
 	src/astgen src/bisonpre src/*fix src/cppcheck_filtered \
-	src/vlcovgen \
+	src/vlcovgen src/mkinstalldirs \
 	src/.gdbinit \
 	src/*.pl src/*.pod \
 	examples/*/.*ignore examples/*/Makefile* \
-	examples/*/*.[chv]* examples/*/*.pl \
+	examples/*/*.[chv]* examples/*/vl_* \
 	examples/*/CMakeLists.txt \
 	test_*/.*ignore test_*/Makefile* test_*/*.cpp \
 	test_*/*.pl test_*/*.v test_*/*.vc test_*/*.vh \
 	test_regress/*.pl \
 	test_regress/Makefile \
 	test_regress/Makefile_obj \
 	test_regress/input.vc \
 	test_regress/CMakeLists.txt \
 	test_regress/t/t*/*.sv* \
 	test_regress/t/t*/*.v* \
 	test_regress/t/t*/*/*.sv* \
@@ -154,10 +183,12 @@ DISTFILES_INC = $(INFOS) .gitignore Artistic COPYING COPYING.LESSER \
 INST_PROJ_FILES = \
 	bin/verilator \
 	bin/verilator_coverage \
 	bin/verilator_gantt \
 	bin/verilator_includer \
 	bin/verilator_profcfunc \
 	include/verilated.mk \
 	include/*.[chv]* \
 	include/gtkwave/*.[chv]* \
 	include/vltstd/*.[chv]* \
 INST_PROJ_BIN_FILES = \
@@ -167,11 +198,14 @@ INST_PROJ_BIN_FILES = \
 DISTFILES := $(DISTFILES_INC)
-ifeq ($(OBJCACHE_JOBS),)
+EXAMPLES_FIRST = \
-ifneq ($(OBJCACHE_HOSTS),)
+	examples/make_hello_c \
-export OBJCACHE_JOBS := -j $(shell objcache --jobs "$(OBJCACHE_HOSTS)")
+	examples/make_hello_sc \
-endif
+
-endif
+EXAMPLES = $(EXAMPLES_FIRST) $(filter-out $(EXAMPLES_FIRST), $(sort $(wildcard examples/*)))
 # See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 VL_INST_MAN_FILES = verilator.1 verilator_coverage.1 verilator_gantt.1 verilator_profcfunc.1
 default: all
 all: all_nomsg msg_test
@@ -183,8 +217,8 @@ all_nomsg: verilator_exe $(VL_INST_MAN_FILES)
 .PHONY:verilator_coverage_bin_dbg
 verilator_exe verilator_bin verilator_bin_dbg verilator_coverage_bin_dbg:
 	@echo ------------------------------------------------------------
-	@echo "making verilator in src" ; \
+	@echo "making verilator in src"
-	  (cd src && $(MAKE) $(OBJCACHE_JOBS) )
+	$(MAKE) -C src $(OBJCACHE_JOBS)
 .PHONY:msg_test
 msg_test: all_nomsg
@@ -195,7 +229,9 @@ msg_test: all_nomsg
 .PHONY: test
 ifeq ($(CFG_WITH_LONGTESTS),yes)	# Local... Else don't burden users
-test: smoke-test examples test_regress
+test: smoke-test test_regress
 # examples is part of test_regress's test_regress/t/t_a2_examples.pl
 # (because that allows it to run in parallel with other test_regress's)
 else
 test: smoke-test examples
 endif
@@ -206,20 +242,22 @@ endif
 	@echo
 smoke-test: all_nomsg
-	test_regress/t/t_a_first_cc.pl
+	test_regress/t/t_a1_first_cc.pl
-	test_regress/t/t_a_first_sc.pl
+	test_regress/t/t_a2_first_sc.pl
 test_regress: all_nomsg
-	@(cd test_regress && $(MAKE))
+	$(MAKE) -C test_regress
 examples: all_nomsg
-	for p in examples/* ; do \
+	for p in $(EXAMPLES) ; do \
 	  $(MAKE) -C $$p VERILATOR_ROOT=`pwd` || exit 10; \
 	done
 .PHONY: docs
 docs: info
 info: $(INFOS)
 # Use --no-split to avoid creating filenames > 14 chars.
 %.1: ${srcdir}/bin/%
 	pod2man $< $@
@@ -230,55 +268,20 @@ verilator.html: ${srcdir}/bin/verilator
 	pod2html $< >$@
 # PDF needs DIST variables; but having configure.ac as dependency isn't detected
-verilator.pdf: ${srcdir}/bin/verilator Makefile
+verilator.pdf: ${srcdir}/bin/verilator Makefile $(POD2LATEXFIX)
-	pod2latex --full --out verilator.tex ${srcdir}/bin/verilator
+	pod2latex --full --out verilator.tex $<
 	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE)" "${DISTDATE}" < verilator.tex > verilator2.tex
 	mv verilator2.tex verilator.tex
 	pdflatex verilator.tex
 	pdflatex verilator.tex
 	-rm -f verilator.toc verilator.aux verilator.idx verilator.out
 README: README.pod
 	-rm -f $@
 	$(POD2TEXT) --loose $< > $@
 README.html: README.pod
 	pod2html $< >$@
 # PDF needs DIST variables; but having configure.ac as dependency isn't detected
 README.pdf: README.pod Makefile
 	pod2latex --full --out README.tex README.pod
 	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE) README File" "${DISTDATE}" < README.tex > README2.tex
 	mv README2.tex README.tex
 	pdflatex README.tex
 	pdflatex README.tex
 	-rm -f README.toc README.aux README.idx README.out
 internals.txt: internals.pod
 	-rm -f $@
 	$(POD2TEXT) --loose $< > $@
 internals.html: internals.pod
 	pod2html $< >$@
 # PDF needs DIST variables; but having configure.ac as dependency isn't detected
 internals.pdf: internals.pod Makefile
 	pod2latex --full --out internals.tex internals.pod
 	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE) Internals Manual" "${DISTDATE}" < internals.tex > internals2.tex
 	mv internals2.tex internals.tex
 	pdflatex internals.tex
 	pdflatex internals.tex
 	-rm -f internals.toc internals.aux internals.idx internals.out
 # See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 VL_INST_BIN_FILES = verilator verilator_bin verilator_bin_dbg verilator_coverage_bin_dbg \
-	verilator_coverage verilator_includer verilator_profcfunc
+	verilator_coverage verilator_gantt verilator_includer verilator_profcfunc
 # Some scripts go into both the search path and pkgdatadir,
 # so they can be found by the user, and under $VERILATOR_ROOT.
 # See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 VL_INST_MAN_FILES = verilator.1 verilator_coverage.1 verilator_profcfunc.1
 VL_INST_INC_BLDDIR_FILES = \
 	include/verilated_config.h \
 	include/verilated.mk \
@@ -286,33 +289,36 @@ VL_INST_INC_BLDDIR_FILES = \
 # Files under srcdir, instead of build time
 VL_INST_INC_SRCDIR_FILES = \
 	include/*.[chv]* \
 	include/gtkwave/*.[chv]* \
 	include/vltstd/*.[chv]* \
 VL_INST_DATA_SRCDIR_FILES = \
 	examples/*/*.[chv]*  examples/*/Makefile* \
 	examples/*/CMakeLists.txt
 installbin:
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(bindir)
+	$(MKINSTALLDIRS) $(DESTDIR)$(bindir)
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator $(DESTDIR)$(bindir)/verilator )
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_coverage $(DESTDIR)$(bindir)/verilator_coverage )
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_gantt $(DESTDIR)$(bindir)/verilator_gantt )
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_profcfunc $(DESTDIR)$(bindir)/verilator_profcfunc )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_bin $(DESTDIR)$(bindir)/verilator_bin )
+	( cd bin ; $(INSTALL_PROGRAM) verilator_bin $(DESTDIR)$(bindir)/verilator_bin )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_bin_dbg $(DESTDIR)$(bindir)/verilator_bin_dbg )
+	( cd bin ; $(INSTALL_PROGRAM) verilator_bin_dbg $(DESTDIR)$(bindir)/verilator_bin_dbg )
-	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_coverage_bin_dbg $(DESTDIR)$(bindir)/verilator_coverage_bin_dbg )
+	( cd bin ; $(INSTALL_PROGRAM) verilator_coverage_bin_dbg $(DESTDIR)$(bindir)/verilator_coverage_bin_dbg )
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/bin
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/bin
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_includer $(DESTDIR)$(pkgdatadir)/bin/verilator_includer )
 # Man files can either be part of the original kit, or built in current directory
-# So important we use $< so VPATH is searched
+# So important we use $^ so VPATH is searched
 installman: $(VL_INST_MAN_FILES)
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(mandir)/man1
+	$(MKINSTALLDIRS) $(DESTDIR)$(mandir)/man1
-	cd $(srcdir) \
+	for p in $^ ; do \
 	; for p in $(VL_INST_MAN_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(mandir)/man1/$$p; \
 	done
 installdata:
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/include/vltstd
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/include/gtkwave
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/include/vltstd
 	for p in $(VL_INST_INC_BLDDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
 	done
@@ -320,16 +326,24 @@ installdata:
 	; for p in $(VL_INST_INC_SRCDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
 	done
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/hello_world_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_hello_c
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/hello_world_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_hello_sc
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/tracing_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_tracing_c
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/tracing_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_tracing_sc
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_protect_lib
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_c
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_sc
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
 	cd $(srcdir) \
 	; for p in $(VL_INST_DATA_SRCDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
 	done
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgconfigdir)
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgconfigdir)
 	$(INSTALL_DATA) verilator.pc $(DESTDIR)$(pkgconfigdir)
 	$(INSTALL_DATA) verilator-config.cmake $(DESTDIR)$(pkgdatadir)
 	$(INSTALL_DATA) verilator-config-version.cmake $(DESTDIR)$(pkgdatadir)
 # We don't trust rm -rf, so rmdir instead as it will fail if user put in other files
 uninstall:
@@ -340,14 +354,24 @@ uninstall:
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_SRCDIR_FILES)
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_DATA_SRCDIR_FILES)
 	-rm $(DESTDIR)$(pkgconfigdir)/verilator.pc
 	-rm $(DESTDIR)$(pkgdatadir)/verilator-config.cmake
 	-rm $(DESTDIR)$(pkgdatadir)/verilator-config-version.cmake
 	-rmdir $(DESTDIR)$(pkgdatadir)/bin
 	-rmdir $(DESTDIR)$(pkgdatadir)/include/gtkwave
 	-rmdir $(DESTDIR)$(pkgdatadir)/include/vltstd
 	-rmdir $(DESTDIR)$(pkgdatadir)/include
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/hello_world_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_hello_c
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/hello_world_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_hello_sc
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/tracing_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_tracing_c
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/tracing_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_tracing_sc
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_protect_lib
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_c
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_sc
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples
 	-rmdir $(DESTDIR)$(pkgdatadir)/cmake
 	-rmdir $(DESTDIR)$(pkgdatadir)
 	-rmdir $(DESTDIR)$(pkgconfigdir)
@@ -359,40 +383,15 @@ install-here: installman ftp
 ifeq ($(VERILATOR_AUTHOR_SITE),1)	# Local... Else don't burden users
 DISTNAMEREV = $(shell sed -e '/DTVERSION/!d' -e 's/.*verilator_\([^"]*\).*/\1/' -e q ${srcdir}/src/config_rev.h)
 DIRPROJECT := $(shell project_dir --project)
 VERILATOR_CAD_DIR = $(CAD_DIR)/verilator/$(DISTNAMEREV)/$(DIRPROJECT_ARCH)
 INST_PROJ_CVS = cp_if_cvs_diff
 install-project: dist
 	@echo "Install-project to $(DIRPROJECT)"
 	strip bin/verilator_bin*
 	strip bin/verilator_coverage_bin*
 	$(MAKE) install-project-quick
 	for p in $(VL_INST_MAN_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DIRPROJECT_PREFIX)/man/man1/$$p; \
 	done
 	$(INST_PROJ_CVS) $(DISTNAME).tgz $(DIRPROJECT)/hw/utils/verilator/verilator.tgz
 	rm $(DISTNAME).tgz
 install-project-quick:
 ifeq ($(CFG_WITH_DEFENV),yes)
 	@echo "%Error: Reconfigure with './configure --disable-defenv' to avoid hardcoded paths."
 	false
 endif
 	@echo "Install-project-quick (no strip) to $(DIRPROJECT)"
 	for p in $(INST_PROJ_FILES) ; do \
 	  $(INST_PROJ_CVS) $$p $(DIRPROJECT)/hw/utils/verilator/$$p; \
 	done
 	for p in $(INST_PROJ_BIN_FILES) ; do \
 	  $(INST_PROJ_CVS) $$p $(DIRPROJECT)/hw/utils/verilator/$$p-$(DIRPROJECT_ARCH); \
 	done
 install-cadtools: dist
 	@echo "Install-project to $(CAD_DIR)"
 	strip bin/verilator_bin*
 	strip bin/verilator_coverage_bin*
 	$(MAKE) install-cadtools-quick
-	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/man/man1
+	$(MKINSTALLDIRS) $(VERILATOR_CAD_DIR)/man/man1
 	for p in $(VL_INST_MAN_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(VERILATOR_CAD_DIR)/man/man1/$$p; \
 	done
@@ -405,8 +404,9 @@ ifeq ($(CFG_WITH_DEFENV),yes)
 	false
 endif
 	@echo "Install-cadtools-quick (no strip) to $(VERILATOR_CAD_DIR)"
-	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/include/vltstd
+	$(MKINSTALLDIRS) $(VERILATOR_CAD_DIR)/include/gtkwave
-	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/bin
+	$(MKINSTALLDIRS) $(VERILATOR_CAD_DIR)/include/vltstd
 	$(MKINSTALLDIRS) $(VERILATOR_CAD_DIR)/bin
 	for p in $(INST_PROJ_FILES) ; do \
 	  $(INST_PROJ_CVS) $$p $(VERILATOR_CAD_DIR)/$$p; \
 	done
@@ -418,11 +418,17 @@ endif
 endif
 # Use --xml flag to see the cppcheck code to use for suppression
 CPPCHECK_CPP = $(wildcard \
 	$(srcdir)/include/*.cpp \
 	$(srcdir)/src/*.cpp )
 CPPCHECK_H = $(wildcard \
 	$(srcdir)/include/*.h \
 	$(srcdir)/src/*.h )
 CPPCHECK = src/cppcheck_filtered
 CPPCHECK_FLAGS = --enable=all --inline-suppr \
-	--suppress=unusedScopedObject --suppress=cstyleCast --suppress=useInitializationList
+	--suppress=unusedScopedObject --suppress=cstyleCast --suppress=useInitializationList \
 	--suppress=nullPointerRedundantCheck
 CPPCHECK_FLAGS += --xml
 CPPCHECK_CPP = $(wildcard $(srcdir)/include/*.cpp $(srcdir)/src/*.cpp)
 CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CPPCHECK_CPP))
 CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/src/obj_dbg -I$(srcdir)/src
@@ -430,6 +436,17 @@ cppcheck: $(CPPCHECK_DEP)
 %.cppcheck: %.cpp
 	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $<
 CLANGTIDY = clang-tidy
 CLANGTIDY_FLAGS = -config=''
 CLANGTIDY_DEP = $(subst .h,.h.tidy,$(CPPCHECK_H)) \
 	$(subst .cpp,.cpp.tidy,$(CPPCHECK_CPP))
 clangtidy: $(CLANGTIDY_DEP)
 %.cpp.tidy: %.cpp
 	$(CLANGTIDY) $(CLANGTIDY_FLAGS) $< -- -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) | 2>&1 tee $@
 %.h.tidy: %.h
 	$(CLANGTIDY) $(CLANGTIDY_FLAGS) $< -- -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) | 2>&1 tee $@
 analyzer-src:
 	-rm -rf src/obj_dbg
 	scan-build $(MAKE) -k verilator_coverage_bin_dbg verilator_bin_dbg
@@ -447,7 +464,7 @@ install-msg:
 	@echo "Installed examples to $(DESTDIR)$(pkgdatadir)/examples"
 	@echo
 	@echo "For documentation see 'man verilator' or 'verilator --help'"
-	@echo "For forums and to report bugs see http://www.veripool.org/verilator"
+	@echo "For forums and to report bugs see https://verilator.org"
 	@echo
 IN_WILD := ${srcdir}/*.in ${srcdir}/*/*.in
@@ -471,13 +488,13 @@ endif
 maintainer-clean::
 	@echo "This command is intended for maintainers to use;"
-	@echo "rebuilding the deleted files requires makeinfo."
+	@echo "rebuilding the deleted files requires autoconf."
-	rm -f *.info* *.1 $(INFOS) configure
+	rm -f configure
 clean mostlyclean distclean maintainer-clean maintainer-copy::
 	for dir in $(SUBDIRS); do \
 	  echo making $@ in $$dir ; \
-	  (cd $$dir && $(MAKE) $@) ; \
+	  $(MAKE) -C $$dir $@ ; \
 	done
 clean mostlyclean distclean maintainer-clean::
@@ -486,10 +503,13 @@ clean mostlyclean distclean maintainer-clean::
 	rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs *.idx
 	rm -f *.ev *.evs *.ov *.ovs *.cv *.cvs *.ma *.mas
 	rm -f *.tex
 	rm -rf examples/*/obj_dir* examples/*/logs
 	rm -rf test_*/obj_dir
-	rm -rf examples/*/obj_dir examples/*/logs
+	rm -rf nodist/fuzzer/dictionary
 	rm -rf nodist/obj_dir
 distclean maintainer-clean::
 	rm -f *.info* *.1 $(INFOS) $(INFOS_OLD) $(VL_INST_MAN_FILES)
 	rm -f Makefile config.status config.cache config.log TAGS
 	rm -f verilator_bin* verilator_coverage_bin*
 	rm -f bin/verilator_bin* bin/verilator_coverage_bin*
@@ -504,7 +524,7 @@ TAGS:	$(TAGFILES)
 .PHONY: doxygen
 doxygen:
-	$(DOXYGEN) doxygen.config
+	$(MAKE) -C docs doxygen
 ######################################################################
 # Test targets
@@ -0,0 +1,151 @@
 // Github doesn't render images unless absolute URL
 :!toc:
 ifdef::env-github[]
 image:https://img.shields.io/badge/License-LGPL%20v3-blue.svg[license LGPLv3,link=https://www.gnu.org/licenses/lgpl-3.0]
 image:https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg[license Artistic-2.0,link=https://opensource.org/licenses/Artistic-2.0]
 image:https://api.codacy.com/project/badge/Grade/48478c986f13400682ffe4a5e0939b3a[Code Quality,link=https://www.codacy.com/gh/verilator/verilator]
 image:https://travis-ci.com/verilator/verilator.svg?branch=master[Build Status (Travis CI),link=https://travis-ci.com/verilator/verilator]
 endif::[]
 ifdef::env-github[]
 :link_verilator_contributing: link:docs/CONTRIBUTING.adoc
 :link_verilator_install: link:docs/install.adoc
 endif::[]
 ifndef::env-github[]
 :link_verilator_contributing: https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.adoc
 :link_verilator_install: https://verilator.org/install
 endif::[]
 :link_verilator_commercial_support: https://verilator.org/verilator_commercial_support
 == Welcome to Verilator
 [cols="a,a",indent=0,frame="none"]
 |===
 ^.^| *Welcome to Verilator, the fastest free Verilog HDL simulator.*
 +++ <br/> +++ &bullet; Accepts synthesizable Verilog or SystemVerilog
 +++ <br/> +++ &bullet; Performs lint code-quality checks
 +++ <br/> +++ &bullet; Compiles into multithreaded {cpp}, or SystemC
 +++ <br/> +++ &bullet; Creates XML to front-end your own tools
 <.^|image:https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200]
 >.^|image:https://www.veripool.org/img/verilator_multithreaded_performance_bg-min.png[,388,178]
 ^.^| *Fast*
 +++ <br/> +++ &bullet; Outperforms many commercial simulators
 +++ <br/> +++ &bullet; Single- and multi-threaded output models
 ^.^| *Widely Used*
 +++ <br/> +++ &bullet; Wide industry and academic deployment
 +++ <br/> +++ &bullet; Out-of-the-box support from Arm, and RISC-V vendor IP
 <.^|image:https://www.veripool.org/img/verilator_usage_400x200-min.png[,400,200]
 >.^|image:https://www.veripool.org/img/verilator_community_400x125-min.png[,400,125]
 ^.^| *Community Driven & Openly Licensed*
 +++ <br/> +++ &bullet; Guided by the https://chipsalliance.org/[CHIPS Alliance] and https://www.linuxfoundation.org/[Linux Foundation]
 +++ <br/> +++ &bullet; Open, and free as in both speech and beer
 +++ <br/> +++ &bullet; More simulation for your verification budget
 ^.^| *Commercial Support Available*
 +++ <br/> +++ &bullet; Commercial support contracts
 +++ <br/> +++ &bullet; Design support contracts
 +++ <br/> +++ &bullet; Enhancement contracts
 <.^|image:https://www.veripool.org/img/verilator_support_400x125-min.png[,400,125]
 |===
 == What Verilator Does
 Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
 "Verilates" the specified synthesizable Verilog or SystemVerilog code by
 reading it, performing lint checks, and optionally inserting assertion
 checks and coverage-analysis points.  It outputs single- or multi-threaded
 .cpp and .h files, the "Verilated" code.
 The user writes a little {cpp}/SystemC wrapper file, which instantiates the
 "Verilated" model of the user's top level module.  These {cpp}/SystemC
 files are then compiled by a {cpp} compiler (gcc/clang/MSVC++).  The
 resulting executable performs the design simulation.  Verilator also
 supports linking its generated libraries, optionally encrypted, into other
 simulators.
 Verilator may not be the best choice if you are expecting a full featured
 replacement for NC-Verilog, VCS or another commercial Verilog simulator, or
 if you are looking for a behavioral Verilog simulator e.g. for a quick
 class project (we recommend http://iverilog.icarus.com[Icarus Verilog] for
 this.)  However, if you are looking for a path to migrate synthesizable
 Verilog to {cpp} or SystemC, and your team is comfortable writing just a
 touch of {cpp} code, Verilator is the tool for you.
 == Performance
 Verilator does not simply convert Verilog HDL to {cpp} or SystemC.  Rather
 than only translate, Verilator compiles your code into a much faster
 optimized and optionally thread-partitioned model, which is in turn wrapped
 inside a {cpp}/SystemC/{cpp}-under-Python module.  The results are a compiled Verilog
 model that executes even on a single-thread over 10x faster than standalone
 SystemC, and on a single thread is about 100 times faster than interpreted
 Verilog simulators such as http://iverilog.icarus.com[Icarus
 Verilog]. Another 2-10x speedup might be gained from multithreading
 (yielding 200-1000x total over interpreted simulators).
 Verilator has typically similar or better performance versus the commercial
 Verilog simulators (Carbon Design Systems Carbonator, Modelsim, Cadence
 Incisive/NC-Verilog, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But,
 Verilator is free, so you can spend on computes rather than licenses. Thus
 Verilator gives you more cycles/dollar than anything else available.
 For more information on how Verilator stacks up to some of the other
 commercial and free Verilog simulators, see the
 https://www.veripool.org/verilog_sim_benchmarks.html[Verilog Simulator
 Benchmarks].  (If you benchmark Verilator, please see the notes in the
 https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)], and also
 if possible post on the forums the results; there may be additional tweaks
 possible.)
 == Installation & Documentation
 For more information:
 * {link_verilator_install}[Verilator installation and package directory
  structure]
 * https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
 or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)]
 * https://verilator.org/forum[Verilator forum]
 * https://verilator.org/issues[Verilator Issues]
 == Support
 Verilator is a community project, guided by the
 https://chipsalliance.org/[CHIPS Alliance] under the
 https://www.linuxfoundation.org/[Linux Foundation].
 We appreciate and welcome your contributions in whatever form; please see
 {link_verilator_contributing}[Contributing to Verilator].  Thanks to our
 https://verilator.org/verilator_doc.html#CONTRIBUTORS[Contributors and
 Sponsors].
 Verilator also supports and encourages commercial support models and
 organizations; please see {link_verilator_commercial_support}[Verilator
 Commercial Support].
 == Related Projects
 * http://gtkwave.sourceforge.net/[GTKwave] - Waveform viewer for Verilator
 traces.
 * http://iverilog.icarus.com[Icarus Verilog] - Icarus is a full featured
 interpreted Verilog simulator. If Verilator does not support your needs,
 perhaps Icarus may.
 == Open License
 Verilator is Copyright 2003-2020 by Wilson Snyder.  (Report bugs to
 https://verilator.org/issues[Verilator Issues].)
 Verilator is free software; you can redistribute it and/or modify it under
 the terms of either the GNU Lesser General Public License Version 3 or the
 Perl Artistic License Version 2.0.  See the documentation for more
 details.
@@ -1,204 +0,0 @@
 # DESCRIPTION: DOCUMENT source run through perl to produce README file
 # Use 'make README' to produce the output file
 =pod
 =head1 NAME
 This is the Verilator package README file.
 =head1 DISTRIBUTION
 http://www.veripool.org/verilator
 This package is Copyright 2003-2018 by Wilson Snyder.  (Report bugs to
 L<http://www.veripool.org/>.)
 Verilator is free software; you can redistribute it and/or modify it under
 the terms of either the GNU Lesser General Public License Version 3 or the
 Perl Artistic License Version 2.0.  (See the documentation for more
 details.)
 This program is distributed in the hope that it will be useful, but WITHOUT
 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 more details.
 =head1 DESCRIPTION
 Verilator converts synthesizable (generally not behavioral) Verilog code
 into C++ or SystemC code.  It is not a complete simulator, just a
 translator.
 Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
 reads the specified Verilog code, lints it, and optionally adds coverage
 code.  For C++ format, it outputs .cpp and .h files.  For SystemC format,
 it outputs .cpp and .h files using the standard SystemC headers.
 The resulting files are then compiled with C++.  The user writes a little
 C++ wrapper file, which instantiates the top level module.  This is
 compiled in C++, and linked with the Verilated files.
 The resulting executable will perform the actual simulation.
 =head1 SUPPORTED SYSTEMS
 Verilator is developed and has primary testing on Ubuntu.  Versions have
 also built on Redhat Linux, Macs OS-X, HPUX and Solaris.  It should run
 with minor porting on any Linix-ish platform.  Verilator also works on
 Windows under Cygwin, and Windows under MinGW (gcc -mno-cygwin).  Verilated
 output (not Verilator itself) compiles under MSVC++ 2008 and newer.
 =head1 INSTALLATION
 For more details see
 L<http://www.veripool.org/projects/verilator/wiki/Installing>.
 If you will be modifying Verilator, you should use the "git" method as it
 will let you track changes.
 =over 4
 =item
 The latest version is available at L<http://www.veripool.org/verilator>.
 Download the latest package from that site, and decompress.
    tar xvzf verilator_version.tgz
 =item
 If you will be using SystemC (vs straight C++ output), download SystemC
 from L<http://www.systemc.org>.  Follow their installation instructions.
 You will need to set SYSTEMC_INCLUDE to point to the include directory with
 systemc.h in it, and SYSTEMC_LIBDIR to points to the directory with
 libsystemc.a in it.  (Older installations may set SYSTEMC and SYSTEMC_ARCH
 instead.)
 =item
 You will need the C<flex> and C<bison> packages installed.
 =item
 C<cd> to the Verilator directory containing this README.
 =item
 You now have to decide how you're going to eventually install the kit.
 Note Verilator builds the current value of VERILATOR_ROOT, SYSTEMC_INCLUDE,
 and SYSTEMC_LIBDIR as defaults into the executable, so try to have them
 correct before configuring.
 =over 4
 =item 1.
 Our personal favorite is to always run Verilator from the kit directory.
 This allows the easiest experimentation and upgrading.  It's also how most
 EDA tools operate; to run you point to the tarball, no install is needed.
    export VERILATOR_ROOT=`pwd`   # if your shell is bash
    setenv VERILATOR_ROOT `pwd`   # if your shell is csh
    ./configure
 =item 2.
 To install globally onto a "cad" disk with multiple versions of every tool,
 and add it to path using Modules/modulecmd:
    unset VERILATOR_ROOT      # if your shell is bash
    unsetenv VERILATOR_ROOT   # if your shell is csh
    # For the tarball, use the version number instead of git describe
    ./configure --prefix /CAD_DISK/verilator/`git describe | sed "s/verilator_//"`
    After installing you'll want a module file like the following:
    set install_root /CAD_DISK/verilator/{version-number-used-above}
    unsetenv VERILATOR_ROOT
    prepend-path PATH $install_root/bin
    prepend-path MANPATH $install_root/man
    prepend-path PKG_CONFIG_PATH $install_root/share/pkgconfig
 =item 3.
 The next option is to install it globally, using the normal system paths:
    unset VERILATOR_ROOT      # if your shell is bash
    unsetenv VERILATOR_ROOT   # if your shell is csh
    ./configure
 =item 4.
 Alternatively you can configure a prefix that install will populate, as
 most GNU tools support:
    unset VERILATOR_ROOT      # if your shell is bash
    unsetenv VERILATOR_ROOT   # if your shell is csh
    ./configure --prefix /opt/verilator-VERSION
 Then after installing you will need to add /opt/verilator-VERSION/bin to
 PATH.
 =back
 =item
 Type C<make> to compile Verilator.
 Type C<make test> to check the compilation.
 Configure with C<--enable-longtests> for more complete developer tests.
 Additional packages may be required for these tests.
 You may get a error about a typedef conflict for uint32_t.  Edit
 verilated.h to change the typedef to work, probably to @samp{typedef
 unsigned long uint32_t;}.
 =item
 If you used the VERILATOR_ROOT scheme you're done.  Programs should set the
 environment variable VERILATOR_ROOT to point to this distribution, then
 execute $VERILATOR_ROOT/bin/verilator, which will find the path to all
 needed files.
 If you used the prefix scheme, now do a C<make install>.  To run verilator,
 have the verilator binary directory in your PATH (this should already be
 true if using the default configure), and make sure VERILATOR_ROOT is not
 set.
 You may now wish to consult the examples directory. Type C<make> inside any
 example directory to run the example.
 =back
 =head1 USAGE DOCUMENTATION
 Detailed documentation and the man page can be seen by running:
    bin/verilator --help
 or reading verilator.txt in the same directory as this README.
 =head1 DIRECTORY STRUCTURE
 The directories in the kit after de-taring are as follows:
    bin/verilator               => Compiler Wrapper invoked to Verilate code
    include/                    => Files that should be in your -I compiler path
    include/verilated*.cpp      => Global routines to link into your simulator
    include/verilated*.h        => Global headers
    include/verilated.v         => Stub defines for linting
    include/verilated.mk        => Common makefile
    src/                        => Translator source code
    examples/hello_world_c      => Example simple Verilog->C++ conversion
    examples/hello_world_sc     => Example simple Verilog->SystemC conversion
    examples/tracing_c          => Example Verilog->C++ with tracing
    examples/tracing_sc         => Example Verilog->SystemC with tracing
    test_regress                => Internal tests
 =head1 LIMITATIONS
 See verilator.txt (or execute C<bin/verilator --help>) for limitations.
@@ -1,123 +0,0 @@
 // DESCRIPTION: Verilator: List of To Do issues.
 //
 // Copyright 2004-2018 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
 Language support:
 	* Fix ordering of each bit separately in a signal (mips)
 		assign b[3:0] = b[7:4];  assign b[7:4] = in;
 	* Support UDP gate primitives/ cell libraries
 		(have code for combos - problem is sequential udps)
 	* Function to eval combo logic after /*verilator public*/ functions [gwaters]
 	* Support generated clocks (correctness)
 	* Real numbers
 	* Recursive functions
 	* Verilog configuration files
 	* Structs/unions (have starting point)
 	* DPI to define C/C++ calls from Verilog
 	* Expression coverage (see notes)
 	* Better tristate support
 Long-term Features
 	* Assertions
 	* Tristate support
 	* Multithreaded execution
 Configure/Make/Install
 	* Distribute with flex/bison already expanded?
 	  Flex library not needed.  Probably too difficult to be worth it.
 Testing:
 	* Capture all inputs into global "rerun it" file
 	* Code to make wrapper that sets signals, so can do comparison checks
 	* New random program generator
 	* Better graph viewer with search and zoom
 	* Port and test against opencores.org code
 	* // verilator debug in code so can see only tree affecting those nodes
 Usability:
 	* Detect and pre-remove most UNOPTFLATs (4.000)
 	* Better reporting of unopt problems, including what lines of code
 	* Report more errors (all of them?) before exiting [Eugene Weber]
 	* Auto-create scons config files
 	* Print version/etc message at runtime. (4.000?)
 	  Include number of lines of code, percent comments, code complexity measurement
 	  <-80chars------------------------------------------------------------------->
 	  Verilator 3.600 - The fast free open-sourced simulator.  Copyright 2001-2013.
 	  Verilated #### modules, #### instances, ##### sigs,
 	  	    #### non-comment lines, ##### ops, ### KB model size
 Lint:
 	* CDCRSTLOGIC should allow filtering with paths
 	  "waive CDCRSTLOGIC --from a.b.sig  --to a.c.sig --via OR"
 Internal Code:
 	* A Visitor class that understands how to traverse data types
 	* V3Graph should be templated container type, taking in Vertex + Edge types
 	* Instead of string, have an VEncodedString/VIdString which contains __DOT__ish
 	  things, to reduce bugs.  Also add _20 trailing space to \ encoded names. (4.000)
 Runtime:
 	* New evalulation loop   ~/src/verilator/notes/event_loop.txt (4.000?)
 	* Remove all private internal functions from top level wrapper header, move
 	  to new level (4.000?)
 	* Completely standalone simulation (4.000)
 	   main() records arguments for $test$plusvars
 	   instantiates top,
 	   does tracing  (support $dump?)
 	   calls top->simulateForever()
 	   exits
 Performance:
 	* Latch optimizations
 	* Constant propagation
 		Extra cleaning AND:  1 & ((VARREF >> 1) | ((&VARREF >> 1) & VARREF))
 		Extra shift (perhaps due to clean): if (1 & CAST (VARREF >> #))
 	* Gated clock and latch conversion to flops.  [JeanPaul Vanitegem]
 		Could propagate the AND into pos/negedges and let domaining optimize.
 	* Negedge reset
 		Switch to remove negedges that don't matter
 		Can't remove async resets from control flops (like in syncronizers)
 	* If all references to array have a constant index, blow up into separate signals-per-index
 	* Bit-multiply for faster bit swapping and a=b[1,3,2] random bit reorderings.
 	* Move _last sets and all other combo logic inside master
 		if() that triggers on all possible sense items
 	* Rewrite and combine V3Life, V3Subst
 		If block temp only ever set in one place to constant, propagate it
 			Used in t_mem for array delayed assignments
 		Replace variables if set later in same cfunc branch
 			See for example duplicate sets of _narrow in cycle 90/91 of t_select_plusloop
 	* Same assignment on both if branches
 		"if (a) { ... b=2; } else { ... b=2;}" -> "b=2; if ..."
 		Careful though, as b could appear in the statement or multiple times in statement
 		(Could just require exatly two 'b's in statement)
 	* Simplify XOR/XNOR/AND/OR bit selection trees
 		Foo = A[1] ^ A[2] ^ A[3] etc are better as ^ ( A & 32'b...1110 )
 	* Combine variables into wider elements
 		Parallel statements on different bits should become single signal
 		Variables that are always consumed in "parallel" can be joined
 	* Duplicate assignments in gate optimization
 		Common to have many separate posedge blocks, each with identical
 		reset_r <= rst_in
 	* If signal is used only once (not counting trace), always gate substitute
 		Don't merge if any combining would form circ logic (out goes back to in)
 	* Multiple assignments each bit can become single assign with concat
 		Make sure a SEL of a CONCAT can get the single bit back.
 	* Usually blocks/values
 		Enable only after certain time, so VL_TIME_I(32) > 0x1e gets eliminated out
 	* Better ordering of a<=b, b<=c, put all refs to 'b' next to each other to optimize caching
 	* I-cache packing improvements (what/how?)
 	* Data cache organization (order of vars in class)
 		First have clocks,
 		then bools instead of uint32_t's
 		then based on what sense list they come from, all outputs, then all inputs
 		finally have any signals part of a "usually" block, or constant.
 	* Rather then tracking widths, have a MSB...LSB of this expression
 		(or better, a bitmask of bits relevant in this expression)
 	* Track recirculation and convert into clock-enables
 	* Clock enables should become new clocking domains for speed
 	* If floped(a) & flopped(b) and no other a&b, then instead flop(a&b).
 	* Sort by output bitselects so can combine more assignments (see DDP example dx_dm signal)
@@ -1,29 +1,15 @@
-: # -*-Mode: perl;-*- use perl, wherever it is
+#!/usr/bin/env perl
 eval 'exec perl -wS $0 ${1+"$@"}'
  if 0;
 ######################################################################
 #
-# Copyright 2003-2018 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 #
 # This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU General Public License for more details.
 #
 ######################################################################
 require 5.006_001;
 use warnings;
 BEGIN {
    if ($ENV{DIRPROJECT} && $ENV{DIRPROJECT_PERL_BOOT}) {
 	# Magic to allow author testing of perl packages in local directory
 	require $ENV{DIRPROJECT}."/".$ENV{DIRPROJECT_PERL_BOOT};
    }
 }
 use Getopt::Long;
 use FindBin qw($RealBin $RealScript);
 use IO::File;
@@ -31,7 +17,7 @@ use Pod::Usage;
 use Cwd qw(abs_path getcwd);
 use strict;
-use vars qw ($Debug @Opt_Verilator_Sw);
+use vars qw($Debug @Opt_Verilator_Sw);
 #######################################################################
 #######################################################################
@@ -54,26 +40,26 @@ foreach my $sw (@ARGV) {
    push @Opt_Verilator_Sw, $sw;
 }
-Getopt::Long::config ("no_auto_abbrev","pass_through");
+Getopt::Long::config("no_auto_abbrev","pass_through");
 if (! GetOptions (
-	  # Major operating modes
+          # Major operating modes
-	  "help"	=> \&usage,
+          "help"        => \&usage,
-	  "debug:s"	=> \&debug,
+          "debug:s"     => \&debug,
-	  # "version!"	=> \&version,	# Also passthru'ed
+          # "version!"  => \&version,   # Also passthru'ed
-	  # Additional parameters
+          # Additional parameters
-	  "<>"		=> sub {},	# Ignored
+          "<>"          => sub {},      # Ignored
    )) {
    pod2usage(-exitstatus=>2, -verbose=>0);
 }
 # Normal, non gdb
-run (verilator_coverage_bin()
+run(verilator_coverage_bin()
-     ." ".join(' ',@Opt_Verilator_Sw));
+    ." ".join(' ',@Opt_Verilator_Sw));
 #----------------------------------------------------------------------
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
 }
 sub debug {
@@ -90,23 +76,25 @@ sub verilator_coverage_bin {
    my $bin = "";
    # Use VERILATOR_ROOT if defined, else assume verilator_bin is in the search path
    my $basename = ($ENV{VERILATOR_COVERAGE_BIN}
-		    || "verilator_coverage_bin_dbg");
+                    || "verilator_coverage_bin_dbg");
    if (defined($ENV{VERILATOR_ROOT})) {
-	my $dir = $ENV{VERILATOR_ROOT};
+        my $dir = $ENV{VERILATOR_ROOT};
-	if (-x "$dir/bin/$basename") {  # From a "make install" into VERILATOR_ROOT
+        if (-x "$dir/bin/$basename"
-	    $bin = "$dir/bin/$basename";
+            || -x "$dir/bin/$basename.exe") {  # From a "make install" into VERILATOR_ROOT
-	} else {
+            $bin = "$dir/bin/$basename";
-	    $bin = "$dir/$basename";  # From pointing to kit directory
+        } else {
-	}
+            $bin = "$dir/$basename";  # From pointing to kit directory
        }
    } else {
-	if (-x "$RealBin/$basename") {
+        if (-x "$RealBin/$basename"
-	    $bin = "$RealBin/$basename";  # From path/to/verilator with verilator_bin installed
+            || -x "$RealBin/$basename.exe") {
-	} else {
+            $bin = "$RealBin/$basename";  # From path/to/verilator with verilator_bin installed
-	    $bin = $basename;  # Find in PATH
+        } else {
-	}
+            $bin = $basename;  # Find in PATH
-	# Note we don't look under bin/$basename which would be right if running
+        }
-	# in the kit dir. Running that would likely break, since
+        # Note we don't look under bin/$basename which would be right if running
-	# VERILATOR_ROOT wouldn't be set and Verilator won't find internal files.
+        # in the kit dir. Running that would likely break, since
        # VERILATOR_ROOT wouldn't be set and Verilator won't find internal files.
    }
    return $bin;
 }
@@ -123,23 +111,28 @@ sub run {
    system($command);
    my $status = $?;
    if ($status) {
-	if ($! =~ /no such file or directory/i) {
+        if ($! =~ /no such file or directory/i) {
-	    warn "%Error: verilator_coverage: Misinstalled, or VERILATOR_ROOT might need to be in environment\n";
+            warn "%Error: verilator_coverage: Misinstalled, or VERILATOR_ROOT might need to be in environment\n";
-	}
+        }
-	if ($Debug) {  # For easy rerunning
+        if ($Debug) {  # For easy rerunning
-	    warn "%Error: export VERILATOR_ROOT=".($ENV{VERILATOR_ROOT}||"")."\n";
+            warn "%Error: export VERILATOR_ROOT=".($ENV{VERILATOR_ROOT}||"")."\n";
-	    warn "%Error: $command\n";
+            warn "%Error: $command\n";
-	}
+        }
-	if ($status & 127) {
+        if ($status & 127) {
-	    if (($status & 127) == 8 || ($status & 127) == 11) { # SIGFPA or SIGSEGV
+            if (($status & 127) == 8 || ($status & 127) == 11) { # SIGFPA or SIGSEGV
-		warn "%Error: Verilator_coverage internal fault, sorry.\n" if !$Debug;
+                warn "%Error: Verilator_coverage internal fault, sorry.\n" if !$Debug;
-	    } elsif (($status & 127) == 6) {  # SIGABRT
+            } elsif (($status & 127) == 6) {  # SIGABRT
-		warn "%Error: Verilator_coverage aborted.\n" if !$Debug;
+                warn "%Error: Verilator_coverage aborted.\n" if !$Debug;
-	    } else {
+            } else {
-		warn "%Error: Verilator_coverage threw signal $status.\n" if !$Debug;
+                warn "%Error: Verilator_coverage threw signal $status.\n" if !$Debug;
-	    }
+            }
-	}
+        }
-	die "%Error: Command Failed $command\n";
+        if ($status != 256 || $Debug) {  # i.e. not normal exit(1)
            warn "%Error: Command Failed $command\n";
        }
        exit $! if $!;  # errno
        exit $? >> 8 if $? >> 8;  # child exit status
        exit 255;  # last resort
    }
 }
@@ -269,12 +262,14 @@ Specifies a module search directory.
 =head1 DISTRIBUTION
-The latest version is available from L<http://www.veripool.org/>.
+The latest version is available from L<https://verilator.org>.
-Copyright 2003-2018 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-redistribute it and/or modify the Verilator internals under the terms of
+can redistribute it and/or modify the Verilator internals under the terms
-either the GNU Lesser General Public License Version 3 or the Perl Artistic
+of either the GNU Lesser General Public License Version 3 or the Perl
-License Version 2.0.
+Artistic License Version 2.0.
 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 =head1 AUTHORS
@@ -1,16 +1,13 @@
-: # -*-Mode: perl;-*- use perl, wherever it is
+#!/usr/bin/env perl
 eval 'exec perl -wS $0 ${1+"$@"}'
  if 0;
 # See copyright, etc in below POD section.
 ######################################################################
 require 5.006_001;
 use warnings;
 use Getopt::Long;
 use IO::File;
 use Pod::Usage;
 use strict;
-use vars qw ($Debug);
+use vars qw($Debug);
 #======================================================================
@@ -37,12 +34,12 @@ my $Opt_B;
 my $Opt_Lineno = 1;
 autoflush STDOUT 1;
 autoflush STDERR 1;
-Getopt::Long::config ("no_auto_abbrev");
+Getopt::Long::config("no_auto_abbrev");
-if (! GetOptions (
+if (! GetOptions(
-	  "help"	=> \&usage,
+          "help"        => \&usage,
-	  "debug"	=> \&debug,
+          "debug"       => \&debug,
-	  "<>"		=> \&parameter,
+          "<>"          => \&parameter,
-	  "lineno!"	=> \$Opt_Lineno,
+          "lineno!"     => \$Opt_Lineno,
    )) {
    die "%Error: Bad usage, try 'verilator_difftree --help'\n";
 }
@@ -54,9 +51,9 @@ defined $Opt_B or die "%Error: No new diff filename\n";
 -e $Opt_B or die "%Error: No new diff filename found: $Opt_B\n";
 if (-d $Opt_A && -d $Opt_B) {
-    diff_dir ($Opt_A, $Opt_B);
+    diff_dir($Opt_A, $Opt_B);
 } elsif (-f $Opt_A && -f $Opt_B) {
-    diff_file ($Opt_A, $Opt_B);
+    diff_file($Opt_A, $Opt_B);
 } else {
    die "%Error: Mix of files and dirs\n";
 }
@@ -68,24 +65,25 @@ sub diff_dir {
    my %files;
    foreach my $fn (glob("$a/*.tree")) {
-	(my $base = $fn) =~ s!.*/!!;
+        (my $base = $fn) =~ s!.*/!!;
-	$files{$base}{a} = $fn;
+        $files{$base}{a} = $fn;
    }
    foreach my $fn (glob("$b/*.tree")) {
-	(my $base = $fn) =~ s!.*/!!;
+        (my $base = $fn) =~ s!.*/!!;
-	$files{$base}{b} = $fn;
+        $files{$base}{b} = $fn;
    }
    my $any;
    foreach my $base (sort (keys %files)) {
-	my $a = $files{$base}{a};
+        my $a = $files{$base}{a};
-	my $b = $files{$base}{b};
+        my $b = $files{$base}{b};
-	next if !$a || !$b;
+        next if !$a || !$b;
-	print "="x70,"\n";
+        print "="x70,"\n";
-	print "= $a <-> $b\n";
+        print "= $a <-> $b\n";
-	diff_file($a,$b);
+        diff_file($a,$b);
-	$any = 1;
+        $any = 1;
    }
-    $any or warn "%Warning: No .tree files found\n";
+    $any or warn("%Warning: No .tree files found that have similar base names:\n    "
                 .join("\n    ", sort keys %files),"\n");
 }
 sub diff_file {
@@ -100,10 +98,10 @@ sub diff_file {
    my $vera = version_from($a);
    my $verb = version_from($b);
    my $verCvt = (($vera < 0x3900 && $verb >= 0x3900)
-		  || ($vera >= 0x3900 && $verb < 0x3900));
+                  || ($vera >= 0x3900 && $verb < 0x3900));
-    filter ($a, $tmp_a, $verCvt);
+    filter($a, $tmp_a, $verCvt);
-    filter ($b, $tmp_b, $verCvt);
+    filter($b, $tmp_b, $verCvt);
    system("diff -u $tmp_a $tmp_b");
    unlink $tmp_a;
    unlink $tmp_b;
@@ -114,8 +112,8 @@ sub version_from {
    # Return dump format
    my $f1 = IO::File->new ($fn) or die "%Error: $! $fn,";
    while (defined (my $line=$f1->getline())) {
-	last if $. > 10;
+        last if $. > 10;
-	return hex $1 if $line =~ /\(format (0x[0-9.]+)\)/;
+        return hex $1 if $line =~ /\(format (0x[0-9.]+)\)/;
    }
    return 1.0;
 }
@@ -129,36 +127,36 @@ sub filter {
    my $f2 = IO::File->new ($fn2,"w") or die "%Error: $! $fn2,";
    while (defined (my $line=$f1->getline())) {
      same_line:
-	next if $line =~ / This=/;
+        next if $line =~ / This=/;
-	$line =~ s/0x[a-f0-9]+/0x/g;
+        $line =~ s/0x[a-f0-9]+/0x/g;
-	$line =~ s/<e[0-9]+\#?>/<e>/g;
+        $line =~ s/<e[0-9]+\#?>/<e>/g;
-	$line =~ s/{[a-z]*\d+}/{}/g if !$Opt_Lineno;
+        $line =~ s/{[a-z]*\d+}/{}/g if !$Opt_Lineno;
-	if ($verCvt) {
+        if ($verCvt) {
-	    next if $line =~ /^     NETLIST/;
+            next if $line =~ /^     NETLIST/;
-	    $line =~ s!\@dt=0x\(G?/?([^)]+)\)!$1!g;  # NEW: @dt -> OLD: non @dt format
+            $line =~ s!\@dt=0x\(G?/?([^)]+)\)!$1!g;  # NEW: @dt -> OLD: non @dt format
-	    #					     # Below Ver1_Non_Dtyped may replace above further
+            #                                        # Below Ver1_Non_Dtyped may replace above further
-	    if ($line =~ /: ([A-Z]+) /) {
+            if ($line =~ /: ([A-Z]+) /) {
-		my $type = $1;
+                my $type = $1;
-		next if $type =~ 'DTYPE';
+                next if $type =~ 'DTYPE';
-		if ($type eq 'TYPETABLE' || $type eq 'RANGE') {
+                if ($type eq 'TYPETABLE' || $type eq 'RANGE') {
-		    $line =~ /^(\s+\S+:) /; my $prefix = $1;
+                    $line =~ /^(\s+\S+:) /; my $prefix = $1;
-		    while (defined ($line=$f1->getline())) {
+                    while (defined ($line=$f1->getline())) {
-			next if $line =~ /^\s+[a-z]/;  # Table body
+                        next if $line =~ /^\s+[a-z]/;  # Table body
-			next if $line =~ /^${prefix}[0-9]:/;
+                        next if $line =~ /^${prefix}[0-9]:/;
-			goto same_line;
+                        goto same_line;
-		    }
+                    }
-		    next;
+                    next;
-		}
+                }
-		if ($Ver1_Non_Dtyped{$type}) {
+                if ($Ver1_Non_Dtyped{$type}) {
-		    $line =~ s! w[0-9]+!!g;
+                    $line =~ s! w[0-9]+!!g;
-		}
+                }
-	    }
+            }
-	    $line =~ s!\@dt=0$!NoW!g;   # NEW: dt=null -> common format
+            $line =~ s!\@dt=0$!NoW!g;   # NEW: dt=null -> common format
-	    $line =~ s!\@dt=0 !NoW !g;  # NEW: dt=null -> common format
+            $line =~ s!\@dt=0 !NoW !g;  # NEW: dt=null -> common format
-	    $line =~ s! s?w0$! NoW!g;   # OLD: no width -> common format
+            $line =~ s! s?w0$! NoW!g;   # OLD: no width -> common format
-	    $line =~ s! s?w0 ! NoW !g;  # OLD: no width -> common format
+            $line =~ s! s?w0 ! NoW !g;  # OLD: no width -> common format
-	}
+        }
-	print $f2 $line;
+        print $f2 $line;
    }
    $f1->close;
    $f2->close;
@@ -167,8 +165,8 @@ sub filter {
 #----------------------------------------------------------------------
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
-    exit (1);
+    exit(1);  # Unreachable
 }
 sub debug {
@@ -178,11 +176,11 @@ sub debug {
 sub parameter {
    my $param = shift;
    if (!defined $Opt_A) {
-	$Opt_A = $param;
+        $Opt_A = $param;
    } elsif (!defined $Opt_B) {
-	$Opt_B = $param;
+        $Opt_B = $param;
    } else {
-	die "%Error: Unknown parameter: $param\n";
+        die "%Error: Unknown parameter: $param\n";
    }
 }
@@ -233,11 +231,14 @@ Do not show differences in line numbering.
 =head1 DISTRIBUTION
-The latest version is available from L<http://www.veripool.org/verilator>.
+The latest version is available from L<https://verilator.org>.
-Copyright 2005-2018 by Wilson Snyder.  This package is free software; you can
+Copyright 2005-2020 by Wilson Snyder. This program is free software; you
-redistribute it and/or modify it under the terms of either the GNU Lesser
+can redistribute it and/or modify it under the terms of either the GNU
-General Public License Version 3 or the Perl Artistic License Version 2.0.
+Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.
 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 =head1 AUTHORS
@@ -0,0 +1,561 @@
 #!/usr/bin/env perl
 # See copyright, etc in below POD section.
 ######################################################################
 use warnings;
 use strict;
 use Getopt::Long;
 use IO::File;
 use Pod::Usage;
 use vars qw($Debug);
 $Debug = 0;
 my $Opt_File;
 my $Opt_Time_Per_Char = 0;  # rdtsc ticks per char in gantt chart, 0=auto
 my $opt_vcd = "profile_threads.vcd";
 our %Threads;
 our %Mtasks;
 our %Global;
 autoflush STDOUT 1;
 autoflush STDERR 1;
 Getopt::Long::config("no_auto_abbrev");
 if (! GetOptions(
          "help"        => \&usage,
          "scale=i"     => \$Opt_Time_Per_Char,
          "debug"       => sub { $Debug = 1; },
          "vcd=s"       => \$opt_vcd,
          "no-vcd!"     => sub { $opt_vcd = undef; },
          "<>"          => \&parameter,
    )) {
    die "%Error: Bad usage, try 'verilator_gantt --help'\n";
 }
 $Opt_File = "profile_threads.dat" if !defined $Opt_File;
 process($Opt_File);
 write_vcd($opt_vcd) if defined $opt_vcd;
 exit(0);
 #######################################################################
 sub usage {
    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
    exit(1);  # Unreachable
 }
 sub parameter {
    my $param = shift;
    if (!defined $Opt_File) {
        $Opt_File = $param;
    } else {
        die "%Error: Unknown parameter: $param\n";
    }
 }
 #######################################################################
 sub process {
    my $filename = shift;
    read_data($filename);
    report();
 }
 #######################################################################
 sub read_data {
    my $filename = shift;
    %Global = (rdtsc_cycle_time => 0);
    my $fh = IO::File->new ($filename) or die "%Error: $! $filename,";
    while (my $line = $fh->getline) {
        if ($line =~ m/VLPROF mtask\s(\d+)\sstart\s(\d+)\send\s(\d+)\selapsed\s(\d+)\spredict_time\s(\d+)\scpu\s(\d+)\son thread (\d+)/) {
            my $mtask = $1;
            my $start = $2;
            my $end = $3;
            my $elapsed_time = $4;
            my $predict_time = $5;
            my $cpu = $6;
            my $thread = $7;
            $Threads{$thread}{$start}{mtask} = $mtask;
            $Threads{$thread}{$start}{end} = $end;
            $Threads{$thread}{$start}{cpu} = $cpu;
            if (!exists $Mtasks{$mtask}{elapsed}) {
                $Mtasks{$mtask}{elapsed} = 0;
            }
            $Mtasks{$mtask}{elapsed} += $elapsed_time;
            $Mtasks{$mtask}{predict} = $predict_time;
            $Mtasks{$mtask}{end} = max($Mtasks{$mtask}{end}, $end);
        }
        elsif ($line =~ /^VLPROFTHREAD/) {}
        elsif ($line =~ m/VLPROF arg\s+(\S+)\+([0-9.])\s*$/
               || $line =~ m/VLPROF arg\s+(\S+)\s+([0-9.])\s*$/) {
            $Global{args}{$1} = $2;
        }
        elsif ($line =~ m/VLPROF stat\s+(\S+)\s+([0-9.]+)/) {
            $Global{stats}{$1} = $2;
        }
        elsif ($line =~ /^#/) {}
        elsif ($Debug) {
            chomp $line;
            print "Unk: $line\n";
        }
        # TODO -- this is parsing text printed by a client.
        # Really, verilator proper should generate this
        # if it's useful...
        if ($line =~ m/rdtsc time = (\d+) ticks/) {
            $Global{rdtsc_cycle_time} = $1;
        }
    }
 }
 sub report {
    print "Verilator Gantt report\n";
    print "\nArgument settings:\n";
    foreach my $arg (sort keys %{$Global{args}}) {
        my $plus = ($arg =~ /^\+/) ? "+" : " ";
        printf "  %s%s%d\n", $arg, $plus, $Global{args}{$arg};
    }
    my $nthreads = scalar keys %Threads;
    $Global{cpus} = {};
    foreach my $thread (keys %Threads) {
        # Make potentially multiple characters per column
        foreach my $start (keys %{$Threads{$thread}}) {
            my $cpu = $Threads{$thread}{$start}{cpu};
            my $elapsed = $Threads{$thread}{$start}{end} - $start;
            $Global{cpus}{$cpu}{cpu_time} += $elapsed;
        }
    }
    my $mt_mtask_time = 0;
    my $long_mtask_time = 0;
    my $last_end = 0;
    foreach my $mtask (keys %Mtasks) {
        $mt_mtask_time += $Mtasks{$mtask}{elapsed};
        $last_end = max($last_end, $Mtasks{$mtask}{end});
        $long_mtask_time = max($long_mtask_time, $Mtasks{$mtask}{elapsed});
    }
    $Global{last_end} = $last_end;
    report_graph();
    # If we know cycle time in the same (rdtsc) units,
    # this will give us an actual utilization number,
    # (how effectively we keep the cores busy.)
    #
    # It also gives us a number we can compare against
    # serial mode, to estimate the overhead of data sharing,
    # which will show up in the total elapsed time. (Overhead
    # of synchronization and scheduling should not.)
    print "\nAnalysis:\n";
    printf "  Total threads             = %d\n", $nthreads;
    printf "  Total mtasks              = %d\n", scalar(keys %Mtasks);
    printf "  Total cpus used           = %d\n", scalar(keys %{$Global{cpus}});
    printf "  Total yields              = %d\n", $Global{stats}{yields};
    printf "  Total eval time           = %d rdtsc ticks\n", $Global{last_end};
    printf "  Longest mtask time        = %d rdtsc ticks\n", $long_mtask_time;
    printf "  All-thread mtask time     = %d rdtsc ticks\n", $mt_mtask_time;
    my $long_efficiency = $long_mtask_time/($Global{last_end});
    printf "  Longest-thread efficiency = %0.1f%%\n", $long_efficiency*100;
    my $mt_efficiency = $mt_mtask_time/($Global{last_end}*$nthreads);
    printf "  All-thread efficiency     = %0.1f%%\n", $mt_efficiency*100;
    printf "  All-thread speedup        = %0.1f\n", $mt_efficiency*$nthreads;
    if ($Global{rdtsc_cycle_time} > 0) {
        my $ut = $mt_mtask_time / $Global{rdtsc_cycle_time};
        print "tot_mtask_cpu=$mt_mtask_time cyc=$Global{rdtsc_cycle_time} ut=$ut\n";
    }
    my @p2e_ratios;
    my $min_p2e = 1000000;
    my $min_mtask;
    my $max_p2e = -1000000;
    my $max_mtask;
    foreach my $mtask (sort keys %Mtasks) {
        if ($Mtasks{$mtask}{elapsed} > 0) {
            if ($Mtasks{$mtask}{predict} == 0) {
                $Mtasks{$mtask}{predict} = 1;  # don't log(0) below
            }
            my $p2e_ratio = log( $Mtasks{$mtask}{predict} / $Mtasks{$mtask}{elapsed} );
            #print "log(p2e $mtask) = $p2e_ratio   (predict $Mtasks{$mtask}{predict}, elapsed $Mtasks{$mtask}{elapsed})\n";
            push @p2e_ratios, $p2e_ratio;
            if ($p2e_ratio > $max_p2e) {
                $max_p2e = $p2e_ratio;
                $max_mtask = $mtask;
            }
            if ($p2e_ratio < $min_p2e) {
                $min_p2e = $p2e_ratio;
                $min_mtask = $mtask;
            }
        }
    }
    print "\nStatistics:\n";
    print "  min log(p2e) = $min_p2e  from mtask $min_mtask (predict $Mtasks{$min_mtask}{predict}, elapsed $Mtasks{$min_mtask}{elapsed})\n";
    print "  max log(p2e) = $max_p2e  from mtask $max_mtask (predict $Mtasks{$max_mtask}{predict}, elapsed $Mtasks{$max_mtask}{elapsed})\n";
    my $stddev = stddev(\@p2e_ratios);
    my $mean = mean(\@p2e_ratios);
    print "  mean = " . ($mean) . "\n";
    print "  stddev = " . ($stddev) . "\n";
    print "  e ^ stddev = " . exp($stddev). "\n";
    print "\n";
 }
 sub report_graph {
    my $time_per = $Opt_Time_Per_Char;
    if ($time_per == 0) {
        $time_per = ($Global{last_end} / 40);  # Start with 40 columns
        while ($time_per > 10) {
            my ($graph, $conflicts) = _make_graph($time_per);
            last if !$conflicts;
            $time_per = int($time_per/2);
        }
        # One more step so we can fit more labels
        $time_per = int($time_per/2);
    }
    my ($graph, $conflicts) = _make_graph($time_per);
    print "\nThread gantt graph:\n";
    print "  Legend: One character width = $time_per rdtsc ticks\n";
    print "  Legend: '&' = multiple mtasks in this period (character width)\n";
    my $scale = "   <-".$Global{last_end}." rdtsc total";
    for (my $col = length($scale);  # -2 for '->' below
         $col < ($Global{last_end}/$time_per); ++$col) {
        $scale .= "-";
    }
    print "  $scale->\n";
    foreach my $thread (sort keys %{$graph}) {
        print "  t: ";
        _print_graph_line($graph->{$thread}, '');
    }
 }
 sub _make_graph {
    my $time_per = shift;
    my $graph = {};  # {thread}{column}{char=>'x' or chars=>#}
    my $conflicts = 0;
    foreach my $thread (keys %Threads) {
        # Make potentially multiple characters per column
        foreach my $start (sort {$a <=> $b} keys %{$Threads{$thread}}) {
            my $end = $Threads{$thread}{$start}{end};
            my $mtask = $Threads{$thread}{$start}{mtask};
            my $cpu = $Threads{$thread}{$start}{cpu};
            my $startcol = _time_col($time_per, $start);
            my $endcol = _time_col($time_per, $end);
            my $label = "[";
            $label .= "$cpu";  # Maybe make optional in future
            my $width = $endcol - $startcol + 1;
            while (length($label) < ($width-1)) {  # -1 for ']'
                $label .= "-";
            }
            $label .= "]";
            $graph->{$thread}[$startcol]{char} .= $label;
        }
        if ($Debug) {
            print "# Multicol: "; _print_graph_line($graph->{$thread}, '|');
        }
        # Expand line to one char per column
        for (my $col = 0; $col <= $#{$graph->{$thread}}; ++$col) {
            if (my $chars = $graph->{$thread}[$col]{char}) {
                my $ok = 1;
                for (my $coladd = 1; $coladd<length($chars); ++$coladd) {
                    if ($graph->{$thread}[$col + $coladd]{char}) {
                        $ok = 0; last;
                    }
                }
                if (!$ok) {
                    if ($chars =~ /\[.*\[/) {  # Two begins or more
                        $conflicts++;
                        $graph->{$thread}[$col]{char} = "&";
                    } else {
                        $graph->{$thread}[$col]{char} = "[";
                    }
                    for (my $coladd = 1; $coladd<length($chars); ++$coladd) {
                        if ($graph->{$thread}[$col + $coladd]{char}) {
                            last;
                        } else {
                            $graph->{$thread}[$col + $coladd]{char} = 'x';
                        }
                    }
                } else {
                    my $coladd = 0;
                    foreach my $char (split //, $chars) {
                        $graph->{$thread}[$col+$coladd]{char} = $char;
                        ++$coladd;
                    }
                }
            }
        }
        if ($Debug) {
            print "# Singlcol: "; _print_graph_line($graph->{$thread}, '|');
        }
    }
    print "# Conflicts $conflicts\n" if $Debug;
    return ($graph, $conflicts);
 }
 sub _print_graph_line {
    my $graph_thread = shift;
    my $sep = shift;
    for (my $col = 0; $col <= $#{$graph_thread}; ++$col) {
        my $c = $graph_thread->[$col]{char}; $c=' ' if !defined $c;
        print $c, $sep;
    }
    print "\n";
 }
 sub _time_col {
    my $time_per = shift;
    my $time = shift;
    return int($time/$time_per);
 }
 #######################################################################
 sub write_vcd {
    my $filename = shift;
    print "Writing $filename\n";
    my $fh = IO::File->new(">$filename") or die "%Error: $! $filename,";
    my $vcd = {values => {},  # {<time>}{<code>} = value
               sigs => {},  # {<module>}{<sig}} = code
               code => 0,
    };
    my %parallelism;
    foreach my $thread (keys %Threads) {
        my $mcode = ($vcd->{sigs}{threads}{"thread${thread}_mtask"} ||= $vcd->{code}++);
        foreach my $start (sort {$a <=> $b} keys %{$Threads{$thread}}) {
            my $end = $Threads{$thread}{$start}{end};
            my $mtask = $Threads{$thread}{$start}{mtask};
            my $cpu = $Threads{$thread}{$start}{cpu};
            $vcd->{values}{$start}{$mcode} = $mtask;
            $vcd->{values}{$end}{$mcode} = undef;
            $parallelism{$start}++;
            $parallelism{$end}--;
            my $ccode = $vcd->{sigs}{cpus}{"cpu${cpu}_thread"} ||= $vcd->{code}++;
            $vcd->{values}{$start}{$ccode} = $thread;
            $vcd->{values}{$end}{$ccode} = undef;
            my $mcode = $vcd->{sigs}{mtasks}{"mtask${mtask}_cpu"} ||= $vcd->{code}++;
            $vcd->{values}{$start}{$mcode} = $cpu;
            $vcd->{values}{$end}{$mcode} = undef;
        }
    }
    {
        my $pcode = ($vcd->{sigs}{Stats}{"parallelism"} ||= $vcd->{code}++);
        my $value = 0;
        foreach my $time (sort {$a<=>$b} keys %parallelism) {
            $value += $parallelism{$time};
            $vcd->{values}{$time}{$pcode} = $value;
        }
    }
    $fh->print('$version Generated by verilator_gantt $end'."\n");
    $fh->print('$timescale 1ns $end'."\n");
    $fh->print("\n");
    my %all_codes;
    $fh->print(' $scope module gantt $end'."\n");
    foreach my $module (sort keys %{$vcd->{sigs}}) {
        $fh->printf('  $scope module %s $end'."\n", $module);
        foreach my $sig (sort keys %{$vcd->{sigs}{$module}}) {
            my $code = $vcd->{sigs}{$module}{$sig};
            $fh->printf('   $var wire 32 v%x %s [31:0] $end'."\n",
                        $code, $sig);
            $all_codes{$code} = 1;
        }
        $fh->print('  $upscope $end'."\n");
    }
    $fh->print(' $upscope $end'."\n");
    $fh->print('$enddefinitions $end'."\n");
    $fh->print("\n");
    my $first = 1;
    foreach my $time (sort {$a <=> $b} keys %{$vcd->{values}}) {
        if ($first) {
            $first = 0;
            # Start with Z for any signals without time zero data
            foreach my $code (keys %all_codes) {
                if (!defined $vcd->{values}{$time}{$code}) {
                    $vcd->{values}{$time}{$code} = undef;
                }
            }
        }
        $fh->printf("#%d\n", $time);
        foreach my $code (sort keys %{$vcd->{values}{$time}}) {
            my $value = $vcd->{values}{$time}{$code};
            if (defined $value) {
                $fh->printf("b%b v%x\n", $value, $code);
            } else {
                $fh->printf("bz v%x\n", $code);
            }
        }
    }
 }
 #######################################################################
 # Similar to Statistics::Basic functions, but avoid a package dependency
 sub max {
    my $n = $_[0]; shift;
    while (defined $_[0]) {
        $n = $_[0] if !defined $n || $_[0] > $n;
        shift;
    }
    return $n;
 }
 sub mean {
    my $arrayref = shift;
    my $n = 0;
    my $sum = 0;
    foreach my $v (@$arrayref) {
        $sum += $v;
        $n++;
    }
    return undef if !$n;
    return $sum/$n;
 }
 sub stddev {
    my $arrayref = shift;
    my $n = 0;
    my $sum = 0;
    my $sumsq = 0;
    foreach my $v (@$arrayref) {
        $sum += $v;
        $sumsq += $v**2;
        $n++;
    }
    return undef if !$n;
    return sqrt(($sumsq/$n) - ($sum/$n)**2);
 }
 #######################################################################
 __END__
 =pod
 =head1 NAME
 verilator_gantt - Create Gantt chart of multi-threaded execution
 =head1 SYNOPSIS
 Creates a visual representation to help analyze Verilator multithreaded
 simulation performance, by showing when each macro-task starts and ends,
 and showing when each thread is busy or idle.
 The generated Gantt chart has time on the X-axis. Times shown are to the
 scale printed, i.e. a certain about of time for each character width.  The
 Y-axis shows threads, each thread's execution is shown on one line.  That
 line shows "[" at the position in time when it executes.
 Following the "[" is the cpu number the task executed on, followed by zero
 or more "-" to make the width of the characters match the scaled execution
 time, followed by a "]".  If the scale is too small, the cpu number and
 mtask number will not be printed.  If the scale is very small, a "&"
 indicates multiple mtasks started at that time position.
 Also creates a value change dump (VCD) format dump file which may be viewed
 in a waveform viewer (e.g. C<GTKWave>).  See below.
 =head1 USAGE
  Build with --prof-threads.
  Run a sim with +verilator+prof+threads+window 2.
  This will create profile_threads.dat.
  Then run:
  verilator_gantt profile_threads.dat
  The report will be printed on standard output, this also generates
  profile_threads.vcd
  View profile_threads.vcd in a waveform viewer.
 =head1 VCD SIGNALS
 In waveforms there are the following signals. Most signals the "decimal"
 format will remove the leading zeros and make the traces easier to read.
 parallelism: The number of mtasks active at this time, for best performance
 this will match the thread count. You may want to use an "analog step"
 format to view this signal.
 cpu#_thread: For the given CPU number, the thread number executing.
 mtask#_cpu; For the given mtask id, the CPU it is executing on.
 thread#_mtask: For the given thread number, the mtask id executing.
 =head1 ARGUMENTS
 =over 4
 =item I<filename>
 The filename to read data from, defaults to "profile_threads.dat".
 =item --help
 Displays this message and program version and exits.
 =item --scale I<n>
 On the X-axis of the generated Gantt chart, each character represents this
 many time units. (On x86, time units are rdtsc ticks.)  Defaults to 0,
 which will automatically compute a reasonable scale where no two mtasks
 need to fit into same character width's worth of scaled time.
 =item --no-vcd
 =item --vcd I<filename>
 Set output filename for vcd dump, or disable. Default is
 verilator_gantt.vcd.
 =back
 =head1 DISTRIBUTION
 The latest version is available from L<https://verilator.org>.
 Copyright 2018-2020 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.
 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 =head1 AUTHORS
 Wilson Snyder <[email protected]>
 =head1 SEE ALSO
 C<verilator>
 =cut
 ######################################################################
 ### Local Variables:
 ### compile-command: "$V4/bin/verilator_gantt $V4/test_regress/obj_vltmt/t_gantt/vlt_sim.log"
 ### End:
@@ -1,11 +1,11 @@
-: # -*-Mode: perl;-*- use perl, wherever it is
+#!/usr/bin/env perl
 eval 'exec perl -wS $0 ${1+"$@"}'
  if 0;
 # DESCRIPTION: Print include statements for each ARGV
 #
-# Copyright 2003-2018 by Wilson Snyder. This package is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-# redistribute it and/or modify it under the terms of either the GNU Lesser
+# can redistribute it and/or modify it under the terms of either the GNU
-# General Public License Version 3 or the Perl Artistic License Version 2.0.
+# Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 ######################################################################
 require 5.005;
@@ -1,6 +1,4 @@
-: # -*-Mode: perl;-*- use perl, wherever it is
+#!/usr/bin/env perl
 eval 'exec perl -wS $0 ${1+"$@"}'
  if 0;
 # See copyright, etc in below POD section.
 ######################################################################
@@ -11,7 +9,7 @@ use IO::File;
 use Pod::Usage;
 eval { use Data::Dumper;  $Data::Dumper::Indent = 1; }; # Debug, ok if missing
 use strict;
-use vars qw ($Debug);
+use vars qw($Debug);
 #======================================================================
@@ -23,12 +21,12 @@ $Debug = 0;
 my $Opt_File;
 autoflush STDOUT 1;
 autoflush STDERR 1;
-Getopt::Long::config ("no_auto_abbrev");
+Getopt::Long::config("no_auto_abbrev");
-if (! GetOptions (
+if (! GetOptions(
-		  "help"	=> \&usage,
+          "help"        => \&usage,
-		  "debug"	=> \&debug,
+          "debug"       => \&debug,
-		  "<>"		=> \&parameter,
+          "<>"          => \&parameter,
-		  )) {
+    )) {
    die "%Error: Bad usage, try 'verilator_profcfunc --help'\n";
 }
@@ -39,8 +37,8 @@ profcfunc($Opt_File);
 #----------------------------------------------------------------------
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
-    exit (1);
+    exit(1);  # Unreachable
 }
 sub debug {
@@ -50,9 +48,9 @@ sub debug {
 sub parameter {
    my $param = shift;
    if (!defined $Opt_File) {
-	$Opt_File = $param;
+        $Opt_File = $param;
    } else {
-	die "%Error: Unknown parameter: $param\n";
+        die "%Error: Unknown parameter: $param\n";
    }
 }
@@ -66,13 +64,21 @@ sub profcfunc {
    my %funcs;
    while (defined (my $line=$fh->getline())) {
-	#                  %time      cumesec   selfsec     calls     {stuff}   name
+        #                  %time      cumesec   selfsec     calls     {stuff}   name
-	if ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$/) {
+        if ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$/) {
-	    my $pct=$1; my $sec=$2; my $calls=$3; my $func=$4;
+            my $pct=$1; my $sec=$2; my $calls=$3; my $func=$4;
-	    $funcs{$func}{pct} += $pct;
+            $funcs{$func}{pct} += $pct;
-	    $funcs{$func}{sec} += $sec;
+            $funcs{$func}{sec} += $sec;
-	    $funcs{$func}{calls} += $calls;
+            $funcs{$func}{calls} += $calls;
-	}
+        }
        # Older gprofs have no call column for single-call functions
        #                  %time      cumesec   selfsec      {stuff}   name
        elsif ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$/) {
            my $pct=$1; my $sec=$2; my $calls=1; my $func=$3;
            $funcs{$func}{pct} += $pct;
            $funcs{$func}{sec} += $sec;
            $funcs{$func}{calls} += $calls;
        }
    }
    $fh->close;
@@ -80,10 +86,10 @@ sub profcfunc {
    my %pointer_mods;
    my %verilated_mods;
    foreach my $func (keys %funcs) {
-	if ($func =~ /(.*)::_eval\(([a-zA-Z_0-9]+__Syms).*\)$/) {
+        if ($func =~ /(.*)::_eval\(([a-zA-Z_0-9]+__Syms).*\)$/) {
-	    $verilated_mods{$1} = qr/^$1/;
+            $verilated_mods{$1} = qr/^$1/;
-	    $pointer_mods{$2} = $1;
+            $pointer_mods{$2} = $1;
-	}
+        }
    }
    #print Dumper(\%pointer_mods, \%verilated_mods);
@@ -91,72 +97,72 @@ sub profcfunc {
    my %vfuncs;
    my %groups;
    foreach my $func (keys %funcs) {
-	my $pct = $funcs{$func}{pct};
+        my $pct = $funcs{$func}{pct};
-	my $vfunc = $func;
+        my $vfunc = $func;
-	my $design;
+        my $design;
-	if ($func =~ /\(([a-zA-Z_0-9]+__Syms)/) {
+        if ($func =~ /\(([a-zA-Z_0-9]+__Syms)/) {
-	    $design = $pointer_mods{$1};
+            $design = $pointer_mods{$1};
-	}
+        }
-	foreach my $vde (keys %verilated_mods) {
+        foreach my $vde (keys %verilated_mods) {
-	    last if $design;
+            last if $design;
-	    if ($func =~ /$verilated_mods{$vde}/) {
+            if ($func =~ /$verilated_mods{$vde}/) {
-		$design=$vde;
+                $design=$vde;
-		last;
+                last;
-	    }
+            }
-	}
+        }
-	if ($vfunc =~ /__PROF__([a-zA-Z_0-9]+)__l?([0-9]+)\(/) {
+        if ($vfunc =~ /__PROF__([a-zA-Z_0-9]+)__l?([0-9]+)\(/) {
-	    $vfunc     = sprintf("VBlock    %s:%d", $1, $2);
+            $vfunc     = sprintf("VBlock    %s:%d", $1, $2);
-	    $groups{type}{"Verilog Blocks under $design"} += $pct;
+            $groups{type}{"Verilog Blocks under $design"} += $pct;
-	    $groups{design}{$design} += $pct;
+            $groups{design}{$design} += $pct;
-	    $groups{module}{$1} += $pct;
+            $groups{module}{$1} += $pct;
-	} else {
+        } else {
-	    if ($design) {
+            if ($design) {
-		$vfunc = sprintf("VCommon   %s", $func);
+                $vfunc = sprintf("VCommon   %s", $func);
-		$groups{type}{"Common code under $design"} += $pct;
+                $groups{type}{"Common code under $design"} += $pct;
-		$groups{design}{$design} += $pct;
+                $groups{design}{$design} += $pct;
-		$groups{module}{$design." common code"} += $pct;
+                $groups{module}{$design." common code"} += $pct;
-	    } elsif ($func =~ /^VL_[A-Z0-9_]+/
+            } elsif ($func =~ /^VL_[A-Z0-9_]+/
-		     || $func =~ /^_?vl_[a-zA-Z0-9_]+/
+                     || $func =~ /^_?vl_[a-zA-Z0-9_]+/
-		     || $func =~ /^verilated/i) {
+                     || $func =~ /^verilated/i) {
-		$vfunc = sprintf("VLib      %s", $func);
+                $vfunc = sprintf("VLib      %s", $func);
-		$groups{type}{'VLib'} += $pct;
+                $groups{type}{'VLib'} += $pct;
-		$groups{design}{'VLib'} += $pct;
+                $groups{design}{'VLib'} += $pct;
-		$groups{module}{'VLib'} += $pct;
+                $groups{module}{'VLib'} += $pct;
-	    } elsif ($func =~ /^_mcount_private/) {
+            } elsif ($func =~ /^_mcount_private/) {
-		$vfunc = sprintf("Prof      %s", $func);
+                $vfunc = sprintf("Prof      %s", $func);
-		$groups{type}{'Prof'} += $pct;
+                $groups{type}{'Prof'} += $pct;
-		$groups{design}{'Prof'} += $pct;
+                $groups{design}{'Prof'} += $pct;
-		$groups{module}{'Prof'} += $pct;
+                $groups{module}{'Prof'} += $pct;
-	    } else {
+            } else {
-		$vfunc = sprintf("C++       %s", $func);
+                $vfunc = sprintf("C++       %s", $func);
-		$groups{type}{'C++'} += $pct;
+                $groups{type}{'C++'} += $pct;
-		$groups{design}{'C++'} += $pct;
+                $groups{design}{'C++'} += $pct;
-		$groups{module}{'C++'} += $pct;
+                $groups{module}{'C++'} += $pct;
-	    }
+            }
-	}
+        }
-	$vfuncs{$vfunc} = $funcs{$func};
+        $vfuncs{$vfunc} = $funcs{$func};
    }
    foreach my $type (qw(type design module)) {
-	my $missing = 100;
+        my $missing = 100;
-	foreach (sort (keys %{$groups{$type}})) {
+        foreach (sort (keys %{$groups{$type}})) {
-	    $missing -= $groups{$type}{$_};
+            $missing -= $groups{$type}{$_};
-	}
+        }
-	if ($missing) {
+        if ($missing) {
-	    $groups{$type}{"\377Unaccounted for/rounding error"} = $missing;
+            $groups{$type}{"\377Unaccounted for/rounding error"} = $missing;
-	}
+        }
-	print("Overall summary by $type:\n");
+        print("Overall summary by $type:\n");
-	printf("  %-6s  %s\n","% time",$type);
+        printf("  %-6s  %s\n","% time",$type);
-	foreach my $what (sort (keys %{$groups{$type}})) {
+        foreach my $what (sort (keys %{$groups{$type}})) {
-	    (my $pwhat = $what) =~ s/^\377//;  # Just used to establish sort order
+            (my $pwhat = $what) =~ s/^\377//;  # Just used to establish sort order
-	    printf("  %6.2f  %s\n", $groups{$type}{$what}, $pwhat);
+            printf("  %6.2f  %s\n", $groups{$type}{$what}, $pwhat);
-	}
+        }
-	print("\n");
+        print("\n");
    }
    print("Verilog code profile:\n");
@@ -173,14 +179,14 @@ sub profcfunc {
    my $cume = 0;
    foreach my $func (sort {$vfuncs{$b}{sec} <=> $vfuncs{$a}{sec}
-			    || $a cmp $b}
+                            || $a cmp $b}
-		      (keys %vfuncs)) {
+                      (keys %vfuncs)) {
-	$cume += $vfuncs{$func}{sec};
+        $cume += $vfuncs{$func}{sec};
-	printf +("%6.2f %9.2f %8.2f %8d   %s\n",
+        printf +("%6.2f %9.2f %8.2f %8d   %s\n",
-		 $vfuncs{$func}{pct},
+                 $vfuncs{$func}{pct},
-		 $cume, $vfuncs{$func}{sec},
+                 $cume, $vfuncs{$func}{sec},
-		 $vfuncs{$func}{calls},
+                 $vfuncs{$func}{calls},
-		 $func);
+                 $func);
    }
 }
@@ -191,11 +197,11 @@ __END__
 =head1 NAME
-verilator_profcfunc - Read gprof report created with --profile-cfuncs
+verilator_profcfunc - Read gprof report created with --prof-cfuncs
 =head1 SYNOPSIS
-  verilator --profile-cfuncs ....
+  verilator --prof-cfuncs ....
  gcc --ggdb -pg ....
  {run executable}
  gprof
@@ -204,8 +210,8 @@ verilator_profcfunc - Read gprof report created with --profile-cfuncs
 =head1 DESCRIPTION
 Verilator_profcfunc reads a profile report created by gprof.  The names of
-the functions are then transformed, assuming the user used verilator's
+the functions are then transformed, assuming the user used Verilator's
--profile-cfuncs, and a report printed showing the percentage of time, etc,
+--prof-cfuncs, and a report printed showing the percentage of time, etc,
 in each Verilog block.
 =head1 ARGUMENTS
@@ -220,11 +226,14 @@ Displays this message and program version and exits.
 =head1 DISTRIBUTION
-The latest version is available from L<http://www.veripool.org/>.
+The latest version is available from L<https://verilator.org>.
-Copyright 2007-2018 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2007-2020 by Wilson Snyder. This program is free software; you
-redistribute it and/or modify it under the terms of either the GNU Lesser
+can redistribute it and/or modify it under the terms of either the GNU
-General Public License Version 3 or the Perl Artistic License Version 2.0.
+Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.
 SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 =head1 AUTHORS
@@ -0,0 +1,19 @@
 #!/bin/bash
 # DESCRIPTION: Verilator: Build script for vcddiff
 #
 # Copyright 2019 by Todd Strader. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 set -e
 # NB: it would be better to add this via a PPA
 TMP_DIR=$(mktemp -d)
 git -C "${TMP_DIR}" clone https://github.com/veripool/vcddiff
 VCDDIFF_DIR=${TMP_DIR}/vcddiff
 git -C "${VCDDIFF_DIR}" checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c
 make -C "${VCDDIFF_DIR}"
 sudo cp "${VCDDIFF_DIR}/vcddiff" /usr/local/bin
@@ -0,0 +1,65 @@
 #!/bin/bash
 # DESCRIPTION: Verilator: Travis CI build script
 #
 # Copyright 2019 by Todd Strader. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 # This script builds and caches the Verilator binaries for Travis CI
 # (and possibly other CI platforms).  The Verilator CI system uses this
 # script, but other CI systems that depend on Verilator may also use
 # the script.
 # see: https://github.com/verilator/verilator_ext_tests/blob/master/.travis.yml
 # To use this script, either checkout Verilator as part of the CI build
 # process or add Verilator as a Git submodule.  Verilator tarballs can
 # not be used as the script relies on Git revisions for caching.
 set -e
 if [ -z "${VERILATOR_NUM_JOBS}" ]; then
    VERILATOR_NUM_JOBS=$(nproc)
 fi
 # Caching would be simpler if we installed without VERILATOR_ROOT, but
 #   it's needed for driver.pl outside of the repo
 if [ -z "${VERILATOR_ROOT}" ]; then
    echo "VERILATOR_ROOT not set"
    exit -1
 fi
 if [ -z "${VERILATOR_CACHE}" ]; then
    echo "VERILATOR_CACHE not set"
    exit -1
 fi
 VERILATOR_REV=$(cd "${VERILATOR_ROOT}" && git rev-parse HEAD)
 echo "Found Verilator rev ${VERILATOR_REV}"
 CACHED_REV_FILE=${VERILATOR_CACHE}/.rev.txt
 if [[ ! -f "${CACHED_REV_FILE}" || \
      $(< "${CACHED_REV_FILE}") != "${VERILATOR_REV}" ]]; then
    echo "Building Verilator"
    # Unsure why Travis monkies with the capitalization of the stage name, but it does
    if [[ -n ${TRAVIS_BUILD_STAGE_NAME} && \
         ${TRAVIS_BUILD_STAGE_NAME} != "Build verilator" ]]; then
      echo "WARNING: Building Verilator in Travis build stage other than \"Build verilator\": ${TRAVIS_BUILD_STAGE_NAME}"
    fi
    cd "${VERILATOR_ROOT}"
    autoconf && ./configure ${VERILATOR_CONFIG_FLAGS} && make -j ${VERILATOR_NUM_JOBS}
    # Copy the Verilator build artifacts
    mkdir -p "${VERILATOR_CACHE}"
    rm -rf ${VERILATOR_CACHE}/*
    cp bin/*bin* "${VERILATOR_CACHE}"
    # Remember the Git revision
    echo "${VERILATOR_REV}" > "${CACHED_REV_FILE}"
 else
    echo "Using cached Verilator"
    cd "${VERILATOR_ROOT}"
    # Create include/verilated_config.h and maybe other things
    autoconf && ./configure ${VERILATOR_CONFIG_FLAGS}
    cp ${VERILATOR_CACHE}/* bin
 fi
@@ -0,0 +1,58 @@
 # DESCRIPTION: Dockerfile for env to build and fully test Verilator
 #
 # Copyright 2020 by Stefan Wallentowitz. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 FROM ubuntu:18.04
 RUN apt-get update \
    && DEBIAN_FRONTEND=noninteractive \
       apt-get install --no-install-recommends -y \
                        autoconf=2.69-11 \
                        bc=1.07.1-2 \
                        bison=2:3.0.4.dfsg-1build1 \
                        build-essential=12.4ubuntu1 \
                        ca-certificates=20180409 \
                        cmake=3.10.2-1ubuntu2.18.04.1 \
                        flex=2.6.4-6 \
                        gdb=8.1-0ubuntu3.2 \
                        gcc-6=6.5.0-2ubuntu1~18.04 \
                        gcc-5=5.5.0-12ubuntu1 \
                        gcc-4.8=4.8.5-4ubuntu8 \
                        git=1:2.17.1-1ubuntu0.5 \
                        gtkwave=3.3.86-1 \
                        g++-6=6.5.0-2ubuntu1~18.04 \
                        g++-5=5.5.0-12ubuntu1 \
                        g++-4.8=4.8.5-4ubuntu8 \
                        libfl2=2.6.4-6 \
                        libfl-dev=2.6.4-6 \
                        numactl=2.0.11-2.1ubuntu0.1 \
                        perl=5.26.1-6ubuntu0.3 \
                        python3=3.6.7-1~18.04 \
                        wget=1.19.4-1ubuntu2.2 \
                        zlibc=0.9k-4.3 \
                        zlib1g=1:1.2.11.dfsg-0ubuntu2 \
                        zlib1g-dev=1:1.2.11.dfsg-0ubuntu2 \
    && apt-get clean \
    && rm -rf /var/lib/apt/lists/*
 WORKDIR /tmp
 COPY build-systemc.sh /tmp/
 RUN ./build-systemc.sh
 RUN cpan install -fi Unix::Processors Parallel::Forker Bit::Vector
 RUN git clone https://github.com/veripool/vcddiff.git && \
    make -C vcddiff && \
    cp -p vcddiff/vcddiff /usr/local/bin/vcddiff && \
    rm -rf vcddiff
 COPY build.sh /tmp/build.sh
 ENV VERILATOR_AUTHOR_SITE=1
 ENTRYPOINT [ "/tmp/build.sh" ]
@@ -0,0 +1,49 @@
 = Verilator Docker Build Environment
 This Verilator Build container is set up to compile and test a Verilator
 build. It uses the following parameters:
 * Source repository (default: https://github.com/verilator/verilator)
 * Source revision (default: master)
 * GCC version (4.8.5, 5.5.0, 6.5.0, 7.4.0, default: 7.4.0)
 The container is published as `verilator/verilator-buildenv` on
 https://hub.docker.com/repository/docker/verilator/verilator-buildenv[docker hub].
 To run the basic build using the current Verilator master:
    docker run -ti verilator/verilator-buildenv
 To also run tests:
    docker run -ti verilator/verilator-buildenv test
 To change the compiler:
    docker run -ti -e CC=gcc-4.8 -e CXX=g++-4.8 verilator/verilator-buildenv test
 The tests that involve gdb are not working due to security restrictions.
 To run those too:
 ....
 docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` -e CC=gcc-4.8 -e CXX=g++-4.8 --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
 ....
 Rather then building using a remote git repository you may prefer to use a
 working copy on the local filesystem. Mount the local working copy path as
 a volume and use that in place of git. When doing this be careful to have
 all changes committed to the local git area. To build the current HEAD from
 top of a repository:
 ....
 docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
 ....
 == Rebuilding
 To rebuild the Verilator-buildenv docker image, run:
    docker build .
 This will also build SystemC under all supported compiler variants to
 reduce the SystemC testing time.
@@ -0,0 +1,30 @@
 #!/bin/bash -e
 # DESCRIPTION: Build SystemC in Ubuntu 18.04 with  different g++/gcc
 #
 # Copyright 2020 by Stefan Wallentowitz. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 build_variant () {
    version=$($1 --version | grep gcc | awk '{print $4}')
    mkdir "/usr/local/systemc-2.3.3-gcc$version"
    mkdir build
    cd build
    ../configure --prefix="/usr/local/systemc-2.3.3-gcc$version" CC="$1" CXX="$2" LD="$2"
    make -j
    make install
    cd ..
    rm -r build
 }
 wget https://www.accellera.org/images/downloads/standards/systemc/systemc-2.3.3.tar.gz
 tar -xzf systemc-2.3.3.tar.gz
 cd systemc-2.3.3
 build_variant gcc g++
 build_variant gcc-6 g++-6
 build_variant gcc-5 g++-5
 build_variant gcc-4.8 g++-4.8
 cd ..
 rm -r systemc-2.3.3*
@@ -0,0 +1,31 @@
 #!/bin/bash -e
 # DESCRIPTION: Build Verilator (inside container)
 #
 # Copyright 2020 by Stefan Wallentowitz. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 : "${REPO:=https://github.com/verilator/verilator}"
 : "${REV:=master}"
 : "${CC:=gcc}"
 : "${CXX:=g++}"
 GCCVERSION=$(${CC} --version | grep gcc | awk '{print $4}')
 export SYSTEMC_INCLUDE="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/include"
 export SYSTEMC_LIBDIR="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/lib-linux64"
 export LD_LIBRARY_PATH=${SYSTEMC_LIBDIR}
 SRCS=$PWD/verilator
 git clone "$REPO" "$SRCS"
 cd "$SRCS"
 git checkout "$REV"
 autoconf
 ./configure --enable-longtests
 make -j $(nproc)
 if [ "${1:-''}" == "test" ]; then
    make test
 fi
@@ -0,0 +1,48 @@
 # DESCRIPTION: Dockerfile for image to run Verilator inside
 #
 # Copyright 2020 by Stefan Wallentowitz. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 FROM ubuntu:18.04
 RUN apt-get update \
    && apt-get install --no-install-recommends -y \
                        autoconf=2.69-11 \
                        bc=1.07.1-2 \
                        bison=2:3.0.4.dfsg-1build1 \
                        build-essential=12.4ubuntu1 \
                        ca-certificates=20180409 \
                        flex=2.6.4-6 \
                        git=1:2.17.1-1ubuntu0.5 \
                        libfl-dev=2.6.4-6 \
                        perl=5.26.1-6ubuntu0.3 \
                        python3=3.6.7-1~18.04 \
    && apt-get clean \
    && rm -rf /var/lib/apt/lists/*
 ARG REPO=https://github.com/verilator/verilator
 ARG SOURCE_COMMIT=master
 WORKDIR /tmp
 # Add an exception for the linter, we want to cd here in one layer
 # to reduce the number of layers (and thereby size).
 # hadolint ignore=DL3003
 RUN git clone "${REPO}" verilator && \
    cd verilator && \
    git checkout "${SOURCE_COMMIT}" && \
    autoconf && \
    ./configure && \
    make -j "$(nproc)" && \
    make install && \
    cd .. && \
    rm -r verilator
 COPY verilator-wrap.sh /usr/local/bin/verilator-wrap.sh
 WORKDIR /work
 ENTRYPOINT [ "/usr/local/bin/verilator-wrap.sh" ]
@@ -0,0 +1,59 @@
 = Verilator Executable Docker Container
 The Verilator Executable Docker Container allows you to run Verilator
 easily as a docker image, e.g.:
    docker run -ti verilator/verilator:latest --version
 This will install the container, run the latest Verilator and print
 Verilator's version.
 Containers are automatically built for all released versions, so you may
 easily compare results across versions, e.g.:
    docker run -ti verilator/verilator:4.030 --version
 Verilator needs to read and write files on the local system.  To simplify
 this process, use the `verilator-docker` convenience script.  This script
 takes the version number, and all remaining arguments are passed through to
 Verilator. e.g.:
    ./verilator-docker 4.030 --version
 or
    ./verilator-docker 4.030 --cc test.v
 If you prefer not to use `verilator-docker` you must give the container
 access to your files as a volume with appropriate user rights.  For example
 to Verilate test.v:
 ....
 docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:latest --cc test.v
 ....
 This method can only access files below the current directory. An
 alternative is setup the volume `-workdir`.
 You can also work in the container by setting the entrypoint
 (don't forget to mount a volume if you want your work persistent):
    docker run -ti --entrypoint /bin/bash verilator/verilator:latest
 You can also use the container to build Verilator at a specific
 commit:
    docker build --build-arg SOURCE_COMMIT=<commit> .
 == Internals
 The Dockerfile builds Verilator and removes the tree when completed to
 reduce the image size. The entrypoint is set as a wrapper script
 (`verilator-wrap.sh`).  That script 1. calls Verilator, and 2. copies the
 Verilated runtime files to the `obj_dir` or the `-Mdir` respectively. This
 allows the user to have the files to they may later build the C++ output
 with the matching runtime files. The wrapper also patches the Verilated
 Makefile accordingly.
 There is also a hook defined that is run by docker hub via automated
 builds.
@@ -0,0 +1,10 @@
 #!/bin/bash
 # DESCRIPTION: Docker hub hook to pass SOURCE_COMMIT
 #
 # Copyright 2020 by Stefan Wallentowitz. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 docker build --build-arg SOURCE_COMMIT=${SOURCE_COMMIT} -f $DOCKERFILE_PATH -t $IMAGE_NAME .
@@ -0,0 +1,13 @@
 #!/bin/bash
 # DESCRIPTION: Docker hub hook to tag the latest release (stable)
 #
 # Copyright 2020 by Stefan Wallentowitz. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 if [ "$SOURCE_BRANCH"="stable" ]; then
    docker tag $IMAGE_NAME $DOCKER_REPO:latest
    docker push $DOCKER_REPO:latest
 fi
@@ -0,0 +1,11 @@
 #!/bin/bash
 # DESCRIPTION: Wrap a verilator call to run a docker container
 #
 # Copyright 2020 by Stefan Wallentowitz. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 docker pull verilator/verilator:$1 >/dev/null
 docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:$1 "${@:2}"
@@ -0,0 +1,31 @@
 #!/bin/bash
 # DESCRIPTION: Wrap a Verilator call and copy vlt includes
 #              (inside docker container)
 #
 # Copyright 2020 by Stefan Wallentowitz. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 perl /usr/local/bin/verilator "$@"
 status=$?
 if [ $status -ne 0 ]; then
    exit $status
 fi
 # Check if user set an obj_dir
 obj_dir=$(echo " $@" | grep -oP '\s--Mdir\s*\K\S+')
 if [ "$obj_dir" == "" ]; then
    obj_dir="obj_dir"
 fi
 # If the run was successful: Copy required files to allow build without this container
 if [ -e ${obj_dir} ]; then
    # Copy files required for the build
    mkdir -p ${obj_dir}/vlt
    cp -r /usr/local/share/verilator/bin ${obj_dir}/vlt
    cp -r /usr/local/share/verilator/include ${obj_dir}/vlt
    # Point Makefile to that folder
    perl -i -pe 's/VERILATOR_ROOT = \/usr\/local\/share\/verilator/VERILATOR_ROOT = vlt/g' ${obj_dir}/*.mk
 fi
@@ -0,0 +1,34 @@
 #!/bin/bash
 # DESCRIPTION: Verilator: Travis CI test script
 #
 # Copyright 2019 by Todd Strader. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 set -e
 export DRIVER_FLAGS='-j 0 --quiet --rerun'
 case $1 in
    dist)
        make -C test_regress SCENARIOS=--dist
        ;;
    vlt)
        make -C test_regress SCENARIOS=--vlt
        ;;
    vltmt)
        make -C test_regress SCENARIOS=--vltmt
        ;;
    vltmt0)
        make -C test_regress SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=0/2
        ;;
    vltmt1)
        make -C test_regress SCENARIOS=--vltmt DRIVER_HASHSET=--hashset=1/2
        ;;
    *)
    echo "Usage: test.sh (dist|vlt|vltmt)"
    exit -1
    ;;
 esac
@@ -1,25 +1,68 @@
 # DESCRIPTION: Process this file with autoconf to produce a configure script.
 #
-# Copyright 2003-2018 by Wilson Snyder. Verilator is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you
-# redistribute it and/or modify it under the terms of either the GNU Lesser
+# can redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[3.918 2018-01-02])
+AC_INIT([Verilator],[4.032 2020-04-04],
        [https://verilator.org],
        [verilator],[https://verilator.org])
 # When releasing, also update header of Changes file
 # and commit using "devel release" or "Version bump" message
 AC_CONFIG_HEADER(src/config_build.h)
-AC_CONFIG_FILES(Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc)
+AC_CONFIG_FILES(Makefile docs/Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc verilator-config.cmake verilator-config-version.cmake)
 AC_MSG_RESULT([configuring for $PACKAGE_STRING])
 # Ignore automake flags passed by Ubuntu builds
 AC_ARG_ENABLE([dependency-tracking],
              [AS_HELP_STRING([--disable-dependency-tracking], [ignored])])
 AC_ARG_ENABLE([maintainer-mode],
              [AS_HELP_STRING([--enable-maintainer-mode], [ignored])])
 AC_ARG_ENABLE([silent-rules],
              [AS_HELP_STRING([--disable-silent-rules], [ignored])])
 # Flag to enable linking specific libraries statically
 AC_MSG_CHECKING(whether to perform partial static linking of Verilator binary)
 AC_ARG_ENABLE([partial-static],
              [AS_HELP_STRING([--disable-partial-static],
                              [By default, for Verilation peformance, Verilator
                               is linked against some of its dependencies
                               statically. Use this to link the Verilator binary
                               fully dynamically.])],
              [case "${enableval}" in
                yes) CFG_ENABLE_PARTIAL_STATIC=yes ;;
                no)  CFG_ENABLE_PARTIAL_STATIC=no ;;
                *)   AC_MSG_ERROR([bad value '${enableval}' for --disable-partial-static]) ;;
               esac],
               CFG_ENABLE_PARTIAL_STATIC=yes)
 AC_MSG_RESULT($CFG_ENABLE_PARTIAL_STATIC)
 # Flag to enable linking Verilator with tcmalloc if available
 AC_MSG_CHECKING(whether to use tcmalloc)
 AC_ARG_ENABLE([tcmalloc],
              [AS_HELP_STRING([--enable-tcmalloc],
                              [Use libtcmalloc_minimal for faster dynamic memory
                               management in Verilator binary@<:@default=check@:>@])],
              [case "${enableval}" in
                yes) CFG_WITH_TCMALLOC=yes ;;
                no)  CFG_WITH_TCMALLOC=no ;;
                *)   AC_MSG_ERROR([bad value '${enableval}' for --enable-tcmalloc]) ;;
               esac],
              [CFG_WITH_TCMALLOC=check;])
 AC_MSG_RESULT($CFG_WITH_TCMALLOC)
 # Special Substitutions - CFG_WITH_DEFENV
 AC_MSG_CHECKING(whether to use hardcoded paths)
 AC_ARG_ENABLE([defenv],
              [AS_HELP_STRING([--disable-defenv],
-                              [disable using some hardcoded data paths extracted from some default environment variables (the default is to use hardcoded paths)])],
+                              [disable using some hardcoded data paths extracted
                              from some default environment variables (the default
                              is to use hardcoded paths) in Verilator binary])],
              [case "${enableval}" in
                yes) CFG_WITH_DEFENV=yes ;;
                no)  CFG_WITH_DEFENV=no ;;
@@ -33,7 +76,8 @@ AC_MSG_RESULT($CFG_WITH_DEFENV)
 AC_MSG_CHECKING(whether to show and stop on compilation warnings)
 AC_ARG_ENABLE([ccwarn],
              [AS_HELP_STRING([--enable-ccwarn],
-                              [enable showing and stopping on compilation warnings])],
+                              [enable showing and stopping on compilation warnings
                               in Verilator binrary and Verilated makefiles])],
              [case "${enableval}" in
                yes) CFG_WITH_CCWARN=yes ;;
                no)  CFG_WITH_CCWARN=no ;;
@@ -65,11 +109,27 @@ AC_ARG_ENABLE([longtests],
 AC_SUBST(CFG_WITH_LONGTESTS)
 AC_MSG_RESULT($CFG_WITH_LONGTESTS)
 # CFG_WITH_PREC11
 AC_MSG_CHECKING(whether allow pre-C++11)
 AC_ARG_ENABLE([prec11],
              [AS_HELP_STRING([--enable-prec11],
                              [enable pre-C++11 compilers for Verilator binary
                               and Verilated makefiles])],
              [case "${enableval}" in
                yes) CFG_WITH_PREC11=yes ;;
                no)  CFG_WITH_PREC11=no ;;
                *)   AC_MSG_ERROR([bad value ${enableval} for --enable-prec11]) ;;
               esac],
              [CFG_WITH_PREC11=no;]
              )
 AC_SUBST(CFG_WITH_PREC11)
 AC_MSG_RESULT($CFG_WITH_PREC11)
 # Compiler flags
-CFLAGS=-I${includedir}
+CFLAGS+=" -I${includedir}"
-CPPFLAGS=-I${includedir}
+CPPFLAGS+=" -I${includedir}"
-CXXFLAGS=-I${includedir}
+CXXFLAGS+=" -I${includedir}"
-LDFLAGS=-L${libdir}
+LDFLAGS+=" -L${libdir}"
 # Checks for programs.
 AC_PROG_CC
@@ -77,6 +137,8 @@ AC_PROG_CXX
 AC_PROG_INSTALL
 AC_LANG_PUSH(C++)
 cxx_version=$($CXX --version | head -1)
 AC_MSG_RESULT([compiler is $CXX --version = $cxx_version])
 AC_MSG_CHECKING([that C++ compiler can compile simple program])
 AC_RUN_IFELSE(
   [AC_LANG_SOURCE([int main() { return 0; }])],
@@ -163,26 +225,69 @@ AC_DEFUN([_MY_CXX_CHECK_OPT],
    fi
   ])
 AC_DEFUN([_MY_LDLIBS_CHECK_FLAG],
   [# _MY_LDLIBS_CHECK_FLAG(flag) -- Check if linker supports specific options
    # Set $_my_result appropriately
    ACO_SAVE_LIBS="$LIBS"
    LIBS="$LIBS $1"
    AC_MSG_CHECKING([whether $CXX linker accepts $1])
    AC_LINK_IFELSE(
         [AC_LANG_PROGRAM([[]])],
         [_my_result=yes
          if test -s conftest.err; then
            if grep -e "$1" conftest.err >/dev/null; then
              _my_result=no
            fi
          fi],
         [_my_result=no])
    AC_MSG_RESULT($_my_result)
    LIBS="$ACO_SAVE_LIBS"
   ])
 AC_DEFUN([_MY_LDLIBS_CHECK_IFELSE],
   [# _MY_LDLIBS_CHECK_IFELSE(flag,action-if-supported,action-if-not-supported)
    # Check if linker supports specific flag, if it does do action-if-supported
    # otherwise do action-if-not-supported
    _MY_LDLIBS_CHECK_FLAG($1)
    if test "$_my_result" = "yes" ; then
      true
      $2
    else
      true
      $3
    fi
   ])
 AC_DEFUN([_MY_LDLIBS_CHECK_OPT],
   [# _MY_LDLIBS_CHECK_OPT(variable, flag) -- Check if linker supports specific
    # options. If it does, append flag to variable.
    _MY_LDLIBS_CHECK_IFELSE($2, $1="$$1 $2")
   ])
 # Flag to select newest language standard supported
 # Macros work such that first option that passes is the one we take
 # gnu++17 code is clean, but SystemC in 2018 doesn't link with it (bug1339)
 # gnu++14 is the newest that Verilator supports
 # std++03 is the oldest that Verilator supports
 #_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++14)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++11)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++03)
 #_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++14)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++11)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++03)
 AC_SUBST(CFG_CXXFLAGS_STD_NEWEST)
 # And likewise oldest standard (same list above, backwards)
 # This is used for internal testing
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=std++03)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=c++03)
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=std++11)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=c++11)
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=std++14)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=c++14)
 #_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=std++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++03)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++11)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++14)
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++17)
+#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++17)
 AC_SUBST(CFG_CXXFLAGS_STD_OLDEST)
 # Flags for compiling Verilator internals including parser, and Verilated files
@@ -196,9 +301,7 @@ AC_SUBST(CFG_CXXFLAGS_WEXTRA)
 # Flags for compiling Verilator internals including parser always
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Qunused-arguments)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-faligned-new)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-delete-null-pointer-checks)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-unused-parameter)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-undefined-bool-conversion)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-shadow)
 AC_SUBST(CFG_CXXFLAGS_SRC)
@@ -215,17 +318,80 @@ AC_SUBST(CFG_CXXFLAGS_PARSER)
 # without this flag, even though there's a conditional to prevent the divide.
 # We still don't add no-div-by-zero as it throws message to stdout, though doesn't die.
 #_MY_CXX_CHECK_OPT(-Wno-div-by-zero)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-faligned-new)
+# For some reason -faligned-new does not work under Travis w/ clang but the
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-fbracket-depth=4096)
+# configure test doesn't catch this either
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Qunused-arguments)
+AS_IF([test "x$TRAVIS_COMPILER" != xclang], [_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-faligned-new)])
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-parentheses-equality)
+CFG_CXX_FLAGS_CMAKE="-faligned-new"
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-sign-compare)
+m4_foreach([cflag],[
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-uninitialized)
+        [-fbracket-depth=4096],
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-but-set-variable)
+        [-fcf-protection=none],
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-parameter)
+        [-mno-cet],
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-variable)
+        [-Qunused-arguments],
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-shadow)
+        [-Wno-bool-operation],
        [-Wno-parentheses-equality],
        [-Wno-sign-compare],
        [-Wno-uninitialized],
        [-Wno-unused-but-set-variable],
        [-Wno-unused-parameter],
        [-Wno-unused-variable],
        [-Wno-shadow]],[
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,cflag)
    # CMake will test what flags work itself, so pass all flags through to it
    CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE cflag"
    ])
 AC_SUBST(CFG_CXXFLAGS_NO_UNUSED)
 AC_SUBST(CFG_CXX_FLAGS_CMAKE)
 # Find multithread linker flags
 m4_foreach([ldflag], [
        [-mt],
        [-pthread],
        [-lpthread],
        [-latomic]],[
    _MY_LDLIBS_CHECK_OPT(CFG_LDLIBS_THREADS,ldflag)
    # CMake will test what flags work itself, so pass all flags through to it
    CFG_LDFLAGS_THREADS_CMAKE="$CFG_LDFLAGS_THREADS_CMAKE ldflag"
    ])
 AC_SUBST(CFG_LDLIBS_THREADS)
 AC_SUBST(CFG_LDFLAGS_THREADS_CMAKE)
 # When linking partially statically
 if test "$CFG_ENABLE_PARTIAL_STATIC" = "yes"; then
  _MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_SRC, -static-libgcc)
  _MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_SRC, -static-libstdc++)
  _MY_LDLIBS_CHECK_OPT(CFG_LDFLAGS_SRC, -Xlinker -gc-sections)
  LTCMALLOC=-l:libtcmalloc_minimal.a
 else
  LTCMALLOC=-ltcmalloc_minimal
 fi
 AC_SUBST(CFG_LDFLAGS_SRC)
 # The pthread library is required by tcmalloc, so add it if it exists. If it
 # does not, the tcmalloc check below will fail anyway, and linking against
 # pthreads is harmless otherwise.
 CFG_LIBS="$LIBS $CFG_LIBS"
 _MY_LDLIBS_CHECK_OPT(CFG_LIBS, -lpthread)
 # Check libraries for MingW
 _MY_LDLIBS_CHECK_OPT(CFG_LIBS, -lbcrypt)
 _MY_LDLIBS_CHECK_OPT(CFG_LIBS, -lpsapi)
 # Check if tcmalloc is available based on --enable-tcmalloc
 _MY_LDLIBS_CHECK_IFELSE(
  $LTCMALLOC,
  [if test "$CFG_WITH_TCMALLOC" != "no"; then
    CFG_LIBS="$LTCMALLOC $CFG_LIBS";
    # If using tcmalloc, add some extra options to make the compiler not assume
    # it is using it's own versions of the standard library functions
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-malloc)
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-calloc)
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-realloc)
    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-builtin-free)
   fi],
  [if test "$CFG_WITH_TCMALLOC" = "yes"; then
    AC_MSG_ERROR([--enable-tcmalloc was given but test for ${LTCMALLOC} failed])
   fi])
 AC_SUBST(CFG_LIBS)
 # Set CFG_WITH_THREADED if can support threading
 AC_MSG_CHECKING(whether $CXX supports Verilated threads)
@@ -244,6 +410,22 @@ CFG_WITH_THREADED=$_my_result
 AC_SUBST(CFG_WITH_THREADED)
 AC_MSG_RESULT($CFG_WITH_THREADED)
 # Check compiler flag
 if test "$CFG_WITH_THREADED" = "no" ; then
   if test "$CFG_WITH_PREC11" = "no" ; then
      AC_MSG_NOTICE([[]])
      AC_MSG_ERROR([[the $CXX compiler appears to not support C++11.
 Verilator plans to require a C++11 or newer compiler in a future release,
 unless sufficient people report problems. Therefore, if you do not have a
 C++11 compiler, please post a message to
 https://www.veripool.org/boards/3/topics/2580-Verilator-Requiring-C-11-compiler
 indicating your OS and when you think C++11 might be ok, and then rerun
 configure with the --enable-prec11 argument. Thanks.]])
   fi
 fi
 # Checks for library functions.
 AC_CHECK_MEMBER([struct stat.st_mtim.tv_nsec],
    [AC_DEFINE([HAVE_STAT_NSEC],[1],[Defined if struct stat has st_mtim.tv_nsec])],
@@ -0,0 +1,4 @@
 *.1
 *.html
 *.pdf
 Makefile
@@ -0,0 +1,82 @@
 = How to contribute to Verilator
 Thanks for using Verilator!  We welcome your contributions in whatever form.
 This contributing document contains some suggestions that may make
 contributions flow more efficiently.
 ==== Did you find a bug?
 * Please **Ensure the bug was not already reported** by searching
  https://verilator.org/issues[Verilator Issues].
 * If you're unable to find an open issue addressing the problem,
  https://verilator.org/issues/new[open a new Verilator issue].
 ** Be sure to include a **code sample** or an **executable test case**
   demonstrating the bug and expected behavior that is not occurring.
 ** The ideal example works against other simulators, and is in the
   test_regress/t test format, as described in
   link:internals.adoc[docs/internals].
 ==== Did you write a patch that fixes a bug?
 * Please https://verilator.org/issues/new[Open a new issue].
 * You may attach a patch to the issue, or (preferred) may request a GitHub
  pull request.
 ** Verilator uses Travis CI to provide continuous integration. You may
   want to setup Travis CI on your GitHub branch to ensure your changes
   keep the tests passing.  See link:internals.adoc[docs/internals].
 * Your source-code contributions must be certified as open source, under
  the https://developercertificate.org/[Developer Certificate of
  Origin]. On your first contribution, you must either:
 ** Have your patch include the addition of your name to
   link:CONTRIBUTORS[docs/CONTRIBUTORS] (preferred).
 ** Use "git -s" as part of your commit. This adds a "signed-of-by"
   attribute which will certify your contribution as described in the
   https://github.com/wking/signed-off-by/blob/master/Documentation/SubmittingPatches[Signed-of-By
   convention].
 ** Email, or post in an issue a statement that you certify your
   contributions.
 ** In any of these cases your name will be added to
   link:CONTRIBUTORS[docs/CONTRIBUTORS] and you are agreeing all future
   contributions are also certified.
 ** We occasionally accept contributions where people do not want their name
   published. Please email us; you must still privately certify your
   contribution.
 * Your test contributions are generally considered released into the
  Creative Commons Public Domain (CC0), unless you request otherwise or put
  a GNU/Artistic license on your file.
 * Most important is we get your patch. If you'd like to clean up
  indentation and related issues ahead of our feedback, that is
  appreciated; please see the coding conventions in
  link:internals.adoc[docs/internals].
 ==== Do you have questions?
 * Please see FAQ section and rest of the
  https://verilator.org/verilator_doc.html[Verilator manual],
  or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
 * Ask any question in the
  https://verilator.org/forum[Verilator forum].
 ==== Code of Conduct
 * Our contributors and participants pledge to make participation in our
  project and our community a positive experience for everyone.  We follow
  the https://www.contributor-covenant.org/version/1/4/code-of-conduct.html[Contributor
  Covenant version 1.4].
 Thanks!
@@ -0,0 +1,44 @@
 The contributors listed below have certified their Verilator contributions
 under the Developer Certificate of Origin
 (https://developercertificate.org/).
 Please see the Verilator manual for 200+ additional contributors. Thanks to
 all.
 Ahmed El-Mahmoudy
 Alex Chadwick
 Chris Randall
 David Stanford
 Driss Hafdi
 Eric Rippey
 Garrett Smith
 Geza Lore
 Gianfranco Costamagna
 Howard Su
 Iztok Jeras
 Jeremy Bennett
 John Coiner
 Julien Margetts
 Kanad Kanhere
 Kevin Kiningham
 Kuba Ober
 Lukasz Dalek
 Maarten De Braekeleer
 Maciej Sobkowski
 Marco Widmer
 Matthew Ballance
 Mike Popoloski
 Patrick Stewart
 Peter Monsson
 Philipp Wagner
 Pieter Kapsenberg
 Richard Myers
 Sean Cross
 Sebastien Van Cauwenberghe
 Stefan Wallentowitz
 Tobias Rosenkranz
 Tobias Wölfel
 Todd Strader
 Wilson Snyder
 Yutetsu TAKATSUKASA
 Yves Mathieu
@@ -0,0 +1,50 @@
 #*****************************************************************************
 # DESCRIPTION: Verilator documentation: Makefile pre-configure version
 #
 # This file is part of Verilator.
 #
 # Code available from: https://verilator.org
 #
 #*****************************************************************************
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 #****************************************************************************/
 #
 # This file is intended only to be called from the top-level Verilator Makefile.
 #### Start of system configuration section. ####
 ASCIIDOCTOR = asciidoctor
 DOXYGEN = doxygen
 #### End of system configuration section. ####
 ######################################################################
 .SUFFIXES:
 default:
 	@echo "error: make not supported here, run 'make docs' from Verilator top-level"
 %.html: %.adoc
 	$(ASCIIDOCTOR) $< -n -o $@
 clean mostlyclean distclean maintainer-clean::
 	rm -f $(SCRIPTS) *.tmp
 	rm -f *.aux *.cp *.cps *.dvi *.fn *.fns *.ky *.kys *.log
 	rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs *.idx
 	rm -f *.ev *.evs *.ov *.ovs *.cv *.cvs *.ma *.mas
 	rm -f *.tex
 distclean maintainer-clean::
 	rm -f *.info* *.1 *.html *.pdf $(INFOS)
 	rm -f Makefile
 .PHONY: doxygen
 doxygen:
 	$(DOXYGEN) doxygen.config
@@ -0,0 +1,113 @@
 // DESCRIPTION: Verilator: List of To Do issues.
 //
 // Copyright 2004-2020 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
 // SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 * Language support:
 ** Fix ordering of each bit separately in a signal (mips)
   assign b[3:0] = b[7:4];  assign b[7:4] = in;
 ** Support UDP gate primitives/ cell libraries
   (have code for combos - problem is sequential udps)
 ** Function to eval combo logic after /*verilator public*/ functions [gwaters]
 ** Support generated clocks (correctness)
 ** Recursive functions
 ** Verilog configuration files
 ** Expression coverage (see notes)
 ** Better tristate support
 ** UVM
 * Long-term Features
 ** Assertions
 ** Tristate support
 * Testing:
 ** Code to make wrapper that sets signals, so can do comparison checks
 ** New random program generator
 ** Better graph viewer with search and zoom
 * Usability:
 ** Detect and pre-remove most UNOPTFLATs
 ** Better reporting of unopt problems, including what lines of code
 ** Report more errors (all of them?) before exiting [Eugene Weber]
 ** Auto-create scons config files
 ** Print version/etc message at runtime. (4.000?)
   Include number of lines of code, percent comments, code complexity measurement
   <-80chars------------------------------------------------------------------->
   Verilator 3.600 - The fast free open-sourced simulator.  Copyright 2001-2013.
   Verilated #### modules, #### instances, ##### sigs,
         #### non-comment lines, ##### ops, ### KB model size
 * Lint:
 ** CDCRSTLOGIC should allow filtering with paths
   "waive CDCRSTLOGIC --from a.b.sig  --to a.c.sig --via OR"
 * Internal Code:
 ** A Visitor class that understands how to traverse data types
 ** V3Graph should be templated container type, taking in Vertex + Edge types
 ** Instead of string, have an VEncodedString/VIdString which contains __DOT__ish
   things, to reduce bugs.  Also add _20 trailing space to \ encoded names.
 * Runtime:
 ** New evalulation loop   ~/src/verilator/notes/event_loop.txt (4.000?)
 ** Remove all private internal functions from top level wrapper header, move
   to new level
 ** Completely standalone simulation
    main() records arguments for $test$plusvars
    instantiates top,
    does tracing  (support $dump?)
    calls top->simulateForever()
    exits
 * Performance:
 ** Latch optimizations
 ** Constant propagation
   Extra cleaning AND:  1 & ((VARREF >> 1) | ((&VARREF >> 1) & VARREF))
   Extra shift (perhaps due to clean): if (1 & CAST (VARREF >> #))
 ** Gated clock and latch conversion to flops.  [JeanPaul Vanitegem]
   Could propagate the AND into pos/negedges and let domaining optimize.
 ** Negedge reset
   Switch to remove negedges that don't matter
   Can't remove async resets from control flops (like in syncronizers)
 ** If all references to array have a constant index, blow up into separate signals-per-index
 ** Bit-multiply for faster bit swapping and a=b[1,3,2] random bit reorderings.
 ** Move _last sets and all other combo logic inside master
   if() that triggers on all possible sense items
 ** Rewrite and combine V3Life, V3Subst
   If block temp only ever set in one place to constant, propagate it
     Used in t_mem for array delayed assignments
   Replace variables if set later in same cfunc branch
     See for example duplicate sets of _narrow in cycle 90/91 of t_select_plusloop
 ** Same assignment on both if branches
   "if (a) { ... b=2; } else { ... b=2;}" -> "b=2; if ..."
   Careful though, as b could appear in the statement or multiple times in statement
   (Could just require exatly two 'b's in statement)
 ** Simplify XOR/XNOR/AND/OR bit selection trees
   Foo = A[1] ^ A[2] ^ A[3] etc are better as ^ ( A & 32'b...1110 )
 ** Combine variables into wider elements
   Parallel statements on different bits should become single signal
   Variables that are always consumed in "parallel" can be joined
 ** Duplicate assignments in gate optimization
   Common to have many separate posedge blocks, each with identical
   reset_r <= rst_in
 ** If signal is used only once (not counting trace), always gate substitute
   Don't merge if any combining would form circ logic (out goes back to in)
 ** Multiple assignments each bit can become single assign with concat
   Make sure a SEL of a CONCAT can get the single bit back.
 ** Usually blocks/values
   Enable only after certain time, so VL_TIME_I(32) > 0x1e gets eliminated out
 ** Better ordering of a<=b, b<=c, put all refs to 'b' next to each other to optimize caching
 ** I-cache packing improvements (what/how?)
 ** Data cache organization (order of vars in class)
   First have clocks,
   then bools instead of uint32_t's
   then based on what sense list they come from, all outputs, then all inputs
   finally have any signals part of a "usually" block, or constant.
 ** Rather then tracking widths, have a MSB...LSB of this expression
   (or better, a bitmask of bits relevant in this expression)
 ** Track recirculation and convert into clock-enables
 ** Clock enables should become new clocking domains for speed
 ** If floped(a) & flopped(b) and no other a&b, then instead flop(a&b).
 ** Sort by output bitselects so can combine more assignments (see DDP example dx_dm signal)
@@ -0,0 +1,159 @@
 clang-format is used to standardize the indentation of the internal C++
 code.
 For the most part clang-format changes provide good consistency, the two
 main exceptions being the indentation of preprocessor directives, and
 tables of statements.
 Reformatting is generally performed only before other large changes are to
 be made to a file.  The following files are not yet clang-format clean:
 clang-format -i include/verilated.h
 clang-format -i include/verilated_dpi.h
 clang-format -i include/verilated_fst_c.h
 clang-format -i include/verilated_heavy.h
 clang-format -i include/verilated_imp.h
 clang-format -i include/verilated_save.h
 clang-format -i include/verilated_sym_props.h
 clang-format -i include/verilated_unordered_set_map.h
 clang-format -i include/verilated_vcd_c.h
 clang-format -i include/verilatedos.h
 clang-format -i include/verilated.cpp
 clang-format -i include/verilated_cov.cpp
 clang-format -i include/verilated_dpi.cpp
 clang-format -i include/verilated_fst_c.cpp
 clang-format -i include/verilated_save.cpp
 clang-format -i include/verilated_threads.cpp
 clang-format -i include/verilated_vcd_c.cpp
 clang-format -i include/verilated_vpi.cpp
 clang-format -i src/V3Ast.h
 clang-format -i src/V3AstNodes.h
 clang-format -i src/V3EmitCBase.h
 clang-format -i src/V3Error.h
 clang-format -i src/V3File.h
 clang-format -i src/V3FileLine.h
 clang-format -i src/V3Global.h
 clang-format -i src/V3Graph.h
 clang-format -i src/V3GraphDfa.h
 clang-format -i src/V3GraphStream.h
 clang-format -i src/V3Hashed.h
 clang-format -i src/V3LanguageWords.h
 clang-format -i src/V3LinkDot.h
 clang-format -i src/V3List.h
 clang-format -i src/V3Number.h
 clang-format -i src/V3Options.h
 clang-format -i src/V3OrderGraph.h
 clang-format -i src/V3Os.h
 clang-format -i src/V3ParseImp.h
 clang-format -i src/V3ParseSym.h
 clang-format -i src/V3Partition.h
 clang-format -i src/V3PartitionGraph.h
 clang-format -i src/V3PreLex.h
 clang-format -i src/V3PreProc.h
 clang-format -i src/V3Scoreboard.h
 clang-format -i src/V3SenTree.h
 clang-format -i src/V3Simulate.h
 clang-format -i src/V3Stats.h
 clang-format -i src/V3String.h
 clang-format -i src/V3SymTable.h
 clang-format -i src/V3TSP.h
 clang-format -i src/V3Task.h
 clang-format -i src/V3WidthCommit.h
 clang-format -i src/V3Active.cpp
 clang-format -i src/V3ActiveTop.cpp
 clang-format -i src/V3Assert.cpp
 clang-format -i src/V3AssertPre.cpp
 clang-format -i src/V3Ast.cpp
 clang-format -i src/V3AstNodes.cpp
 clang-format -i src/V3Begin.cpp
 clang-format -i src/V3Branch.cpp
 clang-format -i src/V3Broken.cpp
 clang-format -i src/V3CCtors.cpp
 clang-format -i src/V3Case.cpp
 clang-format -i src/V3Cast.cpp
 clang-format -i src/V3Cdc.cpp
 clang-format -i src/V3Changed.cpp
 clang-format -i src/V3Clean.cpp
 clang-format -i src/V3Clock.cpp
 clang-format -i src/V3Combine.cpp
 clang-format -i src/V3Const.cpp
 clang-format -i src/V3Coverage.cpp
 clang-format -i src/V3CoverageJoin.cpp
 clang-format -i src/V3Dead.cpp
 clang-format -i src/V3Delayed.cpp
 clang-format -i src/V3Depth.cpp
 clang-format -i src/V3DepthBlock.cpp
 clang-format -i src/V3EmitC.cpp
 clang-format -i src/V3EmitCInlines.cpp
 clang-format -i src/V3EmitCMake.cpp
 clang-format -i src/V3EmitCSyms.cpp
 clang-format -i src/V3EmitMk.cpp
 clang-format -i src/V3EmitV.cpp
 clang-format -i src/V3EmitXml.cpp
 clang-format -i src/V3Error.cpp
 clang-format -i src/V3Expand.cpp
 clang-format -i src/V3File.cpp
 clang-format -i src/V3FileLine.cpp
 clang-format -i src/V3Gate.cpp
 clang-format -i src/V3GenClk.cpp
 clang-format -i src/V3Graph.cpp
 clang-format -i src/V3GraphAcyc.cpp
 clang-format -i src/V3GraphAlg.cpp
 clang-format -i src/V3GraphDfa.cpp
 clang-format -i src/V3GraphPathChecker.cpp
 clang-format -i src/V3GraphTest.cpp
 clang-format -i src/V3Hashed.cpp
 clang-format -i src/V3Inline.cpp
 clang-format -i src/V3Inst.cpp
 clang-format -i src/V3InstrCount.cpp
 clang-format -i src/V3Life.cpp
 clang-format -i src/V3LifePost.cpp
 clang-format -i src/V3LinkCells.cpp
 clang-format -i src/V3LinkDot.cpp
 clang-format -i src/V3LinkJump.cpp
 clang-format -i src/V3LinkLValue.cpp
 clang-format -i src/V3LinkLevel.cpp
 clang-format -i src/V3LinkParse.cpp
 clang-format -i src/V3LinkResolve.cpp
 clang-format -i src/V3Localize.cpp
 clang-format -i src/V3Name.cpp
 clang-format -i src/V3Number.cpp
 clang-format -i src/V3Number_test.cpp
 clang-format -i src/V3Options.cpp
 clang-format -i src/V3Order.cpp
 clang-format -i src/V3Os.cpp
 clang-format -i src/V3Param.cpp
 clang-format -i src/V3ParseGrammar.cpp
 clang-format -i src/V3ParseImp.cpp
 clang-format -i src/V3ParseLex.cpp
 clang-format -i src/V3Partition.cpp
 clang-format -i src/V3PreProc.cpp
 clang-format -i src/V3PreShell.cpp
 clang-format -i src/V3Premit.cpp
 clang-format -i src/V3ProtectLib.cpp
 clang-format -i src/V3Reloop.cpp
 clang-format -i src/V3Scope.cpp
 clang-format -i src/V3Scoreboard.cpp
 clang-format -i src/V3Slice.cpp
 clang-format -i src/V3Split.cpp
 clang-format -i src/V3SplitAs.cpp
 clang-format -i src/V3SplitVar.cpp
 clang-format -i src/V3Stats.cpp
 clang-format -i src/V3StatsReport.cpp
 clang-format -i src/V3String.cpp
 clang-format -i src/V3Subst.cpp
 clang-format -i src/V3TSP.cpp
 clang-format -i src/V3Table.cpp
 clang-format -i src/V3Task.cpp
 clang-format -i src/V3Trace.cpp
 clang-format -i src/V3TraceDecl.cpp
 clang-format -i src/V3Tristate.cpp
 clang-format -i src/V3Undriven.cpp
 clang-format -i src/V3Unknown.cpp
 clang-format -i src/V3Unroll.cpp
 clang-format -i src/V3Width.cpp
 clang-format -i src/V3WidthSel.cpp
 clang-format -i src/Verilator.cpp
@@ -45,7 +45,7 @@ PROJECT_BRIEF          = "Verilog to C translator"
 # exceed 55 pixels and the maximum width should not exceed 200 pixels.
 # Doxygen will copy the logo to the output directory.
-PROJECT_LOGO           = veripool-logo.png
+PROJECT_LOGO           = verilator_logo.png
 # The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
 # base path where the generated documentation will be put.
@@ -630,12 +630,8 @@ WARN_LOGFILE           =
 # with spaces.
 INPUT                  = doxygen-mainpage \
-		         include \
+                         include \
                         src \
                         test_c \
                         test_regress \
                         test_sc \
                         test_v
 # This tag can be used to specify the character encoding of the source files
 # that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
@@ -0,0 +1,306 @@
 = Verilator Installation
 :toc: right
 // Github doesn't render unless absolute URL
 image::https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200,role="right"]
 == Introduction
 This discusses how to install Verilator.  For more general information
 please see https://verilator.org[verilator.org].
 == Quick-start
 === Install From a Package Manager
 Using a distribution's package manager is the easiest way to get
 started. (Note packages are unlikely to have the most recent version, so
 Git, below, maybe a better alternative.) To install as a package:
   apt-get install verilator
 If this works, skip down to <<Running Verilator>>.
 === Docker
 Verilator is available in pre-built Docker containers. See
 https://github.com/verilator/verilator/blob/master/ci/docker/run/README.adoc
 === Git
 Installing Verilator with Git provides the most flexibility.
 For additional options and details see the additional sections below.  In
 brief:
 // Also update README
 ....
 # Prerequisites:
 #sudo apt-get install git make autoconf g++ flex bison
 #sudo apt-get install libfl2  # Ubuntu only (ignore if gives error)
 #sudo apt-get install libfl-dev  # Ubuntu only (ignore if gives error)
 git clone https://git.veripool.org/git/verilator   # Only first time
 ## Note the URL above is not a page you can see with a browser, it's for git only
 # Every time you need to build:
 unsetenv VERILATOR_ROOT  # For csh; ignore error if on bash
 unset VERILATOR_ROOT  # For bash
 cd verilator
 git pull        # Make sure git repository is up-to-date
 git tag         # See what versions exist
 #git checkout master      # Use development branch (e.g. recent bug fixes)
 #git checkout stable      # Use most recent stable release
 #git checkout v{version}  # Switch to specified release version
 autoconf        # Create ./configure script
 ./configure
 make
 sudo make install
 # Now see "man verilator" or online verilator.pdf's for the example tutorials
 ....
 If this works, skip down to <<Running Verilator>>.
 == Detailed Build Instructions
 This section describes details of the build process, and assumes you are
 building from Git or a tarball.  For using a pre-built binary for your
 Linux distribution, see instead <<Install From a Package Manager>>.
 === OS Requirements
 Verilator is developed and has primary testing on Ubuntu.  Versions have
 also built on Redhat Linux, Apple OS-X, HPUX and Solaris.  It should run
 with minor porting on any GNU/Linux-ish platform.  Verilator also works on
 Windows under Cygwin, and Windows under MinGW (gcc -mno-cygwin).  Verilated
 output (not Verilator itself) compiles under all the options above, plus
 MSVC++.
 === Install Prerequisites
 To build Verilator you will need to install some standard packages:
   sudo apt-get install git
   sudo apt-get install autoconf
   sudo apt-get install flex bison
 The following are optional, but improve compilation speed:
   sudo apt-get install libgoogle-perftools-dev
 Additionally, to build or run Verilator you need these standard packages:
   sudo apt-get install perl python3
   sudo apt-get install make
   sudo apt-get install g++  # Alternatively, clang
   sudo apt-get install libgz  # Non-Ubuntu (ignore if gives error)
   sudo apt-get install libfl2 libfl-dev zlibc zlib1g zlib1g-dev  # Ubuntu only (ignore if gives error)
 Those developing Verilator may also want these (see internals.adoc):
   sudo apt-get install gdb asciidoctor graphviz cmake
   cpan install Pod::Perldoc
   cpan install Unix::Processors
   cpan install Parallel::Forker
   cpan install Bit::Vector
 ==== Install SystemC
 If you will be using SystemC (vs straight C++ output), download
 https://www.accellera.org/downloads/standards/systemc[SystemC].
 Follow their installation instructions.  You will need to set `SYSTEMC_INCLUDE`
 to point to the include directory with `systemc.h` in it, and `SYSTEMC_LIBDIR`
 to points to the directory with `libsystemc.a` in it.  (Older installations
 may set `SYSTEMC` and `SYSTEMC_ARCH` instead.)
 ==== Install GTKWave
 To make use of Verilator FST tracing you will want
 http://gtkwave.sourceforge.net/[GTKwave] installed, however this is not
 required at Verilator build time.
 === Obtain Sources
 You may use Git or a tarball for the sources.  Git is the supported option.
 (If using a historical build that uses a tarball, tarballs are obtained
 from https://www.veripool.org/projects/verilator/wiki/Download[Verilator
 Downloads]; we presume you know how to use it, and is not described here.)
 Get the sources from the repository: (You need do this only once, ever.)
   git clone https://git.veripool.org/git/verilator   # Only first time
   ## Note the URL above is not a page you can see with a browser, it's for git only
 Enter the checkout and determine what version/branch to use:
   cd verilator
   git pull        # Make sure we're up-to-date
   git tag         # See what versions exist
   #git checkout master      # Use development branch (e.g. recent bug fix)
   #git checkout stable      # Use most recent release
   #git checkout v{version}  # Switch to specified release version
 === Auto Configure
 Create the configuration script:
   autoconf        # Create ./configure script
 === Eventual Installation Options
 Before configuring the build, you have to decide how you're going to
 eventually install the kit.  Verilator will be compiling the current value
 of `VERILATOR_ROOT`, `SYSTEMC_INCLUDE`, and `SYSTEMC_LIBDIR` as defaults
 into the executable, so they must be correct before configuring.
 These are the options:
 ==== 1. Run-in-Place from VERILATOR_ROOT
 Our personal favorite is to always run Verilator in-place from its Git
 directory.  This allows the easiest experimentation and upgrading, and
 allows many versions of Verilator to co-exist on a system.
   export VERILATOR_ROOT=`pwd`   # if your shell is bash
   setenv VERILATOR_ROOT `pwd`   # if your shell is csh
   ./configure
   # Running will use files from $VERILATOR_ROOT, so no install needed
 Note after installing (below steps), a calling program or shell must set
 the environment variable `VERILATOR_ROOT` to point to this Git directory,
 then execute `$VERILATOR_ROOT/bin/verilator`, which will find the path to
 all needed files.
 ==== 2. Install into a CAD Disk
 You may eventually be installing onto a project/company-wide "CAD" tools
 disk that may support multiple versions of every tool.  Target the build to
 a destination directory name that includes the Verilator version name:
   unset VERILATOR_ROOT      # if your shell is bash
   unsetenv VERILATOR_ROOT   # if your shell is csh
   # For the tarball, use the version number instead of git describe
   ./configure --prefix /CAD_DISK/verilator/`git describe | sed "s/verilator_//"`
 Note after installing (below steps), if you use
 http://modules.sourceforge.net/[modulecmd], you'll want a module file like
 the following:
 .modulecmd's verilator/version file
 ----
 set install_root /CAD_DISK/verilator/{version-number-used-above}
 unsetenv VERILATOR_ROOT
 prepend-path PATH $install_root/bin
 prepend-path MANPATH $install_root/man
 prepend-path PKG_CONFIG_PATH $install_root/share/pkgconfig
 ----
 ==== 3. Install into a Specific Path
 You may eventually install Verilator into a specific installation prefix,
 as most GNU tools support:
   unset VERILATOR_ROOT      # if your shell is bash
   unsetenv VERILATOR_ROOT   # if your shell is csh
   ./configure --prefix /opt/verilator-VERSION
 Then after installing (below steps) you will need to add
 `/opt/verilator-VERSION/bin` to `$PATH`.
 ==== 4. Install System Globally
 The final option is to eventually install Verilator globally, using the
 normal system paths:
   unset VERILATOR_ROOT      # if your shell is bash
   unsetenv VERILATOR_ROOT   # if your shell is csh
   ./configure
 Then after installing (below) the binary directories should already be in
 your `$PATH`.
 === Configure
 The command to configure the package was described in the previous step.
 Developers should configure to have more complete developer tests.
 Additional packages may be required for these tests.
   export VERILATOR_AUTHOR_SITE=1    # Put in your .bashrc
   ./configure --enable-longtests  ...above options...
 === Compile
 Compile Verilator:
   make -j
 === Test
 Check the compilation by running self-tests:
   make test
 === Install
 If you used any but the <<1. Run-in-Place from VERILATOR_ROOT>> scheme,
 install to the OS-standard place:
   make install
 == Running Verilator
 To run Verilator, see the example sections in the
 https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
 or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
 Also see the `examples/` directory that is part of the kit, and is installed
 (in a OS-specific place, often in e.g. `/usr/local/share/verilator/examples`).
     cd examples/make_hello_c
     make
 Note if you did a `make install` above you should not have `VERILATOR_ROOT`
 set in your environment; it is built into the executable.
 == Announcements
 To get notified of new releases, login to
 https://www.veripool.org[Veripool], and click the "watch" button near the
 top right under https://www.veripool.org/projects/verilator/news[Verilator
 News].
 == Directory Structure
 Some relevant files and directories in this package are as follows:
   Changes                     => Version history
   README.adoc                 => This document
   bin/verilator               => Compiler wrapper invoked to Verilate code
   docs/                       => Additional documentation
   examples/make_hello_c       => Example GNU-make simple Verilog->C++ conversion
   examples/make_hello_sc      => Example GNU-make simple Verilog->SystemC conversion
   examples/make_tracing_c     => Example GNU-make Verilog->C++ with tracing
   examples/make_tracing_sc    => Example GNU-make Verilog->SystemC with tracing
   examples/make_protect_lib   => Example using --protect-lib
   examples/cmake_hello_c      => Example building make_hello_c with CMake
   examples/cmake_hello_sc     => Example building make_hello_sc with CMake
   examples/cmake_tracing_c    => Example building make_tracing_c with CMake
   examples/cmake_tracing_sc   => Example building make_tracing_sc with CMake
   examples/cmake_protect_lib  => Example building make_protect_lib with CMake
   include/                    => Files that should be in your -I compiler path
   include/verilated*.cpp      => Global routines to link into your simulator
   include/verilated*.h        => Global headers
   include/verilated.mk        => Common Makefile
   src/                        => Translator source code
   test_regress                => Internal tests
 For files created after a design is Verilated, see the
 https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
 or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
 == License
 Copyright 2008-2020 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 // SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
@@ -0,0 +1,72 @@
 = Verilator XML Output
 :toc: right
 // Github doesn't render unless absolute URL
 image::https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200,role="right"]
 == Introduction
 This document describes Verilator's XML output. For more general information
 please see https://verilator.org[verilator.org].
 == General
 Verilator's XML output is enabled with the `--xml-only` flag. It contains
 limited information about the elaborated design including files, modules,
 instance hierarchy, logic and data types. There is no formal schema since part
 of the structure of the XML document matches the compiled code which would
 require the schema to describe legal SystemVerilog structure. The intended
 usage is to enable other downstream tools to take advantage of Verilator's
 parser.
 == Structure
 The XML document is consists of 4 sections within the top level `verilator_xml`
 element:
 `<files>`...`</files>`::
 This section contains a list of all design files read, including the
 built-in constructs and the command line as their own entries.  Each
 `<file>` has an attribute `id` which is a short ASCII string unique to that
 file. Other elements' `loc` attributes use this id to refer to a particular
 file.
 `<module_files>`...`</module_files>`::
 All files containing Verilog module definitions are listed in this section.
 This element's contents is a subset of the `<files>` element's contents.
 `<cells>`...`</cells>`::
 The cells section of the XML document contains the design instance
 hierarchy.  Each instance is represented with the `<cell>` element with the
 following attributes:
 * `fl` (deprecated): The file id and line number where the module was
  instanced.  Use `loc` instead.
 * `loc`: The file id, first line number, last line number, first column
   number and last column number of the identifier where the module was
   instanced, separated by commas.
 * `name`: The instance name.
 * `submodname`: The module name uniquified with particular parameter values (if any).
 * `hier`: The full hierarchy path.
 `<netlist>`...`</netlist>`::
 The netlist section contains a number of `<module>`...`</module>` elements,
 each describing the contents of that module, and a single `<typetable>`...
 `</typetable>` element which lists all used types used within the
 modules. Each type has a numeric `id` attribute that is referred to by
 elements in the `<module>` elements using the `dtype_id` attribute.
 == Distribution
 Copyright 2020-2020 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 // SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
@@ -0,0 +1 @@
 build*
@@ -0,0 +1,38 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt
 #
 # This is an example cmake script to build a verilog to systemc project
 # using cmake and verilator.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # This example builds the tracing_c example using CMake
 # To use it, run the following:
 # cd /path/to/verilator/examples/cmake_c
 # rm -rf build && mkdir build && cd build
 # cmake ..
 # cmake --build .
 cmake_minimum_required(VERSION 3.8)
 project(cmake_hello_c)
 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
 if (NOT verilator_FOUND)
  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
 endif()
 # Create a new executable target that will contain all your sources
 add_executable(example ../make_hello_c/sim_main.cpp)
 # Add the Verilated circuit to the target
 verilate(example
  INCLUDE_DIRS "../make_hello_c"
  SOURCES ../make_hello_c/top.v)
@@ -0,0 +1,80 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake example usage
 #
 # This file shows usage of the CMake script.
 # This makefile is here for testing the examples and should
 # generally not be added to a CMake project.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 ######################################################################
 # Set up variables
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR_COVERAGE = verilator_coverage
 else
 export VERILATOR_ROOT
 VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
 CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
 ifeq ($(CMAKE_GT_3_8),true)
 TARGET := run
 else
 TARGET := oldcmake
 endif
 endif
 default: $(TARGET)
 run:
 	@echo
 	@echo "-- Verilator CMake hello world example"
 	@echo
 	@echo "-- CMake ----------------"
 	mkdir -p build && cd build && cmake ..
 	@echo
 	@echo "-- COMPILE -----------------"
 	cmake --build build
 	@echo
 	@echo "-- RUN ---------------------"
 	build/example
 	@echo
 	@echo "-- DONE --------------------"
 	@echo
 clean mostlyclean distclean maintainer-clean:
 	@rm -rf build logs
 nocmake:
 	@echo
 	@echo "%Skip: CMake has not been found"
 	@echo
 oldcmake:
 	@echo
 	@echo "%Skip: CMake version is too old (need at least 3.8)"
 	@echo
@@ -0,0 +1 @@
 build*
@@ -0,0 +1,47 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with SystemC
 #
 # This is an example cmake script to build a verilog to SystemC project
 # using CMake and Verilator.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # This example builds the tracing_sc example using CMake
 # To use it, run the following:
 # cd /path/to/verilator/examples/cmake_sc
 # rm -rf build && mkdir build && cd build
 # cmake ..
 # cmake --build .
 cmake_minimum_required(VERSION 3.8)
 project(cmake_hello_sc)
 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
 if (NOT verilator_FOUND)
  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
 endif()
 # SystemC dependencies
 set(THREADS_PREFER_PTHREAD_FLAG ON)
 find_package(Threads REQUIRED)
 # Find SystemC using SystemC's CMake integration
 find_package(SystemCLanguage QUIET)
 # Create a new executable target that will contain all your sources
 add_executable(example ../make_hello_sc/sc_main.cpp)
 # Add the Verilated circuit to the target
 verilate(example SYSTEMC
  INCLUDE_DIRS "../make_hello_sc"
  SOURCES ../make_hello_sc/top.v)
 verilator_link_systemc(example)
@@ -0,0 +1,130 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake example usage
 #
 # This file shows usage of the CMake script.
 # This makefile is here for testing the examples and should
 # generally not be added to a CMake project.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 ######################################################################
 # Set up variables
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR_COVERAGE = verilator_coverage
 else
 export VERILATOR_ROOT
 VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
 	TARGET := nocmake
 else
 CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
 ifneq ($(CMAKE_GT_3_8),true)
 TARGET := oldcmake
 else
 # Test existence of SYSTEMC_INCLUDE and SYSTEMC_LIBDIR environment variabless
 ifneq (,$(SYSTEMC_INCLUDE))
 ifneq (,${SYSTEMC_LIBDIR})
 SYSTEMC_SET := true
 endif
 endif
 # Test existence of SYSTEMC_ROOT environment variable
 ifneq (SYSTEMC_SET, true)
 ifneq (,${SYSTEMC_ROOT})
 SYSTEMC_SET := true
 endif
 endif
 # Test existence of SYSTEMC environment variable
 ifneq (SYSTEMC_SET, true)
 ifneq (,${SYSTEMC})
 SYSTEMC_SET := true
 endif
 endif
 # Test whether SystemC is installed with CMake support
 # This will print a CMake error about processing arguments that can (currently) be ignored.
 ifneq (SYSTEMC_SET, true)
 FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
 ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
 SYSTEMC_SET := true
 endif
 endif
 ifeq ($(SYSTEMC_SET), true)
 TARGET := run
 else
 TARGET := nosc
 endif
 endif
 endif
 default: $(TARGET)
 run:
 	@echo
 	@echo "-- Verilator CMake SystemC hello-world simple example"
 	@echo
 	@echo "-- CMake ----------------"
 	mkdir -p build && cd build && cmake ..
 	@echo
 	@echo "-- COMPILE -----------------"
 	cmake --build build
 	@echo
 	@echo "-- RUN ---------------------"
 	@mkdir -p logs
 	build/example
 	@echo "-- DONE --------------------"
 	@echo "Note: Once this example is understood, see examples/cmake_tracing_sc."
 	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
 clean mostlyclean distclean maintainer-clean:
 	@rm -rf build logs
 nocmake:
 	@echo
 	@echo "%Skip: CMake has not been found"
 	@echo
 oldcmake:
 	@echo
 	@echo "%Skip: CMake version is too old (need at least 3.8)"
 	@echo
 nosc:
 	@echo
 	@echo "%Skip: CMake could not find SystemC."
 	@echo "% Make sure that either:"
 	@echo "% - The environment variables SYSTEMC_INCLUDE and SYSTEMC_LIBDIR are exported."
 	@echo "% - Or, the environment variable SYSTEMC_ROOT is exported."
 	@echo "% - Or, The environment variable SYSTEMC is exported."
 	@echo "% - Or, if the SystemC installation provides CMake support,"
 	@echo "%   that its installation prefix is in CMAKE_PREFIX_PATH."
 	@echo "% Also that the C++ standard of the SystemC library is the same as this example."
 	@echo "% Please see the Verilator documentation's CMake section for more information."
 	@echo
@@ -0,0 +1 @@
 build*
@@ -0,0 +1,61 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt
 #
 # This is an example cmake script to build a verilog to systemc project
 # using cmake and verilator.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # This example builds the tracing_c example using CMake
 # To use it, run the following:
 # cd /path/to/verilator/examples/cmake_c
 # rm -rf build && mkdir build && cd build
 # cmake ..
 # cmake --build .
 cmake_minimum_required(VERSION 3.8)
 project(cmake_protect_lib)
 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
 if (NOT verilator_FOUND)
  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
 endif()
 # Create the main executable target
 add_executable(example ../make_protect_lib/sim_main.cpp)
 # Create a secret library
 add_library(verilated_secret STATIC) # or SHARED for a shared library
 target_link_libraries(example PRIVATE verilated_secret)
 # To create both libraries on CMake >= 3.12 replace the above 2 lines with the following:
 # add_library(verilated_secret OBJECT)
 # set_property(TARGET verilated_secret PROPERTY POSITION_INDEPENDENT_CODE 1)
 # add_library(verilated_secret_static STATIC  $<TARGET_OBJECTS:verilated_secret>)
 # set_target_properties(verilated_secret_static PROPERTIES OUTPUT_NAME verilated_secret)
 # add_library(verilated_secret_shared SHARED  $<TARGET_OBJECTS:verilated_secret>)
 # set_target_properties(verilated_secret_shared PROPERTIES OUTPUT_NAME verilated_secret)
 # target_link_libraries(example PRIVATE verilated_secret_static)
 # Setup random seed
 verilator_generate_key(KEY_INIT)
 set(PROTECT_KEY ${KEY_INIT} CACHE STRING "Random seed for protection")
 # Add the Verilated modules to the targets
 verilate(verilated_secret
  VERILATOR_ARGS --protect-lib verilated_secret
                 --protect-key ${PROTECT_KEY}
  DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/verilated_secret
  SOURCES ../make_protect_lib/secret_impl.v)
 # Include location of verilated_secret.sv wrapper
 verilate(example
  VERILATOR_ARGS "-I${CMAKE_CURRENT_BINARY_DIR}/verilated_secret"
  SOURCES ../make_protect_lib/top.v)
@@ -0,0 +1,80 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake example usage
 #
 # This file shows usage of the CMake script.
 # This makefile is here for testing the examples and should
 # generally not be added to a CMake project.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 ######################################################################
 # Set up variables
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR_COVERAGE = verilator_coverage
 else
 export VERILATOR_ROOT
 VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
 CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
 ifeq ($(CMAKE_GT_3_8),true)
 TARGET := run
 else
 TARGET := oldcmake
 endif
 endif
 default: $(TARGET)
 run:
 	@echo
 	@echo "-- Verilator CMake protect_lib example"
 	@echo
 	@echo "-- CMake ----------------"
 	mkdir -p build && cd build && cmake ..
 	@echo
 	@echo "-- COMPILE -----------------"
 	cmake --build build
 	@echo
 	@echo "-- RUN ---------------------"
 	build/example
 	@echo
 	@echo "-- DONE --------------------"
 	@echo
 clean mostlyclean distclean maintainer-clean:
 	@rm -rf build logs
 nocmake:
 	@echo
 	@echo "%Skip: CMake has not been found"
 	@echo
 oldcmake:
 	@echo
 	@echo "%Skip: CMake version is too old (need at least 3.8)"
 	@echo
@@ -0,0 +1,2 @@
 build*
 logs
@@ -0,0 +1,39 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with tracing
 #
 # This is an example cmake script to build a verilog to systemc project
 # using cmake and verilator.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # This example builds the make_tracing_c example using CMake
 # To use it, run the following:
 # cd /path/to/verilator/examples/cmake_tracing_c
 # rm -rf build && mkdir build && cd build
 # cmake ..
 # cmake --build .
 cmake_minimum_required(VERSION 3.8)
 project(cmake_tracing_c)
 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
 if (NOT verilator_FOUND)
  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
 endif()
 # Create a new executable target that will contain all your sources
 add_executable(example ../make_tracing_c/sim_main.cpp)
 # Add the Verilated circuit to the target
 verilate(example COVERAGE TRACE
  INCLUDE_DIRS "../make_tracing_c"
  VERILATOR_ARGS -f ../make_tracing_c/input.vc -Os -x-assign 0
  SOURCES ../make_tracing_c/top.v)
@@ -0,0 +1,86 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake example usage
 #
 # This file shows usage of the CMake script.
 # This makefile is here for testing the examples and should
 # generally not be added to a CMake project.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 ######################################################################
 # Set up variables
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR_COVERAGE = verilator_coverage
 else
 export VERILATOR_ROOT
 VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
 TARGET := nocmake
 else
 CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
 ifeq ($(CMAKE_GT_3_8),true)
 TARGET := run
 else
 TARGET := oldcmake
 endif
 endif
 default: $(TARGET)
 run:
 	@echo
 	@echo "-- Verilator CMake tracing example"
 	@echo
 	@echo "-- CMake ----------------"
 	mkdir -p build && cd build && cmake ..
 	@echo
 	@echo "-- COMPILE -----------------"
 	cmake --build build
 	@echo
 	@echo "-- RUN ---------------------"
 	@mkdir -p logs
 	build/example +trace
 	@echo
 	@echo "-- COVERAGE ----------------"
 	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
 	@echo
 	@echo "-- DONE --------------------"
 	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
 	@echo
 clean mostlyclean distclean maintainer-clean:
 	@rm -rf build logs
 nocmake:
 	@echo
 	@echo "%Skip: CMake has not been found"
 	@echo
 oldcmake:
 	@echo
 	@echo "%Skip: CMake version is too old (need at least 3.8)"
 	@echo
@@ -0,0 +1,7 @@
 *.dmp
 *.log
 *.csrc
 *.vcd
 obj_*
 logs
 build*
@@ -0,0 +1,48 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with SystemC tracing
 #
 # This is an example cmake script to build a verilog to SystemC project
 # using CMake and Verilator.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # This example builds the tracing_sc example using CMake
 # To use it, run the following:
 # cd /path/to/verilator/examples/cmake_tracing_sc
 # rm -rf build && mkdir build && cd build
 # cmake ..
 # cmake --build .
 cmake_minimum_required(VERSION 3.8)
 project(cmake_tracing_sc_example)
 find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
 if (NOT verilator_FOUND)
  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
 endif()
 # SystemC dependencies
 set(THREADS_PREFER_PTHREAD_FLAG ON)
 find_package(Threads REQUIRED)
 # Find SystemC using SystemC's CMake integration
 find_package(SystemCLanguage QUIET)
 # Create a new executable target that will contain all your sources
 add_executable(example ../make_tracing_sc/sc_main.cpp)
 # Add the Verilated circuit to the target
 verilate(example SYSTEMC COVERAGE TRACE
  INCLUDE_DIRS "../make_tracing_sc"
  VERILATOR_ARGS -f ../make_tracing_sc/input.vc -Os -x-assign 0
  SOURCES ../make_tracing_sc/top.v)
 verilator_link_systemc(example)
@@ -0,0 +1,135 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator CMake example usage
 #
 # This file shows usage of the CMake script.
 # This makefile is here for testing the examples and should
 # generally not be added to a CMake project.
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 ######################################################################
 # Set up variables
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR_COVERAGE = verilator_coverage
 else
 export VERILATOR_ROOT
 VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
 	TARGET := nocmake
 else
 CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
 CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
 CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
 CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
 ifneq ($(CMAKE_GT_3_8),true)
 TARGET := oldcmake
 else
 # Test existence of SYSTEMC_INCLUDE and SYSTEMC_LIBDIR environment variabless
 ifneq (,$(SYSTEMC_INCLUDE))
 ifneq (,${SYSTEMC_LIBDIR})
 SYSTEMC_SET := true
 endif
 endif
 # Test existence of SYSTEMC_ROOT environment variable
 ifneq (SYSTEMC_SET, true)
 ifneq (,${SYSTEMC_ROOT})
 SYSTEMC_SET := true
 endif
 endif
 # Test existence of SYSTEMC environment variable
 ifneq (SYSTEMC_SET, true)
 ifneq (,${SYSTEMC})
 SYSTEMC_SET := true
 endif
 endif
 # Test whether SystemC is installed with CMake support
 # This will print a CMake error about processing arguments that can (currently) be ignored.
 ifneq (SYSTEMC_SET, true)
 FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
 ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
 SYSTEMC_SET := true
 endif
 endif
 ifeq ($(SYSTEMC_SET), true)
 TARGET := run
 else
 TARGET := nosc
 endif
 endif
 endif
 default: $(TARGET)
 run:
 	@echo
 	@echo "-- Verilator CMake SystemC tracing example"
 	@echo
 	@echo "-- CMake ----------------"
 	mkdir -p build && cd build && cmake ..
 	@echo
 	@echo "-- COMPILE -----------------"
 	cmake --build build
 	@echo
 	@echo "-- RUN ---------------------"
 	@mkdir -p logs
 	build/example +trace
 	@echo
 	@echo "-- COVERAGE ----------------"
 	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
 	@echo
 	@echo "-- DONE --------------------"
 	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
 	@echo
 clean mostlyclean distclean maintainer-clean:
 	@rm -rf build logs
 nocmake:
 	@echo
 	@echo "%Skip: CMake has not been found"
 	@echo
 oldcmake:
 	@echo
 	@echo "%Skip: CMake version is too old (need at least 3.8)"
 	@echo
 nosc:
 	@echo
 	@echo "%Skip: CMake could not find SystemC."
 	@echo "% Make sure that either:"
 	@echo "% - The environment variables SYSTEMC_INCLUDE and SYSTEMC_LIBDIR are exported."
 	@echo "% - Or, the environment variable SYSTEMC_ROOT is exported."
 	@echo "% - Or, The environment variable SYSTEMC is exported."
 	@echo "% - Or, if the SystemC installation provides CMake support,"
 	@echo "%   that its installation prefix is in CMAKE_PREFIX_PATH."
 	@echo "% Also that the C++ standard of the SystemC library is the same as this example."
 	@echo "% Please see the Verilator documentation's CMake section for more information."
 	@echo
@@ -5,10 +5,11 @@
 # This calls the object directory makefile.  That allows the objects to
 # be placed in the "current directory" which simplifies the Makefile.
 #
-# Copyright 2003-2018 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-# redistribute it and/or modify it under the terms of either the GNU
+# can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # Check for sanity to avoid later confusion
@@ -21,10 +22,10 @@ endif
 # This is intended to be a minimal example.  Before copying this to start a
 # real project, it is better to start with a more complete example,
-# e.g. examples/tracing_c.
+# e.g. examples/make_tracing_c.
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
-# package inatall, and verilator is in your path. Otherwise find the
+# package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator
@@ -42,7 +43,7 @@ default:
 	@echo "-- RUN ---------------------"
 	obj_dir/Vtop
 	@echo "-- DONE --------------------"
-	@echo "Note: Once this example is understood, see examples/tracing_c."
+	@echo "Note: Once this example is understood, see examples/make_tracing_c."
 	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
 ######################################################################
@@ -1,7 +1,8 @@
 // DESCRIPTION: Verilator: Verilog example module
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2017 by Wilson Snyder.
+// any use, without warranty, 2017 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 //======================================================================
 // Include common routines
@@ -1,7 +1,8 @@
 // DESCRIPTION: Verilator: Verilog example module
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2017 by Wilson Snyder.
+// any use, without warranty, 2017 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 // See also the EXAMPLE section in the verilator manpage/document.
 module top;
@@ -5,10 +5,11 @@
 # This calls the object directory makefile.  That allows the objects to
 # be placed in the "current directory" which simplifies the Makefile.
 #
-# Copyright 2003-2018 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-# redistribute it and/or modify it under the terms of either the GNU
+# can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # Check for sanity to avoid later confusion
@@ -21,10 +22,10 @@ endif
 # This is intended to be a minimal example.  Before copying this to start a
 # real project, it is better to start with a more complete example,
-# e.g. examples/tracing_sc.
+# e.g. examples/make_tracing_sc.
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
-# package inatall, and verilator is in your path. Otherwise find the
+# package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator
@@ -51,7 +52,7 @@ run:
 	@echo "-- RUN ---------------------"
 	obj_dir/Vtop
 	@echo "-- DONE --------------------"
-	@echo "Note: Once this example is understood, see examples/tracing_sc."
+	@echo "Note: Once this example is understood, see examples/make_tracing_sc."
 	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
 ######################################################################
@@ -1,8 +1,9 @@
 // -*- SystemC -*-
 // DESCRIPTION: Verilator Example: Top level main for invoking SystemC model
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2017 by Wilson Snyder.
+// any use, without warranty, 2017 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 //======================================================================
 // SystemC global header
@@ -1,7 +1,8 @@
 // DESCRIPTION: Verilator: Verilog example module
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2017 by Wilson Snyder.
+// any use, without warranty, 2017 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 // See also the EXAMPLE section in the verilator manpage/document.
 module top;
@@ -0,0 +1,2 @@
 obj_*
 logs
@@ -0,0 +1,98 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator Example: --protect-lib Makefile
 #
 # This calls the object directory makefiles.  That allows the objects to
 # be placed in the "current directory" which simplifies the Makefile.
 #
 # Copyright 2019 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # Check for sanity to avoid later confusion
 ifneq ($(words $(CURDIR)),1)
 $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 ######################################################################
 # Set up variables
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator
 else
 export VERILATOR_ROOT
 VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 VERILATOR_FLAGS =
 # Generate C++
 VERILATOR_FLAGS += -cc
 # Optimize
 VERILATOR_FLAGS += -Os -x-assign 0
 # Warn abount lint issues; may not want this on less solid designs
 VERILATOR_FLAGS += -Wall
 # Make waveforms
 TOP_VERILATOR_FLAGS = $(VERILATOR_FLAGS) --trace
 ######################################################################
 default: run
 run:
 	@echo
 	@echo "-- Verilator --protect-lib example -_--------------------------"
 	@echo
 	@echo "-- VERILATE secret module -------------------------------------"
 	@echo " --protect-lib will produce both a static and shared library"
 	@echo " In this example the static library is used, but some"
 	@echo " simulators may require the shared library."
 	@echo "---------------------------------------------------------------"
 	$(VERILATOR) $(VERILATOR_FLAGS) --protect-lib verilated_secret -Mdir obj_dir_secret/ secret_impl.v
 	@echo
 	@echo "-- COMPILE protected library ----------------------------------"
 	@echo " This builds verilated_secret.sv, libverilated_secret.a and"
 	@echo " libverilated_secret.so which can be distributed apart from"
 	@echo " the source"
 	@echo "---------------------------------------------------------------"
 	$(MAKE) -j 4 -C obj_dir_secret -f Vsecret_impl.mk
 	@echo
 	@echo "-- VERILATE top module ----------------------------------------"
 	@echo " Use the SystemVerilog wrapper (verilated_secret.sv) and the"
 	@echo " library (libverilated_secret.a) generated from the previous"
 	@echo " step"
 	@echo "---------------------------------------------------------------"
 	$(VERILATOR) $(TOP_VERILATOR_FLAGS) --exe -LDFLAGS '-L../obj_dir_secret -lverilated_secret -static' top.v obj_dir_secret/verilated_secret.sv sim_main.cpp
 	@echo
 	@echo "-- COMPILE entire design --------------------------------------"
 	$(MAKE) -j 4 -C obj_dir -f Vtop.mk
 	@echo
 	@echo "-- RUN --------------------------------------------------------"
 	@mkdir -p logs
 	obj_dir/Vtop +trace
 	@echo
 	@echo "-- DONE -------------------------------------------------------"
 	@echo "To see waveforms, open logs/vlt_dump.vcd in a waveform viewer"
 	@echo
 ######################################################################
 # Other targets
 show-config:
 	$(VERILATOR) -V
 maintainer-copy::
 clean mostlyclean distclean maintainer-clean::
 	-rm -rf obj_dir* logs *.log core
@@ -0,0 +1,28 @@
 // DESCRIPTION: Verilator: --protect-lib example secret module
 //
 // This file ONLY is placed under the Creative Commons Public Domain, for
 // any use, without warranty, 2019 by Todd Strader.
 // SPDX-License-Identifier: CC0-1.0
 // This module will be used as libsecret.a or libsecret.so without
 // exposing the source.
 module secret_impl(
 		   input [31:0]        a,
 		   input [31:0]        b,
 		   output logic [31:0] x,
 		   input 	       clk);
   logic [31:0] 		       accum_q = 0;
   logic [31:0] 		       secret_value = 9;
   initial $display("%m: initialized");
   always @(posedge clk) begin
      accum_q <= accum_q + a;
      if (accum_q > 10)
        x <= b;
      else
        x <= a + b + secret_value;
   end
 endmodule
@@ -0,0 +1,73 @@
 // DESCRIPTION: Verilator: --protect-lib example module
 //
 // This file ONLY is placed under the Creative Commons Public Domain, for
 // any use, without warranty, 2019 by Todd Strader.
 // SPDX-License-Identifier: CC0-1.0
 //======================================================================
 // See examples/tracing_c for notes on tracing
 // Include common routines
 #include <verilated.h>
 #include "Vtop.h"
 #if VM_TRACE
 # include <verilated_vcd_c.h>
 #endif
 vluint64_t main_time = 0;
 double sc_time_stamp() {
    return main_time;
 }
 int main(int argc, char** argv, char** env) {
    if (0 && argc && argv && env) {}
    Verilated::debug(0);
    Verilated::randReset(2);
    Verilated::commandArgs(argc, argv);
    // Construct the Verilated model, including the secret module
    Vtop* top = new Vtop;
 #if VM_TRACE
    // When tracing, the contents of the secret module will not be seen
    VerilatedVcdC* tfp = NULL;
    const char* flag = Verilated::commandArgsPlusMatch("trace");
    if (flag && 0==strcmp(flag, "+trace")) {
        Verilated::traceEverOn(true);
        VL_PRINTF("Enabling waves into logs/vlt_dump.vcd...\n");
        tfp = new VerilatedVcdC;
        top->trace(tfp, 99);
        Verilated::mkdir("logs");
        tfp->open("logs/vlt_dump.vcd");
    }
 #endif
    top->clk = 0;
    // Simulate until $finish
    while (!Verilated::gotFinish()) {
        main_time++;
        top->clk = ~top->clk & 0x1;
        top->eval();
 #if VM_TRACE
        if (tfp) tfp->dump(main_time);
 #endif
    }
    // Final model cleanup
    top->final();
    // Close trace if opened
 #if VM_TRACE
    if (tfp) { tfp->close(); tfp = NULL; }
 #endif
    // Destroy model
    delete top; top = NULL;
    // Fin
    exit(0);
 }
@@ -0,0 +1,35 @@
 // DESCRIPTION: Verilator: --protect-lib example module
 //
 // This file ONLY is placed under the Creative Commons Public Domain, for
 // any use, without warranty, 2019 by Todd Strader.
 // SPDX-License-Identifier: CC0-1.0
 // See also the EXAMPLE section in the verilator manpage/document.
 module top (input clk);
   integer cyc = 0;
   logic [31:0] a = 0;
   logic [31:0] b = 0;
   logic [31:0] x;
   verilated_secret secret (.a, .b, .x, .clk);
   always @(posedge clk) begin
      $display("[%0t] cyc=%0d a=%0d b=%0d x=%0d", $time, cyc, a, b, x);
      cyc <= cyc + 1;
      if (cyc == 0) begin
         a <= 5;
         b <= 7;
      end else if (cyc == 1) begin
         a <= 6;
         b <= 2;
      end else if (cyc == 2) begin
         a <= 1;
         b <= 9;
      end else if (cyc > 3) begin
         $display("Done");
         $finish;
      end
   end
 endmodule
@@ -5,10 +5,11 @@
 # This calls the object directory makefile.  That allows the objects to
 # be placed in the "current directory" which simplifies the Makefile.
 #
-# Copyright 2003-2018 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-# redistribute it and/or modify it under the terms of either the GNU
+# can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # Check for sanity to avoid later confusion
@@ -21,7 +22,7 @@ endif
 # Set up variables
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
-# package inatall, and verilator is in your path. Otherwise find the
+# package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator
@@ -38,7 +39,7 @@ VERILATOR_FLAGS += -cc --exe
 # Generate makefile dependencies (not shown as complicates the Makefile)
 #VERILATOR_FLAGS += -MMD
 # Optimize
-VERILATOR_FLAGS += -O2 -x-assign 0
+VERILATOR_FLAGS += -Os -x-assign 0
 # Warn abount lint issues; may not want this on less solid designs
 VERILATOR_FLAGS += -Wall
 # Make waveforms
@@ -52,6 +53,9 @@ VERILATOR_FLAGS += --coverage
 # Add this trace to get a backtrace in gdb
 #VERILATOR_FLAGS += --gdbbt
 # Input files for Verilator
 VERILATOR_INPUT = -f input.vc top.v sim_main.cpp
 ######################################################################
 default: run
@@ -61,7 +65,7 @@ run:
 	@echo
 	@echo "-- VERILATE ----------------"
-	$(VERILATOR) $(VERILATOR_FLAGS) -f input.vc top.v sim_main.cpp
+	$(VERILATOR) $(VERILATOR_FLAGS) $(VERILATOR_INPUT)
 	@echo
 	@echo "-- COMPILE -----------------"
@@ -72,11 +76,13 @@ run:
 	@echo
 	@echo "-- RUN ---------------------"
 	@rm -rf logs
 	@mkdir -p logs
 	obj_dir/Vtop +trace
 	@echo
 	@echo "-- COVERAGE ----------------"
 	@rm -rf logs/annotated
 	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
 	@echo
@@ -5,10 +5,11 @@
 #
 # This is executed in the object directory, and called by ../Makefile
 #
-# Copyright 2003-2018 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-# redistribute it and/or modify it under the terms of either the GNU
+# can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 #######################################################################
@@ -17,6 +18,9 @@ default: Vtop
 # Include the rules made by Verilator
 include Vtop.mk
 # Use OBJCACHE (ccache) if using gmake and its installed
 COMPILE.cc = $(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c
 #######################################################################
 # Compile flags
@@ -35,7 +39,7 @@ endif
 # SystemC takes minutes to optimize, thus it is off by default.
 OPT_SLOW =
 # Fast path optimizations.  Most time is spent in these classes.
-OPT_FAST = -O2 -fstrict-aliasing
+OPT_FAST = -Os -fstrict-aliasing
 #OPT_FAST = -O
 #OPT_FAST =
@@ -0,0 +1,105 @@
 // DESCRIPTION: Verilator: Verilog example module
 //
 // This file ONLY is placed under the Creative Commons Public Domain, for
 // any use, without warranty, 2017 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 //======================================================================
 // Include common routines
 #include <verilated.h>
 // Include model header, generated from Verilating "top.v"
 #include "Vtop.h"
 // Current simulation time (64-bit unsigned)
 vluint64_t main_time = 0;
 // Called by $time in Verilog
 double sc_time_stamp() {
    return main_time;  // Note does conversion to real, to match SystemC
 }
 int main(int argc, char** argv, char** env) {
    // This is a more complicated example, please also see the simpler examples/make_hello_c.
    // Prevent unused variable warnings
    if (0 && argc && argv && env) {}
    // Set debug level, 0 is off, 9 is highest presently used
    // May be overridden by commandArgs
    Verilated::debug(0);
    // Randomization reset policy
    // May be overridden by commandArgs
    Verilated::randReset(2);
    // Verilator must compute traced signals
    Verilated::traceEverOn(true);
    // Pass arguments so Verilated code can see them, e.g. $value$plusargs
    // This needs to be called before you create any model
    Verilated::commandArgs(argc, argv);
    // Create logs/ directory in case we have traces to put under it
    Verilated::mkdir("logs");
    // Construct the Verilated model, from Vtop.h generated from Verilating "top.v"
    Vtop* top = new Vtop;  // Or use a const unique_ptr, or the VL_UNIQUE_PTR wrapper
    // Set some inputs
    top->reset_l = !0;
    top->clk = 0;
    top->in_small = 1;
    top->in_quad = 0x1234;
    top->in_wide[0] = 0x11111111;
    top->in_wide[1] = 0x22222222;
    top->in_wide[2] = 0x3;
    // Simulate until $finish
    while (!Verilated::gotFinish()) {
        main_time++;  // Time passes...
        // Toggle a fast (time/2 period) clock
        top->clk = !top->clk;
        // Toggle control signals on an edge that doesn't correspond
        // to where the controls are sampled; in this example we do
        // this only on a negedge of clk, because we know
        // reset is not sampled there.
        if (!top->clk) {
            if (main_time > 1 && main_time < 10) {
                top->reset_l = !1;  // Assert reset
            } else {
                top->reset_l = !0;  // Deassert reset
            }
            // Assign some other inputs
            top->in_quad += 0x12;
        }
        // Evaluate model
        // (If you have multiple models being simulated in the same
        // timestep then instead of eval(), call eval_step() on each, then
        // eval_end_step() on each.)
        top->eval();
        // Read outputs
        VL_PRINTF("[%" VL_PRI64 "d] clk=%x rstl=%x iquad=%" VL_PRI64 "x"
                  " -> oquad=%" VL_PRI64"x owide=%x_%08x_%08x\n",
                  main_time, top->clk, top->reset_l, top->in_quad,
                  top->out_quad, top->out_wide[2], top->out_wide[1], top->out_wide[0]);
    }
    // Final model cleanup
    top->final();
    //  Coverage analysis (since test passed)
 #if VM_COVERAGE
    Verilated::mkdir("logs");
    VerilatedCov::write("logs/coverage.dat");
 #endif
    // Destroy model
    delete top; top = NULL;
    // Fin
    exit(0);
 }
@@ -1,31 +1,17 @@
 // DESCRIPTION: Verilator: Verilog Test module
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2003 by Wilson Snyder.
+// any use, without warranty, 2003 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 // ======================================================================
 module sub
  (
   input clk,
   input fastclk,
   input reset_l
   );
   // Example counter/flop
   reg [31:0] count_f;
   always_ff @ (posedge fastclk) begin
      if (!reset_l) begin
         /*AUTORESET*/
         // Beginning of autoreset for uninitialized flops
         count_f <= 32'h0;
         // End of automatics
      end
      else begin
         count_f <= count_f + 1;
      end
   end
   // Another example flop
   reg [31:0] count_c;
   always_ff @ (posedge clk) begin
      if (!reset_l) begin
@@ -37,8 +23,6 @@ module sub
      else begin
         count_c <= count_c + 1;
         if (count_c >= 3) begin
            $display("[%0t] fastclk is %0d times faster than clk\n",
                     $time, count_f/count_c);
            // This write is a magic value the Makefile uses to make sure the
            // test completes successfully.
            $write("*-* All Finished *-*\n");
@@ -1,41 +1,45 @@
 // DESCRIPTION: Verilator: Verilog example module
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2003 by Wilson Snyder.
+// any use, without warranty, 2003 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 // ======================================================================
 // This is intended to be a complex example of several features, please also
-// see the simpler examples/hello_world_c.
+// see the simpler examples/make_hello_c.
 module top
  (
   // Declare some signals so we can see how I/O works
   input         clk,
   input         fastclk,
   input         reset_l,
-   output [1:0]  out_small,
+   output wire [1:0]  out_small,
-   output [39:0] out_quad,
+   output wire [39:0] out_quad,
-   output [69:0] out_wide,
+   output wire [69:0] out_wide,
   input [1:0]   in_small,
   input [39:0]  in_quad,
   input [69:0]  in_wide
   );
   // Connect up the outputs, using some trivial logic
-   wire [1:0]    out_small = ~reset_l ? '0 : (in_small + 2'b1);
+   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
-   wire [39:0]   out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
-   wire [69:0]   out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
   // And an example sub module. The submodule will print stuff.
   sub sub (/*AUTOINST*/
            // Inputs
            .clk                        (clk),
            .fastclk                    (fastclk),
            .reset_l                    (reset_l));
   // Print some stuff as an example
   initial begin
      if ($test$plusargs("trace") != 0) begin
         $display("[%0t] Tracing to logs/vlt_dump.vcd...\n", $time);
         $dumpfile("logs/vlt_dump.vcd");
         $dumpvars();
      end
      $display("[%0t] Model running...\n", $time);
   end
@@ -5,10 +5,11 @@
 # This calls the object directory makefile.  That allows the objects to
 # be placed in the "current directory" which simplifies the Makefile.
 #
-# Copyright 2003-2018 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-# redistribute it and/or modify it under the terms of either the GNU
+# can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # Check for sanity to avoid later confusion
@@ -21,7 +22,7 @@ endif
 # Set up variables
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
-# package inatall, and verilator is in your path. Otherwise find the
+# package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator
@@ -38,7 +39,7 @@ VERILATOR_FLAGS += -sc --exe
 # Generate makefile dependencies (not shown as complicates the Makefile)
 #VERILATOR_FLAGS += -MMD
 # Optimize
-VERILATOR_FLAGS += -O2 -x-assign 0
+VERILATOR_FLAGS += -Os -x-assign 0
 # Warn abount lint issues; may not want this on less solid designs
 VERILATOR_FLAGS += -Wall
 # Make waveforms
@@ -52,6 +53,9 @@ VERILATOR_FLAGS += --coverage
 # Add this trace to get a backtrace in gdb
 #VERILATOR_FLAGS += --gdbbt
 # Input files for Verilator
 VERILATOR_INPUT = -f input.vc top.v sc_main.cpp
 # Check if SC exists via a verilator call (empty if not)
 SYSTEMC_EXISTS := $(shell $(VERILATOR) --getenv SYSTEMC_INCLUDE)
@@ -69,10 +73,10 @@ run:
 	@echo
 	@echo "-- VERILATE ----------------"
-	$(VERILATOR) $(VERILATOR_FLAGS) -f input.vc top.v sc_main.cpp
+	$(VERILATOR) $(VERILATOR_FLAGS) $(VERILATOR_INPUT)
 	@echo
-	@echo "-- COMPILE ----------------="
+	@echo "-- COMPILE -----------------"
 # To compile, we can either just do what Verilator asks,
 # or call a submakefile where we can override the rules ourselves
 #	$(MAKE) -j 4 -C obj_dir -f Vtop.mk
@@ -80,11 +84,13 @@ run:
 	@echo
 	@echo "-- RUN ---------------------"
 	@rm -rf logs
 	@mkdir -p logs
 	obj_dir/Vtop +trace
 	@echo
 	@echo "-- COVERAGE ----------------"
 	@rm -rf logs/annotated
 	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
 	@echo
@@ -92,6 +98,7 @@ run:
 	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
 	@echo
 ######################################################################
 # Other targets
@@ -5,10 +5,11 @@
 #
 # This is executed in the object directory, and called by ../Makefile
 #
-# Copyright 2003-2018 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
-# redistribute it and/or modify it under the terms of either the GNU
+# can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 #######################################################################
@@ -17,6 +18,9 @@ default: Vtop
 # Include the rules made by Verilator
 include Vtop.mk
 # Use OBJCACHE (ccache) if using gmake and its installed
 COMPILE.cc = $(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c
 #######################################################################
 # Compile flags
@@ -43,7 +47,7 @@ endif
 # SystemC takes minutes to optimize, thus it is off by default.
 OPT_SLOW =
 # Fast path optimizations.  Most time is spent in these classes.
-OPT_FAST = -O2 -fstrict-aliasing
+OPT_FAST = -Os -fstrict-aliasing
 #OPT_FAST = -O
 #OPT_FAST =
@@ -1,8 +1,9 @@
 // -*- SystemC -*-
 // DESCRIPTION: Verilator Example: Top level main for invoking SystemC model
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2017 by Wilson Snyder.
+// any use, without warranty, 2017 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 //======================================================================
 // SystemC global header
@@ -20,19 +21,26 @@
 #include "Vtop.h"
 int sc_main(int argc, char* argv[]) {
-    // This is a more complicated example, please also see the simpler examples/hello_world_c.
+    // This is a more complicated example, please also see the simpler examples/make_hello_c.
    // Prevent unused variable warnings
    if (0 && argc && argv) {}
    // Pass arguments so Verilated code can see them, e.g. $value$plusargs
    Verilated::commandArgs(argc, argv);
    // Set debug level, 0 is off, 9 is highest presently used
    // May be overridden by commandArgs
    Verilated::debug(0);
    // Randomization reset policy
    // May be overridden by commandArgs
    Verilated::randReset(2);
    // Pass arguments so Verilated code can see them, e.g. $value$plusargs
    // This needs to be called before you create any model
    Verilated::commandArgs(argc, argv);
    // Create logs/ directory in case we have traces to put under it
    Verilated::mkdir("logs");
    // General logfile
    ios::sync_with_stdio();
@@ -94,10 +102,10 @@ int sc_main(int argc, char* argv[]) {
    const char* flag = Verilated::commandArgsPlusMatch("trace");
    if (flag && 0==strcmp(flag, "+trace")) {
        cout << "Enabling waves into logs/vlt_dump.vcd...\n";
-        VerilatedVcdSc* tfp = new VerilatedVcdSc;
+        tfp = new VerilatedVcdSc;
-        top->trace (tfp, 99);
+        top->trace(tfp, 99);  // Trace 99 levels of hierarchy
-        mkdir("logs", 0777);
+        Verilated::mkdir("logs");
-        tfp->open ("logs/vlt_dump.vcd");
+        tfp->open("logs/vlt_dump.vcd");
    }
 #endif
@@ -107,13 +115,15 @@ int sc_main(int argc, char* argv[]) {
        // Flush the wave files each cycle so we can immediately see the output
        // Don't do this in "real" programs, do it in an abort() handler instead
        if (tfp) tfp->flush();
 #endif
        // Apply inputs
        if (VL_TIME_Q() > 1 && VL_TIME_Q() < 10) {
-            reset_l = !1;       // Assert reset
+            reset_l = !1;  // Assert reset
        } else if (VL_TIME_Q() > 1) {
-            reset_l = !0;       // Deassert reset
+            reset_l = !0;  // Deassert reset
        }
-#endif
+
        // Simulate 1ns
 #if (SYSTEMC_VERSION>=20070314)
        sc_start(1,SC_NS);
@@ -122,20 +132,23 @@ int sc_main(int argc, char* argv[]) {
 #endif
    }
    //  Close Waves
 #if VM_TRACE
    if (tfp) tfp->close();
 #endif
    // Final model cleanup
    top->final();
    // Close trace if opened
 #if VM_TRACE
    if (tfp) { tfp->close(); tfp = NULL; }
 #endif
    //  Coverage analysis (since test passed)
 #if VM_COVERAGE
-    mkdir("logs", 0777);
+    Verilated::mkdir("logs");
    VerilatedCov::write("logs/coverage.dat");
 #endif
    // Destroy model
    delete top; top = NULL;
    // Fin
    return 0;
 }
@@ -1,7 +1,8 @@
 // DESCRIPTION: Verilator: Verilog Test module
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2003 by Wilson Snyder.
+// any use, without warranty, 2003 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 // ======================================================================
 module sub
@@ -49,7 +50,7 @@ module sub
   // An example assertion
   always_ff @ (posedge clk) begin
-      AssertionExample: assert (!reset_l || count_c<100);
+      AssertionExample: assert(!reset_l || count_c<100);
   end
   // And example coverage analysis
@@ -1,11 +1,12 @@
 // DESCRIPTION: Verilator: Verilog example module
 //
-// This file ONLY is placed into the Public Domain, for any use,
+// This file ONLY is placed under the Creative Commons Public Domain, for
-// without warranty, 2003 by Wilson Snyder.
+// any use, without warranty, 2003 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 // ======================================================================
 // This is intended to be a complex example of several features, please also
-// see the simpler examples/hello_world_c.
+// see the simpler examples/make_hello_c.
 module top
  (
@@ -14,18 +15,18 @@ module top
   input         fastclk,
   input         reset_l,
-   output [1:0]  out_small,
+   output wire [1:0]  out_small,
-   output [39:0] out_quad,
+   output wire [39:0] out_quad,
-   output [69:0] out_wide,
+   output wire [69:0] out_wide,
   input [1:0]   in_small,
   input [39:0]  in_quad,
   input [69:0]  in_wide
   );
   // Connect up the outputs, using some trivial logic
-   wire [1:0]    out_small = ~reset_l ? '0 : (in_small + 2'b1);
+   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
-   wire [39:0]   out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
-   wire [69:0]   out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
   // And an example sub module. The submodule will print stuff.
   sub sub (/*AUTOINST*/
@@ -1,119 +0,0 @@
 // DESCRIPTION: Verilator: Verilog example module
 //
 // This file ONLY is placed into the Public Domain, for any use,
 // without warranty, 2017 by Wilson Snyder.
 //======================================================================
 // Include common routines
 #include <verilated.h>
 #include <sys/stat.h>  // mkdir
 // Include model header, generated from Verilating "top.v"
 #include "Vtop.h"
 // If "verilator --trace" is used, include the tracing class
 #if VM_TRACE
 # include <verilated_vcd_c.h>
 #endif
 // Current simulation time (64-bit unsigned)
 vluint64_t main_time = 0;
 // Called by $time in Verilog
 double sc_time_stamp () {
    return main_time; // Note does conversion to real, to match SystemC
 }
 int main(int argc, char** argv, char** env) {
    // This is a more complicated example, please also see the simpler examples/hello_world_c.
    // Prevent unused variable warnings
    if (0 && argc && argv && env) {}
    // Pass arguments so Verilated code can see them, e.g. $value$plusargs
    Verilated::commandArgs(argc, argv);
    // Set debug level, 0 is off, 9 is highest presently used
    Verilated::debug(0);
    // Randomization reset policy
    Verilated::randReset(2);
    // Construct the Verilated model, from Vtop.h generated from Verilating "top.v"
    Vtop* top = new Vtop; // Or use a const unique_ptr, or the VL_UNIQUE_PTR wrapper
 #if VM_TRACE
    // If verilator was invoked with --trace argument,
    // and if at run time passed the +trace argument, turn on tracing
    VerilatedVcdC* tfp = NULL;
    const char* flag = Verilated::commandArgsPlusMatch("trace");
    if (flag && 0==strcmp(flag, "+trace")) {
        Verilated::traceEverOn(true);  // Verilator must compute traced signals
        VL_PRINTF("Enabling waves into logs/vlt_dump.vcd...\n");
        tfp = new VerilatedVcdC;
        top->trace(tfp, 99);  // Trace 99 levels of hierarchy
        mkdir("logs", 0777);
        tfp->open("logs/vlt_dump.vcd");  // Open the dump file
    }
 #endif
    // Set some inputs
    top->reset_l = !0;
    top->fastclk = 0;
    top->clk = 0;
    top->in_small = 1;
    top->in_quad = 0x1234;
    top->in_wide[0] = 0x11111111;
    top->in_wide[1] = 0x22222222;
    top->in_wide[2] = 0x3;
    // Simulate until $finish
    while (!Verilated::gotFinish()) {
        main_time++;  // Time passes...
        // Toggle clocks and such
        top->fastclk = !top->fastclk;
        if ((main_time % 10) == 3) {
            top->clk = 1;
        }
        if ((main_time % 10) == 8) {
            top->clk = 0;
        }
        if (main_time > 1 && main_time < 10) {
            top->reset_l = !1;  // Assert reset
        } else {
            top->reset_l = !0;  // Deassert reset
        }
        // Assign some other inputs
        top->in_quad += 0x12;
        // Evaluate model
        top->eval();
        // Read outputs
        VL_PRINTF ("[%" VL_PRI64 "d] clk=%x rstl=%x iquad=%" VL_PRI64 "x"
                   " -> oquad=%" VL_PRI64"x owide=%x_%08x_%08x\n",
                   main_time, top->clk, top->reset_l, top->in_quad,
                   top->out_quad, top->out_wide[2], top->out_wide[1], top->out_wide[0]);
    }
    // Final model cleanup
    top->final();
    // Close trace if opened
 #if VM_TRACE
    if (tfp) { tfp->close(); }
 #endif
    //  Coverage analysis (since test passed)
 #if VM_COVERAGE
    mkdir("logs", 0777);
    VerilatedCov::write("logs/coverage.dat");
 #endif
    // Destroy model
    delete top; top = NULL;
    // Fin
    exit(0);
 }
@@ -0,0 +1,6 @@
 obj_*
 copied
 *.csv
 *.dot
 *.dmp
 *.pdf
@@ -0,0 +1,63 @@
 ######################################################################
 #
 # DESCRIPTION: Verilator Example: XML tests
 #
 # Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 #
 ######################################################################
 # This makefile is not intended to be useful as an example itself,
 # it is just to run the small example scripts in this directory.
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator
 else
 export VERILATOR_ROOT
 VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 DOT = dot
 PYTHON = python3
 PYTHON_VERSION := $(shell ${PYTHON} --version 2>&1)
 PYTHON_VERSION_FULL := $(wordlist 2,4,$(subst ., ,${PYTHON_VERSION}))
 PYTHON_VERSION_MAJOR := $(word 1,${PYTHON_VERSION_FULL})
 PYTHON_VERSION_MINOR := $(word 2,${PYTHON_VERSION_FULL})
 PYTHON_GE_3_5 := $(shell [ ${PYTHON_VERSION_MAJOR} -eq 3 -a ${PYTHON_VERSION_MINOR} -ge 5 ] && echo true)
 ifeq (${PYTHON_GE_3_5},true)
 default: test
 else
 default: python_message
 endif
 python_message:
 	@echo "Found Python version ${PYTHON_VERSION}, but require >= 3.5"
 test: \
 	test-vl_file_copy \
 	test-vl_hier_graph \
 test-vl_file_copy:
 	@echo "-- vl_file_copy example"
 	$(PYTHON) vl_file_copy -odir copied top.v
 	@cmp copied/top.v top.v
 	@cmp copied/sub.v sub.v
 test-vl_hier_graph:
 	@echo "-- vl_hier_graph example"
 	$(PYTHON) vl_hier_graph -o graph.dot top.v
 	@echo "Manually run: " $(DOT) -Tpdf -o graph.pdf graph.dot
 ######################################################################
 maintainer-copy::
 clean mostlyclean distclean maintainer-clean::
 	-rm -rf obj_dir *.log *.csv *.dmp *.dot *.vpd *.pdf core copied
@@ -0,0 +1,18 @@
 // DESCRIPTION: Verilator: Verilog Test module
 //
 // This file ONLY is placed under the Creative Commons Public Domain, for
 // any use, without warranty, 2019 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 // ======================================================================
 module sub
  #(parameter type TYPE_t = logic)
   (
    input TYPE_t in,
    output TYPE_t out
    );
   // Some simple logic
   always_comb out = ~ in;
 endmodule
@@ -0,0 +1,33 @@
 // DESCRIPTION: Verilator: Verilog example module
 //
 // This file ONLY is placed under the Creative Commons Public Domain, for
 // any use, without warranty, 2019 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 // ======================================================================
 module top
  (
   input         clk,
   input         fastclk,
   input         reset_l,
   output wire [1:0]  out_small,
   output wire [39:0] out_quad,
   output wire [69:0] out_wide,
   input [1:0]   in_small,
   input [39:0]  in_quad,
   input [69:0]  in_wide
   );
   sub #(.TYPE_t(logic [1:0])) sub_small
     (.in(in_small),
      .out(out_small));
   sub #(.TYPE_t(logic [39:0])) sub_quad
     (.in(in_quad),
      .out(out_quad));
   sub #(.TYPE_t(logic [69:0])) sub_wide
     (.in(in_wide),
      .out(out_wide));
 endmodule
@@ -0,0 +1,114 @@
 #!/usr/bin/env python3
 # -*- Python -*- See copyright, etc below
 ######################################################################
 import argparse
 import os
 import re
 import subprocess
 import sys
 import tempfile
 import xml.etree.ElementTree as ET
 from shutil import copy2
 from pprint import pprint,pformat
 #######################################################################
 class VlFileCopy:
    def __init__(self,
                 verilator_args,  # presently all verilator options are passed-thru
                 # ideally this script would check against options mentioned in help
                 debug=0,
                 output_dir='copied'):  # directory name we output file uses
        self.debug = debug
        xml_temp = tempfile.NamedTemporaryFile()
        args = ['--xml-output', xml_temp.name,
                '--bbox-sys',  # Parse some stuff can't translate
                '--bbox-unsup',
                '--prefix vlxml']  # So we know name of .xml output
        args += verilator_args
        self.run_verilator(args)
        self.tree = ET.parse(xml_temp.name)
        os.makedirs(output_dir, 0o777, True)
        # Find and copy the files
        root = self.tree.getroot()
        xfiles = root.find('files')
        for xfile in xfiles.findall('file'):
            filename = xfile.get('filename')
            if not re.match('^<', filename):  # e.g. <built-in>
                if self.debug:
                    print("\tcp %s %s" % (filename, output_dir))
                copy2(filename, output_dir)
    def run_verilator(self, args):
        """Run Verilator command, check errors"""
        if os.getenv("VERILATOR_ROOT"):
            command = os.getenv("VERILATOR_ROOT") + "/bin/verilator"
        else:
            command = "verilator"
        command += ' ' + ' '.join(args)
        if self.debug:
            print("\t%s " % command)
        status = subprocess.call(command, shell=True)
        if status != 0:
            raise Exception("Command failed running Verilator with '"+command+"', stopped")
 #######################################################################
 if __name__=='__main__':
    parser = argparse.ArgumentParser(
        allow_abbrev=False,
        formatter_class=argparse.RawTextHelpFormatter,
        description=
 """Example of using Verilator XML output to copy a list of files to an
 output directory (-odir, defaults to 'copied'), e.g. to easily create a
 tarball of the design to pass to others.
 Example usage:
     vl_file_copy -f input.vc top.v -odir mycopy
     # This will make at least mycopy/top.v
 """,
        epilog=
 """All other arguments are pass-thru to Verilator: e.g.:
  +define+<var>=<value>      Set preprocessor define
  -F <file>                  Parse options from a file, relatively
  -f <file>                  Parse options from a file
  -G<name>=<value>           Overwrite toplevel parameter
  +incdir+<dir>              Directory to search for includes
  +libext+<ext>+[ext]...     Extensions for finding modules
  -v <filename>              Verilog library
  -y <dir>                   Directory to search for modules
 This file ONLY is placed under the Creative Commons Public Domain, for
 any use, without warranty, 2019 by Wilson Snyder.
 SPDX-License-Identifier: CC0-1.0
 """
    )
    parser.add_argument('-debug', '--debug',
                        action='store_const', const=9,
                        help='enable debug')
    parser.add_argument('-odir', '--odir',
                        action='store', metavar='directory', required=True,
                        help='target output directory')
    (args, rem) = parser.parse_known_args()
    print("NOTE: vl_file_copy is only an example starting point for writing your own tool.")
    # That is:
    # 1. We will accept basic patches
    # 2. We are not expecting to make this globally useful. (e.g. we don't cleanup obj_dir)
    # 3. "make install" will not install this.
    # 4. This has not had production-worthy validation.
    fc = VlFileCopy(output_dir = args.odir,
                    debug = args.debug,
                    verilator_args = rem)
 ######################################################################
 ### Local Variables:
 ### compile-command: "./vl_file_copy -h ; VERILATOR_ROOT=$V4 ./vl_file_copy +define+thru top.v"
 ### End:
@@ -0,0 +1,138 @@
 #!/usr/bin/env python3
 # -*- Python -*- See copyright, etc below
 ######################################################################
 import argparse
 import os
 import re
 import subprocess
 import sys
 import tempfile
 import xml.etree.ElementTree as ET
 from shutil import copy2
 from pprint import pprint,pformat
 #######################################################################
 class VlHierGraph:
    def __init__(self,
                 verilator_args,  # presently all verilator options are passed-thru
                 # ideally this script would check against options mentioned in help
                 debug=0,
                 output_filename='graph.dot'):  # output filename
        self.debug = debug
        self.next_vertex_number = 0
        self.name_to_number = {}
        xml_temp = tempfile.NamedTemporaryFile()
        args = ['--xml-output', xml_temp.name,
                '--bbox-sys',  # Parse some stuff can't translate
                '--bbox-unsup',
                '--prefix vlxml']  # So we know name of .xml output
        args += verilator_args
        self.run_verilator(args)
        self.tree = ET.parse(xml_temp.name)
        with open(output_filename, "w") as fh:
            # For more serious purposes, use the python graphviz package instead
            fh.write("digraph {\n")
            fh.write("  dpi=300;\n")
            fh.write("  order=LR;\n")
            fh.write("  node [fontsize=8 shape=\"box\" margin=0.01 width=0 height=0]")
            fh.write("  edge [fontsize=6]")
            # Find cells
            root = self.tree.getroot()
            netlist = root.find('netlist')
            for module in netlist.findall('module'):
                # origNames are before parameterization, name if after
                mod_name = module.get('name')
                mod_number = self.name_to_vertex_number(mod_name)
                fh.write("  n%d [label=\"%s\""
                         % (mod_number, mod_name))
                if module.get('topModule'):
                    fh.write(" color=\"red\" rank=1")
                fh.write("];\n")
                for instance in module.findall('instance'):
                    inst_name = instance.get('name')
                    def_name = instance.get('defName')
                    def_number = self.name_to_vertex_number(def_name)
                    fh.write("  n%d->n%d [label=\"%s\"];\n"
                             % (mod_number, def_number, inst_name));
            fh.write("}\n")
    def name_to_vertex_number(self, name):
        if not name in self.name_to_number:
            self.next_vertex_number += 1
            self.name_to_number[name] = self.next_vertex_number
        return self.name_to_number[name]
    def run_verilator(self, args):
        """Run Verilator command, check errors"""
        if os.getenv("VERILATOR_ROOT"):
            command = os.getenv("VERILATOR_ROOT") + "/bin/verilator"
        else:
            command = "verilator"
        command += ' ' + ' '.join(args)
        if self.debug:
            print("\t%s " % command)
        status = subprocess.call(command, shell=True)
        if status != 0:
            raise Exception("Command failed running Verilator with '"+command+"', stopped")
 #######################################################################
 if __name__=='__main__':
    parser = argparse.ArgumentParser(
        allow_abbrev=False,
        formatter_class=argparse.RawTextHelpFormatter,
        description=
 """Example of using Verilator XML output to create a .dot file showing the
 design module hierarchy.
 Example usage:
     vl_hier_graph -f input.vc top.v -o graph.dot
     dot -Tpdf -o graph.pdf graph.dot
 """,
        epilog=
 """All other arguments are pass-thru to Verilator: e.g.:
  +define+<var>=<value>      Set preprocessor define
  -F <file>                  Parse options from a file, relatively
  -f <file>                  Parse options from a file
  -G<name>=<value>           Overwrite toplevel parameter
  +incdir+<dir>              Directory to search for includes
  +libext+<ext>+[ext]...     Extensions for finding modules
  -v <filename>              Verilog library
  -y <dir>                   Directory to search for modules
 This file ONLY is placed under the Creative Commons Public Domain, for
 any use, without warranty, 2019 by Wilson Snyder.
 SPDX-License-Identifier: CC0-1.0
 """
    )
    parser.add_argument('-debug', '--debug',
                        action='store_const', const=9,
                        help='enable debug')
    parser.add_argument('-o', '--o',
                        action='store', metavar='filename', required=True,
                        help='output filename')
    (args, rem) = parser.parse_known_args()
    print("NOTE: vl_hier_graph is only an example starting point for writing your own tool.")
    # That is:
    # 1. We will accept basic patches
    # 2. We are not expecting to make this globally useful. (e.g. we don't cleanup obj_dir)
    # 3. "make install" will not install this.
    # 4. This has not had production-worthy validation.
    fc = VlHierGraph(output_filename = args.o,
                     debug = args.debug,
                     verilator_args = rem)
 ######################################################################
 ### Local Variables:
 ### compile-command: "./vl_hier_graph -h ; VERILATOR_ROOT=$V4 ./vl_hier_graph +define+thru top.v"
 ### End:
--- a/Show More
+++ b/Show More
		`@@ -0,0 +1 @@`
							`We appreciate your contributing to Verilator. If this is your first commit, please add your name to docs/CONTRIBUTORS, and read our contributing guidelines in docs/CONTRIBUTING.adoc.`