Fix bad-syntax crashes, bug1579.

Changes

@@ -27,7 +27,7 @@ The contributors that suggested a given feature are shown in []. Thanks!
 ****  Fix multithreaded yield behavior when no work.  [Patrick Stewart]
 
 ****  Fix bad-syntax crashes, bug1548, bug1550-1553, bug1557-1560, bug1563,
-      bug1573-1577, bug1582-1591. [Eric Rippey]
+      bug1573-1577, bug1579, bug1582-1591. [Eric Rippey]
 
 ****  Fix false CMPCONST/UNSIGNED warnings on "inside", bug1581. [Mitch Hayenga]
 

src/V3Width.cpp

@@ -1562,6 +1562,7 @@ private:
         userIterateChildren(nodep, WidthVP(SELF, BOTH).p());
         if (debug()>=9) nodep->dumpTree("-mbs-ic: ");
         // Find the fromp dtype - should be a class
+        if (!nodep->fromp()->dtypep()) nodep->fromp()->v3fatalSrc("Unlinked data type");
         AstNodeDType* fromDtp = nodep->fromp()->dtypep()->skipRefToEnump();
         UINFO(9,"     from dt "<<fromDtp<<endl);
         AstMemberDType* memberp = NULL;  // NULL=error below

test_regress/t/t_fuzz_triand_bad.out

@@ -0,0 +1,9 @@
+%Error: t/t_fuzz_triand_bad.v:7: Unsupported: Member call on non-enum object 'VARREF 'g'' which is a 'BASICDTYPE 'logic''
+                               : ... In instance t
+   tri g=g.and.g;
+           ^~~
+%Error: Internal Error: t/t_fuzz_triand_bad.v:7: ../V3Width.cpp:#: Unlinked data type
+                                               : ... In instance t
+   tri g=g.and.g;
+           ^~~
+                        ... See the manual and http://www.veripool.org/verilator for more assistance.

test_regress/t/t_fuzz_triand_bad.pl

@@ -0,0 +1,18 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_fuzz_triand_bad.v

@@ -0,0 +1,8 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Wilson Snyder.
+
+module t ();
+   tri g=g.and.g;
+endmodule