Tests: Rename

test_regress/t/t_trace_two_a.v

@@ -1,7 +1,7 @@
 // DESCRIPTION: Verilator: Verilog Test module
 //
 // This file ONLY is placed into the Public Domain, for any use,
-// without warranty, 2005 by Wilson Snyder.
+// without warranty, 2020 by Wilson Snyder.
 
 module t (/*AUTOARG*/
    // Inputs
@@ -16,10 +16,10 @@ module t (/*AUTOARG*/
    sub sub ();
 
    always @ (posedge clk) begin
-      if (cyc!=0) begin
+      if (cyc != 0) begin
          cyc <= cyc + 1;
          c_trace_on <= cyc + 2;
-         if (cyc==10) begin
+         if (cyc == 10) begin
             $write("*-* All Finished *-*\n");
             $finish;
          end

test_regress/t/t_trace_two_b.v

@@ -1,7 +1,7 @@
 // DESCRIPTION: Verilator: Verilog Test module
 //
 // This file ONLY is placed into the Public Domain, for any use,
-// without warranty, 2005 by Wilson Snyder.
+// without warranty, 2020 by Wilson Snyder.
 
 module t (/*AUTOARG*/
    // Inputs
@@ -17,7 +17,7 @@ module t (/*AUTOARG*/
    sub sub ();
 
    always @ (posedge clk) begin
-      if (cyc!=0) begin
+      if (cyc != 0) begin
          r <= r + 0.1;
       end
    end

test_regress/t/t_trace_two_hdr_cc.pl

@@ -23,7 +23,7 @@ compile(
 compile(
     make_main => 0,
     top_filename => 't_trace_two_a.v',
-    verilator_flags2 => ['-exe', '-trace', "$Self->{t_dir}/t_trace_two_cc.cpp"],
+    verilator_flags2 => ['-exe', '-trace', "$Self->{t_dir}/t_trace_two_hdr_cc.cpp"],
     );
 
 execute(
@@ -31,7 +31,7 @@ execute(
     );
 
 if ($Self->{vlt_all}) {
-    file_grep     ("$Self->{obj_dir}/simx.vcd", qr/\$enddefinitions/x);
+    file_grep("$Self->{obj_dir}/simx.vcd", qr/\$enddefinitions/x);
     vcd_identical("$Self->{obj_dir}/simx.vcd", $Self->{golden_filename});
 }
 

test_regress/t/t_trace_two_hdr_sc.pl

@@ -27,7 +27,7 @@ else {
         make_main => 0,
         top_filename => 't_trace_two_a.v',
         verilator_flags2 => ['-sc', '-exe', '-trace',
-                             "$Self->{t_dir}/t_trace_two_sc.cpp"],
+                             "$Self->{t_dir}/t_trace_two_hdr_sc.cpp"],
         );
 
     execute(
@@ -35,7 +35,7 @@ else {
         );
 
     if ($Self->{vlt_all}) {
-        file_grep     ("$Self->{obj_dir}/simx.vcd", qr/\$enddefinitions/x);
+        file_grep("$Self->{obj_dir}/simx.vcd", qr/\$enddefinitions/x);
         vcd_identical("$Self->{obj_dir}/simx.vcd", $Self->{golden_filename});
     }
 }