Detect and ignore specify edge expressions

to handle more general combinations of heirarch and bit selects.

.cvsignore

@@ -17,6 +17,7 @@ configure
 Makefile
 check
 check.cc
+check.vvp
 config.status
 config.log
 config.cache

BUGS.txt

@@ -104,7 +104,7 @@ module may not be needed as long as the ``-s <name>'' switch is
 given.
 
 So when you send a test case, ask yourself "Can poor overworked Steve
-invoke the error without any Verilog other then what is included?" And
+invoke the error without any Verilog other than what is included?" And
 while we are at it, please place a copyright notice in your test
 program and include a GPL license statement if you can. Your test
 program may find its way into the test suite, and the notices will
@@ -160,8 +160,11 @@ I must insist that any copyright material submitted for inclusion
 include the GPL license notice as shown in the rest of the source.
 
 
-$Id: BUGS.txt,v 1.4 2003/02/19 04:36:31 steve Exp $
+$Id: BUGS.txt,v 1.5 2007/03/22 16:08:14 steve Exp $
 $Log: BUGS.txt,v $
+Revision 1.5  2007/03/22 16:08:14  steve
+ Spelling fixes from Larry
+
 Revision 1.4  2003/02/19 04:36:31  steve
  Notes on hte bug database.
 

HName.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: HName.cc,v 1.5 2002/11/02 03:27:52 steve Exp $"
+#ident "$Id: HName.cc,v 1.8 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -29,235 +29,107 @@
 # include  <malloc.h>
 #endif
 
+
 hname_t::hname_t()
 {
-      item_ = 0;
-      count_ = 0;
+      number_ = INT_MIN;
 }
 
-hname_t::hname_t(const char*text)
+hname_t::hname_t(perm_string text)
 {
-      item_ = strdup(text);
-      count_ = 1;
+      name_ = text;
+      number_ = INT_MIN;
+}
+
+hname_t::hname_t(perm_string text, int num)
+{
+      name_ = text;
+      number_ = num;
 }
 
 hname_t::hname_t(const hname_t&that)
 {
-      count_ = that.count_;
-      switch (count_) {
-	  case 0:
-	    item_ = 0;
-	    break;
-	  case 1:
-	    item_ = strdup(that.item_);
-	    break;
-	  default:
-	    array_ = new char*[count_];
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  array_[idx] = strdup(that.array_[idx]);
-	    break;
-      }
+      name_ = that.name_;
+      number_ = that.number_;
+}
+
+hname_t& hname_t::operator = (const hname_t&that)
+{
+      name_ = that.name_;
+      number_ = that.number_;
+      return *this;
 }
 
 hname_t::~hname_t()
 {
-      switch (count_) {
-	  case 0:
-	    break;
-	  case 1:
-	    free(item_);
-	    break;
-	  default:
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  free(array_[idx]);
-	    delete[]array_;
-	    break;
-      }
 }
 
-unsigned hname_t::component_count() const
+perm_string hname_t::peek_name(void) const
 {
-      return count_;
+      return name_;
 }
 
-void hname_t::append(const char*text)
+bool hname_t::has_number() const
 {
-      char**tmp;
-
-      switch (count_) {
-	  case 0:
-	    count_ = 1;
-	    item_ = strdup(text);
-	    break;
-	  case 1:
-	    count_ = 2;
-	    tmp = new char*[2];
-	    tmp[0] = item_;
-	    tmp[1] = strdup(text);
-	    array_ = tmp;
-	    break;
-	  default:
-	    tmp = new char*[count_+1];
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  tmp[idx] = array_[idx];
-	    delete[]array_;
-	    array_ = tmp;
-	    array_[count_] = strdup(text);
-	    count_ += 1;
-      }
+      return number_ != INT_MIN;
 }
 
-void hname_t::prepend(const char*text)
+int hname_t::peek_number() const
 {
-      char**tmp;
-
-      switch (count_) {
-	  case 0:
-	    count_ = 1;
-	    item_ = strdup(text);
-	    break;
-	  case 1:
-	    count_ = 2;
-	    tmp = new char*[2];
-	    tmp[0] = strdup(text);
-	    tmp[1] = item_;
-	    array_ = tmp;
-	    break;
-	  default:
-	    tmp = new char*[count_+1];
-	    tmp[0] = strdup(text);
-	    for (unsigned idx = 0 ;  idx < count_ ;  idx += 1)
-		  tmp[idx+1] = array_[idx];
-	    delete[]array_;
-	    array_ = tmp;
-	    count_ += 1;
-      }
-}
-
-char* hname_t::remove_tail_name()
-{
-      if (count_ == 0)
-	    return 0;
-
-      if (count_ == 1) {
-	    char*tmp = item_;
-	    count_ = 0;
-	    item_ = 0;
-	    return tmp;
-      }
-
-      if (count_ == 2) {
-	    char*tmp1 = array_[0];
-	    char*tmp2 = array_[1];
-	    delete[]array_;
-	    count_ = 1;
-	    item_ = tmp1;
-	    return tmp2;
-      }
-
-      char*tmpo = array_[count_-1];
-      char**tmpa = new char*[count_-1];
-      for (unsigned idx = 0 ;  idx < count_-1 ;  idx += 1)
-	    tmpa[idx] = array_[idx];
-
-      delete[]array_;
-      array_ = tmpa;
-      count_ -= 1;
-      return tmpo;
-}
-
-const char* hname_t::peek_name(unsigned idx) const
-{
-      if (idx >= count_)
-	    return 0;
-
-      if (count_ == 1)
-	    return item_;
-
-      return array_[idx];
-}
-
-const char* hname_t::peek_tail_name() const
-{
-      switch (count_) {
-	  case 0:
-	    return 0;
-	  case 1:
-	    return item_;
-	  default:
-	    return array_[count_-1];
-      }
+      return number_;
 }
 
 bool operator < (const hname_t&l, const hname_t&r)
 {
-      unsigned idx = 0;
-      const char*lc = l.peek_name(idx);
-      const char*rc = r.peek_name(idx);
-
-      while (lc && rc) {
-	    int cmp = strcmp(lc, rc);
-	    if (cmp < 0)
-		  return true;
-	    if (cmp > 0)
-		  return false;
-	    idx += 1;
-	    lc = l.peek_name(idx);
-	    rc = r.peek_name(idx);
-      }
-
-      if (lc && !rc)
+      int cmp = strcmp(l.peek_name(), r.peek_name());
+      if (cmp < 0) return true;
+      if (cmp > 0) return false;
+      if (l.has_number() && r.has_number())
+	    return l.peek_number() < r.peek_number();
+      else
 	    return false;
-      if (rc && !lc)
-	    return true;
-
-	// Must be ==
-      return false;
 }
 
 bool operator == (const hname_t&l, const hname_t&r)
 {
-      unsigned idx = 0;
-      const char*lc = l.peek_name(idx);
-      const char*rc = r.peek_name(idx);
-
-      while (lc && rc) {
-	    int cmp = strcmp(lc, rc);
-	    if (cmp != 0)
-		  return false;
-	    idx += 1;
-	    lc = l.peek_name(idx);
-	    rc = r.peek_name(idx);
+      if (l.peek_name() == r.peek_name()) {
+	    if (l.has_number() && r.has_number())
+		  return l.peek_number() == r.peek_number();
+	    else
+		  return true;
       }
 
-      if (lc || rc)
-	    return false;
-
-	// Must be ==
-      return true;
+      return false;
 }
 
+bool operator != (const hname_t&l, const hname_t&r)
+{ return ! (l==r); }
+
 ostream& operator<< (ostream&out, const hname_t&that)
 {
-      switch (that.count_) {
-	  case 0:
+      if (that.peek_name() == 0) {
 	    out << "";
 	    return out;
-	  case 1:
-	    out << that.item_;
-	    return out;
-
-	  default:
-	    out << that.array_[0];
-	    for (unsigned idx = 1 ;  idx < that.count_ ;  idx += 1)
-		  out << "." << that.array_[idx];
-
-	    return out;
       }
+
+      out << that.peek_name();
+      if (that.has_number())
+	    out << "[" << that.peek_number() << "]";
+
+      return out;
 }
 
 /*
  * $Log: HName.cc,v $
+ * Revision 1.8  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.7  2007/05/16 19:12:33  steve
+ *  Fix hname_t use of space for 1 perm_string.
+ *
+ * Revision 1.6  2007/04/26 03:06:21  steve
+ *  Rework hname_t to use perm_strings.
+ *
  * Revision 1.5  2002/11/02 03:27:52  steve
  *  Allow named events to be referenced by
  *  hierarchical names.

HName.h

@@ -1,7 +1,7 @@
 #ifndef __HName_H
 #define __HName_H
 /*
- * Copyright (c) 2001 Stephen Williams ([email protected])
+ * Copyright (c) 2001-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -19,10 +19,11 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: HName.h,v 1.4 2002/11/02 03:27:51 steve Exp $"
+#ident "$Id: HName.h,v 1.7 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include  <iostream>
+# include  "StringHeap.h"
 #ifdef __GNUC__
 #if __GNUC__ > 2
 using namespace std;
@@ -30,59 +31,56 @@ using namespace std;
 #endif
 
 /*
- * This class represents a Verilog hierarchical name. A hierarchical
- * name is an ordered list of simple names.
+ * This class represents a component of a Verilog hierarchical name. A
+ * hierarchical component contains a name string (prepresented here
+ * with a perm_string) and an optional signed number. This signed
+ * number is used if the scope is part of an array, for example an
+ * array of module instances or a loop generated scope.
  */
 
 class hname_t {
 
     public:
       hname_t ();
-      explicit hname_t (const char*text);
+      explicit hname_t (perm_string text);
+      explicit hname_t (perm_string text, int num);
       hname_t (const hname_t&that);
       ~hname_t();
 
-	// This method adds a name to the end of the hierarchical
-	// path. This becomes a new base name.
-      void append(const char*text);
+      hname_t& operator= (const hname_t&);
 
-	// This method adds a name to the *front* of the hierarchical
-	// path. The base name remains the same, unless this is the
-	// only component.
-      void prepend(const char*text);
+	// Return the string part of the hname_t.
+      perm_string peek_name(void) const;
 
-	// This method removes the tail name from the hierarchy, and
-	// returns a pointer to that tail name. That tail name now
-	// must be removed by the caller.
-      char* remove_tail_name();
-
-	// Return the given component in the hierarchical name. If the
-	// idx is too large, return 0.
-      const char*peek_name(unsigned idx) const;
-      const char*peek_tail_name() const;
-
-	// Return the number of components in the hierarchical
-	// name. If this is a simple name, this will return 1.
-      unsigned component_count() const;
-
-      friend ostream& operator<< (ostream&, const hname_t&);
+      bool has_number() const;
+      int peek_number() const;
 
     private:
-      union {
-	    char**array_;
-	    char* item_;
-      };
-      unsigned count_;
+      perm_string name_;
+	// If the number is anything other then INT_MIN, then this is
+	// the numeric part of the name. Otherwise, it is not part of
+	// the name at all.
+      int number_;
 
     private: // not implemented
-      hname_t& operator= (const hname_t&);
 };
 
 extern bool operator <  (const hname_t&, const hname_t&);
 extern bool operator == (const hname_t&, const hname_t&);
+extern bool operator != (const hname_t&, const hname_t&);
+extern ostream& operator<< (ostream&, const hname_t&);
 
 /*
  * $Log: HName.h,v $
+ * Revision 1.7  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.6  2007/05/16 19:12:33  steve
+ *  Fix hname_t use of space for 1 perm_string.
+ *
+ * Revision 1.5  2007/04/26 03:06:21  steve
+ *  Rework hname_t to use perm_strings.
+ *
  * Revision 1.4  2002/11/02 03:27:51  steve
  *  Allow named events to be referenced by
  *  hierarchical names.

LineInfo.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: LineInfo.cc,v 1.4.2.1 2005/08/13 00:45:53 steve Exp $"
+#ident "$Id: LineInfo.cc,v 1.4 2003/01/17 05:49:03 steve Exp $"
 #endif
 
 # include "config.h"
@@ -34,12 +34,12 @@ LineInfo::~LineInfo()
 {
 }
 
-std::string LineInfo::get_line() const
+string LineInfo::get_line() const
 {
-      std::ostringstream buf;
+      ostringstream buf;
       buf << (file_? file_ : "") << ":" << lineno_;
 
-      std::string res = buf.str();
+      string res = buf.str();
       return res;
 }
 
@@ -61,9 +61,6 @@ void LineInfo::set_lineno(unsigned n)
 
 /*
  * $Log: LineInfo.cc,v $
- * Revision 1.4.2.1  2005/08/13 00:45:53  steve
- *  Fix compilation warnings/errors with newer compilers.
- *
  * Revision 1.4  2003/01/17 05:49:03  steve
  *  Use stringstream in place of sprintf.
  *

LineInfo.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: LineInfo.h,v 1.7.2.2 2005/08/13 00:45:53 steve Exp $"
+#ident "$Id: LineInfo.h,v 1.8 2005/06/14 19:13:43 steve Exp $"
 #endif
 
 # include  <string>
@@ -40,7 +40,7 @@ class LineInfo {
       LineInfo();
       ~LineInfo();
 
-      std::string get_line() const;
+      string get_line() const;
 
       void set_line(const LineInfo&that);
 
@@ -54,11 +54,8 @@ class LineInfo {
 
 /*
  * $Log: LineInfo.h,v $
- * Revision 1.7.2.2  2005/08/13 00:45:53  steve
- *  Fix compilation warnings/errors with newer compilers.
- *
- * Revision 1.7.2.1  2005/06/14 15:33:54  steve
- *  Fix gcc4 build issues.
+ * Revision 1.8  2005/06/14 19:13:43  steve
+ *  gcc3/4 compile errors.
  *
  * Revision 1.7  2003/01/17 05:49:03  steve
  *  Use stringstream in place of sprintf.

Makefile.in

@@ -16,16 +16,16 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.169.2.7 2007/05/30 17:48:53 steve Exp $"
+#ident "$Id: Makefile.in,v 1.181 2007/05/24 04:07:11 steve Exp $"
 #
 #
 SHELL = /bin/sh
 
-# This string is used as an installation suffix. It modifies certain
-# key install paths/files such that a build and install of Icarus Verilog
-# with the same $(prefix) but a different $(suffix) will not interfere.
-# The normal configuratin leaves suffix empty
-suffix = @install_suffix@
+# This version string is only used in the version message printed
+# by the compiler. It reflects the assigned version number for the
+# product as a whole. Most components also print the CVS Name: token
+# in order to get a more automatic version stamp as well.
+VERSION = 0.9.devel
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -37,15 +37,12 @@ VPATH = $(srcdir)
 
 bindir = @bindir@
 libdir = @libdir@
-# This is actually the directory where we install our own header files.
-# It is a little different from the generic includedir.
-includedir = @includedir@/iverilog$(suffix)
+includedir = @includedir@
 mandir = @mandir@
 
 libdir64 = @libdir64@
 
 dllib=@DLLIB@
-strip_dynamic=@strip_dynamic@
 
 CC = @CC@
 CXX = @CXX@
@@ -53,32 +50,23 @@ INSTALL = @INSTALL@
 INSTALL_SCRIPT = @INSTALL_SCRIPT@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
-STRIP = @STRIP@
 LEX = @LEX@
 YACC = @YACC@
-MAN = @MAN@
-PS2PDF = @PS2PDF@
 
 CPPFLAGS = @ident_support@ @DEFS@ -I. -I$(srcdir) @CPPFLAGS@
 CXXFLAGS = -Wall @CXXFLAGS@
 PICFLAGS = @PICFLAG@
 LDFLAGS = @rdynamic@ @LDFLAGS@
 
-# The TARGETS variable lists the target modules that can be build and
-# installed. Some of them depend on external things, so are only
-# compiled if the prerequisites are installed.
-TARGETS = tgt-null
-
 all: dep ivl@EXEEXT@
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
-	for dir in ivlpp tgt-verilog tgt-stub; \
+	for dir in ivlpp ; \
 	    do (cd $$dir ; $(MAKE) $@); done
-	cd driver ; $(MAKE) $@
+	cd driver ; $(MAKE) VERSION=$(VERSION) $@
 
 # In the windows world, the installer will need a dosify program to
 # dosify text files.
-ifeq (@WIN32@,yes)
+ifeq (@MING32@,yes)
 all: dep dosify.exe
 dosify.exe: dosify.c
 	$(CC) -o dosify.exe dosify.c
@@ -94,37 +82,37 @@ check: all
 
 clean:
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
-	for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
+	for dir in vpi ivlpp tgt-verilog tgt-pal driver driver-vpi; \
 	    do (cd $$dir ; $(MAKE) $@); done
 	rm -f *.o parse.cc parse.cc.output parse.h lexor.cc
+	rm -f ivl.exp iverilog-vpi.pdf iverilog-vpi.ps parse.output
+	rm -f syn-rules.output dosify.exe ivl@EXEEXT@ check.vvp
 	rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc*
-	rm -rf dep ivl@EXEEXT@
+	rm -rf dep
 
 distclean: clean
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
-	for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
+	for dir in vpi ivlpp tgt-verilog tgt-pal driver driver-vpi; \
 	    do (cd $$dir ; $(MAKE) $@); done
 	rm -f Makefile config.status config.log config.cache config.h
-	rm -rf autom4te.cache
+	rm -f _pli_types.h
 
-TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-xnf.o
-FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o xnfio.o
+TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o
+FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o
 
 O = main.o async.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
-elab_lval.o elab_net.o elab_anet.o elab_pexpr.o elab_scope.o \
+elab_lval.o elab_net.o elab_pexpr.o elab_scope.o \
 elab_sig.o emit.o eval.o eval_attrib.o \
 eval_tree.o expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
-load_module.o netlist.o NetLatch.o netmisc.o net_assign.o \
+load_module.o netlist.o netmisc.o net_assign.o \
 net_design.o net_event.o net_expr.o net_force.o net_func.o \
 net_link.o net_modulo.o net_nex_input.o net_nex_output.o \
-net_proc.o net_scope.o net_udp.o net_variable.o pad_to_width.o \
-parse.o parse_misc.o pform.o pform_dump.o \
+net_proc.o net_scope.o net_udp.o pad_to_width.o \
+parse.o parse_misc.o pform.o pform_dump.o pform_types.o \
 set_width.o symbol_search.o sync.o sys_funcs.o \
 verinum.o verireal.o target.o targets.o \
-Attrib.o HName.o LineInfo.o Module.o PData.o PDelays.o PEvent.o \
-PExpr.o PGate.o \
+Attrib.o HName.o LineInfo.o Module.o PDelays.o PEvent.o \
+PExpr.o PGate.o PGenerate.o PSpec.o \
 PTask.o PUdp.o PFunction.o PWire.o Statement.o StringHeap.o \
 $(FF) $(TT)
 
@@ -145,7 +133,6 @@ ivl@EXEEXT@: $O ivl.def
 else
 ivl@EXEEXT@: $O
 	$(CXX) $(LDFLAGS) -o ivl@EXEEXT@ $O $(dllib)
-
 endif
 
 ifeq (@MINGW32@,yes)
@@ -155,13 +142,12 @@ all: dep iverilog-vpi
 
 iverilog-vpi: iverilog-vpi.sh
 	sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' \
-	    -e 's;@SUFFIX@;$(suffix);' \
 	    -e 's;@IVCC@;$(CC);' \
 	    -e 's;@IVCXX@;$(CXX);' \
 	    -e 's;@IVCFLAGS@;$(CXXFLAGS);' \
+	    -e 's;@INCLUDEDIR@;@includedir@;' \
 	    -e 's;@LIBDIR64@;@libdir64@;' \
 	    -e 's;@VPIDIR1@;@vpidir1@;' -e 's;@VPIDIR2@;@vpidir2@;' \
-	    -e 's;@INCLUDEDIR@;$(includedir);' \
 	    -e 's;@LIBDIR@;@libdir@;' $< > $@
 	chmod +x $@
 endif
@@ -170,7 +156,7 @@ dep:
 	mkdir dep
 
 %.o: %.cc
-	$(CXX) $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o $(DEBUGFLAGS)
+	$(CXX) $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
 	mv $*.d dep/$*.d
 
 
@@ -194,55 +180,44 @@ lexor_keyword.cc: lexor_keyword.gperf
 	gperf -o -i 7 -C -k 1-3,$$ -L ANSI-C -H keyword_hash -N check_identifier -t $(srcdir)/lexor_keyword.gperf > lexor_keyword.cc || (rm -f lexor_keyword.cc ; false)
 
 iverilog-vpi.ps: $(srcdir)/iverilog-vpi.man
-	$(MAN) -t $(srcdir)/iverilog-vpi.man > iverilog-vpi.ps
+	man -t $(srcdir)/iverilog-vpi.man > iverilog-vpi.ps
 
 iverilog-vpi.pdf: iverilog-vpi.ps
-	$(PS2PDF) iverilog-vpi.ps iverilog-vpi.pdf
+	ps2pdf iverilog-vpi.ps iverilog-vpi.pdf
 
-# Build and install the iverilog-vpi.pdf only if there is a man
-# program *and* a ps2pdf program.
-ifeq (@WIN32@,yes)
-ifeq ($(MAN),none)
-INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
-else
-ifeq ($(PS2PDF),none)
-INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
-else
-INSTALL_DOC = $(prefix)/iverilog-vpi$(suffix).pdf $(mandir)/man1/iverilog-vpi$(suffix).1
-all: dep iverilog-vpi.pdf
-endif
-endif
+ifeq (@MING32@,yes)
+INSTALL_DOC = $(prefix)/iverilog-vpi.pdf $(mandir)/man1/iverilog-vpi.1
 INSTALL_DOCDIR = $(mandir)/man1
+all: dep iverilog-vpi.pdf
 else
-INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
+INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
 INSTALL_DOCDIR = $(mandir)/man1
 endif
 
 ifeq (@MINGW32@,yes)
-WIN32_INSTALL =
+WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/sqrt-virtex.v $(prefix)/QUICK_START.txt
 else
-WIN32_INSTALL = $(bindir)/iverilog-vpi$(suffix)
+WIN32_INSTALL = $(bindir)/iverilog-vpi
 endif
 
-XNF_INSTALL = $(libdir)/ivl$(suffix)/xnf.conf $(libdir)/ivl$(suffix)/xnf-s.conf
+XNF_INSTALL = $(libdir)/ivl/xnf.conf $(libdir)/ivl/xnf-s.conf
 
-install: all installdirs $(libdir)/ivl$(suffix)/ivl@EXEEXT@  $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC) $(XNF_INSTALL)
+install: all installdirs $(libdir)/ivl/ivl@EXEEXT@  $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
 	for dir in vpi ivlpp driver; \
 	    do (cd $$dir ; $(MAKE) $@); done
 
-$(bindir)/iverilog-vpi$(suffix): ./iverilog-vpi
-	$(INSTALL_SCRIPT) ./iverilog-vpi $(DESTDIR)$(bindir)/iverilog-vpi$(suffix)
+$(bindir)/iverilog-vpi: ./iverilog-vpi
+	$(INSTALL_SCRIPT) ./iverilog-vpi $(bindir)/iverilog-vpi
 
-$(libdir)/ivl$(suffix)/ivl@EXEEXT@: ./ivl@EXEEXT@
-	$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(DESTDIR)$(libdir)/ivl$(suffix)/ivl@EXEEXT@
+$(libdir)/ivl/ivl@EXEEXT@: ./ivl@EXEEXT@
+	$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(libdir)/ivl/ivl@EXEEXT@
 
-$(libdir)/ivl$(suffix)/xnf-s.conf: $(srcdir)/xnf-s.conf
-	$(INSTALL_DATA) $(srcdir)/xnf-s.conf $(libdir)/ivl$(suffix)/xnf-s.conf
+$(libdir)/ivl/xnf-s.conf: $(srcdir)/xnf-s.conf
+	$(INSTALL_DATA) $(srcdir)/xnf-s.conf $(libdir)/ivl/xnf-s.conf
 
-$(libdir)/ivl$(suffix)/xnf.conf: $(srcdir)/xnf.conf
-	$(INSTALL_DATA) $(srcdir)/xnf.conf $(libdir)/ivl$(suffix)/xnf.conf
+$(libdir)/ivl/xnf.conf: $(srcdir)/xnf.conf
+	$(INSTALL_DATA) $(srcdir)/xnf.conf $(libdir)/ivl/xnf.conf
 
 $(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
 	$(INSTALL_DATA) $(srcdir)/ivl_target.h $(includedir)/ivl_target.h
@@ -259,32 +234,48 @@ $(includedir)/acc_user.h: $(srcdir)/acc_user.h
 $(includedir)/veriuser.h: $(srcdir)/veriuser.h
 	$(INSTALL_DATA) $(srcdir)/veriuser.h $(includedir)/veriuser.h
 
-$(mandir)/man1/iverilog-vpi$(suffix).1: $(srcdir)/iverilog-vpi.man
-	$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1
+$(mandir)/man1/iverilog-vpi.1: $(srcdir)/iverilog-vpi.man
+	$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(mandir)/man1/iverilog-vpi.1
 
-$(prefix)/iverilog-vpi$(suffix).pdf: iverilog-vpi.pdf
-	$(INSTALL_DATA) iverilog-vpi.pdf $(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf
+$(prefix)/iverilog-vpi.pdf: iverilog-vpi.pdf
+	$(INSTALL_DATA) iverilog-vpi.pdf $(prefix)/iverilog-vpi.pdf
 
+# In windows installations, put a few examples and the quick_start
+# into the destination directory.
+ifeq (@MINGW32@,yes)
+$(prefix)/hello.vl: $(srcdir)/examples/hello.vl
+	./dosify.exe $(srcdir)/examples/hello.vl tmp.vl
+	mv tmp.vl $(prefix)/hello.vl
+
+$(prefix)/sqrt.vl: $(srcdir)/examples/sqrt.vl
+	./dosify.exe $(srcdir)/examples/sqrt.vl tmp.vl
+	mv tmp.vl $(prefix)/sqrt.vl
+
+$(prefix)/sqrt-virtex.v: $(srcdir)/examples/sqrt-virtex.v
+	./dosify.exe $(srcdir)/examples/sqrt-virtex.v tmp.vl
+	mv tmp.vl $(prefix)/sqrt-virtex.v
+
+$(prefix)/QUICK_START.txt: $(srcdir)/QUICK_START.txt
+	./dosify.exe $(srcdir)/QUICK_START.txt tmp.txt
+	mv tmp.txt $(prefix)/QUICK_START.txt
+endif
 
 installdirs: mkinstalldirs
-	$(srcdir)/mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(includedir) $(DESTDIR)$(libdir)/ivl$(suffix) \
-	    $(DESTDIR)$(libdir)/ivl$(suffix)/include $(DESTDIR)$(mandir) $(DESTDIR)$(mandir)/man1
+	$(srcdir)/mkinstalldirs $(bindir) $(includedir) $(libdir)/ivl \
+	    $(mandir) $(mandir)/man1
 
 uninstall:
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
 	for dir in vpi ivlpp driver; \
 	    do (cd $$dir ; $(MAKE) $@); done
 	for f in xnf.conf xnf-s.conf ivl@EXEEXT@; \
-	    do rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/$$f; done
-	-rmdir $(DESTDIR)$(libdir)/ivl$(suffix)/include
-	-rmdir $(DESTDIR)$(libdir)/ivl$(suffix)
-	for f in verilog$(suffix) iverilog-vpi$(suffix); \
-	    do rm -f $(DESTDIR)$(bindir)/$$f; done
+	    do rm -f $(libdir)/ivl/$$f; done
+	-rmdir $(libdir)/ivl
+	for f in verilog iverilog-vpi gverilog@EXEEXT@; \
+	    do rm -f $(bindir)/$$f; done
 	for f in ivl_target.h vpi_user.h _pli_types.h acc_user.h veriuser.h; \
-	    do rm -f $(DESTDIR)$(includedir)/$$f; done
-	-test X$(suffix) = X || rmdir $(DESTDIR)/$(includedir)
-	rm -f $(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1 $(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf
+	    do rm -f $(includedir)/$$f; done
+	rm -f $(mandir)/man1/iverilog-vpi.1 $(prefix)/iverilog-vpi.pdf
 
 
 -include $(patsubst %.o, dep/%.d, $O)

Module.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Module.cc,v 1.25 2004/10/04 01:10:51 steve Exp $"
+#ident "$Id: Module.cc,v 1.27 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
@@ -31,6 +31,7 @@
 Module::Module(perm_string n)
 : name_(n)
 {
+      library_flag = false;
       default_nettype = NetNet::NONE;
 }
 
@@ -110,9 +111,9 @@ unsigned Module::find_port(const char*name) const
 }
 
 
-PWire* Module::get_wire(const hname_t&name) const
+PWire* Module::get_wire(const pform_name_t&name) const
 {
-      map<hname_t,PWire*>::const_iterator obj = wires_.find(name);
+      map<pform_name_t,PWire*>::const_iterator obj = wires_.find(name);
       if (obj == wires_.end())
 	    return 0;
       else
@@ -132,11 +133,6 @@ PGate* Module::get_gate(perm_string name)
       return 0;
 }
 
-const map<hname_t,PWire*>& Module::get_wires() const
-{
-      return wires_;
-}
-
 const list<PGate*>& Module::get_gates() const
 {
       return gates_;
@@ -150,6 +146,13 @@ const list<PProcess*>& Module::get_behaviors() const
 
 /*
  * $Log: Module.cc,v $
+ * Revision 1.27  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.26  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
  * Revision 1.25  2004/10/04 01:10:51  steve
  *  Clean up spurious trailing white space.
  *

Module.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Module.h,v 1.37 2004/06/13 04:56:53 steve Exp $"
+#ident "$Id: Module.h,v 1.43 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include  <list>
@@ -30,11 +30,13 @@
 # include  "named.h"
 # include  "LineInfo.h"
 # include  "netlist.h"
-class PData;
+# include  "pform_types.h"
 class PEvent;
 class PExpr;
 class PEIdent;
 class PGate;
+class PGenerate;
+class PSpecPath;
 class PTask;
 class PFunction;
 class PWire;
@@ -67,6 +69,12 @@ class Module : public LineInfo {
       explicit Module(perm_string name);
       ~Module();
 
+	/* Initially false. This is set to true if the module has been
+	   declared as a library module. This makes the module
+	   ineligible for being chosen as an implicit root. It has no
+	   other effect. */
+      bool library_flag;
+
       NetNet::Type default_nettype;
 
 	/* The module has parameters that are evaluated when the
@@ -91,7 +99,7 @@ class Module : public LineInfo {
 	   new parameters within the module, but may be used to set
 	   values within this module (when instantiated) or in other
 	   instantiated modules. */
-      map<hname_t,PExpr*>defparms;
+      map<pform_name_t,PExpr*>defparms;
 
         /* Parameters may be overridden at instantiation time;
            the overrides do not contain explicit parameter names,
@@ -108,15 +116,22 @@ class Module : public LineInfo {
 	/* Keep a table of named events declared in the module. */
       map<perm_string,PEvent*>events;
 
-	/* Keep a table of datum variables declared in the module. */
-      map<hname_t,PData*>datum;
-
       map<perm_string,PExpr*> attributes;
 
 	/* These are the timescale for this module. The default is
 	   set by the `timescale directive. */
       int time_unit, time_precision;
 
+	/* The module has a list of genvars that may be used in
+	   various generate schemes. */
+      list<perm_string> genvars;
+
+	/* the module has a list of generate schemes that appear in
+	   the module definition. These are used at elaboration time. */
+      list<PGenerate*> generate_schemes;
+
+      list<PSpecPath*> specify_paths;
+
       perm_string mod_name() const { return name_; }
 
       void add_gate(PGate*gate);
@@ -136,24 +151,24 @@ class Module : public LineInfo {
 
 	// Find a wire by name. This is used for connecting gates to
 	// existing wires, etc.
-      PWire* get_wire(const hname_t&name) const;
+      PWire* get_wire(const pform_name_t&name) const;
       PGate* get_gate(perm_string name);
 
-      const map<hname_t,PWire*>& get_wires() const;
       const list<PGate*>& get_gates() const;
       const list<PProcess*>& get_behaviors() const;
 
       void dump(ostream&out) const;
       bool elaborate(Design*, NetScope*scope) const;
 
-      bool elaborate_scope(Design*, NetScope*scope) const;
+      typedef map<perm_string,NetExpr*> replace_t;
+      bool elaborate_scope(Design*, NetScope*scope, const replace_t&rep) const;
 
       bool elaborate_sig(Design*, NetScope*scope) const;
 
     private:
       perm_string name_;
 
-      map<hname_t,PWire*> wires_;
+      map<pform_name_t,PWire*> wires_;
       list<PGate*> gates_;
       list<PProcess*> behaviors_;
       map<perm_string,PTask*> tasks_;
@@ -167,45 +182,23 @@ class Module : public LineInfo {
 
 /*
  * $Log: Module.h,v $
- * Revision 1.37  2004/06/13 04:56:53  steve
- *  Add support for the default_nettype directive.
+ * Revision 1.43  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
  *
- * Revision 1.36  2004/05/25 19:21:06  steve
- *  More identifier lists use perm_strings.
+ * Revision 1.42  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
  *
- * Revision 1.35  2004/02/20 18:53:33  steve
- *  Addtrbute keys are perm_strings.
+ * Revision 1.41  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
  *
- * Revision 1.34  2004/02/20 06:22:56  steve
- *  parameter keys are per_strings.
+ * Revision 1.40  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
  *
- * Revision 1.33  2004/02/18 17:11:54  steve
- *  Use perm_strings for named langiage items.
+ * Revision 1.39  2006/03/30 01:49:07  steve
+ *  Fix instance arrays indexed by overridden parameters.
  *
- * Revision 1.32  2003/06/20 00:53:19  steve
- *  Module attributes from the parser
- *  through to elaborated form.
- *
- * Revision 1.31  2003/06/13 19:10:45  steve
- *  Properly manage real variables in subscopes.
- *
- * Revision 1.30  2003/03/06 04:37:12  steve
- *  lex_strings.add module names earlier.
- *
- * Revision 1.29  2003/02/27 06:45:11  steve
- *  specparams as far as pform.
- *
- * Revision 1.28  2003/01/26 21:15:58  steve
- *  Rework expression parsing and elaboration to
- *  accommodate real/realtime values and expressions.
- *
- * Revision 1.27  2002/08/19 02:39:16  steve
- *  Support parameters with defined ranges.
- *
- * Revision 1.26  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.25  2002/05/19 23:37:28  steve
- *  Parse port_declaration_lists from the 2001 Standard.
+ * Revision 1.38  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
  */
 #endif

NetLatch.cc

@@ -1,48 +0,0 @@
-// NetLatch.cc
-// Author: Alan M. Feldstein
-// Class NetLatch member-function definitions
-
-#include "NetLatch.h" // NetLatch class definition
-#include "target.h" // target_t structure definition
-
-// constructor
-NetLatch::NetLatch( NetScope *scope, perm_string name, unsigned width )
-  // explicitly call base-class constructor
-  : NetNode( scope, name, 2U * width + 1U )
-{
-} // end NetLatch constructor
-
-unsigned NetLatch::width() const
-{
-  return ( pin_count() - 1U ) / 2U;
-} // end function width
-
-Link &NetLatch::pin_Data( unsigned w )
-{
-  unsigned pn = 1 + 2 * w;
-  assert( pn < pin_count() );
-  return pin( pn );
-} // end function pin_Data
-
-Link &NetLatch::pin_Q( unsigned w )
-{
-  unsigned pn = 2 + 2 * w;
-  assert( pn < pin_count() );
-  return pin( pn );
-} // end function pin_Q
-
-Link &NetLatch::pin_Gate()
-{
-  return pin( 0 );
-} // end function pin_Gate
-
-const Link &NetLatch::pin_Gate() const
-{
-  return pin( 0 );
-} // end function pin_Gate
-
-bool NetLatch::emit_node( target_t *driverPtr ) const
-{
-  driverPtr->lpm_latch( this );
-  return true;
-} // end function emit_node

NetLatch.h

@@ -1,34 +0,0 @@
-// NetLatch.h
-// Author: Alan M. Feldstein
-// This class represents an LPM_LATCH device. In Verilog, storage components of this type can be inferred.
-//  The pinout is assigned like so:
-//    0  -- Gate
-//
-//    1  -- Data[0]
-//    2  -- Q[0]
-//     ...
-#ifndef NETLATCH_H
-#define NETLATCH_H
-
-#include "netlist.h" // NetNode, NetScope, Link class definitions
-#include "StringHeap.h" // perm_string class definition
-
-class NetLatch : public NetNode
-{
- public:
-  NetLatch( NetScope *, perm_string, unsigned );
-
-  unsigned width() const;
-
-  Link &pin_Data( unsigned );
-  Link &pin_Q( unsigned );
-  Link &pin_Gate();
-
-  const Link &pin_Data( unsigned ) const;
-  const Link &pin_Q( unsigned ) const;
-  const Link &pin_Gate() const;
-
-  virtual bool emit_node( target_t * ) const;
-}; // end class NetLatch
-
-#endif

PData.h

@@ -1,63 +0,0 @@
-#ifndef __PData_H
-#define __PData_H
-/*
- * Copyright (c) 2003 Stephen Williams ([email protected])
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PData.h,v 1.1 2003/01/26 21:15:58 steve Exp $"
-#endif
-
-# include  "HName.h"
-# include  "netlist.h"
-# include  "LineInfo.h"
-
-/*
- * The PData object represents declaration of atomic datum such as
- * real and realtime variables. These are variables that cannot be bit
- * or part selected, but can be used in expressions.
- */
-
-class PData : public LineInfo {
-
-    public:
-      PData(const hname_t&hname);
-      ~PData();
-
-	// Return a hierarchical name.
-      const hname_t&name() const;
-
-      void elaborate_scope(Design*des, NetScope*scope) const;
-
-      map<string,PExpr*> attributes;
-
-    private:
-      hname_t hname_;
-
-    private:
-      PData(const PData&);
-      PData& operator= (const PData&);
-};
-
-/*
- * $Log: PData.h,v $
- * Revision 1.1  2003/01/26 21:15:58  steve
- *  Rework expression parsing and elaboration to
- *  accommodate real/realtime values and expressions.
- *
- */
-#endif

PDelays.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PDelays.cc,v 1.11.2.1 2006/10/04 00:37:03 steve Exp $"
+#ident "$Id: PDelays.cc,v 1.15 2006/07/08 21:48:46 steve Exp $"
 #endif
 
 # include "config.h"
@@ -62,30 +62,15 @@ void PDelays::set_delays(const svector<PExpr*>*del, bool df)
       delete_flag_ = df;
 }
 
-static unsigned long calculate_val(Design*des, NetScope*scope,
-				   const PExpr*expr)
+static NetExpr*calculate_val(Design*des, NetScope*scope, const PExpr*expr)
 {
 
-      NetExpr*dex = expr->elaborate_expr(des, scope);
+      NetExpr*dex = expr->elaborate_expr(des, scope, -1, false);
       if (NetExpr*tmp = dex->eval_tree()) {
 	    delete dex;
 	    dex = tmp;
       }
 
-      int shift = scope->time_unit() - des->get_precision();
-      if (sizeof(unsigned) <= 4 && shift > 9) {
-	    cerr << expr->get_line() << ": error: Precision overflow"
-		 << " in scope " << scope->name() << "." << endl;
-	    cerr << expr->get_line() << ":      :"
-		 << " Units are 10e" << scope->time_unit()
-		 << " minus precision 10e" << des->get_precision()
-		 << " is 10e" << shift << "." << endl;
-	    cerr << expr->get_line() << ":      : Perhaps a timescale "
-		 << "is missing or incorrect?" << endl;
-	    des->errors += 1;
-	    return 0;
-      }
-
 	/* If the delay expression is a real constant or vector
 	   constant, then evaluate it, scale it to the local time
 	   units, and return an adjusted value. */
@@ -93,12 +78,15 @@ static unsigned long calculate_val(Design*des, NetScope*scope,
       if (NetECReal*tmp = dynamic_cast<NetECReal*>(dex)) {
 	    verireal fn = tmp->value();
 
+	    int shift = scope->time_unit() - des->get_precision();
 	    long delay = fn.as_long(shift);
 	    if (delay < 0)
 		  delay = 0;
 
 	    delete tmp;
-	    return delay;
+	    NetEConst*tmp2 = new NetEConst(verinum(delay));
+	    tmp2->set_line(*expr);
+	    return tmp2;
       }
 
 
@@ -109,35 +97,57 @@ static unsigned long calculate_val(Design*des, NetScope*scope,
 		  des->scale_to_precision(fn.as_ulong(), scope);
 
 	    delete tmp;
-	    return delay;
+	    NetEConst*tmp2 = new NetEConst(verinum(delay));
+	    tmp2->set_line(*expr);
+	    return tmp2;
       }
 
-	/* Oops, cannot evaluate down to a constant. Error message. */
-      delete dex;
+	/* Oops, cannot evaluate down to a constant. */
+      return dex;
+}
 
-      cerr << expr->get_line() << ": sorry: non-constant "
-	   << "delays not supported here: " << *expr << endl;
-      des->errors += 1;
-      return 0;
+static NetExpr* make_delay_nets(Design*des, NetExpr*expr)
+{
+      if (dynamic_cast<NetESignal*> (expr))
+	    return expr;
 
+      if (dynamic_cast<NetEConst*> (expr))
+	    return expr;
+
+      NetNet*sig = expr->synthesize(des);
+      if (sig == 0) {
+	    cerr << expr->get_line() << ": error: Expression " << *expr
+		 << " is not suitable for delay expression." << endl;
+	    return 0;
+      }
+
+      expr = new NetESignal(sig);
+      return expr;
 }
 
 void PDelays::eval_delays(Design*des, NetScope*scope,
-			  unsigned long&rise_time,
-			  unsigned long&fall_time,
-			  unsigned long&decay_time) const
+			  NetExpr*&rise_time,
+			  NetExpr*&fall_time,
+			  NetExpr*&decay_time,
+			  bool as_nets_flag) const
 {
       assert(scope);
 
 
       if (delay_[0]) {
 	    rise_time = calculate_val(des, scope, delay_[0]);
+	    if (as_nets_flag)
+		  rise_time = make_delay_nets(des, rise_time);
 
 	    if (delay_[1]) {
 		  fall_time = calculate_val(des, scope, delay_[1]);
+		  if (as_nets_flag)
+			fall_time = make_delay_nets(des, fall_time);
 
 		  if (delay_[2]) {
 			decay_time = calculate_val(des, scope, delay_[2]);
+		  if (as_nets_flag)
+			decay_time = make_delay_nets(des, decay_time);
 
 		  } else {
 			if (rise_time < fall_time)
@@ -159,8 +169,19 @@ void PDelays::eval_delays(Design*des, NetScope*scope,
 
 /*
  * $Log: PDelays.cc,v $
- * Revision 1.11.2.1  2006/10/04 00:37:03  steve
- *  Detect delay precision overflow.
+ * Revision 1.15  2006/07/08 21:48:46  steve
+ *  Handle real valued literals in net contexts.
+ *
+ * Revision 1.14  2006/06/02 04:48:49  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.13  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.12  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
  *
  * Revision 1.11  2003/06/21 01:21:42  steve
  *  Harmless fixup of warnings.

PDelays.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PDelays.h,v 1.7 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PDelays.h,v 1.9 2006/01/03 05:22:14 steve Exp $"
 #endif
 
 # include  "svector.h"
@@ -34,6 +34,7 @@ using namespace std;
 
 class Design;
 class NetScope;
+class NetExpr;
 class PExpr;
 
 /*
@@ -53,9 +54,10 @@ class PDelays {
       void set_delays(const svector<PExpr*>*del, bool delete_flag=true);
 
       void eval_delays(Design*des, NetScope*scope,
-		       unsigned long&rise_time,
-		       unsigned long&fall_time,
-		       unsigned long&decay_time) const;
+		       NetExpr*&rise_time,
+		       NetExpr*&fall_time,
+		       NetExpr*&decay_time,
+		       bool as_nets_flag =false) const;
 
       void dump_delays(ostream&out) const;
 
@@ -72,6 +74,12 @@ ostream& operator << (ostream&o, const PDelays&);
 
 /*
  * $Log: PDelays.h,v $
+ * Revision 1.9  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.8  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
  * Revision 1.7  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PExpr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PExpr.cc,v 1.35.2.1 2006/02/07 22:46:23 steve Exp $"
+#ident "$Id: PExpr.cc,v 1.39 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
@@ -53,6 +53,14 @@ NetNet* PExpr::elaborate_lnet(Design*des, NetScope*, bool) const
       return 0;
 }
 
+NetNet* PExpr::elaborate_bi_net(Design*des, NetScope*) const
+{
+      cerr << get_line() << ": error: "
+	   << "expression not valid as argument to inout port: "
+	   << *this << endl;
+      return 0;
+}
+
 PEBinary::PEBinary(char op, PExpr*l, PExpr*r)
 : op_(op), left_(l), right_(r)
 {
@@ -67,13 +75,44 @@ bool PEBinary::is_constant(Module*mod) const
       return left_->is_constant(mod) && right_->is_constant(mod);
 }
 
-PECallFunction::PECallFunction(const hname_t&n, const svector<PExpr *> &parms)
+PEBComp::PEBComp(char op, PExpr*l, PExpr*r)
+: PEBinary(op, l, r)
+{
+}
+
+PEBComp::~PEBComp()
+{
+}
+
+PEBShift::PEBShift(char op, PExpr*l, PExpr*r)
+: PEBinary(op, l, r)
+{
+}
+
+PEBShift::~PEBShift()
+{
+}
+
+PECallFunction::PECallFunction(const pform_name_t&n, const svector<PExpr *> &parms)
 : path_(n), parms_(parms)
 {
 }
 
-PECallFunction::PECallFunction(const hname_t&n)
-: path_(n)
+static pform_name_t pn_from_ps(perm_string n)
+{
+      name_component_t tmp_name (n);
+      pform_name_t tmp;
+      tmp.push_back(tmp_name);
+      return tmp;
+}
+
+PECallFunction::PECallFunction(perm_string n, const svector<PExpr*>&parms)
+: path_(pn_from_ps(n)), parms_(parms)
+{
+}
+
+PECallFunction::PECallFunction(perm_string n)
+: path_(pn_from_ps(n))
 {
 }
 
@@ -90,8 +129,6 @@ bool PEConcat::is_constant(Module *mod) const
 {
       bool constant = repeat_? repeat_->is_constant(mod) : true;
       for (unsigned i = 0; constant && i < parms_.count(); ++i) {
-	    if (parms_[i] == 0)
-		  continue;
 	    constant = constant && parms_[i]->is_constant(mod);
       }
       return constant;
@@ -141,33 +178,32 @@ bool PEFNumber::is_constant(Module*) const
       return true;
 }
 
-PEIdent::PEIdent(const hname_t&s)
-: path_(s), msb_(0), lsb_(0), idx_(0)
+PEIdent::PEIdent(const pform_name_t&that)
+: path_(that)
 {
 }
 
+PEIdent::PEIdent(perm_string s)
+{
+      path_.push_back(name_component_t(s));
+}
+
 PEIdent::~PEIdent()
 {
 }
 
-const hname_t& PEIdent::path() const
-{
-      return path_;
-}
-
 /*
  * An identifier can be in a constant expression if (and only if) it is
  * a parameter.
+ *
+ * NOTE: This test does not work if the name is hierarchical!
  */
 bool PEIdent::is_constant(Module*mod) const
 {
       if (mod == 0) return false;
 
-	/* This is a work-around for map not matching < even when
-	   there is a perm_string operator that can do the comprare.
-
-	   The real fix is to make the path_ carry perm_strings. */
-      perm_string tmp = perm_string::literal(path_.peek_name(0));
+	/*  */
+      perm_string tmp = path_.back().name;
 
       { map<perm_string,Module::param_expr_t>::const_iterator cur;
         cur = mod->parameters.find(tmp);
@@ -264,8 +300,18 @@ bool PEUnary::is_constant(Module*m) const
 
 /*
  * $Log: PExpr.cc,v $
- * Revision 1.35.2.1  2006/02/07 22:46:23  steve
- *  More robust test for concat constant-ness.
+ * Revision 1.39  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.38  2006/10/30 05:44:49  steve
+ *  Expression widths with unsized literals are pseudo-infinite width.
+ *
+ * Revision 1.37  2005/10/04 04:09:25  steve
+ *  Add support for indexed select attached to parameters.
+ *
+ * Revision 1.36  2005/08/06 17:58:16  steve
+ *  Implement bi-directional part selects.
  *
  * Revision 1.35  2004/10/04 01:10:51  steve
  *  Clean up spurious trailing white space.

PExpr.h

@@ -19,13 +19,15 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PExpr.h,v 1.66.2.2 2006/07/28 16:26:17 steve Exp $"
+#ident "$Id: PExpr.h,v 1.90 2007/06/04 19:14:06 steve Exp $"
 #endif
 
 # include  <string>
+# include  <vector>
 # include  "netlist.h"
 # include  "verinum.h"
 # include  "LineInfo.h"
+# include  "pform_types.h"
 
 class Design;
 class Module;
@@ -50,11 +52,38 @@ class PExpr : public LineInfo {
 
       virtual void dump(ostream&) const;
 
-	// Procedural elaboration of the expression. Set the
-	// bare_memory_ok flag if the result is allowed to be a
-	// NetEMemory without an index.
+	// This method tests the width that the expression wants to
+	// be. It is used by elaboration of assignments to figure out
+	// the width of the expression.
+	//
+	// The "min" is the width of the local context, so it the
+	// minimum width that this function should return. Initially
+	// this is the same as the lval width.
+	//
+	// The "lval" is the width of the destination where this
+	// result is going to go. This can be used to constrain the
+	// amount that an expression can reasonably expand. For
+	// example, there is no point expanding an addition to beyond
+	// the lval. This extra bit of information allows the
+	// expression to optimize itself a bit. If the lval==0, then
+	// the subexpression should not make l-value related
+	// optimizations.
+	//
+	// The unsigned_flag is set to true if the expression is
+	// unsized and therefore expandable. This happens if a
+	// sub-expression is an unsized literal. Some expressions make
+	// special use of that.
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
+	// Procedural elaboration of the expression. The expr_width is
+	// the width of the context of the expression (i.e. the
+	// l-value width of an assignment) or -1 if the expression is
+	// self-determinted. The sys_task_arg flag is true if
+	// expressions are allowed to be incomplete.
       virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
 
 	// Elaborate expressions that are the r-value of parameter
 	// assignments. This elaboration follows the restrictions of
@@ -66,30 +95,37 @@ class PExpr : public LineInfo {
 	// continuous assign or other wholly structural context.
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0 =Link::STRONG,
 				    Link::strength_t drive1 =Link::STRONG)
 	    const;
 
-	// This method elaborates the expression as NetNet objects. It
-	// only allows regs suitable for procedural continuous assignments.
-      virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
-
 	// This method elaborates the expression as gates, but
 	// restricted for use as l-values of continuous assignments.
       virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
 				     bool implicit_net_ok =false) const;
 
+	// This is similar to elaborate_lnet, except that the
+	// expression is evaluated to be bi-directional. This is
+	// useful for arguments to inout ports of module instances and
+	// ports of tran primitives.
+      virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
+
 	// Expressions that can be in the l-value of procedural
-	// assignments can be elaborated with this method.
-      virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
+	// assignments can be elaborated with this method. If the
+	// is_force flag is true, then the set of valid l-value types
+	// is slightly modified to accomodate the Verilog force
+	// statement
+      virtual NetAssign_* elaborate_lval(Design*des,
+					 NetScope*scope,
+					 bool is_force) const;
 
 	// This attempts to evaluate a constant expression, and return
 	// a verinum as a result. If the expression cannot be
 	// evaluated, return 0.
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
 	// This method returns true if that expression is the same as
 	// this expression. This method is used for comparing
@@ -115,29 +151,31 @@ class PEConcat : public PExpr {
       PEConcat(const svector<PExpr*>&p, PExpr*r =0);
       ~PEConcat();
 
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
-
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
       virtual void dump(ostream&) const;
 
-	// Concatenated Regs can be on the left of procedural
-	// continuous assignments.
-      virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
-
       virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
 				     bool implicit_net_ok =false) const;
+      virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetEConcat*elaborate_pexpr(Design*des, NetScope*) const;
-      virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
+      virtual NetAssign_* elaborate_lval(Design*des,
+					 NetScope*scope,
+					 bool is_force) const;
       virtual bool is_constant(Module*) const;
 
+    private:
+      NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
+				     bool implicit_net_ok,
+				     bool bidirectional_flag) const;
     private:
       svector<PExpr*>parms_;
       PExpr*repeat_;
@@ -184,15 +222,23 @@ class PEFNumber : public PExpr {
 	/* The eval_const method as applied to a floating point number
 	   gets the *integer* value of the number. This accounts for
 	   any rounding that is needed to get the value. */
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
 	/* A PEFNumber is a constant, so this returns true. */
       virtual bool is_constant(Module*) const;
 
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
 
+      virtual NetNet* elaborate_net(Design*des, NetScope*scope,
+				    unsigned lwidth,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
+				    Link::strength_t drive0,
+				    Link::strength_t drive1) const;
+
       virtual void dump(ostream&) const;
 
     private:
@@ -202,32 +248,41 @@ class PEFNumber : public PExpr {
 class PEIdent : public PExpr {
 
     public:
-      explicit PEIdent(const hname_t&s);
+      explicit PEIdent(perm_string);
+      explicit PEIdent(const pform_name_t&);
       ~PEIdent();
 
-      virtual void dump(ostream&) const;
+	// Add another name to the string of heirarchy that is the
+	// current identifier.
+      void append_name(perm_string);
 
-	// Regs can be on the left of procedural continuous assignments
-      virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
+      virtual void dump(ostream&) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
 
 	// Identifiers are allowed (with restrictions) is assign l-values.
       virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
 				     bool implicit_net_ok =false) const;
 
+      virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
+
 	// Identifiers are also allowed as procedural assignment l-values.
-      virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
+      virtual NetAssign_* elaborate_lval(Design*des,
+					 NetScope*scope,
+					 bool is_force) const;
 
 	// Structural r-values are OK.
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
 
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
 
 	// Elaborate the PEIdent as a port to a module. This method
@@ -235,39 +290,86 @@ class PEIdent : public PExpr {
       NetNet* elaborate_port(Design*des, NetScope*sc) const;
 
       virtual bool is_constant(Module*) const;
-      verinum* eval_const(const Design*des, const NetScope*sc) const;
+      verinum* eval_const(Design*des, NetScope*sc) const;
 
-      const hname_t& path() const;
+      const pform_name_t& path() const { return path_; }
 
     private:
-      hname_t path_;
+      pform_name_t path_;
+
+    private:
+	// Common functions to calculate parts of part/bit selects.
+      bool calculate_parts_(Design*, NetScope*, long&msb, long&lsb) const;
+      bool calculate_up_do_width_(Design*, NetScope*, unsigned long&wid) const;
+
+    private:
+      NetAssign_*elaborate_lval_net_word_(Design*, NetScope*, NetNet*) const;
+      bool elaborate_lval_net_part_(Design*, NetScope*, NetAssign_*) const;
+      bool elaborate_lval_net_idx_up_(Design*, NetScope*, NetAssign_*) const;
+      bool elaborate_lval_net_idx_do_(Design*, NetScope*, NetAssign_*) const;
+
+    private:
+      NetExpr*elaborate_expr_param(Design*des,
+				   NetScope*scope,
+				   const NetExpr*par,
+				   NetScope*found,
+				   const NetExpr*par_msb,
+				   const NetExpr*par_lsb) const;
+      NetExpr*elaborate_expr_net(Design*des,
+				 NetScope*scope,
+				 NetNet*net,
+				 NetScope*found,
+				 bool sys_task_arg) const;
+      NetExpr*elaborate_expr_net_word_(Design*des,
+				       NetScope*scope,
+				       NetNet*net,
+				       NetScope*found,
+				       bool sys_task_arg) const;
+      NetExpr*elaborate_expr_net_part_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_idx_up_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_idx_do_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
+      NetExpr*elaborate_expr_net_bit_(Design*des,
+				   NetScope*scope,
+				   NetESignal*net,
+				   NetScope*found) const;
 
     public:
-	// Use these to support bit- and part-select operators.
-      PExpr*msb_;
-      PExpr*lsb_;
 
-	// If this is a reference to a memory, this is the index
-	// expression.
-      PExpr*idx_;
-
-      NetNet* elaborate_net_ram_(Design*des, NetScope*scope,
-				 NetMemory*mem, unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+      NetNet* elaborate_net_array_(Design*des, NetScope*scope,
+				   NetNet*sig, unsigned lwidth,
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay,
+				   Link::strength_t drive0,
+				   Link::strength_t drive1) const;
 
       NetNet* elaborate_net_bitmux_(Design*des, NetScope*scope,
 				    NetNet*sig,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
 
     private:
-      NetAssign_* elaborate_mem_lval_(Design*des, NetScope*scope,
-				      NetMemory*mem) const;
+      NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
+				     bool implicit_net_ok,
+				     bool bidirectional_flag) const;
+
+      NetNet*make_implicit_net_(Design*des, NetScope*scope) const;
+
+      bool eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
+			     unsigned&midx, unsigned&lidx) const;
+      NetNet*process_select_(Design*des, NetScope*scope, NetNet*sig) const;
 
 };
 
@@ -280,19 +382,25 @@ class PENumber : public PExpr {
       const verinum& value() const;
 
       virtual void dump(ostream&) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned lwidth,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetEConst*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				       int expr_width, bool) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
+      virtual NetAssign_* elaborate_lval(Design*des,
+					 NetScope*scope,
+					 bool is_force) const;
 
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
       virtual bool is_the_same(const PExpr*that) const;
       virtual bool is_constant(Module*) const;
@@ -316,17 +424,22 @@ class PEString : public PExpr {
 
       string value() const;
       virtual void dump(ostream&) const;
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetEConst*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				       int expr_width, bool) const;
       virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const;
-      verinum* eval_const(const Design*, const NetScope*) const;
+      verinum* eval_const(Design*, NetScope*) const;
 
       virtual bool is_constant(Module*) const;
 
@@ -341,17 +454,18 @@ class PEUnary : public PExpr {
       ~PEUnary();
 
       virtual void dump(ostream&out) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     bool sys_task_arg =false) const;
+				     int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
       virtual bool is_constant(Module*) const;
 
@@ -369,65 +483,100 @@ class PEBinary : public PExpr {
       virtual bool is_constant(Module*) const;
 
       virtual void dump(ostream&out) const;
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
-      virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-					bool sys_task_arg =false) const;
+      virtual NetEBinary*elaborate_expr(Design*des, NetScope*,
+					int expr_width, bool sys_task_arg) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
-    private:
+    protected:
       char op_;
       PExpr*left_;
       PExpr*right_;
 
-      NetExpr*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp) const;
+      NetEBinary*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
+      NetEBinary*elaborate_eval_expr_base_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
 
+    private:
       NetNet* elaborate_net_add_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_bit_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_cmp_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_div_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_mod_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_log_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_mul_(Design*des, NetScope*scope,
 				 unsigned lwidth,
-				 unsigned long rise,
-				 unsigned long fall,
-				 unsigned long decay) const;
+				 const NetExpr* rise,
+				 const NetExpr* fall,
+				 const NetExpr* decay) const;
       NetNet* elaborate_net_shift_(Design*des, NetScope*scope,
 				   unsigned lwidth,
-				   unsigned long rise,
-				   unsigned long fall,
-				   unsigned long decay) const;
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay) const;
+};
+
+/*
+ * Here are a few specilized classes for handling specific binary
+ * operators.
+ */
+class PEBComp  : public PEBinary {
+
+    public:
+      explicit PEBComp(char op, PExpr*l, PExpr*r);
+      ~PEBComp();
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&flag) const;
+
+      NetEBinary* elaborate_expr(Design*des, NetScope*scope,
+				 int expr_width, bool sys_task_arg) const;
+};
+
+class PEBShift  : public PEBinary {
+
+    public:
+      explicit PEBShift(char op, PExpr*l, PExpr*r);
+      ~PEBShift();
+
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval, bool&flag) const;
 };
 
 /*
@@ -443,17 +592,21 @@ class PETernary : public PExpr {
       virtual bool is_constant(Module*) const;
 
       virtual void dump(ostream&out) const;
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  bool&unsized_flag) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetETernary*elaborate_expr(Design*des, NetScope*,
-					 bool sys_task_arg =false) const;
+					 int expr_width, bool sys_task_arg) const;
       virtual NetETernary*elaborate_pexpr(Design*des, NetScope*sc) const;
-      virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
+      virtual verinum* eval_const(Design*des, NetScope*sc) const;
 
     private:
       PExpr*expr_;
@@ -468,37 +621,130 @@ class PETernary : public PExpr {
  */
 class PECallFunction : public PExpr {
     public:
-      explicit PECallFunction(const hname_t&n, const svector<PExpr *> &parms);
-      explicit PECallFunction(const hname_t&n);
+      explicit PECallFunction(const pform_name_t&n, const svector<PExpr *> &parms);
+	// Call of system function (name is not heirarchical)
+      explicit PECallFunction(perm_string n, const svector<PExpr *> &parms);
+      explicit PECallFunction(perm_string n);
       ~PECallFunction();
 
       virtual void dump(ostream &) const;
+
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
-				    unsigned long rise,
-				    unsigned long fall,
-				    unsigned long decay,
+				    const NetExpr* rise,
+				    const NetExpr* fall,
+				    const NetExpr* decay,
 				    Link::strength_t drive0,
 				    Link::strength_t drive1) const;
       virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
-				     bool sys_task_arg =false) const;
+				     int expr_wid, bool sys_task_arg) const;
 
     private:
-      hname_t path_;
+      pform_name_t path_;
       svector<PExpr *> parms_;
 
       bool check_call_matches_definition_(Design*des, NetScope*dscope) const;
 
       NetExpr* elaborate_sfunc_(Design*des, NetScope*scope) const;
+      NetNet* elaborate_net_sfunc_(Design*des, NetScope*scope,
+				   unsigned width,
+				   const NetExpr* rise,
+				   const NetExpr* fall,
+				   const NetExpr* decay,
+				   Link::strength_t drive0,
+				   Link::strength_t drive1) const;
 };
 
 /*
  * $Log: PExpr.h,v $
- * Revision 1.66.2.2  2006/07/28 16:26:17  steve
- *  Remove excess PEString:: prefix for stubborn compilers.
+ * Revision 1.90  2007/06/04 19:14:06  steve
+ *  Build errors in picky GCC compilers.
  *
- * Revision 1.66.2.1  2005/12/07 03:28:44  steve
- *  Support constant concatenation of constants.
+ * Revision 1.89  2007/06/04 02:19:07  steve
+ *  Handle bit/part select of array words in nets.
+ *
+ * Revision 1.88  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.87  2007/01/16 05:44:14  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.86  2006/11/10 04:54:26  steve
+ *  Add test_width methods for PETernary and PEString.
+ *
+ * Revision 1.85  2006/11/04 06:19:24  steve
+ *  Remove last bits of relax_width methods, and use test_width
+ *  to calculate the width of an r-value expression that may
+ *  contain unsized numbers.
+ *
+ * Revision 1.84  2006/10/30 05:44:49  steve
+ *  Expression widths with unsized literals are pseudo-infinite width.
+ *
+ * Revision 1.83  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
+ *
+ * Revision 1.82  2006/06/02 04:48:49  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.81  2006/04/28 04:28:35  steve
+ *  Allow concatenations as arguments to inout ports.
+ *
+ * Revision 1.80  2006/04/16 00:54:04  steve
+ *  Cleanup lval part select handling.
+ *
+ * Revision 1.79  2006/04/16 00:15:43  steve
+ *  Fix part selects in l-values.
+ *
+ * Revision 1.78  2006/03/25 02:36:26  steve
+ *  Get rid of excess PESTring:: prefix within class declaration.
+ *
+ * Revision 1.77  2006/02/02 02:43:57  steve
+ *  Allow part selects of memory words in l-values.
+ *
+ * Revision 1.76  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
+ * Revision 1.75  2005/12/07 04:04:23  steve
+ *  Allow constant concat expressions.
+ *
+ * Revision 1.74  2005/11/27 17:01:56  steve
+ *  Fix for stubborn compiler.
+ *
+ * Revision 1.73  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
+ * Revision 1.72  2005/11/10 13:28:11  steve
+ *  Reorganize signal part select handling, and add support for
+ *  indexed part selects.
+ *
+ *  Expand expression constant propagation to eliminate extra
+ *  sums in certain cases.
+ *
+ * Revision 1.71  2005/10/04 04:09:25  steve
+ *  Add support for indexed select attached to parameters.
+ *
+ * Revision 1.70  2005/08/06 17:58:16  steve
+ *  Implement bi-directional part selects.
+ *
+ * Revision 1.69  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
+ * Revision 1.68  2005/01/09 20:16:00  steve
+ *  Use PartSelect/PV and VP to handle part selects through ports.
+ *
+ * Revision 1.67  2004/12/29 23:55:43  steve
+ *  Unify elaboration of l-values for all proceedural assignments,
+ *  including assing, cassign and force.
+ *
+ *  Generate NetConcat devices for gate outputs that feed into a
+ *  vector results. Use this to hande gate arrays. Also let gate
+ *  arrays handle vectors of gates when the outputs allow for it.
  *
  * Revision 1.66  2004/10/04 01:10:51  steve
  *  Clean up spurious trailing white space.

PGate.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PGate.cc,v 1.16 2004/02/18 17:11:54 steve Exp $"
+#ident "$Id: PGate.cc,v 1.18 2006/01/03 05:22:14 steve Exp $"
 #endif
 
 # include "config.h"
@@ -90,12 +90,69 @@ void PGate::elaborate_scope(Design*, NetScope*) const
  * parameters. This method understands how to handle the different
  * numbers of expressions.
  */
+
+void PGate::eval_delays(Design*des, NetScope*scope,
+			NetExpr*&rise_expr,
+			NetExpr*&fall_expr,
+			NetExpr*&decay_expr,
+			bool as_net_flag) const
+{
+      delay_.eval_delays(des, scope,
+			 rise_expr, fall_expr, decay_expr,
+			 as_net_flag);
+}
+
 void PGate::eval_delays(Design*des, NetScope*scope,
 			unsigned long&rise_time,
 			unsigned long&fall_time,
 			unsigned long&decay_time) const
 {
-      delay_.eval_delays(des, scope, rise_time, fall_time, decay_time);
+      NetExpr*rise_expr, *fall_expr, *decay_expr;
+      delay_.eval_delays(des, scope, rise_expr, fall_expr, decay_expr);
+
+      if (rise_expr == 0) {
+	    rise_time = 0;
+	    fall_time = 0;
+	    decay_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (rise_expr)) {
+	    rise_time = tmp->value().as_ulong();
+
+      } else {
+	    cerr << get_line() << ": error: Delay expressions must be "
+		 << "constant here." << endl;
+	    cerr << get_line() << ":      : Cannot calculate "
+		 << *rise_expr << endl;
+	    des->errors += 1;
+	    rise_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (fall_expr)) {
+	    fall_time = tmp->value().as_ulong();
+
+      } else {
+	    if (fall_expr != rise_expr) {
+		  cerr << get_line() << ": error: Delay expressions must be "
+		       << "constant here." << endl;
+		  cerr << get_line() << ":      : Cannot calculate "
+		       << *rise_expr << endl;
+	    }
+	    des->errors += 1;
+	    fall_time = 0;
+      }
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*> (decay_expr)) {
+	    decay_time = tmp->value().as_ulong();
+
+      } else {
+	    cerr << get_line() << ": error: Delay expressions must be "
+		 << "constant here." << endl;
+	    cerr << get_line() << ":      : Cannot calculate "
+		 << *rise_expr << endl;
+	    des->errors += 1;
+	    decay_time = 0;
+      }
 }
 
 PGAssign::PGAssign(svector<PExpr*>*pins)
@@ -191,6 +248,12 @@ perm_string PGModule::get_type()
 
 /*
  * $Log: PGate.cc,v $
+ * Revision 1.18  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.17  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
  * Revision 1.16  2004/02/18 17:11:54  steve
  *  Use perm_strings for named langiage items.
  *

PGate.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PGate.h,v 1.29 2004/10/04 01:10:52 steve Exp $"
+#ident "$Id: PGate.h,v 1.32 2006/04/10 00:37:42 steve Exp $"
 #endif
 
 # include  "svector.h"
@@ -66,11 +66,23 @@ class PGate : public LineInfo {
 
       perm_string get_name() const { return name_; }
 
+	// This method evaluates the delays all the way to an
+	// integer. If the delay is non-constant, then set the times
+	// to 0, print an error message and mark an error to the
+	// design.
       void eval_delays(Design*des, NetScope*scope,
 		       unsigned long&rise_time,
 		       unsigned long&fall_time,
 		       unsigned long&decay_time) const;
 
+	// This evaluates the delays as far as possible, but returns
+	// an expression, and do not signal errors.
+      void eval_delays(Design*des, NetScope*scope,
+		       NetExpr*&rise_time,
+		       NetExpr*&fall_time,
+		       NetExpr*&decay_time,
+		       bool as_net_flag =false) const;
+
       unsigned pin_count() const { return pins_? pins_->count() : 0; }
       const PExpr*pin(unsigned idx) const { return (*pins_)[idx]; }
 
@@ -82,7 +94,7 @@ class PGate : public LineInfo {
 
       map<perm_string,PExpr*> attributes;
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*sc) const;
       virtual bool elaborate_sig(Design*des, NetScope*scope) const;
@@ -116,7 +128,7 @@ class PGAssign  : public PGate {
       explicit PGAssign(svector<PExpr*>*pins, svector<PExpr*>*dels);
       ~PGAssign();
 
-      void dump(ostream&out) const;
+      void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*des, NetScope*scope) const;
 
     private:
@@ -153,7 +165,7 @@ class PGBuiltin  : public PGate {
       Type type() const { return type_; }
       void set_range(PExpr*msb, PExpr*lsb);
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*, NetScope*scope) const;
 
     private:
@@ -196,7 +208,7 @@ class PGModule  : public PGate {
 	// method to pass the range to the pform.
       void set_range(PExpr*msb, PExpr*lsb);
 
-      virtual void dump(ostream&out) const;
+      virtual void dump(ostream&out, unsigned ind =4) const;
       virtual void elaborate(Design*, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*sc) const;
       virtual bool elaborate_sig(Design*des, NetScope*scope) const;
@@ -227,6 +239,15 @@ class PGModule  : public PGate {
 
 /*
  * $Log: PGate.h,v $
+ * Revision 1.32  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.31  2006/01/03 05:22:14  steve
+ *  Handle complex net node delays.
+ *
+ * Revision 1.30  2006/01/02 05:33:19  steve
+ *  Node delays can be more general expressions in structural contexts.
+ *
  * Revision 1.29  2004/10/04 01:10:52  steve
  *  Clean up spurious trailing white space.
  *

PGenerate.cc

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2006 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PGenerate.cc,v 1.4 2007/06/02 03:42:12 steve Exp $"
+#endif
+
+# include  "PGenerate.h"
+# include  "PWire.h"
+
+PGenerate::PGenerate(unsigned id)
+: id_number(id)
+{
+      parent = 0;
+}
+
+PGenerate::~PGenerate()
+{
+}
+
+PWire* PGenerate::add_wire(PWire*wire)
+{
+      PWire*&ep = wires[wire->path()];
+      if (ep) return ep;
+
+      assert(ep == 0);
+      ep = wire;
+      return wire;
+}
+
+PWire* PGenerate::get_wire(const pform_name_t&name) const
+{
+      map<pform_name_t,PWire*>::const_iterator obj = wires.find(name);
+      if (obj == wires.end())
+	    return 0;
+      else
+	    return (*obj).second;
+}
+
+void PGenerate::add_gate(PGate*gate)
+{
+      gates.push_back(gate);
+}
+
+void PGenerate::add_behavior(PProcess*proc)
+{
+      behaviors.push_back(proc);
+}

PGenerate.h

@@ -0,0 +1,100 @@
+#ifndef __PGenerate_H
+#define __PGenerate_H
+/*
+ * Copyright (c) 2006 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PGenerate.h,v 1.4 2007/06/02 03:42:12 steve Exp $"
+#endif
+
+# include  "LineInfo.h"
+# include  "StringHeap.h"
+# include  "HName.h"
+# include  <list>
+# include  <map>
+# include  "pform_types.h"
+
+class Design;
+class NetScope;
+class PExpr;
+class PProcess;
+class PGate;
+class PWire;
+
+/*
+ * This represents a generate scheme.
+ */
+class PGenerate : public LineInfo {
+
+    public:
+      PGenerate(unsigned id_number);
+      ~PGenerate();
+
+	// Generate schemes have an ID number, for when the scope is
+	// implicit.
+      const unsigned id_number;
+      perm_string scope_name;
+
+      enum scheme_t {GS_NONE, GS_LOOP, GS_CONDIT};
+      scheme_t scheme_type;
+
+	// generate loops have an index variable and three
+	// expressions: for (index = <init>; <test>; index=<step>)
+      perm_string loop_index;
+      PExpr*loop_init;
+      PExpr*loop_test;
+      PExpr*loop_step;
+
+      map<pform_name_t,PWire*>wires;
+      PWire* add_wire(PWire*);
+      PWire* get_wire(const pform_name_t&name) const;
+
+      list<PGate*> gates;
+      void add_gate(PGate*);
+
+      list<PProcess*> behaviors;
+      void add_behavior(PProcess*behave);
+
+      list<PGenerate*> generates;
+      PGenerate*parent;
+
+	// This method is called by the elaboration of a module to
+	// generate scopes. the container is the scope that is to
+	// contain the generated scope.
+      bool generate_scope(Design*des, NetScope*container);
+
+      bool elaborate_sig(Design*des) const;
+      bool elaborate(Design*des) const;
+
+      void dump(ostream&out, unsigned indent) const;
+
+    private:
+      bool generate_scope_loop_(Design*des, NetScope*container);
+
+	// These are the scopes created by generate_scope.
+      list<NetScope*>scope_list_;
+	// internal function called on each scope generated by this scheme.
+      bool elaborate_sig_(Design*des, NetScope*scope) const;
+      bool elaborate_(Design*des, NetScope*scope) const;
+
+    private: // not implemented
+      PGenerate(const PGenerate&);
+      PGenerate& operator= (const PGenerate&);
+};
+
+#endif

PSpec.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2006 Stephen Williams <steve@icarus.com>
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,34 +17,18 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PData.cc,v 1.2 2003/11/10 20:11:01 steve Exp $"
+#ident "$Id: PSpec.cc,v 1.2 2007/02/12 01:52:21 steve Exp $"
 #endif
 
-# include  "config.h"
-# include  "PData.h"
+# include  "PSpec.h"
 
-PData::PData(const hname_t&h)
-: hname_(h)
+PSpecPath::PSpecPath(unsigned src_cnt, unsigned dst_cnt)
+: conditional(false), condition(0), edge(0),
+  src(src_cnt), dst(dst_cnt),
+  data_source_expression(0)
 {
 }
 
-PData::~PData()
+PSpecPath::~PSpecPath()
 {
 }
-
-const hname_t&PData::name() const
-{
-      return hname_;
-}
-
-/*
- * $Log: PData.cc,v $
- * Revision 1.2  2003/11/10 20:11:01  steve
- *  missing include of config.h
- *
- * Revision 1.1  2003/01/26 21:15:58  steve
- *  Rework expression parsing and elaboration to
- *  accommodate real/realtime values and expressions.
- *
- */
-

PSpec.h

@@ -0,0 +1,79 @@
+#ifndef __PSpec_H
+#define __PSpec_H
+/*
+ * Copyright (c) 2006 Stephen Williams <[email protected]>
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PSpec.h,v 1.3 2007/04/13 02:34:35 steve Exp $"
+#endif
+
+# include  "LineInfo.h"
+# include  "StringHeap.h"
+# include  <vector>
+
+class PExpr;
+
+/*
+* The PSpecPath is the parse of a specify path, which is in its most
+* general form <path> = <delays>. The <delays> are collected into the
+* "delays" vector in all cases, and the variety is in the other
+* members.
+*
+* All paths also have a list of source names in the src vector, and a
+* list of destination names in the dst vector. These pairs are the
+* actual paths.
+*
+* If the path is a simple path, then:
+*      condition == nil
+*      edge == 0
+*      data_source_expression == nil
+*
+* If the path is conditional, then conditional == true and condition
+* is the condition expression. If the condition expression is nil,
+* then this is an ifnone conditional path.
+*
+* If data_source_expression != nil, then the path is edge sensitive
+* and the edge might not be 0.
+*/
+class PSpecPath  : public LineInfo {
+
+    public:
+      PSpecPath(unsigned src_cnt, unsigned dst_cnt);
+      ~PSpecPath();
+
+      void elaborate(class Design*des, class NetScope*scope) const;
+
+      void dump(std::ostream&out, unsigned ind) const;
+
+    public:
+	// Condition expression, if present.
+      bool conditional;
+      class PExpr* condition;
+	// Edge specification (-1==negedge, 0 = no edge, 1==posedge)
+      int edge;
+	// Ordered set of source nodes of a path
+      std::vector<perm_string> src;
+	// Ordered set of destination nodes of a path
+      std::vector<perm_string> dst;
+	// Data source expression
+      class PExpr* data_source_expression;
+
+      std::vector<class PExpr*>delays;
+};
+
+#endif

PTask.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PTask.h,v 1.13.2.1 2005/08/13 00:45:53 steve Exp $"
+#ident "$Id: PTask.h,v 1.14 2007/03/06 05:22:49 steve Exp $"
 #endif
 
 # include  "LineInfo.h"
@@ -35,6 +35,7 @@ class PExpr;
 enum PTaskFuncEnum {
       PTF_NONE,
       PTF_REG,
+      PTF_REG_S,
       PTF_INTEGER,
       PTF_REAL,
       PTF_REALTIME,
@@ -70,7 +71,7 @@ class PTask  : public LineInfo {
 	// Elaborate the statement to finish off the task definition.
       void elaborate(Design*des, NetScope*scope) const;
 
-      void dump(std::ostream&, unsigned) const;
+      void dump(ostream&, unsigned) const;
 
     private:
       svector<PWire*>*ports_;
@@ -106,7 +107,7 @@ class PFunction : public LineInfo {
 	/* Elaborate the behavioral statement. */
       void elaborate(Design *des, NetScope*) const;
 
-      void dump(std::ostream&, unsigned) const;
+      void dump(ostream&, unsigned) const;
 
     private:
       perm_string name_;
@@ -117,8 +118,8 @@ class PFunction : public LineInfo {
 
 /*
  * $Log: PTask.h,v $
- * Revision 1.13.2.1  2005/08/13 00:45:53  steve
- *  Fix compilation warnings/errors with newer compilers.
+ * Revision 1.14  2007/03/06 05:22:49  steve
+ *  Support signed function return values.
  *
  * Revision 1.13  2004/05/31 23:34:36  steve
  *  Rewire/generalize parsing an elaboration of

PUdp.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PUdp.h,v 1.12.2.1 2005/08/13 00:45:53 steve Exp $"
+#ident "$Id: PUdp.h,v 1.12 2004/03/08 00:47:44 steve Exp $"
 #endif
 
 # include  <map>
@@ -55,20 +55,20 @@ class PUdp {
     public:
       explicit PUdp(perm_string n, unsigned nports);
 
-      svector<std::string>ports;
+      svector<string>ports;
       unsigned find_port(const char*name);
 
       bool sequential;
 
-      svector<std::string>tinput;
+      svector<string>tinput;
       svector<char>  tcurrent;
       svector<char>  toutput;
 
       verinum::V initial;
 
-      std::map<std::string,PExpr*> attributes;
+      map<string,PExpr*> attributes;
 
-      void dump(std::ostream&out) const;
+      void dump(ostream&out) const;
 
       perm_string name_;
     private:
@@ -80,9 +80,6 @@ class PUdp {
 
 /*
  * $Log: PUdp.h,v $
- * Revision 1.12.2.1  2005/08/13 00:45:53  steve
- *  Fix compilation warnings/errors with newer compilers.
- *
  * Revision 1.12  2004/03/08 00:47:44  steve
  *  primitive ports can bind bi name.
  *

PWire.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,26 +17,19 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PWire.cc,v 1.10 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PWire.cc,v 1.14 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
 # include  "PWire.h"
 # include  <assert.h>
 
-PWire::PWire(const hname_t&n, NetNet::Type t, NetNet::PortType pt)
-: hname_(n), type_(t), port_type_(pt), signed_(false), isint_(false),
-lidx_(0), ridx_(0)
-{
-      if (t == NetNet::INTEGER) {
-	    type_ = NetNet::REG;
-	    signed_ = true;
-	    isint_ = true;
-      }
-}
-
-PWire::PWire(char*n, NetNet::Type t, NetNet::PortType pt)
-: hname_(n), type_(t), port_type_(pt), signed_(false), isint_(false),
+PWire::PWire(const pform_name_t&n,
+	     NetNet::Type t,
+	     NetNet::PortType pt,
+	     ivl_variable_type_t dt)
+: hname_(n), type_(t), port_type_(pt), data_type_(dt),
+  signed_(false), isint_(false),
 lidx_(0), ridx_(0)
 {
       if (t == NetNet::INTEGER) {
@@ -51,7 +44,7 @@ NetNet::Type PWire::get_wire_type() const
       return type_;
 }
 
-const hname_t& PWire::path() const
+const pform_name_t& PWire::path() const
 {
       return hname_;
 }
@@ -108,6 +101,19 @@ bool PWire::set_port_type(NetNet::PortType pt)
       }
 }
 
+bool PWire::set_data_type(ivl_variable_type_t dt)
+{
+      if (data_type_ != IVL_VT_NO_TYPE)
+	    if (data_type_ != dt)
+		  return false;
+	    else
+		  return true;
+
+      assert(data_type_ == IVL_VT_NO_TYPE);
+      data_type_ = dt;
+      return true;
+}
+
 void PWire::set_signed(bool flag)
 {
       signed_ = flag;
@@ -133,13 +139,28 @@ void PWire::set_memory_idx(PExpr*ldx, PExpr*rdx)
 {
       assert(lidx_ == 0);
       assert(ridx_ == 0);
-      assert(type_ == NetNet::REG);
       lidx_ = ldx;
       ridx_ = rdx;
 }
 
 /*
  * $Log: PWire.cc,v $
+ * Revision 1.14  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.13  2007/04/26 03:06:21  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.12  2007/01/16 05:44:14  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.11  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
  * Revision 1.10  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PWire.h

@@ -1,7 +1,7 @@
 #ifndef __PWire_H
 #define __PWire_H
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2007 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -19,13 +19,14 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PWire.h,v 1.17 2004/02/20 18:53:33 steve Exp $"
+#ident "$Id: PWire.h,v 1.21 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include  "netlist.h"
 # include  "LineInfo.h"
 # include  <map>
 # include  "svector.h"
+# include  "StringHeap.h"
 
 #ifdef HAVE_IOSFWD
 # include  <iosfwd>
@@ -42,18 +43,21 @@ class Design;
  * identifies a port by keeping it in its port list.
  *
  * The hname parameter to the constructor is a hierarchical name. It
- * is an array of strings starting with the root, running towards
- * the base name, and terminated by a null pointer. The environment
- * allocates the memory for me.
+ * is the name of the wire within a module, so does not include the
+ * current scope or any instances. Modules contain all the wires, so
+ * from that perspective, sub-scopes within the module are a part of
+ * the wire name.
  */
 class PWire : public LineInfo {
 
     public:
-      PWire(const hname_t&hname, NetNet::Type t, NetNet::PortType pt);
-      PWire(char*name, NetNet::Type t, NetNet::PortType pt);
+      PWire(const pform_name_t&hname,
+	    NetNet::Type t,
+	    NetNet::PortType pt,
+	    ivl_variable_type_t dt);
 
 	// Return a hierarchical name.
-      const hname_t&path() const;
+      const pform_name_t&path() const;
 
       NetNet::Type get_wire_type() const;
       bool set_wire_type(NetNet::Type);
@@ -65,6 +69,9 @@ class PWire : public LineInfo {
       bool get_signed() const;
       bool get_isint() const;
 
+      bool set_data_type(ivl_variable_type_t dt);
+      ivl_variable_type_t get_data_type() const;
+
       void set_range(PExpr*msb, PExpr*lsb);
 
       void set_memory_idx(PExpr*ldx, PExpr*rdx);
@@ -72,14 +79,15 @@ class PWire : public LineInfo {
       map<perm_string,PExpr*> attributes;
 
 	// Write myself to the specified stream.
-      void dump(ostream&out) const;
+      void dump(ostream&out, unsigned ind=4) const;
 
-      void elaborate_sig(Design*, NetScope*scope) const;
+      NetNet* elaborate_sig(Design*, NetScope*scope) const;
 
     private:
-      hname_t hname_;
+      pform_name_t hname_;
       NetNet::Type type_;
       NetNet::PortType port_type_;
+      ivl_variable_type_t data_type_;
       bool signed_;
       bool isint_;		// original type of integer
 
@@ -100,6 +108,19 @@ class PWire : public LineInfo {
 
 /*
  * $Log: PWire.h,v $
+ * Revision 1.21  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.20  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.19  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.18  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
  * Revision 1.17  2004/02/20 18:53:33  steve
  *  Addtrbute keys are perm_strings.
  *
@@ -130,40 +151,5 @@ class PWire : public LineInfo {
  *
  * Revision 1.10  2001/01/16 02:44:18  steve
  *  Use the iosfwd header if available.
- *
- * Revision 1.9  2000/12/11 00:31:43  steve
- *  Add support for signed reg variables,
- *  simulate in t-vvm signed comparisons.
- *
- * Revision 1.8  2000/05/02 16:27:38  steve
- *  Move signal elaboration to a seperate pass.
- *
- * Revision 1.7  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.6  1999/11/27 19:07:57  steve
- *  Support the creation of scopes.
- *
- * Revision 1.5  1999/06/17 05:34:42  steve
- *  Clean up interface of the PWire class,
- *  Properly match wire ranges.
- *
- * Revision 1.4  1999/06/02 15:38:46  steve
- *  Line information with nets.
- *
- * Revision 1.3  1999/04/19 01:59:36  steve
- *  Add memories to the parse and elaboration phases.
- *
- * Revision 1.2  1998/11/23 00:20:22  steve
- *  NetAssign handles lvalues as pin links
- *  instead of a signal pointer,
- *  Wire attributes added,
- *  Ability to parse UDP descriptions added,
- *  XNF generates EXT records for signals with
- *  the PAD attribute.
- *
- * Revision 1.1  1998/11/03 23:28:55  steve
- *  Introduce verilog to CVS.
- *
  */
 #endif

README.txt

@@ -88,6 +88,10 @@ Normally, this command automatically figures out everything it needs
 to know. It generally works pretty well. There are a few flags to the
 configure script that modify its behavior:
 
+	--without-ipal
+	    This turns off support for Icarus PAL, whether ipal
+	    libraries are installed or not.
+
 	--prefix=<root>
 	    The default is /usr/local, which causes the tool suite to
 	    be compiled for install in /usr/local/bin,
@@ -103,17 +107,6 @@ configure script that modify its behavior:
 	    compilation of 32bit compatible vvp (vvp32) and the vpi
 	    modules that match.
 
-	--enable-suffix
-	--enable-suffix=<your-suffix>
-	--disable-suffix
-	    Enable/disable changing the names of install files to use
-	    a suffix string so that this version or install can co-
-	    exist with other versions. This renames the installed
-	    commands (iverilog, iverilog-vpi, vvp) and the installed
-	    library files and include directory so that installations
-	    with the same prefix but different suffix are guaranteed
-	    to not interfere with each other.
-
 2.2.1 Special AMD64 Instructions
 
 (The Icarus Verilog RPM for x86_64 is build using these instructions.)
@@ -121,7 +114,7 @@ configure script that modify its behavior:
 If you are building for Linux/AMD64 (a.k.a x86_64) then to get the
 most out of your install, first make sure you have both 64bit and
 32bit development libraries installed. Then configure with this
-somewhat more complex command:
+somewhat more complicated command:
 
   ./configure libdir64='$(prefix)/lib64' vpidir1=vpi64 vpidir2=. --enable-vvp32
 
@@ -366,7 +359,8 @@ constructs.
 Icarus Verilog includes some features that are not part of the
 IEEE1364 standard, but have well defined meaning, and also sometimes
 gives nonstandard (but extended) meanings to some features of the
-language that are defined.
+language that are defined. See the "extensions.txt" documentation for
+more details.
 
     $is_signed(<expr>)
 	This system function returns 1 if the expression contained is
@@ -477,6 +471,20 @@ language that are defined.
 	combinational always blocks to be triggered when the values in
 	the sensitivity list are initialized by initial threads.
 
+    Nets with Types
+
+	Icarus Verilog support an extension syntax that allows nets
+	and regs to be explicitly typed. The currently supported types
+	are logic, bool and real. This implies that "logic" and "bool"
+	are new keywords. Typical syntax is:
+
+	wire real foo = 1.0;
+	reg logic bar, bat;
+
+	... and so forth. The syntax can be turned off by using the
+	-g2 flag to iverilog, and turned on explicitly with the -g2x
+	flag to iverilog.
+
 6.0 CREDITS
 
 Except where otherwise noted, Icarus Verilog, ivl and ivlpp are
@@ -486,52 +494,3 @@ Verilog guidance, and especially testing from many people. Testers in
 particular include a larger community of people interested in a GPL
 Verilog for Linux.
 
-
-6.1 PORT MAINTAINERS
-
-This is a list of people who have created ports and precompiled
-packages for various operating systems. These folks have graciously
-taken on the task of building Icarus Verilog on their systems and
-bundled it into neat packages.(+) If you want to be added to the list (or
-removed from the list) send e-mail to me.
-
-      FreeBSD/{Intel,alpha}
-	Ying-Chieh Liao <[email protected]>
-
-      Linux/{alpha,AMD64,Intel} (RPMS)
-	Stephen Williams <[email protected]>
-
-      Linux/* (.debs)
-	Hamish Moffatt <[email protected]>
-
-      Macintosh -- MacO/S
-	Yasuhisa Kato <[email protected]>
-
-      Mac O/S X
-        Timothy J. Wood <[email protected]>
-
-      NetBSD/*
-	Dan McMahill <[email protected]>
-
-      Solaris/SPARC packages (.pkg)
-	Dan McMahill <[email protected]>
-
-      Cygwin32/*
-        Venkat Iyer <[email protected]>
-
-      Mingw32
-        Venkat Iyer <[email protected]>
-
-(+) These are not the only systems where Icarus Verilog has been run,
-just the systems where precompiled binaries are publicly available.
-
-
-6.2 TEST SUITE MANAGER
-
-Steve Wilson <[email protected]> has taken on the large task of managing
-the test suite. He has maintained the regression test scripts, the
-driver list, received submissions from myself and others, and has
-written a great many tests on his own. Any compiler writer, for any
-language, will tell you that the test suite is at least as important
-as the compiler code itself.
-

Statement.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Statement.cc,v 1.29 2004/02/18 17:11:54 steve Exp $"
+#ident "$Id: Statement.cc,v 1.30 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include "config.h"
@@ -107,16 +107,22 @@ PBlock::~PBlock()
 	    delete list_[idx];
 }
 
-PCallTask::PCallTask(const hname_t&n, const svector<PExpr*>&p)
+PCallTask::PCallTask(const pform_name_t&n, const svector<PExpr*>&p)
 : path_(n), parms_(p)
 {
 }
 
+PCallTask::PCallTask(perm_string n, const svector<PExpr*>&p)
+: parms_(p)
+{
+      path_.push_back(name_component_t(n));
+}
+
 PCallTask::~PCallTask()
 {
 }
 
-const hname_t& PCallTask::path() const
+const pform_name_t& PCallTask::path() const
 {
       return path_;
 }
@@ -178,7 +184,7 @@ PDelayStatement::~PDelayStatement()
 {
 }
 
-PDisable::PDisable(const hname_t&sc)
+PDisable::PDisable(const pform_name_t&sc)
 : scope_(sc)
 {
 }
@@ -273,7 +279,7 @@ PRepeat::~PRepeat()
       delete statement_;
 }
 
-PTrigger::PTrigger(const hname_t&e)
+PTrigger::PTrigger(const pform_name_t&e)
 : event_(e)
 {
 }
@@ -295,6 +301,10 @@ PWhile::~PWhile()
 
 /*
  * $Log: Statement.cc,v $
+ * Revision 1.30  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
  * Revision 1.29  2004/02/18 17:11:54  steve
  *  Use perm_strings for named langiage items.
  *

Statement.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Statement.h,v 1.40.2.1 2006/07/10 00:21:49 steve Exp $"
+#ident "$Id: Statement.h,v 1.44 2007/05/24 04:07:11 steve Exp $"
 #endif
 
 # include  <string>
@@ -36,6 +36,7 @@ class Design;
 class NetAssign_;
 class NetCAssign;
 class NetDeassign;
+class NetForce;
 class NetScope;
 
 /*
@@ -54,6 +55,8 @@ class PProcess : public LineInfo {
 
       virtual ~PProcess();
 
+      bool elaborate(Design*des, NetScope*scope) const;
+
       Type type() const { return type_; }
       Statement*statement() { return statement_; }
 
@@ -71,15 +74,12 @@ class PProcess : public LineInfo {
  * fact, the Statement class is abstract and represents all the
  * possible kinds of statements that exist in Verilog.
  */
-class Statement : public LineInfo, public Attrib {
+class Statement : public LineInfo {
 
     public:
       Statement() { }
       virtual ~Statement() =0;
 
-      map<perm_string,PExpr*> attributes;
-
-      void dump_attributes(ostream&out, unsigned ind) const;
       virtual void dump(ostream&out, unsigned ind) const;
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void elaborate_scope(Design*des, NetScope*scope) const;
@@ -173,10 +173,11 @@ class PBlock  : public Statement {
 class PCallTask  : public Statement {
 
     public:
-      explicit PCallTask(const hname_t&n, const svector<PExpr*>&parms);
+      explicit PCallTask(const pform_name_t&n, const svector<PExpr*>&parms);
+      explicit PCallTask(perm_string n, const svector<PExpr*>&parms);
       ~PCallTask();
 
-      const hname_t& path() const;
+      const pform_name_t& path() const;
 
       unsigned nparms() const { return parms_.count(); }
 
@@ -197,7 +198,7 @@ class PCallTask  : public Statement {
       NetProc* elaborate_sys(Design*des, NetScope*scope) const;
       NetProc* elaborate_usr(Design*des, NetScope*scope) const;
 
-      hname_t path_;
+      pform_name_t path_;
       svector<PExpr*> parms_;
 };
 
@@ -296,14 +297,14 @@ class PDelayStatement  : public Statement {
 class PDisable  : public Statement {
 
     public:
-      explicit PDisable(const hname_t&sc);
+      explicit PDisable(const pform_name_t&sc);
       ~PDisable();
 
       virtual void dump(ostream&out, unsigned ind) const;
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
 
     private:
-      hname_t scope_;
+      pform_name_t scope_;
 };
 
 /*
@@ -348,7 +349,7 @@ class PForce  : public Statement {
       explicit PForce(PExpr*l, PExpr*r);
       ~PForce();
 
-      virtual NetProc* elaborate(Design*des, NetScope*scope) const;
+      virtual NetForce* elaborate(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
@@ -396,6 +397,7 @@ class PNoop  : public Statement {
 
     public:
       PNoop() { }
+      ~PNoop() { }
 };
 
 class PRepeat : public Statement {
@@ -432,14 +434,14 @@ class PRelease  : public Statement {
 class PTrigger  : public Statement {
 
     public:
-      explicit PTrigger(const hname_t&ev);
+      explicit PTrigger(const pform_name_t&ev);
       ~PTrigger();
 
       virtual NetProc* elaborate(Design*des, NetScope*scope) const;
       virtual void dump(ostream&out, unsigned ind) const;
 
     private:
-      hname_t event_;
+      pform_name_t event_;
 };
 
 class PWhile  : public Statement {
@@ -459,8 +461,20 @@ class PWhile  : public Statement {
 
 /*
  * $Log: Statement.h,v $
- * Revision 1.40.2.1  2006/07/10 00:21:49  steve
- *  Add support for full_case attribute.
+ * Revision 1.44  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.43  2007/03/05 05:59:10  steve
+ *  Handle processes within generate loops.
+ *
+ * Revision 1.42  2005/12/05 21:21:18  steve
+ *  Fixes for stubborn compilers.
+ *
+ * Revision 1.41  2004/12/11 02:31:25  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
  *
  * Revision 1.40  2004/02/20 18:53:33  steve
  *  Addtrbute keys are perm_strings.

StringHeap.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: StringHeap.cc,v 1.6.2.1 2005/08/13 00:45:53 steve Exp $"
+#ident "$Id: StringHeap.cc,v 1.6 2004/02/18 17:11:54 steve Exp $"
 #endif
 
 # include  "StringHeap.h"
@@ -131,7 +131,7 @@ perm_string StringHeapLex::make(const char*text)
       return perm_string(add(text));
 }
 
-perm_string StringHeapLex::make(const std::string&text)
+perm_string StringHeapLex::make(const string&text)
 {
       return perm_string(add(text.c_str()));
 }
@@ -181,9 +181,6 @@ bool operator < (perm_string a, perm_string b)
 
 /*
  * $Log: StringHeap.cc,v $
- * Revision 1.6.2.1  2005/08/13 00:45:53  steve
- *  Fix compilation warnings/errors with newer compilers.
- *
  * Revision 1.6  2004/02/18 17:11:54  steve
  *  Use perm_strings for named langiage items.
  *

StringHeap.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: StringHeap.h,v 1.5.2.2 2005/08/13 00:45:53 steve Exp $"
+#ident "$Id: StringHeap.h,v 1.6 2005/06/14 19:13:43 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -103,7 +103,7 @@ class StringHeapLex  : private StringHeap {
 
       const char*add(const char*);
       perm_string make(const char*);
-      perm_string make(const std::string&);
+      perm_string make(const string&);
 
       unsigned add_count() const;
       unsigned add_hit_count() const;
@@ -122,11 +122,8 @@ class StringHeapLex  : private StringHeap {
 
 /*
  * $Log: StringHeap.h,v $
- * Revision 1.5.2.2  2005/08/13 00:45:53  steve
- *  Fix compilation warnings/errors with newer compilers.
- *
- * Revision 1.5.2.1  2005/06/14 15:33:54  steve
- *  Fix gcc4 build issues.
+ * Revision 1.6  2005/06/14 19:13:43  steve
+ *  gcc3/4 compile errors.
  *
  * Revision 1.5  2004/02/18 17:11:54  steve
  *  Use perm_strings for named langiage items.

_pli_types.h.in

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: _pli_types.h.in,v 1.7 2003/11/12 02:38:44 steve Exp $"
+#ident "$Id: _pli_types.h.in,v 1.8 2007/06/05 21:32:30 steve Exp $"
 #endif
 
 # undef HAVE_INTTYPES_H
@@ -42,7 +42,7 @@ typedef int32_t  PLI_INT32;
 
 typedef signed short   PLI_INT16;
 typedef unsigned short PLI_UINT16;
-typedef signed char    PLI_BYTE8;
+typedef char           PLI_BYTE8;
 typedef unsigned char  PLI_UBYTE8;
 
 # define PLI_UINT64_FMT PRIu64
@@ -84,12 +84,15 @@ typedef signed int     PLI_INT32;
 typedef unsigned int   PLI_UINT32;
 typedef signed short   PLI_INT16;
 typedef unsigned short PLI_UINT16;
-typedef signed char    PLI_BYTE8;
+typedef char           PLI_BYTE8;
 typedef unsigned char  PLI_UBYTE8;
 #endif
 
 /*
  * $Log: _pli_types.h.in,v $
+ * Revision 1.8  2007/06/05 21:32:30  steve
+ *  More standard PLI_BYTE8.
+ *
  * Revision 1.7  2003/11/12 02:38:44  steve
  *  Clean up manual definitions of PLI_UINT64_FMT.
  *

aclocal.m4

@@ -14,7 +14,7 @@
 AC_DEFUN([AX_CPP_IDENT],
 [AC_CACHE_CHECK([for ident support in C compiler], ax_cv_cpp_ident,
 [AC_TRY_COMPILE([
-#ident "$Id: aclocal.m4,v 1.6.2.2 2007/05/16 23:51:42 steve Exp $"
+#ident "$Id: aclocal.m4,v 1.7 2007/05/16 23:59:12 steve Exp $"
 ],[while (0) {}],
 [AS_VAR_SET(ax_cv_cpp_ident, yes)],
 [AS_VAR_SET(ax_cv_cpp_ident, no)])])
@@ -24,23 +24,6 @@ fi
 AC_SUBST(ident_support)
 ])# AC_CPP_IDENT
 
-# AX_ENABLE_SUFFIX
-# ----------------
-#  Create the configure option --enable-suffix[=suffix] to generate suffix
-# strings for the installed commands. This allows for shared installs of
-# different builds. Remember to change the default suffix string to some
-# value appropriate for the current version.
-AC_DEFUN([AX_ENABLE_SUFFIX],
-[AC_ARG_ENABLE([suffix],[Set the installation command suffix],[true],[enable_suffix=yes])
-if test X$enable_suffix = Xyes; then
-  install_suffix='-0.8'
-elif test X$enable_suffix = Xno; then
-  install_suffix=''
-else
-  install_suffix="$enable_suffix"
-fi
-AC_SUBST(install_suffix)
-])# AX_ENABLE_SUFFIX
 
 # _AX_C_UNDERSCORES_MATCH_IFELSE(PATTERN, ACTION-IF-MATCH, ACTION-IF-NOMATCH)
 # ------------------------------
@@ -108,9 +91,13 @@ AC_MSG_RESULT($WIN32)
 AC_DEFUN([AX_LD_EXTRALIBS],
 [AC_MSG_CHECKING([for extra libs needed])
 EXTRALIBS=
-if test "$MINGW32" = "yes"; then
-   EXTRALIBS="-liberty"
-fi
+case "${host}" in
+     *-*-cygwin* )
+        if test "$MINGW32" = "yes"; then
+            EXTRALIBS="-liberty"
+        fi
+        ;;
+esac
 AC_SUBST(EXTRALIBS)
 AC_MSG_RESULT($EXTRALIBS)
 ])# AX_LD_EXTRALIBS
@@ -122,7 +109,7 @@ AC_DEFUN([AX_LD_SHAREDLIB_OPTS],
 [AC_MSG_CHECKING([for shared library link flag])
 shared=-shared
 case "${host}" in
-     *-*-cygwin* | *-*-mingw32*)
+     *-*-cygwin*)
         shared="-shared -Wl,--enable-auto-image-base"
         ;;
 
@@ -151,7 +138,7 @@ AC_DEFUN([AX_C_PICFLAG],
 PICFLAG=-fPIC
 case "${host}" in
 
-     *-*-cygwin* | *-*-mingw32*)
+     *-*-cygwin*)
         PICFLAG=
         ;;
 
@@ -186,7 +173,7 @@ case "${host}" in
         rdynamic=""
         ;;
 
-    *-*-cygwin* | *-*-mingw32*)
+    *-*-cygwin*)
         rdynamic=""
         ;;
 

async.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: async.cc,v 1.7.2.2 2007/05/30 17:48:53 steve Exp $"
+#ident "$Id: async.cc,v 1.7 2004/01/18 23:26:54 steve Exp $"
 #endif
 
 # include "config.h"
@@ -66,10 +66,6 @@ bool NetEvWait::is_asynchronous()
 
       NexusSet*inputs = statement_->nex_input();
 
-	/* All the inputs of the statement must be accounted for in
-	   the sensitivity list. Otherwise, there are inputs that can
-	   change without the event being triggered, and that implies
-	   a latch, not a combinational circuit. */
       if (! sense->contains(*inputs)) {
 	    delete sense;
 	    delete inputs;
@@ -89,7 +85,7 @@ bool NetProc::is_asynchronous()
       return false;
 }
 
-bool NetProcTop::is_asynchronous() const
+bool NetProcTop::is_asynchronous()
 {
       if (type_ == NetProcTop::KINITIAL)
 	    return false;
@@ -99,12 +95,6 @@ bool NetProcTop::is_asynchronous() const
 
 /*
  * $Log: async.cc,v $
- * Revision 1.7.2.2  2007/05/30 17:48:53  steve
- *  Support Latch synthesis (Alan Feldstein)
- *
- * Revision 1.7.2.1  2006/05/21 21:58:46  steve
- *  NetESignal input is only selected bits.
- *
  * Revision 1.7  2004/01/18 23:26:54  steve
  *  The is_combinational function really need not recurse.
  *

attributes.txt

@@ -70,14 +70,6 @@ warning.)
 
 * Other Attributes
 
-(* ivl_full_case *)
-
-    This attribute only has meaning when attached to case statements,
-    and only when doing synthesis. The statement means to ignore the
-    possibility that some cases are not defined. Presume that the
-    device really is fully specified and do not emit any warnings
-    about missing guards.
-
 [ none defined yet ]
 
 

autoconf.sh

@@ -7,9 +7,9 @@
 # to just run this script to autoconf wherever needed.
 #
 echo "Autoconf in root..."
-autoconf
+autoconf -f
 
-for dir in vpip vpi vvp tgt-vvp tgt-edif tgt-fpga libveriuser cadpli
+for dir in vpip vpi vvp tgt-vvp tgt-fpga tgt-stub libveriuser cadpli
 do
     echo "Autoconf in $dir..."
     ( cd ./$dir ; autoconf -f --include=.. )

cadpli/Makefile.in

@@ -16,12 +16,12 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.11.2.1 2005/02/23 18:40:23 steve Exp $"
+#ident "$Id: Makefile.in,v 1.13 2007/02/06 05:07:31 steve Exp $"
 #
 #
 SHELL = /bin/sh
 
-suffix = @install_suffix@
+VERSION = 0.0
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -33,9 +33,7 @@ bindir = @bindir@
 libdir = @libdir@
 includedir = $(prefix)/include
 
-vpidir = @libdir@/ivl$(suffix)/@vpidir1@
-
-strip_dynamic=@strip_dynamic@
+vpidir = @libdir@/ivl/@vpidir1@
 
 CC = @CC@
 INSTALL = @INSTALL@
@@ -45,17 +43,16 @@ INSTALL_DATA = @INSTALL_DATA@
 CPPFLAGS = @ident_support@ -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
-STRIP = @STRIP@
 
 SHARED = @shared@
 
 all:
 
 ifeq (@enable_vvp32@,yes)
-vpidir32 = $(libdir)/ivl$(suffix)/@vpidir2@
+vpidir32 = $(libdir)/ivl/@vpidir2@
 ALL32 = all32
 INSTALL32 = install32
-UNINSTALL32 = uninistall32
+UNINSTALL32 = uninstall32
 include $(srcdir)/enable_vvp32.mk
 endif
 
@@ -74,7 +71,7 @@ dep:
 O = cadpli.o
 
 SYSTEM_VPI_LDFLAGS = -L../vvp -lvpi
-ifeq (@WIN32@,yes)
+ifeq (@MING32@,yes)
     SYSTEM_VPI_LDFLAGS += @EXTRALIBS@
 endif
 
@@ -86,7 +83,6 @@ clean:
 
 distclean: clean
 	rm -f Makefile config.status config.log config.cache
-	rm -rf autom4te.cache
 
 install: all installdirs $(vpidir)/cadpli.vpl $(INSTALL32)
 
@@ -99,6 +95,8 @@ installdirs: ../mkinstalldirs
 uninstall: $(UNINSTALL32)
 	rm -f $(vpidir)/cadpli.vpl
 
+uninstall32:
+
 ifeq (@enable_vvp32@,yes)
 include $(srcdir)/enable_vvp32.mk
 endif

cadpli/configure.in

@@ -10,8 +10,6 @@ AC_SUBST(EXEEXT)
 # Combined check for Microsoft-related bogosities; sets WIN32 if found
 AX_WIN32
 
-AX_ENABLE_SUFFIX
-
 AC_PROG_INSTALL
 
 # vvp32 is by default disabled

compiler.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: compiler.h,v 1.26.2.3 2006/06/12 00:16:50 steve Exp $"
+#ident "$Id: compiler.h,v 1.33 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 # include  <list>
@@ -32,11 +32,8 @@
  */
 
 
-/* The INTEGER_WIDTH is the default width of integer variables, and
-   the presumed width of unsigned literal numbers. */
-#ifndef INTEGER_WIDTH
-# define INTEGER_WIDTH 32
-#endif
+/* The integer_width is the width of integer variables. */
+extern unsigned integer_width;
 
 /* The TIME_WIDTH is the width of time variables. */
 #ifndef TIME_WIDTH
@@ -78,17 +75,13 @@ extern bool warn_timescale;
 /* Warn about legal but questionable module port bindings. */
 extern bool warn_portbinding;
 
-/* Warn about unused or unassigned variables. */
-extern bool warn_unused;
-
 /* This is true if verbose output is requested. */
 extern bool verbose_flag;
 
 extern bool debug_scopes;
 extern bool debug_eval_tree;
 extern bool debug_elaborate;
-extern bool debug_synth;
-extern bool debug_cprop;
+extern bool debug_synth2;
 
 /* Path to a directory useful for finding subcomponents. */
 extern const char*basedir;
@@ -98,28 +91,46 @@ extern list<const char*>library_suff;
 extern int build_library_index(const char*path, bool key_case_sensitive);
 
 /* This is the generation of Verilog that the compiler is asked to
-   support. */
+   support. Then there are also more detailed controls for more
+   specific language features. */
 enum generation_t {
       GN_VER1995  = 1,
       GN_VER2001  = 2,
-      GN_SYSVER30 = 3,
+      GN_VER2001X = 3,
       GN_DEFAULT  = 3
 };
 
 extern generation_t generation_flag;
 
+extern bool gn_cadence_types_flag;
+
+/* These functions test that specific features are enabled. */
+inline bool gn_cadence_types_enabled()
+{ return gn_cadence_types_flag && generation_flag==GN_VER2001X; }
+
+/* If this flag is true, then elaborate specify blocks. If this flag
+   is false, then skip elaboration of specify behavior. */
+extern bool gn_specify_blocks_flag;
+
   /* This is the string to use to invoke the preprocessor. */
 extern char*ivlpp_string;
 
 extern map<perm_string,unsigned> missing_modules;
 
+  /* Files that are library files are in this map. The lexor compares
+     file names as it processes `line directives, and if the file name
+     matches an entry in this table, it will turn on the
+     library_active_flag so that modules know that they are in a
+     library. */
+extern map<string,bool> library_file_map;
+
 /*
  * the lex_strings are perm_strings made up of tokens from the source
  * file. Identifiers are so likely to be used many times that it makes
  * much sense to use a StringHeapLex to hold them.
  */
 extern StringHeapLex lex_strings;
-
+extern StringHeap misc_strings;
 
 /*
  * system task/function listings.
@@ -131,7 +142,7 @@ extern StringHeapLex lex_strings;
  */
 struct sfunc_return_type {
       const char*   name;
-      NetExpr::TYPE type;
+      ivl_variable_type_t type;
       unsigned      wid;
       int           signed_flag;
 };
@@ -141,14 +152,26 @@ extern int load_sys_func_table(const char*path);
 
 /*
  * $Log: compiler.h,v $
- * Revision 1.26.2.3  2006/06/12 00:16:50  steve
- *  Add support for -Wunused warnings.
+ * Revision 1.33  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
  *
- * Revision 1.26.2.2  2006/04/23 04:25:45  steve
- *  Add cprop debugging.
+ * Revision 1.32  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
  *
- * Revision 1.26.2.1  2006/04/01 01:37:24  steve
- *  Add synth debug flag
+ * Revision 1.31  2006/09/28 04:35:18  steve
+ *  Support selective control of specify and xtypes features.
+ *
+ * Revision 1.30  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
+ * Revision 1.29  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
+ * Revision 1.28  2005/06/28 04:25:55  steve
+ *  Remove reference to SystemVerilog.
+ *
+ * Revision 1.27  2005/04/24 23:44:01  steve
+ *  Update DFF support to new data flow.
  *
  * Revision 1.26  2004/10/04 01:10:52  steve
  *  Clean up spurious trailing white space.

config.h.in

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: config.h.in,v 1.11 2004/10/04 01:10:52 steve Exp $"
+#ident "$Id: config.h.in,v 1.12 2007/02/02 04:33:00 steve Exp $"
 #endif
 
 #if defined(__cplusplus)
@@ -37,6 +37,7 @@
 # undef HAVE_TIMES
 # undef HAVE_IOSFWD
 # undef HAVE_GETOPT_H
+# undef HAVE_INTTYPES_H
 # undef HAVE_LIBIBERTY_H
 # undef HAVE_MALLOC_H
 # undef HAVE_DLFCN_H
@@ -48,8 +49,15 @@
 # undef HAVE_SYS_WAIT_H
 # undef WORDS_BIGENDIAN
 
+#ifdef HAVE_INTTYPES_H
+# include  <inttypes.h>
+#endif
+
 /*
  * $Log: config.h.in,v $
+ * Revision 1.12  2007/02/02 04:33:00  steve
+ *  Use inttypes.h instead of stdint.h for portability.
+ *
  * Revision 1.11  2004/10/04 01:10:52  steve
  *  Clean up spurious trailing white space.
  *

configure.in

@@ -9,9 +9,6 @@ AC_PROG_CC
 AC_PROG_CXX
 AC_CHECK_TOOL(STRIP, strip, true)
 AC_CHECK_PROGS(XGPERF,gperf,none)
-AC_CHECK_PROGS(MAN,man,none)
-AC_CHECK_PROGS(PS2PDF,ps2pdf,none)
-
 if test "$XGPERF" = "none"
 then
 	echo ""
@@ -59,12 +56,9 @@ AC_CHECK_LIB(z, gzwrite, HAVE_LIBZ=yes, HAVE_LIBZ=no)
 AC_SUBST(HAVE_LIBZ)
 if test "$WIN32" = "yes"; then
 AC_CHECK_LIB(bz2, main)
-AC_CHECK_LIB(bz2, main, HAVE_LIBBZ2=yes, HAVE_LIBBZ2=no)
 else
 AC_CHECK_LIB(bz2, BZ2_bzdopen)
-AC_CHECK_LIB(bz2, BZ2_bzdopen, HAVE_LIBBZ2=yes, HAVE_LIBBZ2=no)
 fi
-AC_SUBST(HAVE_LIBBZ2)
 
 AC_MSG_CHECKING(for sys/times)
 AC_TRY_LINK(
@@ -97,8 +91,6 @@ AC_C_BIGENDIAN
 
 # $host
 
-AX_ENABLE_SUFFIX
-
 AX_LD_EXTRALIBS
 
 # Compiler option for position independent code, needed when making shared objects.
@@ -149,6 +141,7 @@ AC_SUBST(vpidir1)
 AC_SUBST(vpidir2)
 AC_MSG_RESULT(${vpidir1} ${vpidir2})
 
-AC_CONFIG_SUBDIRS(vvp vpi tgt-vvp tgt-edif tgt-fpga libveriuser cadpli)
+# XXX disable tgt-fpga for the moment
+AC_CONFIG_SUBDIRS(vvp vpi tgt-stub tgt-null tgt-vvp libveriuser cadpli)
 
-AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
+AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile)

cprop.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2006 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2005 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: cprop.cc,v 1.47.2.7 2007/02/26 19:51:38 steve Exp $"
+#ident "$Id: cprop.cc,v 1.56 2007/03/07 00:38:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -25,7 +25,6 @@
 # include  "netlist.h"
 # include  "netmisc.h"
 # include  "functor.h"
-# include  "compiler.h"
 # include  <assert.h>
 
 
@@ -48,9 +47,6 @@ struct cprop_functor  : public functor_t {
       virtual void lpm_ff(Design*des, NetFF*obj);
       virtual void lpm_logic(Design*des, NetLogic*obj);
       virtual void lpm_mux(Design*des, NetMux*obj);
-      virtual void lpm_mux_large(Design*des, NetMux*obj);
-      virtual void lpm_ram_dq(Design*des, NetRamDq*obj);
-      bool lpm_ram_dq_const_address_(Design*des, NetRamDq*obj);
 };
 
 void cprop_functor::signal(Design*des, NetNet*obj)
@@ -59,86 +55,6 @@ void cprop_functor::signal(Design*des, NetNet*obj)
 
 void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
 {
-	// For now, only additions are handled.
-      if (obj->attribute(perm_string::literal("LPM_Direction")) != verinum("ADD"))
-	    return;
-
-	// If the low bit on the A side is 0, then eliminate it from
-	// the adder, and pass the B side directly to the
-	// result. Don't reduce the adder smaller then a 1-bit
-	// adder. These will be eliminated later.
-      while ((obj->width() > 1)
-	     && obj->pin_DataA(0).nexus()->drivers_constant()
-	     && (obj->pin_DataA(0).nexus()->driven_value() == verinum::V0)) {
-
-	    NetAddSub*tmp = 0;
-	    tmp = new NetAddSub(obj->scope(), obj->name(), obj->width()-1);
-	      //connect(tmp->pin_Aclr(), obj->pin_Aclr());
-	      //connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
-	      //connect(tmp->pin_Clock(), obj->pin_Clock());
-	      //connect(tmp->pin_Cin(), obj->pin_Cin());
-	    connect(tmp->pin_Cout(), obj->pin_Cout());
-	      //connect(tmp->pin_Overflow(), obj->pin_Overflow());
-	    for (unsigned idx = 0 ;  idx < tmp->width() ;  idx += 1) {
-		  connect(tmp->pin_DataA(idx), obj->pin_DataA(idx+1));
-		  connect(tmp->pin_DataB(idx), obj->pin_DataB(idx+1));
-		  connect(tmp->pin_Result(idx), obj->pin_Result(idx+1));
-	    }
-	    connect(obj->pin_Result(0), obj->pin_DataB(0));
-	    delete obj;
-	    des->add_node(tmp);
-	    obj = tmp;
-	    count += 1;
-      }
-
-	// Now do the same thing on the B side.
-      while ((obj->width() > 1)
-	     && obj->pin_DataB(0).nexus()->drivers_constant()
-	     && (obj->pin_DataB(0).nexus()->driven_value() == verinum::V0)) {
-
-	    NetAddSub*tmp = 0;
-	    tmp = new NetAddSub(obj->scope(), obj->name(), obj->width()-1);
-	      //connect(tmp->pin_Aclr(), obj->pin_Aclr());
-	      //connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
-	      //connect(tmp->pin_Clock(), obj->pin_Clock());
-	      //connect(tmp->pin_Cin(), obj->pin_Cin());
-	    connect(tmp->pin_Cout(), obj->pin_Cout());
-	      //connect(tmp->pin_Overflow(), obj->pin_Overflow());
-	    for (unsigned idx = 0 ;  idx < tmp->width() ;  idx += 1) {
-		  connect(tmp->pin_DataA(idx), obj->pin_DataA(idx+1));
-		  connect(tmp->pin_DataB(idx), obj->pin_DataB(idx+1));
-		  connect(tmp->pin_Result(idx), obj->pin_Result(idx+1));
-	    }
-	    connect(obj->pin_Result(0), obj->pin_DataA(0));
-	    delete obj;
-	    des->add_node(tmp);
-	    obj = tmp;
-	    count += 1;
-      }
-
-	// If the adder is only 1 bit wide, then replace it with the
-	// simple logic gate.
-      if (obj->width() == 1) {
-	    NetLogic*tmp;
-	    if (obj->pin_Cout().is_linked()) {
-		  tmp = new NetLogic(obj->scope(),
-				     obj->scope()->local_symbol(),
-				     3, NetLogic::AND);
-		  connect(tmp->pin(0), obj->pin_Cout());
-		  connect(tmp->pin(1), obj->pin_DataA(0));
-		  connect(tmp->pin(2), obj->pin_DataB(0));
-		  des->add_node(tmp);
-	    }
-	    tmp = new NetLogic(obj->scope(), obj->name(), 3, NetLogic::XOR);
-	    connect(tmp->pin(0), obj->pin_Result(0));
-	    connect(tmp->pin(1), obj->pin_DataA(0));
-	    connect(tmp->pin(2), obj->pin_DataB(0));
-	    delete obj;
-	    des->add_node(tmp);
-	    count += 1;
-	    return;
-      }
-
 }
 
 void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
@@ -157,6 +73,8 @@ void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
 
 void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
 {
+#if 0
+	/* XXXX Need to reimplement this code to account for vectors. */
       NetScope*scope = obj->scope();
 
       unsigned const_count = 0;
@@ -252,7 +170,7 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
 	   with a simple XOR gate. */
       if (top == 1) {
 	    NetLogic*tmp = new NetLogic(scope, obj->name(), 3,
-					NetLogic::XNOR);
+					NetLogic::XNOR, 1);
 	    connect(tmp->pin(0), obj->pin_AEB());
 	    connect(tmp->pin(1), obj->pin_DataA(0));
 	    connect(tmp->pin(2), obj->pin_DataB(0));
@@ -275,6 +193,7 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
       delete obj;
       des->add_node(tmp);
       count += 1;
+#endif
 }
 
 void cprop_functor::lpm_ff(Design*des, NetFF*obj)
@@ -282,63 +201,30 @@ void cprop_functor::lpm_ff(Design*des, NetFF*obj)
 	// Look for and count unlinked FF outputs. Note that if the
 	// Data and Q pins are connected together, they can be removed
 	// from the circuit, since it doesn't do anything.
-      unsigned unlinked_count = 0;
-      for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-	    if (connected(obj->pin_Data(idx), obj->pin_Q(idx))
-		&& (! obj->pin_Sclr().is_linked())
-		&& (! obj->pin_Sset().is_linked())
-		&& (! obj->pin_Aclr().is_linked())
-		&& (! obj->pin_Aset().is_linked())) {
-		  obj->pin_Data(idx).unlink();
-		  obj->pin_Q(idx).unlink();
-	    }
-	    if (! obj->pin_Q(idx).is_linked())
-		  unlinked_count += 1;
-      }
 
-	// If the entire FF is unlinked, remove the whole thing.
-      if (unlinked_count == obj->width()) {
+      if (connected(obj->pin_Data(), obj->pin_Q())
+	  && (! obj->pin_Sclr().is_linked())
+	  && (! obj->pin_Sset().is_linked())
+	  && (! obj->pin_Aclr().is_linked())
+	  && (! obj->pin_Aset().is_linked())) {
+	    obj->pin_Data().unlink();
+	    obj->pin_Q().unlink();
 	    delete obj;
-	    count += 1;
-	    return;
-      }
-
-	// If some of the FFs are unconnected, make a new FF array
-	// that does not include the useless FF devices.
-      if (unlinked_count > 0) {
-	    NetFF*tmp = new NetFF(obj->scope(), obj->name(),
-				  obj->width()-unlinked_count);
-	    connect(tmp->pin_Clock(), obj->pin_Clock());
-	    connect(tmp->pin_Enable(), obj->pin_Enable());
-	    connect(tmp->pin_Aload(), obj->pin_Aload());
-	    connect(tmp->pin_Aset(), obj->pin_Aset());
-	    connect(tmp->pin_Aclr(), obj->pin_Aclr());
-	    connect(tmp->pin_Sload(), obj->pin_Sload());
-	    connect(tmp->pin_Sset(), obj->pin_Sset());
-	    connect(tmp->pin_Sclr(), obj->pin_Sclr());
-
-	    unsigned tidx = 0;
-	    for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1)
-		  if (obj->pin_Q(idx).is_linked()) {
-			connect(tmp->pin_Data(tidx), obj->pin_Data(idx));
-			connect(tmp->pin_Q(tidx), obj->pin_Q(idx));
-			tidx += 1;
-		  }
-
-	    assert(tidx == obj->width() - unlinked_count);
-	    delete obj;
-	    des->add_node(tmp);
-	    count += 1;
-	    return;
       }
 }
 
 void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 {
+#if 0
       NetScope*scope = obj->scope();
+#endif
 
       switch (obj->type()) {
-
+#if 0
+	      /* XXXX This old code assumed that the individual bit
+		 slices could be replaced with different gates. They
+		 cannot when the device takes atomic vectors, so this
+		 needs to be rewritten. XXXX */
 	  case NetLogic::NAND:
 	  case NetLogic::AND: {
 		unsigned top = obj->pin_count();
@@ -453,12 +339,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			  case NetLogic::AND:
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::BUF);
+					       NetLogic::BUF, 1);
 			    break;
 			  case NetLogic::NAND:
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::NOT);
+					       NetLogic::NOT, 1);
 			    break;
 			  default:
 			    assert(0);
@@ -484,7 +370,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		if (top < obj->pin_count()) {
 		      NetLogic*tmp = new NetLogic(scope,
 						  obj->name(), top,
-						  obj->type());
+						  obj->type(), 1);
 		      tmp->rise_time(obj->rise_time());
 		      tmp->fall_time(obj->fall_time());
 		      tmp->decay_time(obj->decay_time());
@@ -501,7 +387,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		}
 		break;
 	  }
-
+#endif
+#if 0
+	      /* XXXX This old code assumed that the individual bit
+		 slices could be replaced with different gates. They
+		 cannot when the device takes atomic vectors, so this
+		 needs to be rewritten. XXXX */
 
 	  case NetLogic::NOR:
 	  case NetLogic::OR: {
@@ -601,12 +492,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 			  case NetLogic::OR:
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::BUF);
+					       NetLogic::BUF, 1);
 			    break;
 			  case NetLogic::NOR:
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::NOT);
+					       NetLogic::NOT, 1);
 			    break;
 			  default:
 			    assert(0);
@@ -623,7 +514,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		      delete obj;
 		      count += 1;
 		      return;
-		}
+v		}
 
 		  /* Finally, this cleans up the gate by creating a
 		     new [N]OR gate that has the right number of
@@ -631,7 +522,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		if (top < obj->pin_count()) {
 		      NetLogic*tmp = new NetLogic(scope,
 						  obj->name(), top,
-						  obj->type());
+						  obj->type(), 1);
 		      tmp->rise_time(obj->rise_time());
 		      tmp->fall_time(obj->fall_time());
 		      tmp->decay_time(obj->decay_time());
@@ -648,7 +539,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		}
 		break;
 	  }
-
+#endif
+#if 0
+	      /* XXXX This old code assumed that the individual bit
+		 slices could be replaced with different gates. They
+		 cannot when the device takes atomic vectors, so this
+		 needs to be rewritten. XXXX */
 	  case NetLogic::XNOR:
 	  case NetLogic::XOR: {
 		unsigned top = obj->pin_count();
@@ -770,11 +666,11 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		      if (obj->type() == NetLogic::XOR)
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::NOT);
+					       NetLogic::NOT, 1);
 		      else
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::BUF);
+					       NetLogic::BUF, 1);
 
 		      tmp->rise_time(obj->rise_time());
 		      tmp->fall_time(obj->fall_time());
@@ -799,11 +695,11 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		      if (obj->type() == NetLogic::XOR)
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::BUF);
+					       NetLogic::BUF, 1);
 		      else
 			    tmp = new NetLogic(scope,
 					       obj->name(), 2,
-					       NetLogic::NOT);
+					       NetLogic::NOT, 1);
 
 		      tmp->rise_time(obj->rise_time());
 		      tmp->fall_time(obj->fall_time());
@@ -825,7 +721,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		if (top < obj->pin_count()) {
 		      NetLogic*tmp = new NetLogic(scope,
 						  obj->name(), top,
-						  obj->type());
+						  obj->type(), 1);
 		      des->add_node(tmp);
 		      tmp->pin(0).drive0(obj->pin(0).drive0());
 		      tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -838,386 +734,104 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 		}
 		break;
 	    }
-
+#endif
 	  default:
 	    break;
       }
 }
 
+static void replace_with_bufif(Design*des, NetMux*obj, NetLogic::TYPE type)
+{
+      NetScope*scope = obj->scope();
+      NetLogic*tmp = new NetLogic(obj->scope(),
+				  scope->local_symbol(),
+				  3, type, obj->width());
+
+      des->add_node(tmp);
+
+      connect(obj->pin_Result(), tmp->pin(0));
+      connect(obj->pin_Data(type==NetLogic::BUFIF0? 0 : 1),  tmp->pin(1));
+
+      if (obj->width() == 1) {
+	      /* Special case that the expression is 1 bit
+		 wide. Connect the select directly to the enable. */
+	    connect(obj->pin_Sel(), tmp->pin(2));
+
+      } else {
+	      /* General case that the expression is arbitrarily
+		 wide. Replicate the enable signal (which we
+		 assume is 1 bit wide) to match the expression,
+		 and connect the enable vector to the enable
+		 input of the gate. */
+	    NetReplicate*rtmp = new NetReplicate(scope,
+						 scope->local_symbol(),
+						 obj->width(),
+						 obj->width());
+	    des->add_node(rtmp);
+
+	    connect(obj->pin_Sel(), rtmp->pin(1));
+	    connect(tmp->pin(2), rtmp->pin(0));
+
+	    NetNet*rsig = new NetNet(scope, scope->local_symbol(),
+				     NetNet::WIRE, obj->width());
+	    rsig->local_flag(true);
+	    rsig->data_type(IVL_VT_LOGIC);
+	    connect(tmp->pin(2), rsig->pin(0));
+      }
+
+      delete obj;
+}
+
 /*
  * This detects the case where the mux selects between a value and
- * Vz. In this case, replace the device with a MOS with the sel
+ * Vz. In this case, replace the device with a bufif with the sel
  * input used to enable the output.
  */
 void cprop_functor::lpm_mux(Design*des, NetMux*obj)
 {
-      if (obj->size() > 2) {
-	    lpm_mux_large(des, obj);
-	    return;
-      }
       if (obj->size() != 2)
 	    return;
       if (obj->sel_width() != 1)
 	    return;
 
-      NetScope*scope = obj->scope();
-
+	/* If the first input is all constant Vz, then replace the
+	   NetMux with an array of BUFIF1 devices, with the enable
+	   connected to the select input. */
       bool flag = true;
-      for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-	    bool cflag_a = obj->pin_Data(idx, 0).nexus()->drivers_constant();
-	    bool cflag_b = obj->pin_Data(idx, 1).nexus()->drivers_constant();
 
-	      /* If both data inputs are constant, we'll be able to do
-		 a substitution. */
-	    if (cflag_a && cflag_b)
-		  continue;
-
-	    verinum::V va = cflag_a
-		  ? obj->pin_Data(idx, 0).nexus()->driven_value()
-		  : verinum::Vx;
-	    verinum::V vb = cflag_b
-		  ? obj->pin_Data(idx, 1).nexus()->driven_value()
-		  : verinum::Vx;
-
-	      /* If only one Data input is constant, but a constant
-		 HiZ, then we will be able to do a MOS
-		 substitution. */
-	    if (cflag_a && va==verinum::Vz)
-		  continue;
-
-	    if (cflag_b && vb==verinum::Vz)
-		  continue;
-
-	      /* Otherwise, we cannot accurately do a substitution. If
-		 one input is non-constant, then that input may have a
-		 HiZ value, and there is no Verilog logic other then a
-		 MUX that can pass a HiZ value. */
+      if (! obj->pin_Data(0).nexus()->drivers_constant()) {
 	    flag = false;
       }
 
-      if (! flag) {
-	    return;
+      if (flag && obj->pin_Data(0).nexus()->driven_value() != verinum::Vz) {
+	    flag = false;
       }
 
-	/* Create a temporary net to hold the result value that we
-	   build up. When we are done, we will connect this to the
-	   Result pins of the mux, then delete the mux *and* this
-	   net. That will cause all the proper connectivity to
-	   happen. */
-      NetNet result_tmp(scope, scope->local_symbol(),
-			NetNet::WIRE, obj->width());
-
-	/* We know that every slice has at least one constant. Run
-	   through the slices again, creating boolean devices to
-	   replace the MUX slice. */
-
-      for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
-
-	      /* If the Sel==0 input is constant Z, make a NMOS. */
-	    if (obj->pin_Data(idx, 0).nexus()->drivers_constant()
-		&& obj->pin_Data(idx, 0).nexus()->driven_value()==verinum::Vz) {
-
-		  NetLogic*tmp = new NetLogic(scope,
-					      scope->local_symbol(),
-					      3, NetLogic::NMOS);
-		  connect(result_tmp.pin(idx), tmp->pin(0));
-		  connect(obj->pin_Data(idx,1), tmp->pin(1));
-		  connect(obj->pin_Sel(0), tmp->pin(2));
-		  des->add_node(tmp);
-		  continue;
-	    }
-
-	      /* If the Sel==1 input is constant Z, make a PMOS. */
-	    if (obj->pin_Data(idx, 1).nexus()->drivers_constant()
-		&& obj->pin_Data(idx, 1).nexus()->driven_value()==verinum::Vz) {
-
-		  NetLogic*tmp = new NetLogic(scope,
-					      scope->local_symbol(),
-					      3, NetLogic::PMOS);
-		  connect(result_tmp.pin(idx), tmp->pin(0));
-		  connect(obj->pin_Data(idx,0), tmp->pin(1));
-		  connect(obj->pin_Sel(0), tmp->pin(2));
-		  des->add_node(tmp);
-		  continue;
-	    }
-
-	      /* At this point, the only cases that are left are where
-		 the data inputs are both constant, and neither are
-		 HiZ. From this we know how to generate the output
-		 from only the S input. */
-	    if (! (obj->pin_Data(idx, 0).nexus()->drivers_constant()
-		   && obj->pin_Data(idx, 1).nexus()->drivers_constant())) {
-		  cerr << obj->get_line() << ": internal error: "
-		       << "Drivers not constant where expected?"
-		       << " obj->width()=" << obj->width()
-		       << " idx=" << idx
-		       << endl;
-		  obj->dump_node(cerr, 4);
-	    }
-	    assert(obj->pin_Data(idx, 0).nexus()->drivers_constant()
-		   && obj->pin_Data(idx, 1).nexus()->drivers_constant());
-
-
-	    verinum::V a = obj->pin_Data(idx, 0).nexus()->driven_value();
-	    verinum::V b = obj->pin_Data(idx, 1).nexus()->driven_value();
-
-	    if (a == b) {
-		  connect(result_tmp.pin(idx), obj->pin_Data(idx,0));
-		  continue;
-	    }
-
-	    if (a == verinum::V0 && b == verinum::V1) {
-		  connect(result_tmp.pin(idx), obj->pin_Sel(0));
-		  continue;
-	    }
-
-	    if (a == verinum::V1 && b == verinum::V0) {
-		  NetLogic*tmp = new NetLogic(scope,
-					      scope->local_symbol(),
-					      2, NetLogic::NOT);
-		  connect(result_tmp.pin(idx), tmp->pin(0));
-		  connect(obj->pin_Sel(0), tmp->pin(1));
-		  des->add_node(tmp);
-		  continue;
-	    }
-
-	      /* A==0: Q = B & S */
-	    if (a == verinum::V0) {
-		  NetLogic*tmp = new NetLogic(scope,
-					      scope->local_symbol(),
-					      3, NetLogic::AND);
-		  connect(result_tmp.pin(idx), tmp->pin(0));
-		  connect(obj->pin_Data(idx,1), tmp->pin(1));
-		  connect(obj->pin_Sel(0), tmp->pin(2));
-		  des->add_node(tmp);
-		  continue;
-	    }
-
-	      /* B==1: Q = A | S */
-	    if (b == verinum::V1) {
-		  NetLogic*tmp = new NetLogic(scope,
-					      scope->local_symbol(),
-					      3, NetLogic::OR);
-		  connect(result_tmp.pin(idx), tmp->pin(0));
-		  connect(obj->pin_Data(idx,0), tmp->pin(1));
-		  connect(obj->pin_Sel(0), tmp->pin(2));
-		  des->add_node(tmp);
-		  continue;
-	    }
-	      /* A==1: Q = B | ~S */
-	    if (a == verinum::V1) {
-		  NetLogic*inv = new NetLogic(scope,
-					      scope->local_symbol(),
-					      2, NetLogic::NOT);
-		  NetNet*invs = new NetNet(scope,
-					   scope->local_symbol(),
-					   NetNet::TRI, 1);
-		  invs->local_flag(true);
-		  connect(inv->pin(0), invs->pin(0));
-		  connect(inv->pin(1), obj->pin_Sel(0));
-		  des->add_node(inv);
-
-		  NetLogic*tmp = new NetLogic(scope,
-					      scope->local_symbol(),
-					      3, NetLogic::OR);
-		  connect(result_tmp.pin(idx), tmp->pin(0));
-		  connect(obj->pin_Data(idx,1), tmp->pin(1));
-		  connect(inv->pin(0), tmp->pin(2));
-		  des->add_node(tmp);
-		  continue;
-	    }
-	      /* B==0: Q = A & ~S */
-	    if (b == verinum::V0) {
-		  NetLogic*inv = new NetLogic(scope,
-					      scope->local_symbol(),
-					      2, NetLogic::NOT);
-		  NetNet*invs = new NetNet(scope,
-					   scope->local_symbol(),
-					   NetNet::TRI, 1);
-		  invs->local_flag(true);
-		  connect(inv->pin(0), invs->pin(0));
-		  connect(inv->pin(1), obj->pin_Sel(0));
-		  des->add_node(inv);
-
-		  NetLogic*tmp = new NetLogic(scope,
-					      scope->local_symbol(),
-					      3, NetLogic::AND);
-		  connect(result_tmp.pin(idx), tmp->pin(0));
-		  connect(obj->pin_Data(idx,0), tmp->pin(1));
-		  connect(inv->pin(0), tmp->pin(2));
-		  des->add_node(tmp);
-		  continue;
-	    }
-
-	    assert(0);
-
-      }
-
-      for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1)
-	    connect(result_tmp.pin(idx), obj->pin_Result(idx));
-
-      delete obj;
-      count += 1;
-}
-
-void cprop_functor::lpm_mux_large(Design*des, NetMux*obj)
-{
-      NetScope*scope = obj->scope();
-      unsigned width = obj->width();
-      unsigned size = obj->size();
-
-	/* This test looks for bit slices that are constant
-	   throughout. If we find any, we can reduce the width of the
-	   MUX to eliminate the fixed value. */
-
-	/* After the following for loop, this array of bools will
-	   contain "true" for each bit slice that is constant and
-	   identical, and "false" otherwise. The reduce_width will
-	   count the number of true entries in the flags array. */
-      bool*flags = new bool[width];
-      unsigned reduce_width = 0;
-
-      for (unsigned bit = 0 ;  bit < width ;  bit += 1) {
-
-	    flags[bit] = true;
-
-	      /* If not even the first selection is constant, then the
-		 slice cannot be reduced. */
-	    if (! obj->pin_Data(bit, 0).nexus()->drivers_constant()) {
-		  flags[bit] = false;
-		  continue;
-	    }
-
-	      /* If any of the remaining selections in non-consant, or
-		 constant with a different value, then this slice
-		 cannot be reduced. */
-	    verinum::V val = obj->pin_Data(bit, 0).nexus()->driven_value();
-
-	    for (unsigned idx = 1; flags[bit] && idx < size ;  idx += 1) {
-
-		  if (!obj->pin_Data(bit,idx).nexus()->drivers_constant()) {
-			flags[bit] = false;
-			break;
-		  }
-
-		  if (val != obj->pin_Data(bit,idx).nexus()->driven_value()) {
-			flags[bit] = false;
-			break;
-		  }
-	    }
-
-	    if (! flags[bit]) {
-		    /* This bit slice is too complex. Go on. */
-		  continue;
-	    }
-
-	    reduce_width += 1;
-      }
-
-	/* If no slices can be reduced, then we are finished. */
-      if (reduce_width == 0) {
-	    delete[]flags;
-	    return;
-      }
-
-	/* Handle the very special case that all the slices can be
-	   reduced. We don't need a MUX at all! */
-      if (reduce_width == width) {
-	    for (unsigned idx = 0 ;  idx < width ;  idx += 1)
-		  connect(obj->pin_Result(idx), obj->pin_Data(idx,0));
-
-	    delete obj;
+      if (flag) {
+	    replace_with_bufif(des, obj, NetLogic::BUFIF1);
 	    count += 1;
-	    delete[]flags;
 	    return;
       }
 
-	/* Create a reduced mux with the same name and size, but fewer
-	   slices. Connect all the slices that we are keeping. */
-      NetMux*tmp = new NetMux(scope, obj->name(),
-			      width-reduce_width, size, obj->sel_width());
-      tmp->set_line(*obj);
 
-      for (unsigned idx = 0 ;  idx < obj->sel_width() ;  idx += 1)
-	    connect(obj->pin_Sel(idx), tmp->pin_Sel(idx));
-
-      unsigned dst_bit = 0;
-
-      for (unsigned bit = 0 ;  bit < width ;  bit += 1) {
-	    if (flags[bit]) {
-		  connect(obj->pin_Result(bit), obj->pin_Data(bit,0));
-		  continue;
-	    }
-
-	    connect(obj->pin_Result(bit), tmp->pin_Result(dst_bit));
-
-	    for (unsigned idx = 0 ;  idx < size ;  idx += 1)
-		  connect(obj->pin_Data(bit,idx), tmp->pin_Data(dst_bit,idx));
-
-	    dst_bit += 1;
+	/* If instead the second input is all constant Vz, replace the
+	   NetMux with an array of BUFIF0 devices. */
+      flag = true;
+      if (! obj->pin_Data(1).nexus()->drivers_constant()) {
+	    flag = false;
       }
 
-	/* Add the new node. Delete the old node. Signal that we
-	   change the design and may use a rescan. */
-      des->add_node(tmp);
-      delete obj;
-      delete[]flags;
-      count += 1;
-}
+      if (flag && obj->pin_Data(1).nexus()->driven_value() != verinum::Vz) {
+	    flag = false;
+      }
 
-void cprop_functor::lpm_ram_dq(Design*des, NetRamDq*obj)
-{
-      if (lpm_ram_dq_const_address_(des,obj))
+      if (flag) {
+	    replace_with_bufif(des, obj, NetLogic::BUFIF0);
+	    count += 1;
 	    return;
-
-}
-
-/*
- * Try to evaluate a constant address input. If we find it, then
- * replace the NetRamDq with a direct link to the addressed word.
- */
-bool cprop_functor::lpm_ram_dq_const_address_(Design*des, NetRamDq*obj)
-{
-      NetMemory*mem = obj->mem();
-      NetNet* reg = mem->reg_from_explode();
-
-	/* I only know how to do this on exploded memories. */
-      if (reg == 0)
-	    return false;
-
-      verinum sel (0UL, obj->awidth());
-      for (unsigned idx = 0 ;  idx < obj->awidth() ;  idx += 1) {
-	    if (! obj->pin_Address(idx).nexus()->drivers_constant())
-		  return false;
-
-	    sel.set(idx, obj->pin_Address(idx).nexus()->driven_value());
       }
-
-      unsigned long address = sel.as_ulong();
-
-	/* If the address is outside the ram, then leave this to the
-	   code generator to figure out. */
-      if (address >= obj->size())
-	    return false;
-
-
-      unsigned base = address * obj->width();
-      assert(base+obj->width() <= reg->pin_count());
-
-      for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1)
-	    connect(reg->pin(base+idx), obj->pin_Q(idx));
-
-      if (debug_cprop) {
-	    cerr << obj->get_line() << ": debug: Replace read port with"
-		 << " fixed link to word " << address << "." << endl;
-      }
-
-      delete obj;
-      count += 1;
-      return true;
 }
 
-
 /*
  * This functor looks to see if the constant is connected to nothing
  * but signals. If that is the case, delete the dangling constant and
@@ -1336,23 +950,36 @@ void cprop(Design*des)
 
 /*
  * $Log: cprop.cc,v $
- * Revision 1.47.2.7  2007/02/26 19:51:38  steve
- *  Spelling fixes (larry doolittle)
+ * Revision 1.56  2007/03/07 00:38:15  steve
+ *  Lint fixes.
  *
- * Revision 1.47.2.6  2006/11/12 01:20:45  steve
- *  Prevent constant mux outputs from confusing itself.
+ * Revision 1.55  2006/05/24 04:32:57  steve
+ *  Fix handling of ternary-to-bufif0 constant propagation.
  *
- * Revision 1.47.2.5  2006/04/23 04:26:13  steve
- *  Constant propagate addresses through NetRamDq read ports.
+ * Revision 1.54  2005/07/15 19:22:52  steve
+ *  bufif enable is LOGIC.
  *
- * Revision 1.47.2.4  2005/09/11 02:50:51  steve
- *  Fix overly agressive constant propagation through MUX causing lost Z bits.
+ * Revision 1.53  2005/05/15 04:44:30  steve
+ *  Disable obsolete logic constant fixup code.
  *
- * Revision 1.47.2.3  2005/08/28 22:00:39  steve
- *  Reduce mux slices that are constant throughout range.
+ * Revision 1.52  2005/04/24 23:44:01  steve
+ *  Update DFF support to new data flow.
  *
- * Revision 1.47.2.2  2005/08/28 19:51:02  steve
- *  More thorough constant propagation through MUX devices.
+ * Revision 1.51  2005/02/12 22:52:45  steve
+ *  Fix copyright notice.
+ *
+ * Revision 1.50  2005/02/12 06:25:40  steve
+ *  Restructure NetMux devices to pass vectors.
+ *  Generate NetMux devices from ternary expressions,
+ *  Reduce NetMux devices to bufif when appropriate.
+ *
+ * Revision 1.49  2005/01/16 04:20:32  steve
+ *  Implement LPM_COMPARE nodes as two-input vector functors.
+ *
+ * Revision 1.48  2004/12/11 02:31:25  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
  *
  * Revision 1.47  2004/02/20 18:53:34  steve
  *  Addtrbute keys are perm_strings.

design_dump.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: design_dump.cc,v 1.149.2.7 2006/08/23 04:09:14 steve Exp $"
+#ident "$Id: design_dump.cc,v 1.176 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -29,7 +29,8 @@
 # include  <iostream>
 # include  <iomanip>
 # include  "netlist.h"
-
+# include  "compiler.h"
+# include  "ivl_assert.h"
 
 static ostream& operator<< (ostream&o, NetBlock::Type t)
 {
@@ -68,17 +69,79 @@ ostream& operator << (ostream&o, Link::strength_t str)
       return o;
 }
 
+ostream& operator << (ostream&o, ivl_variable_type_t val)
+{
+      switch (val) {
+	  case IVL_VT_VOID:
+	    o << "void";
+	    break;
+	  case IVL_VT_NO_TYPE:
+	    o << "<no_type>";
+	    break;
+	  case IVL_VT_REAL:
+	    o << "real";
+	    break;
+	  case IVL_VT_BOOL:
+	    o << "bool";
+	    break;
+	  case IVL_VT_LOGIC:
+	    o << "logic";
+	    break;
+      }
+      return o;
+}
+
+static inline void dump_scope_path(ostream&o, const NetScope*scope)
+{
+      if (const NetScope*parent = scope->parent()) {
+	    dump_scope_path(o, parent);
+	    o << ".";
+      }
+      const hname_t name = scope->fullname();
+      o << name.peek_name();
+      if (name.has_number())
+	    o << "[" << name.peek_number() << "]";
+}
+
+ostream& operator <<(ostream&o, struct __ScopePathManip marg)
+{
+      if (marg.scope != 0)
+	    dump_scope_path(o, marg.scope);
+      return o;
+}
+
+void NetDelaySrc::dump(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << "specify delay";
+      if (posedge_) o << " posedge";
+      if (negedge_) o << " negedge";
+      o << " src "
+	<< "(" << transition_delays_[IVL_PE_01]
+	<< "," << transition_delays_[IVL_PE_10]
+	<< "," << transition_delays_[IVL_PE_0z]
+	<< "/" << transition_delays_[IVL_PE_z1]
+	<< "," << transition_delays_[IVL_PE_1z]
+	<< "," << transition_delays_[IVL_PE_z0]
+	<< "/" << transition_delays_[IVL_PE_0x]
+	<< "," << transition_delays_[IVL_PE_x1]
+	<< "," << transition_delays_[IVL_PE_1x]
+	<< "/" << transition_delays_[IVL_PE_x0]
+	<< "," << transition_delays_[IVL_PE_xz]
+	<< "," << transition_delays_[IVL_PE_zx]
+	<< "): " << endl;
+      dump_node_pins(o, ind+4);
+}
+
 /* Dump a net. This can be a wire or register. */
 void NetNet::dump_net(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << type() << ": " << name() << "[" <<
-	    pin_count() << "]";
+      o << setw(ind) << "" << type() << ": " << name()
+	<< "[" << s0_ << ":" << e0_ << " count=" << pin_count() << "]";
       if (local_flag_)
 	    o << " (local)";
+      o << " " << data_type_;
       if (signed_)
 	    o << " signed";
-      if (mref_)
-	    o << " mref_=" << mref_->name();
       switch (port_type_) {
 	  case NetNet::NOT_A_PORT:
 	    break;
@@ -97,9 +160,11 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
       }
       o << " (eref=" << peek_eref() << ", lref=" << peek_lref() << ")";
       if (scope())
-	    o << " scope=" << scope()->name();
-      o << " #(" << rise_time() << "," << fall_time() << "," <<
-	    decay_time() << ") init=";
+	    o << " scope=" << scope_path(scope());
+      o << " #(" << rise_time() << "," << fall_time() << ","
+	<<  decay_time() << ") vector_width=" << vector_width()
+	<< " pin_count=" << pin_count()
+	<< " init=";
       for (unsigned idx = pin_count() ;  idx > 0 ;  idx -= 1)
 	    o << pin(idx-1).get_init();
 
@@ -116,23 +181,15 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
 	    o << setw(ind+4) << "" << "[" << idx << "]: " << nex
 	      << " " << nex->name() << endl;
       }
+
+      for (unsigned idx = 0 ;  idx < delay_paths_.size() ;  idx += 1) {
+	    const NetDelaySrc*cur = delay_paths_[idx];
+	    cur->dump(o, ind+4);
+      }
+
       dump_obj_attr(o, ind+4);
 }
 
-void NetSubnet::dump_net(ostream&o, unsigned ind) const
-{
-      o << setw(ind) << "" << "** " << name() << " is a NetSubnet **"
-	<< endl;
-      NetNet::dump_net(o, ind);
-}
-
-void NetMemory::dump(ostream&o, unsigned ind) const
-{
-      o << setw(ind) << ""  << name_ << "[" << width_ << "] " <<
-	    "[" << idxh_ << ":" << idxl_ << "]" << endl;
-}
-
-
 /* Dump a NetNode and its pins. Dump what I know about the netnode on
    the first line, then list all the pins, with the name of the
    connected signal. */
@@ -173,8 +230,7 @@ void NetObj::dump_node_pins(ostream&o, unsigned ind) const
 
 	    if (pin(idx).is_linked()) {
 		  const Nexus*nex = pin(idx).nexus();
-		  const char*nex_name = nex->name();
-		  o << nex << " " << (nex_name? nex_name : "????");
+		  o << nex << " " << nex->name();
 	    }
 	    o << endl;
 
@@ -192,16 +248,20 @@ void NetObj::dump_obj_attr(ostream&o, unsigned ind) const
 
 void NetAddSub::dump_node(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "Adder (NetAddSub): " << name() << endl;
+      o << setw(ind) << "" << "Adder (NetAddSub): " << name()
+	<< " width=" << width() << " pin_count=" << pin_count()
+	<< endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
 
-void NetCAssign::dump_node(ostream&o, unsigned ind) const
+void NetArrayDq::dump_node(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "Procedural continuous assign (NetCAssign): "
-	<< name() << endl;
+      o << setw(ind) << "" << "NetArrayDq: " << name()
+	<< " array=" << mem_->name()
+	<< endl;
       dump_node_pins(o, ind+4);
+      dump_obj_attr(o, ind+4);
 }
 
 void NetCLShift::dump_node(ostream&o, unsigned ind) const
@@ -219,19 +279,12 @@ void NetCompare::dump_node(ostream&o, unsigned ind) const
       dump_obj_attr(o, ind+4);
 }
 
-void NetDecode::dump_node(ostream&o, unsigned ind) const
+void NetConcat::dump_node(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "LPM_DECODE (NetDecode): " << name()
-	<< " ff=" << ff_->name() << ", word width=" << width() << endl;
-      dump_node_pins(o, ind+4);
-      dump_obj_attr(o, ind+4);
-}
-
-void NetDemux::dump_node(ostream&o, unsigned ind) const
-{
-      o << setw(ind) << "" << "LPM_DEMUX (NetDemux): " << name()
-	<< " bus width=" << width() << ", address width=" << awidth()
-	<< ", word count=" << size() << endl;
+      o << setw(ind) << "" << "NetConcat: "
+	<< name()
+	<< " scope=" << scope_path(scope())
+	<< " width=" << width_ << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
@@ -243,12 +296,6 @@ void NetDivide::dump_node(ostream&o, unsigned ind) const
       dump_obj_attr(o, ind+4);
 }
 
-void NetForce::dump_node(ostream&o, unsigned ind) const
-{
-      o << setw(ind) << "" << "force " << lval_->name() << endl;
-      dump_node_pins(o, ind+4);
-}
-
 void NetMult::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "LPM_MULT (NetMult): " << name() << endl;
@@ -259,8 +306,8 @@ void NetMult::dump_node(ostream&o, unsigned ind) const
 void NetMux::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "Multiplexer (NetMux): " << name()
-	<< " scope=" << scope()->name() << endl;
-      o << setw(ind+6) << "" << "source=" << get_line() << endl;
+	<< " width=" << width_ << " swidth=" << swidth_ << " size=" << size_
+	<< " scope=" << scope_path(scope()) << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
@@ -268,22 +315,26 @@ void NetMux::dump_node(ostream&o, unsigned ind) const
 void NetBUFZ::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "NetBUFZ: " << name()
-	<< " scope=" << (scope()? scope()->name() : "")
+	<< " scope=" << scope_path(scope())
 	<< " delay=(" << rise_time() << "," << fall_time() << "," <<
-	    decay_time() << ")" << endl;
+	    decay_time() << ") width=" << width() << endl;
       dump_node_pins(o, ind+4);
 }
 
 void NetCaseCmp::dump_node(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "case compare === : " << name() << endl;
+      if (eeq_)
+	    o << setw(ind) << "" << "case compare === : " << name() << endl;
+      else
+	    o << setw(ind) << "" << "case compare !== : " << name() << endl;
+
       dump_node_pins(o, ind+4);
 }
 
 void NetConst::dump_node(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "constant ";
-      for (unsigned idx = pin_count() ;  idx > 0 ;  idx -= 1)
+      o << setw(ind) << "" << "constant " << width_ << "'b";
+      for (unsigned idx = width_ ;  idx > 0 ;  idx -= 1)
 	    o << value_[idx-1];
       o << ": " << name() << endl;
       dump_node_pins(o, ind+4);
@@ -292,18 +343,20 @@ void NetConst::dump_node(ostream&o, unsigned ind) const
 void NetFF::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "LPM_FF: " << name()
-	<< " scope=" << (scope()? scope()->name() : "")
-	<< " aset_value=" << aset_value_
-	<< " sset_value=" << sset_value_;
-
-      if (demux_) o << " demux=" << demux_->name();
-
-      o << endl;
+	<< " scope=" << scope_path(scope())
+	<< " aset_value=" << aset_value_ << endl;
 
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
 
+void NetLiteral::dump_node(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << "constant real " << real_
+	<< ": " << name() << endl;
+      dump_node_pins(o, ind+4);
+}
+
 void NetLogic::dump_node(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << "logic: ";
@@ -365,7 +418,7 @@ void NetLogic::dump_node(ostream&o, unsigned ind) const
       }
       o << " #(" << rise_time()
 	<< "," << fall_time() << "," << decay_time() << ") " << name()
-	<< " scope=" << (scope()? scope()->name() : "")
+	<< " scope=" << scope_path(scope())
 	<< endl;
 
       dump_node_pins(o, ind+4);
@@ -379,25 +432,88 @@ void NetModulo::dump_node(ostream&o, unsigned ind) const
       dump_obj_attr(o, ind+4);
 }
 
-void NetRamDq::dump_node(ostream&o, unsigned ind) const
+void NetPartSelect::dump_node(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "LPM_RAM_DQ (";
+      const char*pt = "";
+      switch (dir_) {
+	  case VP:
+	    pt = "VP";
+	    break;
+	  case PV:
+	    pt = "PV";
+	    break;
+	  case BI:
+	    pt = "BI";
+	    break;
+      }
+      o << setw(ind) << "" << "NetPartSelect(" << pt << "): "
+	<< name() << " off=" << off_ << " wid=" << wid_ <<endl;
+      dump_node_pins(o, ind+4);
+      dump_obj_attr(o, ind+4);
+}
 
-      if (mem_)
-	    if (NetNet*tmp = mem_->reg_from_explode())
-		  o << "exploded mem=" << tmp->name();
-	    else
-		  o << "mem=" << mem_->name();
+void NetReplicate::dump_node(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << "NetReplicate: "
+	<< name() << " wid=" << width_ << ", repeat_=" << repeat_
+	<< ", input wid=" << width_/repeat_ << endl;
+      dump_node_pins(o, ind+4);
+      dump_obj_attr(o, ind+4);
+}
 
-      o << "): " << name() << endl;
+void NetSignExtend::dump_node(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << "NetSignExtend: "
+	<< name() << " output width=" << width_ << endl;
+      dump_node_pins(o, ind+4);
+      dump_obj_attr(o, ind+4);
+}
 
+void NetUReduce::dump_node(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << "reduction logic: ";
+      switch (type_) {
+	  case NONE:
+	    o << "NONE";
+	    break;
+	  case AND:
+	    o << "and";
+	    break;
+	  case OR:
+	    o << "or";
+	    break;
+	  case XOR:
+	    o << "xor";
+	    break;
+	  case NAND:
+	    o << "nand";
+	    break;
+	  case NOR:
+	    o << "nor";
+	    break;
+	  case XNOR:
+	    o << "xnor";
+	    break;
+      }
+      o << " #(" << rise_time()
+	<< "," << fall_time() << "," << decay_time() << ") " << name()
+	<< " scope=" << scope_path(scope())
+	<< endl;
+
+      dump_node_pins(o, ind+4);
+      dump_obj_attr(o, ind+4);
+}
+
+void NetSysFunc::dump_node(ostream&o, unsigned ind) const
+{
+      o << setw(ind) << "" << def_->name << "(...)" << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
 
 void NetUserFunc::dump_node(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << def_->name() << "(";
+      o << setw(ind) << "" << scope_path(def_) << "(";
       o << ")" << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
@@ -405,7 +521,7 @@ void NetUserFunc::dump_node(ostream&o, unsigned ind) const
 
 void NetTaskDef::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "task " << name_ << ";" << endl;
+      o << setw(ind) << "" << "task " << scope_path(scope_) << ";" << endl;
 
       for (unsigned idx = 0 ;  idx < ports_.count() ;  idx += 1) {
 	    o << setw(ind+4) << "";
@@ -447,11 +563,11 @@ void NetProcTop::dump(ostream&o, unsigned ind) const
       switch (type_) {
 	  case NetProcTop::KINITIAL:
 	    o << "initial  /* " << get_line() << " in "
-	      << scope_->name() << " */" << endl;
+	      << scope_path(scope_) << " */" << endl;
 	    break;
 	  case NetProcTop::KALWAYS:
 	    o << "always  /* " << get_line() << " in "
-	      << scope_->name() << " */" << endl;
+	      << scope_path(scope_) << " */" << endl;
 	    break;
       }
 
@@ -466,23 +582,13 @@ void NetProcTop::dump(ostream&o, unsigned ind) const
 void NetAssign_::dump_lval(ostream&o) const
 {
       if (sig_) {
-	    o << "sig=" << sig_->name();
-	    if (bmux_) {
-		  o << "[" << *bmux_ << "]";
-
-	    } else {
-		  o << "[" << (loff_+lwid_-1) << ":" << loff_ << "]";
+	    o << sig_->name();
+	    if (word_) {
+		  o << "[word=" << *word_ << "]";
+	    }
+	    if (base_) {
+		  o << "[" << *base_ << " +: " << lwid_ << "]";
 	    }
-      } else if (mem_) {
-	    // Is there an obvious way to flag memories in the dump
-	    // as different from the _real_ bit mux case?
-	    // o << "**memory**";
-	    o << "mem=" << mem_->name() << "[";
-	    if (bmux_) o << *bmux_;
-	      else     o << "**oops**";
-	    o << "]";
-      } else if (var_) {
-	    o << "<real " << var_->basename() << ">";
       } else {
 	    o << "";
       }
@@ -508,10 +614,10 @@ void NetAssign::dump(ostream&o, unsigned ind) const
       dump_lval(o);
 
       o << " = ";
-#if 0
-      if (l_val(0)->rise_time())
-	    o << "#" << l_val(0)->rise_time() << " ";
-#endif
+
+      if (const NetExpr*de = get_delay())
+	    o << "#(" << *de << ") ";
+
       o << *rval() << ";" << endl;
 }
 
@@ -521,10 +627,10 @@ void NetAssignNB::dump(ostream&o, unsigned ind) const
       dump_lval(o);
 
       o << " <= ";
-#if 0
-      if (l_val(0)->rise_time())
-	    o << "#" << l_val(0)->rise_time() << " ";
-#endif
+
+      if (const NetExpr*de = get_delay())
+	    o << "#(" << *de << ") ";
+
       o << *rval() << ";" << endl;
 
 }
@@ -543,7 +649,7 @@ void NetBlock::dump(ostream&o, unsigned ind) const
 {
       o << setw(ind) << "" << type_;
       if (subscope_)
-	    o << " : " << subscope_->name();
+	    o << " : " << scope_path(subscope_);
       o << endl;
 
       if (last_) {
@@ -571,8 +677,6 @@ void NetCase::dump(ostream&o, unsigned ind) const
 	    break;
       }
 
-      dump_proc_attr(o, ind+2);
-
       for (unsigned idx = 0 ;  idx < nitems_ ;  idx += 1) {
 	    o << setw(ind+2) << "";
 	    if (items_[idx].guard)
@@ -593,8 +697,9 @@ void NetCase::dump(ostream&o, unsigned ind) const
 
 void NetCAssign::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "cassign " << lval_->name() << " = "
-	<< name() << ";" << endl;
+      o << setw(ind) << "" << "cassign ";
+      dump_lval(o);
+      o << " = " << *rval() << "; /* " << get_line() << " */" << endl;
 }
 
 void NetCondit::dump(ostream&o, unsigned ind) const
@@ -614,13 +719,14 @@ void NetCondit::dump(ostream&o, unsigned ind) const
 
 void NetDeassign::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "deassign " << lval_->name() << "; "
-	<< "/* " << get_line() << " */" << endl;
+      o << setw(ind) << "" << "deassign ";
+      dump_lval(o);
+      o << "; /* " << get_line() << " */" << endl;
 }
 
 void NetDisable::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "disable " << target_->name() << "; "
+      o << setw(ind) << "" << "disable " << scope_path(target_) << "; "
 	<< "/* " << get_line() << " */" << endl;
 }
 
@@ -639,7 +745,7 @@ void NetEvProbe::dump_node(ostream&o, unsigned ind) const
 	    o << "negedge ";
 	    break;
       }
-      o << setw(ind) << "" << "-> " << event_->full_name() << "; " << endl;
+      o << setw(ind) << "" << "-> " << event_->name() << "; " << endl;
       dump_node_pins(o, ind+4);
       dump_obj_attr(o, ind+4);
 }
@@ -652,11 +758,13 @@ void NetEvTrig::dump(ostream&o, unsigned ind) const
 
 void NetEvWait::dump(ostream&o, unsigned ind) const
 {
-      assert(nevents() > 0);
-      o << setw(ind) <<"" << "@(" << event(0)->full_name();
+      o << setw(ind) <<"" << "@(";
+
+      if (nevents() > 0)
+	    o << event(0)->name();
 
       for (unsigned idx = 1 ;  idx < nevents() ;  idx += 1)
-	    o << " or " << event(idx)->full_name();
+	    o << " or " << event(idx)->name();
 
       o << ")  // " << get_line() << endl;
 
@@ -668,8 +776,9 @@ void NetEvWait::dump(ostream&o, unsigned ind) const
 
 void NetForce::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "force " << lval_->name() << " = "
-	<< name() << ";" << endl;
+      o << setw(ind) << "" << "force ";
+      dump_lval(o);
+      o << " = " << *rval() << "; /* " << get_line() << " */" << endl;
 }
 
 void NetForever::dump(ostream&o, unsigned ind) const
@@ -680,14 +789,10 @@ void NetForever::dump(ostream&o, unsigned ind) const
 
 void NetFuncDef::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << "function " << scope_->name() << endl;
+      o << setw(ind) << "" << "function " << scope_path(scope_) << endl;
       if (result_sig_)
 	    o << setw(ind+2) << "" << "Return signal: "
 	      << result_sig_->name() << endl;
-      if (result_var_)
-	    o << setw(ind+2) << "" << "Return variable: "
-	      << result_var_->basename() << endl;
-
       if (statement_)
 	    statement_->dump(o, ind+2);
       else
@@ -713,12 +818,9 @@ void NetPDelay::dump(ostream&o, unsigned ind) const
 
 void NetRelease::dump(ostream&o, unsigned ind) const
 {
-      if (lval_)
-	    o << setw(ind) << "" << "release " << lval_->name() << "; "
-	      << "/* " << get_line() << " */" << endl;
-      else
-	    o << setw(ind) << "" << "release (null); "
-	      << "/* " << get_line() << " */" << endl;
+      o << setw(ind) << "" << "release ";
+      dump_lval(o);
+      o << "; /* " << get_line() << " */" << endl;
 }
 
 void NetRepeat::dump(ostream&o, unsigned ind) const
@@ -730,7 +832,7 @@ void NetRepeat::dump(ostream&o, unsigned ind) const
 void NetScope::dump(ostream&o) const
 {
 	/* This is a constructed hierarchical name. */
-      o << name();
+      o << scope_path(this);
 
       switch (type_) {
 	  case BEGIN_END:
@@ -748,6 +850,9 @@ void NetScope::dump(ostream&o) const
 	  case TASK:
 	    o << " task";
 	    break;
+	  case GENBLOCK:
+	    o << " generate block";
+	    break;
       }
       o << endl;
 
@@ -785,7 +890,7 @@ void NetScope::dump(ostream&o) const
 
 	/* Dump the saved defparam assignments here. */
       {
-	    map<hname_t,NetExpr*>::const_iterator pp;
+	    map<pform_name_t,NetExpr*>::const_iterator pp;
 	    for (pp = defparams.begin()
 		       ; pp != defparams.end() ;  pp ++ ) {
 		  o << "    defparam " << (*pp).first << " = " <<
@@ -793,15 +898,11 @@ void NetScope::dump(ostream&o) const
 	    }
       }
 
-      for (NetVariable*cur = vars_ ;  cur ;  cur = cur->snext_) {
-	    o << "    real " << cur->basename() << " // "
-	      << cur->get_line() << endl;
-      }
-
 	/* Dump the events in this scope. */
       for (NetEvent*cur = events_ ;  cur ;  cur = cur->snext_) {
 	    o << "    event " << cur->name() << "; nprobe="
-	      << cur->nprobe() << " // " << cur->get_line() << endl;
+	      << cur->nprobe() << " scope=" << scope_path(cur->scope())
+	      << " // " << cur->get_line() << endl;
       }
 
 	// Dump the signals,
@@ -813,13 +914,25 @@ void NetScope::dump(ostream&o) const
 	    } while (cur != signals_->sig_next_);
       }
 
-	// Dump the memories,
-      if (memories_) {
-	    NetMemory*cur = memories_->snext_;
-	    do {
-		  cur->dump(o, 4);
-		  cur = cur->snext_;
-	    } while (cur != memories_->snext_);
+	// Dump specparams
+      typedef map<perm_string,spec_val_t>::const_iterator specparam_it_t;
+      for (specparam_it_t cur = specparams.begin()
+		 ; cur != specparams.end() ;  cur ++ ) {
+	    o << "    specparam " << (*cur).first
+	      << " = ";
+	    spec_val_t value = (*cur).second;
+	    switch (value.type) {
+		case IVL_VT_REAL:
+		  o << "R:" << value.real_val;
+		  break;
+		case IVL_VT_BOOL:
+		  o << "I:" << value.integer;
+		  break;
+		default:
+		  o << "<bad type>";
+		  break;
+	    }
+	    o << endl;
       }
 
       switch (type_) {
@@ -863,7 +976,7 @@ void NetSTask::dump(ostream&o, unsigned ind) const
 
 void NetUTask::dump(ostream&o, unsigned ind) const
 {
-      o << setw(ind) << "" << task_->name() << ";" << endl;
+      o << setw(ind) << "" << scope_path(task_) << ";" << endl;
 }
 
 void NetWhile::dump(ostream&o, unsigned ind) const
@@ -878,15 +991,6 @@ void NetProc::dump(ostream&o, unsigned ind) const
       o << setw(ind) << "" << "// " << typeid(*this).name() << endl;
 }
 
-void NetProc::dump_proc_attr(ostream&o, unsigned ind) const
-{
-      unsigned idx;
-      for (idx = 0 ;  idx < attr_cnt() ;  idx += 1) {
-	    o << setw(ind) << "" << "(* " << attr_key(idx) << " = "
-	      << attr_value(idx) << " *)" << endl;
-      }
-}
-
 /* Dump an expression that no one wrote a dump method for. */
 void NetExpr::dump(ostream&o) const
 {
@@ -932,6 +1036,9 @@ void NetEBinary::dump(ostream&o) const
 	  case 'O':
 	    o << "~|";
 	    break;
+	  case 'p':
+	    o << "**";
+	    break;
 	  case 'r':
 	    o << ">>";
 	    break;
@@ -982,7 +1089,7 @@ void NetEConstParam::dump(ostream&o) const
 {
       o << "<" << name_ << "=";
       NetEConst::dump(o);
-      o << ">";
+      o << ", wid=" << expr_width() << ">";
 }
 
 void NetECReal::dump(ostream&o) const
@@ -1004,7 +1111,7 @@ void NetEEvent::dump(ostream&o) const
 
 void NetEScope::dump(ostream&o) const
 {
-      o << "<scope=" << scope_->name() << ">";
+      o << "<scope=" << scope_path(scope_) << ">";
 }
 
 void NetESelect::dump(ostream&o) const
@@ -1040,30 +1147,19 @@ void NetESignal::dump(ostream&o) const
 {
       if (has_sign())
 	    o << "+";
-      o << name() << "[" << msi_<<":"<<lsi_ << "]";
-}
-
-void NetEBitSel::dump(ostream&o) const
-{
-      sig_->dump(o);
-      o << "[";
-      idx_->dump(o);
-      o << "]";
-}
-
-void NetEMemory::dump(ostream&o) const
-{
-      o << mem_->name() << "[";
-      if (idx_) idx_->dump(o);
-      o << "]";
+      o << name();
+      if (word_) o << "[word=" << *word_ << "]";
+      o << "[" << msi()<<":"<<lsi() << "]";
 }
 
 void NetEParam::dump(ostream&o) const
 {
       if (scope_ != 0)
-	    o << "<" << scope_->name() << "." << name_ << ">";
-      else
+	    o << "<" << scope_path(scope_) << "." << name_ << ">";
+      else if (name_)
 	    o << "<" << name_ << ">";
+      else
+	    o << "<" "???" ">";
 }
 
 void NetETernary::dump(ostream&o) const
@@ -1074,7 +1170,7 @@ void NetETernary::dump(ostream&o) const
 
 void NetEUFunc::dump(ostream&o) const
 {
-      o << name() << "(";
+      o << func_->basename() << "(";
       if (parms_.count() > 0) {
 	    parms_[0]->dump(o);
 	    for (unsigned idx = 1 ;  idx < parms_.count() ;  idx += 1) {
@@ -1100,11 +1196,6 @@ void NetEUnary::dump(ostream&o) const
       o << ")";
 }
 
-void NetEVariable::dump(ostream&o) const
-{
-      o << var_->basename();
-}
-
 void Design::dump(ostream&o) const
 {
       o << "DESIGN TIME PRECISION: 10e" << get_precision() << endl;
@@ -1134,26 +1225,99 @@ void Design::dump(ostream&o) const
 
 /*
  * $Log: design_dump.cc,v $
- * Revision 1.149.2.7  2006/08/23 04:09:14  steve
- *  missing sig diagnostics.
+ * Revision 1.176  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
  *
- * Revision 1.149.2.6  2006/07/10 00:21:50  steve
- *  Add support for full_case attribute.
+ * Revision 1.175  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
  *
- * Revision 1.149.2.5  2006/04/16 19:26:37  steve
- *  Fix handling of exploded memories with partial or missing resets.
+ * Revision 1.174  2007/03/02 06:13:22  steve
+ *  Add support for edge sensitive spec paths.
  *
- * Revision 1.149.2.4  2006/03/26 23:09:21  steve
- *  Handle asynchronous demux/bit replacements.
+ * Revision 1.173  2007/02/01 03:14:33  steve
+ *  Detect and report arrays without index in net contexts.
  *
- * Revision 1.149.2.3  2006/03/12 07:34:16  steve
- *  Fix the memsynth1 case.
+ * Revision 1.172  2007/01/16 05:44:14  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
  *
- * Revision 1.149.2.2  2006/02/19 00:11:31  steve
- *  Handle synthesis of FF vectors with l-value decoder.
+ * Revision 1.171  2006/10/30 05:44:49  steve
+ *  Expression widths with unsized literals are pseudo-infinite width.
  *
- * Revision 1.149.2.1  2006/01/18 01:23:23  steve
- *  Rework l-value handling to allow for more l-value type flexibility.
+ * Revision 1.170  2006/10/03 05:06:00  steve
+ *  Support real valued specify delays, properly scaled.
+ *
+ * Revision 1.169  2006/09/26 19:48:40  steve
+ *  Missing PSpec.cc file.
+ *
+ * Revision 1.168  2006/09/23 04:57:19  steve
+ *  Basic support for specify timing.
+ *
+ * Revision 1.167  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.166  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
+ *
+ * Revision 1.165  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.164  2006/02/02 02:43:57  steve
+ *  Allow part selects of memory words in l-values.
+ *
+ * Revision 1.163  2005/08/27 04:32:08  steve
+ *  Handle synthesis of fully packed case statements.
+ *
+ * Revision 1.162  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
+ * Revision 1.161  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
+ * Revision 1.160  2005/05/24 01:44:27  steve
+ *  Do sign extension of structuran nets.
+ *
+ * Revision 1.159  2005/05/17 20:56:55  steve
+ *  Parameters cannot have their width changed.
+ *
+ * Revision 1.158  2005/05/07 03:13:30  steve
+ *  Include delay expressions for assignments in dump.
+ *
+ * Revision 1.157  2005/03/09 05:52:03  steve
+ *  Handle case inequality in netlists.
+ *
+ * Revision 1.156  2005/02/08 00:12:36  steve
+ *  Add the NetRepeat node, and code generator support.
+ *
+ * Revision 1.155  2005/02/03 04:56:20  steve
+ *  laborate reduction gates into LPM_RED_ nodes.
+ *
+ * Revision 1.154  2005/01/24 05:28:30  steve
+ *  Remove the NetEBitSel and combine all bit/part select
+ *  behavior into the NetESelect node and IVL_EX_SELECT
+ *  ivl_target expression type.
+ *
+ * Revision 1.153  2005/01/22 18:16:00  steve
+ *  Remove obsolete NetSubnet class.
+ *
+ * Revision 1.152  2005/01/09 20:16:00  steve
+ *  Use PartSelect/PV and VP to handle part selects through ports.
+ *
+ * Revision 1.151  2004/12/29 23:55:43  steve
+ *  Unify elaboration of l-values for all proceedural assignments,
+ *  including assing, cassign and force.
+ *
+ *  Generate NetConcat devices for gate outputs that feed into a
+ *  vector results. Use this to hande gate arrays. Also let gate
+ *  arrays handle vectors of gates when the outputs allow for it.
+ *
+ * Revision 1.150  2004/12/11 02:31:25  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
  *
  * Revision 1.149  2004/10/04 01:10:52  steve
  *  Clean up spurious trailing white space.

driver-vpi/Makefile.in

@@ -16,12 +16,12 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.7.2.1 2006/10/04 17:08:59 steve Exp $"
+#ident "$Id: Makefile.in,v 1.7 2004/10/13 22:01:34 steve Exp $"
 #
 #
 SHELL = /bin/sh
 
-suffix = @install_suffix@
+VERSION = 0.8
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -29,8 +29,6 @@ srcdir = @srcdir@
 
 VPATH = $(srcdir)
 
-suffix = @install_suffix@
-
 bindir = $(exec_prefix)/bin
 libdir = $(exec_prefix)/lib
 includedir = $(prefix)/include
@@ -43,14 +41,14 @@ INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
 
-CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. @CPPFLAGS@ @DEFS@
+CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
 
 all: iverilog-vpi@EXEEXT@
 
 clean:
-	rm -f *.o config.h
+	rm -f *.o
 	rm -f iverilog-vpi@EXEEXT@
 
 distclean: clean
@@ -62,27 +60,21 @@ iverilog-vpi@EXEEXT@: $O
 	$(CC) $(LDFLAGS) $O -o iverilog-vpi@EXEEXT@ @EXTRALIBS@
 
 
-main.o: main.c config.h
+main.o: main.c
 	$(CC) $(CPPFLAGS) $(CFLAGS) -c $(srcdir)/main.c
 
-config.h: config.h.in
-	sed -e 's;@IVLCC@;@CC@;' -e 's;@IVLCXX@;@CXX@;' \
-	    -e 's;@SUFFIX@;$(suffix);g' \
-	    -e 's;@IVLCFLAGS@;@CXXFLAGS@;' \
-	    -e 's;@SHARED@;@shared@;' $< > $@
-
 # Windows specific...
 res.o: res.rc
 	windres -i res.rc -o res.o
 #
 
-install: all installdirs $(bindir)/iverilog-vpi$(suffix)@EXEEXT@
+install: all installdirs $(bindir)/iverilog-vpi@EXEEXT@
 
-$(bindir)/iverilog-vpi$(suffix)@EXEEXT@: ./iverilog-vpi@EXEEXT@
-	$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi$(suffix)@EXEEXT@
+$(bindir)/iverilog-vpi@EXEEXT@: ./iverilog-vpi@EXEEXT@
+	$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi@EXEEXT@
 
 installdirs: ../mkinstalldirs
 	$(srcdir)/../mkinstalldirs $(bindir)
 
 uninstall:
-	rm -f $(bindir)/iverilog-vpi$(suffix)@EXEEXT@
+	rm -f $(bindir)/iverilog-vpi@EXEEXT@

driver-vpi/config.h.in

@@ -1,9 +0,0 @@
-/* For now do not put the Icarus Verilog include or library paths here.
- * They are generated from a registry entry the user must set (-ivl=).
- * This may change in the future once I have thought about it more. */
-#define IVERILOG_VPI_CC        "@IVLCC@"
-#define IVERILOG_VPI_CXX       "@IVLCXX@"
-#define IVERILOG_VPI_CFLAGS    " @IVLCFLAGS@"
-#define IVERILOG_VPI_LDFLAGS   "@SHARED@"
-#define IVERILOG_VPI_LDLIBS    "-lveriuser@SUFFIX@ -lvpi@SUFFIX@"
-#define IVERILOG_SUFFIX        "@SUFFIX@"

driver-vpi/main.c

@@ -32,28 +32,28 @@
 
 #include <windows.h>
 
-static void setup_ivl_environment();
-static void assign(char **ptr, char *str);
+/* Macros used for compiling and linking */
 
-/* The compile options: compiler, flags, etc. are in here */
-#include "config.h"
+#define IVERILOG_VPI_CC        "gcc"				/* no .exe extension  */
+#define IVERILOG_VPI_CXX       "gcc"				/* no .exe extension  */
+#define IVERILOG_VPI_CFLAGS    "-O"					/* -I appended  later */
+#define IVERILOG_VPI_LD        "gcc"				/* no .exe extension  */
+#define IVERILOG_VPI_LDFLAGS   "-shared -Wl,--enable-auto-image-base"
+#define IVERILOG_VPI_LDLIBS    "-lveriuser -lvpi"	/* -L prepended later */
 
 /* pointers to global strings */
 
 static struct global_strings {
-	char *pCCSRC;		/* list of C source files (*.c) */
-	char *pCXSRC;		/* list of C++ source files (*.cc, *.cpp) */
+	char *pCCSRC;		/* list of C source files */
+	char *pCXSRC;		/* list of C++ source files */
 	char *pOBJ;			/* list of object files */
 	char *pLIB;			/* list of library files */
-	char *pINCS;			/* list of include directories */
-	char *pDEFS;			/* list of definitions */
 	char *pOUT;			/* output file name (.vpi extension), if 0 length then no source files specified */
 	char *pMINGW;		/* path to MinGW directory */
 	char *pIVL;			/* path to IVL directory */
 	char *pCFLAGS;		/* CFLAGS option */
 	char *pLDLIBS;		/* LDLIBS option */
 	char *pNewPath;		/* new PATH environment variable setting */
-	char *pLD;		/* what to use for a linker */
 } gstr;
 
 
@@ -70,15 +70,12 @@ static void myExit(int exitVal)
 	deInitDynString(gstr.pCXSRC);
 	deInitDynString(gstr.pOBJ);
 	deInitDynString(gstr.pLIB);
-	deInitDynString(gstr.pINCS);
-	deInitDynString(gstr.pDEFS);
 	deInitDynString(gstr.pOUT);
 	deInitDynString(gstr.pMINGW);
 	deInitDynString(gstr.pIVL);
 	deInitDynString(gstr.pCFLAGS);
 	deInitDynString(gstr.pLDLIBS);
 	deInitDynString(gstr.pNewPath);
-	free(gstr.pLD);
 
 	exit(exitVal);
 }
@@ -87,9 +84,9 @@ static void myExit(int exitVal)
 
 static void usage()
 {
-	fprintf(stderr,"usage: iverilog-vpi" IVERILOG_SUFFIX " [src and obj files]...\n");
-	fprintf(stderr,"   or  iverilog-vpi" IVERILOG_SUFFIX " -mingw=dir\n");
-	fprintf(stderr,"   or  iverilog-vpi" IVERILOG_SUFFIX " -ivl=dir\n");
+	fprintf(stderr,"usage: iverilog-vpi [--name=name] [-llibrary] [-mingw=dir] [-ivl=dir] sourcefile...\n");
+	fprintf(stderr,"   or  iverilog-vpi -mingw=dir\n");
+	fprintf(stderr,"   or  iverilog-vpi -ivl=dir\n");
 	myExit(1);
 }
 
@@ -113,16 +110,12 @@ static void init()
 	initDynString(&gstr.pCXSRC);
 	initDynString(&gstr.pOBJ);
 	initDynString(&gstr.pLIB);
-	initDynString(&gstr.pINCS);
-	initDynString(&gstr.pDEFS);
 	initDynString(&gstr.pOUT);
 	initDynString(&gstr.pMINGW);
 	initDynString(&gstr.pIVL);
 	initDynString(&gstr.pCFLAGS);
 	initDynString(&gstr.pLDLIBS);
 	initDynString(&gstr.pNewPath);
-	  /* By default use the C compiler to link the programs. */
-	assign(&gstr.pLD, IVERILOG_VPI_CC);
 }
 
 /* return true if "str" is terminated with with "end", case insensitive */
@@ -288,120 +281,67 @@ static int parse(int argc, char *argv[])
 	char dot_o_ext[]    = ".o";
 	char name_option[]  = "--name=";
 	char lib_option[]   = "-l";
-	char inc_option[]   = "-I";
 	char mingw_option[] = "-mingw=";
 	char ivl_option[]   = "-ivl=";
-	char def_option[]   = "-D";
 
-	if (argc == 1) return 0;
+	if (argc == 1)
+		return 0;
 
 	for (idx=1; idx<argc; ++idx) {
-		  /* Check for C source files (*.c) */
-		if (endsIn(dot_c_ext, argv[idx])) {
+		if (endsIn(dot_c_ext,argv[idx])) {				/* check for C source files */
 			++srcFileCnt;
-			append(&gstr.pCCSRC, argv[idx]);
-			append(&gstr.pCCSRC, " ");
+			append(&gstr.pCCSRC,argv[idx]);
+			append(&gstr.pCCSRC," ");
 			if (!*gstr.pOUT)
-			   assignn(&gstr.pOUT, argv[idx],
-			           strlen(argv[idx])-strlen(dot_c_ext));
+			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_c_ext));
 		}
-		  /* Check for C++ source files (*.cc) */
-		else if (endsIn(dot_cc_ext, argv[idx])) {
-			  /* We need to link with the C++ compiler. */
-			assign(&gstr.pLD, IVERILOG_VPI_CXX);
+		else if (endsIn(dot_cc_ext,argv[idx])) {		/* check for C++ source files */
 			++srcFileCnt;
-			append(&gstr.pCXSRC, argv[idx]);
-			append(&gstr.pCXSRC, " ");
+			append(&gstr.pCXSRC,argv[idx]);
+			append(&gstr.pCXSRC," ");
 			if (!*gstr.pOUT)
-			   assignn(&gstr.pOUT, argv[idx],
-			           strlen(argv[idx])-strlen(dot_cc_ext));
+			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_cc_ext));
 		}
-		  /* Check for C++ source files (*.cpp) */
-		else if (endsIn(dot_cpp_ext, argv[idx])) {
-			  /* We need to link with the C++ compiler. */
-			assign(&gstr.pLD, IVERILOG_VPI_CXX);
+		else if (endsIn(dot_cpp_ext,argv[idx])) {		/* check for C++ source files */
 			++srcFileCnt;
-			append(&gstr.pCXSRC, argv[idx]);
-			append(&gstr.pCXSRC, " ");
+			append(&gstr.pCXSRC,argv[idx]);
+			append(&gstr.pCXSRC," ");
 			if (!*gstr.pOUT)
-			   assignn(&gstr.pOUT, argv[idx],
-			           strlen(argv[idx])-strlen(dot_cpp_ext));
+			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_cpp_ext));
 		}
-		  /* Check for compiled object files */
-		else if (endsIn(dot_o_ext, argv[idx])) {
+		else if (endsIn(dot_o_ext,argv[idx])) {			/* check for compiled object files */
 			++srcFileCnt;
+			append(&gstr.pOBJ,argv[idx]);
 			append(&gstr.pOBJ," ");
-			append(&gstr.pOBJ, argv[idx]);
 			if (!*gstr.pOUT)
-			   assignn(&gstr.pOUT, argv[idx],
-			           strlen(argv[idx])-strlen(dot_o_ext));
+			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_o_ext));
 		}
-		  /* Check for the -mingw option */
-		else if (startsWith(mingw_option, argv[idx]))
-			assignn(&gstr.pMINGW, argv[idx]+sizeof(mingw_option)-1,
-			        strlen(argv[idx])-(sizeof(mingw_option)-1));
-		  /* Check for the -ivl   option */
-		else if (startsWith(ivl_option, argv[idx]))
-			assignn(&gstr.pIVL, argv[idx]+sizeof(ivl_option)-1,
-			        strlen(argv[idx])-(sizeof(ivl_option)-1));
-		  /* Check for the --name option */
-		else if (startsWith(name_option, argv[idx])) {
-			assignn(&gstr.pOUT, argv[idx]+sizeof(name_option)-1,
-			        strlen(argv[idx])-(sizeof(name_option)-1));
+		else if (startsWith(name_option,argv[idx])) {	/* check for --name option */
+			assignn(&gstr.pOUT,argv[idx]+sizeof(name_option)-1,strlen(argv[idx])-(sizeof(name_option)-1));
 		}
-		  /* Check for the -l option */
-		else if (startsWith(lib_option, argv[idx])) {
-			append(&gstr.pLIB, " ");
-			append(&gstr.pLIB, argv[idx]);
+		else if (startsWith(lib_option,argv[idx])) {	/* check for -l option */
+			append(&gstr.pLIB,argv[idx]);
+			append(&gstr.pLIB," ");
 		}
-		  /* Check for the -I option */
-		else if (startsWith(inc_option, argv[idx])) {
-			append(&gstr.pINCS, " ");
-			append(&gstr.pINCS, argv[idx]);
-		}
-		  /* Check for the -D option */
-		else if (startsWith(def_option, argv[idx])) {
-			append(&gstr.pDEFS, " ");
-			append(&gstr.pDEFS, argv[idx]);
-		}
-		  /* Check for the --cflags option */
-		else if (stricmp("--cflags", argv[idx]) == 0) {
-			setup_ivl_environment();
-			printf("%s\n", gstr.pCFLAGS);
-			myExit(0);
-		}
-		  /* Check for the --ldflags option */
-		else if (stricmp("--ldflags", argv[idx]) == 0) {
-			printf("%s\n", IVERILOG_VPI_LDFLAGS);
-			myExit(0);
-		}
-		  /* Check for the --ldlibs option */
-		else if (stricmp("--ldlibs", argv[idx]) == 0) {
-			setup_ivl_environment();
-			printf("%s\n", gstr.pLDLIBS);
-			myExit(0);
-		}
-		  /* Check for the --install-dir option */
-		else if (stricmp("--install-dir", argv[idx]) == 0) {
-			setup_ivl_environment();
-			printf("%s\\\\lib\\\\ivl" IVERILOG_SUFFIX "\\\\.\n", gstr.pIVL);
-			myExit(0);
-		}
-		  /* This is different than iverilog-vpi.sh, we don't
-		   * ignore unknown arguments */
-		else return 0;
+		else if (startsWith(mingw_option,argv[idx]))	/* check for -mingw option */
+			assignn(&gstr.pMINGW,argv[idx]+sizeof(mingw_option)-1,strlen(argv[idx])-(sizeof(mingw_option)-1));
+		else if (startsWith(ivl_option,argv[idx]))		/* check for -ivl   option */
+			assignn(&gstr.pIVL,argv[idx]+sizeof(ivl_option)-1,strlen(argv[idx])-(sizeof(ivl_option)-1));
+		else
+			return 0;	/* different from iverilog-vpi.sh, we don't ignore accept arguments */
 	}
 
-	  /* In case there is a --name without source/object files */
-	if (0 == srcFileCnt) assign(&gstr.pOUT,"");
+	if (0 == srcFileCnt)
+		assign(&gstr.pOUT,"");				/* in case they used --name with no source files */
 
-	  /* Normally it's an error if there are no source or object files */
-	  /* Unless we are setting the IVL or MinGW registry entries */
-	if (!*gstr.pOUT) {
-		if (!*gstr.pMINGW && !*gstr.pIVL) return 0;
-	} else
-		  /* We have a valid result file so add the .vpi extension */
-		append(&gstr.pOUT, ".vpi");
+	if (!*gstr.pOUT) {						/* normally it's an error if there are no *.c,*.cc,*.o files */
+		if (!*gstr.pMINGW && !*gstr.pIVL)	/* unless they are just setting the IVL or MinGW registry entries */
+			usage();
+	}
+	else {
+		append(&gstr.pOUT,".vpi");			/* the result file should have a .vpi extension */
+		append(&gstr.pOUT," ");
+	}
 
 	return 1;
 }
@@ -444,14 +384,14 @@ static void checkIvlDir(char *root)
 	initDynString(&path);
 	assign(&path,gstr.pIVL);
 	appendBackSlash(&path);
-	append(&path,"bin\\vvp" IVERILOG_SUFFIX ".exe");
+	append(&path,"bin\\vvp.exe");
 
 	irv = _stat(path,&stat_buf);
 	deInitDynString(path);
 
 	if (irv) {
 		fprintf(stderr,"error: %s does not appear to be the valid root directory of\n",root);
-		fprintf(stderr,"       Icarus Verilog.  Use the -ivl option of iverilog-vpi" IVERILOG_SUFFIX " to\n");
+		fprintf(stderr,"       Icarus Verilog.  Use the -ivl option of iverilog-vpi.exe to\n");
 		fprintf(stderr,"       point to the Icarus Verilog root directory.  For a Windows\n");
 		fprintf(stderr,"       command shell the option would be something like -ivl=c:\\iverilog\n");
 		fprintf(stderr,"       For a Cygwin shell the option would be something like\n");
@@ -471,7 +411,9 @@ static void setup_mingw_environment()
 	if (*gstr.pMINGW) {
 		checkMingwDir(gstr.pMINGW);
 		SetRegistryKey(IVL_REGKEY_MINGW,gstr.pMINGW);
-	} else if (!GetRegistryKey(IVL_REGKEY_MINGW,&gstr.pMINGW)) {
+	}
+	else
+		if (!GetRegistryKey(IVL_REGKEY_MINGW,&gstr.pMINGW)) {
 			fprintf(stderr,"error: can not locate the MinGW root directory, use the -mingw option of\n");
 			fprintf(stderr,"       iverilog-vpi.exe to point to the MinGW root directory.  For\n");
 			fprintf(stderr,"       a Windows command shell the option would be something like\n");
@@ -480,16 +422,13 @@ static void setup_mingw_environment()
 			myExit(5);
 		}
 
-	  /* Create new path with MinGW in it */
-	assign(&gstr.pNewPath,"PATH=");
+	assign(&gstr.pNewPath,"PATH=");			/* create new path */
 	append(&gstr.pNewPath,gstr.pMINGW);
 	appendBackSlash(&gstr.pNewPath);
-	append(&gstr.pNewPath, "\\");
 	append(&gstr.pNewPath,"bin;");
 	append(&gstr.pNewPath,pOldPATH);
 
-	  /* Place new path in environment */
-	_putenv(gstr.pNewPath);
+	_putenv(gstr.pNewPath);					/* place new path in environment variable */
 }
 
 /* see if we can find iverilog root */
@@ -501,73 +440,67 @@ static void setup_ivl_environment()
 	if (*gstr.pIVL) {
 		checkIvlDir(gstr.pIVL);
 		SetRegistryKey(IVL_REGKEY_IVL,gstr.pIVL);
-	} else if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) {
+	}
+	else
+		if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) {
 			fprintf(stderr,"error: can not locate the Icarus Verilog root directory, use the -ivl option\n");
-			fprintf(stderr,"       of iverilog-vpi" IVERILOG_SUFFIX " to point to the Icarus Verilog root directory.\n");
+			fprintf(stderr,"       of iverilog-vpi.exe to point to the Icarus Verilog root directory.\n");
 			fprintf(stderr,"       For a Windows command shell the option would be something like\n");
 			fprintf(stderr,"       -ivl=c:\\iverilog  For a Cygwin shell the option would be something\n");
 			fprintf(stderr,"       like -ivl=c:\\\\iverilog\n");
 			myExit(6);
 		}
 
-	  /* Build up the CFLAGS option string */
-	assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS " -I");
+	/* build up the CFLAGS option string */
+
+	assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS);
+	append(&gstr.pCFLAGS," -I");
 	append(&gstr.pCFLAGS,gstr.pIVL);
 	appendBackSlash(&gstr.pCFLAGS);
-	append(&gstr.pCFLAGS,"\\include\\\\iverilog" IVERILOG_SUFFIX);
+	append(&gstr.pCFLAGS,"include");
+
+	/* build up the LDFLAGS option string */
 
-	  /* Build up the LDFLAGS option string */
 	assign(&gstr.pLDLIBS,"-L");
 	append(&gstr.pLDLIBS,gstr.pIVL);
 	appendBackSlash(&gstr.pLDLIBS);
-	append(&gstr.pLDLIBS,"\\lib " IVERILOG_VPI_LDLIBS);
+	append(&gstr.pLDLIBS,"lib ");
+	append(&gstr.pLDLIBS,IVERILOG_VPI_LDLIBS);
 }
 
 /* compile source modules */
 
-static void compile(char *pSource, char **pObject, int *compile_errors, char *compiler)
+static void compile(char *pSource, char **pObject, char *ext, int *compile_errors, char *compiler)
 {
 	char *ptr1 = pSource;
-	char *ptr2 = strchr(ptr1, ' ');
-	char *buf=0, *src=0, *obj=0;
+	char *ptr2 = strchr(pSource,' ');
+	char *buf=0,*src=0,*obj=0;
 
 	while (ptr2) {
 		int len = ptr2 - ptr1;
-		char *ostart;
-		int olen;
-		assignn(&src, ptr1, len);
+		assignn(&src,ptr1,len);
 
-		  /* Build the object file name */
-		ostart = strrchr(ptr1, '/');
-		if (ostart == NULL) ostart = ptr1;
-		else ostart += 1;
-		olen = strrchr(ptr1, '.') - ostart;
-		assignn(&obj, ostart, olen);
-		append(&obj, ".o");
+		assignn(&obj,ptr1,len-strlen(ext));		/* strip off the extension */
+		append (&obj,".o");
 
-		  /* Build the compile line */
-		assign(&buf, compiler);
-		append(&buf, " -c -o ");
-		append(&buf, obj);
-		append(&buf, " ");
-		append(&buf, gstr.pDEFS);
-		append(&buf, " ");
-		append(&buf, gstr.pCFLAGS);
-		append(&buf, " ");
-		append(&buf, gstr.pINCS);
-		append(&buf, " ");
-		append(&buf, src);
+		assign (&buf,compiler);
+		append (&buf," -c -o ");
+		append (&buf,obj);
+		append (&buf," ");
+		append (&buf,gstr.pCFLAGS);
+		append (&buf," ");
+		append (&buf,src);
 
-		append (pObject, " ");
-		append (pObject, obj);
+		append (pObject,obj);
+		append (pObject," ");
 
-		printf("Compiling %s...\n", src);
+		printf("%s\n",buf);
 
-		if (system(buf)) ++*compile_errors;
+		if (system(buf))
+			++*compile_errors;
 
-		  /* advance to next token */
-		ptr1 = ptr2 + 1;
-		ptr2 = strchr(ptr1, ' ');
+		ptr1 = ptr2 + 1;					/* advance to next token */
+		ptr2 = strchr(ptr1,' ');
 	}
 
 	free(buf);
@@ -582,44 +515,43 @@ static void compile_and_link()
 	char *buf=0;
 	int iRet, compile_errors = 0;
 
-	  /* To make the output match iverilog-vpi.sh do not print out the
-	   * root directories */
+	/* print out the mingw and ivl directories to help the user debug problems */
 
-//	printf("MinGW root directory:  %s.\n", gstr.pMINGW);
+	printf("info:  %s will be used as the MinGW root directory.\n",gstr.pMINGW);
 	checkMingwDir(gstr.pMINGW);
 
-//	printf("Icarus Verilog root directory:  %s.\n", gstr.pIVL);
+	printf("info:  %s will be used as the Icarus Verilog root directory.\n",gstr.pIVL);
 	checkIvlDir(gstr.pIVL);
 
-	  /* compile the C source files (*.c) */
-	compile(gstr.pCCSRC, &gstr.pOBJ, &compile_errors, IVERILOG_VPI_CC );
-	  /* compile the C++ source files (*.cc, *.cpp) */
-	compile(gstr.pCXSRC, &gstr.pOBJ, &compile_errors, IVERILOG_VPI_CXX);
+	/* compile */
+
+	compile(gstr.pCCSRC,&gstr.pOBJ,".c" ,&compile_errors,IVERILOG_VPI_CC );		/* compile the C   source files */
+	compile(gstr.pCXSRC,&gstr.pOBJ,".cc",&compile_errors,IVERILOG_VPI_CXX);		/* compile the C++ source files */
 
 	if (compile_errors) {
-		fprintf(stderr,"iverilog-vpi: %d file(s) failed to compile.\n",
-		        compile_errors);
+		fprintf(stderr,"iverilog-vpi: Some %d files failed to compile.\n",compile_errors);
 		myExit(2);
 	}
 
-	  /* link */
-	assign(&buf, gstr.pLD);
-	append(&buf, " -o ");
-	append(&buf, gstr.pOUT);
-	append(&buf, " ");
-	append(&buf, IVERILOG_VPI_LDFLAGS);
-	append(&buf, " ");
-	append(&buf, gstr.pOBJ);
-	append(&buf, " ");
-	append(&buf, gstr.pLIB);
-	append(&buf, " ");
-	append(&buf, gstr.pLDLIBS);
+	/* link */
 
-	printf("Making %s from %s...\n", gstr.pOUT,gstr.pOBJ);
+	assign(&buf,IVERILOG_VPI_LD);
+	append(&buf," -o ");
+	append(&buf,gstr.pOUT);				/* has a trailing space */
+	append(&buf,IVERILOG_VPI_LDFLAGS);
+	append(&buf," ");
+	append(&buf,gstr.pOBJ)				/* has a trailing space */;
+	append(&buf,gstr.pLIB);				/* has a trailing space */
+	append(&buf,gstr.pLDLIBS);
+
+	printf("%s\n",buf);
 
 	iRet = system(buf);
+
 	free(buf);
-	if (iRet) myExit(3);
+
+	if (iRet)
+		myExit(3);
 }
 
 /* program execution starts here */
@@ -628,14 +560,14 @@ int main(int argc, char *argv[])
 {
 	init();
 
-	if (!parse(argc,argv)) usage();
+	if (!parse(argc,argv))
+		usage();
 
 	setup_mingw_environment();
 	setup_ivl_environment();
 
-	  /* are there any source or object files specified */
-	if (*gstr.pOUT) compile_and_link();
+	if (*gstr.pOUT)				/* are there any *.c,*.cc,*.o files specified */
+		compile_and_link();
 
 	myExit(0);
-	return 0; // eliminate warnings.
 }

driver/Makefile.in

@@ -16,12 +16,12 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.24.2.3 2007/05/30 17:48:26 steve Exp $"
+#ident "$Id: Makefile.in,v 1.26 2007/02/06 05:07:31 steve Exp $"
 #
 #
 SHELL = /bin/sh
 
-suffix = @install_suffix@
+VERSION = 0.8
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -40,10 +40,8 @@ CC = @CC@
 INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
-MAN = @MAN@
-PS2PDF = @PS2PDF@
 
-CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
+CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
 
@@ -52,11 +50,10 @@ all: iverilog@EXEEXT@
 clean:
 	rm -f *.o lexor.c parse.c parse.h parse.output
 	rm -f cflexor.c cfparse.c cfparse.h cfparse.output
-	rm -f iverilog@EXEEXT@
+	rm -f iverilog@EXEEXT@ iverilog.pdf iverilog.ps
 
 distclean: clean
 	rm -f Makefile
-	rm -rf autom4te.cache
 
 O = main.o substit.o cflexor.o cfparse.o
 
@@ -71,49 +68,41 @@ cfparse.h cfparse.c: cfparse.y
 
 
 main.o: main.c globals.h
-	$(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl$(suffix)"'  -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(DEBUGFLAGS) $(srcdir)/main.c
+	$(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl"'  -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
 
 build_string.o: build_string.c globals.h
 cflexor.o: cflexor.c cfparse.h cfparse_misc.h globals.h
 cfparse.o: cfparse.c globals.h cfparse_misc.h
 
 iverilog.ps: $(srcdir)/iverilog.man
-	$(MAN) -t $(srcdir)/iverilog.man > iverilog.ps
+	man -t $(srcdir)/iverilog.man > iverilog.ps
 
 iverilog.pdf: iverilog.ps
-	$(PS2PDF) iverilog.ps iverilog.pdf
+	ps2pdf iverilog.ps iverilog.pdf
 
-ifeq (@WIN32@,yes)
-ifeq ($(MAN),none)
-INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
-else
-ifeq ($(PS2PDF),none)
-INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
-else
-INSTALL_DOC = $(prefix)/iverilog$(suffix).pdf $(mandir)/man1/iverilog$(suffix).1
+ifeq (@MING32@,yes)
+INSTALL_DOC = $(prefix)/iverilog.pdf $(mandir)/man1/iverilog.1
+INSTALL_DOCDIR = $(mandir)/man1
 all: iverilog.pdf
-endif
-endif
-INSTALL_DOCDIR = $(mandir)/man1
 else
-INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
+INSTALL_DOC = $(mandir)/man1/iverilog.1
 INSTALL_DOCDIR = $(mandir)/man1
 endif
 
-install: all installdirs $(bindir)/iverilog$(suffix)@EXEEXT@ $(INSTALL_DOC)
+install: all installdirs $(bindir)/iverilog@EXEEXT@ $(INSTALL_DOC)
 
-$(bindir)/iverilog$(suffix)@EXEEXT@: ./iverilog@EXEEXT@
-	$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ $(bindir)/iverilog$(suffix)@EXEEXT@
+$(bindir)/iverilog@EXEEXT@: ./iverilog@EXEEXT@
+	$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ $(bindir)/iverilog@EXEEXT@
 
-$(mandir)/man1/iverilog$(suffix).1: $(srcdir)/iverilog.man
-	$(INSTALL_DATA) $(srcdir)/iverilog.man $(mandir)/man1/iverilog$(suffix).1
+$(mandir)/man1/iverilog.1: $(srcdir)/iverilog.man
+	$(INSTALL_DATA) $(srcdir)/iverilog.man $(mandir)/man1/iverilog.1
 
-$(prefix)/iverilog$(suffix).pdf: iverilog.pdf
-	$(INSTALL_DATA) iverilog.pdf $(prefix)/iverilog$(suffix).pdf
+$(prefix)/iverilog.pdf: iverilog.pdf
+	$(INSTALL_DATA) iverilog.pdf $(prefix)/iverilog.pdf
 
 installdirs: ../mkinstalldirs
 	$(srcdir)/../mkinstalldirs $(bindir) $(INSTALL_DOCDIR)
 
 uninstall:
-	rm -f $(bindir)/iverilog$(suffix)@EXEEXT@
-	rm -f $(mandir)/man1/iverilog$(suffix).1
+	rm -f $(bindir)/iverilog@EXEEXT@
+	rm -f $(mandir)/man1/iverilog.1 $(prefix)/iverilog.pdf

driver/cflexor.lex

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: cflexor.lex,v 1.8 2004/10/04 01:10:56 steve Exp $"
+#ident "$Id: cflexor.lex,v 1.11 2007/03/22 16:08:18 steve Exp $"
 #endif
 
 # include  "cfparse.h"
@@ -37,12 +37,14 @@
 YYLTYPE yylloc;
 
 static int comment_enter;
+ static char* trim_trailing_white(char*txt, int trim);
 
 %}
 
 %x CCOMMENT
 %x LCOMMENT
 %x PLUS_ARGS
+%x FILE_NAME
 
 %%
 
@@ -76,6 +78,7 @@ static int comment_enter;
 
 "+libext+" { BEGIN(PLUS_ARGS); return TOK_LIBEXT; }
 
+"+integer-width+" { BEGIN(PLUS_ARGS); return TOK_INTEGER_WIDTH; }
 
   /* If it is not any known plus-flag, return the generic form. */
 "+"[^\n \t\b\f\r+]* {
@@ -112,17 +115,50 @@ static int comment_enter;
   /* This rule matches paths and strings that may be file names. This
      is a little bit tricky, as we don't want to mistake a comment for
      a string word. */
-"/"[^\*\/].* { cflval.text = strdup(yytext);
-               return TOK_STRING; }
-
-[^/\n \t\b\r+-].* { cflval.text = strdup(yytext);
-                   return TOK_STRING; }
+"/"[\r\n] { /* Special case of file name "/" */
+      cflval.text = trim_trailing_white(yytext, 0);
+      return TOK_STRING; }
+"/"[^\*\/] { /* A file name that starts with "/". */
+      yymore();
+      BEGIN(FILE_NAME); }
+[^/\n \t\b\r+-][^/\n\r]* { /* A file name that starts with other than "/" */
+      yymore();
+      BEGIN(FILE_NAME); }
 
+<FILE_NAME>"//" {
+	/* Found a trailing comment. Returning the terminated name. */
+      cflval.text = trim_trailing_white(yytext, 2);
+      BEGIN(LCOMMENT);
+      return TOK_STRING; }
+<FILE_NAME>"/"?[^/\n\r]* {
+      yymore();
+      /* not a comment... continuing */; }
+<FILE_NAME>[\n\r] {
+	/* No trailing comment. Return the file name. */
+      cflval.text = trim_trailing_white(yytext, 0);
+      BEGIN(0);
+      return TOK_STRING; }
+       
   /* Fallback match. */
 . { return yytext[0]; }
 
 %%
 
+static char* trim_trailing_white(char*text, int trim)
+{
+      char*cp = text + strlen(text);
+      while (cp > text && trim > 0) {
+	    trim -= 1;
+	    cp -= 1;
+	    *cp = 0;
+      }
+      while (cp > text && strchr("\n\r\t\b", cp[-1]))
+	    cp -= 1;
+
+      cp[0] = 0;
+      return strdup(text);
+}
+
 int yywrap()
 {
       return 1;

driver/cfparse.y

@@ -18,7 +18,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: cfparse.y,v 1.10 2003/09/26 21:25:58 steve Exp $"
+#ident "$Id: cfparse.y,v 1.12 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 
@@ -62,6 +62,7 @@ static void translate_file_name(char*text)
 
 %token TOK_Da TOK_Dv TOK_Dy
 %token TOK_DEFINE TOK_INCDIR TOK_LIBDIR TOK_LIBDIR_NOCASE TOK_LIBEXT
+%token TOK_INTEGER_WIDTH
 %token <text> TOK_PLUSARG TOK_PLUSWORD TOK_STRING
 
 %%
@@ -83,7 +84,7 @@ item
 	: TOK_STRING
 		{ char*tmp = substitutions($1);
 		  translate_file_name(tmp);
-		  process_file_name(tmp);
+		  process_file_name(tmp, 0);
 		  free($1);
 		  free(tmp);
 		}
@@ -98,9 +99,7 @@ item
         | TOK_Dv TOK_STRING
 		{ char*tmp = substitutions($2);
 		  translate_file_name(tmp);
-		  process_file_name(tmp);
-		  fprintf(stderr, "%s:%u: Ignoring -v in front of %s\n",
-			  @1.text, @1.first_line, $2);
+		  process_file_name(tmp, 1);
 		  free($2);
 		  free(tmp);
 		}
@@ -145,6 +144,15 @@ item
 
 	| TOK_LIBEXT libext_args
 
+  /* These are various misc flags that are supported. */
+
+	| TOK_INTEGER_WIDTH TOK_PLUSARG
+                { char*tmp = substitutions($2);
+		  free($2);
+		  integer_width = strtoul(tmp,0,10);
+		  free(tmp);
+		}
+
   /* The +<word> tokens that are not otherwise matched, are
      ignored. The skip_args rule arranges for all the argument words
      to be consumed. */

driver/globals.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: globals.h,v 1.19 2003/11/18 06:31:46 steve Exp $"
+#ident "$Id: globals.h,v 1.21 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 # include  <stddef.h>
@@ -49,11 +49,14 @@ extern int synth_flag;
   /* This is the name of the selected target. */
 extern const char*targ;
 
+  /* This is the integer-width argument that will be passed to ivl. */
+extern unsigned integer_width;
+
   /* Perform variable substitutions on the string. */
 extern char* substitutions(const char*str);
 
   /* Add the name to the list of source files. */
-extern void process_file_name(const char*name);
+extern void process_file_name(const char*name, int lib_flag);
 
   /* Add the name to the list of library directories. */
 extern void process_library_switch(const char*name);
@@ -77,6 +80,12 @@ extern char* library_flags2;
 
 /*
  * $Log: globals.h,v $
+ * Revision 1.21  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
+ *
+ * Revision 1.20  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
  * Revision 1.19  2003/11/18 06:31:46  steve
  *  Remove the iverilog.conf file.
  *

driver/iverilog.man

@@ -1,10 +1,10 @@
-.TH iverilog 1 "$Date: 2006/06/12 00:16:53 $" Version "$Date: 2006/06/12 00:16:53 $"
+.TH iverilog 1 "$Date: 2007/06/05 01:56:12 $" Version "$Date: 2007/06/05 01:56:12 $"
 .SH NAME
 iverilog - Icarus Verilog compiler
 
 .SH SYNOPSIS
 .B iverilog
-[-ESVv] [-Bpath] [-ccmdfile] [-g1|-g2|-g3.0] [-Dmacro[=defn]] [-pflag=value]
+[-ESVv] [-Bpath] [-ccmdfile] [-g1|-g2|-g2x|-gspecify-gxtypes] [-Dmacro[=defn]] [-pflag=value]
 [-Iincludedir] [-mmodule] [-Mfile] [-Nfile] [-ooutputfilename]
 [-stopmodule] [-ttype] [-Tmin/typ/max] [-Wclass] [-ypath] sourcefile
 
@@ -48,15 +48,30 @@ is the Verilog input, but with file inclusions and macro references
 expanded and removed. This is useful, for example, to preprocess
 Verilog source for use by other compilers.
 .TP 8
-.B -g1\fI|\fP-g2\fI|\fP-g3.0
+.B -g1\fI|\fP-g2\fI|\fP-g2x
 Select the Verilog language \fIgeneration\fP to support in the
 compiler. This selects between \fIIEEE1364-1995\fP(1),
-\fIIEEE1364-2001\fP(2), or \fISystemVerilog 3.0\fP(3.0). Normally,
+\fIIEEE1364-2001\fP(2), or \fIVerilog with extension\fP(2x). Normally,
 Icarus Verilog defaults to the latest known generation of the
 language. This flag is most useful to restrict the language to a set
 supported by tools of specific generations, for compatibility with
 other tools.
 .TP 8
+.B -gspecify\fI|\fP-gno-specify
+Enable (default) or disable specify block support. When enabled,
+specify block code is elaborated. When disabled, specify blocks are
+parsed but ignored. Specify blocks are commonly not needed for RTL
+simulation, and in fact can hurt performance of the
+simulation. However, disabling specify blocks reduces accuracy of
+full-timing simulations.
+.TP 8
+.B -gxtypes\fI|\fP-gno-xtypes
+Enable (default) or disable support for extended types. Enabling
+extended types allows for new types that are supported by Icarus
+Verilog as extensions beyond the baseline Verilog. It may be necessary
+to disable extended types if compiling code that clashes with the few
+new keywords used to implement the type system.
+.TP 8
 .B -I\fIincludedir\fP
 Append directory \fIincludedir\fP to list of directories searched
 for Verilog include files. The \fB-I\fP switch may be used many times
@@ -74,6 +89,8 @@ leading or trailing space.
 Add this module to the list of VPI modules to be loaded by the
 simulation. Many modules can be specified, and all will be loaded, in
 the order specified. The system module is implicit and always included.
+If a System Function Table file (<module>.sft) exists for the module it
+will be loaded automatically.
 .TP 8
 .B -N\fIpath\fP
 This is used for debugging the compiler proper. Dump the final netlist
@@ -184,7 +201,7 @@ implies the synthesis \fB-S\fP flag.
 
 .SH "WARNING TYPES"
 These are the types of warnings that can be selected by the \fB-W\fP
-switch. All the warning types (other then \fBall\fP) can also be
+switch. All the warning types (other than \fBall\fP) can also be
 prefixed with \fBno-\fP to turn off that warning. This is most useful
 after a \fB-Wall\fP argument to suppress isolated warning types.
 
@@ -212,12 +229,6 @@ inherit timescale from another file. Both probably mean that
 timescales are inconsistent, and simulation timing can be confusing
 and dependent on compilation order.
 
-.TP 8
-.B unused
-This enables warnings for unused variables. This may detect variables
-that are not assigned, or variables and nets that are not used, or
-similar possible misuses of variables and nets.
-
 .SH "SYSTEM FUNCTION TABLE FILES"
 If the source file name as a \fB.sft\fP suffix, then it is taken to be
 a system function table file. A System function table file is used to
@@ -255,7 +266,7 @@ well as # comments, if the # starts the line.
 .I "file name"
 A simple file name or file path is taken to be the name of a Verilog
 source file. The path starts with the first non-white-space
-character. Variables are substitued in file names.
+character. Variables are substituted in file names.
 
 .TP 8
 .B -y\ \fIlibdir\fP
@@ -310,13 +321,19 @@ become munged.
 .B +tolower-filename\fP
 This is similar to the \fB+toupper-filename\fP hack described above.
 
+.TP 8
+.B +integer-width+\fIvalue\fP
+This allows the programmer to select the width for integer variables
+in the Verilog source. The default is 32, the value can be any desired
+integer value.
+
 .SH "VARIABLES IN COMMAND FILES"
 
 In certain cases, iverilog supports variables in command files. These
 are strings of the form "$(\fIvarname\fP)", where \fIvarname\fP is the
 name of the environment variable to read. The entire string is
 replaced with the contents of that variable. Variables are only
-substitued in contexts that explicitly support them, including file
+substituted in contexts that explicitly support them, including file
 and directory strings.
 
 Variable values come from the operating system environment, and not

driver/main.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2001 Stephen Williams ([email protected])
+ * Copyright (c) 2000-2005 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,11 +17,10 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: main.c,v 1.65.2.6 2007/05/30 17:48:26 steve Exp $"
+#ident "$Id: main.c,v 1.76 2007/06/05 01:56:12 steve Exp $"
 #endif
 
 # include "config.h"
-# include "version.h"
 
 const char NOTICE[] =
 "  This program is free software; you can redistribute it and/or modify\n"
@@ -40,7 +39,7 @@ const char NOTICE[] =
 ;
 
 const char HELP[] =
-"Usage: iverilog [-ESvV] [-B base] [-c cmdfile] [-g1|-g2|-g3.0]\n"
+"Usage: iverilog [-ESvV] [-B base] [-c cmdfile] [-g1|-g2|-g2x]\n"
 "                [-D macro[=defn]] [-I includedir] [-M depfile] [-m module]\n"
 "                [-N file] [-o filename] [-p flag=value]\n"
 "                [-s topmodule] [-t target] [-T min|typ|max]\n"
@@ -89,10 +88,6 @@ extern const char*optarg;
 # define IVL_ROOT "."
 #endif
 
-#ifndef IVL_ROOT_VARIABLE
-# define IVL_ROOT_VARIABLE "IVERILOG_ROOT"
-#endif
-
 # include  "globals.h"
 #include "cfparse_misc.h"   /* cfparse() */
 
@@ -112,12 +107,14 @@ const char*npath = 0;
 const char*targ  = "vvp";
 const char*depfile = 0;
 
-const char*generation = "3.0";
+const char*generation = "2x";
+const char*gen_specify = "specify";
+const char*gen_xtypes = "xtypes";
 
 char warning_flags[16] = "";
 
-char*inc_list = 0;
-char*def_list = 0;
+unsigned integer_width = 32;
+
 char*mod_list = 0;
 char*command_filename = 0;
 
@@ -128,6 +125,9 @@ char*source_path = 0;
 FILE*source_file = 0;
 unsigned source_count = 0;
 
+char*defines_path = 0;
+FILE*defines_file = 0;
+
 char*iconfig_path = 0;
 FILE*iconfig_file = 0;
 
@@ -136,7 +136,6 @@ char*iconfig_common_path = iconfig_common_path_buf;
 
 int synth_flag = 0;
 int verbose_flag = 0;
-int command_file = 0;
 
 FILE *fp;
 
@@ -145,6 +144,48 @@ char tmp[MAXSIZE];
 
 static char ivl_root[MAXSIZE];
 
+/* Structure to keep a FIFO list of the command files */
+typedef struct t_command_file {
+      char *filename;
+      struct t_command_file *next;
+} s_command_file, *p_command_file;
+p_command_file cmd_file_head = NULL;  /* The FIFO head */
+p_command_file cmd_file_tail = NULL;  /* The FIFO tail */
+
+/* Function to add a comamnd file name to the FIFO. */
+void add_cmd_file(const char* filename)
+{
+      p_command_file new;
+
+      new = (p_command_file) malloc(sizeof(s_command_file));
+      new->filename = strdup(filename);
+      new->next = NULL;
+      if (cmd_file_head == NULL) {
+            cmd_file_head = new;
+            cmd_file_tail = new;
+      } else {
+            cmd_file_tail->next = new;
+            cmd_file_tail = new;
+      }
+}
+
+/* Function to return the top comamnd file name from the FIFO. */
+char *get_cmd_file()
+{
+      char *filename;
+
+      if (cmd_file_head == NULL) filename = NULL;
+      else {
+            p_command_file head;
+
+            filename = cmd_file_head->filename;
+            head = cmd_file_head;
+            cmd_file_head = cmd_file_head->next;
+            free(head);
+      }
+      return filename;
+}
+
 #ifdef __MINGW32__
 # include  <io.h>
 # include  <fcntl.h>
@@ -267,72 +308,18 @@ static int t_default(char*cmd, unsigned ncmd)
       }
 #endif
 
-#ifdef DEBUG
-      char *original_cmd = malloc( strlen( cmd ) + (size_t)1 );
-      strcpy( original_cmd, cmd );
-
-      cmd = realloc( cmd, strlen( original_cmd ) + (size_t)19 ); /* more than enough memory for the ivlpp command and ">/tmp/ivlpp_stdout" */
-      if( cmd == NULL ){
-	exit( EXIT_FAILURE );
-      }
-
-      char *debug_ivl = malloc( strlen( original_cmd ) + (size_t)5 ); /* more than enough memory for "gdb " and ivl program_name */
-      strcpy( debug_ivl, "gdb " );
-
-      static char whitespace[] = " \t\f\r\v\n";
-      char *token;
-      int found_pipe = 0;
-      unsigned long token_counter = 0UL;
-
-      strcpy( cmd, "" );
-      for( token = strtok( original_cmd, whitespace ); token != NULL; token = strtok( NULL, whitespace ) ){
-
-	if( strcmp( token, "|" ) == 0 ){
-	  found_pipe = 1;
-	}
-
-	if( found_pipe ){
-	  token_counter++;
-	}
-
-	if( token_counter == 0UL ){
-	  strcat( cmd, token );
-	  strcat( cmd, " " ); /* harmless space after last token, and it was already there anyway */
-	}
-
-	if( token_counter == 2UL ){
-	  strcat( debug_ivl, token );
-	}
-
-	if( token_counter > 2UL ){
-	  printf( "%s\n", token );
-	}
-
-      }
-
-      free( original_cmd );
-      strcat( cmd, ">/tmp/ivlpp_stdout" );
-#endif
 
       if (verbose_flag)
 	    printf("translate: %s\n", cmd);
 
 
       rc = system(cmd);
-#ifdef DEBUG
-      if( verbose_flag ){
-	printf( "%s\n", debug_ivl );
+      if ( ! getenv("IVERILOG_ICONFIG")) {
+	    remove(source_path);
+	    remove(iconfig_path);
+	    remove(defines_path);
       }
 
-      system( debug_ivl ); /* For simplicity, ignore any return value, which is implementation dependent anyway. */
-      free( debug_ivl );
-#endif
-      remove(source_path);
-      if ( ! getenv("IVERILOG_ICONFIG"))
-	    remove(iconfig_path);
-#ifdef __MINGW32__  /* MinGW just returns the exit status, so return it! */
-      return rc;
-#else
       if (rc != 0) {
 	    if (rc == 127) {
 		  fprintf(stderr, "Failed to execute: %s\n", cmd);
@@ -347,14 +334,13 @@ static int t_default(char*cmd, unsigned ncmd)
       }
 
       return 0;
-#endif
 }
 
 
 static void process_warning_switch(const char*name)
 {
       if (strcmp(name,"all") == 0) {
-	    strcat(warning_flags, "iptu");
+	    strcat(warning_flags, "ipt");
 
       } else if (strcmp(name,"implicit") == 0) {
 	    if (! strchr(warning_flags+2, 'i'))
@@ -365,9 +351,6 @@ static void process_warning_switch(const char*name)
       } else if (strcmp(name,"timescale") == 0) {
 	    if (! strchr(warning_flags+2, 't'))
 		  strcat(warning_flags, "t");
-      } else if (strcmp(name,"unused") == 0) {
-	    if (! strchr(warning_flags+2, 'u'))
-		  strcat(warning_flags, "u");
       } else if (strcmp(name,"no-implicit") == 0) {
 	    char*cp = strchr(warning_flags+2, 'i');
 	    if (cp) while (*cp) {
@@ -386,12 +369,6 @@ static void process_warning_switch(const char*name)
 		  cp[0] = cp[1];
 		  cp += 1;
 	    }
-      } else if (strcmp(name,"no-unused") == 0) {
-	    char*cp = strchr(warning_flags+2, 'u');
-	    if (cp) while (*cp) {
-		  cp[0] = cp[1];
-		  cp += 1;
-	    }
       }
 }
 
@@ -412,32 +389,12 @@ void process_library2_switch(const char *name)
 
 void process_include_dir(const char *name)
 {
-      if (inc_list == 0) {
-	    inc_list = malloc(strlen(" -I")+strlen(name)+1);
-	    strcpy(inc_list, " -I");
-	    strcat(inc_list, name);
-      } else {
-	    inc_list = realloc(inc_list, strlen(inc_list)
-			       + strlen(" -I")
-			       + strlen(name) + 1);
-	    strcat(inc_list, " -I");
-	    strcat(inc_list, name);
-      }
+      fprintf(defines_file, "I:%s\n", name);
 }
 
 void process_define(const char*name)
 {
-      if (def_list == 0) {
-	    def_list = malloc(strlen(" -D")+strlen(name)+1);
-	    strcpy(def_list, " -D");
-	    strcat(def_list, name);
-      } else {
-	    def_list = realloc(def_list, strlen(def_list)
-			       + strlen(" -D")
-			       + strlen(name) + 1);
-	    strcat(def_list, " -D");
-	    strcat(def_list, name);
-      }
+      fprintf(defines_file,"D:%s\n", name);
 }
 
 /*
@@ -446,7 +403,7 @@ void process_define(const char*name)
  * .sft suffix, and if so pass that as a sys_func file. Otherwise, it
  * is a Verilog source file to be written into the file list.
  */
-void process_file_name(const char*name)
+void process_file_name(const char*name, int lib_flag)
 {
       if (strlen(name) > 4 && strcasecmp(".sft", name+strlen(name)-4) == 0) {
 	    fprintf(iconfig_file,"sys_func:%s\n", name);
@@ -454,6 +411,8 @@ void process_file_name(const char*name)
       } else {
 	    fprintf(source_file, "%s\n", name);
 	    source_count += 1;
+	    if (lib_flag)
+		  fprintf(iconfig_file,"library_file:%s\n", name);
       }
 }
 
@@ -465,8 +424,20 @@ int process_generation(const char*name)
       else if (strcmp(name,"2") == 0)
 	    generation = "2";
 
-      else if (strcmp(name,"3.0") == 0)
-	    generation = "3.0";
+      else if (strcmp(name,"2x") == 0)
+	    generation = "2x";
+
+      else if (strcmp(name,"xtypes") == 0)
+	    gen_xtypes = "xtypes";
+
+       else if (strcmp(name,"no-xtypes") == 0)
+	    gen_xtypes = "no-xtypes";
+
+       else if (strcmp(name,"specify") == 0)
+	    gen_specify = "specify";
+
+       else if (strcmp(name,"no-specify") == 0)
+	    gen_specify = "no-specify";
 
       else {
 	    fprintf(stderr, "Unknown/Unsupported Language generation "
@@ -474,7 +445,10 @@ int process_generation(const char*name)
 	    fprintf(stderr, "Supported generations are:\n");
 	    fprintf(stderr, "    1   -- IEEE1364-1995 (Verilog 1)\n"
 		            "    2   -- IEEE1364-2001 (Verilog 2001)\n"
-		            "    3.0 -- SystemVerilog 3.0\n");
+		            "    2x  -- Verilog with extensions\n"
+		            "Other generation flags:\n"
+		            "    specify | no-specify\n"
+		            "    xtypes | no-xtypes\n");
 	    return 1;
       }
 
@@ -482,12 +456,27 @@ int process_generation(const char*name)
 }
 
 /*
- * This function fills in th ivl_root directory with the appropriate
- * path, based on operating system, build time configuration, and
- * environment.
+ * If it exists add the SFT file for the given module.
  */
-static char* get_root_dir()
+void add_sft_file(const char *module)
 {
+      char *file;
+   
+      file = (char *) malloc(strlen(base)+1+strlen(module)+4+1);
+      sprintf(file, "%s%c%s.sft", base, sep, module);
+      if (access(file, R_OK) == 0)
+            fprintf(iconfig_file, "sys_func:%s\n", file);
+      free(file);
+}
+
+int main(int argc, char **argv)
+{
+      char*cmd;
+      unsigned ncmd;
+      int e_flag = 0;
+      int version_flag = 0;
+      int opt, idx, rc;
+
 #ifdef __MINGW32__
       { char * s;
 	char basepath[1024];
@@ -514,56 +503,16 @@ static char* get_root_dir()
 	s = strrchr(ivl_root, sep);
 	if (s) *s = 0;
 	strcat(ivl_root, "\\lib\\ivl");
+
+	base = ivl_root;
       }
+
 #else
-
-      { char*var = 0;
-
-	  /* In other systems, use the configured root. */
-        strcpy(ivl_root, IVL_ROOT);
-
-	  /* In any case, the IVL_ROOT variable can be used to override
-	     the install location at run time. If it is set, use that
-	     value instead. */
-	if ( (var = getenv(IVL_ROOT_VARIABLE)) ) {
-	      strncpy(ivl_root, var, MAXSIZE);
-	      strcat(ivl_root, "/lib/ivl");
-	}
-      }
-#endif
-
-      return ivl_root;
-}
-
-int main(int argc, char **argv)
-{
-      char*cmd;
-      unsigned ncmd;
-      int e_flag = 0;
-      int version_flag = 0;
-      int opt, idx, rc;
-
-      base = get_root_dir();
-
-#ifdef __MINGW32__
-	/* Under Windows, there is no point checking the root
-	   directory. */
-#else
-	/* On other systems, check that the root directory seems
-	   reasonable. */
-      { size_t tmp_len = strlen(base) + 16;
-        char*  tmp = malloc(tmp_len);
-	snprintf(tmp, tmp_len, "%s%civl", base, sep);
-
-	if (0 != access(tmp, F_OK)) {
-	      fprintf(stderr, "%s: INSTALLATION ERROR: Directory %s"
-		      " does not contain ivl files.\n", argv[0], base);
-	      fprintf(stderr, "%s:                   : Check installation"
-		      " or set " IVL_ROOT_VARIABLE " correctly.\n", argv[0]);
-	      return 1;
-	}
-	free(tmp);
-      }
+        /* In a UNIX environment, the IVL_ROOT from the Makefile is
+	   dependable. It points to the $prefix/lib/ivl directory,
+	   where the sub-parts are installed. */
+      strcpy(ivl_root, IVL_ROOT);
+      base = ivl_root;
 #endif
 
 	/* Create a temporary file for communicating input parameters
@@ -576,6 +525,19 @@ int main(int argc, char **argv)
 	    return 1;
       }
 
+      defines_path = strdup(my_tempfile("ivrlg2", &defines_file));
+      if (NULL == defines_file) {
+	    fprintf(stderr, "%s: Error opening temporary file %s\n",
+		    argv[0], defines_path);
+	    fprintf(stderr, "%s: Please check TMP or TMPDIR.\n", argv[0]);
+
+	    fclose(source_file);
+	    remove(source_path);
+	    return 1;
+      }
+
+      fprintf(defines_file, "D:__ICARUS__=1\n");
+
 	/* Create another temporary file for passing configuration
 	   information to ivl. */
 
@@ -596,6 +558,9 @@ int main(int argc, char **argv)
 	    fprintf(stderr, "%s: Please check TMP or TMPDIR.\n", argv[0]);
 	    fclose(source_file);
 	    remove(source_path);
+
+	    fclose(defines_file);
+	    remove(defines_path);
 	    return 1;
       }
 
@@ -614,8 +579,7 @@ int main(int argc, char **argv)
 		  }
 		  break;
  		case 'c':
-		  command_filename = malloc(strlen(optarg)+1);
- 		  strcpy(command_filename, optarg);
+		  add_cmd_file(optarg);
  		  break;
 		case 'D':
 		  process_define(optarg);
@@ -648,6 +612,7 @@ int main(int argc, char **argv)
 
 		case 'm':
 		  fprintf(iconfig_file, "module:%s\n", optarg);
+		  add_sft_file(optarg);
 		  break;
 
 		case 'N':
@@ -705,7 +670,7 @@ int main(int argc, char **argv)
 	    pbase = base;
 
       if (version_flag || verbose_flag) {
-	    printf("Icarus Verilog version " VERSION "\n\n");
+	    printf("Icarus Verilog version " VERSION " ($Name:  $)\n");
 	    printf("Copyright 1998-2003 Stephen Williams\n");
 	    puts(NOTICE);
 
@@ -727,11 +692,13 @@ int main(int argc, char **argv)
 
       if (mtm != 0) fprintf(iconfig_file, "-T:%s\n", mtm);
       fprintf(iconfig_file, "generation:%s\n", generation);
+      fprintf(iconfig_file, "generation:%s\n", gen_specify);
+      fprintf(iconfig_file, "generation:%s\n", gen_xtypes);
       fprintf(iconfig_file, "warnings:%s\n", warning_flags);
       fprintf(iconfig_file, "out:%s\n", opath);
       if (depfile) fprintf(iconfig_file, "depfile:%s\n", depfile);
 
-      if (command_filename) {
+      while ( (command_filename = get_cmd_file()) ) {
 	    int rc;
 
 	    if (( fp = fopen(command_filename, "r")) == NULL ) {
@@ -747,17 +714,25 @@ int main(int argc, char **argv)
 			  command_filename);
 		  return 1;
 	    }
+            free(command_filename);
+      }
+
+      if (depfile) {
+	    fprintf(defines_file, "M:%s\n", depfile);
       }
 
 	/* Finally, process all the remaining words on the command
 	   line as file names. */
       for (idx = optind ;  idx < argc ;  idx += 1)
-	    process_file_name(argv[idx]);
+	    process_file_name(argv[idx], 0);
 
 
       fclose(source_file);
       source_file = 0;
 
+      fclose(defines_file);
+      defines_file = 0;
+
       if (source_count == 0) {
 	    fprintf(stderr, "%s: No input files.\n", argv[0]);
  	    fprintf(stderr, "%s\n", HELP);
@@ -767,33 +742,14 @@ int main(int argc, char **argv)
 
 	/* Start building the preprocess command line. */
 
-      sprintf(tmp, "%s%civlpp %s%s -D__ICARUS__=1 -f%s ", pbase,sep,
+      sprintf(tmp, "%s%civlpp %s%s -F%s -f%s ", pbase,sep,
 	      verbose_flag?" -v":"",
-	      e_flag?"":" -L", source_path);
+	      e_flag?"":" -L", defines_path, source_path);
 
       ncmd = strlen(tmp);
       cmd = malloc(ncmd + 1);
       strcpy(cmd, tmp);
 
-      if (inc_list) {
-	    cmd = realloc(cmd, ncmd + strlen(inc_list) + 1);
-	    strcat(cmd, inc_list);
-	    ncmd += strlen(inc_list);
-      }
-
-      if (def_list) {
-	    cmd = realloc(cmd, ncmd + strlen(def_list) + 1);
-	    strcat(cmd, def_list);
-	    ncmd += strlen(def_list);
-      }
-
-      if (depfile) {
-	    cmd = realloc(cmd, ncmd + strlen(depfile) + 5);
-	    strcat(cmd, " -M ");
-	    strcat(cmd, depfile);
-	    ncmd += strlen(depfile) + 4;
-      }
-
 	/* If the -E flag was given on the command line, then all we
 	   do is run the preprocessor and put the output where the
 	   user wants it. */
@@ -828,13 +784,13 @@ int main(int argc, char **argv)
 	    return 0;
       }
 
+      fprintf(iconfig_file, "iwidth:%u\n", integer_width);
+
 	/* Write the preprocessor command needed to preprocess a
 	   single file. This may be used to preprocess library
 	   files. */
-      fprintf(iconfig_file, "ivlpp:%s%civlpp -D__ICARUS__ -L %s %s\n",
-	      pbase, sep,
-	      inc_list? inc_list : "",
-	      def_list? def_list : "");
+      fprintf(iconfig_file, "ivlpp:%s%civlpp -L -F%s\n",
+	      pbase, sep, defines_path);
 
 	/* Done writing to the iconfig file. Close it now. */
       fclose(iconfig_file);
@@ -846,23 +802,38 @@ int main(int argc, char **argv)
 
 /*
  * $Log: main.c,v $
- * Revision 1.65.2.6  2007/05/30 17:48:26  steve
- *  DEBUG aids. (Alan Feldstein)
+ * Revision 1.76  2007/06/05 01:56:12  steve
+ *  Bring in .SFT file automatically if -m used.
  *
- * Revision 1.65.2.5  2006/07/07 21:31:50  steve
- *  Root dir variable does not include lib/ivl components.
+ * Revision 1.75  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
  *
- * Revision 1.65.2.4  2006/06/27 01:30:20  steve
- *  Fix unused var warning for mingw32 build.
+ * Revision 1.74  2007/04/18 03:23:38  steve
+ *  Add support for multiple command files. (Cary R.)
  *
- * Revision 1.65.2.3  2006/06/14 03:01:49  steve
- *  Remove redundant call to get_root_dir.
+ * Revision 1.73  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
  *
- * Revision 1.65.2.2  2006/06/12 00:16:53  steve
- *  Add support for -Wunused warnings.
+ * Revision 1.72  2006/10/02 18:15:47  steve
+ *  Fix handling of dep path in new argument passing method.
  *
- * Revision 1.65.2.1  2006/03/26 21:47:26  steve
- *  More installation directory flexibility.
+ * Revision 1.71  2006/09/28 04:35:18  steve
+ *  Support selective control of specify and xtypes features.
+ *
+ * Revision 1.70  2006/09/20 22:30:52  steve
+ *  Do not pass -D__ICARUS__ to ivlpp.
+ *
+ * Revision 1.69  2006/07/26 00:11:40  steve
+ *  Pass depfiles through temp defines file.
+ *
+ * Revision 1.68  2006/07/26 00:02:48  steve
+ *  Pass defines and includes through temp file.
+ *
+ * Revision 1.67  2005/07/14 23:38:44  steve
+ *  Display as version 0.9.devel
+ *
+ * Revision 1.66  2005/06/28 04:25:55  steve
+ *  Remove reference to SystemVerilog.
  *
  * Revision 1.65  2004/06/17 14:47:22  steve
  *  Add a .sft file for the system functions.

dup_expr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: dup_expr.cc,v 1.18.2.2 2006/11/02 02:13:15 steve Exp $"
+#ident "$Id: dup_expr.cc,v 1.21 2006/11/04 06:10:13 steve Exp $"
 #endif
 
 # include "config.h"
@@ -29,7 +29,6 @@ NetEBComp* NetEBComp::dup_expr() const
 {
       NetEBComp*result = new NetEBComp(op_, left_->dup_expr(),
 				       right_->dup_expr());
-      result->set_line(*this);
       return result;
 }
 
@@ -68,7 +67,8 @@ NetEScope* NetEScope::dup_expr() const
 
 NetESelect* NetESelect::dup_expr() const
 {
-      return new NetESelect(expr_->dup_expr(), base_->dup_expr(),
+      return new NetESelect(expr_->dup_expr(),
+			    base_? base_->dup_expr() : 0,
 			    expr_width());
 }
 
@@ -88,10 +88,9 @@ NetESFunc* NetESFunc::dup_expr() const
 
 NetESignal* NetESignal::dup_expr() const
 {
-      NetESignal*tmp = new NetESignal(net_, msi_, lsi_);
+      NetESignal*tmp = new NetESignal(net_);
       assert(tmp);
       tmp->expr_width(expr_width());
-      tmp->set_line(*this);
       return tmp;
 }
 
@@ -113,14 +112,9 @@ NetEUFunc* NetEUFunc::dup_expr() const
 	    tmp_parms[idx] = parms_[idx]->dup_expr();
       }
 
-      tmp = 0;
-      if (result_sig_)
-	    tmp = new NetEUFunc(func_, result_sig_->dup_expr(), tmp_parms);
-      if (result_var_)
-	    tmp = new NetEUFunc(func_, result_var_->dup_expr(), tmp_parms);
+      tmp = new NetEUFunc(func_, result_sig_->dup_expr(), tmp_parms);
 
       assert(tmp);
-      tmp->set_line(*this);
       return tmp;
 }
 
@@ -138,19 +132,18 @@ NetEUReduce* NetEUReduce::dup_expr() const
       return tmp;
 }
 
-NetEVariable* NetEVariable::dup_expr() const
-{
-      NetEVariable*tmp = new NetEVariable(var_);
-      return tmp;
-}
-
 /*
  * $Log: dup_expr.cc,v $
- * Revision 1.18.2.2  2006/11/02 02:13:15  steve
- *  Error message for condit expression not synthesized.
+ * Revision 1.21  2006/11/04 06:10:13  steve
+ *  Handle dup of pad as well as normal select.
  *
- * Revision 1.18.2.1  2006/06/12 00:16:50  steve
- *  Add support for -Wunused warnings.
+ * Revision 1.20  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
+ * Revision 1.19  2004/12/11 02:31:25  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
  *
  * Revision 1.18  2004/06/17 16:06:18  steve
  *  Help system function signedness survive elaboration.

elab_anet.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_anet.cc,v 1.10 2004/10/04 01:10:52 steve Exp $"
+#ident "$Id: elab_anet.cc,v 1.13 2007/03/22 16:08:14 steve Exp $"
 #endif
 
 # include "config.h"
@@ -84,15 +84,18 @@ NetNet* PEConcat::elaborate_anet(Design*des, NetScope*scope) const
 	   concat operator from least significant to most significant,
 	   which is opposite from how they are given in the list.
 
-	   Allow for a repeat count other then 1 by repeating the
+	   Allow for a repeat count other than 1 by repeating the
 	   connect loop as many times as necessary. */
 
       NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT_REG, pins);
+	/* Assume that all the data types are the same. */
+      osig->data_type(nets[0]->data_type());
 
       pins = 0;
       for (unsigned idx = nets.count() ;  idx > 0 ;  idx -= 1) {
 	    NetNet*cur = nets[idx-1];
+	    assert(cur->data_type() == osig->data_type());
 	    for (unsigned pin = 0;  pin < cur->pin_count();  pin += 1) {
 		  connect(osig->pin(pins), cur->pin(pin));
 		  pins += 1;
@@ -109,11 +112,10 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
 
       NetNet*       sig = 0;
       NetMemory*    mem = 0;
-      NetVariable*  var = 0;
       const NetExpr*par = 0;
       NetEvent*     eve = 0;
 
-      symbol_search(des, scope, path_, sig, mem, var, par, eve);
+      symbol_search(des, scope, path_, sig, mem, par, eve);
 
 
       if (mem != 0) {
@@ -167,6 +169,15 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_anet.cc,v $
+ * Revision 1.13  2007/03/22 16:08:14  steve
+ *  Spelling fixes from Larry
+ *
+ * Revision 1.12  2006/05/01 20:47:58  steve
+ *  More explicit datatype setup.
+ *
+ * Revision 1.11  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
  * Revision 1.10  2004/10/04 01:10:52  steve
  *  Clean up spurious trailing white space.
  *

elab_lval.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000 Stephen Williams ([email protected])
+ * Copyright (c) 2000-2006 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_lval.cc,v 1.29 2004/10/04 01:10:52 steve Exp $"
+#ident "$Id: elab_lval.cc,v 1.44 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -25,8 +25,9 @@
 # include  "PExpr.h"
 # include  "netlist.h"
 # include  "netmisc.h"
-
+# include  "compiler.h"
 # include  <iostream>
+# include  "ivl_assert.h"
 
 /*
  * These methods generate a NetAssign_ object for the l-value of the
@@ -66,7 +67,9 @@
  * is to try to make a net elaboration, and see if the result is
  * suitable for assignment.
  */
-NetAssign_* PExpr::elaborate_lval(Design*des, NetScope*scope) const
+NetAssign_* PExpr::elaborate_lval(Design*des,
+				  NetScope*scope,
+				  bool is_force) const
 {
       NetNet*ll = 0;
       if (ll == 0) {
@@ -92,7 +95,9 @@ NetAssign_* PExpr::elaborate_lval(Design*des, NetScope*scope) const
  * a is the MSB and b the LSB. Connect the LSB to the low pins of the
  * NetAssign_ object.
  */
-NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
+NetAssign_* PEConcat::elaborate_lval(Design*des,
+				     NetScope*scope,
+				     bool is_force) const
 {
       if (repeat_) {
 	    cerr << get_line() << ": error: Repeat concatenations make "
@@ -112,7 +117,7 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
 		  continue;
 	    }
 
-	    NetAssign_*tmp = parms_[idx]->elaborate_lval(des, scope);
+	    NetAssign_*tmp = parms_[idx]->elaborate_lval(des, scope, is_force);
 
 	      /* If the l-value doesn't elaborate, the error was
 		 already detected and printed. We just skip it and let
@@ -140,41 +145,68 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
  * Handle the ident as an l-value. This includes bit and part selects
  * of that ident.
  */
-NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
+NetAssign_* PEIdent::elaborate_lval(Design*des,
+				    NetScope*scope,
+				    bool is_force) const
 {
       NetNet*       reg = 0;
-      NetMemory*    mem = 0;
-      NetVariable*  var = 0;
       const NetExpr*par = 0;
       NetEvent*     eve = 0;
 
-      symbol_search(des, scope, path_, reg, mem, var, par, eve);
-
-      if (mem) {
-	    return elaborate_mem_lval_(des, scope, mem);
-      }
-
-      if (var) {
-	    NetAssign_*cur = new NetAssign_(var);
-	    return cur;
-      }
-
+      symbol_search(des, scope, path_, reg, par, eve);
       if (reg == 0) {
 	    cerr << get_line() << ": error: Could not find variable ``"
-		 << path_ << "'' in ``" << scope->name() <<
+		 << path_ << "'' in ``" << scope_path(scope) <<
 		  "''" << endl;
 
 	    des->errors += 1;
 	    return 0;
       }
 
-      assert(reg);
+      ivl_assert(*this, reg);
+
+      const name_component_t&name_tail = path_.back();
+
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (!name_tail.index.empty())
+	    use_sel = name_tail.index.back().sel;
+
+	// This is the special case that the l-value is an entire
+	// memory. This is, in fact, an error.
+      if (reg->array_dimensions() > 0 && name_tail.index.empty()) {
+	    cerr << get_line() << ": error: Cannot assign to array "
+		 << path_ << ". Did you forget a word index?" << endl;
+	    des->errors += 1;
+	    return 0;
+      }
+
+      if (reg->array_dimensions() > 0)
+	    return elaborate_lval_net_word_(des, scope, reg);
+
+      if (use_sel == index_component_t::SEL_PART) {
+	    NetAssign_*lv = new NetAssign_(reg);
+	    elaborate_lval_net_part_(des, scope, lv);
+	    return lv;
+      }
+
+      if (use_sel == index_component_t::SEL_IDX_UP) {
+	    NetAssign_*lv = new NetAssign_(reg);
+	    elaborate_lval_net_idx_up_(des, scope, lv);
+	    return lv;
+      }
+
+      if (use_sel == index_component_t::SEL_IDX_DO) {
+	    NetAssign_*lv = new NetAssign_(reg);
+	    elaborate_lval_net_idx_do_(des, scope, lv);
+	    return lv;
+      }
 
 	/* Get the signal referenced by the identifier, and make sure
-	   it is a register. (Wires are not allows in this context. */
-      if (reg->type() != NetNet::REG) {
+	   it is a register. Wires are not allows in this context,
+	   unless this is the l-value of a force. */
+      if ((reg->type() != NetNet::REG) && !is_force) {
 	    cerr << get_line() << ": error: " << path_ <<
-		  " is not a reg/integer/time in " << scope->name() <<
+		  " is not a valid l-value in " << scope_path(scope) <<
 		  "." << endl;
 	    cerr << reg->get_line() << ":      : " << path_ <<
 		  " is declared here as " << reg->type() << "." << endl;
@@ -185,57 +217,29 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
       long msb, lsb;
       NetExpr*mux;
 
-      if (msb_ && lsb_) {
-	      /* This handles part selects. In this case, there are
-		 two bit select expressions, and both must be
-		 constant. Evaluate them and pass the results back to
-		 the caller. */
-	    verinum*vl = lsb_->eval_const(des, scope);
-	    if (vl == 0) {
-		  cerr << lsb_->get_line() << ": error: "
-			"Part select expressions must be constant."
-		       << endl;
-		  cerr << lsb_->get_line() << ":      : This lsb expression "
-			"violates the rule: " << *lsb_ << endl;
-		  des->errors += 1;
-		  return 0;
-	    }
-	    verinum*vm = msb_->eval_const(des, scope);
-	    if (vm == 0) {
-		  cerr << msb_->get_line() << ": error: "
-			"Part select expressions must be constant."
-		       << endl;
-		  cerr << msb_->get_line() << ":      : This msb expression "
-			"violates the rule: " << *msb_ << endl;
-		  des->errors += 1;
-		  return 0;
-	    }
+      if (use_sel == index_component_t::SEL_BIT) {
 
-	    msb = vm->as_long();
-	    lsb = vl->as_long();
-	    mux = 0;
-
-      } else if (msb_) {
+	    const index_component_t&index_tail = name_tail.index.back();
+	    ivl_assert(*this, index_tail.msb != 0);
+	    ivl_assert(*this, index_tail.lsb == 0);
 
 	      /* If there is only a single select expression, it is a
 		 bit select. Evaluate the constant value and treat it
 		 as a part select with a bit width of 1. If the
 		 expression it not constant, then return the
 		 expression as a mux. */
-	    assert(lsb_ == 0);
-	    verinum*v = msb_->eval_const(des, scope);
-	    if (v == 0) {
-		  NetExpr*m = msb_->elaborate_expr(des, scope);
-		  assert(m);
-		  msb = 0;
-		  lsb = 0;
-		  mux = m;
+
+	    NetExpr*index_expr = elab_and_eval(des, scope, index_tail.msb, -1);
+
+	    if (NetEConst*index_con = dynamic_cast<NetEConst*> (index_expr)) {
+		  msb = index_con->value().as_long();
+		  lsb = index_con->value().as_long();
+		  mux = 0;
 
 	    } else {
-
-		  msb = v->as_long();
-		  lsb = v->as_long();
-		  mux = 0;
+		  msb = 0;
+		  lsb = 0;
+		  mux = index_expr;
 	    }
 
       } else {
@@ -243,8 +247,6 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 	      /* No select expressions, so presume a part select the
 		 width of the register. */
 
-	    assert(msb_ == 0);
-	    assert(lsb_ == 0);
 	    msb = reg->msb();
 	    lsb = reg->lsb();
 	    mux = 0;
@@ -259,7 +261,19 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 		 bmux to select the target bit. */
 	    lv = new NetAssign_(reg);
 
-	    lv->set_bmux(mux);
+	      /* Correct the mux for the range of the vector. */
+	    if (reg->msb() < reg->lsb())
+		  mux = make_sub_expr(reg->lsb(), mux);
+	    else if (reg->lsb() != 0)
+		  mux = make_add_expr(mux, - reg->lsb());
+
+	    lv->set_part(mux, 1);
+
+      } else if (msb == reg->msb() && lsb == reg->lsb()) {
+
+	      /* No bit select, and part select covers the entire
+		 vector. Simplest case. */
+	    lv = new NetAssign_(reg);
 
       } else {
 
@@ -283,7 +297,7 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 		 converted to normalized form so is relative the
 		 variable pins. */
 
-	    if ((wid + loff) > reg->pin_count()) {
+	    if ((wid + loff) > reg->vector_width()) {
 		  cerr << get_line() << ": error: bit/part select "
 		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
 		       << " is out of range." << endl;
@@ -292,57 +306,191 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 	    }
 
 	    lv = new NetAssign_(reg);
-	    lv->set_part(loff, wid);
-
-	    assert(moff < reg->pin_count());
+	    lv->set_part(new NetEConst(verinum(loff)), wid);
       }
 
 
       return lv;
 }
 
-NetAssign_* PEIdent::elaborate_mem_lval_(Design*des, NetScope*scope,
-					NetMemory*mem) const
+NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
+					      NetScope*scope,
+					      NetNet*reg) const
 {
-      if (msb_ == 0) {
-	    cerr << get_line() << ": error: Assign to memory \""
-		 << mem->name() << "\" requires a word select index."
-		 << endl;
-	    des->errors += 1;
-	    return 0;
-      }
+      const name_component_t&name_tail = path_.back();
+      ivl_assert(*this, !name_tail.index.empty());
 
-      if (msb_ && lsb_) {
-	    cerr << get_line() << ": error: Cannot use part select on "
-		 << "memory \"" << mem->name() << ".\"" << endl;
-	    des->errors += 1;
-	    return 0;
-      }
+      const index_component_t&index_head = name_tail.index.front();
+      ivl_assert(*this, index_head.sel == index_component_t::SEL_BIT);
+      ivl_assert(*this, index_head.msb != 0);
+      ivl_assert(*this, index_head.lsb == 0);
 
-      assert(msb_ && !lsb_);
+      NetExpr*word = elab_and_eval(des, scope, index_head.msb, -1);
 
-      NetExpr*ix = msb_->elaborate_expr(des, scope);
-      if (ix == 0)
-	    return 0;
+	// If there is a non-zero base to the memory, then build an
+	// expression to calculate the canonical address.
+      if (long base = reg->array_first()) {
 
-	/* Evaluate the memory index expression down as must as
-	   possible. Ideally, we can get it down to a constant. */
-      if (! dynamic_cast<NetEConst*>(ix)) {
-	    NetExpr*tmp = ix->eval_tree();
-	    if (tmp) {
-		  tmp->set_line(*ix);
-		  delete ix;
-		  ix = tmp;
+	    word = make_add_expr(word, 0-base);
+	    if (NetExpr*tmp = word->eval_tree()) {
+		  word = tmp;
 	    }
       }
 
-      NetAssign_*lv = new NetAssign_(mem);
-      lv->set_bmux(ix);
-      lv->set_part(0, mem->width());
+      NetAssign_*lv = new NetAssign_(reg);
+      lv->set_word(word);
+
+      if (debug_elaborate)
+	    cerr << get_line() << ": debug: Set array word=" << *word << endl;
+
+	// Test for the case that the index is a constant, and is out
+	// of bounds. The "word" expression is the word index already
+	// converted to canonical address, so this just needs to check
+	// that the address is not too big.
+      if (NetEConst*word_const = dynamic_cast<NetEConst*>(word)) {
+	    verinum word_val = word_const->value();
+	    long index = word_val.as_long();
+	    if (index < 0 || index >= reg->array_count()) {
+		  cerr << get_line() << ": warning: Constant array index "
+		       << (index + reg->array_first())
+		       << " is out of range for array "
+		       << reg->name() << "." << endl;
+	    }
+      }
+
+	/* An array word may also have part selects applied to them. */
+
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (name_tail.index.size() > 1)
+	    use_sel = name_tail.index.back().sel;
+
+      if (use_sel == index_component_t::SEL_PART)
+	    elaborate_lval_net_part_(des, scope, lv);
+
+      if (use_sel == index_component_t::SEL_IDX_UP)
+	    elaborate_lval_net_idx_up_(des, scope, lv);
+
+      if (use_sel == index_component_t::SEL_IDX_DO)
+	    elaborate_lval_net_idx_do_(des, scope, lv);
+
       return lv;
 }
 
-NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
+bool PEIdent::elaborate_lval_net_part_(Design*des,
+				       NetScope*scope,
+				       NetAssign_*lv) const
+{
+      long msb, lsb;
+      bool flag = calculate_parts_(des, scope, msb, lsb);
+      if (!flag)
+	    return false;
+
+      NetNet*reg = lv->sig();
+      assert(reg);
+
+      if (msb == reg->msb() && lsb == reg->lsb()) {
+
+	      /* No bit select, and part select covers the entire
+		 vector. Simplest case. */
+
+      } else {
+
+	      /* If the bit/part select is constant, then make the
+		 NetAssign_ only as wide as it needs to be and connect
+		 only to the selected bits of the reg. */
+	    unsigned loff = reg->sb_to_idx(lsb);
+	    unsigned moff = reg->sb_to_idx(msb);
+	    unsigned wid = moff - loff + 1;
+
+	    if (moff < loff) {
+		  cerr << get_line() << ": error: part select "
+		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
+		       << " is reversed." << endl;
+		  des->errors += 1;
+		  return false;
+	    }
+
+	      /* If the part select extends beyond the extreme of the
+		 variable, then report an error. Note that loff is
+		 converted to normalized form so is relative the
+		 variable pins. */
+
+	    if ((wid + loff) > reg->vector_width()) {
+		  cerr << get_line() << ": error: bit/part select "
+		       << reg->name() << "[" << msb<<":"<<lsb<<"]"
+		       << " is out of range." << endl;
+		  des->errors += 1;
+		  return false;
+	    }
+
+	    lv->set_part(new NetEConst(verinum(loff)), wid);
+      }
+
+      return true;
+}
+
+bool PEIdent::elaborate_lval_net_idx_up_(Design*des,
+					 NetScope*scope,
+					 NetAssign_*lv) const
+{
+      const name_component_t&name_tail = path_.back();;
+      ivl_assert(*this, !name_tail.index.empty());
+
+      const index_component_t&index_tail = name_tail.index.back();
+      ivl_assert(*this, index_tail.msb != 0);
+      ivl_assert(*this, index_tail.lsb != 0);
+
+      NetNet*reg = lv->sig();
+      assert(reg);
+
+      if (reg->type() != NetNet::REG) {
+	    cerr << get_line() << ": error: " << path_ <<
+		  " is not a reg/integer/time in " << scope_path(scope) <<
+		  "." << endl;
+	    cerr << reg->get_line() << ":      : " << path_ <<
+		  " is declared here as " << reg->type() << "." << endl;
+	    des->errors += 1;
+	    return false;
+      }
+
+      unsigned long wid;
+      calculate_up_do_width_(des, scope, wid);
+
+      NetExpr*base = elab_and_eval(des, scope, index_tail.msb, -1);
+
+	/* Correct the mux for the range of the vector. */
+      if (reg->msb() < reg->lsb())
+	    base = make_sub_expr(reg->lsb(), base);
+      else if (reg->lsb() != 0)
+	    base = make_add_expr(base, - reg->lsb());
+
+      if (debug_elaborate)
+	    cerr << get_line() << ": debug: Set part select width="
+		 << wid << ", base=" << *base << endl;
+
+      lv->set_part(base, wid);
+
+      return true;
+}
+
+bool PEIdent::elaborate_lval_net_idx_do_(Design*des,
+					 NetScope*scope,
+					 NetAssign_*lv) const
+{
+      const name_component_t&name_tail = path_.back();;
+      ivl_assert(*this, !name_tail.index.empty());
+
+      const index_component_t&index_tail = name_tail.index.back();
+      ivl_assert(*this, index_tail.msb != 0);
+      ivl_assert(*this, index_tail.lsb != 0);
+
+      cerr << get_line() << ": internal error: don't know how to "
+	    "deal with SEL_IDX_DO in lval?" << endl;
+      des->errors += 1;
+      return false;
+}
+
+NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*, bool) const
 {
       cerr << get_line() << ": error: Constant values not allowed "
 	   << "in l-value expressions." << endl;
@@ -352,6 +500,66 @@ NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
 
 /*
  * $Log: elab_lval.cc,v $
+ * Revision 1.44  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.43  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.42  2007/03/14 05:06:49  steve
+ *  Replace some asserts with ivl_asserts.
+ *
+ * Revision 1.41  2007/03/05 05:59:10  steve
+ *  Handle processes within generate loops.
+ *
+ * Revision 1.40  2007/02/27 05:14:38  steve
+ *  Detect and warn about lval array index out fo bounds.
+ *
+ * Revision 1.39  2007/02/01 05:25:26  steve
+ *  Error message better reflects more general reality.
+ *
+ * Revision 1.38  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.37  2006/11/04 06:19:25  steve
+ *  Remove last bits of relax_width methods, and use test_width
+ *  to calculate the width of an r-value expression that may
+ *  contain unsized numbers.
+ *
+ * Revision 1.36  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.35  2006/04/16 00:54:04  steve
+ *  Cleanup lval part select handling.
+ *
+ * Revision 1.34  2006/04/16 00:15:43  steve
+ *  Fix part selects in l-values.
+ *
+ * Revision 1.33  2006/02/02 02:43:57  steve
+ *  Allow part selects of memory words in l-values.
+ *
+ * Revision 1.32  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
+ * Revision 1.31  2004/12/29 23:55:43  steve
+ *  Unify elaboration of l-values for all proceedural assignments,
+ *  including assing, cassign and force.
+ *
+ *  Generate NetConcat devices for gate outputs that feed into a
+ *  vector results. Use this to hande gate arrays. Also let gate
+ *  arrays handle vectors of gates when the outputs allow for it.
+ *
+ * Revision 1.30  2004/12/11 02:31:25  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
+ *
  * Revision 1.29  2004/10/04 01:10:52  steve
  *  Clean up spurious trailing white space.
  *
@@ -360,95 +568,5 @@ NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
  *
  * Revision 1.27  2003/09/19 03:30:05  steve
  *  Fix name search in elab_lval.
- *
- * Revision 1.26  2003/01/27 05:09:17  steve
- *  Spelling fixes.
- *
- * Revision 1.25  2003/01/26 21:15:58  steve
- *  Rework expression parsing and elaboration to
- *  accommodate real/realtime values and expressions.
- *
- * Revision 1.24  2003/01/19 00:35:39  steve
- *  Detect null arguments to concatenation operator.
- *
- * Revision 1.23  2002/11/21 23:27:51  steve
- *  Precalculate indices to l-value arrays.
- *
- * Revision 1.22  2002/11/21 18:15:40  steve
- *  Fix const test of msb in assignment l-values.
- *
- * Revision 1.21  2002/11/02 01:10:49  steve
- *  Detect memories without work index in l-value.
- *
- * Revision 1.20  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.19  2002/06/04 05:38:44  steve
- *  Add support for memory words in l-value of
- *  blocking assignments, and remove the special
- *  NetAssignMem class.
- *
- * Revision 1.18  2002/03/09 04:02:26  steve
- *  Constant expressions are not l-values for task ports.
- *
- * Revision 1.17  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.16  2001/11/08 05:15:50  steve
- *  Remove string paths from PExpr elaboration.
- *
- * Revision 1.15  2001/11/07 04:01:59  steve
- *  eval_const uses scope instead of a string path.
- *
- * Revision 1.14  2001/08/25 23:50:02  steve
- *  Change the NetAssign_ class to refer to the signal
- *  instead of link into the netlist. This is faster
- *  and uses less space. Make the NetAssignNB carry
- *  the delays instead of the NetAssign_ lval objects.
- *
- *  Change the vvp code generator to support multiple
- *  l-values, i.e. concatenations of part selects.
- *
- * Revision 1.13  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.12  2001/02/09 03:16:48  steve
- *  Report bit/part select out of range errors. (PR#133)
- *
- * Revision 1.11  2001/01/10 03:13:23  steve
- *  Build task outputs as lval instead of nets. (PR#98)
- *
- * Revision 1.10  2001/01/06 06:31:58  steve
- *  declaration initialization for time variables.
- *
- * Revision 1.9  2001/01/06 02:29:36  steve
- *  Support arrays of integers.
- *
- * Revision 1.8  2000/12/12 06:14:51  steve
- *  sorry for concatenated memories in l-values. (PR#76)
- *
- * Revision 1.7  2000/12/01 02:55:37  steve
- *  Detect part select errors on l-values.
- *
- * Revision 1.6  2000/10/31 17:49:02  steve
- *  Support time variables.
- *
- * Revision 1.5  2000/10/26 17:09:46  steve
- *  Fix handling of errors in behavioral lvalues. (PR#28)
- *
- * Revision 1.4  2000/09/10 15:43:59  steve
- *  Some error checking.
- *
- * Revision 1.3  2000/09/10 03:59:59  steve
- *  Agressively merge NetAssign_ within concatenations.
- *
- * Revision 1.2  2000/09/10 02:18:16  steve
- *  elaborate complex l-values
- *
- * Revision 1.1  2000/09/09 15:21:26  steve
- *  move lval elaboration to PExpr virtual methods.
- *
  */
 

elab_pexpr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_pexpr.cc,v 1.21 2004/02/20 06:22:56 steve Exp $"
+#ident "$Id: elab_pexpr.cc,v 1.28 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -25,6 +25,7 @@
 # include  "PExpr.h"
 # include  "compiler.h"
 # include  "util.h"
+# include  "netmisc.h"
 
 # include  <iostream>
 
@@ -53,7 +54,7 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
 	    return 0;
       }
 
-      NetExpr*tmp = elaborate_expr_base_(des, lp, rp);
+      NetEBinary*tmp = elaborate_expr_base_(des, lp, rp, -1);
       return tmp;
 }
 
@@ -119,7 +120,7 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
 
 NetExpr*PEFNumber::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      return elaborate_expr(des, scope);
+      return elaborate_expr(des, scope, -1, false);
 }
 
 /*
@@ -130,42 +131,53 @@ NetExpr*PEFNumber::elaborate_pexpr(Design*des, NetScope*scope) const
  */
 NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      hname_t path = path_;
-      char*name = path.remove_tail_name();
+      pform_name_t path = path_;
+      name_component_t name_tail = path_.back();
+      path.pop_back();
 
       NetScope*pscope = scope;
-      if (path.peek_name(0))
-	    pscope = des->find_scope(scope, path);
+      if (path_.size() > 0) {
+	    list<hname_t> tmp = eval_scope_path(des, scope, path);
+	    pscope = des->find_scope(scope, tmp);
+      }
 
-      perm_string perm_name = lex_strings.make(name);
-      delete name;
-
-      const NetExpr*ex = pscope->get_parameter(perm_name);
+      const NetExpr*ex_msb;
+      const NetExpr*ex_lsb;
+      const NetExpr*ex = pscope->get_parameter(name_tail.name, ex_msb, ex_lsb);
       if (ex == 0) {
-	    cerr << get_line() << ": error: identifier ``" << path_ <<
-		  "'' is not a parameter in " << scope->name() << "." << endl;
+	    cerr << get_line() << ": error: identifier ``" << name_tail.name <<
+		  "'' is not a parameter in "<< scope_path(scope)<< "." << endl;
 	    des->errors += 1;
 	    return 0;
       }
 
-      NetExpr*res = new NetEParam(des, pscope, perm_name);
+      NetExpr*res = new NetEParam(des, pscope, name_tail.name);
       res->set_line(*this);
       assert(res);
 
-      assert(idx_ == 0);
-      if (msb_ && lsb_) {
+      index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
+      if (!name_tail.index.empty())
+	    use_sel = name_tail.index.back().sel;
+
+      switch (use_sel) {
+	  case index_component_t::SEL_NONE:
+	    break;
+	  default:
+	  case index_component_t::SEL_PART:
 	    cerr << get_line() << ": sorry: Cannot part select "
 		  "bits of parameters." << endl;
 	    des->errors += 1;
+	    break;
 
-      } else if (msb_) {
+	  case index_component_t::SEL_BIT:
 
 	      /* We have here a bit select. Insert a NetESelect node
 		 to handle it. */
-	    NetExpr*tmp = msb_->elaborate_pexpr(des, scope);
+	    NetExpr*tmp = name_tail.index.back().msb->elaborate_pexpr(des, scope);
 	    if (tmp != 0) {
 		  res = new NetESelect(res, tmp, 1);
 	    }
+	    break;
       }
 
       return res;
@@ -176,13 +188,13 @@ NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
  */
 NetExpr*PENumber::elaborate_pexpr(Design*des, NetScope*sc) const
 {
-      return elaborate_expr(des, sc);
+      return elaborate_expr(des, sc, -1, false);
 }
 
 
 NetEConst* PEString::elaborate_pexpr(Design*des, NetScope*scope) const
 {
-      return elaborate_expr(des, scope);
+      return elaborate_expr(des, scope, -1, false);
 }
 
 NetETernary* PETernary::elaborate_pexpr(Design*des, NetScope*scope) const
@@ -231,6 +243,32 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_pexpr.cc,v $
+ * Revision 1.28  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.27  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.26  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.25  2006/11/04 06:19:25  steve
+ *  Remove last bits of relax_width methods, and use test_width
+ *  to calculate the width of an r-value expression that may
+ *  contain unsized numbers.
+ *
+ * Revision 1.24  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.23  2006/02/02 02:43:58  steve
+ *  Allow part selects of memory words in l-values.
+ *
+ * Revision 1.22  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
  * Revision 1.21  2004/02/20 06:22:56  steve
  *  parameter keys are per_strings.
  *

elab_scope.cc

@@ -17,14 +17,14 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_scope.cc,v 1.35 2004/09/10 00:15:17 steve Exp $"
+#ident "$Id: elab_scope.cc,v 1.46 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include  "config.h"
 # include  "compiler.h"
+# include  "netmisc.h"
 # include  <iostream>
 # include  <stdio.h>
-# include  <cstring>
 
 /*
  * Elaboration happens in two passes, generally. The first scans the
@@ -34,10 +34,10 @@
  */
 
 # include  "Module.h"
-# include  "PData.h"
 # include  "PEvent.h"
 # include  "PExpr.h"
 # include  "PGate.h"
+# include  "PGenerate.h"
 # include  "PTask.h"
 # include  "PWire.h"
 # include  "Statement.h"
@@ -46,11 +46,12 @@
 # include  <typeinfo>
 # include  <assert.h>
 
-bool Module::elaborate_scope(Design*des, NetScope*scope) const
+bool Module::elaborate_scope(Design*des, NetScope*scope,
+			     const replace_t&replacements) const
 {
       if (debug_scopes) {
 	    cerr << get_line() << ": debug: Elaborate scope "
-		 << scope->name() << "." << endl;
+		 << scope_path(scope) << "." << endl;
       }
 
 	// Generate all the parameters that this instance of this
@@ -65,7 +66,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// place of the elaborated expression.
 
       typedef map<perm_string,param_expr_t>::const_iterator mparm_it_t;
-      typedef map<hname_t,PExpr*>::const_iterator hparm_it_t;
+      typedef map<pform_name_t,PExpr*>::const_iterator pform_parm_it_t;
 
 
 	// This loop scans the parameters in the module, and creates
@@ -76,8 +77,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 
 	    NetEParam*tmp = new NetEParam;
 	    tmp->set_line(*((*cur).second.expr));
-	    if ((*cur).second.msb)
-		  tmp->cast_signed( (*cur).second.signed_flag );
+	    tmp->cast_signed( (*cur).second.signed_flag );
 
 	    scope->set_parameter((*cur).first, tmp, 0, 0, false);
       }
@@ -108,7 +108,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	    NetExpr*val = ex->elaborate_pexpr(des, scope);
 	    NetExpr*msb = 0;
 	    NetExpr*lsb = 0;
-	    bool signed_flag = false;
+	    bool signed_flag = (*cur).second.signed_flag;
 
 	      /* If the parameter declaration includes msb and lsb,
 		 then use them to calculate a width for the
@@ -119,16 +119,47 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 		  msb = (*cur).second.msb ->elaborate_pexpr(des, scope);
 		  assert(msb);
 		  lsb = (*cur).second.lsb ->elaborate_pexpr(des, scope);
-		  signed_flag = (*cur).second.signed_flag;
 	    }
 
-	    val->cast_signed(signed_flag);
+	    if (signed_flag) {
+		    /* If explicitly signed, then say so. */
+		  val->cast_signed(true);
+	    } else if ((*cur).second.msb) {
+		    /* If there is a range, then the signedness comes
+		       from the type and not the expression. */
+		  val->cast_signed(signed_flag);
+	    } else {
+		    /* otherwise, let the expression describe
+		       itself. */
+		  signed_flag = val->has_sign();
+	    }
+
 	    val = scope->set_parameter((*cur).first, val,
 				       msb, lsb, signed_flag);
 	    assert(val);
 	    delete val;
       }
 
+	/* run parameter replacements that were collected from the
+	   containing scope and meant for me. */
+      for (replace_t::const_iterator cur = replacements.begin()
+		 ; cur != replacements.end() ;  cur ++) {
+
+	    NetExpr*val = (*cur).second;
+	    if (debug_scopes) {
+		  cerr << get_line() << ": debug: "
+		       << "Replace " << (*cur).first
+		       << " with expression " << *val
+		       << " from " << val->get_line() << "." << endl;
+	    }
+	    bool flag = scope->replace_parameter((*cur).first, val);
+	    if (! flag) {
+		  cerr << val->get_line() << ": warning: parameter "
+		       << (*cur).first << " not found in "
+		       << scope_path(scope) << "." << endl;
+	    }
+      }
+
       for (mparm_it_t cur = localparams.begin()
 		 ; cur != localparams.end() ;  cur ++) {
 
@@ -169,7 +200,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// here because the parameter receiving the assignment may be
 	// in a scope not discovered by this pass.
 
-      for (hparm_it_t cur = defparms.begin()
+      for (pform_parm_it_t cur = defparms.begin()
 		 ; cur != defparms.end() ;  cur ++ ) {
 
 	    PExpr*ex = (*cur).second;
@@ -190,6 +221,17 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 
       delete[]attr;
 
+	// Generate schemes can create new scopes in the form of
+	// generated code. Scan the generate schemes, and *generate*
+	// new scopes, which is slightly different from simple
+	// elaboration.
+
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur ++ ) {
+	    (*cur) -> generate_scope(des, scope);
+      }
+
 
 	// Tasks introduce new scopes, so scan the tasks in this
 	// module. Create a scope for the task and pass that to the
@@ -201,7 +243,8 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       for (tasks_it_t cur = tasks_.begin()
 		 ; cur != tasks_.end() ;  cur ++ ) {
 
-	    NetScope*task_scope = new NetScope(scope, (*cur).first,
+	    hname_t use_name( (*cur).first );
+	    NetScope*task_scope = new NetScope(scope, use_name,
 					       NetScope::TASK);
 	    (*cur).second->elaborate_scope(des, task_scope);
       }
@@ -216,7 +259,8 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       for (funcs_it_t cur = funcs_.begin()
 		 ; cur != funcs_.end() ;  cur ++ ) {
 
-	    NetScope*func_scope = new NetScope(scope, (*cur).first,
+	    hname_t use_name( (*cur).first );
+	    NetScope*func_scope = new NetScope(scope, use_name,
 					       NetScope::FUNC);
 	    (*cur).second->elaborate_scope(des, func_scope);
       }
@@ -246,7 +290,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
       }
 
 	// Scan through all the named events in this scope. We do not
-	// need anything more then the current scope to do this
+	// need anything more than the current scope to do this
 	// elaboration, so do it now. This allows for normal
 	// elaboration to reference these events.
 
@@ -256,13 +300,117 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	    (*et).second->elaborate_scope(des, scope);
       }
 
-      for (map<hname_t,PData*>::const_iterator cur = datum.begin()
-		 ; cur != datum.end() ;  cur ++ ) {
+      return des->errors == 0;
+}
 
-	    (*cur).second->elaborate_scope(des, scope);
+bool PGenerate::generate_scope(Design*des, NetScope*container)
+{
+      switch (scheme_type) {
+	  case GS_LOOP:
+	    return generate_scope_loop_(des, container);
+
+	  default:
+	    cerr << get_line() << ": sorry: Generate of this sort"
+		 << " is not supported yet!" << endl;
+	    return false;
+      }
+}
+
+/*
+ * This is the elaborate scope method for a generate loop.
+ */
+bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
+{
+	// We're going to need a genvar...
+      int genvar;
+
+	// The initial value for the genvar does not need (nor can it
+	// use) the genvar itself, so we can evaluate this expression
+	// the same way any other paramter value is evaluated.
+      NetExpr*init_ex = elab_and_eval(des, container, loop_init, -1);
+      NetEConst*init = dynamic_cast<NetEConst*> (init_ex);
+      if (init == 0) {
+	    cerr << get_line() << ": error: Cannot evaluate genvar"
+		 << " init expression: " << *loop_init << endl;
+	    des->errors += 1;
+	    return false;
       }
 
-      return des->errors == 0;
+      genvar = init->value().as_long();
+      delete init_ex;
+
+      if (debug_elaborate)
+	    cerr << get_line() << ": debug: genvar init = " << genvar << endl;
+
+      container->genvar_tmp = loop_index;
+      container->genvar_tmp_val = 0;
+      NetExpr*test_ex = elab_and_eval(des, container, loop_test, -1);
+      NetEConst*test = dynamic_cast<NetEConst*>(test_ex);
+      assert(test);
+      while (test->value().as_long()) {
+
+	      // The actual name of the scope includes the genvar so
+	      // that each instance has a unique name in the
+	      // container. The format of using [] is part of the
+	      // Verilog standard.
+	    hname_t use_name (scope_name, genvar);
+	    if (debug_elaborate)
+		  cerr << get_line() << ": debug: "
+		       << "Create generated scope " << use_name << endl;
+
+	    NetScope*scope = new NetScope(container, use_name,
+					  NetScope::GENBLOCK);
+
+	      // Set in the scope a localparam for the value of the
+	      // genvar within this instance of the generate
+	      // block. Code within this scope thus has access to the
+	      // genvar as a constant.
+	    {
+		  verinum genvar_verinum(genvar);
+		  genvar_verinum.has_sign(true);
+		  NetEConstParam*gp = new NetEConstParam(scope,
+							 loop_index,
+							 genvar_verinum);
+		  scope->set_localparam(loop_index, gp);
+
+		  if (debug_elaborate)
+			cerr << get_line() << ": debug: "
+			     << "Create implicit localparam "
+			     << loop_index << " = " << genvar_verinum << endl;
+	    }
+
+	      // Scan the generated scope for gates that may create
+	      // their own scopes.
+	    typedef list<PGate*>::const_iterator pgate_list_it_t;
+	    for (pgate_list_it_t cur = gates.begin()
+		       ; cur != gates.end() ;  cur ++) {
+		  (*cur) ->elaborate_scope(des, scope);
+	    }
+
+	    scope_list_.push_back(scope);
+
+	      // Calculate the step for the loop variable.
+	    NetExpr*step_ex = elab_and_eval(des, container, loop_step, -1);
+	    NetEConst*step = dynamic_cast<NetEConst*>(step_ex);
+	    assert(step);
+	    if (debug_elaborate)
+		  cerr << get_line() << ": debug: genvar step from "
+		       << genvar << " to " << step->value().as_long() << endl;
+
+	    genvar = step->value().as_long();
+	    container->genvar_tmp_val = genvar;
+	    delete step;
+	    delete test_ex;
+	    test_ex = elab_and_eval(des, container, loop_test, -1);
+	    test = dynamic_cast<NetEConst*>(test_ex);
+	    assert(test);
+      }
+
+	// Clear the genvar_tmp field in the scope to reflect that the
+	// genvar is no longer value for evaluating expressions.
+      container->genvar_tmp = perm_string();
+
+      return true;
 }
 
 void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
@@ -281,7 +429,7 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	// about to create, and if I find it then somebody beat me to
 	// it.
 
-      if (sc->child(get_name())) {
+      if (sc->child(hname_t(get_name()))) {
 	    cerr << get_line() << ": error: Instance/Scope name " <<
 		  get_name() << " already used in this context." <<
 		  endl;
@@ -304,15 +452,17 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 		 << "module " << mod->mod_name() << " within itself." << endl;
 
 	    cerr << get_line() << ":      : The offending instance is "
-		 << sc->name() << "." << get_name() << " within "
-		 << scn->name() << "." << endl;
+		 << scope_path(sc) << "." << get_name() << " within "
+		 << scope_path(scn) << "." << endl;
 
 	    des->errors += 1;
 	    return;
       }
 
-      verinum*msb = msb_ ? msb_->eval_const(des, sc) : 0;
-      verinum*lsb = lsb_ ? lsb_->eval_const(des, sc) : 0;
+      NetExpr*mse = msb_ ? elab_and_eval(des, sc, msb_, -1) : 0;
+      NetExpr*lse = lsb_ ? elab_and_eval(des, sc, lsb_, -1) : 0;
+      NetEConst*msb = dynamic_cast<NetEConst*> (mse);
+      NetEConst*lsb = dynamic_cast<NetEConst*> (lse);
 
       assert( (msb == 0) || (lsb != 0) );
 
@@ -323,12 +473,15 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 
       if (msb) {
 	    instance_array = true;
-	    instance_high = msb->as_long();
-	    instance_low  = lsb->as_long();
+	    instance_high = msb->value().as_long();
+	    instance_low  = lsb->value().as_long();
 	    if (instance_high > instance_low)
 		  instance_count = instance_high - instance_low + 1;
 	    else
 		  instance_count = instance_low - instance_high + 1;
+
+	    delete mse;
+	    delete lse;
       }
 
       NetScope::scope_vec_t instances (instance_count);
@@ -343,24 +496,21 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	// instantiation line.
       for (int idx = 0 ;  idx < instance_count ;  idx += 1) {
 
-	    perm_string use_name = get_name();
+	    hname_t use_name (get_name());
 
 	    if (instance_array) {
-		  char name_buf[128];
 		  int instance_idx = idx;
 		  if (instance_low < instance_high)
 			instance_idx = instance_low + idx;
 		  else
 			instance_idx = instance_low - idx;
 
-		  snprintf(name_buf, sizeof name_buf,
-			   "%s[%d]", get_name().str(), instance_idx);
-		  use_name = lex_strings.make(name_buf);
+		  use_name = hname_t(get_name(), instance_idx);
 	    }
 
 	    if (debug_scopes) {
 		  cerr << get_line() << ": debug: Module instance " << use_name
-		       << " becomes child of " << sc->name()
+		       << " becomes child of " << scope_path(sc)
 		       << "." << endl;
 	    }
 
@@ -376,13 +526,6 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	    my_scope->time_precision(mod->time_precision);
 	    des->set_precision(mod->time_precision);
 
-	      // This call actually arranges for the description of the
-	      // module type to process this instance and handle parameters
-	      // and sub-scopes that might occur. Parameters are also
-	      // created in that scope, as they exist. (I'll override them
-	      // later.)
-	    mod->elaborate_scope(des, my_scope);
-
 	      // Look for module parameter replacements. The "replace" map
 	      // maps parameter name to replacement expression that is
 	      // passed. It is built up by the ordered overrides or named
@@ -425,6 +568,8 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	    }
 
 
+	    Module::replace_t replace_net;
+
 	      // And here we scan the replacements we collected. Elaborate
 	      // the expression in my context, then replace the sub-scope
 	      // parameter value with the new expression.
@@ -433,57 +578,25 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 		       ; cur != replace.end() ;  cur ++ ) {
 
 		  PExpr*tmp = (*cur).second;
-		    // No expression means that the parameter is not
-		    // replaced at all.
-		  if (tmp == 0) continue;
 		  NetExpr*val = tmp->elaborate_pexpr(des, sc);
-		  bool flag = my_scope->replace_parameter((*cur).first, val);
-		  if (! flag) {
-			cerr << val->get_line() << ": warning: parameter "
-			     << (*cur).first << " not found in "
-			     << sc->name() << "." << endl;
-		  }
+		  replace_net[(*cur).first] = val;
 	    }
+
+	      // This call actually arranges for the description of the
+	      // module type to process this instance and handle parameters
+	      // and sub-scopes that might occur. Parameters are also
+	      // created in that scope, as they exist. (I'll override them
+	      // later.)
+	    mod->elaborate_scope(des, my_scope, replace_net);
+
       }
 
 	/* Stash the instance array of scopes into the parent
 	   scope. Later elaboration passes will use this vector to
-	   further elaborate the array.
-
-	   Note that the array is ordered from LSB to MSB. We will use
-	   that fact in the main elaborate to connect things in the
-	   correct order. */
+	   further elaborate the array. */
       sc->instance_arrays[get_name()] = instances;
 }
 
-/*
- * Elaborate the datum within the module. This variable may be
- * within a subscope (i.e., a function or task) so use the components
- * of the name to find the precise scope where this item goes.
- */
-void PData::elaborate_scope(Design*des, NetScope*scope) const
-{
-      NetScope*sub_scope = scope;
-      for (unsigned idx = 0 ;  idx < (hname_.component_count()-1); idx += 1) {
-	    sub_scope = sub_scope->child(hname_.peek_name(idx));
-
-	    if (sub_scope == 0) {
-		  cerr << get_line() << ": internal error: "
-		       << "Could not find sub-scope "
-		       << hname_.peek_name(idx) << " of "
-		       << hname_ << " in module " << scope->name()
-		       << endl;
-		  des->errors += 1;
-		  return;
-	    }
-      }
-
-      const char*basename = hname_.peek_tail_name();
-      NetVariable*tmp = new NetVariable(lex_strings.make(basename));
-      tmp->set_line(*this);
-      sub_scope->add_variable(tmp);
-}
-
 /*
  * The isn't really able to create new scopes, but it does create the
  * event name in the current scope, so can be done during the
@@ -534,7 +647,7 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
       NetScope*my_scope = scope;
 
       if (name_ != 0) {
-	    my_scope = new NetScope(scope, name_, bl_type_==BL_PAR
+	    my_scope = new NetScope(scope, hname_t(name_), bl_type_==BL_PAR
 				    ? NetScope::FORK_JOIN
 				    : NetScope::BEGIN_END);
       }
@@ -643,6 +756,42 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_scope.cc,v $
+ * Revision 1.46  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.45  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.44  2007/03/22 16:08:15  steve
+ *  Spelling fixes from Larry
+ *
+ * Revision 1.43  2007/03/08 06:11:35  steve
+ *  Elaborate scopes of modules instantated in generate loops.
+ *
+ * Revision 1.42  2007/03/05 05:59:10  steve
+ *  Handle processes within generate loops.
+ *
+ * Revision 1.41  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.40  2006/04/12 05:05:03  steve
+ *  Use elab_and_eval to evaluate genvar expressions.
+ *
+ * Revision 1.39  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.38  2006/03/30 01:49:07  steve
+ *  Fix instance arrays indexed by overridden parameters.
+ *
+ * Revision 1.37  2006/03/18 22:53:38  steve
+ *  Support more parameter syntax.
+ *
+ * Revision 1.36  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
  * Revision 1.35  2004/09/10 00:15:17  steve
  *  Missing stdio.h header for warnings.
  *

elab_sig.cc

@@ -17,23 +17,24 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_sig.cc,v 1.36 2004/09/27 22:34:10 steve Exp $"
+#ident "$Id: elab_sig.cc,v 1.52 2007/06/02 03:42:12 steve Exp $"
 #endif
 
 # include "config.h"
 
 # include  <iostream>
-# include  <cstdlib>
 
 # include  "Module.h"
 # include  "PExpr.h"
 # include  "PGate.h"
+# include  "PGenerate.h"
 # include  "PTask.h"
 # include  "PWire.h"
 # include  "compiler.h"
 # include  "netlist.h"
 # include  "netmisc.h"
 # include  "util.h"
+# include  "ivl_assert.h"
 
 /*
  * This local function checks if a named signal is connected to a
@@ -41,8 +42,10 @@
  * within the port_t that have a matching name.
  */
 static bool signal_is_in_port(const svector<Module::port_t*>&ports,
-			      const hname_t&name)
+			      NetNet*sig)
 {
+      perm_string name = sig->name();
+
       for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1) {
 
 	    Module::port_t*pp = ports[idx];
@@ -53,9 +56,15 @@ static bool signal_is_in_port(const svector<Module::port_t*>&ports,
 	      // This port has an internal connection. In this case,
 	      // the port has 0 or more NetEIdent objects concatenated
 	      // together that form the port.
+
+	      // Note that module ports should not have any heirarchy
+	      // in their names: they are in the root of the module
+	      // scope by definition.
+
 	    for (unsigned cc = 0 ;  cc < pp->expr.count() ;  cc += 1) {
+		  perm_string pname = peek_tail_name(pp->expr[cc]->path());
 		  assert(pp->expr[cc]);
-		  if (pp->expr[cc]->path() == name)
+		  if (pname == name)
 			return true;
 	    }
       }
@@ -63,14 +72,28 @@ static bool signal_is_in_port(const svector<Module::port_t*>&ports,
       return false;
 }
 
+#if 0
+static NetNet*find_signal_in_scope(NetScope*scope, const hname_t&path)
+{
+      NetScope*cur = scope;
+      unsigned idx = 0;
+
+      while (path.peek_name(idx+1)) {
+	    cur = cur->child(path.peek_name(idx));
+	    if (cur == 0)
+		  return 0;
+
+	    idx += 1;
+      }
+
+      return cur->find_signal(path.peek_name(idx));
+}
+#endif
+
 bool Module::elaborate_sig(Design*des, NetScope*scope) const
 {
       bool flag = true;
 
-	// Get all the explicitly declared wires of the module and
-	// start the signals list with them.
-      const map<hname_t,PWire*>&wl = get_wires();
-
 	// Scan all the ports of the module, and make sure that each
 	// is connected to wires that have port declarations.
       for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1) {
@@ -78,12 +101,12 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 	    if (pp == 0)
 		  continue;
 
-	    map<hname_t,PWire*>::const_iterator wt;
+	    map<pform_name_t,PWire*>::const_iterator wt;
 	    for (unsigned cc = 0 ;  cc < pp->expr.count() ;  cc += 1) {
-		  hname_t port_path (pp->expr[cc]->path());
-		  wt = wl.find(port_path);
+		  pform_name_t port_path (pp->expr[cc]->path());
+		  wt = wires_.find(port_path);
 
-		  if (wt == wl.end()) {
+		  if (wt == wires_.end()) {
 			cerr << get_line() << ": error: "
 			     << "Port " << pp->expr[cc]->path() << " ("
 			     << (idx+1) << ") of module " << name_
@@ -103,14 +126,11 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 	    }
       }
 
-      for (map<hname_t,PWire*>::const_iterator wt = wl.begin()
-		 ; wt != wl.end()
-		 ; wt ++ ) {
+      for (map<pform_name_t,PWire*>::const_iterator wt = wires_.begin()
+		 ; wt != wires_.end() ; wt ++ ) {
 
 	    PWire*cur = (*wt).second;
-	    cur->elaborate_sig(des, scope);
-
-	    NetNet*sig = scope->find_signal_in_child(cur->path());
+	    NetNet*sig = cur->elaborate_sig(des, scope);
 
 	      // If this wire is a signal of the module (as opposed to
 	      // a port of a function) and is a port, then check that
@@ -122,12 +142,10 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 	    if (sig && (sig->scope() == scope)
 		&& (cur->get_port_type() != NetNet::NOT_A_PORT)) {
 
-		  hname_t name = (*wt).first;
-
-		  if (! signal_is_in_port(ports, name)) {
+		  if (! signal_is_in_port(ports, sig)) {
 
 			cerr << cur->get_line() << ": error: Signal "
-			     << name << " has a declared direction "
+			     << sig->name() << " has a declared direction "
 			     << "but is not a port." << endl;
 			des->errors += 1;
 		  }
@@ -159,6 +177,16 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 		  des->errors += 1;
 	    }
 
+      }
+
+	// Run through all the generate schemes to enaborate the
+	// signals that they hold. Note that the generate schemes hold
+	// the scopes that they instantiated, so we don't pass any
+	// scope in.
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur ++ ) {
+	    (*cur) -> elaborate_sig(des);
       }
 
 	// Get all the gates of the module and elaborate them by
@@ -180,11 +208,13 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 
       for (mfunc_it_t cur = funcs_.begin()
 		 ; cur != funcs_.end() ;  cur ++) {
-	    NetScope*fscope = scope->child((*cur).first);
+
+	    hname_t use_name ( (*cur).first );
+	    NetScope*fscope = scope->child(use_name);
 	    if (scope == 0) {
 		  cerr << (*cur).second->get_line() << ": internal error: "
 		       << "Child scope for function " << (*cur).first
-		       << " missing in " << scope->name() << "." << endl;
+		       << " missing in " << scope_path(scope) << "." << endl;
 		  des->errors += 1;
 		  continue;
 	    }
@@ -201,7 +231,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
 
       for (mtask_it_t cur = tasks_.begin()
 		 ; cur != tasks_.end() ;  cur ++) {
-	    NetScope*tscope = scope->child((*cur).first);
+	    NetScope*tscope = scope->child( hname_t((*cur).first) );
 	    assert(tscope);
 	    (*cur).second->elaborate_sig(des, tscope);
       }
@@ -224,9 +254,9 @@ bool PGModule::elaborate_sig_mod_(Design*des, NetScope*scope,
 
 	    if (my_scope->parent() != scope) {
 		  cerr << get_line() << ": internal error: "
-		       << "Instance " << my_scope->name()
-		       << " is in parent " << my_scope->parent()->name()
-		       << " instead of " << scope->name()
+		       << "Instance " << scope_path(my_scope)
+		       << " is in parent " << scope_path(my_scope->parent())
+		       << " instead of " << scope_path(scope)
 		       << endl;
 	    }
 	    assert(my_scope->parent() == scope);
@@ -239,6 +269,50 @@ bool PGModule::elaborate_sig_mod_(Design*des, NetScope*scope,
       return flag;
 }
 
+bool PGenerate::elaborate_sig(Design*des) const
+{
+      bool flag = true;
+
+      typedef list<NetScope*>::const_iterator scope_list_it_t;
+      for (scope_list_it_t cur = scope_list_.begin()
+		 ; cur != scope_list_.end() ; cur ++ ) {
+
+	    if (debug_elaborate)
+		  cerr << get_line() << ": debug: Elaborate nets in "
+		       << "scope " << scope_path(*cur) << endl;
+	    flag = elaborate_sig_(des, *cur) & flag;
+      }
+
+      return flag;
+}
+
+bool PGenerate::elaborate_sig_(Design*des, NetScope*scope) const
+{
+	// Scan the declared PWires to elaborate the obvious signals
+	// in the current scope.
+      typedef map<pform_name_t,PWire*>::const_iterator wires_it_t;
+      for (wires_it_t wt = wires.begin()
+		 ; wt != wires.end() ;  wt ++ ) {
+
+	    PWire*cur = (*wt).second;
+
+	    if (debug_elaborate)
+		  cerr << get_line() << ": debug: Elaborate PWire "
+		       << cur->path() << " in scope " << scope_path(scope) << endl;
+
+	    cur->elaborate_sig(des, scope);
+      }
+
+      typedef list<PGate*>::const_iterator pgate_list_it_t;
+      for (pgate_list_it_t cur = gates.begin()
+		 ; cur != gates.end() ;  cur ++) {
+	    (*cur) ->elaborate_sig(des, scope);
+      }
+
+      return true;
+}
+
+
 /*
  * A function definition exists within an elaborated module. This
  * matters when elaborating signals, as the ports of the function are
@@ -262,19 +336,19 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
       }
 
       NetNet*ret_sig = 0;
-      NetVariable*ret_real = 0;
 
 	/* Create the signals/variables of the return value and write
 	   them into the function scope. */
       switch (return_type_.type) {
 
 	  case PTF_REG:
+	  case PTF_REG_S:
 	    if (return_type_.range) {
 		  NetExpr*me = elab_and_eval(des, scope,
-					     (*return_type_.range)[0]);
+					     (*return_type_.range)[0], -1);
 		  assert(me);
 		  NetExpr*le = elab_and_eval(des, scope,
-					     (*return_type_.range)[1]);
+					     (*return_type_.range)[1], -1);
 		  assert(le);
 
 		  long mnum = 0, lnum = 0;
@@ -302,15 +376,18 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
 		  ret_sig = new NetNet(scope, fname, NetNet::REG);
 	    }
 	    ret_sig->set_line(*this);
+	    ret_sig->set_signed(return_type_.type == PTF_REG_S);
 	    ret_sig->port_type(NetNet::POUTPUT);
+	    ret_sig->data_type(IVL_VT_LOGIC);
 	    break;
 
 	  case PTF_INTEGER:
-	    ret_sig = new NetNet(scope, fname, NetNet::REG, INTEGER_WIDTH);
+	    ret_sig = new NetNet(scope, fname, NetNet::REG, integer_width);
 	    ret_sig->set_line(*this);
 	    ret_sig->set_signed(true);
 	    ret_sig->set_isint(true);
 	    ret_sig->port_type(NetNet::POUTPUT);
+	    ret_sig->data_type(IVL_VT_LOGIC);
 	    break;
 
 	  case PTF_TIME:
@@ -319,13 +396,17 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
 	    ret_sig->set_signed(false);
 	    ret_sig->set_isint(false);
 	    ret_sig->port_type(NetNet::POUTPUT);
+	    ret_sig->data_type(IVL_VT_LOGIC);
 	    break;
 
 	  case PTF_REAL:
 	  case PTF_REALTIME:
-	    ret_real = new NetVariable(fname);
-	    ret_real->set_line(*this);
-	    scope->add_variable(ret_real);
+	    ret_sig = new NetNet(scope, fname, NetNet::REG, 1);
+	    ret_sig->set_line(*this);
+	    ret_sig->set_signed(true);
+	    ret_sig->set_isint(false);
+	    ret_sig->port_type(NetNet::POUTPUT);
+	    ret_sig->data_type(IVL_VT_REAL);
 	    break;
 
 	  default:
@@ -343,22 +424,24 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
 		       name. We know by design that the port name is given
 		       as two components: <func>.<port>. */
 
-		  hname_t path = (*ports_)[idx]->path();
-		  perm_string pname = lex_strings.make(path.peek_name(1));
-		  perm_string ppath = lex_strings.make(path.peek_name(0));
+		  pform_name_t path = (*ports_)[idx]->path();
+		  ivl_assert(*this, path.size() == 2);
+
+		  perm_string pname = peek_tail_name(path);
+		  perm_string ppath = peek_head_name(path);
 
 		  if (ppath != scope->basename()) {
 			cerr << get_line() << ": internal error: function "
 			     << "port " << (*ports_)[idx]->path()
 			     << " has wrong name for function "
-			     << scope->name() << "." << endl;
+			     << scope_path(scope) << "." << endl;
 			des->errors += 1;
 		  }
 
 		  NetNet*tmp = scope->find_signal(pname);
 		  if (tmp == 0) {
 			cerr << get_line() << ": internal error: function "
-			     << scope->name() << " is missing port "
+			     << scope_path(scope) << " is missing port "
 			     << pname << "." << endl;
 			scope->dump(cerr);
 			cerr << get_line() << ": Continuing..." << endl;
@@ -371,7 +454,6 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
 
       NetFuncDef*def = 0;
       if (ret_sig)  def = new NetFuncDef(scope, ret_sig, ports);
-      if (ret_real) def = new NetFuncDef(scope, ret_real, ports);
 
       assert(def);
       scope->set_func_def(def);
@@ -397,36 +479,34 @@ void PTask::elaborate_sig(Design*des, NetScope*scope) const
 		 name. We know by design that the port name is given
 		 as two components: <task>.<port>. */
 
-	    hname_t path = (*ports_)[idx]->path();
-	    assert(path.peek_name(0) && path.peek_name(1));
+	    pform_name_t path = (*ports_)[idx]->path();
+	    ivl_assert(*this, path.size() == 2);
+
+	    perm_string scope_name = peek_head_name(path);
+	    perm_string port_name = peek_tail_name(path);
 
 	      /* check that the current scope really does have the
 		 name of the first component of the task port name. Do
 		 this by looking up the task scope in the parent of
 		 the current scope. */
-	    if (scope->parent()->child(path.peek_name(0)) != scope) {
-		  cerr << "internal error: task scope " << path
-		       << " not the same as scope " << scope->name()
-		       << "?!" << endl;
-		  return;
-	    }
+	    ivl_assert(*this, scope->basename() == scope_name);
 
 	      /* Find the signal for the port. We know by definition
 		 that it is in the scope of the task, so look only in
 		 the scope. */
-	    NetNet*tmp = scope->find_signal(path.peek_name(1));
+	    NetNet*tmp = scope->find_signal(port_name);
 
 	    if (tmp == 0) {
 		  cerr << get_line() << ": internal error: "
-		       << "Could not find port " << path.peek_name(1)
-		       << " in scope " << scope->name() << endl;
+		       << "Could not find port " << port_name
+		       << " in scope " << scope_path(scope) << endl;
 		  scope->dump(cerr);
 	    }
 
 	    ports[idx] = tmp;
       }
 
-      NetTaskDef*def = new NetTaskDef(scope->name(), ports);
+      NetTaskDef*def = new NetTaskDef(scope, ports);
       scope->set_task_def(def);
 }
 
@@ -442,16 +522,19 @@ bool PGate::elaborate_sig(Design*des, NetScope*scope) const
  * elaboration this creates an object in the design that represent the
  * defined item.
  */
-void PWire::elaborate_sig(Design*des, NetScope*scope) const
+NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
 {
 
 	/* The parser may produce hierarchical names for wires. I here
 	   follow the scopes down to the base where I actually want to
 	   elaborate the NetNet object. */
-      { hname_t tmp_path = hname_;
-        free(tmp_path.remove_tail_name());
-	for (unsigned idx = 0 ;  tmp_path.peek_name(idx) ;  idx += 1) {
-	      scope = scope->child(tmp_path.peek_name(idx));
+      { pform_name_t tmp_path = hname_;
+        tmp_path.pop_back();
+	while (! tmp_path.empty()) {
+	      name_component_t cur = tmp_path.front();
+	      tmp_path.pop_front();
+
+	      scope = scope->child( hname_t(cur.name) );
 
 	      if (scope == 0) {
 		    cerr << get_line() << ": internal error: "
@@ -496,7 +579,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 		  }
 
 		  NetEConst*tmp;
-		  NetExpr*texpr = elab_and_eval(des, scope, msb_[idx]);
+		  NetExpr*texpr = elab_and_eval(des, scope, msb_[idx], -1);
 
 		  tmp = dynamic_cast<NetEConst*>(texpr);
 		  if (tmp == 0) {
@@ -504,20 +587,20 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 			      "Unable to evaluate constant expression ``" <<
 			      *msb_[idx] << "''." << endl;
 			des->errors += 1;
-			return;
+			return 0;
 		  }
 
 		  mnum[idx] = tmp->value().as_long();
 		  delete texpr;
 
-		  texpr = elab_and_eval(des, scope, lsb_[idx]);
+		  texpr = elab_and_eval(des, scope, lsb_[idx], -1);
 		  tmp = dynamic_cast<NetEConst*>(texpr);
 		  if (tmp == 0) {
 			cerr << msb_[idx]->get_line() << ": error: "
 			      "Unable to evaluate constant expression ``" <<
 			      *lsb_[idx] << "''." << endl;
 			des->errors += 1;
-			return;
+			return 0;
 		  }
 
 		  lnum[idx] = tmp->value().as_long();
@@ -533,7 +616,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 		       << "'' declared both as a vector and a scalar."
 		       << endl;
 		  des->errors += 1;
-		  return;
+		  return 0;
 	    }
 
 
@@ -546,7 +629,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 			      " vs. [" << mnum[0] << ":" << lnum[0] << "]"
 			      " for signal ``" << hname_ << "''" << endl;
 			des->errors += 1;
-			return;
+			return 0;
 		  }
 	    }
 
@@ -564,6 +647,10 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
       attrib_list_t*attrib_list = evaluate_attributes(attributes, nattrib,
 						      des, scope);
 
+      long array_s0 = 0;
+      long array_e0 = 0;
+      unsigned array_dimensions = 0;
+
 	/* If the ident has idx expressions, then this is a
 	   memory. It can only have the idx registers after the msb
 	   and lsb expressions are filled. And, if it has one index,
@@ -571,15 +658,15 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
       if (lidx_ || ridx_) {
 	    assert(lidx_ && ridx_);
 
-	    NetExpr*lexp = elab_and_eval(des, scope, lidx_);
-	    NetExpr*rexp = elab_and_eval(des, scope, ridx_);
+	    NetExpr*lexp = elab_and_eval(des, scope, lidx_, -1);
+	    NetExpr*rexp = elab_and_eval(des, scope, ridx_, -1);
 
 	    if ((lexp == 0) || (rexp == 0)) {
 		  cerr << get_line() << ": internal error: There is "
 		       << "a problem evaluating indices for ``"
-		       << hname_.peek_tail_name() << "''." << endl;
+		       << hname_ << "''." << endl;
 		  des->errors += 1;
-		  return;
+		  return 0;
 	    }
 
 	    NetEConst*lcon = dynamic_cast<NetEConst*> (lexp);
@@ -587,10 +674,10 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 
 	    if ((lcon == 0) || (rcon == 0)) {
 		  cerr << get_line() << ": internal error: The indices "
-		       << "are not constant for memory ``"
-		       << hname_.peek_tail_name() << "''." << endl;
+		       << "are not constant for array ``"
+		       << hname_ << "''." << endl;
 		  des->errors += 1;
-		  return;
+		  return 0;
 	    }
 
 	    verinum lval = lcon->value();
@@ -599,31 +686,141 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 	    delete lexp;
 	    delete rexp;
 
-	    perm_string name = lex_strings.make(hname_.peek_tail_name());
-
-	    long lnum = lval.as_long();
-	    long rnum = rval.as_long();
-
-	    new NetMemory(scope, name, wid, lnum, rnum);
-	      // The constructor automatically adds the memory object
-	      // to the scope. Do I need to set line number information?
-
-      } else {
-
-	    perm_string name = lex_strings.make(hname_.peek_tail_name());
-	    NetNet*sig = new NetNet(scope, name, wtype, msb, lsb);
-	    sig->set_line(*this);
-	    sig->port_type(port_type_);
-	    sig->set_signed(get_signed());
-	    sig->set_isint(get_isint());
-
-	    for (unsigned idx = 0 ;  idx < nattrib ;  idx += 1)
-		  sig->attribute(attrib_list[idx].key, attrib_list[idx].val);
+	    array_dimensions = 1;
+	    array_s0 = lval.as_long();
+	    array_e0 = rval.as_long();
       }
+
+	/* If the net type is supply0 or supply1, replace it
+	   with a simple wire with a pulldown/pullup with supply
+	   strength. In other words, transform:
+
+	   supply0 foo;
+
+	   to:
+
+	   wire foo;
+	   pulldown #(supply0) (foo);
+
+	   This reduces the backend burden, and behaves exactly
+	   the same. */
+
+      NetLogic*pull = 0;
+      if (wtype == NetNet::SUPPLY0 || wtype == NetNet::SUPPLY1) {
+	    NetLogic::TYPE pull_type = (wtype==NetNet::SUPPLY1)
+		  ? NetLogic::PULLUP
+		  : NetLogic::PULLDOWN;
+	    pull = new NetLogic(scope, scope->local_symbol(),
+				1, pull_type, wid);
+	    pull->set_line(*this);
+	    pull->pin(0).drive0(Link::SUPPLY);
+	    pull->pin(0).drive1(Link::SUPPLY);
+	    des->add_node(pull);
+	    wtype = NetNet::WIRE;
+
+	    if (debug_elaborate) {
+		  cerr << get_line() << ": debug: "
+		       << "Generate a SUPPLY pulldown for the "
+		       << "supply0 net." << endl;
+	    }
+      }
+
+      perm_string name = peek_tail_name(hname_);
+      if (debug_elaborate) {
+	    cerr << get_line() << ": debug: Create signal "
+		 << wtype << " ["<<msb<<":"<<lsb<<"] " << name
+		 << " in scope " << scope_path(scope) << endl;
+      }
+
+
+      NetNet*sig = array_dimensions > 0
+	    ? new NetNet(scope, name, wtype, msb, lsb, array_s0, array_e0)
+	    : new NetNet(scope, name, wtype, msb, lsb);
+
+      ivl_variable_type_t use_data_type = data_type_;
+      if (use_data_type == IVL_VT_NO_TYPE) {
+	    use_data_type = IVL_VT_LOGIC;
+	    if (debug_elaborate) {
+		  cerr << get_line() << ": debug: "
+		       << "Signal " << name
+		       << " in scope " << scope_path(scope)
+		       << " defaults to data type " << use_data_type << endl;
+	    }
+      }
+
+      sig->data_type(use_data_type);
+      sig->set_line(*this);
+      sig->port_type(port_type_);
+      sig->set_signed(get_signed());
+      sig->set_isint(get_isint());
+
+      if (pull)
+	    connect(sig->pin(0), pull->pin(0));
+
+      for (unsigned idx = 0 ;  idx < nattrib ;  idx += 1)
+	    sig->attribute(attrib_list[idx].key, attrib_list[idx].val);
+
+      return sig;
 }
 
 /*
  * $Log: elab_sig.cc,v $
+ * Revision 1.52  2007/06/02 03:42:12  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.51  2007/05/24 04:07:11  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.50  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.49  2007/04/02 01:12:34  steve
+ *  Seperate arrayness from word count
+ *
+ * Revision 1.48  2007/03/08 06:11:35  steve
+ *  Elaborate scopes of modules instantated in generate loops.
+ *
+ * Revision 1.47  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
+ *
+ * Revision 1.46  2007/03/06 05:22:49  steve
+ *  Support signed function return values.
+ *
+ * Revision 1.45  2007/02/01 05:24:08  steve
+ *  Include type in signal create message.
+ *
+ * Revision 1.44  2007/01/29 02:07:34  steve
+ *  Types of task/function arguments set in multiple steps.
+ *
+ * Revision 1.43  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.42  2006/06/02 04:48:50  steve
+ *  Make elaborate_expr methods aware of the width that the context
+ *  requires of it. In the process, fix sizing of the width of unary
+ *  minus is context determined sizes.
+ *
+ * Revision 1.41  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.40  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
+ * Revision 1.39  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
+ * Revision 1.38  2005/02/13 01:15:07  steve
+ *  Replace supply nets with wires connected to pullup/down supply devices.
+ *
+ * Revision 1.37  2004/12/11 02:31:25  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
+ *
  * Revision 1.36  2004/09/27 22:34:10  steve
  *  Cleanup and factoring of autoconf.
  *

emit.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2005 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: emit.cc,v 1.77.2.2 2006/03/26 23:09:21 steve Exp $"
+#ident "$Id: emit.cc,v 1.89 2007/01/16 05:44:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -32,7 +32,6 @@
 # include  "netlist.h"
 # include  <typeinfo>
 # include  <cassert>
-# include  <cstring>
 
 bool NetNode::emit_node(struct target_t*tgt) const
 {
@@ -58,18 +57,17 @@ bool NetAddSub::emit_node(struct target_t*tgt) const
       return true;
 }
 
+bool NetArrayDq::emit_node(struct target_t*tgt) const
+{
+      return tgt->lpm_array_dq(this);
+}
+
 bool NetCaseCmp::emit_node(struct target_t*tgt) const
 {
       tgt->net_case_cmp(this);
       return true;
 }
 
-bool NetCAssign::emit_node(struct target_t*tgt) const
-{
-      tgt->net_cassign(this);
-      return true;
-}
-
 bool NetCLShift::emit_node(struct target_t*tgt) const
 {
       tgt->lpm_clshift(this);
@@ -82,21 +80,16 @@ bool NetCompare::emit_node(struct target_t*tgt) const
       return true;
 }
 
+bool NetConcat::emit_node(struct target_t*tgt) const
+{
+      return tgt->concat(this);
+}
+
 bool NetConst::emit_node(struct target_t*tgt) const
 {
       return tgt->net_const(this);
 }
 
-bool NetDecode::emit_node(struct target_t*tgt) const
-{
-      return tgt->lpm_decode(this);
-}
-
-bool NetDemux::emit_node(struct target_t*tgt) const
-{
-      return tgt->lpm_demux(this);
-}
-
 bool NetDivide::emit_node(struct target_t*tgt) const
 {
       tgt->lpm_divide(this);
@@ -109,10 +102,9 @@ bool NetFF::emit_node(struct target_t*tgt) const
       return true;
 }
 
-bool NetForce::emit_node(struct target_t*tgt) const
+bool NetLiteral::emit_node(struct target_t*tgt) const
 {
-      tgt->net_force(this);
-      return true;
+      return tgt->net_literal(this);
 }
 
 bool NetModulo::emit_node(struct target_t*tgt) const
@@ -133,10 +125,29 @@ bool NetMux::emit_node(struct target_t*tgt) const
       return true;
 }
 
-bool NetRamDq::emit_node(struct target_t*tgt) const
+bool NetPartSelect::emit_node(struct target_t*tgt) const
 {
-      tgt->lpm_ram_dq(this);
-      return true;
+      return tgt->part_select(this);
+}
+
+bool NetReplicate::emit_node(struct target_t*tgt) const
+{
+      return tgt->replicate(this);
+}
+
+bool NetSignExtend::emit_node(struct target_t*tgt) const
+{
+      return tgt->sign_extend(this);
+}
+
+bool NetUReduce::emit_node(struct target_t*tgt) const
+{
+      return tgt->ureduce(this);
+}
+
+bool NetSysFunc::emit_node(struct target_t*tgt) const
+{
+      return tgt->net_sysfunction(this);
 }
 
 bool NetUserFunc::emit_node(struct target_t*tgt) const
@@ -323,9 +334,6 @@ void NetScope::emit_scope(struct target_t*tgt) const
       for (NetEvent*cur = events_ ;  cur ;  cur = cur->snext_)
 	    tgt->event(cur);
 
-      for (NetVariable*cur = vars_ ;  cur ;  cur = cur->snext_)
-	    tgt->variable(cur);
-
       for (NetScope*cur = sub_ ;  cur ;  cur = cur->sib_)
 	    cur->emit_scope(tgt);
 
@@ -335,15 +343,19 @@ void NetScope::emit_scope(struct target_t*tgt) const
 		  tgt->signal(cur);
 		  cur = cur->sig_next_;
 	    } while (cur != signals_->sig_next_);
+
+	      /* Run the signals again, but this time to connect the
+	         delay paths. This is done as a second pass because
+	         the paths reference other signals that may be later
+	         in the list. We can do it here becase delay paths are
+	         always connected within the scope. */
+	    cur = signals_->sig_next_;
+	    do {
+		  tgt->signal_paths(cur);
+		  cur = cur->sig_next_;
+	    } while (cur != signals_->sig_next_);
       }
 
-      if (memories_) {
-	    NetMemory*cur = memories_->snext_;
-	    do {
-		  tgt->memory(cur);
-		  cur = cur->snext_;
-	    } while (cur != memories_->snext_);
-      }
 }
 
 bool NetScope::emit_defs(struct target_t*tgt) const
@@ -374,13 +386,12 @@ void NetWhile::emit_proc_recurse(struct target_t*tgt) const
       proc_->emit_proc(tgt);
 }
 
-bool Design::emit(struct target_t*tgt) const
+int Design::emit(struct target_t*tgt) const
 {
-      bool rc = true;
+      int rc = 0;
 
-      rc = rc && tgt->start_design(this);
-      if (rc == false)
-	    return false;
+      if (tgt->start_design(this) == false)
+	    return -2;
 
 	// enumerate the scopes
       for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
@@ -389,27 +400,36 @@ bool Design::emit(struct target_t*tgt) const
 
 
 	// emit nodes
+      bool nodes_rc = true;
       if (nodes_) {
 	    NetNode*cur = nodes_->node_next_;
 	    do {
-		  rc = rc && cur->emit_node(tgt);
+		  nodes_rc = nodes_rc && cur->emit_node(tgt);
 		  cur = cur->node_next_;
 	    } while (cur != nodes_->node_next_);
       }
 
 
 	// emit task and function definitions
+      bool tasks_rc = true;
       for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
 	   scope != root_scopes_.end(); scope++)
-	    rc &= (*scope)->emit_defs(tgt);
+	    tasks_rc &= (*scope)->emit_defs(tgt);
 
 
 	// emit the processes
+      bool proc_rc = true;
       for (const NetProcTop*idx = procs_ ;  idx ;  idx = idx->next_)
-	    rc = rc && idx->emit(tgt);
+	    proc_rc &= idx->emit(tgt);
 
-      if (tgt->end_design(this) != 0)
-	    rc = false;
+      rc = tgt->end_design(this);
+
+      if (nodes_rc == false)
+	    return -1;
+      if (tasks_rc == false)
+	    return -2;
+      if (proc_rc == false)
+	  return -3;
 
       return rc;
 }
@@ -444,11 +464,6 @@ void NetECRealParam::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_rparam(this);
 }
 
-void NetEMemory::expr_scan(struct expr_scan_t*tgt) const
-{
-      tgt->expr_memory(this);
-}
-
 void NetEParam::expr_scan(struct expr_scan_t*tgt) const
 {
       cerr << get_line() << ":internal error: unexpected NetEParam."
@@ -485,11 +500,6 @@ void NetESignal::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_signal(this);
 }
 
-void NetEBitSel::expr_scan(struct expr_scan_t*tgt) const
-{
-      tgt->expr_subsignal(this);
-}
-
 void NetETernary::expr_scan(struct expr_scan_t*tgt) const
 {
       tgt->expr_ternary(this);
@@ -500,12 +510,7 @@ void NetEUnary::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_unary(this);
 }
 
-void NetEVariable::expr_scan(struct expr_scan_t*tgt) const
-{
-      tgt->expr_variable(this);
-}
-
-bool emit(const Design*des, const char*type)
+int emit(const Design*des, const char*type)
 {
       for (unsigned idx = 0 ;  target_table[idx] ;  idx += 1) {
 	    const struct target*tgt = target_table[idx];
@@ -516,17 +521,59 @@ bool emit(const Design*des, const char*type)
 
       cerr << "error: Code generator type " << type
 	   << " not found." << endl;
-      return false;
+      return -1;
 }
 
 
 /*
  * $Log: emit.cc,v $
- * Revision 1.77.2.2  2006/03/26 23:09:21  steve
- *  Handle asynchronous demux/bit replacements.
+ * Revision 1.89  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
  *
- * Revision 1.77.2.1  2006/02/19 00:11:31  steve
- *  Handle synthesis of FF vectors with l-value decoder.
+ * Revision 1.88  2006/11/10 05:44:44  steve
+ *  Process delay paths in second path over signals.
+ *
+ * Revision 1.87  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
+ *
+ * Revision 1.86  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
+ * Revision 1.85  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
+ * Revision 1.84  2005/05/24 01:44:27  steve
+ *  Do sign extension of structuran nets.
+ *
+ * Revision 1.83  2005/02/08 00:12:36  steve
+ *  Add the NetRepeat node, and code generator support.
+ *
+ * Revision 1.82  2005/02/03 04:56:20  steve
+ *  laborate reduction gates into LPM_RED_ nodes.
+ *
+ * Revision 1.81  2005/01/24 05:28:30  steve
+ *  Remove the NetEBitSel and combine all bit/part select
+ *  behavior into the NetESelect node and IVL_EX_SELECT
+ *  ivl_target expression type.
+ *
+ * Revision 1.80  2005/01/22 01:06:55  steve
+ *  Change case compare from logic to an LPM node.
+ *
+ * Revision 1.79  2004/12/29 23:55:43  steve
+ *  Unify elaboration of l-values for all proceedural assignments,
+ *  including assing, cassign and force.
+ *
+ *  Generate NetConcat devices for gate outputs that feed into a
+ *  vector results. Use this to hande gate arrays. Also let gate
+ *  arrays handle vectors of gates when the outputs allow for it.
+ *
+ * Revision 1.78  2004/12/11 02:31:26  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
  *
  * Revision 1.77  2004/10/04 01:10:53  steve
  *  Clean up spurious trailing white space.
@@ -553,131 +600,5 @@ bool emit(const Design*des, const char*type)
  * Revision 1.71  2003/01/26 21:15:58  steve
  *  Rework expression parsing and elaboration to
  *  accommodate real/realtime values and expressions.
- *
- * Revision 1.70  2002/11/03 20:36:10  steve
- *  Error message for mising code generator type.
- *
- * Revision 1.69  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.68  2002/06/05 03:44:25  steve
- *  Add support for memory words in l-value of
- *  non-blocking assignments, and remove the special
- *  NetAssignMem_ and NetAssignMemNB classes.
- *
- * Revision 1.67  2002/06/04 05:38:44  steve
- *  Add support for memory words in l-value of
- *  blocking assignments, and remove the special
- *  NetAssignMem class.
- *
- * Revision 1.66  2002/03/09 02:10:22  steve
- *  Add the NetUserFunc netlist node.
- *
- * Revision 1.65  2002/01/28 00:52:41  steve
- *  Add support for bit select of parameters.
- *  This leads to a NetESelect node and the
- *  vvp code generator to support that.
- *
- * Revision 1.64  2002/01/19 19:02:08  steve
- *  Pass back target errors processing conditionals.
- *
- * Revision 1.63  2001/10/19 21:53:24  steve
- *  Support multiple root modules (Philip Blundell)
- *
- * Revision 1.62  2001/08/25 23:50:02  steve
- *  Change the NetAssign_ class to refer to the signal
- *  instead of link into the netlist. This is faster
- *  and uses less space. Make the NetAssignNB carry
- *  the delays instead of the NetAssign_ lval objects.
- *
- *  Change the vvp code generator to support multiple
- *  l-values, i.e. concatenations of part selects.
- *
- * Revision 1.61  2001/07/27 04:51:44  steve
- *  Handle part select expressions as variants of
- *  NetESignal/IVL_EX_SIGNAL objects, instead of
- *  creating new and useless temporary signals.
- *
- * Revision 1.60  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.59  2001/04/22 23:09:46  steve
- *  More UDP consolidation from Stephan Boettcher.
- *
- * Revision 1.58  2001/04/06 02:28:02  steve
- *  Generate vvp code for functions with ports.
- *
- * Revision 1.57  2001/04/02 02:28:12  steve
- *  Generate code for task calls.
- *
- * Revision 1.56  2001/03/27 03:31:06  steve
- *  Support error code from target_t::end_design method.
- *
- * Revision 1.55  2000/11/04 01:54:01  steve
- *  Modifications in support of gcc 2.96
- *
- * Revision 1.54  2000/09/26 01:35:42  steve
- *  Remove the obsolete NetEIdent class.
- *
- * Revision 1.53  2000/09/17 21:26:15  steve
- *  Add support for modulus (Eric Aardoom)
- *
- * Revision 1.52  2000/09/02 20:54:20  steve
- *  Rearrange NetAssign to make NetAssign_ separate.
- *
- * Revision 1.51  2000/08/14 04:39:56  steve
- *  add th t-dll functions for net_const, net_bufz and processes.
- *
- * Revision 1.50  2000/08/09 03:43:45  steve
- *  Move all file manipulation out of target class.
- *
- * Revision 1.49  2000/08/08 01:50:42  steve
- *  target methods need not take a file stream.
- *
- * Revision 1.48  2000/07/30 18:25:43  steve
- *  Rearrange task and function elaboration so that the
- *  NetTaskDef and NetFuncDef functions are created during
- *  signal enaboration, and carry these objects in the
- *  NetScope class instead of the extra, useless map in
- *  the Design class.
- *
- * Revision 1.47  2000/07/29 16:21:08  steve
- *  Report code generation errors through proc_delay.
- *
- * Revision 1.46  2000/07/27 05:13:44  steve
- *  Support elaboration of disable statements.
- *
- * Revision 1.45  2000/05/11 23:37:27  steve
- *  Add support for procedural continuous assignment.
- *
- * Revision 1.44  2000/05/04 03:37:58  steve
- *  Add infrastructure for system functions, move
- *  $time to that structure and add $random.
- *
- * Revision 1.43  2000/05/02 03:13:31  steve
- *  Move memories to the NetScope object.
- *
- * Revision 1.42  2000/05/02 00:58:12  steve
- *  Move signal tables to the NetScope class.
- *
- * Revision 1.41  2000/04/23 03:45:24  steve
- *  Add support for the procedural release statement.
- *
- * Revision 1.40  2000/04/22 04:20:19  steve
- *  Add support for force assignment.
- *
- * Revision 1.39  2000/04/12 04:23:58  steve
- *  Named events really should be expressed with PEIdent
- *  objects in the pform,
- *
- *  Handle named events within the mix of net events
- *  and edges. As a unified lot they get caught together.
- *  wait statements are broken into more complex statements
- *  that include a conditional.
- *
- *  Do not generate NetPEvent or NetNEvent objects in
- *  elaboration. NetEvent, NetEvWait and NetEvProbe
- *  take over those functions in the netlist.
  */
 

eval.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: eval.cc,v 1.36.2.3 2006/09/20 20:27:02 steve Exp $"
+#ident "$Id: eval.cc,v 1.47 2007/06/04 19:14:06 steve Exp $"
 #endif
 
 # include "config.h"
@@ -26,14 +26,15 @@
 
 # include  "PExpr.h"
 # include  "netlist.h"
+# include  "netmisc.h"
 # include  "compiler.h"
 
-verinum* PExpr::eval_const(const Design*, const NetScope*) const
+verinum* PExpr::eval_const(Design*, NetScope*) const
 {
       return 0;
 }
 
-verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEBinary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*l = left_->eval_const(des, scope);
       if (l == 0) return 0;
@@ -112,10 +113,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
 	  case 'l': { // left shift (<<)
 		assert(r->is_defined());
 		unsigned long rv = r->as_ulong();
-		unsigned use_wid = l->len();
-		if (! l->has_len())
-		      use_wid += rv;
-		res = new verinum(verinum::V0, use_wid);
+		res = new verinum(verinum::V0, l->len());
 		if (rv < res->len()) {
 		      unsigned cnt = res->len() - rv;
 		      for (unsigned idx = 0 ;  idx < cnt ;  idx += 1)
@@ -145,16 +143,15 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
       delete r;
       return res;
 }
-
-verinum* PEConcat::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEConcat::eval_const(Design*des, NetScope*scope) const
 {
       verinum*accum = parms_[0]->eval_const(des, scope);
       if (accum == 0)
 	    return 0;
 
       for (unsigned idx = 1 ;  idx < parms_.count() ;  idx += 1) {
+
 	    verinum*tmp = parms_[idx]->eval_const(des, scope);
-	      /* Oops, found an argument that is not constant. Give up. */
 	    if (tmp == 0) {
 		  delete accum;
 		  return 0;
@@ -168,14 +165,29 @@ verinum* PEConcat::eval_const(const Design*des, const NetScope*scope) const
       return accum;
 }
 
+
 /*
  * Evaluate an identifier as a constant expression. This is only
  * possible if the identifier is that of a parameter.
  */
-verinum* PEIdent::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEIdent::eval_const(Design*des, NetScope*scope) const
 {
       assert(scope);
-      const NetExpr*expr = des->find_parameter(scope, path_);
+      NetNet*net;
+      NetEvent*eve;
+      const NetExpr*expr;
+
+      const name_component_t&name_tail = path_.back();
+
+	// Handle the special case that this ident is a genvar
+	// variable name. In that case, the genvar meaning preempts
+	// everything and we just return that value immediately.
+      if (scope->genvar_tmp
+	  && strcmp(name_tail.name,scope->genvar_tmp) == 0) {
+	    return new verinum(scope->genvar_tmp_val);
+      }
+
+      symbol_search(des, scope, path_, net, expr, eve);
 
       if (expr == 0)
 	    return 0;
@@ -190,30 +202,30 @@ verinum* PEIdent::eval_const(const Design*des, const NetScope*scope) const
 
       assert(eval);
 
-      if (msb_ || lsb_)
+      if (!name_tail.index.empty())
 	    return 0;
 
 
       return new verinum(eval->value());
 }
 
-verinum* PEFNumber::eval_const(const Design*, const NetScope*) const
+verinum* PEFNumber::eval_const(Design*, NetScope*) const
 {
       long val = value_->as_long();
       return new verinum(val);
 }
 
-verinum* PENumber::eval_const(const Design*, const NetScope*) const
+verinum* PENumber::eval_const(Design*, NetScope*) const
 {
       return new verinum(value());
 }
 
-verinum* PEString::eval_const(const Design*, const NetScope*) const
+verinum* PEString::eval_const(Design*, NetScope*) const
 {
       return new verinum(string(text_));
 }
 
-verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PETernary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*test = expr_->eval_const(des, scope);
       if (test == 0)
@@ -233,7 +245,7 @@ verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
       }
 }
 
-verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
+verinum* PEUnary::eval_const(Design*des, NetScope*scope) const
 {
       verinum*val = expr_->eval_const(des, scope);
       if (val == 0)
@@ -247,7 +259,7 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
 		  /* We need to expand the value a bit if we are
 		     taking the 2's complement so that we are
 		     guaranteed to not overflow. */
-		verinum tmp (0UL, val->len()+1);
+		verinum tmp ((uint64_t)0, val->len()+1);
 		for (unsigned idx = 0 ;  idx < val->len() ;  idx += 1)
 		      tmp.set(idx, val->get(idx));
 
@@ -264,14 +276,42 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
 
 /*
  * $Log: eval.cc,v $
- * Revision 1.36.2.3  2006/09/20 20:27:02  steve
- *  Fix left shift of small unsized constants.
+ * Revision 1.47  2007/06/04 19:14:06  steve
+ *  Build errors in picky GCC compilers.
  *
- * Revision 1.36.2.2  2005/12/18 21:06:01  steve
- *  Properly fail when concat is not actually constant.
+ * Revision 1.46  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
  *
- * Revision 1.36.2.1  2005/12/07 03:28:44  steve
- *  Support constant concatenation of constants.
+ * Revision 1.45  2007/03/07 00:38:15  steve
+ *  Lint fixes.
+ *
+ * Revision 1.44  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
+ *
+ * Revision 1.43  2006/08/08 05:11:37  steve
+ *  Handle 64bit delay constants.
+ *
+ * Revision 1.42  2006/05/19 04:07:24  steve
+ *  eval_const is not strict.
+ *
+ * Revision 1.41  2006/05/17 16:49:30  steve
+ *  Error message if concat expression cannot evaluate.
+ *
+ * Revision 1.40  2006/04/10 00:37:42  steve
+ *  Add support for generate loops w/ wires and gates.
+ *
+ * Revision 1.39  2005/12/07 04:04:23  steve
+ *  Allow constant concat expressions.
+ *
+ * Revision 1.38  2005/11/27 17:01:57  steve
+ *  Fix for stubborn compiler.
+ *
+ * Revision 1.37  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
  *
  * Revision 1.36  2003/06/21 01:21:43  steve
  *  Harmless fixup of warnings.

eval_attrib.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: eval_attrib.cc,v 1.7 2004/02/20 18:53:35 steve Exp $"
+#ident "$Id: eval_attrib.cc,v 1.9 2007/06/04 19:14:06 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -35,8 +35,7 @@
 
 attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
 				   unsigned&natt,
-				   const Design*des,
-				   const NetScope*scope)
+				   Design*des, NetScope*scope)
 {
       natt = att.size();
       if (natt == 0)
@@ -74,6 +73,12 @@ attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
 
 /*
  * $Log: eval_attrib.cc,v $
+ * Revision 1.9  2007/06/04 19:14:06  steve
+ *  Build errors in picky GCC compilers.
+ *
+ * Revision 1.8  2005/11/27 17:01:57  steve
+ *  Fix for stubborn compiler.
+ *
  * Revision 1.7  2004/02/20 18:53:35  steve
  *  Addtrbute keys are perm_strings.
  *

examples/hello_vpi.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: hello_vpi.c,v 1.3 2002/08/12 01:35:01 steve Exp $"
+#ident "$Id: hello_vpi.c,v 1.5 2007/01/17 05:35:48 steve Exp $"
 #endif
 
 /*
@@ -33,7 +33,7 @@
 
 # include  <vpi_user.h>
 
-static int my_hello_calltf(char *xx)
+static PLI_INT32 my_hello_calltf(char *xx)
 {
       vpi_printf("Hello World, from VPI.\n");
       return 0;
@@ -62,6 +62,12 @@ void (*vlog_startup_routines[])() = {
 };
 /*
  * $Log: hello_vpi.c,v $
+ * Revision 1.5  2007/01/17 05:35:48  steve
+ *  Fix typo is hello_vpi.c example.
+ *
+ * Revision 1.4  2006/10/30 22:46:25  steve
+ *  Updates for Cygwin portability (pr1585922)
+ *
  * Revision 1.3  2002/08/12 01:35:01  steve
  *  conditional ident string using autoconfig.
  *

examples/sqrt-virtex.v

@@ -16,7 +16,7 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  *
- *   $Id: sqrt-virtex.v,v 1.4.2.2 2005/02/23 18:37:52 steve Exp $"
+ *   $Id: sqrt-virtex.v,v 1.5 2007/03/22 16:08:18 steve Exp $"
  */
 
 /*
@@ -130,7 +130,7 @@
  * contains Verilog code that simulates the mapped design. This output
  * Verilog has the single root module "chip_root", which came from the
  * name of the root module when we were making the EDIF file in the
- * first place. The module has ports named just like the ports of the
+ * first place. The module has ports named just line the ports of the
  * chip_root module below.
  *
  * The generated Verilog uses the library in the directory
@@ -183,7 +183,7 @@
   * where sqrt(y) is the exact square root of y and floor(N) is the
   * largest integer <= N.
   *
-  * For 32bit numbers, this will never run more then 16 iterations,
+  * For 32 bit numbers, this will never run more than 16 iterations,
   * which amounts to 16 clocks.
   */
 

examples/sqrt.vl

@@ -16,7 +16,7 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  *
- *   $Id: sqrt.vl,v 1.4 2004/10/04 01:10:56 steve Exp $"
+ *   $Id: sqrt.vl,v 1.5 2007/03/22 16:08:18 steve Exp $"
  */
 
  /*
@@ -50,7 +50,7 @@
   * where sqrt(y) is the exact square root of y and floor(N) is the
   * largest integer <= N.
   *
-  * For 32bit numbers, this will never run more then 16 iterations,
+  * For 32 bit numbers, this will never run more than 16 iterations,
   * which amounts to 16 clocks.
   */
 

extensions.txt

@@ -0,0 +1,84 @@
+
+Icarus Verilog Extensions
+
+Icarus Verilog supports certain extensions to the baseline IEEE1364
+standard. Some of these are picked from extended variants of the
+language, such as SystemVerilog, and some are expressions of internal
+behavior of Icarus Verilog, made available as a tool debugging aid.
+
+* Builtin System Functions
+
+** Extended Verilog Data Types
+
+This feature is turned off if the generation flag "-g" is set to other
+then the default "2x".  For example, "iverilog -g2x" enables extended
+data types, and "iverilog -g2" disables them.
+
+Icarus Verilog adds support for extended data types. This extended
+type syntax is based on a proposal by Cadence Design Systems,
+originally as an update to the IEEE1364. That original proposal has
+apparently been absorbed by the IEEE1800 SystemVerilog
+standard. Icarus Verilog currently only takes the new primitive types
+from the proposal.
+
+Extended data types separates the concept of net/variable from the
+data type. Both nets and variables can declared with any data
+type. The primitive types available are:
+
+    logic  - The familiar 0, 1, x and z, optionally with strength.
+    bool   - Limited to only 0 and 1
+    real   - 64bit real values
+
+Nets with logic type may have multiple drivers with strength, and the
+value is resolved the usual way. Only logic values may be driven to
+logic nets, so bool values driven onto logic nets are implicitly
+converted to logic.
+
+Nets with any other type may not have multiple drivers. The compiler
+should detect the multiple drivers and report an error.
+
+- Declarations
+
+The declaration of a net is extended to include the type of the wire,
+with the syntax:
+
+    wire <type> <wire-assignment-list>... ;
+
+The <type>, if omitted, is taken to be logic. The "wire" can be any of
+the net keywords. Wires can be logic, bool, real, or vectors of logic
+or bool. Some valid examples:
+
+    wire real foo = 1.0;
+    tri logic bus[31:0];
+    wire bool addr[23:0];
+    ... and so on.
+
+The declarations of variables is similar. The "reg" keyword is used to
+specify that this is a variable. Variables can have the same data
+types as nets.
+
+- Ports
+
+Module and task ports in standard verilog are restricted to logic
+types. This extension removes that restriction, allowing any type to
+pass through the port consistent with the continuous assignment
+connectivity that is implied by the type.
+
+- Expressions
+
+Expressions in the face of real values is covered by the baseline
+Verilog standard.
+
+The bool type supports the same operators as the logic type, with the
+obvious differences imposed by the limited domain.
+
+Comparison operators (not case compare) return logic if either of
+their operands is logic. If both are bool or real (including mix of
+bool and real) then the result is bool. This is because comparison of
+bools and reals always return exactly true or false.
+
+Case comparison returns bool. This differs from baseline Verilog,
+which strictly speaking returns a logic, but only 0 or 1 values.
+
+All the arithmetic operators return bool if both of their operands are
+bool or real. Otherwise, they return logic.

functor.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2002 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2005 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: functor.cc,v 1.32.2.1 2006/04/23 04:26:14 steve Exp $"
+#ident "$Id: functor.cc,v 1.35 2005/07/07 16:22:49 steve Exp $"
 #endif
 
 # include "config.h"
@@ -59,6 +59,10 @@ void functor_t::lpm_divide(class Design*, class NetDivide*)
 {
 }
 
+void functor_t::lpm_literal(class Design*, class NetLiteral*)
+{
+}
+
 void functor_t::lpm_modulo(class Design*, class NetModulo*)
 {
 }
@@ -79,10 +83,15 @@ void functor_t::lpm_mux(class Design*, class NetMux*)
 {
 }
 
-void functor_t::lpm_ram_dq(class Design*, class NetRamDq*)
+void functor_t::sign_extend(class Design*, class NetSignExtend*)
 {
 }
 
+void functor_t::lpm_ureduce(class Design*, class NetUReduce*)
+{
+}
+
+
 void NetScope::run_functor(Design*des, functor_t*fun)
 {
       for (NetScope*cur = sub_ ;  cur ;  cur = cur->sib_) {
@@ -189,6 +198,11 @@ void NetFF::functor_node(Design*des, functor_t*fun)
       fun->lpm_ff(des, this);
 }
 
+void NetLiteral::functor_node(Design*des, functor_t*fun)
+{
+      fun->lpm_literal(des, this);
+}
+
 void NetLogic::functor_node(Design*des, functor_t*fun)
 {
       fun->lpm_logic(des, this);
@@ -209,9 +223,14 @@ void NetMux::functor_node(Design*des, functor_t*fun)
       fun->lpm_mux(des, this);
 }
 
-void NetRamDq::functor_node(Design*des, functor_t*fun)
+void NetSignExtend::functor_node(Design*des, functor_t*fun)
 {
-      fun->lpm_ram_dq(des, this);
+      fun->sign_extend(des, this);
+}
+
+void NetUReduce::functor_node(Design*des, functor_t*fun)
+{
+      fun->lpm_ureduce(des, this);
 }
 
 proc_match_t::~proc_match_t()
@@ -275,8 +294,14 @@ int proc_match_t::event_wait(NetEvWait*)
 
 /*
  * $Log: functor.cc,v $
- * Revision 1.32.2.1  2006/04/23 04:26:14  steve
- *  Constant propagate addresses through NetRamDq read ports.
+ * Revision 1.35  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
+ * Revision 1.34  2005/05/24 01:44:27  steve
+ *  Do sign extension of structuran nets.
+ *
+ * Revision 1.33  2005/02/03 04:56:20  steve
+ *  laborate reduction gates into LPM_RED_ nodes.
  *
  * Revision 1.32  2004/10/04 01:10:53  steve
  *  Clean up spurious trailing white space.

functor.h

@@ -1,7 +1,7 @@
 #ifndef __functor_H
 #define __functor_H
 /*
- * Copyright (c) 1999-2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2005 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: functor.h,v 1.20.2.1 2006/04/23 04:26:14 steve Exp $"
+#ident "$Id: functor.h,v 1.23 2005/07/07 16:22:49 steve Exp $"
 #endif
 
 /*
@@ -63,6 +63,9 @@ struct functor_t {
 	/* This method is called for each structural constant. */
       virtual void lpm_divide(class Design*des, class NetDivide*);
 
+	/* Constant literals. */
+      virtual void lpm_literal(class Design*des, class NetLiteral*);
+
 	/* This method is called for each structural constant. */
       virtual void lpm_modulo(class Design*des, class NetModulo*);
 
@@ -78,8 +81,10 @@ struct functor_t {
 	/* This method is called for each MUX. */
       virtual void lpm_mux(class Design*des, class NetMux*);
 
-	/* This is called for eacm RamDq device. */
-      virtual void lpm_ram_dq(class Design*des, class NetRamDq*);
+	/* This method is called for each unary reduction gate. */
+      virtual void lpm_ureduce(class Design*des, class NetUReduce*);
+
+      virtual void sign_extend(class Design*des, class NetSignExtend*);
 };
 
 struct proc_match_t {
@@ -95,8 +100,14 @@ struct proc_match_t {
 
 /*
  * $Log: functor.h,v $
- * Revision 1.20.2.1  2006/04/23 04:26:14  steve
- *  Constant propagate addresses through NetRamDq read ports.
+ * Revision 1.23  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
+ * Revision 1.22  2005/05/24 01:44:27  steve
+ *  Do sign extension of structuran nets.
+ *
+ * Revision 1.21  2005/02/03 04:56:20  steve
+ *  laborate reduction gates into LPM_RED_ nodes.
  *
  * Revision 1.20  2002/08/12 01:34:59  steve
  *  conditional ident string using autoconfig.

ieee1364-notes.txt

@@ -1,4 +1,7 @@
 
+NOTE: THE CONTENTS OF THIS FILE ARE BEING MOVED TO THE DOCUMENTATION
+WIKI AT http://iverilog.wikia.com. PLEASE ADD NEW ENTRIES THERE.
+
                 Icarus Verilog vs. IEEE1364
                 Copyright 2000 Stephen Williams
 
@@ -249,7 +252,7 @@ exactly the same so far as the compiler is concerned.
 
 Unfortunately, Cadence seems to feel otherwise. In particular, it has
 been reported that although {1'b0, 16} causes an error, {1'b0, 15+1}
-is accepted. Further testing shows that any expression other then a
+is accepted. Further testing shows that any expression other than a
 simple unsized constant is accepted there, even if all the operands of
 all the operators that make up the expression are unsized integers.
 
@@ -498,8 +501,14 @@ of 4-value behavior in the dead zone, and appears more user friendly
 when viewed by reasonable viewers.
 
 
-$Id: ieee1364-notes.txt,v 1.17 2003/07/15 03:49:22 steve Exp $
+$Id: ieee1364-notes.txt,v 1.19 2007/04/18 02:36:13 steve Exp $
 $Log: ieee1364-notes.txt,v $
+Revision 1.19  2007/04/18 02:36:13  steve
+ Put to iverilog wiki for further notes.
+
+Revision 1.18  2007/03/22 16:08:16  steve
+ Spelling fixes from Larry
+
 Revision 1.17  2003/07/15 03:49:22  steve
  Spelling fixes.
 

iverilog-vpi.man

@@ -27,15 +27,6 @@ first source file is named \fIfoo.c\fP, the output becomes
 Include the named library in the link of the VPI module. This allows
 VPI modules to further reference external libraries.
 
-.TP 8
-.B -I\fIdirectory\fP
-Add \fIdirectory\fP to the list of directories that will be search for
-header files.
-
-.TP 8
-.B -D\fIdefine\fP
-Define a macro named \fIdefine\fP.
-
 .TP 8
 .B --name=\fIname\fP
 Normally, the output VPI module will be named after the first source
@@ -48,10 +39,6 @@ This flag causes the program to print the install directory for VPI
 modules, then exit. It is a convenience for makefiles or automated
 plug-in installers.
 
-.TP 8
-.B --cflags, --ldflags and -ldlibs
-These flags provide compile time information.
-
 .SH "PC-ONLY OPTIONS"
 
 The PC port of \fIiverilog-vpi\fP includes two special flags needed to

iverilog-vpi.sh

@@ -17,20 +17,19 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
+#ident "$Id: iverilog-vpi.sh,v 1.17 2007/02/06 05:07:31 steve Exp $"
 
 # These are the variables used for compiling files
 CC=@IVCC@
 CXX=@IVCXX@
 CFLAGS="@PIC@ @IVCFLAGS@ -I@INCLUDEDIR@"
 
-SUFFIX=@SUFFIX@
-
 # These are used for linking...
-LD=$CC
+LD=gcc
 LDFLAGS32="@SHARED@ -L@LIBDIR@"
 LDFLAGS64="@SHARED@ -L@LIBDIR64@"
 LDFLAGS="$LDFLAGS64"
-LDLIBS="-lveriuser$SUFFIX -lvpi$SUFFIX"
+LDLIBS="-lveriuser -lvpi"
 
 INSTDIR64="@VPIDIR1@"
 INSTDIR32="@VPIDIR2@"
@@ -47,7 +46,6 @@ OBJ=
 LIB=
 OUT=
 INCOPT=
-DEFS=
 
 # --
 # parse the command line switches. This collects the source files
@@ -92,9 +90,7 @@ do
 	 ;;
 
     -I*) INCOPT="$INCOPT $parm"
-	 ;;
-
-    -D*) DEFS="$DEFS $parm"
+	 echo "$parm"
 	 ;;
 
     -m32) LDFLAGS="-m32 $LDFLAGS32"
@@ -118,7 +114,7 @@ do
 	 ;;
 
     --install-dir)
-	 echo "@LIBDIR@/ivl$SUFFIX/$INSTDIR"
+	 echo "@LIBDIR@/ivl/$INSTDIR"
 	 exit
 	 ;;
     esac
@@ -142,7 +138,7 @@ do
     obj=$base".o"
 
     echo "Compiling $src..."
-    $CC -c -o $obj $DEFS $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
+    $CC -c -o $obj $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
     OBJ="$OBJ $obj"
 done
 
@@ -152,13 +148,13 @@ do
     obj=$base".o"
 
     echo "Compiling $src..."
-    $CXX -c -o $obj $DEFS $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
+    $CXX -c -o $obj $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
     OBJ="$OBJ $obj"
 done
 
 if test $compile_errors -gt 0
 then
-    echo "$0: $compile_errors file(s) failed to compile."
+    echo "Some ($compile_errors) files failed to compile."
     exit $compile_errors
 fi
 

ivl.def

@@ -9,9 +9,10 @@ ivl_design_roots
 ivl_design_time_precision
 
 ivl_const_bits
-ivl_const_pin
-ivl_const_pins
+ivl_const_real
 ivl_const_signed
+ivl_const_type
+ivl_const_width
 
 ivl_event_any
 ivl_event_basename
@@ -21,14 +22,13 @@ ivl_event_neg
 ivl_event_nneg
 ivl_event_npos
 ivl_event_pos
+ivl_event_scope
 
 ivl_expr_type
 ivl_expr_bits
 ivl_expr_def
 ivl_expr_dvalue
 ivl_expr_event
-ivl_expr_lsi
-ivl_expr_memory
 ivl_expr_name
 ivl_expr_opcode
 ivl_expr_oper1
@@ -44,36 +44,34 @@ ivl_expr_signed
 ivl_expr_string
 ivl_expr_uvalue
 ivl_expr_value
-ivl_expr_variable
 ivl_expr_width
 
 ivl_logic_attr
 ivl_logic_attr_cnt
 ivl_logic_attr_val
-ivl_logic_delay
-ivl_logic_name
 ivl_logic_basename
-ivl_logic_scope
-ivl_logic_type
+ivl_logic_delay
+ivl_logic_drive0
+ivl_logic_drive1
+ivl_logic_name
 ivl_logic_pin
 ivl_logic_pins
+ivl_logic_scope
+ivl_logic_type
 ivl_logic_udp
+ivl_logic_width
 
+ivl_lpm_array
 ivl_lpm_aset_value
 ivl_lpm_async_clr
 ivl_lpm_async_set
-ivl_lpm_attr_cnt
-ivl_lpm_attr_val
+ivl_lpm_base
 ivl_lpm_basename
 ivl_lpm_clk
 ivl_lpm_data
 ivl_lpm_datab
-ivl_lpm_data2
-ivl_lpm_data2_width
-ivl_lpm_decode
 ivl_lpm_define
 ivl_lpm_enable
-ivl_lpm_memory
 ivl_lpm_name
 ivl_lpm_q
 ivl_lpm_scope
@@ -82,25 +80,17 @@ ivl_lpm_selects
 ivl_lpm_signed
 ivl_lpm_size
 ivl_lpm_sset_value
+ivl_lpm_string
 ivl_lpm_sync_clr
 ivl_lpm_sync_set
 ivl_lpm_type
 ivl_lpm_width
 
 ivl_lval_idx
-ivl_lval_mem
 ivl_lval_mux
 ivl_lval_part_off
-ivl_lval_pin
-ivl_lval_pins
 ivl_lval_sig
-ivl_lval_var
-
-ivl_memory_basename
-ivl_memory_root
-ivl_memory_scope
-ivl_memory_size
-ivl_memory_width
+ivl_lval_width
 
 ivl_nexus_get_private
 ivl_nexus_name
@@ -119,6 +109,12 @@ ivl_nexus_ptr_sig
 ivl_parameter_basename
 ivl_parameter_expr
 
+ivl_path_condit
+ivl_path_delay
+ivl_path_source
+ivl_path_source_negedge
+ivl_path_source_posedge
+
 ivl_scope_attr_cnt
 ivl_scope_attr_val
 ivl_scope_basename
@@ -130,8 +126,6 @@ ivl_scope_logs
 ivl_scope_log
 ivl_scope_lpms
 ivl_scope_lpm
-ivl_scope_mem
-ivl_scope_mems
 ivl_scope_name
 ivl_scope_param
 ivl_scope_params
@@ -143,23 +137,30 @@ ivl_scope_sig
 ivl_scope_time_units
 ivl_scope_type
 ivl_scope_tname
-ivl_scope_var
-ivl_scope_vars
 
+ivl_signal_array_base
+ivl_signal_array_count
 ivl_signal_attr
 ivl_signal_attr_cnt
 ivl_signal_attr_val
+ivl_signal_basename
+ivl_signal_data_type
+ivl_signal_dimensions
 ivl_signal_integer
 ivl_signal_local
 ivl_signal_lsb
 ivl_signal_msb
-ivl_signal_pin
-ivl_signal_pins
+ivl_signal_name
+ivl_signal_nex
+ivl_signal_npath
+ivl_signal_path
 ivl_signal_port
 ivl_signal_signed
 ivl_signal_type
-ivl_signal_name
-ivl_signal_basename
+ivl_signal_width
+
+ivl_path_delay
+ivl_path_source
 
 ivl_process_attr_cnt
 ivl_process_attr_val
@@ -187,8 +188,6 @@ ivl_stmt_lvals
 ivl_stmt_lwidth
 ivl_stmt_name
 ivl_stmt_nevent
-ivl_stmt_nexus
-ivl_stmt_nexus_count
 ivl_stmt_parm
 ivl_stmt_parm_count
 ivl_stmt_rval
@@ -200,6 +199,3 @@ ivl_udp_nin
 ivl_udp_row
 ivl_udp_rows
 ivl_udp_sequ
-
-ivl_variable_name
-ivl_variable_type

ivl_assert.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2007 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: ivl_assert.h,v 1.1 2007/01/31 04:21:10 steve Exp $"
+#endif
+
+#ifndef __ivl_assert_h
+#define __ivl_assert_h
+
+# include  <assert.h>
+
+#define ivl_assert(tok, expression)  \
+      do {			    \
+	    if (! (expression))     \
+		  __ivl_assert(#expression, tok, __FILE__, __LINE__);	\
+      } while(0)
+
+#define __ivl_assert(expression, tok, file, line)  \
+      do { \
+	    cerr << (tok).get_line() << ": assert: " \
+		 << file << ":" << line \
+		 << ": failed assertion " << (expression) << endl; \
+	    abort(); \
+      } while(0)
+
+
+#endif

ivlpp/Makefile.in

@@ -18,12 +18,12 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.17 2004/10/04 01:10:56 steve Exp $"
+#ident "$Id: Makefile.in,v 1.18 2006/10/30 22:45:37 steve Exp $"
 #
 #
 SHELL = /bin/sh
 
-suffix = @install_suffix@
+VERSION = 0.0
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -44,18 +44,18 @@ CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
 
-all: ivlpp
+all: ivlpp@EXEEXT@
 
 clean:
-	rm -f *.o lexor.c parse.c parse.h parse.output ivlpp
+	rm -f *.o lexor.c parse.c parse.h parse.output ivlpp@EXEEXT@
 
 distclean: clean
 	rm -f Makefile
 
 O = main.o lexor.o parse.o
 
-ivlpp: $O
-	$(CC) $(LDFLAGS) $O -o ivlpp @EXTRALIBS@
+ivlpp@EXEEXT@: $O
+	$(CC) $(LDFLAGS) $O -o ivlpp@EXEEXT@ @EXTRALIBS@
 
 lexor.c: lexor.lex
 	flex -s -olexor.c $(srcdir)/lexor.lex
@@ -63,16 +63,16 @@ lexor.c: lexor.lex
 parse.h parse.c: parse.y
 	bison --verbose -t -d -o parse.c $(srcdir)/parse.y
 
-install: all installdirs $(libdir)/ivl$(suffix)/ivlpp
+install: all installdirs $(libdir)/ivl/ivlpp@EXEEXT@
 
-$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@: ivlpp@EXEEXT@
-	$(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ $(libdir)/ivl$(suffix)/ivlpp@EXEEXT@
+$(libdir)/ivl/ivlpp@EXEEXT@: ivlpp@EXEEXT@
+	$(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ $(libdir)/ivl/ivlpp@EXEEXT@
 
 installdirs: ../mkinstalldirs
-	$(srcdir)/../mkinstalldirs $(libdir)/ivl$(suffix)
+	$(srcdir)/../mkinstalldirs $(libdir)/ivl
 
 uninstall:
-	rm -f $(libdir)/ivl$(suffix)/ivlpp@EXEEXT@
+	rm -f $(libdir)/ivl/ivlpp@EXEEXT@
 
 lexor.o: lexor.c parse.h globals.h
 main.o: main.c globals.h

ivlpp/lexor.lex

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: lexor.lex,v 1.46.2.1 2007/05/25 18:35:45 steve Exp $"
+#ident "$Id: lexor.lex,v 1.48 2007/05/30 23:21:20 steve Exp $"
 #endif
 
 # include "config.h"
@@ -70,7 +70,14 @@ struct include_stack_t {
 
 static void emit_pathline(struct include_stack_t *isp);
 
+/*
+ * The file_queue is a singly-linked list of the files that were
+ * listed on the command line/file list.
+ */
 static struct include_stack_t*file_queue = 0;
+/*
+ * The istack is the inclusion stack.
+ */
 static struct include_stack_t*istack  = 0;
 static struct include_stack_t*standby = 0;
 
@@ -93,7 +100,7 @@ static void ifdef_enter(void)
 
       cur = (struct ifdef_stack_t*)
 	    calloc(1, sizeof(struct ifdef_stack_t));
-      if (istack->path) cur->path = strdup(istack->path);
+      cur->path   = strdup(istack->path);
       cur->lineno = istack->lineno;
       cur->next = ifdef_stack;
       ifdef_stack = cur;
@@ -108,17 +115,14 @@ static void ifdef_leave(void)
       cur = ifdef_stack;
       ifdef_stack = cur->next;
 
-      /* If either path is from a non-file context e.g.(macro expansion)
-       * we assume that the non-file part is from this file. */
-      if (istack->path != NULL && cur->path != NULL &&
-          strcmp(istack->path,cur->path) != 0) {
+      if (strcmp(istack->path,cur->path) != 0) {
 	    fprintf(stderr, "%s:%u: warning: "
 		    "This `endif matches an ifdef in another file.\n",
-		    istack->path, istack->lineno);
+		    istack->path, istack->lineno+1);
 
 	    fprintf(stderr, "%s:%u:        : "
 		    "This is the odd matched `ifdef.\n",
-		    cur->path, cur->lineno);
+		    cur->path, cur->lineno+1);
       }
 
       free(cur->path);
@@ -145,7 +149,6 @@ static int comment_enter = 0;
 %x PPINCLUDE
 %x PPDEFINE
 %x CCOMMENT
-%x IFCCOMMENT
 %x PCOMENT
 %x CSTRING
 %x ERROR_LINE
@@ -330,20 +333,11 @@ W [ \t\b\f]+
   }
 <IFDEF_SUPR>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {  }
 
-<IFDEF_TRUE>`else  { BEGIN(IFDEF_FALSE); }
+<IFDEF_TRUE>`else  { BEGIN(IFDEF_SUPR); }
 <IFDEF_FALSE>`else { BEGIN(IFDEF_TRUE); }
 <IFDEF_SUPR>`else  {  }
 
 <IFDEF_FALSE,IFDEF_SUPR>"//"[^\r\n]* {  }
-
-<IFDEF_FALSE,IFDEF_SUPR>"/*" { comment_enter = YY_START; BEGIN(IFCCOMMENT); }
-<IFCCOMMENT>[^\r\n]    {  }
-<IFCCOMMENT>\n\r { istack->lineno += 1; }
-<IFCCOMMENT>\r\n { istack->lineno += 1; }
-<IFCCOMMENT>\n   { istack->lineno += 1; }
-<IFCCOMMENT>\r   { istack->lineno += 1; }
-<IFCCOMMENT>"*/" { BEGIN(comment_enter); }
-
 <IFDEF_FALSE,IFDEF_SUPR>[^\r\n]  {  }
 <IFDEF_FALSE,IFDEF_SUPR>\n\r { istack->lineno += 1; fputc('\n', yyout); }
 <IFDEF_FALSE,IFDEF_SUPR>\r\n { istack->lineno += 1; fputc('\n', yyout); }
@@ -389,7 +383,7 @@ W [ \t\b\f]+
   }
 
   /* This pattern notices macros and arranges for them to be replaced. */
-`[a-zA-Z_][a-zA-Z0-9_$]* { def_match(); }
+`[a-zA-Z][a-zA-Z0-9_$]* { def_match(); }
 
   /* Any text that is not a directive just gets passed through to the
      output. Very easy. */
@@ -825,7 +819,7 @@ static void lexor_done()
 	    ifdef_stack = cur->next;
 
 	    fprintf(stderr, "%s:%u: error: This `ifdef lacks an `endif.\n",
-		    cur->path, cur->lineno);
+		    cur->path, cur->lineno+1);
 
 	    free(cur->path);
 	    free(cur);
@@ -843,11 +837,14 @@ static int yywrap()
       int line_mask_flag = 0;
       struct include_stack_t*isp = istack;
       istack = isp->next;
+      FILE *delayed_close = (FILE *) 0;
 
 	/* Delete the current input buffers, and free the cell. */
       yy_delete_buffer(YY_CURRENT_BUFFER);
       if (isp->file) {
-	    fclose(isp->file);
+	      /* Delay the close of this file, because the yyrestart
+		 below seems to have some memory of this file. */
+	    delayed_close = isp->file;
 	    free(isp->path);
       } else {
 	      /* If I am printing line directives and I just finished
@@ -891,6 +888,7 @@ static int yywrap()
 	    }
 
 	    yyrestart(istack->file);
+	    if (delayed_close) fclose(delayed_close);
 	    return 0;
       }
 
@@ -899,6 +897,7 @@ static int yywrap()
 	   top. If I need to print a line directive, do so. */
 
       yy_switch_to_buffer(istack->yybs);
+      if (delayed_close) fclose(delayed_close);
 
       if (line_direct_flag && istack->path && !line_mask_flag)
 	    fprintf(yyout, "\n`line %u \"%s\" 2\n",

ivlpp/main.c

@@ -17,11 +17,10 @@ const char COPYRIGHT[] =
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: main.c,v 1.20.2.1 2006/06/27 01:37:14 steve Exp $"
+#ident "$Id: main.c,v 1.23 2006/10/02 18:16:18 steve Exp $"
 #endif
 
 # include "config.h"
-# include "version.h"
 
 const char NOTICE[] =
 "  This program is free software; you can redistribute it and/or modify\n"
@@ -39,6 +38,8 @@ const char NOTICE[] =
 "  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n"
 ;
 
+const char VERSION[] = "$Name:  $ $State: Exp $";
+
 # include  <stdio.h>
 # include  <stdlib.h>
 #ifdef HAVE_MALLOC_H
@@ -57,6 +58,8 @@ extern int getopt(int argc, char*argv[], const char*fmt);
 extern int optind;
 extern const char*optarg;
 #endif
+/* Path to the dependency file, if there is one. */
+char *dep_path = NULL;
 
 /*
  * Keep in source_list an array of pointers to file names. The array
@@ -88,6 +91,76 @@ int line_direct_flag = 0;
 unsigned error_count = 0;
 FILE *depend_file = NULL;
 
+static int flist_read_flags(const char*path)
+{
+      char line_buf[2048];
+      FILE*fd = fopen(path, "r");
+      if (fd == 0) {
+	    fprintf(stderr, "%s: unable to open for reading.\n", path);
+	    return -1;
+      }
+
+      while (fgets(line_buf, sizeof line_buf, fd) != 0) {
+	      /* Skip leading white space. */
+	    char*cp = line_buf + strspn(line_buf, " \t\r\b\f");
+	      /* Remove trailing white space. */
+	    char*tail = cp + strlen(cp);
+	    while (tail > cp) {
+		  if (! isspace(tail[-1]))
+			break;
+		  tail -= 1;
+		  tail[0] = 0;
+	    }
+
+	      /* Skip empty lines */
+	    if (*cp == 0)
+		  continue;
+	      /* Skip comment lines */
+	    if (cp[0] == '#')
+		  continue;
+
+	      /* The arg points to the argument to the keyword. */
+	    char*arg = strchr(cp, ':');
+	    if (arg) *arg++ = 0;
+
+	    if (strcmp(cp,"D") == 0) {
+		  char*val = strchr(arg, '=');
+		  if (val)
+			*val++ = 0;
+		  else
+			val = "1";
+
+		  define_macro(arg, val, 0);
+
+	    } else if (strcmp(cp,"I") == 0) {
+		  include_dir = realloc(include_dir,
+					(include_cnt+1)*sizeof(char*));
+		  include_dir[include_cnt] = strdup(arg);
+		  include_cnt += 1;
+
+	    } else if (strcmp(cp,"keyword") == 0) {
+		  char*buf = malloc(strlen(arg) + 2);
+		  buf[0] = '`';
+		  strcpy(buf+1, optarg);
+		  define_macro(optarg, buf, 1);
+		  free(buf);
+
+	    } else if (strcmp(cp,"M") == 0) {
+		  if (dep_path) {
+			fprintf(stderr, "duplicate -M flag.\n");
+		  } else {
+			dep_path = strdup(arg);
+		  }
+
+	    } else {
+		  fprintf(stderr, "%s: Invalid keyword %s\n", path, cp);
+	    }
+      }
+
+      fclose(fd);
+      return 0;
+}
+
 /*
  * This function reads from a file a list of file names. Each name
  * starts with the first non-space character, and ends with the last
@@ -125,8 +198,7 @@ int main(int argc, char*argv[])
       int opt, idx;
       const char*flist_path = 0;
       unsigned flag_errors = 0;
-      const char*out_path = 0;
-      const char*dep_path = NULL;
+      char*out_path = 0;
       FILE*out;
 
 	/* Define preprocessor keywords that I plan to just pass. */
@@ -152,20 +224,11 @@ int main(int argc, char*argv[])
       include_dir[0] = strdup(".");
       include_cnt = 1;
 
-      while ((opt = getopt(argc, argv, "D:f:I:K:LM:o:v")) != EOF) switch (opt) {
+      while ((opt=getopt(argc, argv, "F:f:K:Lo:v")) != EOF) switch (opt) {
 
-	  case 'D': {
-		char*tmp = strdup(optarg);
-		char*val = strchr(tmp, '=');
-		if (val)
-		      *val++ = 0;
-		else
-		      val = "1";
-
-		define_macro(tmp, val, 0);
-		free(tmp);
-		break;
-	  }
+	  case 'F':
+	    flist_read_flags(optarg);
+	    break;
 
 	  case 'f':
 	    if (flist_path) {
@@ -175,13 +238,6 @@ int main(int argc, char*argv[])
 	    flist_path = optarg;
 	    break;
 
-	  case 'I':
-	    include_dir = realloc(include_dir,
-					  (include_cnt+1)*sizeof(char*));
-	    include_dir[include_cnt] = strdup(optarg);
-	    include_cnt += 1;
-	    break;
-
 	  case 'K': {
 		char*buf = malloc(strlen(optarg) + 2);
 		buf[0] = '`';
@@ -195,14 +251,6 @@ int main(int argc, char*argv[])
 	    line_direct_flag = 1;
 	    break;
 
-	  case 'M':
-	    if (dep_path) {
-		  fprintf(stderr, "duplicate -M flag.\n");
-	    } else {
-		  dep_path = optarg;
-	    }
-	    break;
-
 	  case 'o':
 	    if (out_path) {
 		  fprintf(stderr, "duplicate -o flag.\n");
@@ -212,7 +260,7 @@ int main(int argc, char*argv[])
 	    break;
 
 	  case 'v':
-	    fprintf(stderr, "Icarus Verilog Preprocessor version %s\n\n",
+	    fprintf(stderr, "Icarus Verilog Preprocessor version %s\n",
 		    VERSION);
 	    fprintf(stderr, "%s\n", COPYRIGHT);
 	    fputs(NOTICE, stderr);
@@ -224,13 +272,11 @@ int main(int argc, char*argv[])
       }
 
       if (flag_errors) {
-	    fprintf(stderr, "\nUsage: %s [-v][-L][-I<dir>][-D<def>] <file>...\n"
-		    "    -D<def> - Predefine a value.\n"
+	    fprintf(stderr, "\nUsage: %s [-v][-L][-F<fil>][-f<fil>] <file>...\n"
+		    "    -F<fil> - Get defines and includes from file\n"
 		    "    -f<fil> - Read the sources listed in the file\n"
-		    "    -I<dir> - Add an include file search directory\n"
 		    "    -K<def> - Define a keyword macro that I just pass\n"
 		    "    -L      - Emit line number directives\n"
-		    "    -M<fil> - Write dependencies to <fil>\n"
 		    "    -o<fil> - Send the output to <fil>\n"
 		    "    -v      - Print version information\n",
 		    argv[0]);
@@ -289,8 +335,14 @@ int main(int argc, char*argv[])
 
 /*
  * $Log: main.c,v $
- * Revision 1.20.2.1  2006/06/27 01:37:14  steve
- *  Fix const/non-const warnings.
+ * Revision 1.23  2006/10/02 18:16:18  steve
+ *  Save dep_path because arg space is overrun.
+ *
+ * Revision 1.22  2006/07/26 00:11:40  steve
+ *  Pass depfiles through temp defines file.
+ *
+ * Revision 1.21  2006/07/26 00:02:48  steve
+ *  Pass defines and includes through temp file.
  *
  * Revision 1.20  2004/09/10 00:15:45  steve
  *  Remove bad casts.

lexor.lex

@@ -21,7 +21,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: lexor.lex,v 1.86.2.4 2007/02/09 05:29:24 steve Exp $"
+#ident "$Id: lexor.lex,v 1.96 2007/06/14 03:50:00 steve Exp $"
 #endif
 
 # include "config.h"
@@ -53,6 +53,7 @@ extern YYLTYPE yylloc;
 struct file_name_cell {
       const char*text;
       struct file_name_cell*next;
+      bool library_flag;
 };
 
 static struct file_name_cell*file_names = 0;
@@ -72,6 +73,13 @@ static const char* set_file_name(char*text)
       cur = new struct file_name_cell;
       cur->text = text;
       cur->next = file_names;
+
+	/* Check this file name with the list of library file
+	   names. If there is a match, then turn on the
+	   pform_library_flag. This is how the parser knows that
+	   modules declared in this file are library modules. */
+      cur->library_flag = library_file_map[cur->text];
+      pform_library_flag = cur->library_flag;
       return text;
 }
 
@@ -92,7 +100,6 @@ static int dec_buf_div2(char *buf);
 static void process_timescale(const char*txt);
 
 static int comment_enter;
-static bool in_module = false;
 %}
 
 %x CCOMMENT
@@ -136,6 +143,7 @@ W [ \t\b\f\r]+
 "<<<" { return K_LS; /* Note: Functionally, <<< is the same as <<. */}
 ">>"  { return K_RS; }
 ">>>" { return K_RSS; }
+"**" { return K_POW; }
 "<=" { return K_LE; }
 ">=" { return K_GE; }
 "=>" { return K_EG; }
@@ -158,7 +166,7 @@ W [ \t\b\f\r]+
   /* Watch out for the tricky case of (*). Cannot parse this as "(*"
      and ")", but since I know that this is really ( * ), replace it
      with "*" and return that. */
-"(*"{W}*")" { return '*'; }
+"("{W}*"*"{W}*")" { return '*'; }
 
 <EDGES>"]" { BEGIN(0); return yytext[0]; }
 [}{;:\[\],()#=.@&!?<>%|^~+*/-] { return yytext[0]; }
@@ -223,19 +231,21 @@ W [ \t\b\f\r]+
 		  rc = PATHPULSE_IDENTIFIER;
 	    break;
 
+	  case K_bool:
+	  case K_logic:
+	  case K_wone:
+	    if (! gn_cadence_types_enabled()) {
+		  yylval.text = strdup(yytext);
+		  rc = IDENTIFIER;
+	    } else {
+		  yylval.text = 0;
+	    }
+	    break;
+
 	  case K_edge:
 	    BEGIN(EDGES);
 	    break;
 
-	  case K_module:
-	  case K_macromodule:
-	    in_module = true;
-	    break;
-
-	  case K_endmodule:
-	    in_module = false;
-	    break;
-
 	  default:
 	    yylval.text = 0;
 	    break;
@@ -297,12 +307,6 @@ W [ \t\b\f\r]+
 ^{W}?`timescale { BEGIN(PPTIMESCALE); }
 <PPTIMESCALE>.* { process_timescale(yytext); }
 <PPTIMESCALE>\n {
-      if (in_module) {
-	    cerr << yylloc.text << ":" << yylloc.first_line << ": error: "
-	            "`timescale directive can not be inside a module "
-	            "definition." << endl;
-	    error_count += 1;
-      }
       yylloc.first_line += 1;
       BEGIN(0); }
 
@@ -481,7 +485,7 @@ static verinum*make_unsized_binary(const char*txt)
 	    ptr += 1;
       }
 
-      verinum*out = new verinum(bits, size);
+      verinum*out = new verinum(bits, size, false);
       out->has_sign(sign_flag);
       delete[]bits;
       return out;
@@ -541,7 +545,7 @@ static verinum*make_unsized_octal(const char*txt)
 	    ptr += 1;
       }
 
-      verinum*out = new verinum(bits, size);
+      verinum*out = new verinum(bits, size, false);
       out->has_sign(sign_flag);
       delete[]bits;
       return out;
@@ -611,7 +615,7 @@ static verinum*make_unsized_hex(const char*txt)
 	    ptr += 1;
       }
 
-      verinum*out = new verinum(bits, size);
+      verinum*out = new verinum(bits, size, false);
       out->has_sign(sign_flag);
       delete[]bits;
       return out;

lexor_keyword.gperf

@@ -14,6 +14,7 @@ always,		K_always
 and,		K_and
 assign,		K_assign
 begin,		K_begin
+bool,		K_bool
 buf,		K_buf
 bufif0,		K_bufif0
 bufif1,		K_bufif1
@@ -30,6 +31,7 @@ else,		K_else
 end,		K_end
 endcase,	K_endcase
 endfunction,	K_endfunction
+endgenerate,	K_endgenerate
 endmodule,	K_endmodule
 endprimitive,	K_endprimitive
 endspecify,	K_endspecify
@@ -41,6 +43,8 @@ force,		K_force
 forever,	K_forever
 fork,		K_fork
 function,	K_function
+generate,	K_generate
+genvar,		K_genvar
 highz0,		K_highz0
 highz1,		K_highz1
 if,		K_if
@@ -52,6 +56,7 @@ integer,	K_integer
 join,		K_join
 large,		K_large
 localparam,	K_localparam
+logic,		K_logic
 macromodule,	K_macromodule
 medium,		K_medium
 module,		K_module
@@ -111,6 +116,7 @@ weak0,		K_weak0
 weak1,		K_weak1
 while,		K_while
 wire,		K_wire
+wone,		K_wone
 wor,		K_wor
 xnor,		K_xnor
 xor,		K_xor

libveriuser/Makefile.in

@@ -16,12 +16,11 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.34.2.1 2005/02/23 18:40:24 steve Exp $"
+#ident "$Id: Makefile.in,v 1.36 2007/02/06 05:07:32 steve Exp $"
 #
 #
 SHELL = /bin/sh
 
-suffix = @install_suffix@
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -42,7 +41,6 @@ INSTALL_DATA = @INSTALL_DATA@
 CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
-STRIP = @STRIP@
 RANLIB = @RANLIB@
 
 A = a_close.o a_compare_handles.o a_configure.o a_fetch_argc.o \
@@ -93,19 +91,18 @@ clean:
 	rm -rf *.o dep libveriuser.a libveriuser.o bin32
 
 distclean: clean
-	rm -f Makefile config.status config.log config.cache
-	rm -rf autom4te.cache
+	rm -f Makefile config.status config.log config.cache config.h
 
-install:: all installdirs $(libdir64)/libveriuser$(suffix).a $(INSTALL32)
+install:: all installdirs $(libdir64)/libveriuser.a $(INSTALL32)
 
-$(libdir64)/libveriuser$(suffix).a: ./libveriuser.a
-	$(INSTALL_DATA) ./libveriuser.a $(libdir64)/libveriuser$(suffix).a
+$(libdir64)/libveriuser.a: ./libveriuser.a
+	$(INSTALL_DATA) ./libveriuser.a $(libdir64)/libveriuser.a
 
 installdirs: mkinstalldirs
 	$(srcdir)/mkinstalldirs $(includedir) $(libdir64)
 
 uninstall::
-	rm -f $(libdir64)/libveriuser$(suffix).a
+	rm -f $(libdir64)/libveriuser.a
 
 ifeq (@enable_vvp32@,yes)
 all32: bin32 bin32/libveriuser.a
@@ -124,13 +121,10 @@ bin32/libveriuser.a: bin32/libveriuser.o
 	ar cvq $@ bin32/libveriuser.o
 	$(RANLIB) $@
 
-install32: $(libdir)/libveriuser$(suffix).a
+install32: $(libdir)/libveriuser.a
 
-$(libdir)/libveriuser$(suffix).a: bin32/libveriuser.a
-	$(INSTALL_DATA) bin32/libveriuser.a $(libdir)/libveriuser$(suffix).a
-
-uninstall::
-	rm -f $(DESTDIR)$(libdir)/libveriuser$(suffix).a
+$(libdir)/libveriuser.a: bin32/libveriuser.a
+	$(INSTALL_DATA) bin32/libveriuser.a $(libdir)/libveriuser.a
 
 -include $(patsubst bin32/%.o, bin32/%.d, $(addprefix bin32/,$O))
 endif

libveriuser/a_next.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: a_next.c,v 1.3 2003/06/17 16:55:07 steve Exp $"
+#ident "$Id: a_next.c,v 1.4 2006/10/30 22:45:37 steve Exp $"
 #endif
 
 #include  <stdio.h>
@@ -94,6 +94,9 @@ handle acc_next_scope(handle scope, handle prev)
 
 /*
  * $Log: a_next.c,v $
+ * Revision 1.4  2006/10/30 22:45:37  steve
+ *  Updates for Cygwin portability (pr1585922)
+ *
  * Revision 1.3  2003/06/17 16:55:07  steve
  *  1) setlinebuf() for vpi_trace
  *  2) Addes error checks for trace file opens

libveriuser/configure.in

@@ -14,8 +14,6 @@ AX_CPP_IDENT
 #enable_vvp32=no
 AC_SUBST(enable_vvp32)
 
-AX_ENABLE_SUFFIX
-
 AC_CHECK_HEADERS(malloc.h)
 
 AC_CHECK_SIZEOF(unsigned long long)

libveriuser/getinstance.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: getinstance.c,v 1.4 2003/05/18 00:16:35 steve Exp $"
+#ident "$Id: getinstance.c,v 1.5 2005/09/20 18:34:01 steve Exp $"
 #endif
 
 #include  <veriuser.h>
@@ -28,11 +28,14 @@
  */
 PLI_BYTE8* tf_getinstance(void)
 {
-      return (char *)vpi_handle(vpiSysTfCall, 0 /* NULL */);
+      return (PLI_BYTE8 *)vpi_handle(vpiSysTfCall, 0 /* NULL */);
 }
 
 /*
  * $Log: getinstance.c,v $
+ * Revision 1.5  2005/09/20 18:34:01  steve
+ *  Clean up compiler warnings.
+ *
  * Revision 1.4  2003/05/18 00:16:35  steve
  *  Add PLI_TRACE tracing of PLI1 modules.
  *

libveriuser/veriusertfs.c

@@ -18,7 +18,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: veriusertfs.c,v 1.15 2004/09/10 23:13:05 steve Exp $"
+#ident "$Id: veriusertfs.c,v 1.17 2007/05/08 22:01:26 steve Exp $"
 #endif
 
 /*
@@ -58,7 +58,7 @@ void veriusertfs_register_table(p_tfcell vtable)
       p_tfcell tf;
       s_vpi_systf_data tf_data;
       p_pli_data data;
-      char trace_buf[1024];
+      static char trace_buf[1024];
 
       if (!pli_trace && (path = getenv("PLI_TRACE"))) {
 	    if (strcmp(path,"-") == 0)
@@ -69,8 +69,8 @@ void veriusertfs_register_table(p_tfcell vtable)
 			perror(path);
 			exit(1);
 		  }
-		  setvbuf(pli_trace, trace_buf, _IOLBF, sizeof(trace_buf));
 	    }
+	    setvbuf(pli_trace, trace_buf, _IOLBF, sizeof(trace_buf));
       }
 
       for (tf = vtable; tf; tf++) {
@@ -109,7 +109,7 @@ void veriusertfs_register_table(p_tfcell vtable)
 	    tf_data.tfname = tf->tfname;
 	    tf_data.compiletf = compiletf;
 	    tf_data.calltf = calltf;
-	    tf_data.sizetf = (PLI_INT32 (*)(char *))tf->sizetf;
+	    tf_data.sizetf = tf->sizetf;
 	    tf_data.user_data = (char *)data;
 
 	    if (pli_trace) {
@@ -255,7 +255,7 @@ static PLI_INT32 callback(p_cb_data data)
       p_tfcell tf;
       int reason;
       int paramvc = 0;
-      int rc;
+      PLI_INT32 rc;
 
 	/* not enabled */
       if (data->reason == cbValueChange && !async_misctf_enable)
@@ -389,6 +389,12 @@ PLI_INT32 tf_setrealdelay(double dly)
 }
 /*
  * $Log: veriusertfs.c,v $
+ * Revision 1.17  2007/05/08 22:01:26  steve
+ *  Trace file line buffer must be static.
+ *
+ * Revision 1.16  2006/10/30 22:45:37  steve
+ *  Updates for Cygwin portability (pr1585922)
+ *
  * Revision 1.15  2004/09/10 23:13:05  steve
  *  Compile cleanup of C code.
  *

link_const.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: link_const.cc,v 1.17 2004/10/04 01:10:53 steve Exp $"
+#ident "$Id: link_const.cc,v 1.18 2007/04/14 03:10:51 steve Exp $"
 #endif
 
 # include "config.h"
@@ -132,6 +132,8 @@ verinum::V Nexus::driven_value() const
 
 	    } else if ((sig = dynamic_cast<const NetNet*>(cur->get_obj()))) {
 
+		    // If we find an attached SUPPLY0/1, the we know
+		    // from that what the driven value is. Stop now.
 		  if (sig->type() == NetNet::SUPPLY0) {
 			driven_ = V0;
 			return verinum::V0;
@@ -140,6 +142,16 @@ verinum::V Nexus::driven_value() const
 			driven_ = V1;
 			return verinum::V1;
 		  }
+
+		    // If we find an attached TRI0/1, then this is a
+		    // good guess for the driven value, but keep
+		    // looking for something better.
+		  if (sig->type() == NetNet::TRI0) {
+			val = verinum::V0;
+		  }
+		  if (sig->type() == NetNet::TRI1) {
+			val = verinum::V1;
+		  }
 	    }
       }
 
@@ -164,6 +176,9 @@ verinum::V Nexus::driven_value() const
 
 /*
  * $Log: link_const.cc,v $
+ * Revision 1.18  2007/04/14 03:10:51  steve
+ *  Properly account for tri0 connected to otherwise open mux input.
+ *
  * Revision 1.17  2004/10/04 01:10:53  steve
  *  Clean up spurious trailing white space.
  *

load_module.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: load_module.cc,v 1.12.2.1 2005/03/22 15:53:12 steve Exp $"
+#ident "$Id: load_module.cc,v 1.13 2005/03/22 15:53:48 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -31,8 +31,6 @@
 # include  <dirent.h>
 # include  <ctype.h>
 # include  <assert.h>
-# include  <cstdlib>
-# include  <cstring>
 
 /*
  * The module library items are maps of key names to file name within
@@ -195,7 +193,7 @@ int build_library_index(const char*path, bool key_case_sensitive)
 
 /*
  * $Log: load_module.cc,v $
- * Revision 1.12.2.1  2005/03/22 15:53:12  steve
+ * Revision 1.13  2005/03/22 15:53:48  steve
  *  popen must be matched by pclose.
  *
  * Revision 1.12  2003/06/05 04:31:09  steve

macosx.txt

@@ -1,11 +1,4 @@
 
-Icarus Verilog for Mac OS X
-
-   NOTE: Icarus Verilog version 0.8 is known to compile "out of the
-   box" on MacOSX 10.3. OSX 10.3 users need only the developer tools
-   included with new systems or available for free download from
-   Apple. Install Xcode and skip directly to step #3.
-
 This file describes the procedure to build and install Icarus Verilog
 on Mac OS X.  I assume that you have experience with Unix and
 Terminal.app and a basic knowledge of how to download, compile and

main.cc

@@ -1,6 +1,6 @@
 
 const char COPYRIGHT[] =
-          "Copyright (c) 1998-2004 Stephen Williams ([email protected])";
+          "Copyright (c) 1998-2005 Stephen Williams ([email protected])";
 
 /*
  *    This source code is free software; you can redistribute it
@@ -19,7 +19,7 @@ const char COPYRIGHT[] =
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: main.cc,v 1.86.2.3 2006/06/12 00:16:53 steve Exp $"
+#ident "$Id: main.cc,v 1.95 2007/04/19 02:52:53 steve Exp $"
 #endif
 
 # include "config.h"
@@ -59,7 +59,6 @@ const char NOTICE[] =
 # include  "netlist.h"
 # include  "target.h"
 # include  "compiler.h"
-# include  "version.h"
 
 #if defined(__MINGW32__) && !defined(HAVE_GETOPT_H)
 extern "C" int getopt(int argc, char*argv[], const char*fmt);
@@ -76,16 +75,26 @@ extern "C" const char*optarg;
 /* Count errors detected in flag processing. */
 unsigned flag_errors = 0;
 
+const char VERSION[] = "$Name:  $";
+
 const char*basedir = ".";
 
 const char*target = "null";
 
+/*
+ * These are the language support control flags. These support which
+ * language features (the generation) to support. The generation_flag
+ * is a major moce, and the gn_* flags control specifc sub-features.
+ */
 generation_t generation_flag = GN_DEFAULT;
+bool gn_cadence_types_flag = true;
+bool gn_specify_blocks_flag = true;
 
 map<string,const char*> flags;
 char*vpi_module_list = 0;
 
 map<perm_string,unsigned> missing_modules;
+map<string,bool> library_file_map;
 
 list<const char*> library_suff;
 
@@ -102,7 +111,6 @@ FILE *depend_file = NULL;
 bool warn_implicit  = false;
 bool warn_timescale = false;
 bool warn_portbinding = false;
-bool warn_unused = false;
 
 bool error_implicit = false;
 
@@ -112,14 +120,14 @@ bool error_implicit = false;
 bool debug_scopes = false;
 bool debug_eval_tree = false;
 bool debug_elaborate = false;
-bool debug_synth = false;
-bool debug_cprop = false;
-
+bool debug_synth2 = false;
 /*
  * Verbose messages enabled.
  */
 bool verbose_flag = false;
 
+unsigned integer_width = 32;
+
 /*
  * Keep a heap of identifier strings that I encounter. This is a more
  * efficient way to allocate those strings.
@@ -135,17 +143,14 @@ const bool CASE_SENSITIVE = false;
 const bool CASE_SENSITIVE = true;
 #endif
 
-/*
- * Are we doing synthesis?
- */
-bool synthesis = false;
-
 extern void cprop(Design*des);
 extern void synth(Design*des);
 extern void synth2(Design*des);
 extern void syn_rules(Design*des);
 extern void nodangle(Design*des);
+#ifdef WITH_T_XNF
 extern void xnfio(Design*des);
+#endif
 
 typedef void (*net_func)(Design*);
 static struct net_func_map {
@@ -157,7 +162,9 @@ static struct net_func_map {
       { "synth",   &synth },
       { "synth2",  &synth2 },
       { "syn-rules",   &syn_rules },
+#ifdef WITH_T_XNF
       { "xnfio",   &xnfio },
+#endif
       { 0, 0 }
 };
 
@@ -183,17 +190,29 @@ const char *net_func_to_name(const net_func func)
 
 static void process_generation_flag(const char*gen)
 {
-      if (strcmp(gen,"1") == 0)
+      if (strcmp(gen,"1") == 0) {
 	    generation_flag = GN_VER1995;
 
-      else if (strcmp(gen,"2") == 0)
+      } else if (strcmp(gen,"2") == 0) {
 	    generation_flag = GN_VER2001;
 
-      else if (strcmp(gen,"3.0") == 0)
-	    generation_flag = GN_SYSVER30;
+      } else if (strcmp(gen,"2x") == 0) {
+	    generation_flag = GN_VER2001X;
 
-      else
-	    generation_flag = GN_DEFAULT;
+      } else if (strcmp(gen,"xtypes") == 0) {
+	    gn_cadence_types_flag = true;
+
+      } else if (strcmp(gen,"no-xtypes") == 0) {
+	    gn_cadence_types_flag = false;
+
+      } else if (strcmp(gen,"specify") == 0) {
+	    gn_specify_blocks_flag = true;
+ 
+      } else if (strcmp(gen,"no-specify") == 0) {
+	    gn_specify_blocks_flag = false;
+ 
+      } else {
+      }
 }
 
 static void parm_to_flagmap(const string&flag)
@@ -254,13 +273,22 @@ static void parm_to_flagmap(const string&flag)
  *    functor:<name>
  *        Append a named functor to the processing path.
  *
- *    generation:<1|2|3.0>
+ *    generation:<1|2|2x|xtypes|no-xtypes|specify|no-specify>
  *        This is the generation flag
  *
  *    ivlpp:<preprocessor command>
  *        This specifies the ivlpp command line used to process
  *        library modules as I read them in.
  *
+ *    iwidth:<bits>
+ *        This specifies the width of integer variables. (that is,
+ *        variables declared using the "integer" keyword.)
+ *
+ *    library_file:<path>
+ *        This marks that a source file with the given path is a
+ *        library. Any modules in that file are marked as library
+ *        modules.
+ *
  *    module:<name>
  *        Load a VPI module.
  *
@@ -322,12 +350,9 @@ static void read_iconfig_file(const char*ipath)
 		  } else if (strcmp(cp,"elaborate") == 0) {
 			debug_elaborate = true;
 			cerr << "debug: Enable elaborate debug" << endl;
-		  } else if (strcmp(cp,"synth") == 0) {
-			debug_synth = true;
-			cerr << "debug: Enable synthesis debug" << endl;
-		  } else if (strcmp(cp,"cprop") == 0) {
-			debug_cprop = true;
-			cerr << "debug: Enable cprop debug" << endl;
+		  } else if (strcmp(cp,"synth2") == 0) {
+			debug_synth2 = true;
+			cerr << "debug: Enable synth2 debug" << endl;
 		  } else {
 		  }
 
@@ -339,9 +364,6 @@ static void read_iconfig_file(const char*ipath)
 		  parm_to_flagmap(parm);
 
 	    } else if (strcmp(buf,"functor") == 0) {
-		if (strncmp(cp, "synth", 5) == 0) {
-		      synthesis = true;  // We are doing synthesis.
-		}
 		net_func tmp = name_to_net_func(cp);
 		if (tmp == 0) {
 		      cerr << "No such design transform function ``"
@@ -357,6 +379,13 @@ static void read_iconfig_file(const char*ipath)
 	    } else if (strcmp(buf, "ivlpp") == 0) {
 		  ivlpp_string = strdup(cp);
 
+	    } else if (strcmp(buf, "iwidth") == 0) {
+		  integer_width = strtoul(cp,0,10);
+
+	    } else if (strcmp(buf, "library_file") == 0) {
+		  const char* path = strdup(cp);
+		  library_file_map[path] = true;
+
 	    } else if (strcmp(buf,"module") == 0) {
 		  if (vpi_module_list == 0) {
 			vpi_module_list = strdup(cp);
@@ -393,9 +422,6 @@ static void read_iconfig_file(const char*ipath)
 		      case 't':
 			warn_timescale = true;
 			break;
-		      case 'u':
-			warn_unused = true;
-			break;
 		      default:
 			break;
 		  }
@@ -503,7 +529,7 @@ int main(int argc, char*argv[])
 #          endif
 	    break;
 	  case 'V':
-	    cout << "Icarus Verilog version " << VERSION << endl << endl;
+	    cout << "Icarus Verilog version " << VERSION << endl;
 	    cout << COPYRIGHT << endl;
 	    cout << endl << NOTICE << endl;
 	    return 0;
@@ -516,8 +542,8 @@ int main(int argc, char*argv[])
 	    return flag_errors;
 
       if (help_flag) {
-	    cout << "Icarus Verilog version " << VERSION << endl << endl <<
-"Usage: ivl <options> <file>\n"
+	    cout << "Icarus Verilog version " << VERSION << endl <<
+"usage: ivl <options> <file>\n"
 "options:\n"
 "\t-C <name>        Config file from driver.\n"
 "\t-h               Print usage information, and exit.\n"
@@ -560,11 +586,21 @@ int main(int argc, char*argv[])
 		case GN_VER2001:
 		  cout << "IEEE1364-2001";
 		  break;
-		case GN_SYSVER30:
-		  cout << "SystemVerilog 3.0";
+		case GN_VER2001X:
+		  cout << "IEEE1364-2001+Extensions";
 		  break;
 	    }
 
+	    if (gn_specify_blocks_flag)
+		  cout << ",specify";
+	    else
+		  cout << ",no-specify";
+
+	    if (gn_cadence_types_flag)
+		  cout << ",xtypes";
+	    else
+		  cout << ",no-xtypes";
+
 	    cout << endl << "PARSING INPUT" << endl;
       }
 
@@ -617,11 +653,20 @@ int main(int argc, char*argv[])
 	    for (mod = pform_modules.begin()
 		       ; mod != pform_modules.end()
 		       ; mod++) {
-		  if (mentioned_p[(*mod).second->mod_name()] == false) {
-			if (verbose_flag)
-			      cout << " " << (*mod).second->mod_name();
-			roots.push_back((*mod).second->mod_name());
-		  }
+
+		    /* Don't choose library modules. */
+		  if ((*mod).second->library_flag)
+			continue;
+
+		    /* Don't choose modules instantiated in other
+		       modules. */
+		  if (mentioned_p[(*mod).second->mod_name()])
+			continue;
+
+		    /* What's left might as well be chosen as a root. */
+		  if (verbose_flag)
+			cout << " " << (*mod).second->mod_name();
+		  roots.push_back((*mod).second->mod_name());
 	    }
 	    if (verbose_flag)
 		  cout << endl;
@@ -717,12 +762,18 @@ int main(int argc, char*argv[])
 	    cout << "CODE GENERATION -t "<<target<< endl;
       }
 
-      bool emit_rc;
+      int emit_rc;
       emit_rc = emit(des, target);
-      if (!emit_rc) {
-	    cerr << "error: Code generation had errors." << endl;
+      if (emit_rc > 0) {
+	    cerr << "error: Code generation had "
+		 << emit_rc << " errors."
+		 << endl;
 	    return 1;
       }
+      if (emit_rc < 0) {
+	    cerr << "error: Code generator failure: " << emit_rc << endl;
+	    return -1;
+      }
 
       if (verbose_flag) {
 	    if (times_flag) {
@@ -764,14 +815,34 @@ int main(int argc, char*argv[])
 
 /*
  * $Log: main.cc,v $
- * Revision 1.86.2.3  2006/06/12 00:16:53  steve
- *  Add support for -Wunused warnings.
+ * Revision 1.95  2007/04/19 02:52:53  steve
+ *  Add support for -v flag in command file.
  *
- * Revision 1.86.2.2  2006/04/23 04:25:45  steve
- *  Add cprop debugging.
+ * Revision 1.94  2007/03/07 04:24:59  steve
+ *  Make integer width controllable.
  *
- * Revision 1.86.2.1  2006/04/01 01:37:24  steve
- *  Add synth debug flag
+ * Revision 1.93  2006/09/28 04:35:18  steve
+ *  Support selective control of specify and xtypes features.
+ *
+ * Revision 1.92  2005/07/14 23:38:43  steve
+ *  Display as version 0.9.devel
+ *
+ * Revision 1.91  2005/07/07 16:22:49  steve
+ *  Generalize signals to carry types.
+ *
+ * Revision 1.90  2005/06/28 04:25:55  steve
+ *  Remove reference to SystemVerilog.
+ *
+ * Revision 1.89  2005/04/24 23:44:02  steve
+ *  Update DFF support to new data flow.
+ *
+ * Revision 1.88  2005/01/22 01:06:55  steve
+ *  Change case compare from logic to an LPM node.
+ *
+ * Revision 1.87  2004/12/11 02:31:26  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
  *
  * Revision 1.86  2004/10/04 01:10:53  steve
  *  Clean up spurious trailing white space.

mingw.txt

@@ -71,7 +71,7 @@ The msys package is available from the mingw download site. This is
 not the compiler but a collection of *nix tools ported to Windows and
 wrapped in a convenient installer. The msys package is all the various
 basic tools (shells, file utils, etc) and the msysDTK is extra
-developer tools other then the compiler.
+developer tools other than the compiler.
 
 Download the msys-1.x.x.exe and msysdtc-1.x.x.exe binaries. These are
 self-installing packages. Install msys first, and then msysDTC. Most

net_assign.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_assign.cc,v 1.18.2.3 2006/05/02 02:00:15 steve Exp $"
+#ident "$Id: net_assign.cc,v 1.22 2007/01/16 05:44:15 steve Exp $"
 #endif
 
 # include "config.h"
@@ -39,31 +39,11 @@ unsigned count_lval_width(const NetAssign_*idx)
 }
 
 NetAssign_::NetAssign_(NetNet*s)
-: sig_(s), mem_(0), var_(0), bmux_(0)
+: sig_(s), word_(0), base_(0)
 {
-      loff_ = 0;
-      lwid_ = sig_->pin_count();
+      lwid_ = sig_->vector_width();
       sig_->incr_lref();
       more = 0;
-      mem_lref_ = false;
-}
-
-NetAssign_::NetAssign_(NetMemory*s)
-: sig_(0), mem_(s), var_(0), bmux_(0)
-{
-      loff_ = 0;
-      lwid_ = mem_->width();
-      more = 0;
-      mem_lref_ = false;
-}
-
-NetAssign_::NetAssign_(NetVariable*s)
-: sig_(0), mem_(0), var_(s), bmux_(0)
-{
-      loff_ = 0;
-      lwid_ = 0;
-      more = 0;
-      mem_lref_ = false;
 }
 
 NetAssign_::~NetAssign_()
@@ -74,47 +54,40 @@ NetAssign_::~NetAssign_()
 		  sig_->type(NetNet::WIRE);
       }
 
-      if (mem_) {
-	    NetNet*exp = mem_->reg_from_explode();
-	    if (exp && mem_lref_) {
-		  exp->decr_lref();
-		  if (turn_sig_to_wire_on_release_ && exp->peek_lref() == 0)
-			exp->type(NetNet::WIRE);
-	    }
-      }
       assert( more == 0 );
-      if (bmux_) delete bmux_;
+      if (word_) delete word_;
 }
 
-void NetAssign_::set_bmux(NetExpr*r)
+void NetAssign_::set_word(NetExpr*r)
 {
-      assert(bmux_ == 0);
-      bmux_ = r;
+      assert(word_ == 0);
+      word_ = r;
 }
 
-NetExpr* NetAssign_::bmux()
+NetExpr* NetAssign_::word()
 {
-      return bmux_;
+      return word_;
 }
 
-const NetExpr* NetAssign_::bmux() const
+const NetExpr* NetAssign_::word() const
 {
-      return bmux_;
+      return word_;
+}
+
+const NetExpr* NetAssign_::get_base() const
+{
+      return base_;
 }
 
 unsigned NetAssign_::lwidth() const
 {
-      if (mem_)  return lwid_;
-      else if (bmux_) return 1;
-      else return lwid_;
+      return lwid_;
 }
 
 perm_string NetAssign_::name() const
 {
       if (sig_) {
 	    return sig_->name();
-      } else if (mem_) {
-	    return mem_->name();
       } else {
 	    return perm_string::literal("");
       }
@@ -122,48 +95,13 @@ perm_string NetAssign_::name() const
 
 NetNet* NetAssign_::sig() const
 {
-      if (mem_)
-	    return 0;
-      else
-	    return sig_;
+      return sig_;
 }
 
-NetMemory* NetAssign_::mem() const
+void NetAssign_::set_part(NetExpr*base, unsigned wid)
 {
-      return mem_;
-}
-
-NetVariable* NetAssign_::var() const
-{
-      return var_;
-}
-
-void NetAssign_::incr_mem_lref()
-{
-      if (! mem_lref_) {
-	    assert(mem_);
-	    NetNet*exp = mem_->reg_from_explode();
-	    assert(exp);
-	    exp->incr_lref();
-	    mem_lref_ = true;
-      }
-}
-
-void NetAssign_::set_part(unsigned lo, unsigned lw)
-{
-      loff_ = lo;
-      lwid_ = lw;
-      if (sig_) {
-	    assert(sig_->pin_count() >= (lo + lw));
-      } else {
-	    assert(mem_);
-	    assert(lwid_ == mem_->width());
-      }
-}
-
-unsigned NetAssign_::get_loff() const
-{
-      return loff_;
+      base_ = base;
+      lwid_ = wid;
 }
 
 /*
@@ -283,16 +221,60 @@ NetAssignNB::~NetAssignNB()
 {
 }
 
+NetCAssign::NetCAssign(NetAssign_*lv, NetExpr*rv)
+: NetAssignBase(lv, rv)
+{
+}
+
+NetCAssign::~NetCAssign()
+{
+}
+
+NetDeassign::NetDeassign(NetAssign_*l)
+: NetAssignBase(l, 0)
+{
+}
+
+NetDeassign::~NetDeassign()
+{
+}
+
+NetForce::NetForce(NetAssign_*lv, NetExpr*rv)
+: NetAssignBase(lv, rv)
+{
+}
+
+NetForce::~NetForce()
+{
+}
+
+NetRelease::NetRelease(NetAssign_*l)
+: NetAssignBase(l, 0)
+{
+}
+
+NetRelease::~NetRelease()
+{
+}
+
 /*
  * $Log: net_assign.cc,v $
- * Revision 1.18.2.3  2006/05/02 02:00:15  steve
- *  Fix uninitialized mem_lref_ member.
+ * Revision 1.22  2007/01/16 05:44:15  steve
+ *  Major rework of array handling. Memories are replaced with the
+ *  more general concept of arrays. The NetMemory and NetEMemory
+ *  classes are removed from the ivl core program, and the IVL_LPM_RAM
+ *  lpm type is removed from the ivl_target API.
  *
- * Revision 1.18.2.2  2006/04/16 19:26:38  steve
- *  Fix handling of exploded memories with partial or missing resets.
+ * Revision 1.21  2006/02/02 02:43:58  steve
+ *  Allow part selects of memory words in l-values.
  *
- * Revision 1.18.2.1  2006/03/12 07:34:17  steve
- *  Fix the memsynth1 case.
+ * Revision 1.20  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
+ * Revision 1.19  2004/12/11 02:31:26  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
  *
  * Revision 1.18  2004/08/28 15:08:31  steve
  *  Do not change reg to wire in NetAssign_ unless synthesizing.
@@ -303,37 +285,5 @@ NetAssignNB::~NetAssignNB()
  * Revision 1.16  2003/01/26 21:15:58  steve
  *  Rework expression parsing and elaboration to
  *  accommodate real/realtime values and expressions.
- *
- * Revision 1.15  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.14  2002/08/04 18:28:15  steve
- *  Do not use hierarchical names of memories to
- *  generate vvp labels. -tdll target does not
- *  used hierarchical name string to look up the
- *  memory objects in the design.
- *
- * Revision 1.13  2002/07/02 03:02:57  steve
- *  Change the signal to a net when assignments go away.
- *
- * Revision 1.12  2002/06/08 23:42:46  steve
- *  Add NetRamDq synthsesis from memory l-values.
- *
- * Revision 1.11  2002/06/04 05:38:44  steve
- *  Add support for memory words in l-value of
- *  blocking assignments, and remove the special
- *  NetAssignMem class.
- *
- * Revision 1.10  2002/05/26 01:39:02  steve
- *  Carry Verilog 2001 attributes with processes,
- *  all the way through to the ivl_target API.
- *
- *  Divide signal reference counts between rval
- *  and lval references.
- *
- * Revision 1.9  2002/04/21 22:31:02  steve
- *  Redo handling of assignment internal delays.
- *  Leave it possible for them to be calculated
- *  at run time.
  */
 

net_design.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_design.cc,v 1.45.2.1 2006/10/04 00:34:45 steve Exp $"
+#ident "$Id: net_design.cc,v 1.54 2007/06/05 04:18:09 steve Exp $"
 #endif
 
 # include "config.h"
@@ -32,8 +32,8 @@
 # include  "netlist.h"
 # include  "util.h"
 # include  "compiler.h"
+# include  "netmisc.h"
 # include  <sstream>
-# include  <cstring>
 
 Design:: Design()
 : errors(0), nodes_(0), procs_(0), lcounter_(0)
@@ -68,8 +68,8 @@ int Design::get_precision() const
       return des_precision_;
 }
 
-unsigned long Design::scale_to_precision(unsigned long val,
-					 const NetScope*scope) const
+uint64_t Design::scale_to_precision(uint64_t val,
+				    const NetScope*scope) const
 {
       int units = scope->time_unit();
       assert( units >= des_precision_ );
@@ -85,7 +85,7 @@ unsigned long Design::scale_to_precision(unsigned long val,
 NetScope* Design::make_root_scope(perm_string root)
 {
       NetScope *root_scope_;
-      root_scope_ = new NetScope(0, root, NetScope::MODULE);
+      root_scope_ = new NetScope(0, hname_t(root), NetScope::MODULE);
 	/* This relies on the fact that the basename return value is
 	   permallocated. */
       root_scope_->set_module_name(root_scope_->basename());
@@ -115,26 +115,27 @@ const list<NetScope*> Design::find_root_scopes() const
  * more step down the tree until the name runs out or the search
  * fails.
  */
-NetScope* Design::find_scope(const hname_t&path) const
+NetScope* Design::find_scope(const std::list<hname_t>&path) const
 {
-      if (path.peek_name(0) == 0)
+      if (path.empty())
 	    return 0;
 
       for (list<NetScope*>::const_iterator scope = root_scopes_.begin()
 		 ; scope != root_scopes_.end(); scope++) {
 
 	    NetScope*cur = *scope;
-	    if (strcmp(path.peek_name(0), cur->basename()) != 0)
+	    if (path.front() != cur->fullname())
 		  continue;
 
-	    unsigned hidx = 1;
-	    while (cur) {
-		  const char*name = path.peek_name(hidx);
-		  if (name == 0)
-			return cur;
+	    std::list<hname_t> tmp = path;
+	    tmp.pop_front();
 
-		  cur = cur->child(name);
-		  hidx += 1;
+	    while (cur) {
+		  if (tmp.empty()) return cur;
+
+		  cur = cur->child( tmp.front() );
+
+		  tmp.pop_front();
 	    }
 
       }
@@ -144,28 +145,34 @@ NetScope* Design::find_scope(const hname_t&path) const
 
 /*
  * This is a relative lookup of a scope by name. The starting point is
- * the scope parameter is the place within which I start looking for
- * the scope. If I do not find the scope within the passed scope,
- * start looking in parent scopes until I find it, or I run out of
- * parent scopes.
+ * the scope parameter within which I start looking for the scope. If
+ * I do not find the scope within the passed scope, start looking in
+ * parent scopes until I find it, or I run out of parent scopes.
  */
-NetScope* Design::find_scope(NetScope*scope, const hname_t&path) const
+NetScope* Design::find_scope(NetScope*scope, const std::list<hname_t>&path) const
 {
       assert(scope);
-      if (path.peek_name(0) == 0)
+      if (path.empty())
 	    return scope;
 
       for ( ; scope ;  scope = scope->parent()) {
-	    unsigned hidx = 0;
-	    const char*key = path.peek_name(hidx);
+
+	    std::list<hname_t> tmp = path;
 
 	    NetScope*cur = scope;
 	    do {
-		  cur = cur->child(key);
-		  if (cur == 0) break;
-		  hidx += 1;
-		  key = path.peek_name(hidx);
-	    } while (key);
+		  hname_t key = tmp.front();
+		  if (cur->type() == NetScope::MODULE
+		      && cur->module_name()==key.peek_name()) {
+
+			  /* Up references may match module name */
+
+		  } else {
+			cur = cur->child( key );
+			if (cur == 0) break;
+		  }
+		  tmp.pop_front();
+	    } while (!tmp.empty());
 
 	    if (cur) return cur;
       }
@@ -174,71 +181,6 @@ NetScope* Design::find_scope(NetScope*scope, const hname_t&path) const
       return find_scope(path);
 }
 
-/*
- * Find a parameter from within a specified context. If the name is
- * not here, keep looking up until I run out of up to look at. The
- * method works by scanning scopes, starting with the passed scope and
- * working up towards the root, looking for the named parameter. The
- * name in this case can be hierarchical, so there is an inner loop to
- * follow the scopes of the name down to to key.
- *
- * The expression value of the parameter is returned as the result,
- * and the scope that contains the parameter is returned in the out
- * argument found_in.
- */
-const NetExpr* Design::find_parameter(NetScope*scope,
-				      const hname_t&path,
-				      NetScope*&found_in) const
-{
-      for ( ; scope ;  scope = scope->parent()) {
-	    unsigned hidx = 0;
-
-	    NetScope*cur = scope;
-	    while (path.peek_name(hidx+1)) {
-		  cur = cur->child(path.peek_name(hidx));
-		  if (cur == 0)
-			break;
-		  hidx += 1;
-	    }
-
-	    if (cur == 0)
-		  continue;
-
-	    if (const NetExpr*res = cur->get_parameter(path.peek_name(hidx))) {
-		  found_in = cur;
-		  return res;
-	    }
-      }
-
-      return 0;
-}
-
-const NetExpr* Design::find_parameter(const NetScope*scope,
-				      const hname_t&path) const
-{
-      for ( ; scope ;  scope = scope->parent()) {
-	    unsigned hidx = 0;
-
-	    const NetScope*cur = scope;
-	    while (path.peek_name(hidx+1)) {
-		  cur = cur->child(path.peek_name(hidx));
-		  if (cur == 0)
-			break;
-		  hidx += 1;
-	    }
-
-	    if (cur == 0)
-		  continue;
-
-	    if (const NetExpr*res = cur->get_parameter(path.peek_name(hidx)))
-		  return res;
-
-      }
-
-      return 0;
-}
-
-
 /*
  * This method runs through the scope, noticing the defparam
  * statements that were collected during the elaborate_scope pass and
@@ -262,29 +204,30 @@ void NetScope::run_defparams(Design*des)
 	}
       }
 
-      map<hname_t,NetExpr*>::const_iterator pp;
+      map<pform_name_t,NetExpr*>::const_iterator pp;
       for (pp = defparams.begin() ;  pp != defparams.end() ;  pp ++ ) {
 	    NetExpr*val = (*pp).second;
-	    hname_t path = (*pp).first;
+	    pform_name_t path = (*pp).first;
 
-	    char*tmp = path.remove_tail_name();
-	    perm_string perm_name = lex_strings.make(tmp);
-	    delete[]tmp;
+	    perm_string perm_name = peek_tail_name(path);
+	    path.pop_back();
+
+	    list<hname_t> eval_path = eval_scope_path(des, this, path);
 
 	      /* If there is no path on the name, then the targ_scope
 		 is the current scope. */
-	    NetScope*targ_scope = des->find_scope(this, path);
+	    NetScope*targ_scope = des->find_scope(this, eval_path);
 	    if (targ_scope == 0) {
 		  cerr << val->get_line() << ": warning: scope of " <<
 			path << "." << perm_name << " not found." << endl;
 		  continue;
 	    }
 
-	    bool flag = targ_scope->replace_parameter(perm_name, val->dup_expr());
+	    bool flag = targ_scope->replace_parameter(perm_name, val);
 	    if (! flag) {
 		  cerr << val->get_line() << ": warning: parameter "
 		       << perm_name << " not found in "
-		       << targ_scope->name() << "." << endl;
+		       << scope_path(targ_scope) << "." << endl;
 	    }
 
       }
@@ -391,19 +334,27 @@ void NetScope::evaluate_parameters(Design*des)
 	    assert(expr);
 
 	    switch (expr->expr_type()) {
-		case NetExpr::ET_REAL:
+		case IVL_VT_REAL:
 		  if (! dynamic_cast<const NetECReal*>(expr)) {
-			cerr << (*cur).second.expr->get_line()
-			     << ": internal error: "
-			      "unable to evaluate real parameter values: " <<
-			      *expr << endl;
-			cerr << "FYI: V0.8 cannot evaluate constant real expressions." << endl;
-			des->errors += 1;
-			continue;
+
+			NetExpr*nexpr = expr->eval_tree();
+			if (nexpr == 0) {
+			      cerr << (*cur).second.expr->get_line()
+				   << ": internal error: "
+				   << "unable to evaluate real parameter value: "
+				   << *expr << endl;
+			      des->errors += 1;
+			      continue;
+			}
+
+			assert(nexpr);
+			delete expr;
+			(*cur).second.expr = nexpr;
 		  }
 		  break;
 
-		case NetExpr::ET_VECTOR:
+		case IVL_VT_LOGIC:
+		case IVL_VT_BOOL:
 		  if (! dynamic_cast<const NetEConst*>(expr)) {
 
 			  // Try to evaluate the expression.
@@ -424,6 +375,10 @@ void NetScope::evaluate_parameters(Design*des)
 			assert(nexpr);
 			delete expr;
 			(*cur).second.expr = nexpr;
+
+			  // Set the signedness flag.
+			(*cur).second.expr
+			      ->cast_signed( (*cur).second.signed_flag );
 		  }
 		  break;
 
@@ -436,9 +391,7 @@ void NetScope::evaluate_parameters(Design*des)
 	    }
 
 	      /* If the parameter has range information, then make
-		 sure the value is set right. Note that if the
-		 parameter doesn't have an explicit range, then it
-		 will get the signedness from the expression itself. */
+		 sure the value is set right. */
 	    if (range_flag) {
 		  unsigned long wid = (msb >= lsb)? msb - lsb : lsb - msb;
 		  wid += 1;
@@ -481,68 +434,52 @@ const char* Design::get_flag(const string&key) const
  * It is the job of this function to properly implement Verilog scope
  * rules as signals are concerned.
  */
-NetNet* Design::find_signal(NetScope*scope, hname_t path)
+NetNet* Design::find_signal(NetScope*scope, pform_name_t path)
 {
       assert(scope);
 
-      char*key = path.remove_tail_name();
-      if (path.peek_name(0))
-	    scope = find_scope(scope, path);
+      perm_string key = peek_tail_name(path);
+      path.pop_back();
+      if (! path.empty()) {
+	    list<hname_t> eval_path = eval_scope_path(this, scope, path);
+	    scope = find_scope(scope, eval_path);
+      }
 
       while (scope) {
-	    if (NetNet*net = scope->find_signal(key)) {
-		  delete key;
+	    if (NetNet*net = scope->find_signal(key))
 		  return net;
-	    }
 
 	    if (scope->type() == NetScope::MODULE)
 		  break;
+
 	    scope = scope->parent();
       }
 
-      delete key;
       return 0;
 }
 
-NetFuncDef* Design::find_function(NetScope*scope, const hname_t&name)
+NetFuncDef* Design::find_function(NetScope*scope, const pform_name_t&name)
 {
       assert(scope);
-      NetScope*func = find_scope(scope, name);
+
+      std::list<hname_t> eval_path = eval_scope_path(this, scope, name);
+      NetScope*func = find_scope(scope, eval_path);
       if (func && (func->type() == NetScope::FUNC))
 	    return func->func_def();
 
       return 0;
 }
 
-NetFuncDef* Design::find_function(const hname_t&key)
+NetScope* Design::find_task(NetScope*scope, const pform_name_t&name)
 {
-      NetScope*func = find_scope(key);
-      if (func && (func->type() == NetScope::FUNC))
-	    return func->func_def();
-
-      return 0;
-}
-
-NetScope* Design::find_task(NetScope*scope, const hname_t&name)
-{
-      NetScope*task = find_scope(scope, name);
+      std::list<hname_t> eval_path = eval_scope_path(this, scope, name);
+      NetScope*task = find_scope(scope, eval_path);
       if (task && (task->type() == NetScope::TASK))
 	    return task;
 
       return 0;
 }
 
-NetScope* Design::find_task(const hname_t&key)
-{
-      NetScope*task = find_scope(key);
-      if (task && (task->type() == NetScope::TASK))
-	    return task;
-
-      return 0;
-}
-
-
-
 void Design::add_node(NetNode*net)
 {
       assert(net->design_ == 0);
@@ -618,8 +555,33 @@ void Design::delete_process(NetProcTop*top)
 
 /*
  * $Log: net_design.cc,v $
- * Revision 1.45.2.1  2006/10/04 00:34:45  steve
- *  Fix a dangling reference to NetEParam objects in defparams.
+ * Revision 1.54  2007/06/05 04:18:09  steve
+ *  Upward names may reference modules by module_name.
+ *
+ * Revision 1.53  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.52  2007/05/24 04:07:12  steve
+ *  Rework the heirarchical identifier parse syntax and pform
+ *  to handle more general combinations of heirarch and bit selects.
+ *
+ * Revision 1.51  2007/04/26 03:06:22  steve
+ *  Rework hname_t to use perm_strings.
+ *
+ * Revision 1.50  2006/08/08 05:11:37  steve
+ *  Handle 64bit delay constants.
+ *
+ * Revision 1.49  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.48  2005/11/27 05:56:20  steve
+ *  Handle bit select of parameter with ranges.
+ *
+ * Revision 1.47  2005/09/14 02:53:14  steve
+ *  Support bool expressions and compares handle them optimally.
+ *
+ * Revision 1.46  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
  *
  * Revision 1.45  2004/10/04 01:10:54  steve
  *  Clean up spurious trailing white space.

net_event.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_event.cc,v 1.26 2004/10/04 01:10:54 steve Exp $"
+#ident "$Id: net_event.cc,v 1.27 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -56,10 +56,10 @@ perm_string NetEvent::name() const
       return name_;
 }
 
-string NetEvent::full_name() const
+NetScope* NetEvent::scope()
 {
       assert(scope_);
-      return scope_->name() + "." + string(name_);
+      return scope_;
 }
 
 const NetScope* NetEvent::scope() const
@@ -449,6 +449,9 @@ NetProc* NetEvWait::statement()
 
 /*
  * $Log: net_event.cc,v $
+ * Revision 1.27  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
  * Revision 1.26  2004/10/04 01:10:54  steve
  *  Clean up spurious trailing white space.
  *

net_expr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_expr.cc,v 1.23 2004/10/04 01:10:54 steve Exp $"
+#ident "$Id: net_expr.cc,v 1.27 2006/07/31 03:50:17 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -25,9 +25,12 @@
 # include  "compiler.h"
 # include  <iostream>
 
-NetExpr::TYPE NetExpr::expr_type() const
+/*
+ * the grand default data type is a logic vector.
+ */
+ivl_variable_type_t NetExpr::expr_type() const
 {
-      return ET_VECTOR;
+      return IVL_VT_LOGIC;
 }
 
 /*
@@ -96,15 +99,15 @@ NetEBAdd* NetEBAdd::dup_expr() const
       return result;
 }
 
-NetExpr::TYPE NetEBAdd::expr_type() const
+ivl_variable_type_t NetEBAdd::expr_type() const
 {
-      if (left_->expr_type() == ET_REAL)
-	    return ET_REAL;
+      if (left_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
 
-      if (right_->expr_type() == ET_REAL)
-	    return ET_REAL;
+      if (right_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
 
-      return ET_VECTOR;
+      return IVL_VT_LOGIC;
 }
 
 /*
@@ -161,6 +164,21 @@ bool NetEBComp::has_width() const
       return true;
 }
 
+ivl_variable_type_t NetEBComp::expr_type() const
+{
+	// Case compare always returns BOOL
+      if (op() == 'E' || op() == 'N')
+	    return IVL_VT_BOOL;
+
+      if (left()->expr_type() == IVL_VT_LOGIC)
+	    return IVL_VT_LOGIC;
+
+      if (right()->expr_type() == IVL_VT_LOGIC)
+	    return IVL_VT_LOGIC;
+
+      return IVL_VT_BOOL;
+}
+
 NetEBDiv::NetEBDiv(char op, NetExpr*l, NetExpr*r)
 : NetEBinary(op, l, r)
 {
@@ -183,15 +201,15 @@ NetEBDiv* NetEBDiv::dup_expr() const
       return result;
 }
 
-NetExpr::TYPE NetEBDiv::expr_type() const
+ivl_variable_type_t NetEBDiv::expr_type() const
 {
-      if (left_->expr_type() == ET_REAL)
-	    return ET_REAL;
+      if (left_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
 
-      if (right_->expr_type() == ET_REAL)
-	    return ET_REAL;
+      if (right_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
 
-      return ET_VECTOR;
+      return IVL_VT_LOGIC;
 }
 
 NetEBMult::NetEBMult(char op, NetExpr*l, NetExpr*r)
@@ -219,15 +237,49 @@ NetEBMult* NetEBMult::dup_expr() const
       return result;
 }
 
-NetExpr::TYPE NetEBMult::expr_type() const
+ivl_variable_type_t NetEBMult::expr_type() const
 {
-      if (left_->expr_type() == ET_REAL)
-	    return ET_REAL;
+      if (left_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
 
-      if (right_->expr_type() == ET_REAL)
-	    return ET_REAL;
+      if (right_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
 
-      return ET_VECTOR;
+      return IVL_VT_LOGIC;
+}
+
+NetEBPow::NetEBPow(char op, NetExpr*l, NetExpr*r)
+: NetEBinary(op, l, r)
+{
+      assert(op == 'p');
+      expr_width(l->expr_width());
+      cast_signed(l->has_sign() || r->has_sign());
+}
+
+NetEBPow::~NetEBPow()
+{
+}
+
+NetEBPow* NetEBPow::dup_expr() const
+{
+      NetEBPow*result = new NetEBPow(op_, left_->dup_expr(),
+				     right_->dup_expr());
+      result->set_line(*this);
+      return result;
+}
+
+ivl_variable_type_t NetEBPow::expr_type() const
+{
+      if (right_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
+      if (left_->expr_type() == IVL_VT_REAL)
+	    return IVL_VT_REAL;
+      if (left_->has_sign())
+	    return IVL_VT_REAL;
+      if (right_->has_sign())
+	    return IVL_VT_REAL;
+
+      return IVL_VT_LOGIC;
 }
 
 NetEBShift::NetEBShift(char op, NetExpr*l, NetExpr*r)
@@ -372,9 +424,9 @@ NetECReal* NetECReal::dup_expr() const
       return tmp;
 }
 
-NetExpr::TYPE NetECReal::expr_type() const
+ivl_variable_type_t NetECReal::expr_type() const
 {
-      return ET_REAL;
+      return IVL_VT_REAL;
 }
 
 NetECRealParam::NetECRealParam(NetScope*s, perm_string n, const verireal&v)
@@ -450,15 +502,7 @@ bool NetESelect::has_width() const
       return true;
 }
 
-bool NetESelect::set_width(unsigned w)
-{
-      if (expr_width() == 1)
-	    return true;
-      else
-	    return false;
-}
-
-NetESFunc::NetESFunc(const char*n, NetExpr::TYPE t,
+NetESFunc::NetESFunc(const char*n, ivl_variable_type_t t,
 		     unsigned width, unsigned np)
 : name_(0), type_(t)
 {
@@ -509,13 +553,25 @@ NetExpr* NetESFunc::parm(unsigned idx)
       return parms_[idx];
 }
 
-NetExpr::TYPE NetESFunc::expr_type() const
+ivl_variable_type_t NetESFunc::expr_type() const
 {
       return type_;
 }
 
 /*
  * $Log: net_expr.cc,v $
+ * Revision 1.27  2006/07/31 03:50:17  steve
+ *  Add support for power in constant expressions.
+ *
+ * Revision 1.26  2005/11/26 00:35:43  steve
+ *  More precise about r-value width of constants.
+ *
+ * Revision 1.25  2005/09/14 02:53:14  steve
+ *  Support bool expressions and compares handle them optimally.
+ *
+ * Revision 1.24  2005/07/11 16:56:50  steve
+ *  Remove NetVariable and ivl_variable_t structures.
+ *
  * Revision 1.23  2004/10/04 01:10:54  steve
  *  Clean up spurious trailing white space.
  *

net_force.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_force.cc,v 1.12 2004/02/18 17:11:56 steve Exp $"
+#ident "$Id: net_force.cc,v 1.13 2004/12/11 02:31:26 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -33,110 +33,14 @@
 # include  "netlist.h"
 # include  <assert.h>
 
-/*
- * Construct the procedural continuous assignment statement. This is a
- * bit different from a normal assignment because the the lval is only
- * intermittently connected. The deassign in particular disconnects
- * the signals when they are not being assigned anymore. Because of
- * this, there is no other reference to the lval to make it stay put
- * so we increment the eref.
- *
- * XXXX I'm not sure this is the right way. Perhaps I should create
- * output pins to connect to the netlist? But that would cause the
- * link ring to grow, and that is not quite correct either. Hmm...
- */
-NetCAssign::NetCAssign(NetScope*s, perm_string n, NetNet*l)
-: NetNode(s, n, l->pin_count()), lval_(l)
-{
-      lval_->incr_eref();
-      for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
-	    pin(idx).set_dir(Link::INPUT);
-	    pin(idx).set_name(perm_string::literal("I"), idx);
-      }
-}
-
-NetCAssign::~NetCAssign()
-{
-      lval_->decr_eref();
-}
-
-const NetNet* NetCAssign::lval() const
-{
-      return lval_;
-}
-
-const Link& NetCAssign::lval_pin(unsigned idx) const
-{
-      assert(idx < lval_->pin_count());
-      return lval_->pin(idx);
-}
-
-NetDeassign::NetDeassign(NetNet*l)
-: lval_(l)
-{
-      lval_->incr_eref();
-}
-
-NetDeassign::~NetDeassign()
-{
-      lval_->decr_eref();
-}
-
-const NetNet*NetDeassign::lval() const
-{
-      return lval_;
-}
-
-NetForce::NetForce(NetScope*s, perm_string n, NetNet*l)
-: NetNode(s, n, l->pin_count()), lval_(l)
-{
-      lval_->incr_eref();
-
-      for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
-	    pin(idx).set_dir(Link::INPUT);
-	    pin(idx).set_name(perm_string::literal("I"), idx);
-      }
-}
-
-NetForce::~NetForce()
-{
-      lval_->decr_eref();
-}
-
-const Link& NetForce::lval_pin(unsigned idx) const
-{
-      assert(idx < lval_->pin_count());
-      return lval_->pin(idx);
-}
-
-const NetNet* NetForce::lval() const
-{
-      return lval_;
-}
-
-NetRelease::NetRelease(NetNet*l)
-: lval_(l)
-{
-	/* Put myself into a release list that the net is
-	   keeping. This is so that the NetNet can detach itself if
-	   and when it is deleted by the optimizer. */
-      release_next_ = lval_->release_list_;
-      lval_->release_list_ = this;
-}
-
-NetRelease::~NetRelease()
-{
-      assert(lval_ == 0);
-}
-
-const NetNet*NetRelease::lval() const
-{
-      return lval_;
-}
-
 
 /*
  * $Log: net_force.cc,v $
+ * Revision 1.13  2004/12/11 02:31:26  steve
+ *  Rework of internals to carry vectors through nexus instead
+ *  of single bits. Make the ivl, tgt-vvp and vvp initial changes
+ *  down this path.
+ *
  * Revision 1.12  2004/02/18 17:11:56  steve
  *  Use perm_strings for named langiage items.
  *

net_func.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_func.cc,v 1.6 2004/05/31 23:34:37 steve Exp $"
+#ident "$Id: net_func.cc,v 1.10 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -26,42 +26,25 @@
 # include  "PExpr.h"
 # include  <iostream>
 
-static unsigned count_def_pins(const NetFuncDef*def)
-{
-      assert(def->return_sig());
-
-      unsigned sum = def->return_sig()->pin_count();
-      for (unsigned idx = 0 ;  idx < def->port_count() ;  idx += 1)
-	    sum += def->port(idx)->pin_count();
-
-      return sum;
-}
-
+/*
+ * To make a NetUserFunc device, make as many pins as there are ports
+ * in the function. Get the port count from the function definition,
+ * which accounts for all the inputs, plus one for the phantom output
+ * that is the result.
+ */
 NetUserFunc::NetUserFunc(NetScope*s, perm_string n, NetScope*d)
-: NetNode(s, n, count_def_pins(d->func_def())),
+: NetNode(s, n, d->func_def()->port_count()+1),
   def_(d)
 {
-      NetFuncDef*def = def_->func_def();
+      pin(0).set_dir(Link::OUTPUT);
+      pin(0).set_name(def_->basename(), 0);
 
-      unsigned port_wid = port_width(0);
-      for (unsigned idx = 0 ;  idx < port_wid ;  idx += 1) {
-	    pin(idx).set_dir(Link::OUTPUT);
-	    pin(idx).set_name(def_->basename(), idx);
-      }
+      for (unsigned idx = 1 ;  idx < pin_count() ;  idx += 1) {
 
-      unsigned pin_base = port_wid;
-      for (unsigned idx = 1 ;  idx < port_count() ;  idx += 1) {
-
-	    const NetNet*port_sig = def->port(idx-1);
-	    unsigned bits = port_width(idx);
-	    for (unsigned bit = 0; bit < bits; bit += 1) {
-		  pin(pin_base+bit).set_dir(Link::INPUT);
-		  pin(pin_base+bit).set_name(port_sig->name(), bit);
-		  pin(pin_base+bit).drive0(Link::HIGHZ);
-		  pin(pin_base+bit).drive1(Link::HIGHZ);
-	    }
-
-	    pin_base += bits;
+	    pin(idx).set_dir(Link::INPUT);
+	    pin(idx).set_name(perm_string::literal("D"), idx-1);
+	    pin(idx).drive0(Link::HIGHZ);
+	    pin(idx).drive1(Link::HIGHZ);
       }
 }
 
@@ -69,11 +52,6 @@ NetUserFunc::~NetUserFunc()
 {
 }
 
-unsigned NetUserFunc::port_count() const
-{
-      return def_->func_def()->port_count() + 1;
-}
-
 unsigned NetUserFunc::port_width(unsigned port) const
 {
       NetFuncDef*def = def_->func_def();
@@ -82,44 +60,16 @@ unsigned NetUserFunc::port_width(unsigned port) const
       if (port == 0) {
 	    const NetNet*sig = def->return_sig();
 	    assert(sig);
-	    return sig->pin_count();
+	    return sig->vector_width();
       }
 
       port -= 1;
       assert(port < def->port_count());
       const NetNet*port_sig = def->port(port);
 
-      return port_sig->pin_count();
+      return port_sig->vector_width();
 }
 
-Link& NetUserFunc::port_pin(unsigned port, unsigned idx)
-{
-      NetFuncDef*def = def_->func_def();
-      unsigned pin_base = 0;
-      const NetNet*port_sig;
-
-      if (port == 0)
-	    return pin(idx);
-
-      port_sig = def->return_sig();
-      pin_base += port_sig->pin_count();
-      port -= 1;
-
-      assert(port < def->port_count());
-
-      for (unsigned port_idx = 0 ;  port_idx < port ;  port_idx += 1) {
-	    port_sig = def->port(port_idx);
-	    pin_base += port_sig->pin_count();
-      }
-
-      port_sig = def->port(port);
-      assert(idx < port_sig->pin_count());
-      assert((pin_base+idx) < pin_count());
-
-      return pin(pin_base+idx);
-}
-
-
 const NetScope* NetUserFunc::def() const
 {
       return def_;
@@ -145,14 +95,14 @@ bool PECallFunction::check_call_matches_definition_(Design*des, NetScope*dscope)
 
       if (dscope->type() != NetScope::FUNC) {
 	    cerr << get_line() << ": error: Attempt to call scope "
-		 << dscope->name() << " as a function." << endl;
+		 << scope_path(dscope) << " as a function." << endl;
 	    des->errors += 1;
 	    return false;
       }
 
       if (parms_count != dscope->func_def()->port_count()) {
-	    cerr << get_line() << ": error: Function " << dscope->name()
-		 << " expects " << (dscope->func_def()->port_count()-1)
+	    cerr << get_line() << ": error: Function " << scope_path(dscope)
+		 << " expects " << (dscope->func_def()->port_count())
 		 << " arguments, you passed " << parms_count << "."
 		 << endl;
 	    des->errors += 1;
@@ -162,8 +112,55 @@ bool PECallFunction::check_call_matches_definition_(Design*des, NetScope*dscope)
       return true;
 }
 
+
+NetSysFunc::NetSysFunc(NetScope*s, perm_string n,
+		       const struct sfunc_return_type*def,
+		       unsigned ports)
+: NetNode(s, n, ports)
+{
+      def_ = def;
+
+      pin(0).set_dir(Link::OUTPUT);
+      pin(0).set_name(perm_string::literal("Q"), 0);
+
+      for (unsigned idx = 1 ;  idx < pin_count() ;  idx += 1) {
+
+	    pin(idx).set_dir(Link::INPUT);
+	    pin(idx).set_name(perm_string::literal("D"), idx-1);
+	    pin(idx).drive0(Link::HIGHZ);
+	    pin(idx).drive1(Link::HIGHZ);
+      }
+}
+
+NetSysFunc::~NetSysFunc()
+{
+}
+
+const char*NetSysFunc::func_name() const
+{
+      return def_->name;
+}
+
+unsigned NetSysFunc::vector_width() const
+{
+      return def_->wid;
+}
+
+
 /*
  * $Log: net_func.cc,v $
+ * Revision 1.10  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
+ *
+ * Revision 1.9  2007/04/17 04:17:47  steve
+ *  Fix argument count in function error message.
+ *
+ * Revision 1.8  2006/06/18 04:15:50  steve
+ *  Add support for system functions in continuous assignments.
+ *
+ * Revision 1.7  2005/03/18 02:56:03  steve
+ *  Add support for LPM_UFUNC user defined functions.
+ *
  * Revision 1.6  2004/05/31 23:34:37  steve
  *  Rewire/generalize parsing an elaboration of
  *  function return values to allow for better

net_link.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: net_link.cc,v 1.14.2.6 2006/08/23 04:09:14 steve Exp $"
+#ident "$Id: net_link.cc,v 1.21 2007/06/02 03:42:13 steve Exp $"
 #endif
 
 # include "config.h"
@@ -27,7 +27,6 @@
 # include  "netlist.h"
 # include  <sstream>
 # include  <string>
-# include  <cstring>
 # include  <typeinfo>
 #ifdef HAVE_MALLOC_H
 # include  <malloc.h>
@@ -41,16 +40,18 @@ void connect(Nexus*l, Link&r)
       if (l == r.nexus_)
 	    return;
 
-      Nexus*tmp = r.nexus_;
 
+      Nexus*tmp = r.nexus_;
       while (Link*cur = tmp->list_) {
 	    tmp->list_ = cur->next_;
 	    cur->nexus_ = 0;
 	    cur->next_  = 0;
-	    cur->prev_  = 0;
 	    l->relink(cur);
       }
 
+      l->driven_ = Nexus::NO_GUESS;
+
+      assert(tmp->list_ == 0);
       delete tmp;
 }
 
@@ -59,15 +60,13 @@ void connect(Link&l, Link&r)
       assert(&l != &r);
       if (r.is_linked() && !l.is_linked())
 	    connect(r.nexus_, l);
-      else if (r.nexus_->list_len_ > l.nexus_->list_len_)
-	    connect(r.nexus_, l);
       else
 	    connect(l.nexus_, r);
 }
 
 Link::Link()
 : dir_(PASSIVE), drive0_(STRONG), drive1_(STRONG), init_(verinum::Vx),
-  inst_(0), next_(0), prev_(0), nexus_(0)
+  inst_(0), next_(0), nexus_(0)
 {
       (new Nexus()) -> relink(this);
 }
@@ -219,7 +218,6 @@ Nexus::Nexus()
 {
       name_ = 0;
       list_ = 0;
-      list_len_ = 0;
       driven_ = NO_GUESS;
       t_cookie_ = 0;
 }
@@ -246,18 +244,6 @@ verinum::V Nexus::get_init() const
       return verinum::Vz;
 }
 
-int Nexus::is_driven() const
-{
-      int count = 0;
-
-      for (Link*cur = list_ ; cur ;  cur = cur->next_) {
-	    if (cur->get_dir() == Link::OUTPUT)
-		  count += 1;
-      }
-
-      return count;
-}
-
 void Nexus::unlink(Link*that)
 {
       if (name_) {
@@ -271,32 +257,22 @@ void Nexus::unlink(Link*that)
 	    driven_ = NO_GUESS;
 
       assert(that);
-      assert(that->nexus_ == this);
       if (list_ == that) {
-	    assert(that->prev_ == 0);
-	      // Move the second item the front of the list.
 	    list_ = that->next_;
-	    if (list_)
-		  list_->prev_ = 0;
-	    list_len_ -= 1;
-	      // Clear the pointers for the link.
 	    that->next_ = 0;
-	    that->prev_ = 0;
 	    that->nexus_ = 0;
 	    return;
       }
 
-
-      Link*cur = that->prev_;
-      assert(cur->nexus_ == this);
+      Link*cur = list_;
+      while (cur->next_ != that) {
+	    assert(cur->next_);
+	    cur = cur->next_;
+      }
 
       cur->next_ = that->next_;
-      if (cur->next_)
-	    cur->next_->prev_ = cur;
       that->nexus_ = 0;
       that->next_ = 0;
-      that->prev_ = 0;
-      list_len_ -= 1;
 }
 
 void Nexus::relink(Link*that)
@@ -314,13 +290,8 @@ void Nexus::relink(Link*that)
       assert(that->nexus_ == 0);
       assert(that->next_ == 0);
       that->next_ = list_;
-      that->prev_ = 0;
-      if (that->next_)
-	    that->next_->prev_ = that;
-
       that->nexus_ = this;
       list_ = that;
-      list_len_ += 1;
 }
 
 Link* Nexus::first_nlink()
@@ -333,18 +304,42 @@ const Link* Nexus::first_nlink() const
       return list_;
 }
 
-void* Nexus::t_cookie() const
+ivl_nexus_t Nexus::t_cookie() const
 {
       return t_cookie_;
 }
 
-void* Nexus::t_cookie(void*val)const
+ivl_nexus_t Nexus::t_cookie(ivl_nexus_t val)const
 {
-      void*tmp = t_cookie_;
+      ivl_nexus_t tmp = t_cookie_;
       t_cookie_ = val;
       return tmp;
 }
 
+unsigned Nexus::vector_width() const
+{
+      for (const Link*cur = first_nlink() ; cur ; cur = cur->next_nlink()) {
+	    const NetNet*sig = dynamic_cast<const NetNet*>(cur->get_obj());
+	    if (sig == 0)
+		  continue;
+
+	    return sig->vector_width();
+      }
+
+      return 0;
+}
+
+NetNet* Nexus::pick_any_net()
+{
+      for (Link*cur = first_nlink() ; cur ; cur = cur->next_nlink()) {
+	    NetNet*sig = dynamic_cast<NetNet*>(cur->get_obj());
+	    if (sig != 0)
+		  return sig;
+      }
+
+      return 0;
+}
+
 const char* Nexus::name() const
 {
       if (name_)
@@ -392,12 +387,11 @@ const char* Nexus::name() const
 		  obj->name() << " pin " << pin << "(" <<
 		  lnk->get_name() << "<" << lnk->get_inst() << ">)"
 		  " type=" << typeid(*obj).name() << "?" << endl;
-	    return 0;
-      }
 
+      }
       assert(sig);
       ostringstream tmp;
-      tmp << sig->name();
+      tmp << scope_path(sig->scope()) << "." << sig->name();
       if (sig->pin_count() > 1)
 	    tmp << "<" << pin << ">";
 
@@ -411,7 +405,6 @@ const char* Nexus::name() const
 NexusSet::NexusSet()
 {
       items_ = 0;
-      index_ = 0;
       nitems_ = 0;
 }
 
@@ -420,11 +413,8 @@ NexusSet::~NexusSet()
       if (nitems_ > 0) {
 	    assert(items_ != 0);
 	    delete[] items_;
-	    assert(index_ != 0);
-	    delete[] index_;
       } else {
 	    assert(items_ == 0);
-	    assert(index_ == 0);
       }
 }
 
@@ -433,44 +423,26 @@ unsigned NexusSet::count() const
       return nitems_;
 }
 
-/*
- * Add the Nexus to the nexus set at the *end* of the array. This
- * preserves order, which is used in a few cases by the
- * synthesizer. But for efficiency, also create a sorted index.
- */
 void NexusSet::add(Nexus*that)
 {
-	/* Handle the special case that the set is empty. */
       if (nitems_ == 0) {
 	    assert(items_ == 0);
-	    assert(index_ == 0);
 	    items_ = (Nexus**)malloc(sizeof(Nexus*));
 	    items_[0] = that;
-	    index_ = (unsigned*)malloc(sizeof(unsigned));
-	    index_[0] = 0;
 	    nitems_ = 1;
 	    return;
       }
 
       unsigned ptr = bsearch_(that);
-      if (ptr < nitems_ && items_[index_[ptr]] == that) {
-	    assert(items_[index_[ptr]] == that);
+      if (ptr < nitems_) {
+	    assert(items_[ptr] == that);
 	    return;
       }
 
-      items_ = (Nexus**)  realloc(items_, (nitems_+1) * sizeof(Nexus*));
-      index_ = (unsigned*)realloc(index_, (nitems_+1) * sizeof(unsigned));
-
-      items_[nitems_] = that;
-
-      unsigned dest = nitems_;
-      for (unsigned idx = ptr ;  idx < nitems_ ;  idx += 1) {
-	    unsigned tmp = index_[idx];
-	    index_[idx] = dest;
-	    dest = tmp;
-      }
-      index_[nitems_] = dest;
+      assert(ptr == nitems_);
 
+      items_ = (Nexus**)realloc(items_, (nitems_+1) * sizeof(Nexus*));
+      items_[ptr] = that;
       nitems_ += 1;
 }
 
@@ -486,31 +458,20 @@ void NexusSet::rem(Nexus*that)
 	    return;
 
       unsigned ptr = bsearch_(that);
-      if (ptr >= nitems_ || items_[index_[ptr]] != that)
+      if (ptr >= nitems_)
 	    return;
 
       if (nitems_ == 1) {
 	    free(items_);
-	    free(index_);
 	    items_ = 0;
-	    index_ = 0;
 	    nitems_ = 0;
 	    return;
       }
 
-      unsigned index_ptr = index_[ptr];
-      for (unsigned idx = index_ptr ;  idx < (nitems_-1) ;  idx += 1)
+      for (unsigned idx = ptr ;  idx < (nitems_-1) ;  idx += 1)
 	    items_[idx] = items_[idx+1];
 
-      for (unsigned idx = ptr ;  idx < (nitems_-1) ;  idx += 1)
-	    index_[idx] = index_[idx+1];
-
-      for (unsigned idx = 0 ;  idx < (nitems_-1) ;  idx += 1)
-	    if (index_[idx] > index_ptr)
-		  index_[idx] -= 1;
-
-      items_ = (Nexus**)  realloc(items_, (nitems_-1) * sizeof(Nexus*));
-      index_ = (unsigned*)realloc(index_, (nitems_-1) * sizeof(unsigned));
+      items_ = (Nexus**)realloc(items_, (nitems_-1) * sizeof(Nexus*));
       nitems_ -= 1;
 }
 
@@ -526,37 +487,14 @@ Nexus* NexusSet::operator[] (unsigned idx) const
       return items_[idx];
 }
 
-/*
- * This method uses binary search to locate the item in the list of
- * nexus pointers. If the item is in the set, then this method returns
- * the index where it exists in the *index* array. If the item is not
- * in the set, the index points to where in the array the item should go.
- */
 unsigned NexusSet::bsearch_(Nexus*that) const
 {
-
-      unsigned low = 0, hig = nitems_;
-
-      while (low < hig) {
-	    unsigned mid = (low + hig) / 2;
-	    if (mid == hig) mid -= 1;
-	    assert(mid >= low);
-	    assert(mid < hig);
-
-	    if (items_[index_[mid]] == that) {
-		  return mid;
-
-	    } else if (items_[index_[mid]] > that) {
-		  hig = mid;
-
-	    } else {
-		  low = mid+1;
-	    }
+      for (unsigned idx = 0 ;  idx < nitems_ ;  idx += 1) {
+	    if (items_[idx] == that)
+		  return idx;
       }
 
-      assert(low == hig);
-      assert(low == nitems_ || items_[index_[low]] >= that);
-      return low;
+      return nitems_;
 }
 
 bool NexusSet::contains(const NexusSet&that) const
@@ -565,7 +503,7 @@ bool NexusSet::contains(const NexusSet&that) const
 	    unsigned where = bsearch_(that[idx]);
 	    if (where == nitems_)
 		  return false;
-	    if (items_[index_[where]] != that[idx])
+	    if (items_[where] != that[idx])
 		  return false;
       }
 
@@ -578,7 +516,7 @@ bool NexusSet::intersect(const NexusSet&that) const
 	    unsigned where = bsearch_(that[idx]);
 	    if (where == nitems_)
 		  continue;
-	    if (items_[index_[where]] == that[idx])
+	    if (items_[where] == that[idx])
 		  return true;
       }
 
@@ -587,23 +525,26 @@ bool NexusSet::intersect(const NexusSet&that) const
 
 /*
  * $Log: net_link.cc,v $
- * Revision 1.14.2.6  2006/08/23 04:09:14  steve
- *  missing sig diagnostics.
+ * Revision 1.21  2007/06/02 03:42:13  steve
+ *  Properly evaluate scope path expressions.
  *
- * Revision 1.14.2.5  2006/08/15 03:41:24  steve
- *  Improve performance of unlink of heavily connected nexa.
+ * Revision 1.20  2007/03/26 18:17:50  steve
+ *  Remove pretense of general use for t_cookie.
  *
- * Revision 1.14.2.4  2006/08/08 02:17:48  steve
- *  Improved nexus management performance.
+ * Revision 1.19  2006/02/02 02:43:58  steve
+ *  Allow part selects of memory words in l-values.
  *
- * Revision 1.14.2.3  2006/07/23 19:42:33  steve
- *  Handle statement output override better in blocks.
+ * Revision 1.18  2005/09/25 23:40:11  steve
+ *  Simplify NexusSet set handling.
  *
- * Revision 1.14.2.2  2006/01/27 02:05:46  steve
- *  Speed up processing of connect when one side is empty.
+ * Revision 1.17  2005/06/13 23:22:37  steve
+ *  Fix compile errors.
  *
- * Revision 1.14.2.1  2005/09/25 23:30:31  steve
- *  More predictable ordering of items in NexusSet.
+ * Revision 1.16  2005/04/24 23:44:02  steve
+ *  Update DFF support to new data flow.
+ *
+ * Revision 1.15  2005/01/09 20:16:01  steve
+ *  Use PartSelect/PV and VP to handle part selects through ports.
  *
  * Revision 1.14  2004/02/18 17:11:56  steve
  *  Use perm_strings for named langiage items.
@@ -629,5 +570,35 @@ bool NexusSet::intersect(const NexusSet&that) const
  * Revision 1.7  2002/06/24 01:49:39  steve
  *  Make link_drive_constant cache its results in
  *  the Nexus, to improve cprop performance.
+ *
+ * Revision 1.6  2002/04/21 04:59:08  steve
+ *  Add support for conbinational events by finding
+ *  the inputs to expressions and some statements.
+ *  Get case and assignment statements working.
+ *
+ * Revision 1.5  2001/07/25 03:10:49  steve
+ *  Create a config.h.in file to hold all the config
+ *  junk, and support gcc 3.0. (Stephan Boettcher)
+ *
+ * Revision 1.4  2000/10/06 23:46:50  steve
+ *  ivl_target updates, including more complete
+ *  handling of ivl_nexus_t objects. Much reduced
+ *  dependencies on pointers to netlist objects.
+ *
+ * Revision 1.3  2000/08/26 00:54:03  steve
+ *  Get at gate information for ivl_target interface.
+ *
+ * Revision 1.2  2000/07/14 06:12:57  steve
+ *  Move inital value handling from NetNet to Nexus
+ *  objects. This allows better propogation of inital
+ *  values.
+ *
+ *  Clean up constant propagation  a bit to account
+ *  for regs that are not really values.
+ *
+ * Revision 1.1  2000/06/25 19:59:42  steve
+ *  Redesign Links to include the Nexus class that
+ *  carries properties of the connected set of links.
+ *
  */