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538 Commits
Author SHA1 Message Date
steve 54c7ef72cb Snapshot 20060809 2006-08-10 01:23:29 +00:00
steve 50800fd3a1 Add support for real valued modulus. 2006-08-09 05:19:08 +00:00
steve fc0695beb6 Handle 64bit delay constants. 2006-08-08 05:11:37 +00:00
steve 00891db0d2 Fix typo in initialize of new event_time cell. 2006-08-06 18:17:00 +00:00
steve 898b0e0365 Support release of a for/linked reg. 2006-08-04 04:37:37 +00:00
steve 382c4d74fd Add the scanf functions. 2006-08-03 05:06:04 +00:00
steve 5bcf083662 Better comments for vpi_fopen function. 2006-08-03 05:05:31 +00:00
steve 1bd530c144 Fix infinite loop padding binary string to result. 2006-08-03 05:05:06 +00:00
steve 82a85131a8 Use compiletf to check arguments. 2006-08-03 05:02:46 +00:00
steve 49b65e86fe Add support for power in constant expressions. 2006-07-31 03:50:17 +00:00
steve 06d6ac4b33 Fix/implement signed right shift. 2006-07-30 02:51:35 +00:00
steve 2037650080 Pass depfiles through temp defines file. 2006-07-26 00:11:40 +00:00
steve 61f3a84557 Pass defines and includes through temp file. 2006-07-26 00:02:48 +00:00
steve ed70db84ce Handle real valued literals in net contexts. 2006-07-08 21:48:46 +00:00
steve 5348ac14a5 Delay object supports real valued delays. 2006-07-08 21:48:00 +00:00
steve aab6fefd8a Fix context determined with of constants. 2006-07-07 04:06:37 +00:00
steve 1b8e2a17c7 Change the Copyright tag to License. 2006-06-24 05:21:07 +00:00
steve 33a391cb71 Sign extend operands of signed addition. 2006-06-20 05:06:47 +00:00
steve bcc08112aa Snapshot 20060618 2006-06-18 23:56:23 +00:00
steve 80f30be9d0 Add support for system functions in continuous assignments. 2006-06-18 04:15:50 +00:00
steve 71faebd6df Make elaborate_expr methods aware of the width that the context
requires of it. In the process, fix sizing of the width of unary
 minus is context determined sizes.
2006-06-02 04:48:49 +00:00
steve 53ae1f29c9 Fix broken subtraction of small constants. 2006-06-01 03:54:51 +00:00
steve 857b3e15b6 Fix handling of ternary-to-bufif0 constant propagation. 2006-05-24 04:32:57 +00:00
steve 019d61f633 Get self-determined unary - width right. 2006-05-19 04:44:55 +00:00
steve d37b6599f4 eval_const is not strict. 2006-05-19 04:07:24 +00:00
steve 68e52ce6b7 Synchronous primitives only follow edges. 2006-05-18 05:13:45 +00:00
steve 4c885f65e1 Error message if concat expression cannot evaluate. 2006-05-17 16:49:30 +00:00
steve f0e114d59f Lexor os never interactive. 2006-05-17 04:15:12 +00:00
steve aaaa042f73 Add port list format for task arguments. 2006-05-11 03:26:57 +00:00
steve 044da54b41 Be more stubborn about widths. 2006-05-02 04:29:42 +00:00
steve a8b86ea3bb More explicit datatype setup. 2006-05-01 20:47:58 +00:00
steve e98aad1e9b Cleaner rule for parse.h and parse.cc 2006-05-01 20:47:29 +00:00
steve 1ef91f800f Forgot to invert nand output. 2006-05-01 20:47:03 +00:00
steve a19efe181b Install stub target. 2006-05-01 18:48:24 +00:00
steve 81bfbd1549 Reduce steps to make logic output. 2006-05-01 18:44:08 +00:00
steve dc2898cc73 fix net type of multiply output. 2006-05-01 05:40:21 +00:00
steve 0c9fb766b6 Get the data type of part select results right. 2006-04-30 05:17:48 +00:00
steve 10f8c66f4a Dump *all* the reduction operator gates. 2006-04-30 05:16:53 +00:00
steve 56f70ec702 Include math.h with lround implementation. 2006-04-28 15:44:37 +00:00
steve 949054e000 lround takes double, not float. 2006-04-28 15:40:30 +00:00
steve 47b72c3b74 Handle padding of MUX net results. 2006-04-28 05:09:51 +00:00
steve a2c036d5ab Allow concatenations as arguments to inout ports. 2006-04-28 04:28:35 +00:00
steve 0d17e57656 Dump indexes of ident expressions 2006-04-28 04:19:31 +00:00
steve fd94268315 Detect missing lround function. 2006-04-27 05:04:59 +00:00
steve 36039e13ec schedule takes relative, not absolute, time. 2006-04-27 04:38:00 +00:00
steve a702f99c04 Dump function type as string. 2006-04-27 04:26:38 +00:00
steve 4493e3f928 Chop down assign r-values that elaborate too wide. 2006-04-26 04:43:50 +00:00
steve 3727052000 Include bit value in assertion message. 2006-04-26 04:39:23 +00:00
steve 39ff233cf1 Detect the presence of stdint.h 2006-04-25 22:41:10 +00:00
steve 58118bddc5 Warning when file is inadequate for requested range. 2006-04-25 05:00:12 +00:00
steve c2ff3d501c Fix support for indexed part select in continuous assign l-values. 2006-04-24 05:15:07 +00:00
steve 46d86ad276 Get tail counts right in nested concatenations. 2006-04-22 04:27:36 +00:00
steve 4dd1308eb0 Parse specify ifnone statements. 2006-04-17 04:35:49 +00:00
steve a978bb1e14 Cleanup lval part select handling. 2006-04-16 00:54:04 +00:00
steve 707af782b3 Fix part selects in l-values. 2006-04-16 00:15:43 +00:00
steve fc5cf55400 Use elab_and_eval to evaluate genvar expressions. 2006-04-12 05:05:03 +00:00
steve 6a74a090f0 Configure for stub. 2006-04-10 03:07:07 +00:00
steve c448b75f2c fpga target is not installed. 2006-04-10 03:05:54 +00:00
steve aed885ecc5 Add support for generate loops w/ wires and gates. 2006-04-10 02:40:18 +00:00
steve d365c144a8 Snapshot 20060409 2006-04-10 00:54:42 +00:00
steve f001d0001a Add support for generate loops w/ wires and gates. 2006-04-10 00:37:42 +00:00
steve decfbff2b1 Clean up index expression error message. 2006-04-10 00:32:14 +00:00
steve 3e45f4302b Be more accepting of the protect directive. 2006-03-30 05:44:36 +00:00
steve 77a0d7f4db task/function ports can have types. 2006-03-30 05:22:34 +00:00
steve e8efa6df53 Fix instance arrays indexed by overridden parameters. 2006-03-30 01:49:07 +00:00
steve 276f2d0032 Accept attributes in front of module instantiations. 2006-03-25 02:42:58 +00:00
steve 13a660b591 Get rid of excess PESTring:: prefix within class declaration. 2006-03-25 02:36:26 +00:00
steve f4a44df2cc Support more parameter syntax. 2006-03-18 22:53:38 +00:00
steve 5b3ba8c306 Properly handle signedness in compare. 2006-03-18 22:52:27 +00:00
steve 8defa4bcd0 Syntax for carrying sign with parameter. 2006-03-18 22:51:10 +00:00
steve dabdcf0fc9 const/non-const clash. 2006-03-15 19:15:34 +00:00
steve 8ff70410ab Handle multiple part/bi devices connected together. 2006-03-15 05:52:20 +00:00
steve 6f46d12e07 Add support for logic parameters. 2006-03-08 05:29:42 +00:00
steve 5f5a6b5396 Cleanup vpi_const to use vec4 values. 2006-03-06 05:43:15 +00:00
steve 1b911ad87a Add support for memory value change callbacks. 2006-03-05 05:45:58 +00:00
steve b0b614ae0e Some trivial log message improvements. 2006-02-22 03:08:53 +00:00
steve 9c16c34422 Put strings for reg objects. 2006-02-21 05:31:54 +00:00
steve 170e57d662 Callbacks for named event triggers. 2006-02-21 04:57:26 +00:00
steve 065f342278 Remove dead code. 2006-02-21 03:19:03 +00:00
steve a721586acb Get vpiVectorVal from memory words. 2006-02-21 02:56:49 +00:00
steve 50ad415c0d Support string values for memory words. 2006-02-21 02:39:27 +00:00
steve 4ba2afbbe1 Use g++ linker if there are C++ source files. 2006-02-21 02:38:44 +00:00
steve d3f89e0d4f Clean up makefiles to remove unsupported targets. 2006-02-15 18:42:42 +00:00
steve 457cf15b3b Snapshot 20060215 2006-02-15 18:00:33 +00:00
steve d0de678d57 real-to-integer conversions round, not truncate. 2006-02-02 05:48:45 +00:00
steve fa6e4a69a6 Parse more cases of (*). 2006-02-02 05:21:45 +00:00
steve d434dd7296 Allow part selects of memory words in l-values. 2006-02-02 02:43:57 +00:00
steve 3158e2caa1 Snapshot 20060124 2006-01-25 02:16:11 +00:00
steve e1ce72e245 Support wide divide nodes. 2006-01-03 06:19:31 +00:00
steve 368c27c9e4 Handle complex net node delays. 2006-01-03 05:22:14 +00:00
steve a4116efd57 Fix the return type of a synthesized divide. 2006-01-03 05:15:33 +00:00
steve 58f182a159 Node delays can be more general expressions in structural contexts. 2006-01-02 05:33:19 +00:00
steve b7861fa6e8 Require explicit delay node from source. 2006-01-02 05:32:06 +00:00
steve 1721799050 Document binary expression use. 2005-12-22 15:44:29 +00:00
steve df226c5d13 pad_to_width handles signed expressions. 2005-12-22 15:43:47 +00:00
steve e9bf00dff6 Pad part selects 2005-12-22 15:42:22 +00:00
steve c071cc1bbe More detailed check of binary expressions. 2005-12-22 15:38:33 +00:00
steve 101b373293 Allow constant concat expressions. 2005-12-07 04:04:23 +00:00
steve 5cf64dfa70 Include stdint.h if it is present. 2005-12-07 03:43:30 +00:00
steve 1021e5acc8 Fixes for stubborn compilers. 2005-12-05 21:21:18 +00:00
steve 4f7e7a2296 Some systems donot have stding.h? 2005-12-05 21:20:55 +00:00
steve 0c73f209de Be more careful with double types. 2005-12-05 21:19:55 +00:00
steve 0873c52474 vpi_signal supports vvp_fun_signal_vec types. 2005-11-30 00:42:14 +00:00
steve 64d46630e0 Snapshot 20051127 2005-11-27 17:53:28 +00:00
steve 8ed504b064 Fix for stubborn compiler. 2005-11-27 17:01:56 +00:00
steve 6161904bf8 Fix type safety warning from gcc. 2005-11-27 16:47:14 +00:00
steve 908955c72c Handle bit select of parameter with ranges. 2005-11-27 05:56:20 +00:00
steve bab70ccbed Handle indexed l-value to force. 2005-11-26 17:23:17 +00:00
steve 2b8fd28a95 Force instruction that can be indexed. 2005-11-26 17:16:05 +00:00
steve 0e044d6684 More precise about r-value width of constants. 2005-11-26 00:35:42 +00:00
steve 7efa6be236 stop/continue messages go through MCD for logging. 2005-11-25 18:35:38 +00:00
steve 35951510c5 Put vec8 and vec4 nets into seperate net classes. 2005-11-25 17:55:26 +00:00
steve 3f108f08ed Dump IVL_ST_DELAYX statements. 2005-11-20 15:58:53 +00:00
steve 244844c067 Document the IVL_ST_DELAY statements. 2005-11-20 15:58:25 +00:00
steve b416ae047b Fix compile warning. 2005-11-14 22:11:52 +00:00
steve c02b3b8ac6 Reorganize signal part select handling, and add support for
indexed part selects.

 Expand expression constant propagation to eliminate extra
 sums in certain cases.
2005-11-10 13:28:11 +00:00
steve bebcc05aab Handle very wide % and / operations using expanded vector2 support. 2005-11-10 13:27:16 +00:00
steve 8d49abf967 Document the MUXZ functor. 2005-11-10 13:25:31 +00:00
steve c87223170b Prepare for snapshot 20051012 2005-10-13 03:04:06 +00:00
steve 8e2898e51a Fix compile of net/real aliases. 2005-10-12 17:28:07 +00:00
steve 9c8c541f5d MUX nodes get inputs from nets, not from net inputs,
Detect and draw alias nodes to reduce net size and
 handle force confusion.
2005-10-12 17:26:17 +00:00
steve 3cdf655c79 force l-values do not support bit/part select. 2005-10-12 17:26:01 +00:00
steve 560c5a2584 Add alias nodes. 2005-10-12 17:23:15 +00:00
steve c75f0a930e Remove the $ from signal labels. They do not help. 2005-10-11 18:54:10 +00:00
steve bb3f3c1f46 Remove obsolete vvp_memory_label function. 2005-10-11 18:30:50 +00:00
steve 07f345da4d Logical or/and return VT_LOGIC type. 2005-10-11 16:15:52 +00:00
steve fb22bcc96b Remove dead dram_input_from_net and lpm_inputs_a_b 2005-10-10 04:16:13 +00:00
steve 2842a65fd1 Make sure the new size sticks in resize method. 2005-10-04 04:41:07 +00:00
steve a652719876 Add support for indexed select attached to parameters. 2005-10-04 04:09:25 +00:00
steve 16dc3ab4d4 Error message for invalid for-loop index variable. 2005-09-27 04:51:37 +00:00
steve cf85c19f7b Simplify NexusSet set handling. 2005-09-25 23:40:11 +00:00
steve 01a6dd61ca Support put_value of string values. 2005-09-21 01:04:59 +00:00
steve bf8b085159 Clean up compiler warnings. 2005-09-20 18:34:01 +00:00
steve ee22550047 Lazy processing of vvp_fun_part functor. 2005-09-20 00:51:53 +00:00
steve 2b07c7a685 Prevent some excess scheduling of logic propagation events. 2005-09-19 22:47:28 +00:00
steve be73be8c98 Spelling patches from Larry. 2005-09-19 21:45:35 +00:00
steve e2a1b90b12 Use lazy eval of BUF/NOT/OR/XOR gates. 2005-09-19 21:45:09 +00:00
steve d22d88923d Fix warnings about uninitialized variables. 2005-09-19 20:18:20 +00:00
steve 2729d6cd2e Include vvp_config.h instead of config.h 2005-09-19 20:17:59 +00:00
steve 21af0dbe3f Fix data type of parameters to logic. 2005-09-19 15:21:09 +00:00
steve c4d8ab8509 Improve loading of part selects when easy. 2005-09-17 04:01:32 +00:00
steve 988a0a7048 Add the load/v.p instruction. 2005-09-17 04:01:01 +00:00
steve 672aa61ae7 More robust use of precalculated expressions, and
Separate lookaside for written variables that can
 also be reused.
2005-09-17 01:01:00 +00:00
steve 7235706923 Make sure div, mod and mult nodes have line number info. 2005-09-15 23:04:09 +00:00
steve a256613fa6 Fix bug configuring NetModulo pins. 2005-09-15 22:54:47 +00:00
steve 5ec7dde52f Use iostream instead of stdio. 2005-09-15 22:54:04 +00:00
steve 19a1ae8d4f Preserve precalculated expressions when possible. 2005-09-15 02:50:13 +00:00
steve 14d79a655e Better reuse of IVL_EX_SELECT expressions. 2005-09-15 02:49:47 +00:00
steve 293976bacc Spelling fixes. 2005-09-15 02:30:09 +00:00
steve 4dfdc147c5 fit type elaboration of logical not. 2005-09-14 15:15:44 +00:00
steve c946f27d9b Add b0 and b1 edges to parser. 2005-09-14 15:01:07 +00:00
steve 9fd16575d9 Support bool expressions and compares handle them optimally. 2005-09-14 02:53:13 +00:00
steve b9c0b8aa79 Add an extensions.txt file. 2005-09-14 02:51:13 +00:00
steve 65584e6dde Add word integer compares. 2005-09-14 02:50:07 +00:00
steve c39976fbf1 Generate code to handle real valued muxes. 2005-09-01 04:11:37 +00:00
steve 4902c222fb Check operand types for compatibility. 2005-09-01 04:10:47 +00:00
steve ad761069c7 Support MUXR functors. 2005-09-01 04:08:47 +00:00
steve b69f59f2ec Handle memory references is continuous assignments. 2005-08-31 05:07:31 +00:00
steve 3ff2488d4f Clean up a few overflowed shifts. 2005-08-30 00:49:42 +00:00
steve efd7825964 minor correction to address check in of_MOV1XZ 2005-08-30 00:49:21 +00:00
steve 70f146924a Safe handling of C left shift. 2005-08-29 04:46:52 +00:00
steve 7c19eb51e7 Minor cleanup. 2005-08-29 04:46:13 +00:00
steve 6f839aa5df Eliminate int to vvp_bit4_t casts. 2005-08-29 02:38:50 +00:00
steve dac11c2468 Handle synthesis of fully packed case statements. 2005-08-27 04:32:08 +00:00
steve 5cf2ce6499 Fix bit destination address in of_AND 2005-08-27 03:28:57 +00:00
steve 73453996a9 Be more cautios about accessing out-of-range bits. 2005-08-27 03:28:16 +00:00
steve bc489a7761 Bring threads into the vvp_vector4_t structure. 2005-08-27 02:34:42 +00:00
steve 4a8be3db9c Implement bi-directional part selects. 2005-08-06 17:58:16 +00:00
steve 8232b621f1 Fix parse errors related to pr766. 2005-07-27 14:54:51 +00:00
steve 4cbffc6b77 bufif enable is LOGIC. 2005-07-15 19:22:52 +00:00
steve 9a16e030b5 Match data type of PV select input/output. 2005-07-15 04:13:25 +00:00
steve d353ddb660 Get output type correct for binary mux (ternary) expression. 2005-07-15 00:42:02 +00:00
steve bc9f286954 More debug information. 2005-07-15 00:41:09 +00:00
steve fde4ff72f6 Display as version 0.9.devel 2005-07-14 23:38:43 +00:00
steve a8d49921ee gcc4 compile errors. 2005-07-14 23:34:18 +00:00
steve 9cae53988a Dump function call expression node. 2005-07-14 16:15:13 +00:00
steve 559a1fd359 Remove the .word statement. 2005-07-13 04:58:29 +00:00
steve 5bfdd52391 Handle functions with real values. 2005-07-13 04:52:31 +00:00
steve b094ccc3f7 Functions get type from their output signal. 2005-07-13 04:51:36 +00:00
steve b9799cf6ec Remove NetVariable and ivl_variable_t structures. 2005-07-11 16:56:50 +00:00
steve 75ad90534b Generalize signals to carry types. 2005-07-07 16:22:49 +00:00
steve 3ac79c294a Implement real valued signals and arith nodes. 2005-07-06 04:29:25 +00:00
steve e7f3340513 Remove reference to SystemVerilog. 2005-06-28 04:25:55 +00:00
steve 60b9121c6c Make vector2 multiply more portable. 2005-06-27 21:13:14 +00:00
steve e3f300f4c2 AND functor explicitly knows its width. 2005-06-26 21:08:38 +00:00
steve 1c6be44724 More verbose debugging of part select width errors. 2005-06-26 21:08:11 +00:00
steve 6bf7556d65 Check width of part select based on direction. 2005-06-26 18:09:24 +00:00
steve c46f978dbb Fix uninitialzied attr pointers for UDP devices. 2005-06-26 18:08:46 +00:00
steve 9cac88330b AND gates propogate through scheduler, not directly. 2005-06-26 18:06:29 +00:00
steve de1dd2f2b3 Make bit masks of vector4_t 64bit aware. 2005-06-26 01:57:22 +00:00
steve 6c8e1f7834 inline the vvp_send_vec4_pv function. 2005-06-24 02:16:42 +00:00
steve b58705b829 Inline more simple stuff, and more vector4_t by const reference for performance. 2005-06-22 18:30:12 +00:00
steve 7091915b73 Reduce vvp_vector4 copies by using const references. 2005-06-22 00:04:48 +00:00
steve 5513974b78 Optimize vvp_scalar_t handling, and fun_buf Z handling. 2005-06-21 22:48:23 +00:00
steve ad78af2f91 Inline some commonly called vvp_vector4_t methods. 2005-06-20 01:28:14 +00:00
steve 1b30bac9f3 Optimize the LOAD_VEC implementation. 2005-06-19 18:42:00 +00:00
steve 66a579dd67 Handle signed display of unsigned signals. 2005-06-18 15:55:21 +00:00
steve 094dd7e4de threads member for waitable_hook_s needs initailizing. 2005-06-17 23:47:02 +00:00
steve 3b91db96cd Support set of IntVal to memory words. 2005-06-17 05:13:07 +00:00
steve 657ac8168e Debug messages. 2005-06-17 05:06:47 +00:00
steve a79fee39e9 Watch out for signed constants in magnitude compare. 2005-06-17 05:05:53 +00:00
steve 4cc421b3b7 Make functors know their own width. 2005-06-17 03:46:52 +00:00
steve 290c604c62 Fix bit offsets when processing lval concatenation. 2005-06-15 01:33:33 +00:00
steve 466ab5c2c7 Resolv do not propogate inputs that do not change. 2005-06-15 00:47:15 +00:00
steve 4ba195282d gcc3/4 compile errors. 2005-06-14 19:13:43 +00:00
steve cd14ee77ae Add the assign_v0_d instruction. 2005-06-14 01:44:09 +00:00
steve 21c7abf090 Accomodate fussy compilers. 2005-06-14 00:42:06 +00:00
steve 4413dd3c81 Fix compile errors. 2005-06-13 23:22:37 +00:00
steve 73f3589ea6 use NetPartSelect to shrink part from high bits. 2005-06-13 23:22:14 +00:00
steve 9278dad244 Make synthesized padding vector-aware. 2005-06-13 22:26:03 +00:00
steve a0dce80eba Document ivl_logic_delay function. 2005-06-13 22:25:37 +00:00
steve af5f713c0f Dump delays for logic devices. 2005-06-13 22:20:38 +00:00
steve 80cac983c6 More unified vec4 to hex string functions. 2005-06-13 00:54:04 +00:00
steve f5ba93eeb6 Remove unused ft_MOS truth tables. 2005-06-12 21:56:16 +00:00
steve 668781788b Support resistive mos devices. 2005-06-12 15:13:37 +00:00
steve 86729f52ca Remove functor classes, no longer needed. 2005-06-12 01:42:20 +00:00
steve fb8ddbbfde Remove useless references to functor.h 2005-06-12 01:25:27 +00:00
steve 2736859d8f Remove useless references to functor.h 2005-06-12 01:10:26 +00:00
steve a59f3b1fa6 Implement nmos and pmos devices. 2005-06-12 00:44:49 +00:00
steve dd4f765b06 Remove unneeded references to functor.h 2005-06-11 18:11:18 +00:00
steve f465bca305 UD delays use delay node. 2005-06-11 16:21:08 +00:00
steve cb967c10fe Handle all edge types of a synchronous UDP. 2005-06-11 02:04:48 +00:00
steve 3607fb584d Support UDP initial values. 2005-06-09 05:04:45 +00:00
steve 77792dcc2f Support sequential UDP devices. 2005-06-09 04:12:30 +00:00
steve 2f7ec71a78 Support %force/link 2005-06-02 16:03:47 +00:00
steve 42433f4df9 Add support for notif0/1 gates.
Make delay nodes support inertial delay.
 Add the %force/link instruction.
2005-06-02 16:02:11 +00:00
steve aa2e178667 Handle event/or with specific, efficient nodes. 2005-05-25 05:44:51 +00:00
steve 015d280c6a Handle assignments to part-select l-values. 2005-05-24 02:31:18 +00:00
steve 739a1839ed Do sign extension of structuran nets. 2005-05-24 01:44:27 +00:00
steve b6fd4f610b Add a sign-extension node. 2005-05-24 01:43:27 +00:00
steve 06e08dbdf0 Make sure comparison widths match. 2005-05-19 03:51:38 +00:00
steve 28168e0f57 Fixup structural GT comparators. 2005-05-18 03:46:01 +00:00
steve 7796c8bcfb Parameters cannot have their width changed. 2005-05-17 20:56:55 +00:00
steve 82be4ab189 Detect bit selects that need special handling. 2005-05-17 20:55:42 +00:00
steve 3a8e2e688d Clean up definition of vvp_vector4_t insertion into ostream. 2005-05-17 20:54:56 +00:00
steve 037ab9efe9 Document real behavior of set/v instruction. 2005-05-17 20:54:00 +00:00
steve d6a89a40cf Clean up instruction type reverences to bits. 2005-05-17 20:51:06 +00:00
steve 3bd09d1470 synthesis of Logic and shifts using vector gates. 2005-05-15 04:47:00 +00:00
steve d0ade1d082 Debug text. 2005-05-15 04:45:50 +00:00
steve fcb02ee9c2 Disable obsolete logic constant fixup code. 2005-05-15 04:44:30 +00:00
steve 870395e627 Move functor delays to vvp_delay_fun object. 2005-05-14 19:43:23 +00:00
steve c701fb615b Give buffers support for simple delays. 2005-05-13 05:13:12 +00:00
steve adbe734b6c Some debug messages. 2005-05-13 05:12:39 +00:00
steve c34e44dad0 Make sig-eq-constant optimization more effective. 2005-05-10 05:10:40 +00:00
steve 5a2dd3393f Skip assign if index is invalid. 2005-05-09 00:38:12 +00:00
steve ed78c5b677 Force part base out of bounds if index is invalid. 2005-05-09 00:36:58 +00:00
steve 7dd0d255a6 Add support for variable part select. 2005-05-08 23:40:14 +00:00
steve 48aa0f0075 Better handle assignment to bit/part select. 2005-05-07 03:16:31 +00:00
steve 5277124c76 Implement non-blocking part assign. 2005-05-07 03:15:42 +00:00
steve f6da64e2ec ostream insert for vvp_vector4_t objects. 2005-05-07 03:14:50 +00:00
steve 06816e79fe Clarify internal delays for assignments. 2005-05-07 03:14:00 +00:00
steve a1d899112a Include delay expressions for assignments in dump. 2005-05-07 03:13:30 +00:00
steve d548c9a5f8 Handle synthesis of concatenation expressions. 2005-05-06 00:25:13 +00:00
steve 2894cdefc7 Add cassign/link instruction. 2005-05-01 22:05:21 +00:00
steve df271c9fa3 Link signals that are source of procedural continuous assign. 2005-05-01 22:04:12 +00:00
steve 99aff5f10b Remove dead functor code. 2005-04-28 04:59:53 +00:00
steve e9bf021f6c vvp_fun_signal eliminates duplicate propagations. 2005-04-25 04:42:17 +00:00
steve aed8474944 Reimplement basic asynchronous processes. 2005-04-25 01:35:58 +00:00
steve af7e196518 synthesis of add and unary get vector widths right. 2005-04-25 01:30:31 +00:00
steve 365cfedd55 Update DFF support to new data flow. 2005-04-24 23:44:01 +00:00
steve f884652c19 Add DFF nodes. 2005-04-24 20:07:25 +00:00
steve 6244dc1194 Make logic aware of strength. 2005-04-13 06:35:11 +00:00
steve a3f696cd06 Add vvp driver functor for logic outputs,
Add ostream output operators for debugging.
2005-04-13 06:34:20 +00:00
steve 061fdf5a0d scalars with 0-drivers are hiZ by definition. 2005-04-09 06:00:58 +00:00
steve fe91ebe77c Default behavior for recv_vec8 methods. 2005-04-09 05:30:38 +00:00
steve e8a6835d36 Make clear that memory addresses are cannonical. 2005-04-08 04:52:31 +00:00
steve 800e2c6a17 All memory addresses are signed. 2005-04-08 04:51:16 +00:00
steve 29fa9e7321 Don not give to make_add express an unwanted width. 2005-04-08 04:50:31 +00:00
steve 65c7ec00e7 Rework NetRamDq and IVL_LPM_RAM nodes. 2005-04-06 05:29:08 +00:00
steve d62661257a Generate the right coes for unconnected UDP port. 2005-04-04 05:29:53 +00:00
steve c5cf77dc7e Support row level wildcards. 2005-04-04 05:13:59 +00:00
steve 20d3a8508e Remove dead fvectors class. 2005-04-03 06:13:34 +00:00
steve f16b69c1e5 Remove dead fvectors class. 2005-04-03 06:13:34 +00:00
steve 573e07225d Rework the vvp_delay_t class. 2005-04-03 05:45:51 +00:00
steve 236ff2b278 Clean up handle of UDPs. 2005-04-01 06:04:30 +00:00
steve b7ef2fcb0a Reimplement combinational UDPs. 2005-04-01 06:02:45 +00:00
steve becda0e26c popen must be matched by pclose. 2005-03-22 15:53:48 +00:00
steve d8a456bd67 The indexed set can write a vector, not just a bit. 2005-03-22 05:18:34 +00:00
steve 8184dfaed8 Handle wide operands to logical AND. 2005-03-19 06:59:53 +00:00
steve ca488dff4e Handle LPM shifts. 2005-03-19 06:23:49 +00:00
steve 23925b636e vvp.conf files are generated. 2005-03-18 02:57:23 +00:00
steve 53da6e9a33 Add support for LPM_UFUNC user defined functions. 2005-03-18 02:56:03 +00:00
steve 0f914bf35a UPdate elabrate continuous assighn of string to net. 2005-03-13 01:26:48 +00:00
steve f556452403 Handle function/task port vectors. 2005-03-12 23:45:33 +00:00
steve ab1ca54df2 Update support for LPM_MOD. 2005-03-12 06:43:35 +00:00
steve bae8507c90 Implement .arith/mod. 2005-03-12 06:42:28 +00:00
steve 313502f360 Implement VPI access to signal strengths,
Fix resolution of ambiguous drive pairs,
 Fix spelling of scalar.
2005-03-12 04:27:42 +00:00
steve 1c5b4881d7 Handle case inequality in netlists. 2005-03-09 05:52:03 +00:00
steve 53af2949b4 Generate code for new form of memory ports. 2005-03-09 04:53:40 +00:00
steve 789c95b1c1 reimplement memory ports. 2005-03-09 04:52:40 +00:00
steve 72240c460e Remove dead code from scheduler. 2005-03-06 17:25:03 +00:00
steve 8e135a1020 Non blocking assign to memory words. 2005-03-06 17:07:48 +00:00
steve 0fb1fd36ee Handle memory words in l-value concatenations. 2005-03-05 05:47:42 +00:00
steve e7c2e06260 Check that lead.mv vector width matches word. 2005-03-05 05:45:18 +00:00
steve 73997f813c Get read width of unitialized memory words right. 2005-03-05 05:44:32 +00:00
steve 75af32bd3c Get base address from word ranges that VPI user passed. 2005-03-05 05:43:03 +00:00
steve 4ccbb4f0b2 Get rval width right for arguments into task calls. 2005-03-05 05:38:33 +00:00
steve 85286cc086 Rearrange how memories are supported as vvp_vector4 arrays. 2005-03-03 04:33:10 +00:00
steve 04604188df Clock compression fix from Tony. 2005-02-19 16:45:01 +00:00
steve f7dc4307bd Fix duplicate delete from pr1073. 2005-02-19 16:44:38 +00:00
steve 257e1f9516 Support shifts and divide. 2005-02-19 02:43:38 +00:00
steve 5fe5d9184d Handle signed divide. 2005-02-19 02:41:23 +00:00
steve 589eb1d315 Implement .arith/div. 2005-02-19 01:32:52 +00:00
steve 2fcaac4060 Support constant part select writes to l-values, and large part select reads from signals. 2005-02-15 07:12:55 +00:00
steve 4051f7d986 Handle bitmux lvalues for constant r-values. 2005-02-14 05:00:11 +00:00
steve 02d0719529 l-value input may be a vector. 2005-02-14 04:58:50 +00:00
steve aaf35ab1a9 Handle bit selects in l-values to assignments. 2005-02-14 01:51:39 +00:00
steve c5e7e2ec0a Signals may receive part vectors from %set/x0
instructions. Re-implement the %set/x0 to do
 just that. Remove the useless %set/x0/x instruction.
2005-02-14 01:50:23 +00:00
steve ff067bb959 tri0 and tri1 resolvers must replace HiZ with 0/1 after resolution. 2005-02-13 05:26:30 +00:00
steve 1d7235b4f1 Replace supply nets with wires connected to pullup/down supply devices. 2005-02-13 01:15:07 +00:00
steve 97e0723bd1 Cleanup unused truth tables. 2005-02-12 23:05:25 +00:00
steve d4eb4d38bc Implement a-b muxes as vector devices 2005-02-12 22:54:29 +00:00
steve d00e3fc9a9 Check IVL_LPM_MUX configuration. 2005-02-12 22:53:41 +00:00
steve 9ec00e1288 Fix copyright notice. 2005-02-12 22:52:45 +00:00
steve 85d9ebded8 Implement the vvp_fun_muxz functor. 2005-02-12 22:50:52 +00:00
steve d74177634c Restructure NetMux devices to pass vectors.
Generate NetMux devices from ternary expressions,
 Reduce NetMux devices to bufif when appropriate.
2005-02-12 06:25:40 +00:00
steve eca4f4fa97 Draw C4 and C8 constants to account for strength. 2005-02-12 06:25:15 +00:00
steve 6b7b82758a Check nexus widths of IVL_LO_ nodes. 2005-02-12 06:17:43 +00:00
steve 355ead0002 Add debug dumps for vectors, and fix vvp_scaler_t make from BIT4_X values. 2005-02-12 06:13:22 +00:00
steve 4fce321900 Support C8 constants. 2005-02-12 03:27:18 +00:00
steve 2e6d2f8e98 Support scheduling vvp_vector8_t objects. 2005-02-12 03:26:14 +00:00
steve 55b5bf9d39 distinguish between single port namy instances, and single instances many sub-ports. 2005-02-10 04:56:58 +00:00
steve 1979fca239 Get the C4 width right for undriven nexa. 2005-02-10 04:55:45 +00:00
steve a0583ef124 Simplify vvp_scaler strength representation. 2005-02-10 04:54:41 +00:00
steve ee5bb5fcaf Add the NetRepeat node, and code generator support. 2005-02-08 00:12:36 +00:00
steve ca1bbc79a3 Add .repeat functor and BIFIF functors. 2005-02-07 22:42:42 +00:00
steve e74127e1fc Support .concat with arbitrary input counts. 2005-02-04 05:13:57 +00:00
steve b48abb2148 Add wide .arith/mult, and vvp_vector2_t vectors. 2005-02-04 05:13:02 +00:00
steve 97f83ffbe3 laborate reduction gates into LPM_RED_ nodes. 2005-02-03 04:56:20 +00:00
steve 018014368b Add support for reduction logic gates. 2005-02-03 04:55:13 +00:00
steve 20be0351ae Elaborate unary subtract and NOT in netlist
contexts, and concatenation too.
2005-01-30 05:20:38 +00:00
steve 68a788221e Support LPM_SUB 2005-01-30 05:09:04 +00:00
steve 84b3e8e2dc Get .arith/sub working. 2005-01-30 05:06:49 +00:00
steve e6cdd32c19 Clarify width argument to NetNet constructor. 2005-01-30 01:43:48 +00:00
steve c23a35a033 Debug messages for PGAssign elaboration. 2005-01-30 01:42:05 +00:00
steve 609b6a7baa Netlist boolean expressions generate gate vectors. 2005-01-29 18:46:18 +00:00
steve 0609c5f18c Use scheduler to initialize constant functor inputs. 2005-01-29 17:53:25 +00:00
steve d51503ffd8 move AND to buitin instead of table. 2005-01-29 17:52:06 +00:00
steve 7625a6c3e7 Check width of constant attached to nexus. 2005-01-29 16:47:52 +00:00
steve 695718d691 Clarify width of nexus. 2005-01-29 16:47:20 +00:00
steve e04fb5c083 Elaborate parameter reference to desired width without concats. 2005-01-29 16:46:22 +00:00
steve 07f64bc603 Support interactive mode even without readline. 2005-01-29 06:29:17 +00:00
steve bf3679b7d4 Add the -s flag to start up interactive. 2005-01-29 06:28:19 +00:00
steve ade5bdcafe Integrate pr1072 fix from v0_8-branch. 2005-01-29 00:37:06 +00:00
steve 7250337941 Integrate fixes from 0.8 branch. 2005-01-28 19:39:03 +00:00
steve 99ace10774 Simplified NetMult and IVL_LPM_MULT. 2005-01-28 05:39:33 +00:00
steve 6be34bba4d Special handling of constant shift 0. 2005-01-28 05:37:48 +00:00
steve a5b431ad20 Show the lpm_mult device. 2005-01-28 05:36:18 +00:00
steve a121e703f3 Add vector4 implementation of .arith/mult. 2005-01-28 05:34:25 +00:00
steve dfb7c7ba6f Remove the NetEBitSel and combine all bit/part select
behavior into the NetESelect node and IVL_EX_SELECT
 ivl_target expression type.
2005-01-24 05:28:30 +00:00
steve edeb9d8eca Part selects are done in the compiler, not here. 2005-01-24 05:08:02 +00:00
steve 14f557e6f4 Check widths of ternary expressions. 2005-01-24 05:05:25 +00:00
steve 25de448d34 Remove obsolete NetSubnet class. 2005-01-22 18:16:00 +00:00
steve cb4e0d4724 stub dump signed flags of magnitude compare. 2005-01-22 17:36:59 +00:00
steve 6a23f16860 .cmp/x supports signed magnitude compare. 2005-01-22 17:36:15 +00:00
steve a4710f375e LPM_CMP_NE/EQ are vectored devices. 2005-01-22 16:22:13 +00:00
steve 6c5e840617 Implement vectored CMP_EQ and NE 2005-01-22 16:21:11 +00:00
steve e28636776a Change case compare from logic to an LPM node. 2005-01-22 01:06:55 +00:00
steve b86fdd6bbc Implement the .cmp/eeq LPM node. 2005-01-22 01:06:20 +00:00
steve 1d1dda5a5d Implement the %load/x instruction. 2005-01-22 00:58:22 +00:00
steve 3222031970 Add missing concat.cc to cvs 2005-01-22 00:01:09 +00:00
steve bf6a5d0f50 Implement LPM_COMPARE nodes as two-input vector functors. 2005-01-16 04:20:32 +00:00
steve 1c3668ea7f Reimplement comparators as vvp_vector4_t nodes. 2005-01-16 04:19:08 +00:00
steve ead2481793 Fix elaboration of == compared to constants. 2005-01-13 00:23:10 +00:00
steve fcaaec0464 More robust input code generation for LPM_ADD. 2005-01-12 05:31:50 +00:00
steve 4d139b58aa Properly pad vector widths in pgassign. 2005-01-12 03:17:36 +00:00
steve 8c18c9152d More complete drawing of concat inputs. 2005-01-12 03:16:35 +00:00
steve 399dfe5c44 Handle concatenations with up to 16 inputs. 2005-01-10 01:42:59 +00:00
steve 9e94afe399 Use PartSelect/PV and VP to handle part selects through ports. 2005-01-09 20:16:00 +00:00
steve 6c711ee4d8 Merge $fopen robustness fix from 0.8 2005-01-09 20:12:22 +00:00
steve 9735b0e8b3 Add the .part/pv node and related functionality. 2005-01-09 20:11:15 +00:00
steve d5c33420ab vvp_fun_signal propagates vvp_vector8_t vectors when appropriate. 2005-01-01 02:12:34 +00:00
steve 34a14b983b Implement .resolv functors, and stub signals recv_vec8 method. 2004-12-31 06:00:06 +00:00
steve d1e2538aba No need to draw BUF or BUFZ tables. 2004-12-31 05:57:25 +00:00
steve 8bfc75d1ee Add specific BUFZ functor. 2004-12-31 05:56:36 +00:00
steve b1b93f860c Fix uninitialized fun pointer for resolver nodes. 2004-12-31 05:54:46 +00:00
steve 8f2d679c8a Unify elaboration of l-values for all proceedural assignments,
including assing, cassign and force.

 Generate NetConcat devices for gate outputs that feed into a
 vector results. Use this to hande gate arrays. Also let gate
 arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
steve 83423c978b Generate code for the .concat functors, from NetConcat objects.
Generate C<> constants of correct widths for functor arguments.
2004-12-29 23:52:09 +00:00
steve 1674d692b7 Add the part concatenation node (.concat).
Add a vvp_event_anyedge class to handle the special
 case of .event statements of edge type. This also
 frees the posedge/negedge types to handle all 4 inputs.

 Implement table functor recv_vec4 method to receive
 and process vectors.
2004-12-29 23:45:13 +00:00
steve 7166598ed0 Fix missing output propagation of part node. 2004-12-29 23:44:39 +00:00
steve 5eb25e44e1 Add ivl_event_scope, and better document ivl_event_X methods. 2004-12-18 18:56:18 +00:00
steve 59566158c4 Better detail on event trigger and wait statements. 2004-12-18 18:55:08 +00:00
steve e11ac0b1d8 Use %set/v to trigger events. 2004-12-18 18:53:26 +00:00
steve 8939467ac5 Rework named events and event/or. 2004-12-18 18:52:44 +00:00
steve 26d97558c4 Replace single release with release/net and release/reg. 2004-12-17 04:47:47 +00:00
steve 59bac26f4f Implement release functionality. 2004-12-17 04:46:40 +00:00
steve 78dda42493 Add the force/v instruction. 2004-12-15 17:17:42 +00:00
steve 36f36bd2ac Add basic force/release capabilities. 2004-12-15 17:16:08 +00:00
steve 0193daa436 Display the release statement details. 2004-12-15 17:11:13 +00:00
steve 4444079409 Fixup force statement elaboration. 2004-12-15 17:10:40 +00:00
steve 3947d7dd33 Force r-value padded to width. 2004-12-15 17:09:11 +00:00
steve 7973dad9f5 Arrange statement dumping in new source files. 2004-12-12 18:15:06 +00:00
steve d19e76a193 Fix r-value width of continuous assign. 2004-12-12 18:13:39 +00:00
steve ffedf32476 cassign and deassign handle concatenated l-values. 2004-12-11 05:43:30 +00:00
steve 527ddea811 Add stub conf files to cvs. 2004-12-11 04:22:35 +00:00
steve 65e9b6be12 Rework of internals to carry vectors through nexus instead
of single bits. Make the ivl, tgt-vvp and vvp initial changes
 down this path.
2004-12-11 02:31:25 +00:00
steve 6854660e18 v0.8 is its own directory. 2004-10-13 22:08:10 +00:00
steve 6818d996ea Version stamps for 0.8 2004-10-13 22:01:34 +00:00
steve 4907776eaa Prepare for snapshot 20041004 2004-10-04 18:46:26 +00:00
steve 51dd41f81a Fix excessive error message. 2004-10-04 03:09:38 +00:00
steve e4ae832153 Clean up spurious trailing white space. 2004-10-04 01:10:51 +00:00
steve b3a3428b9a Clean up bin32 files. 2004-10-04 01:09:07 +00:00
steve 2abdcfcaa4 Error message to match assertion. 2004-10-04 00:25:46 +00:00
steve 526b87cae3 Remove inaccurate comment. 2004-10-04 00:25:18 +00:00
steve 9383b165a4 MTI functions only user Mersene Twister 2004-10-04 00:14:08 +00:00
steve e827f8f8c1 Cleanup and factoring of autoconf. 2004-09-27 22:34:10 +00:00
steve 965d928430 More carefull about eliding bufzs that carry strength. 2004-09-25 21:04:25 +00:00
steve 96936456da Add a debug_elaborate flag 2004-09-25 01:58:44 +00:00
steve 94647be1f0 Some commentary on ivl_logic_pin. 2004-09-25 01:58:12 +00:00
steve e45230061e Dump tri0 and tri1 nets. 2004-09-25 01:57:33 +00:00
steve 180bfc5e72 Detect and prevent implicit declaration of hierarchical names. 2004-09-24 04:25:19 +00:00
steve 6d40326a2f Fix LPM GE to match LPM GT behavior. 2004-09-22 16:44:07 +00:00
steve 0a630b60dd Fix make check for pristine sources. 2004-09-18 01:59:44 +00:00
steve 1e4ffc292d Snapshot 20040915 2004-09-16 03:24:28 +00:00
steve a579114ae2 net_output handles l-value concatenations. 2004-09-16 03:17:33 +00:00
steve 8dfe16f6d2 Parse attributes attached to reg declarations. 2004-09-14 18:24:56 +00:00
steve d1dac0017d Fix the evaluation of constant ternary expressions. 2004-09-10 23:51:42 +00:00
steve 5e627c9adc Compile cleanup of C code. 2004-09-10 23:13:05 +00:00
steve 98ba641e67 Remove bad casts. 2004-09-10 00:15:45 +00:00
steve a70dd79cd8 Missing stdio.h header for warnings. 2004-09-10 00:15:17 +00:00
steve a8ee786036 Relaxed width constraint on pad_expression output. 2004-09-10 00:14:31 +00:00
steve d16e8f7c94 Macros can have null values. 2004-09-06 03:01:48 +00:00
steve 4148a2a44c Better type safety. 2004-09-05 21:29:07 +00:00
steve 5f38591676 Better type safety. 2004-09-05 21:19:51 +00:00
steve c10e572091 Support degenerat wait statements. 2004-09-05 21:07:26 +00:00
steve 1ab8879100 Fix syntax for $period to allow min:Ltyp:max expressions. 2004-09-05 21:01:51 +00:00
steve 2d498363d7 Handle instance array of port-less modules. 2004-09-05 18:09:47 +00:00
steve 15059bbfdc More acurate note about system functions. 2004-09-05 17:54:22 +00:00
steve 9de786fc44 Add support for module instance arrays. 2004-09-05 17:44:41 +00:00
steve 62cffe16f4 PR1026: assignment statements can have sensitivities in the l-values. 2004-09-04 04:24:15 +00:00
steve d3eb53e6b1 Better rule for install of system.sft. 2004-08-30 17:42:53 +00:00
steve b631e6e704 Snapshot 20040828 2004-08-28 16:50:26 +00:00
steve ba3790dc2b .net range values can be signed. 2004-08-28 16:26:41 +00:00
steve f02f5be3cc Fix use of system tasks in AT_STAR statements. 2004-08-28 16:23:05 +00:00
steve 7f67afe9d5 Add support for $unsigned. 2004-08-28 15:42:11 +00:00
steve d76ad25778 Do not change reg to wire in NetAssign_ unless synthesizing. 2004-08-28 15:08:31 +00:00
steve 21ba781604 More detailed error message about bad variable. 2004-08-28 14:59:44 +00:00
steve 95c8115fc7 Add support for localparam ranges. 2004-08-26 04:02:03 +00:00
steve 49366d1334 Add the $is_signed function. 2004-08-26 03:51:51 +00:00
steve e2b94947f5 Fix read count passed to fgets. 2004-08-24 16:16:23 +00:00
steve efe05a77cb nex_output for NetPDelay statements. 2004-06-30 15:32:18 +00:00
steve 8bf434754f Propagate source line number in synthetic delay statements. 2004-06-30 15:32:02 +00:00
steve 491df9c327 Watch out for real compared to constant. Handle as real. 2004-06-30 03:07:32 +00:00
steve fca2e64808 Dump variable type of system function. 2004-06-30 03:05:04 +00:00
steve 6cd7c1a650 Some explination of vpi_func arguments. 2004-06-30 03:00:36 +00:00
steve 3dbc07f34d Implement signed divide and signed right shift in nets. 2004-06-30 02:16:26 +00:00
steve 57b8ca191f Add signed LPM divide. 2004-06-30 02:15:57 +00:00
steve 9ee0210cac Code cleanup from Larry. 2004-06-24 15:22:23 +00:00
steve 69cfdbdc54 Fix broken calcuation of NE for constant. 2004-06-22 18:41:48 +00:00
steve 76c0fe459c Only pad the width of vector r-values. 2004-06-20 15:59:06 +00:00
steve 9ba1177a4d Generate signed modulus if appropriate. 2004-06-19 16:17:37 +00:00
steve 51fd249d8a Watch type of mak bit matches masked value. 2004-06-19 16:17:02 +00:00
steve 050ec6f325 Add signed modulus operator. 2004-06-19 15:52:53 +00:00
steve 03d7448550 compare-to-constant uses sig len, not val len. 2004-06-18 16:38:22 +00:00
steve b3529d8593 Help system function signedness survive elaboration. 2004-06-17 16:06:18 +00:00
steve 112368c7de Add a .sft file for the system functions. 2004-06-17 14:47:22 +00:00
steve d1f0a0b0d7 Save seed in static variable, in case user doesnt pass it. 2004-06-17 14:44:01 +00:00
steve b043445c80 Generate .cmp/eq nodes instead of sea of gates. 2004-06-16 23:33:42 +00:00
steve fd371a3958 Handle equality compare to constants specially. 2004-06-16 23:32:58 +00:00
steve 35619771dd Add structural equality compare nodes. 2004-06-16 16:33:25 +00:00
steve bdc6cb8723 Dump NE LPM device. 2004-06-16 16:22:04 +00:00
steve 2d63705093 Connect rsif of multiply to DataB. 2004-06-16 16:21:34 +00:00
steve b108167441 rdynamic for openbsd. 2004-06-13 16:27:17 +00:00
steve 9949040285 Add support for the default_nettype directive. 2004-06-13 04:56:53 +00:00
steve e8e0cd7cab Support / and % in synthesized contexts. 2004-06-12 15:00:02 +00:00
steve f2d4966634 Fix transcription error scaling c in uniform range. 2004-06-10 02:14:42 +00:00
steve 50bf2095df Move Mersenne Twister to $mti_random, and make
the standard $random standard. Also, add $dist_poisson.
2004-06-09 22:14:10 +00:00
steve 2003c5a21e Fix build order of vvp and vpi. 2004-06-09 22:13:43 +00:00
steve bfd393c91c Remove extra sub-make of vpi directory. 2004-06-09 22:13:14 +00:00
steve 37ae777111 Update to snapshot 20040606 2004-06-06 14:51:58 +00:00
steve dd69872266 Special case for unary - of real literal. 2004-06-04 23:34:15 +00:00
steve fbfc796647 Add unary minus as operator supported by verireal. 2004-06-04 23:33:51 +00:00
steve 8d3102388b Pick sign bit from the right place in the exponent number. 2004-06-04 23:26:34 +00:00
steve ba309e60bb Fix synthesis method for logical and/or 2004-06-01 01:04:57 +00:00
steve 5472b27e1f Rewire/generalize parsing an elaboration of
function return values to allow for better
 speed and more type support.
2004-05-31 23:34:36 +00:00
steve e7fa56981a More identifier lists use perm_strings. 2004-05-25 19:21:06 +00:00
steve 55ba131997 Handle wait with constant-false expression. 2004-05-25 03:42:58 +00:00
steve 559f73c135 Attach line numbers to wait statements. 2004-05-25 03:42:44 +00:00
steve b97f9448e0 Add support for the -I compiler flag. 2004-05-20 00:40:34 +00:00
steve a7ae8adf9b Support delayed/non-blocking assignment to reals and others. 2004-05-19 03:26:24 +00:00
steve 896f1b0de1 Generate code for nb assign to reals. 2004-05-19 03:25:42 +00:00
steve ca55cadc6c Add ivl_target support for non-blocking assign of real. 2004-05-19 03:18:40 +00:00
steve 324ba713e5 Handle explicit set of unsigned long width. For -m32 2004-05-18 18:45:11 +00:00
steve 69ebd0c49e Allow vpiParamter as a string type. 2004-05-18 18:43:38 +00:00
steve d60112d58b Handle null string as a single nul character. 2004-05-18 18:43:15 +00:00
steve 5807d6912e Protect ident pragma. 2004-03-17 17:07:12 +00:00
steve ec0e35b940 Treat cygwin like Unix for build purposes. 2004-03-17 17:06:44 +00:00
steve c8d67b904a Only include DEBUG_SYNTH2 if __FUNCTION__ defined. 2004-03-15 18:40:12 +00:00
steve c55adddb69 Assume struct initializers are GCC specific. 2004-03-15 18:35:37 +00:00
steve 8e63f56caf standard conpliant stdio.h. 2004-03-13 05:12:36 +00:00
steve 9e223b9696 Clean up rules for iverilog-vpi vs driver-vpi. 2004-03-11 06:13:58 +00:00
steve dd7472d125 Mingw needs -liberty, but Cygwin cannot tolerate it. 2004-03-11 06:06:59 +00:00
steve 0ef1ecab5e Verbose details for sft parsing. 2004-03-11 06:02:58 +00:00
steve 28719e8584 Add support for system function table files. 2004-03-10 04:51:24 +00:00
steve a0ed5e9e29 Separate out the lookup_sys_func table, for eventual
support for function type tables.

 Remove ipal compile flags.
2004-03-09 04:29:42 +00:00
steve 20b7a23bde Define function types. 2004-03-09 04:29:26 +00:00
steve 33783385d2 Get vpiModule of signals. 2004-03-09 03:11:02 +00:00
steve 914746f6f3 Minor spelling fixes. 2004-03-08 02:33:49 +00:00
steve c6453a0854 primitive ports can bind bi name. 2004-03-08 00:47:44 +00:00
steve 413932e406 Verilog2001 new style port declartions for primitives. 2004-03-08 00:10:29 +00:00
steve 9531920685 MOre thorough use of elab_and_eval function. 2004-03-07 20:04:10 +00:00
steve 4456937274 Snapshot 20040220 2004-02-21 01:39:58 +00:00
steve efef8fba85 Add load command to interactive stop.
Support decimal constants passed interactive to system tasks.
2004-02-21 00:44:34 +00:00
steve 177b6ffb6a Addtrbute keys are perm_strings. 2004-02-20 18:53:33 +00:00
steve 1295058e5d parameter keys are per_strings. 2004-02-20 06:22:56 +00:00
steve b5b02269f1 unused variable warning. 2004-02-20 03:20:04 +00:00
steve 60adfb845d Do not strip leading spaces, or expect them either. 2004-02-20 01:53:02 +00:00
steve a4c5ff0bd3 vpiStringVal does not include leading nulls. 2004-02-20 01:52:25 +00:00
steve 72f9dc5094 Add the $fgets function. 2004-02-19 21:33:13 +00:00
steve 65f09337f6 Add sysfunctype to calltf structure. 2004-02-19 21:32:46 +00:00
steve 8d2858c555 vpiStringVal writes need to set all the bits of a reg. 2004-02-19 21:31:59 +00:00
steve 89acc41437 LPM, logic and Variables have perm_string names. 2004-02-19 07:06:57 +00:00
steve 536068bdfb Memory and Event names use perm_string. 2004-02-19 06:57:10 +00:00
steve 2d7380c03b PRototypes match the standard. 2004-02-18 17:52:00 +00:00
steve 27af95d402 Use perm_strings for named langiage items. 2004-02-18 17:11:54 +00:00
steve 17c891bc9c Fix type mismatches of various VPI functions. 2004-02-18 02:51:59 +00:00
steve 38ec4b7851 Support unsigned divide of huge numbers. 2004-02-17 06:52:55 +00:00
steve 6f9ebb1e60 Add the $dumpflush function 2004-02-15 20:46:01 +00:00
steve 0fd5a79760 Cleanup of warnings. 2004-02-15 18:03:30 +00:00
steve 4288f3c6d0 Better error checking of primitive tables. 2004-02-15 17:48:28 +00:00
steve d64295ed65 primitives support reg output name syntax. 2004-02-15 17:48:16 +00:00
steve 2f8a40b159 Fix evaluation of compare to constant expression. 2004-02-15 04:23:48 +00:00
steve 081a6a4088 Cleanup configure detection of win32. 2004-02-15 03:17:36 +00:00
steve c971448760 dumpfile selects file at compiletf time. 2004-02-15 03:17:15 +00:00
steve c275ef9482 Report elaboration errors without crashing. 2004-02-15 00:19:29 +00:00
steve 8188c4c690 Makefile cleanup. 2004-02-10 19:25:00 +00:00
steve d482e341ae Fix direction of Q/D signals of FD devices. 2004-02-10 16:39:33 +00:00
steve f2b9b8946f Snapshot 20040209 2004-02-09 21:29:05 +00:00
steve fa4a873628 Add support for lxt2 break size 2004-02-06 18:23:30 +00:00
steve a436bfc711 Include from current directory. 2004-01-28 23:54:10 +00:00
steve c2ab27541f Make sure I get ivl_target.h from this source. 2004-01-26 23:31:57 +00:00
steve 5160021b48 Make sure file64 support is on cc -D flags. 2004-01-26 21:52:46 +00:00
steve f349449a49 Honor default format of numbers. 2004-01-23 23:40:44 +00:00
steve de7f87853d Generate error when missing concatenation operands. 2004-01-21 04:57:40 +00:00
steve 6a02613fca Get rid of useless warning. 2004-01-21 04:35:03 +00:00
steve 3bb408faf2 Add support for initialization assign in port list declaration of reg. 2004-01-21 03:37:12 +00:00
steve 4987970af4 Give the vip directory its own configure and vpi_config.h 2004-01-21 01:22:51 +00:00
steve d98720af4d Isolate configure from containing config.h 2004-01-20 21:00:47 +00:00
312 changed files with 36777 additions and 18988 deletions
+8 -22
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Attrib.cc,v 1.5 2002/08/12 01:34:58 steve Exp $"
#ident "$Id: Attrib.cc,v 1.6 2004/02/20 18:53:33 steve Exp $"
#endif
# include "config.h"
@@ -36,25 +36,8 @@ Attrib::~Attrib()
delete[] list_;
}
#if 0
void Attrib::copy_attributes(const map<string,verinum>&attr)
{
assert(list_ == 0);
nlist_ = attr.size();
list_ = new cell_[nlist_];
map<string,verinum>::const_iterator idx;
unsigned jdx;
for (idx = attr.begin(), jdx = 0 ; idx != attr.end() ; idx ++, jdx++) {
struct cell_*tmp = list_ + jdx;
tmp->key = (*idx).first;
tmp->val = (*idx).second;
}
}
#endif
const verinum& Attrib::attribute(const string&key) const
const verinum& Attrib::attribute(perm_string key) const
{
for (unsigned idx = 0 ; idx < nlist_ ; idx += 1) {
@@ -66,7 +49,7 @@ const verinum& Attrib::attribute(const string&key) const
return null;
}
void Attrib::attribute(const string&key, const verinum&value)
void Attrib::attribute(perm_string key, const verinum&value)
{
unsigned idx;
@@ -108,10 +91,10 @@ unsigned Attrib::attr_cnt() const
return nlist_;
}
const char* Attrib::attr_key(unsigned idx) const
perm_string Attrib::attr_key(unsigned idx) const
{
assert(idx < nlist_);
return list_[idx].key.c_str();
return list_[idx].key;
}
const verinum& Attrib::attr_value(unsigned idx) const
@@ -123,6 +106,9 @@ const verinum& Attrib::attr_value(unsigned idx) const
/*
* $Log: Attrib.cc,v $
* Revision 1.6 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.5 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
+9 -6
View File
@@ -19,10 +19,10 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Attrib.h,v 1.4 2002/08/12 01:34:58 steve Exp $"
#ident "$Id: Attrib.h,v 1.5 2004/02/20 18:53:33 steve Exp $"
#endif
# include <string>
# include "StringHeap.h"
# include "verinum.h"
/*
@@ -35,20 +35,20 @@ class Attrib {
Attrib();
~Attrib();
const verinum&attribute(const string&key) const;
void attribute(const string&key, const verinum&value);
const verinum&attribute(perm_string key) const;
void attribute(perm_string key, const verinum&value);
bool has_compat_attributes(const Attrib&that) const;
/* Provide a means of iterating over the entries in the map. */
unsigned attr_cnt() const;
const char* attr_key(unsigned idx) const;
perm_string attr_key(unsigned idx) const;
const verinum& attr_value(unsigned idx) const;
private:
struct cell_ {
string key;
perm_string key;
verinum val;
};
@@ -62,6 +62,9 @@ class Attrib {
/*
* $Log: Attrib.h,v $
* Revision 1.5 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.4 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
+6 -1
View File
@@ -19,11 +19,13 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: LineInfo.h,v 1.7 2003/01/17 05:49:03 steve Exp $"
#ident "$Id: LineInfo.h,v 1.8 2005/06/14 19:13:43 steve Exp $"
#endif
# include <string>
using namespace std;
/*
* This class holds line information for an internal object.
*
@@ -52,6 +54,9 @@ class LineInfo {
/*
* $Log: LineInfo.h,v $
* Revision 1.8 2005/06/14 19:13:43 steve
* gcc3/4 compile errors.
*
* Revision 1.7 2003/01/17 05:49:03 steve
* Use stringstream in place of sprintf.
*
+30 -50
View File
@@ -16,7 +16,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.161 2003/12/12 04:36:48 steve Exp $"
#ident "$Id: Makefile.in,v 1.176 2006/05/01 20:47:29 steve Exp $"
#
#
SHELL = /bin/sh
@@ -25,7 +25,7 @@ SHELL = /bin/sh
# by the compiler. It reflects the assigned version number for the
# product as a whole. Most components also print the CVS Name: token
# in order to get a more automatic version stamp as well.
VERSION = 0.7
VERSION = 0.9.devel
prefix = @prefix@
exec_prefix = @exec_prefix@
@@ -43,7 +43,6 @@ mandir = @mandir@
libdir64 = @libdir64@
dllib=@DLLIB@
rdynamic=@rdynamic@
strip_dynamic=@strip_dynamic@
CC = @CC@
@@ -56,23 +55,14 @@ STRIP = @STRIP@
LEX = @LEX@
YACC = @YACC@
CPPFLAGS = @CPPFLAGS@ @DEFS@
CXXFLAGS = @CXXFLAGS@ -I. -I$(srcdir)
CPPFLAGS = @ident_support@ @DEFS@ -I. -I$(srcdir) @CPPFLAGS@
CXXFLAGS = -Wall @CXXFLAGS@
PICFLAGS = @PICFLAG@
LDFLAGS = @LDFLAGS@
# The TARGETS variable lists the target modules that can be build and
# installed. Some of them depend on external things, so are only
# compiled if the prerequisites are installed.
TARGETS = tgt-null
ifeq ('@HAVE_IPAL@','yes')
TARGETS += tgt-pal
endif
LDFLAGS = @rdynamic@ @LDFLAGS@
all: dep ivl@EXEEXT@
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp tgt-verilog tgt-stub; \
for dir in ivlpp tgt-verilog ; \
do (cd $$dir ; $(MAKE) $@); done
cd driver ; $(MAKE) VERSION=$(VERSION) $@
@@ -82,54 +72,46 @@ ifeq (@WIN32@,yes)
all: dep dosify.exe
dosify.exe: dosify.c
$(CC) -o dosify.exe dosify.c
ifeq (@MINGW32@,yes)
SUBDIRS += driver-vpi
endif
else
all: dep iverilog-vpi
endif
# This rule rules the compiler in the trivial hello.vl program to make
# sure the basics were compiled properly.
check: all
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) check); done
test -r check.conf || cp $(srcdir)/check.conf .
driver/iverilog -B. -BPivlpp -tcheck -ocheck.vvp $(srcdir)/examples/hello.vl
vvp/vvp -M- -M./vpi ./check.vvp | grep 'Hello, World'
clean:
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
for dir in vpi ivlpp tgt-verilog driver; \
do (cd $$dir ; $(MAKE) $@); done
rm -f *.o parse.cc parse.cc.output parse.h lexor.cc
rm -f *.o parse.cc parse.cc.output parse.h lexor.cc
rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc*
rm -rf dep ivl@EXEEXT@
distclean: clean
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
for dir in vpi ivlpp tgt-verilog driver; \
do (cd $$dir ; $(MAKE) $@); done
rm -f Makefile config.status config.log config.cache config.h
TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-xnf.o
FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o xnfio.o
TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o
FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o
O = main.o async.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
elab_lval.o elab_net.o elab_anet.o elab_pexpr.o elab_scope.o \
elab_lval.o elab_net.o elab_pexpr.o elab_scope.o \
elab_sig.o emit.o eval.o eval_attrib.o \
eval_tree.o expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
load_module.o netlist.o netmisc.o net_assign.o \
net_design.o net_event.o net_expr.o net_force.o net_func.o \
net_link.o net_modulo.o net_nex_input.o net_nex_output.o \
net_proc.o net_scope.o net_udp.o net_variable.o pad_to_width.o \
net_proc.o net_scope.o net_udp.o pad_to_width.o \
parse.o parse_misc.o pform.o pform_dump.o \
set_width.o symbol_search.o sync.o \
set_width.o symbol_search.o sync.o sys_funcs.o \
verinum.o verireal.o target.o targets.o \
Attrib.o HName.o LineInfo.o Module.o PData.o PDelays.o PEvent.o \
PExpr.o PGate.o \
Attrib.o HName.o LineInfo.o Module.o PDelays.o PEvent.o \
PExpr.o PGate.o PGenerate.o \
PTask.o PUdp.o PFunction.o PWire.o Statement.o StringHeap.o \
$(FF) $(TT)
@@ -143,19 +125,21 @@ ifeq (@WIN32@,yes)
# export and import library, and the last link makes a, ivl.exe
# that really exports the things that the import library imports.
ivl@EXEEXT@: $O ivl.def
$(CXX) -o ivl@EXEEXT@ $O $(dllib) @EXTRALIBS@
$(CXX) -o ivl@EXEEXT@ $O $(dllib) @EXTRALIBS@
dlltool --dllname ivl@EXEEXT@ --def ivl.def \
--output-lib libivl.a --output-exp ivl.exp
$(CXX) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@
$(CXX) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@
else
ivl@EXEEXT@: $O
$(CXX) $(CXXFLAGS) $(rdynamic) $(LDFLAGS) -o ivl@EXEEXT@ $O $(dllib)
$(CXX) $(LDFLAGS) -o ivl@EXEEXT@ $O $(dllib)
endif
ifeq (@WIN32@,yes)
ifeq (@MINGW32@,yes)
SUBDIRS += driver-vpi
else
all: dep iverilog-vpi
iverilog-vpi: iverilog-vpi.sh
sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' \
-e 's;@INCLUDEDIR@;@includedir@;' \
@@ -169,7 +153,7 @@ dep:
mkdir dep
%.o: %.cc
$(CXX) -Wall @ident_support@ $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
mv $*.d dep/$*.d
@@ -177,10 +161,8 @@ lexor.o: lexor.cc parse.h
parse.o: parse.cc
parse.cc: $(srcdir)/parse.y
parse.cc parse.h: $(srcdir)/parse.y
$(YACC) --verbose -t -p VL -d -o parse.cc $(srcdir)/parse.y
parse.h: parse.cc
mv parse.cc.h parse.h 2>/dev/null || mv parse.hh parse.h
syn-rules.cc: $(srcdir)/syn-rules.y
@@ -209,7 +191,7 @@ INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
INSTALL_DOCDIR = $(mandir)/man1
endif
ifeq (@WIN32@,yes)
ifeq (@MINGW32@,yes)
WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/sqrt-virtex.v $(prefix)/QUICK_START.txt
else
WIN32_INSTALL = $(bindir)/iverilog-vpi
@@ -217,9 +199,8 @@ endif
XNF_INSTALL = $(libdir)/ivl/xnf.conf $(libdir)/ivl/xnf-s.conf
install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC) $(XNF_INSTALL)
install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp driver; \
do (cd $$dir ; $(MAKE) $@); done
@@ -259,7 +240,7 @@ $(prefix)/iverilog-vpi.pdf: iverilog-vpi.pdf
# In windows installations, put a few examples and the quick_start
# into the destination directory.
ifeq (@WIN32@,yes)
ifeq (@MINGW32@,yes)
$(prefix)/hello.vl: $(srcdir)/examples/hello.vl
./dosify.exe $(srcdir)/examples/hello.vl tmp.vl
mv tmp.vl $(prefix)/hello.vl
@@ -283,7 +264,6 @@ installdirs: mkinstalldirs
uninstall:
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp driver; \
do (cd $$dir ; $(MAKE) $@); done
for f in xnf.conf xnf-s.conf ivl; \
+20 -7
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Module.cc,v 1.21 2003/04/02 03:00:14 steve Exp $"
#ident "$Id: Module.cc,v 1.25 2004/10/04 01:10:51 steve Exp $"
#endif
# include "config.h"
@@ -28,9 +28,10 @@
# include <assert.h>
/* n is a permallocated string. */
Module::Module(const char*n)
Module::Module(perm_string n)
: name_(n)
{
default_nettype = NetNet::NONE;
}
Module::~Module()
@@ -42,12 +43,12 @@ void Module::add_gate(PGate*gate)
gates_.push_back(gate);
}
void Module::add_task(const string&name, PTask*task)
void Module::add_task(perm_string name, PTask*task)
{
tasks_[name] = task;
}
void Module::add_function(const string &name, PFunction *func)
void Module::add_function(perm_string name, PFunction *func)
{
funcs_[name] = func;
}
@@ -75,7 +76,7 @@ unsigned Module::port_count() const
/*
* Return the array of PEIdent object that are at this port of the
* module. If the port is internally unconnected, return an empty
* array.
* array.
*/
const svector<PEIdent*>& Module::get_port(unsigned idx) const
{
@@ -88,7 +89,7 @@ const svector<PEIdent*>& Module::get_port(unsigned idx) const
return zero;
}
unsigned Module::find_port(const string&name) const
unsigned Module::find_port(const char*name) const
{
assert(name != "");
for (unsigned idx = 0 ; idx < ports.count() ; idx += 1) {
@@ -118,7 +119,7 @@ PWire* Module::get_wire(const hname_t&name) const
return (*obj).second;
}
PGate* Module::get_gate(const string&name)
PGate* Module::get_gate(perm_string name)
{
for (list<PGate*>::iterator cur = gates_.begin()
; cur != gates_.end()
@@ -149,6 +150,18 @@ const list<PProcess*>& Module::get_behaviors() const
/*
* $Log: Module.cc,v $
* Revision 1.25 2004/10/04 01:10:51 steve
* Clean up spurious trailing white space.
*
* Revision 1.24 2004/06/13 04:56:53 steve
* Add support for the default_nettype directive.
*
* Revision 1.23 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.22 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.21 2003/04/02 03:00:14 steve
* Cope with empty module ports while binding by name.
*
+38 -47
View File
@@ -1,7 +1,7 @@
#ifndef __Module_H
#define __Module_H
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
* Copyright (c) 1998-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,21 +19,22 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Module.h,v 1.32 2003/06/20 00:53:19 steve Exp $"
#ident "$Id: Module.h,v 1.40 2006/04/10 00:37:42 steve Exp $"
#endif
# include <list>
# include <map>
# include "svector.h"
# include "StringHeap.h"
# include "HName.h"
# include "named.h"
# include "LineInfo.h"
# include <string>
class PData;
# include "netlist.h"
class PEvent;
class PExpr;
class PEIdent;
class PGate;
class PGenerate;
class PTask;
class PFunction;
class PWire;
@@ -56,16 +57,17 @@ class Module : public LineInfo {
the port. */
public:
struct port_t {
string name;
perm_string name;
svector<PEIdent*> expr;
};
public:
/* The name passed here is the module name, not the instance
name. This make must be a permallocated string. */
explicit Module(const char*name);
explicit Module(perm_string name);
~Module();
NetNet::Type default_nettype;
/* The module has parameters that are evaluated when the
module is elaborated. During parsing, I put the parameters
@@ -76,14 +78,14 @@ class Module : public LineInfo {
PExpr*lsb;
bool signed_flag;
};
map<string,param_expr_t>parameters;
map<string,param_expr_t>localparams;
map<perm_string,param_expr_t>parameters;
map<perm_string,param_expr_t>localparams;
/* specparams are simpler then other params, in that they have
no type information. They are merely constant
expressions. */
map<string,PExpr*>specparams;
map<perm_string,PExpr*>specparams;
/* The module also has defparam assignments which don't create
new parameters within the module, but may be used to set
@@ -97,25 +99,30 @@ class Module : public LineInfo {
appear in the instantiated module. Therefore a
list of names in module-order is needed to pass from
a parameter-index to its name. */
list<string> param_names;
list<perm_string> param_names;
/* This is an array of port descriptors, which is in turn a
named array of PEident pointers. */
svector<port_t*> ports;
/* Keep a table of named events declared in the module. */
map<string,PEvent*>events;
map<perm_string,PEvent*>events;
/* Keep a table of datum variables declared in the module. */
map<hname_t,PData*>datum;
map<string,PExpr*> attributes;
map<perm_string,PExpr*> attributes;
/* These are the timescale for this module. The default is
set by the `timescale directive. */
int time_unit, time_precision;
const char*mod_name() const { return name_; }
/* The module has a list of genvars that may be used in
various generate schemes. */
list<perm_string> genvars;
/* the module has a list of generate schemes that appear in
the module definition. These are used at elaboration time. */
list<PGenerate*> generate_schemes;
perm_string mod_name() const { return name_; }
void add_gate(PGate*gate);
@@ -125,17 +132,17 @@ class Module : public LineInfo {
PWire* add_wire(PWire*wire);
void add_behavior(PProcess*behave);
void add_task(const string&name, PTask*def);
void add_function(const string&name, PFunction*def);
void add_task(perm_string name, PTask*def);
void add_function(perm_string name, PFunction*def);
unsigned port_count() const;
const svector<PEIdent*>& get_port(unsigned idx) const;
unsigned find_port(const string&) const;
unsigned find_port(const char*name) const;
// Find a wire by name. This is used for connecting gates to
// existing wires, etc.
PWire* get_wire(const hname_t&name) const;
PGate* get_gate(const string&name);
PGate* get_gate(perm_string name);
const map<hname_t,PWire*>& get_wires() const;
const list<PGate*>& get_gates() const;
@@ -144,18 +151,19 @@ class Module : public LineInfo {
void dump(ostream&out) const;
bool elaborate(Design*, NetScope*scope) const;
bool elaborate_scope(Design*, NetScope*scope) const;
typedef map<perm_string,NetExpr*> replace_t;
bool elaborate_scope(Design*, NetScope*scope, const replace_t&rep) const;
bool elaborate_sig(Design*, NetScope*scope) const;
private:
const char* name_;
perm_string name_;
map<hname_t,PWire*> wires_;
list<PGate*> gates_;
list<PProcess*> behaviors_;
map<string,PTask*> tasks_;
map<string,PFunction*> funcs_;
map<perm_string,PTask*> tasks_;
map<perm_string,PFunction*> funcs_;
private: // Not implemented
Module(const Module&);
@@ -165,30 +173,13 @@ class Module : public LineInfo {
/*
* $Log: Module.h,v $
* Revision 1.32 2003/06/20 00:53:19 steve
* Module attributes from the parser
* through to elaborated form.
* Revision 1.40 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.31 2003/06/13 19:10:45 steve
* Properly manage real variables in subscopes.
* Revision 1.39 2006/03/30 01:49:07 steve
* Fix instance arrays indexed by overridden parameters.
*
* Revision 1.30 2003/03/06 04:37:12 steve
* lex_strings.add module names earlier.
*
* Revision 1.29 2003/02/27 06:45:11 steve
* specparams as far as pform.
*
* Revision 1.28 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.27 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.26 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.25 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
* Revision 1.38 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*/
#endif
-63
View File
@@ -1,63 +0,0 @@
#ifndef __PData_H
#define __PData_H
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PData.h,v 1.1 2003/01/26 21:15:58 steve Exp $"
#endif
# include "HName.h"
# include "netlist.h"
# include "LineInfo.h"
/*
* The PData object represents declaration of atomic datum such as
* real and realtime variables. These are variables that cannot be bit
* or part selected, but can be used in expressions.
*/
class PData : public LineInfo {
public:
PData(const hname_t&hname);
~PData();
// Return a hierarchical name.
const hname_t&name() const;
void elaborate_scope(Design*des, NetScope*scope) const;
map<string,PExpr*> attributes;
private:
hname_t hname_;
private:
PData(const PData&);
PData& operator= (const PData&);
};
/*
* $Log: PData.h,v $
* Revision 1.1 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
*/
#endif
+52 -15
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PDelays.cc,v 1.11 2003/06/21 01:21:42 steve Exp $"
#ident "$Id: PDelays.cc,v 1.15 2006/07/08 21:48:46 steve Exp $"
#endif
# include "config.h"
@@ -62,11 +62,10 @@ void PDelays::set_delays(const svector<PExpr*>*del, bool df)
delete_flag_ = df;
}
static unsigned long calculate_val(Design*des, NetScope*scope,
const PExpr*expr)
static NetExpr*calculate_val(Design*des, NetScope*scope, const PExpr*expr)
{
NetExpr*dex = expr->elaborate_expr(des, scope);
NetExpr*dex = expr->elaborate_expr(des, scope, -1, false);
if (NetExpr*tmp = dex->eval_tree()) {
delete dex;
dex = tmp;
@@ -85,7 +84,9 @@ static unsigned long calculate_val(Design*des, NetScope*scope,
delay = 0;
delete tmp;
return delay;
NetEConst*tmp2 = new NetEConst(verinum(delay));
tmp2->set_line(*expr);
return tmp2;
}
@@ -96,35 +97,57 @@ static unsigned long calculate_val(Design*des, NetScope*scope,
des->scale_to_precision(fn.as_ulong(), scope);
delete tmp;
return delay;
NetEConst*tmp2 = new NetEConst(verinum(delay));
tmp2->set_line(*expr);
return tmp2;
}
/* Oops, cannot evaluate down to a constant. Error message. */
delete dex;
/* Oops, cannot evaluate down to a constant. */
return dex;
}
cerr << expr->get_line() << ": sorry: non-constant "
<< "delays not supported here: " << *expr << endl;
des->errors += 1;
return 0;
static NetExpr* make_delay_nets(Design*des, NetExpr*expr)
{
if (dynamic_cast<NetESignal*> (expr))
return expr;
if (dynamic_cast<NetEConst*> (expr))
return expr;
NetNet*sig = expr->synthesize(des);
if (sig == 0) {
cerr << expr->get_line() << ": error: Expression " << *expr
<< " is not suitable for delay expression." << endl;
return 0;
}
expr = new NetESignal(sig);
return expr;
}
void PDelays::eval_delays(Design*des, NetScope*scope,
unsigned long&rise_time,
unsigned long&fall_time,
unsigned long&decay_time) const
NetExpr*&rise_time,
NetExpr*&fall_time,
NetExpr*&decay_time,
bool as_nets_flag) const
{
assert(scope);
if (delay_[0]) {
rise_time = calculate_val(des, scope, delay_[0]);
if (as_nets_flag)
rise_time = make_delay_nets(des, rise_time);
if (delay_[1]) {
fall_time = calculate_val(des, scope, delay_[1]);
if (as_nets_flag)
fall_time = make_delay_nets(des, fall_time);
if (delay_[2]) {
decay_time = calculate_val(des, scope, delay_[2]);
if (as_nets_flag)
decay_time = make_delay_nets(des, decay_time);
} else {
if (rise_time < fall_time)
@@ -146,6 +169,20 @@ void PDelays::eval_delays(Design*des, NetScope*scope,
/*
* $Log: PDelays.cc,v $
* Revision 1.15 2006/07/08 21:48:46 steve
* Handle real valued literals in net contexts.
*
* Revision 1.14 2006/06/02 04:48:49 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.13 2006/01/03 05:22:14 steve
* Handle complex net node delays.
*
* Revision 1.12 2006/01/02 05:33:19 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.11 2003/06/21 01:21:42 steve
* Harmless fixup of warnings.
*
+12 -4
View File
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PDelays.h,v 1.7 2002/08/12 01:34:58 steve Exp $"
#ident "$Id: PDelays.h,v 1.9 2006/01/03 05:22:14 steve Exp $"
#endif
# include "svector.h"
@@ -34,6 +34,7 @@ using namespace std;
class Design;
class NetScope;
class NetExpr;
class PExpr;
/*
@@ -53,9 +54,10 @@ class PDelays {
void set_delays(const svector<PExpr*>*del, bool delete_flag=true);
void eval_delays(Design*des, NetScope*scope,
unsigned long&rise_time,
unsigned long&fall_time,
unsigned long&decay_time) const;
NetExpr*&rise_time,
NetExpr*&fall_time,
NetExpr*&decay_time,
bool as_nets_flag =false) const;
void dump_delays(ostream&out) const;
@@ -72,6 +74,12 @@ ostream& operator << (ostream&o, const PDelays&);
/*
* $Log: PDelays.h,v $
* Revision 1.9 2006/01/03 05:22:14 steve
* Handle complex net node delays.
*
* Revision 1.8 2006/01/02 05:33:19 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.7 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
+7 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
* Copyright (c) 2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,14 +17,14 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PEvent.cc,v 1.4 2003/03/01 06:25:30 steve Exp $"
#ident "$Id: PEvent.cc,v 1.5 2004/02/19 06:57:10 steve Exp $"
#endif
# include "config.h"
# include "PEvent.h"
PEvent::PEvent(const char*n)
PEvent::PEvent(perm_string n)
: name_(n)
{
}
@@ -33,13 +33,16 @@ PEvent::~PEvent()
{
}
const char* PEvent::name() const
perm_string PEvent::name() const
{
return name_;
}
/*
* $Log: PEvent.cc,v $
* Revision 1.5 2004/02/19 06:57:10 steve
* Memory and Event names use perm_string.
*
* Revision 1.4 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
+11 -6
View File
@@ -1,7 +1,7 @@
#ifndef __PEvent_H
#define __PEvent_H
/*
* Copyright (c) 2000 Stephen Williams ([email protected])
* Copyright (c) 2000-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,10 +19,11 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PEvent.h,v 1.8 2003/03/01 06:25:30 steve Exp $"
#ident "$Id: PEvent.h,v 1.9 2004/02/19 06:57:10 steve Exp $"
#endif
# include "LineInfo.h"
# include "StringHeap.h"
# include <string>
class Design;
@@ -36,16 +37,17 @@ class NetScope;
class PEvent : public LineInfo {
public:
// The name is a perm-allocated string.
explicit PEvent(const char*name);
// The name is a perm-allocated string. It is the simple name
// of the event, without any scope.
explicit PEvent(perm_string name);
~PEvent();
const char* name() const;
perm_string name() const;
void elaborate_scope(Design*des, NetScope*scope) const;
private:
const char* name_;
perm_string name_;
private: // not implemented
PEvent(const PEvent&);
@@ -54,6 +56,9 @@ class PEvent : public LineInfo {
/*
* $Log: PEvent.h,v $
* Revision 1.9 2004/02/19 06:57:10 steve
* Memory and Event names use perm_string.
*
* Revision 1.8 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
+34 -8
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PExpr.cc,v 1.33 2003/01/27 05:09:17 steve Exp $"
#ident "$Id: PExpr.cc,v 1.37 2005/10/04 04:09:25 steve Exp $"
#endif
# include "config.h"
@@ -53,6 +53,14 @@ NetNet* PExpr::elaborate_lnet(Design*des, NetScope*, bool) const
return 0;
}
NetNet* PExpr::elaborate_bi_net(Design*des, NetScope*) const
{
cerr << get_line() << ": error: "
<< "expression not valid as argument to inout port: "
<< *this << endl;
return 0;
}
PEBinary::PEBinary(char op, PExpr*l, PExpr*r)
: op_(op), left_(l), right_(r)
{
@@ -67,12 +75,12 @@ bool PEBinary::is_constant(Module*mod) const
return left_->is_constant(mod) && right_->is_constant(mod);
}
PECallFunction::PECallFunction(const hname_t&n, const svector<PExpr *> &parms)
PECallFunction::PECallFunction(const hname_t&n, const svector<PExpr *> &parms)
: path_(n), parms_(parms)
{
}
PECallFunction::PECallFunction(const hname_t&n)
PECallFunction::PECallFunction(const hname_t&n)
: path_(n)
{
}
@@ -140,7 +148,7 @@ bool PEFNumber::is_constant(Module*) const
}
PEIdent::PEIdent(const hname_t&s)
: path_(s), msb_(0), lsb_(0), idx_(0)
: path_(s), msb_(0), lsb_(0), sel_(SEL_NONE), idx_(0)
{
}
@@ -161,13 +169,19 @@ bool PEIdent::is_constant(Module*mod) const
{
if (mod == 0) return false;
{ map<string,Module::param_expr_t>::const_iterator cur;
cur = mod->parameters.find(path_.peek_name(0));
/* This is a work-around for map not matching < even when
there is a perm_string operator that can do the comprare.
The real fix is to make the path_ carry perm_strings. */
perm_string tmp = perm_string::literal(path_.peek_name(0));
{ map<perm_string,Module::param_expr_t>::const_iterator cur;
cur = mod->parameters.find(tmp);
if (cur != mod->parameters.end()) return true;
}
{ map<string,Module::param_expr_t>::const_iterator cur;
cur = mod->localparams.find(path_.peek_name(0));
{ map<perm_string,Module::param_expr_t>::const_iterator cur;
cur = mod->localparams.find(tmp);
if (cur != mod->localparams.end()) return true;
}
@@ -256,6 +270,18 @@ bool PEUnary::is_constant(Module*m) const
/*
* $Log: PExpr.cc,v $
* Revision 1.37 2005/10/04 04:09:25 steve
* Add support for indexed select attached to parameters.
*
* Revision 1.36 2005/08/06 17:58:16 steve
* Implement bi-directional part selects.
*
* Revision 1.35 2004/10/04 01:10:51 steve
* Clean up spurious trailing white space.
*
* Revision 1.34 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.33 2003/01/27 05:09:17 steve
* Spelling fixes.
*
+240 -100
View File
@@ -19,10 +19,11 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PExpr.h,v 1.65 2003/02/08 19:49:21 steve Exp $"
#ident "$Id: PExpr.h,v 1.83 2006/06/18 04:15:50 steve Exp $"
#endif
# include <string>
# include <vector>
# include "netlist.h"
# include "verinum.h"
# include "LineInfo.h"
@@ -50,11 +51,13 @@ class PExpr : public LineInfo {
virtual void dump(ostream&) const;
// Procedural elaboration of the expression. Set the
// bare_memory_ok flag if the result is allowed to be a
// NetEMemory without an index.
// Procedural elaboration of the expression. The expr_width is
// the width of the context of the expression (i.e. the
// l-value width of an assignment) or -1 if the expression is
// self-determinted. The sys_task_arg flag is true if
// expressions are allowed to be incomplete.
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
bool sys_task_arg =false) const;
int expr_width, bool sys_task_arg) const;
// Elaborate expressions that are the r-value of parameter
// assignments. This elaboration follows the restrictions of
@@ -66,30 +69,37 @@ class PExpr : public LineInfo {
// continuous assign or other wholly structural context.
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0 =Link::STRONG,
Link::strength_t drive1 =Link::STRONG)
const;
// This method elaborates the expression as NetNet objects. It
// only allows regs suitable for procedural continuous assignments.
virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
// This method elaborates the expression as gates, but
// restricted for use as l-values of continuous assignments.
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
bool implicit_net_ok =false) const;
// This is similar to elaborate_lnet, except that the
// expression is evaluated to be bi-directional. This is
// useful for arguments to inout ports of module instances and
// ports of tran primitives.
virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
// Expressions that can be in the l-value of procedural
// assignments can be elaborated with this method.
virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
// assignments can be elaborated with this method. If the
// is_force flag is true, then the set of valid l-value types
// is slightly modified to accomodate the Verilog force
// statement
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const;
// This attempts to evaluate a constant expression, and return
// a verinum as a result. If the expression cannot be
// evaluated, return 0.
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual verinum* eval_const(const Design*des, NetScope*sc) const;
// This method returns true if that expression is the same as
// this expression. This method is used for comparing
@@ -115,27 +125,31 @@ class PEConcat : public PExpr {
PEConcat(const svector<PExpr*>&p, PExpr*r =0);
~PEConcat();
virtual verinum* eval_const(const Design*des, NetScope*sc) const;
virtual void dump(ostream&) const;
// Concatenated Regs can be on the left of procedural
// continuous assignments.
virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
bool implicit_net_ok =false) const;
virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
int expr_width, bool sys_task_arg) const;
virtual NetEConcat*elaborate_pexpr(Design*des, NetScope*) const;
virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const;
virtual bool is_constant(Module*) const;
private:
NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
bool implicit_net_ok,
bool bidirectional_flag) const;
private:
svector<PExpr*>parms_;
PExpr*repeat_;
@@ -160,7 +174,7 @@ class PEEvent : public PExpr {
edge_t type() const;
PExpr* expr() const;
virtual void dump(ostream&) const;
private:
@@ -182,15 +196,23 @@ class PEFNumber : public PExpr {
/* The eval_const method as applied to a floating point number
gets the *integer* value of the number. This accounts for
any rounding that is needed to get the value. */
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual verinum* eval_const(const Design*des, NetScope*sc) const;
/* A PEFNumber is a constant, so this returns true. */
virtual bool is_constant(Module*) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
int expr_width, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned lwidth,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual void dump(ostream&) const;
private:
@@ -205,27 +227,28 @@ class PEIdent : public PExpr {
virtual void dump(ostream&) const;
// Regs can be on the left of procedural continuous assignments
virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
// Identifiers are allowed (with restrictions) is assign l-values.
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
bool implicit_net_ok =false) const;
virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
// Identifiers are also allowed as procedural assignment l-values.
virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const;
// Structural r-values are OK.
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
int expr_width, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
// Elaborate the PEIdent as a port to a module. This method
@@ -233,33 +256,67 @@ class PEIdent : public PExpr {
NetNet* elaborate_port(Design*des, NetScope*sc) const;
virtual bool is_constant(Module*) const;
verinum* eval_const(const Design*des, const NetScope*sc) const;
verinum* eval_const(const Design*des, NetScope*sc) const;
const hname_t& path() const;
private:
NetAssign_*elaborate_lval_net_part_(Design*, NetScope*, NetNet*) const;
NetAssign_*elaborate_lval_net_idx_up_(Design*, NetScope*, NetNet*) const;
NetAssign_*elaborate_lval_net_idx_do_(Design*, NetScope*, NetNet*) const;
private:
NetExpr*elaborate_expr_param(Design*des,
NetScope*scope,
const NetExpr*par,
NetScope*found,
const NetExpr*par_msb,
const NetExpr*par_lsb) const;
NetExpr*elaborate_expr_net(Design*des,
NetScope*scope,
NetNet*net,
NetScope*found) const;
NetExpr*elaborate_expr_net_part_(Design*des,
NetScope*scope,
NetNet*net,
NetScope*found) const;
NetExpr*elaborate_expr_net_idx_up_(Design*des,
NetScope*scope,
NetNet*net,
NetScope*found) const;
NetExpr*elaborate_expr_net_idx_do_(Design*des,
NetScope*scope,
NetNet*net,
NetScope*found) const;
NetExpr*elaborate_expr_net_bit_(Design*des,
NetScope*scope,
NetNet*net,
NetScope*found) const;
hname_t path_;
public:
// Use these to support bit- and part-select operators.
// Use these to support part-select operators.
PExpr*msb_;
PExpr*lsb_;
// If this is a reference to a memory, this is the index
// expression.
PExpr*idx_;
enum { SEL_NONE, SEL_PART, SEL_IDX_UP, SEL_IDX_DO } sel_;
// If this is a reference to a memory/array, this is the index
// expression. If this is a reference to a vector, this is a
// bit select.
std::vector<PExpr*> idx_;
NetNet* elaborate_net_ram_(Design*des, NetScope*scope,
NetMemory*mem, unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
NetNet* elaborate_net_bitmux_(Design*des, NetScope*scope,
NetNet*sig,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
@@ -267,6 +324,15 @@ class PEIdent : public PExpr {
NetAssign_* elaborate_mem_lval_(Design*des, NetScope*scope,
NetMemory*mem) const;
NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
bool implicit_net_ok,
bool bidirectional_flag) const;
NetNet*make_implicit_net_(Design*des, NetScope*scope) const;
bool eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
unsigned&midx, unsigned&lidx) const;
};
class PENumber : public PExpr {
@@ -280,17 +346,19 @@ class PENumber : public PExpr {
virtual void dump(ostream&) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetEConst*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
int expr_width, bool) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual verinum* eval_const(const Design*des, NetScope*sc) const;
virtual bool is_the_same(const PExpr*that) const;
virtual bool is_constant(Module*) const;
@@ -316,15 +384,15 @@ class PEString : public PExpr {
virtual void dump(ostream&) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetEConst*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
int expr_width, bool) const;
virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const;
verinum* PEString::eval_const(const Design*, const NetScope*) const;
verinum* eval_const(const Design*, NetScope*) const;
virtual bool is_constant(Module*) const;
@@ -341,15 +409,15 @@ class PEUnary : public PExpr {
virtual void dump(ostream&out) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
int expr_width, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual verinum* eval_const(const Design*des, NetScope*sc) const;
virtual bool is_constant(Module*) const;
@@ -369,15 +437,15 @@ class PEBinary : public PExpr {
virtual void dump(ostream&out) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetEBinary*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
int expr_width, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual verinum* eval_const(const Design*des, NetScope*sc) const;
private:
char op_;
@@ -388,44 +456,44 @@ class PEBinary : public PExpr {
NetNet* elaborate_net_add_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
NetNet* elaborate_net_bit_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
NetNet* elaborate_net_cmp_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
NetNet* elaborate_net_div_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
NetNet* elaborate_net_mod_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
NetNet* elaborate_net_log_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
NetNet* elaborate_net_mul_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
NetNet* elaborate_net_shift_(Design*des, NetScope*scope,
unsigned lwidth,
unsigned long rise,
unsigned long fall,
unsigned long decay) const;
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay) const;
};
/*
@@ -443,15 +511,15 @@ class PETernary : public PExpr {
virtual void dump(ostream&out) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetETernary*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
int expr_width, bool sys_task_arg) const;
virtual NetETernary*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual verinum* eval_const(const Design*des, NetScope*sc) const;
private:
PExpr*expr_;
@@ -473,13 +541,13 @@ class PECallFunction : public PExpr {
virtual void dump(ostream &) const;
virtual NetNet* elaborate_net(Design*des, NetScope*scope,
unsigned width,
unsigned long rise,
unsigned long fall,
unsigned long decay,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
bool sys_task_arg =false) const;
int expr_wid, bool sys_task_arg) const;
private:
hname_t path_;
@@ -488,10 +556,82 @@ class PECallFunction : public PExpr {
bool check_call_matches_definition_(Design*des, NetScope*dscope) const;
NetExpr* elaborate_sfunc_(Design*des, NetScope*scope) const;
NetNet* elaborate_net_sfunc_(Design*des, NetScope*scope,
unsigned width,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
};
/*
* $Log: PExpr.h,v $
* Revision 1.83 2006/06/18 04:15:50 steve
* Add support for system functions in continuous assignments.
*
* Revision 1.82 2006/06/02 04:48:49 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.81 2006/04/28 04:28:35 steve
* Allow concatenations as arguments to inout ports.
*
* Revision 1.80 2006/04/16 00:54:04 steve
* Cleanup lval part select handling.
*
* Revision 1.79 2006/04/16 00:15:43 steve
* Fix part selects in l-values.
*
* Revision 1.78 2006/03/25 02:36:26 steve
* Get rid of excess PESTring:: prefix within class declaration.
*
* Revision 1.77 2006/02/02 02:43:57 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.76 2006/01/02 05:33:19 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.75 2005/12/07 04:04:23 steve
* Allow constant concat expressions.
*
* Revision 1.74 2005/11/27 17:01:56 steve
* Fix for stubborn compiler.
*
* Revision 1.73 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.72 2005/11/10 13:28:11 steve
* Reorganize signal part select handling, and add support for
* indexed part selects.
*
* Expand expression constant propagation to eliminate extra
* sums in certain cases.
*
* Revision 1.71 2005/10/04 04:09:25 steve
* Add support for indexed select attached to parameters.
*
* Revision 1.70 2005/08/06 17:58:16 steve
* Implement bi-directional part selects.
*
* Revision 1.69 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.68 2005/01/09 20:16:00 steve
* Use PartSelect/PV and VP to handle part selects through ports.
*
* Revision 1.67 2004/12/29 23:55:43 steve
* Unify elaboration of l-values for all proceedural assignments,
* including assing, cassign and force.
*
* Generate NetConcat devices for gate outputs that feed into a
* vector results. Use this to hande gate arrays. Also let gate
* arrays handle vectors of gates when the outputs allow for it.
*
* Revision 1.66 2004/10/04 01:10:51 steve
* Clean up spurious trailing white space.
*
* Revision 1.65 2003/02/08 19:49:21 steve
* Calculate delay statement delays using elaborated
* expressions instead of pre-elaborated expression
+11 -6
View File
@@ -17,16 +17,17 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PFunction.cc,v 1.6 2002/08/12 01:34:58 steve Exp $"
#ident "$Id: PFunction.cc,v 1.7 2004/05/31 23:34:36 steve Exp $"
#endif
# include "config.h"
#include "PTask.h"
PFunction::PFunction()
: out_(0), ports_(0), statement_(0)
PFunction::PFunction(perm_string name)
: name_(name), ports_(0), statement_(0)
{
return_type_.type = PTF_NONE;
}
PFunction::~PFunction()
@@ -46,14 +47,18 @@ void PFunction::set_statement(Statement*s)
statement_ = s;
}
void PFunction::set_output(PWire*o)
void PFunction::set_return(PTaskFuncArg t)
{
assert(out_ == 0);
out_ = o;
return_type_ = t;
}
/*
* $Log: PFunction.cc,v $
* Revision 1.7 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
+79 -13
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2000 Stephen Williams ([email protected])
* Copyright (c) 1999-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PGate.cc,v 1.15 2003/03/06 04:37:12 steve Exp $"
#ident "$Id: PGate.cc,v 1.18 2006/01/03 05:22:14 steve Exp $"
#endif
# include "config.h"
@@ -27,7 +27,7 @@
# include "verinum.h"
# include <assert.h>
PGate::PGate(const string&name,
PGate::PGate(perm_string name,
svector<PExpr*>*pins,
const svector<PExpr*>*del)
: name_(name), pins_(pins)
@@ -37,7 +37,7 @@ PGate::PGate(const string&name,
str1_ = STRONG;
}
PGate::PGate(const string&name,
PGate::PGate(perm_string name,
svector<PExpr*>*pins,
PExpr*del)
: name_(name), pins_(pins)
@@ -47,7 +47,7 @@ PGate::PGate(const string&name,
str1_ = STRONG;
}
PGate::PGate(const string&name, svector<PExpr*>*pins)
PGate::PGate(perm_string name, svector<PExpr*>*pins)
: name_(name), pins_(pins)
{
str0_ = STRONG;
@@ -90,22 +90,79 @@ void PGate::elaborate_scope(Design*, NetScope*) const
* parameters. This method understands how to handle the different
* numbers of expressions.
*/
void PGate::eval_delays(Design*des, NetScope*scope,
NetExpr*&rise_expr,
NetExpr*&fall_expr,
NetExpr*&decay_expr,
bool as_net_flag) const
{
delay_.eval_delays(des, scope,
rise_expr, fall_expr, decay_expr,
as_net_flag);
}
void PGate::eval_delays(Design*des, NetScope*scope,
unsigned long&rise_time,
unsigned long&fall_time,
unsigned long&decay_time) const
{
delay_.eval_delays(des, scope, rise_time, fall_time, decay_time);
NetExpr*rise_expr, *fall_expr, *decay_expr;
delay_.eval_delays(des, scope, rise_expr, fall_expr, decay_expr);
if (rise_expr == 0) {
rise_time = 0;
fall_time = 0;
decay_time = 0;
}
if (NetEConst*tmp = dynamic_cast<NetEConst*> (rise_expr)) {
rise_time = tmp->value().as_ulong();
} else {
cerr << get_line() << ": error: Delay expressions must be "
<< "constant here." << endl;
cerr << get_line() << ": : Cannot calculate "
<< *rise_expr << endl;
des->errors += 1;
rise_time = 0;
}
if (NetEConst*tmp = dynamic_cast<NetEConst*> (fall_expr)) {
fall_time = tmp->value().as_ulong();
} else {
if (fall_expr != rise_expr) {
cerr << get_line() << ": error: Delay expressions must be "
<< "constant here." << endl;
cerr << get_line() << ": : Cannot calculate "
<< *rise_expr << endl;
}
des->errors += 1;
fall_time = 0;
}
if (NetEConst*tmp = dynamic_cast<NetEConst*> (decay_expr)) {
decay_time = tmp->value().as_ulong();
} else {
cerr << get_line() << ": error: Delay expressions must be "
<< "constant here." << endl;
cerr << get_line() << ": : Cannot calculate "
<< *rise_expr << endl;
des->errors += 1;
decay_time = 0;
}
}
PGAssign::PGAssign(svector<PExpr*>*pins)
: PGate("", pins)
: PGate(perm_string(), pins)
{
assert(pins->count() == 2);
}
PGAssign::PGAssign(svector<PExpr*>*pins, svector<PExpr*>*dels)
: PGate("", pins, dels)
: PGate(perm_string(), pins, dels)
{
assert(pins->count() == 2);
}
@@ -114,14 +171,14 @@ PGAssign::~PGAssign()
{
}
PGBuiltin::PGBuiltin(Type t, const string&name,
PGBuiltin::PGBuiltin(Type t, perm_string name,
svector<PExpr*>*pins,
svector<PExpr*>*del)
: PGate(name, pins, del), type_(t), msb_(0), lsb_(0)
{
}
PGBuiltin::PGBuiltin(Type t, const string&name,
PGBuiltin::PGBuiltin(Type t, perm_string name,
svector<PExpr*>*pins,
PExpr*del)
: PGate(name, pins, del), type_(t), msb_(0), lsb_(0)
@@ -142,14 +199,14 @@ void PGBuiltin::set_range(PExpr*msb, PExpr*lsb)
lsb_ = lsb;
}
PGModule::PGModule(const char*type, const string&name, svector<PExpr*>*pins)
PGModule::PGModule(perm_string type, perm_string name, svector<PExpr*>*pins)
: PGate(name, pins), overrides_(0), pins_(0),
npins_(0), parms_(0), nparms_(0), msb_(0), lsb_(0)
{
type_ = type;
}
PGModule::PGModule(const char*type, const string&name,
PGModule::PGModule(perm_string type, perm_string name,
named<PExpr*>*pins, unsigned npins)
: PGate(name, 0), overrides_(0), pins_(pins),
npins_(npins), parms_(0), nparms_(0), msb_(0), lsb_(0)
@@ -184,13 +241,22 @@ void PGModule::set_range(PExpr*msb, PExpr*lsb)
lsb_ = lsb;
}
const char* PGModule::get_type()
perm_string PGModule::get_type()
{
return type_;
}
/*
* $Log: PGate.cc,v $
* Revision 1.18 2006/01/03 05:22:14 steve
* Handle complex net node delays.
*
* Revision 1.17 2006/01/02 05:33:19 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.16 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.15 2003/03/06 04:37:12 steve
* lex_strings.add module names earlier.
*
+55 -22
View File
@@ -1,7 +1,7 @@
#ifndef __PGate_H
#define __PGate_H
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
* Copyright (c) 1998-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,10 +19,11 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PGate.h,v 1.25 2003/03/06 04:37:12 steve Exp $"
#ident "$Id: PGate.h,v 1.32 2006/04/10 00:37:42 steve Exp $"
#endif
# include "svector.h"
# include "StringHeap.h"
# include "named.h"
# include "LineInfo.h"
# include "PDelays.h"
@@ -49,27 +50,39 @@ class Module;
* strength of the 1 drive.
*/
class PGate : public LineInfo {
public:
enum strength_t { HIGHZ, WEAK, PULL, STRONG, SUPPLY };
explicit PGate(const string&name, svector<PExpr*>*pins,
explicit PGate(perm_string name, svector<PExpr*>*pins,
const svector<PExpr*>*del);
explicit PGate(const string&name, svector<PExpr*>*pins,
explicit PGate(perm_string name, svector<PExpr*>*pins,
PExpr*del);
explicit PGate(const string&name, svector<PExpr*>*pins);
explicit PGate(perm_string name, svector<PExpr*>*pins);
virtual ~PGate();
const string& get_name() const { return name_; }
perm_string get_name() const { return name_; }
// This method evaluates the delays all the way to an
// integer. If the delay is non-constant, then set the times
// to 0, print an error message and mark an error to the
// design.
void eval_delays(Design*des, NetScope*scope,
unsigned long&rise_time,
unsigned long&fall_time,
unsigned long&decay_time) const;
// This evaluates the delays as far as possible, but returns
// an expression, and do not signal errors.
void eval_delays(Design*des, NetScope*scope,
NetExpr*&rise_time,
NetExpr*&fall_time,
NetExpr*&decay_time,
bool as_net_flag =false) const;
unsigned pin_count() const { return pins_? pins_->count() : 0; }
const PExpr*pin(unsigned idx) const { return (*pins_)[idx]; }
@@ -79,21 +92,21 @@ class PGate : public LineInfo {
void strength0(strength_t);
void strength1(strength_t);
map<string,PExpr*> attributes;
map<perm_string,PExpr*> attributes;
virtual void dump(ostream&out) const;
virtual void dump(ostream&out, unsigned ind =4) const;
virtual void elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*sc) const;
virtual bool elaborate_sig(Design*des, NetScope*scope) const;
protected:
const svector<PExpr*>* get_pins() const { return pins_; }
const svector<PExpr*>& get_pins() const { return *pins_; }
void dump_pins(ostream&out) const;
void dump_delays(ostream&out) const;
private:
const string name_;
perm_string name_;
PDelays delay_;
svector<PExpr*>*pins_;
@@ -115,7 +128,7 @@ class PGAssign : public PGate {
explicit PGAssign(svector<PExpr*>*pins, svector<PExpr*>*dels);
~PGAssign();
void dump(ostream&out) const;
void dump(ostream&out, unsigned ind =4) const;
virtual void elaborate(Design*des, NetScope*scope) const;
private:
@@ -141,10 +154,10 @@ class PGBuiltin : public PGate {
TRANIF1, RTRANIF0, RTRANIF1 };
public:
explicit PGBuiltin(Type t, const string&name,
explicit PGBuiltin(Type t, perm_string name,
svector<PExpr*>*pins,
svector<PExpr*>*del);
explicit PGBuiltin(Type t, const string&name,
explicit PGBuiltin(Type t, perm_string name,
svector<PExpr*>*pins,
PExpr*del);
~PGBuiltin();
@@ -152,7 +165,7 @@ class PGBuiltin : public PGate {
Type type() const { return type_; }
void set_range(PExpr*msb, PExpr*lsb);
virtual void dump(ostream&out) const;
virtual void dump(ostream&out, unsigned ind =4) const;
virtual void elaborate(Design*, NetScope*scope) const;
private:
@@ -171,17 +184,16 @@ class PGBuiltin : public PGate {
class PGModule : public PGate {
public:
// NOTE: The type parameter to all the constructors is assumed
// to have been permallocated.
// The name is the *instance* name of the gate.
// If the binding of ports is by position, this constructor
// builds everything all at once.
explicit PGModule(const char*type, const string&name,
explicit PGModule(perm_string type, perm_string name,
svector<PExpr*>*pins);
// If the binding of ports is by name, this constructor takes
// the bindings and stores them for later elaboration.
explicit PGModule(const char*type, const string&name,
explicit PGModule(perm_string type, perm_string name,
named<PExpr*>*pins, unsigned npins);
@@ -196,17 +208,17 @@ class PGModule : public PGate {
// method to pass the range to the pform.
void set_range(PExpr*msb, PExpr*lsb);
virtual void dump(ostream&out) const;
virtual void dump(ostream&out, unsigned ind =4) const;
virtual void elaborate(Design*, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*sc) const;
virtual bool elaborate_sig(Design*des, NetScope*scope) const;
// This returns the module name of this module. It is a
// permallocated string.
const char* get_type();
perm_string get_type();
private:
const char* type_;
perm_string type_;
svector<PExpr*>*overrides_;
named<PExpr*>*pins_;
unsigned npins_;
@@ -227,6 +239,27 @@ class PGModule : public PGate {
/*
* $Log: PGate.h,v $
* Revision 1.32 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.31 2006/01/03 05:22:14 steve
* Handle complex net node delays.
*
* Revision 1.30 2006/01/02 05:33:19 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.29 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.28 2004/03/08 00:47:44 steve
* primitive ports can bind bi name.
*
* Revision 1.27 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.26 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.25 2003/03/06 04:37:12 steve
* lex_strings.add module names earlier.
*
+57
View File
@@ -0,0 +1,57 @@
/*
* Copyright (c) 2006 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PGenerate.cc,v 1.1 2006/04/10 02:40:18 steve Exp $"
#endif
# include "PGenerate.h"
# include "PWire.h"
PGenerate::PGenerate(unsigned id)
: id_number(id)
{
}
PGenerate::~PGenerate()
{
}
PWire* PGenerate::add_wire(PWire*wire)
{
PWire*&ep = wires[wire->path()];
if (ep) return ep;
assert(ep == 0);
ep = wire;
return wire;
}
PWire* PGenerate::get_wire(const hname_t&name) const
{
map<hname_t,PWire*>::const_iterator obj = wires.find(name);
if (obj == wires.end())
return 0;
else
return (*obj).second;
}
void PGenerate::add_gate(PGate*gate)
{
gates.push_back(gate);
}
+92
View File
@@ -0,0 +1,92 @@
#ifndef __PGenerate_H
#define __PGenerate_H
/*
* Copyright (c) 2006 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PGenerate.h,v 1.1 2006/04/10 02:40:18 steve Exp $"
#endif
# include "LineInfo.h"
# include "StringHeap.h"
# include "HName.h"
# include <list>
# include <map>
class Design;
class NetScope;
class PExpr;
class PGate;
class PWire;
/*
* This represents a generate scheme.
*/
class PGenerate : public LineInfo {
public:
PGenerate(unsigned id_number);
~PGenerate();
// Generate schemes have an ID number, for when the scope is
// implicit.
const unsigned id_number;
perm_string scope_name;
enum scheme_t {GS_NONE, GS_LOOP, GS_CONDIT};
scheme_t scheme_type;
// generate loops have an index variable and three
// expressions: for (index = <init>; <test>; index=<step>)
perm_string loop_index;
PExpr*loop_init;
PExpr*loop_test;
PExpr*loop_step;
map<hname_t,PWire*>wires;
PWire* add_wire(PWire*);
PWire* get_wire(const hname_t&name) const;
list<PGate*> gates;
void add_gate(PGate*);
// This method is called by the elaboration of a module to
// generate scopes. the container is the scope that is to
// contain the generated scope.
bool generate_scope(Design*des, NetScope*container);
bool elaborate_sig(Design*des) const;
bool elaborate(Design*des) const;
void dump(ostream&out) const;
private:
bool generate_scope_loop_(Design*des, NetScope*container);
// These are the scopes created by generate_scope.
list<NetScope*>scope_list_;
// internal function called on each scope generated by this scheme.
bool elaborate_sig_(Design*des, NetScope*scope) const;
bool elaborate_(Design*des, NetScope*scope) const;
private: // not implemented
PGenerate(const PGenerate&);
PGenerate& operator= (const PGenerate&);
};
#endif
+28 -4
View File
@@ -19,16 +19,32 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PTask.h,v 1.12 2002/08/12 01:34:58 steve Exp $"
#ident "$Id: PTask.h,v 1.13 2004/05/31 23:34:36 steve Exp $"
#endif
# include "LineInfo.h"
# include "svector.h"
# include "StringHeap.h"
# include <string>
class Design;
class NetScope;
class PWire;
class Statement;
class PExpr;
enum PTaskFuncEnum {
PTF_NONE,
PTF_REG,
PTF_INTEGER,
PTF_REAL,
PTF_REALTIME,
PTF_TIME
};
struct PTaskFuncArg {
PTaskFuncEnum type;
svector<PExpr*>*range;
};
/*
* The PTask holds the parsed definitions of a task.
@@ -69,16 +85,18 @@ class PTask : public LineInfo {
* The function is similar to a task (in this context) but there is a
* single output port and a set of input ports. The output port is the
* function return value.
*
* The output value is not elaborated until elaborate_sig.
*/
class PFunction : public LineInfo {
public:
explicit PFunction();
explicit PFunction(perm_string name);
~PFunction();
void set_ports(svector<PWire *>*p);
void set_statement(Statement *s);
void set_output(PWire*);
void set_return(PTaskFuncArg t);
void elaborate_scope(Design*des, NetScope*scope) const;
@@ -91,13 +109,19 @@ class PFunction : public LineInfo {
void dump(ostream&, unsigned) const;
private:
PWire*out_;
perm_string name_;
PTaskFuncArg return_type_;
svector<PWire *> *ports_;
Statement *statement_;
};
/*
* $Log: PTask.h,v $
* Revision 1.13 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.12 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
+20 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
* Copyright (c) 2003-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,18 +17,35 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PUdp.cc,v 1.1 2003/07/15 05:07:13 steve Exp $"
#ident "$Id: PUdp.cc,v 1.3 2004/03/08 00:47:44 steve Exp $"
#endif
# include "PUdp.h"
PUdp::PUdp(const string&n, unsigned nports)
PUdp::PUdp(perm_string n, unsigned nports)
: ports(nports), sequential(false), initial(verinum::Vx), name_(n)
{
}
unsigned PUdp::find_port(const char*name)
{
for (unsigned idx = 0 ; idx < ports.count() ; idx += 1) {
if (ports[idx] == name)
return idx;
}
return ports.count();
}
/*
* $Log: PUdp.cc,v $
* Revision 1.3 2004/03/08 00:47:44 steve
* primitive ports can bind bi name.
*
* Revision 1.2 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.1 2003/07/15 05:07:13 steve
* Move PUdp constructor into compiled file.
*
+13 -4
View File
@@ -1,7 +1,7 @@
#ifndef __PUdp_H
#define __PUdp_H
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
* Copyright (c) 1998-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,10 +19,11 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PUdp.h,v 1.10 2003/07/15 05:07:13 steve Exp $"
#ident "$Id: PUdp.h,v 1.12 2004/03/08 00:47:44 steve Exp $"
#endif
# include <map>
# include "StringHeap.h"
# include "svector.h"
# include "verinum.h"
@@ -52,9 +53,11 @@ class PExpr;
class PUdp {
public:
explicit PUdp(const string&n, unsigned nports);
explicit PUdp(perm_string n, unsigned nports);
svector<string>ports;
unsigned find_port(const char*name);
bool sequential;
svector<string>tinput;
@@ -67,7 +70,7 @@ class PUdp {
void dump(ostream&out) const;
const string name_;
perm_string name_;
private:
private: // Not implemented
@@ -77,6 +80,12 @@ class PUdp {
/*
* $Log: PUdp.h,v $
* Revision 1.12 2004/03/08 00:47:44 steve
* primitive ports can bind bi name.
*
* Revision 1.11 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.10 2003/07/15 05:07:13 steve
* Move PUdp constructor into compiled file.
*
+30 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2005 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,15 +17,19 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PWire.cc,v 1.10 2002/08/12 01:34:58 steve Exp $"
#ident "$Id: PWire.cc,v 1.11 2005/07/07 16:22:49 steve Exp $"
#endif
# include "config.h"
# include "PWire.h"
# include <assert.h>
PWire::PWire(const hname_t&n, NetNet::Type t, NetNet::PortType pt)
: hname_(n), type_(t), port_type_(pt), signed_(false), isint_(false),
PWire::PWire(const hname_t&n,
NetNet::Type t,
NetNet::PortType pt,
ivl_variable_type_t dt)
: hname_(n), type_(t), port_type_(pt), data_type_(dt),
signed_(false), isint_(false),
lidx_(0), ridx_(0)
{
if (t == NetNet::INTEGER) {
@@ -35,8 +39,12 @@ lidx_(0), ridx_(0)
}
}
PWire::PWire(char*n, NetNet::Type t, NetNet::PortType pt)
: hname_(n), type_(t), port_type_(pt), signed_(false), isint_(false),
PWire::PWire(char*n,
NetNet::Type t,
NetNet::PortType pt,
ivl_variable_type_t dt)
: hname_(n), type_(t), port_type_(pt), data_type_(dt),
signed_(false), isint_(false),
lidx_(0), ridx_(0)
{
if (t == NetNet::INTEGER) {
@@ -108,6 +116,19 @@ bool PWire::set_port_type(NetNet::PortType pt)
}
}
bool PWire::set_data_type(ivl_variable_type_t dt)
{
if (data_type_ != IVL_VT_NO_TYPE)
if (data_type_ != dt)
return false;
else
return true;
assert(data_type_ == IVL_VT_NO_TYPE);
data_type_ = dt;
return true;
}
void PWire::set_signed(bool flag)
{
signed_ = flag;
@@ -140,6 +161,9 @@ void PWire::set_memory_idx(PExpr*ldx, PExpr*rdx)
/*
* $Log: PWire.cc,v $
* Revision 1.11 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.10 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
+24 -5
View File
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PWire.h,v 1.16 2003/01/30 16:23:07 steve Exp $"
#ident "$Id: PWire.h,v 1.19 2006/04/10 00:37:42 steve Exp $"
#endif
# include "netlist.h"
@@ -49,8 +49,14 @@ class Design;
class PWire : public LineInfo {
public:
PWire(const hname_t&hname, NetNet::Type t, NetNet::PortType pt);
PWire(char*name, NetNet::Type t, NetNet::PortType pt);
PWire(const hname_t&hname,
NetNet::Type t,
NetNet::PortType pt,
ivl_variable_type_t dt);
PWire(char*name,
NetNet::Type t,
NetNet::PortType pt,
ivl_variable_type_t dt);
// Return a hierarchical name.
const hname_t&path() const;
@@ -65,14 +71,17 @@ class PWire : public LineInfo {
bool get_signed() const;
bool get_isint() const;
bool set_data_type(ivl_variable_type_t dt);
ivl_variable_type_t get_data_type() const;
void set_range(PExpr*msb, PExpr*lsb);
void set_memory_idx(PExpr*ldx, PExpr*rdx);
map<string,PExpr*> attributes;
map<perm_string,PExpr*> attributes;
// Write myself to the specified stream.
void dump(ostream&out) const;
void dump(ostream&out, unsigned ind=4) const;
void elaborate_sig(Design*, NetScope*scope) const;
@@ -80,6 +89,7 @@ class PWire : public LineInfo {
hname_t hname_;
NetNet::Type type_;
NetNet::PortType port_type_;
ivl_variable_type_t data_type_;
bool signed_;
bool isint_; // original type of integer
@@ -100,6 +110,15 @@ class PWire : public LineInfo {
/*
* $Log: PWire.h,v $
* Revision 1.19 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.18 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.17 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.16 2003/01/30 16:23:07 steve
* Spelling fixes.
*
+2 -2
View File
@@ -16,8 +16,8 @@ execute even the most trivial design. For the purposes of simulation,
we use as our example *the* most trivial simulation:
module main;
initial
initial
begin
$display("Hello, World");
$finish ;
+38 -62
View File
@@ -1,5 +1,5 @@
THE ICARUS VERILOG COMPILATION SYSTEM
Copyright 2000-2003 Stephen Williams
THE ICARUS VERILOG COMPILATION SYSTEM
Copyright 2000-2004 Stephen Williams
1.0 What is ICARUS Verilog?
@@ -9,7 +9,7 @@ described in the IEEE-1364 standard. Of course, it's not quite there
yet. It does currently handle a mix of structural and behavioral
constructs. For a view of the current state of Icarus Verilog, see its
home page at <http://www.icarus.com/eda/verilog>.
Icarus Verilog is not aimed at being a simulator in the traditional
sense, but a compiler that generates code employed by back-end
tools. These back-end tools currently include a simulator engine
@@ -114,7 +114,7 @@ configure script that modify its behavior:
If you are building for Linux/AMD64 (a.k.a x86_64) then to get the
most out of your install, first make sure you have both 64bit and
32bit development libraries installed. Then configure with this
somewhat more compilcated command:
somewhat more complicated command:
./configure libdir64='$(prefix)/lib64' vpidir1=vpi64 vpidir2=. --enable-vvp32
@@ -296,8 +296,8 @@ Example: Compiling "hello.vl"
------------------------ hello.vl ----------------------------
module main();
initial
initial
begin
$display("Hi there");
$finish ;
@@ -307,7 +307,7 @@ endmodule
--------------------------------------------------------------
Ensure that "iverilog" is on your search path, and the vpi library
Ensure that "iverilog" is on your search path, and the vpi library
is available.
To compile the program:
@@ -334,8 +334,8 @@ Verilog web page for the current state of support for Verilog, and in
particular, browse the bug report database for reported unsupported
constructs.
- System functions are supported, but the compiler presumes that
they return 32 bits. This is the typical case.
- System functions are supported, but the return value is a little
tricky. See SYSTEM FUNCTION TABLE FILES in the iverilog man page.
- Specify blocks are parsed but ignored in general.
@@ -344,9 +344,6 @@ constructs.
- tran primitives, i.e. tran, tranif1, tranif0, rtran, rtranif1
and rtranif0 are not supported.
- Module instance arrays are not supported, although gate instance
arrays do work.
- Net delays, of the form "wire #N foo;" do not work. Delays in
every other context do work properly, including the V2001 form
"wire #5 foo = bar;"
@@ -362,7 +359,13 @@ constructs.
Icarus Verilog includes some features that are not part of the
IEEE1364 standard, but have well defined meaning, and also sometimes
gives nonstandard (but extended) meanings to some features of the
language that are defined.
language that are defined. See the "extensions.txt" documentation for
more details.
$is_signed(<expr>)
This system function returns 1 if the expression contained is
signed, or 0 otherwise. This is mostly of use for compiler
regression tests.
$sizeof(<expr>)
$bits(<expr>)
@@ -387,6 +390,14 @@ language that are defined.
general possible to predict what the simulation precision will
turn out to be.
$mti_random()
$mti_dist_uniform
These functions are similar to the IEEE1364 standard $random
functions, but they use the Mersenne Twister (MT19937)
algorithm. This is considered an excellent random number
generator, but does not generate the same sequence as the
standardized $random.
Builtin system functions
Certain of the system functions have well defined meanings, so
@@ -460,6 +471,20 @@ language that are defined.
combinational always blocks to be triggered when the values in
the sensitivity list are initialized by initial threads.
Nets with Types
Icarus Verilog support an extension syntax that allows nets
and regs to be explicitly typed. The currently supported types
are logic, bool and real. This implies that "logic" and "bool"
are new keywords. Typical syntax is:
wire real foo = 1.0;
reg logic bar, bat;
... and so forth. The syntax can be turned off by using the
-g2 flag to iverilog, and turned on explicitly with the -g2x
flag to iverilog.
6.0 CREDITS
Except where otherwise noted, Icarus Verilog, ivl and ivlpp are
@@ -469,52 +494,3 @@ Verilog guidance, and especially testing from many people. Testers in
particular include a larger community of people interested in a GPL
Verilog for Linux.
6.1 PORT MAINTAINERS
This is a list of people who have created ports and precompiled
packages for various operating systems. These folks have graciously
taken on the task of building Icarus Verilog on their systems and
bundled it into neat packages.(+) If you want to be added to the list (or
removed from the list) send e-mail to me.
FreeBSD/{Intel,alpha}
Ying-Chieh Liao <[email protected]>
Linux/{alpha,AMD64,Intel} (RPMS)
Stephen Williams <[email protected]>
Linux/* (.debs)
Hamish Moffatt <[email protected]>
Macintosh -- MacO/S
Yasuhisa Kato <[email protected]>
Mac O/S X
Timothy J. Wood <[email protected]>
NetBSD/*
Dan McMahill <[email protected]>
Solaris/SPARC packages (.pkg)
Dan McMahill <[email protected]>
Cygwin32/*
Venkat Iyer <[email protected]>
Mingw32
Venkat Iyer <[email protected]>
(+) These are not the only systems where Icarus Verilog has been run,
just the systems where precompiled binaries are publicly available.
6.2 TEST SUITE MANAGER
Steve Wilson <[email protected]> has taken on the large task of managing
the test suite. He has maintained the regression test scripts, the
driver list, received submissions from myself and others, and has
written a great many tests on his own. Any compiler writer, for any
language, will tell you that the test suite is at least as important
as the compiler code itself.
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Statement.cc,v 1.28 2002/08/12 01:34:58 steve Exp $"
#ident "$Id: Statement.cc,v 1.29 2004/02/18 17:11:54 steve Exp $"
#endif
# include "config.h"
@@ -86,7 +86,7 @@ PAssignNB::~PAssignNB()
{
}
PBlock::PBlock(const string&n, BL_TYPE t, const svector<Statement*>&st)
PBlock::PBlock(perm_string n, BL_TYPE t, const svector<Statement*>&st)
: name_(n), bl_type_(t), list_(st)
{
}
@@ -295,6 +295,9 @@ PWhile::~PWhile()
/*
* $Log: Statement.cc,v $
* Revision 1.29 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.28 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
+22 -5
View File
@@ -19,11 +19,12 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Statement.h,v 1.38 2003/05/19 02:50:58 steve Exp $"
#ident "$Id: Statement.h,v 1.42 2005/12/05 21:21:18 steve Exp $"
#endif
# include <string>
# include "svector.h"
# include "StringHeap.h"
# include "PDelays.h"
# include "PExpr.h"
# include "HName.h"
@@ -35,6 +36,7 @@ class Design;
class NetAssign_;
class NetCAssign;
class NetDeassign;
class NetForce;
class NetScope;
/*
@@ -56,7 +58,7 @@ class PProcess : public LineInfo {
Type type() const { return type_; }
Statement*statement() { return statement_; }
map<string,PExpr*> attributes;
map<perm_string,PExpr*> attributes;
virtual void dump(ostream&out, unsigned ind) const;
@@ -148,7 +150,7 @@ class PBlock : public Statement {
public:
enum BL_TYPE { BL_SEQ, BL_PAR };
explicit PBlock(const string&n, BL_TYPE t, const svector<Statement*>&st);
explicit PBlock(perm_string n, BL_TYPE t, const svector<Statement*>&st);
explicit PBlock(BL_TYPE t, const svector<Statement*>&st);
explicit PBlock(BL_TYPE t);
~PBlock();
@@ -161,7 +163,7 @@ class PBlock : public Statement {
virtual void elaborate_scope(Design*des, NetScope*scope) const;
private:
string name_;
perm_string name_;
const BL_TYPE bl_type_;
svector<Statement*>list_;
};
@@ -344,7 +346,7 @@ class PForce : public Statement {
explicit PForce(PExpr*l, PExpr*r);
~PForce();
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual NetForce* elaborate(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
private:
@@ -392,6 +394,7 @@ class PNoop : public Statement {
public:
PNoop() { }
~PNoop() { }
};
class PRepeat : public Statement {
@@ -455,6 +458,20 @@ class PWhile : public Statement {
/*
* $Log: Statement.h,v $
* Revision 1.42 2005/12/05 21:21:18 steve
* Fixes for stubborn compilers.
*
* Revision 1.41 2004/12/11 02:31:25 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.40 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.39 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.38 2003/05/19 02:50:58 steve
* Implement the wait statement behaviorally instead of as nets.
*
+63 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2003 Stephen Williams ([email protected])
* Copyright (c) 2002-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: StringHeap.cc,v 1.5 2003/03/01 06:25:30 steve Exp $"
#ident "$Id: StringHeap.cc,v 1.6 2004/02/18 17:11:54 steve Exp $"
#endif
# include "StringHeap.h"
@@ -64,6 +64,11 @@ const char* StringHeap::add(const char*text)
return res;
}
perm_string StringHeap::make(const char*text)
{
return perm_string(add(text));
}
StringHeapLex::StringHeapLex()
{
@@ -121,8 +126,64 @@ const char* StringHeapLex::add(const char*text)
return res;
}
perm_string StringHeapLex::make(const char*text)
{
return perm_string(add(text));
}
perm_string StringHeapLex::make(const string&text)
{
return perm_string(add(text.c_str()));
}
bool operator == (perm_string a, const char*b)
{
if (a.str() == b)
return true;
if (! (a.str() && b))
return false;
if (strcmp(a.str(), b) == 0)
return true;
return false;
}
bool operator == (perm_string a, perm_string b)
{
return a == b.str();
}
bool operator != (perm_string a, const char*b)
{
return ! (a == b);
}
bool operator != (perm_string a, perm_string b)
{
return ! (a == b);
}
bool operator < (perm_string a, perm_string b)
{
if (b.str() && !a.str())
return true;
if (b.str() == a.str())
return false;
if (strcmp(a.str(), b.str()) < 0)
return true;
return false;
}
/*
* $Log: StringHeap.cc,v $
* Revision 1.6 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.5 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
+52 -2
View File
@@ -1,7 +1,7 @@
#ifndef __StringHeap_H
#define __StringHeap_H
/*
* Copyright (c) 2002-2003 Stephen Williams ([email protected])
* Copyright (c) 2002-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,9 +19,50 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: StringHeap.h,v 1.4 2003/03/01 06:25:30 steve Exp $"
#ident "$Id: StringHeap.h,v 1.6 2005/06/14 19:13:43 steve Exp $"
#endif
# include "config.h"
# include <string>
using namespace std;
class perm_string {
public:
perm_string() : text_(0) { }
perm_string(const perm_string&that) : text_(that.text_) { }
~perm_string() { }
perm_string& operator = (const perm_string&that)
{ text_ = that.text_; return *this; }
const char*str() const { return text_; }
operator const char* () const { return str(); }
// This is an escape for making perm_string objects out of
// literals. For example, per_string::literal("Label"); Please
// do *not* cheat and pass arbitrary const char* items here.
static perm_string literal(const char*t) { return perm_string(t); }
private:
friend class StringHeap;
friend class StringHeapLex;
perm_string(const char*t) : text_(t) { };
private:
const char*text_;
};
extern bool operator == (perm_string a, perm_string b);
extern bool operator == (perm_string a, const char* b);
extern bool operator != (perm_string a, perm_string b);
extern bool operator != (perm_string a, const char* b);
extern bool operator > (perm_string a, perm_string b);
extern bool operator < (perm_string a, perm_string b);
extern bool operator >= (perm_string a, perm_string b);
extern bool operator <= (perm_string a, perm_string b);
/*
* The string heap is a way to permanently allocate strings
* efficiently. They only take up the space of the string characters
@@ -34,6 +75,7 @@ class StringHeap {
~StringHeap();
const char*add(const char*);
perm_string make(const char*);
private:
enum { HEAPCELL = 0x10000 };
@@ -60,6 +102,8 @@ class StringHeapLex : private StringHeap {
~StringHeapLex();
const char*add(const char*);
perm_string make(const char*);
perm_string make(const string&);
unsigned add_count() const;
unsigned add_hit_count() const;
@@ -78,6 +122,12 @@ class StringHeapLex : private StringHeap {
/*
* $Log: StringHeap.h,v $
* Revision 1.6 2005/06/14 19:13:43 steve
* gcc3/4 compile errors.
*
* Revision 1.5 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.4 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
Vendored
+139 -1
View File
@@ -14,7 +14,7 @@
AC_DEFUN([AX_CPP_IDENT],
[AC_CACHE_CHECK([for ident support in C compiler], ax_cv_cpp_ident,
[AC_TRY_COMPILE([
#ident "$Id: aclocal.m4,v 1.2 2004/01/15 06:05:20 steve Exp $"
#ident "$Id: aclocal.m4,v 1.6 2004/10/04 01:10:52 steve Exp $"
],[while (0) {}],
[AS_VAR_SET(ax_cv_cpp_ident, yes)],
[AS_VAR_SET(ax_cv_cpp_ident, no)])])
@@ -67,3 +67,141 @@ if test $ax_cv_c_underscores_trailing = yes; then
fi
])# AX_C_UNDERSCORES_TRAILING
# AX_WIN32
# --------
# Combined check for several flavors of Microsoft Windows so
# their "issues" can be dealt with
AC_DEFUN([AX_WIN32],
[AC_CYGWIN
AC_MINGW32
WIN32=no
AC_MSG_CHECKING([for Microsoft Windows])
if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
then
WIN32=yes
fi
AC_SUBST(MINGW32)
AC_SUBST(WIN32)
AC_MSG_RESULT($WIN32)
])# AX_WIN32
# AX_LD_EXTRALIBS
# ---------------
# mingw needs to link with libiberty.a, but cygwin alone can't tolerate it
AC_DEFUN([AX_LD_EXTRALIBS],
[AC_MSG_CHECKING([for extra libs needed])
EXTRALIBS=
case "${host}" in
*-*-cygwin* )
if test "$MINGW32" = "yes"; then
EXTRALIBS="-liberty"
fi
;;
esac
AC_SUBST(EXTRALIBS)
AC_MSG_RESULT($EXTRALIBS)
])# AX_LD_EXTRALIBS
# AX_LD_SHAREDLIB_OPTS
# --------------------
# linker options when building a shared library
AC_DEFUN([AX_LD_SHAREDLIB_OPTS],
[AC_MSG_CHECKING([for shared library link flag])
shared=-shared
case "${host}" in
*-*-cygwin*)
shared="-shared -Wl,--enable-auto-image-base"
;;
*-*-hpux*)
shared="-b"
;;
*-*-darwin1.[0123])
shared="-bundle -undefined suppress"
;;
*-*-darwin*)
shared="-bundle -undefined suppress -flat_namespace"
;;
esac
AC_SUBST(shared)
AC_MSG_RESULT($shared)
])# AX_LD_SHAREDLIB_OPTS
# AX_C_PICFLAG
# ------------
# The -fPIC flag is used to tell the compiler to make position
# independent code. It is needed when making shared objects.
AC_DEFUN([AX_C_PICFLAG],
[AC_MSG_CHECKING([for flag to make position independent code])
PICFLAG=-fPIC
case "${host}" in
*-*-cygwin*)
PICFLAG=
;;
*-*-hpux*)
PICFLAG=+z
;;
esac
AC_SUBST(PICFLAG)
AC_MSG_RESULT($PICFLAG)
])# AX_C_PICFLAG
# AX_LD_RDYNAMIC
# --------------
# The -rdynamic flag is used by iverilog when compiling the target,
# to know how to export symbols of the main program to loadable modules
# that are brought in by -ldl
AC_DEFUN([AX_LD_RDYNAMIC],
[AC_MSG_CHECKING([for -rdynamic compiler flag])
rdynamic=-rdynamic
case "${host}" in
*-*-netbsd*)
rdynamic="-Wl,--export-dynamic"
;;
*-*-openbsd*)
rdynamic="-Wl,--export-dynamic"
;;
*-*-solaris*)
rdynamic=""
;;
*-*-cygwin*)
rdynamic=""
;;
*-*-hpux*)
rdynamic="-E"
;;
*-*-darwin*)
rdynamic="-Wl,-all_load"
strip_dynamic="-SX"
;;
esac
AC_SUBST(rdynamic)
AC_MSG_RESULT($rdynamic)
AC_SUBST(strip_dynamic)
# since we didn't tell them we're "checking", no good place to tell the answer
# AC_MSG_RESULT($strip_dynamic)
])# AX_LD_RDYNAMIC
# AX_CPP_PRECOMP
# --------------
AC_DEFUN([AX_CPP_PRECOMP],
[# Darwin requires -no-cpp-precomp
case "${host}" in
*-*-darwin*)
CPPFLAGS="-no-cpp-precomp $CPPFLAGS"
CFLAGS="-no-cpp-precomp $CFLAGS"
;;
esac
])# AX_CPP_PRECOMP
+1 -1
View File
@@ -9,7 +9,7 @@
echo "Autoconf in root..."
autoconf
for dir in vpip vvp tgt-vvp tgt-fpga libveriuser cadpli
for dir in vpip vpi vvp tgt-vvp tgt-fpga tgt-stub libveriuser cadpli
do
echo "Autoconf in $dir..."
( cd ./$dir ; autoconf --include=.. )
+9 -8
View File
@@ -16,7 +16,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.8 2003/11/08 19:30:15 steve Exp $"
#ident "$Id: Makefile.in,v 1.12 2006/02/15 18:42:42 steve Exp $"
#
#
SHELL = /bin/sh
@@ -38,13 +38,12 @@ vpidir = @libdir@/ivl/@vpidir1@
strip_dynamic=@strip_dynamic@
CC = @CC@
CXX = @CXX@
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @CPPFLAGS@ @DEFS@ @PICFLAG@
CFLAGS = @CFLAGS@
CPPFLAGS = @ident_support@ -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@
CFLAGS = -Wall @CFLAGS@
LDFLAGS = @LDFLAGS@
STRIP = @STRIP@
@@ -56,7 +55,7 @@ ifeq (@enable_vvp32@,yes)
vpidir32 = $(libdir)/ivl/@vpidir2@
ALL32 = all32
INSTALL32 = install32
UNINSTALL32 = uninistall32
UNINSTALL32 = uninstall32
include $(srcdir)/enable_vvp32.mk
endif
@@ -69,21 +68,21 @@ dep:
mkdir dep
%.o: %.c
$(CC) -Wall -I$(srcdir) -I$(srcdir)/.. -I.. $(CPPFLAGS) $(CFLAGS) -MD -c $<
$(CC) $(CPPFLAGS) $(CFLAGS) -MD -c $<
mv $*.d dep
O = cadpli.o
SYSTEM_VPI_LDFLAGS = -L../vvp -lvpi
ifeq (@WIN32@,yes)
SYSTEM_VPI_LDFLAGS += -liberty
SYSTEM_VPI_LDFLAGS += @EXTRALIBS@
endif
cadpli.vpl: $O ../vvp/libvpi.a ../libveriuser/libveriuser.o
$(CC) @shared@ -o $@ $O ../libveriuser/libveriuser.o $(SYSTEM_VPI_LDFLAGS)
clean:
rm -rf *.o dep cadpli.vpl
rm -rf *.o dep cadpli.vpl bin32
distclean: clean
rm -f Makefile config.status config.log config.cache
@@ -99,6 +98,8 @@ installdirs: ../mkinstalldirs
uninstall: $(UNINSTALL32)
rm -f $(vpidir)/cadpli.vpl
uninstall32:
ifeq (@enable_vvp32@,yes)
include $(srcdir)/enable_vvp32.mk
endif
+8 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cadpli.c,v 1.5 2003/08/26 16:26:02 steve Exp $"
#ident "$Id: cadpli.c,v 1.7 2004/09/10 00:15:45 steve Exp $"
#endif
# include <vpi_user.h>
@@ -37,7 +37,7 @@ static void thunker_register(void)
struct t_vpi_vlog_info vlog_info;
void*mod;
void*boot;
void*tf;
struct t_tfcell*tf;
int idx;
vpi_get_vlog_info(&vlog_info);
@@ -91,6 +91,12 @@ void (*vlog_startup_routines[])() = {
/*
* $Log: cadpli.c,v $
* Revision 1.7 2004/09/10 00:15:45 steve
* Remove bad casts.
*
* Revision 1.6 2004/09/05 21:19:51 steve
* Better type safety.
*
* Revision 1.5 2003/08/26 16:26:02 steve
* ifdef idents correctly.
*
+11 -91
View File
@@ -4,11 +4,12 @@ AC_PROG_CC
AC_PROG_CXX
AC_CHECK_TOOL(STRIP, strip, true)
AC_CYGWIN
AC_EXEEXT
AC_MINGW32
AC_SUBST(EXEEXT)
# Combined check for Microsoft-related bogosities; sets WIN32 if found
AX_WIN32
AC_PROG_INSTALL
# vvp32 is by default disabled
@@ -34,99 +35,18 @@ AC_CHECK_LIB(dld,shl_load,[DLLIB=-ldld])
fi
AC_SUBST(DLLIB)
AX_CPP_PRECOMP
# Darwin requires -no-cpp-precomp
case "${host}" in
*-*-darwin*)
CPPFLAGS="-no-cpp-precomp $CPPFLAGS"
CFLAGS="-no-cpp-precomp $CFLAGS"
;;
esac
# Compiler option for position independent code, needed whan making shared objects.
AX_C_PICFLAG
# The -fPIC flag is used to tell the compiler to make position
# independent code. It is needed when making shared objects.
# Linker option used when compiling the target
AX_LD_RDYNAMIC
AC_MSG_CHECKING("for flag to make position independent code")
PICFLAG=-fPIC
case "${host}" in
# linker options when building a shared library
AX_LD_SHAREDLIB_OPTS
*-*-cygwin*)
PICFLAG=
;;
*-*-hpux*)
PICFLAG=+z
;;
esac
AC_SUBST(PICFLAG)
AC_MSG_RESULT($PICFLAG)
# The -rdynamic flag is used by iverilog when compiling the target,
# to know how to export symbols of the main program to loadable modules
# that are brought in by -ldl. VPI support requires this.
AC_MSG_CHECKING("for -rdynamic compiler flag")
rdynamic=-rdynamic
case "${host}" in
*-*-netbsd*)
rdynamic="-Wl,--export-dynamic"
;;
*-*-solaris*)
rdynamic=""
;;
*-*-cygwin*)
rdynamic=""
;;
*-*-hpux*)
rdynamic="-E"
;;
*-*-darwin*)
rdynamic="-Wl,-all_load"
;;
esac
AC_SUBST(rdynamic)
AC_MSG_RESULT($rdynamic)
AC_MSG_CHECKING("for shared library link flag")
shared=-shared
case "${host}" in
*-*-cygwin*)
shared="-shared -Wl,--enable-auto-image-base"
;;
*-*-hpux*)
shared="-b"
;;
*-*-darwin1.[0123])
shared="-bundle -undefined suppress"
;;
*-*-darwin*)
shared="-bundle -undefined suppress -flat_namespace"
;;
esac
AC_SUBST(shared)
AC_MSG_RESULT($shared)
AC_MSG_CHECKING("for extra libs needed")
EXTRALIBS=
case "${host}" in
*-*-cygwin*)
EXTRALIBS="-liberty"
;;
esac
AC_SUBST(EXTRALIBS)
AC_MSG_RESULT($EXTRALIBS)
AX_LD_EXTRALIBS
#######################
## test for underscores. The vpi module loader in vvm needs to know this
+6 -3
View File
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: ivl_dlfcn.h,v 1.2 2003/12/12 05:43:08 steve Exp $"
#ident "$Id: ivl_dlfcn.h,v 1.3 2004/10/04 01:10:56 steve Exp $"
#endif
#if defined(__MINGW32__)
@@ -48,14 +48,14 @@ inline const char *dlerror(void)
{
static char msg[256];
unsigned long err = GetLastError();
FormatMessage(
FormatMessage(
FORMAT_MESSAGE_FROM_SYSTEM | FORMAT_MESSAGE_IGNORE_INSERTS,
NULL,
err,
MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), // Default language
(LPTSTR) &msg,
sizeof(msg) - 1,
NULL
NULL
);
return msg;
}
@@ -96,6 +96,9 @@ inline const char*dlerror(void)
/*
* $Log: ivl_dlfcn.h,v $
* Revision 1.3 2004/10/04 01:10:56 steve
* Clean up spurious trailing white space.
*
* Revision 1.2 2003/12/12 05:43:08 steve
* Some systems dlsym requires leading _ or not on whim.
*
+78 -37
View File
@@ -1,7 +1,7 @@
#ifndef __compiler_H
#define __compiler_H
/*
* Copyright (c) 1999-2000 Stephen Williams ([email protected])
* Copyright (c) 1999-2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,12 +19,12 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: compiler.h,v 1.19 2003/11/13 05:55:33 steve Exp $"
#ident "$Id: compiler.h,v 1.30 2005/07/11 16:56:50 steve Exp $"
#endif
# include <list>
# include <map>
# include <string>
# include "netlist.h"
# include "StringHeap.h"
/*
@@ -65,7 +65,7 @@
/*
* These are flags to enable various sorts of warnings. By default all
* the warnings are off, the -W<list> parameter arranges for each to be
* enabled.
* enabled.
*/
/* Implicit definitions of wires. */
@@ -81,6 +81,11 @@ extern bool warn_portbinding;
/* This is true if verbose output is requested. */
extern bool verbose_flag;
extern bool debug_scopes;
extern bool debug_eval_tree;
extern bool debug_elaborate;
extern bool debug_synth2;
/* Path to a directory useful for finding subcomponents. */
extern const char*basedir;
@@ -89,25 +94,91 @@ extern list<const char*>library_suff;
extern int build_library_index(const char*path, bool key_case_sensitive);
/* This is the generation of Verilog that the compiler is asked to
support. */
support. Then there are also more detailed controls for more
specific language features. */
enum generation_t {
GN_VER1995 = 1,
GN_VER2001 = 2,
GN_SYSVER30 = 3,
GN_VER2001X = 3,
GN_DEFAULT = 3
};
extern generation_t generation_flag;
extern bool gn_cadence_types_flag;
/* These functions test that specific features are enabled. */
inline bool gn_cadence_types_enabled()
{ return gn_cadence_types_flag && generation_flag==GN_VER2001X; }
/* This is the string to use to invoke the preprocessor. */
extern char*ivlpp_string;
extern map<string,unsigned> missing_modules;
extern map<perm_string,unsigned> missing_modules;
/*
* the lex_strings are perm_strings made up of tokens from the source
* file. Identifiers are so likely to be used many times that it makes
* much sense to use a StringHeapLex to hold them.
*/
extern StringHeapLex lex_strings;
/*
* system task/function listings.
*/
/*
* This table describes all the return values of various system
* functions. This table is used to elaborate expressions that are
* system function calls.
*/
struct sfunc_return_type {
const char* name;
ivl_variable_type_t type;
unsigned wid;
int signed_flag;
};
extern const struct sfunc_return_type* lookup_sys_func(const char*name);
extern int load_sys_func_table(const char*path);
/*
* $Log: compiler.h,v $
* Revision 1.30 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.29 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.28 2005/06/28 04:25:55 steve
* Remove reference to SystemVerilog.
*
* Revision 1.27 2005/04/24 23:44:01 steve
* Update DFF support to new data flow.
*
* Revision 1.26 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.25 2004/09/25 01:58:44 steve
* Add a debug_elaborate flag
*
* Revision 1.24 2004/09/10 23:51:42 steve
* Fix the evaluation of constant ternary expressions.
*
* Revision 1.23 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.22 2004/03/10 04:51:24 steve
* Add support for system function table files.
*
* Revision 1.21 2004/03/09 04:29:42 steve
* Separate out the lookup_sys_func table, for eventual
* support for function type tables.
*
* Remove ipal compile flags.
*
* Revision 1.20 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.19 2003/11/13 05:55:33 steve
* Move the DLL= flag to target config files.
*
@@ -122,35 +193,5 @@ extern StringHeapLex lex_strings;
* scope names and system task/function names
* into this table. Also, permallocate event
* names from the beginning.
*
* Revision 1.15 2003/02/22 04:12:49 steve
* Add the portbind warning.
*
* Revision 1.14 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.13 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.12 2002/05/28 20:40:37 steve
* ivl indexes the search path for libraries, and
* supports case insensitive module-to-file lookup.
*
* Revision 1.11 2002/05/28 00:50:39 steve
* Add the ivl -C flag for bulk configuration
* from the driver, and use that to run library
* modules through the preprocessor.
*
* Revision 1.10 2002/05/24 01:13:00 steve
* Support language generation flag -g.
*
* Revision 1.9 2002/04/22 00:53:39 steve
* Do not allow implicit wires in sensitivity lists.
*
* Revision 1.8 2002/04/15 00:04:22 steve
* Timescale warnings.
*
* Revision 1.7 2001/11/16 05:07:19 steve
* Add support for +libext+ in command files.
*/
#endif
+5 -2
View File
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: config.h.in,v 1.10 2003/08/26 16:26:01 steve Exp $"
#ident "$Id: config.h.in,v 1.11 2004/10/04 01:10:52 steve Exp $"
#endif
#if defined(__cplusplus)
@@ -31,7 +31,7 @@
#endif
# undef NEED_LU
# undef NEED_TU
# undef NEED_TU
# undef WLU
# undef WTU
# undef HAVE_TIMES
@@ -50,6 +50,9 @@
/*
* $Log: config.h.in,v $
* Revision 1.11 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.10 2003/08/26 16:26:01 steve
* ifdef idents correctly.
*
+17 -120
View File
@@ -3,6 +3,7 @@ AC_INIT(netlist.h)
AC_CONFIG_HEADER(config.h)
AC_CONFIG_HEADER(_pli_types.h)
AC_CANONICAL_HOST
dnl Checks for programs.
AC_PROG_CC
AC_PROG_CXX
@@ -35,22 +36,12 @@ then
exit 1
fi
AC_CYGWIN
AC_EXEEXT
AC_MINGW32
WIN32=no
AC_MSG_CHECKING("Checking for windows")
if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
then
WIN32=yes
fi
AC_SUBST(MINGW32)
AC_SUBST(WIN32)
AC_MSG_RESULT($WIN32)
AC_SUBST(EXEEXT)
# Combined check for Microsoft-related bogosities; sets WIN32 if found
AX_WIN32
# vvp32 is by default disabled
#enable_vvp32=no
AC_SUBST(enable_vvp32)
@@ -80,16 +71,6 @@ do_times=no
)
AC_MSG_RESULT($do_times)
AC_CHECK_HEADER(ipal.h, HAVE_IPAL=yes, HAVE_IPAL=)
AC_ARG_WITH(ipal,
[ --with-ipal enable PAL target],
if test "$with_ipal" = no; then
echo Disabling ipal support
HAVE_IPAL=
fi
)
AC_SUBST(HAVE_IPAL)
# --
# Look for a dl library to use. First look for the standard dlopen
# functions, and failing that look for the HP specific shl_load function.
@@ -108,107 +89,22 @@ AC_PROG_INSTALL
AC_LANG_C
AC_C_BIGENDIAN
AC_CANONICAL_HOST
# $host
# The -fPIC flag is used to tell the compiler to make position
# independent code. It is needed when making shared objects.
AX_LD_EXTRALIBS
AC_MSG_CHECKING("for flag to make position independent code")
PICFLAG=-fPIC
case "${host}" in
# Compiler option for position independent code, needed whan making shared objects.
# CFLAGS inherited by cadpli/Makefile?
AX_C_PICFLAG
*-*-cygwin*)
PICFLAG=
;;
# may modify CPPFLAGS and CFLAGS
AX_CPP_PRECOMP
*-*-hpux*)
PICFLAG=+z
;;
# Linker option used when compiling the target
AX_LD_RDYNAMIC
esac
AC_SUBST(PICFLAG)
AC_MSG_RESULT($PICFLAG)
# mingw needs to link with libiberty.a, cygwin can tolerate it
AC_MSG_CHECKING("for extra libs needed")
EXTRALIBS=
case "${host}" in
*-*-cygwin*)
EXTRALIBS="-liberty"
;;
esac
AC_SUBST(EXTRALIBS)
AC_MSG_RESULT($EXTRALIBS)
# Darwin requires -no-cpp-precomp
case "${host}" in
*-*-darwin*)
CPPFLAGS="-no-cpp-precomp $CPPFLAGS"
CFLAGS="-no-cpp-precomp $CFLAGS"
;;
esac
# The -rdynamic flag is used by iverilog when compiling the target,
# to know how to export symbols of the main program to loadable modules
# that are brought in by -ldl
AC_MSG_CHECKING("for -rdynamic compiler flag")
rdynamic=-rdynamic
case "${host}" in
*-*-netbsd*)
rdynamic="-Wl,--export-dynamic"
;;
*-*-solaris*)
rdynamic=""
;;
*-*-cygwin*)
rdynamic=""
;;
*-*-hpux*)
rdynamic="-E"
;;
*-*-darwin*)
rdynamic="-Wl,-all_load"
strip_dynamic="-SX"
;;
esac
AC_SUBST(rdynamic)
AC_MSG_RESULT($rdynamic)
AC_SUBST(strip_dynamic)
AC_MSG_RESULT($strip_dynamic)
AC_MSG_CHECKING("for shared library link flag")
shared=-shared
case "${host}" in
*-*-cygwin*)
shared="-shared -Wl,--enable-auto-image-base"
;;
*-*-hpux*)
shared="-b"
;;
*-*-darwin1.[0123])
shared="-bundle -undefined suppress"
;;
*-*-darwin*)
shared="-bundle -undefined suppress -flat_namespace"
;;
esac
AC_SUBST(shared)
AC_MSG_RESULT($shared)
# linker options when building a shared library
AX_LD_SHAREDLIB_OPTS
#######################
## test for underscores. The vpi module loader needs to know this
@@ -245,6 +141,7 @@ AC_SUBST(vpidir1)
AC_SUBST(vpidir2)
AC_MSG_RESULT(${vpidir1} ${vpidir2})
AC_CONFIG_SUBDIRS(vvp tgt-vvp tgt-fpga libveriuser cadpli)
# XXX disable tgt-fpga for the moment
AC_CONFIG_SUBDIRS(vvp vpi tgt-stub tgt-null tgt-vvp libveriuser cadpli)
AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
+130 -189
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2003 Stephen Williams ([email protected])
* Copyright (c) 1998-2005 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cprop.cc,v 1.46 2003/11/08 17:53:34 steve Exp $"
#ident "$Id: cprop.cc,v 1.55 2006/05/24 04:32:57 steve Exp $"
#endif
# include "config.h"
@@ -55,86 +55,6 @@ void cprop_functor::signal(Design*des, NetNet*obj)
void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
{
// For now, only additions are handled.
if (obj->attribute("LPM_Direction") != verinum("ADD"))
return;
// If the low bit on the A side is 0, then eliminate it from
// the adder, and pass the B side directly to the
// result. Don't reduce the adder smaller then a 1-bit
// adder. These will be eliminated later.
while ((obj->width() > 1)
&& obj->pin_DataA(0).nexus()->drivers_constant()
&& (obj->pin_DataA(0).nexus()->driven_value() == verinum::V0)) {
NetAddSub*tmp = 0;
tmp = new NetAddSub(obj->scope(), obj->name(), obj->width()-1);
//connect(tmp->pin_Aclr(), obj->pin_Aclr());
//connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
//connect(tmp->pin_Clock(), obj->pin_Clock());
//connect(tmp->pin_Cin(), obj->pin_Cin());
connect(tmp->pin_Cout(), obj->pin_Cout());
//connect(tmp->pin_Overflow(), obj->pin_Overflow());
for (unsigned idx = 0 ; idx < tmp->width() ; idx += 1) {
connect(tmp->pin_DataA(idx), obj->pin_DataA(idx+1));
connect(tmp->pin_DataB(idx), obj->pin_DataB(idx+1));
connect(tmp->pin_Result(idx), obj->pin_Result(idx+1));
}
connect(obj->pin_Result(0), obj->pin_DataB(0));
delete obj;
des->add_node(tmp);
obj = tmp;
count += 1;
}
// Now do the same thing on the B side.
while ((obj->width() > 1)
&& obj->pin_DataB(0).nexus()->drivers_constant()
&& (obj->pin_DataB(0).nexus()->driven_value() == verinum::V0)) {
NetAddSub*tmp = 0;
tmp = new NetAddSub(obj->scope(), obj->name(), obj->width()-1);
//connect(tmp->pin_Aclr(), obj->pin_Aclr());
//connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
//connect(tmp->pin_Clock(), obj->pin_Clock());
//connect(tmp->pin_Cin(), obj->pin_Cin());
connect(tmp->pin_Cout(), obj->pin_Cout());
//connect(tmp->pin_Overflow(), obj->pin_Overflow());
for (unsigned idx = 0 ; idx < tmp->width() ; idx += 1) {
connect(tmp->pin_DataA(idx), obj->pin_DataA(idx+1));
connect(tmp->pin_DataB(idx), obj->pin_DataB(idx+1));
connect(tmp->pin_Result(idx), obj->pin_Result(idx+1));
}
connect(obj->pin_Result(0), obj->pin_DataA(0));
delete obj;
des->add_node(tmp);
obj = tmp;
count += 1;
}
// If the adder is only 1 bit wide, then replace it with the
// simple logic gate.
if (obj->width() == 1) {
NetLogic*tmp;
if (obj->pin_Cout().is_linked()) {
tmp = new NetLogic(obj->scope(),
obj->scope()->local_symbol(),
3, NetLogic::AND);
connect(tmp->pin(0), obj->pin_Cout());
connect(tmp->pin(1), obj->pin_DataA(0));
connect(tmp->pin(2), obj->pin_DataB(0));
des->add_node(tmp);
}
tmp = new NetLogic(obj->scope(), obj->name(), 3, NetLogic::XOR);
connect(tmp->pin(0), obj->pin_Result(0));
connect(tmp->pin(1), obj->pin_DataA(0));
connect(tmp->pin(2), obj->pin_DataB(0));
delete obj;
des->add_node(tmp);
count += 1;
return;
}
}
void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
@@ -153,6 +73,8 @@ void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
{
#if 0
/* XXXX Need to reimplement this code to account for vectors. */
NetScope*scope = obj->scope();
unsigned const_count = 0;
@@ -248,7 +170,7 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
with a simple XOR gate. */
if (top == 1) {
NetLogic*tmp = new NetLogic(scope, obj->name(), 3,
NetLogic::XNOR);
NetLogic::XNOR, 1);
connect(tmp->pin(0), obj->pin_AEB());
connect(tmp->pin(1), obj->pin_DataA(0));
connect(tmp->pin(2), obj->pin_DataB(0));
@@ -271,6 +193,7 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
delete obj;
des->add_node(tmp);
count += 1;
#endif
}
void cprop_functor::lpm_ff(Design*des, NetFF*obj)
@@ -278,54 +201,15 @@ void cprop_functor::lpm_ff(Design*des, NetFF*obj)
// Look for and count unlinked FF outputs. Note that if the
// Data and Q pins are connected together, they can be removed
// from the circuit, since it doesn't do anything.
unsigned unlinked_count = 0;
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
if (connected(obj->pin_Data(idx), obj->pin_Q(idx))
&& (! obj->pin_Sclr().is_linked())
&& (! obj->pin_Sset().is_linked())
&& (! obj->pin_Aclr().is_linked())
&& (! obj->pin_Aset().is_linked())) {
obj->pin_Data(idx).unlink();
obj->pin_Q(idx).unlink();
}
if (! obj->pin_Q(idx).is_linked())
unlinked_count += 1;
}
// If the entire FF is unlinked, remove the whole thing.
if (unlinked_count == obj->width()) {
if (connected(obj->pin_Data(), obj->pin_Q())
&& (! obj->pin_Sclr().is_linked())
&& (! obj->pin_Sset().is_linked())
&& (! obj->pin_Aclr().is_linked())
&& (! obj->pin_Aset().is_linked())) {
obj->pin_Data().unlink();
obj->pin_Q().unlink();
delete obj;
count += 1;
return;
}
// If some of the FFs are unconnected, make a new FF array
// that does not include the useless FF devices.
if (unlinked_count > 0) {
NetFF*tmp = new NetFF(obj->scope(), obj->name(),
obj->width()-unlinked_count);
connect(tmp->pin_Clock(), obj->pin_Clock());
connect(tmp->pin_Enable(), obj->pin_Enable());
connect(tmp->pin_Aload(), obj->pin_Aload());
connect(tmp->pin_Aset(), obj->pin_Aset());
connect(tmp->pin_Aclr(), obj->pin_Aclr());
connect(tmp->pin_Sload(), obj->pin_Sload());
connect(tmp->pin_Sset(), obj->pin_Sset());
connect(tmp->pin_Sclr(), obj->pin_Sclr());
unsigned tidx = 0;
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1)
if (obj->pin_Q(idx).is_linked()) {
connect(tmp->pin_Data(tidx), obj->pin_Data(idx));
connect(tmp->pin_Q(tidx), obj->pin_Q(idx));
tidx += 1;
}
assert(tidx == obj->width() - unlinked_count);
delete obj;
des->add_node(tmp);
count += 1;
return;
}
}
@@ -334,7 +218,11 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
NetScope*scope = obj->scope();
switch (obj->type()) {
#if 0
/* XXXX This old code assumed that the individual bit
slices could be replaced with different gates. They
cannot when the device takes atomic vectors, so this
needs to be rewritten. XXXX */
case NetLogic::NAND:
case NetLogic::AND: {
unsigned top = obj->pin_count();
@@ -449,12 +337,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
case NetLogic::AND:
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::BUF);
NetLogic::BUF, 1);
break;
case NetLogic::NAND:
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::NOT);
NetLogic::NOT, 1);
break;
default:
assert(0);
@@ -480,7 +368,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
if (top < obj->pin_count()) {
NetLogic*tmp = new NetLogic(scope,
obj->name(), top,
obj->type());
obj->type(), 1);
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
@@ -497,7 +385,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
}
break;
}
#endif
#if 0
/* XXXX This old code assumed that the individual bit
slices could be replaced with different gates. They
cannot when the device takes atomic vectors, so this
needs to be rewritten. XXXX */
case NetLogic::NOR:
case NetLogic::OR: {
@@ -597,12 +490,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
case NetLogic::OR:
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::BUF);
NetLogic::BUF, 1);
break;
case NetLogic::NOR:
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::NOT);
NetLogic::NOT, 1);
break;
default:
assert(0);
@@ -619,7 +512,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
delete obj;
count += 1;
return;
}
v }
/* Finally, this cleans up the gate by creating a
new [N]OR gate that has the right number of
@@ -627,7 +520,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
if (top < obj->pin_count()) {
NetLogic*tmp = new NetLogic(scope,
obj->name(), top,
obj->type());
obj->type(), 1);
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
tmp->decay_time(obj->decay_time());
@@ -644,7 +537,12 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
}
break;
}
#endif
#if 0
/* XXXX This old code assumed that the individual bit
slices could be replaced with different gates. They
cannot when the device takes atomic vectors, so this
needs to be rewritten. XXXX */
case NetLogic::XNOR:
case NetLogic::XOR: {
unsigned top = obj->pin_count();
@@ -766,11 +664,11 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
if (obj->type() == NetLogic::XOR)
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::NOT);
NetLogic::NOT, 1);
else
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::BUF);
NetLogic::BUF, 1);
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
@@ -795,11 +693,11 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
if (obj->type() == NetLogic::XOR)
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::BUF);
NetLogic::BUF, 1);
else
tmp = new NetLogic(scope,
obj->name(), 2,
NetLogic::NOT);
NetLogic::NOT, 1);
tmp->rise_time(obj->rise_time());
tmp->fall_time(obj->fall_time());
@@ -821,7 +719,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
if (top < obj->pin_count()) {
NetLogic*tmp = new NetLogic(scope,
obj->name(), top,
obj->type());
obj->type(), 1);
des->add_node(tmp);
tmp->pin(0).drive0(obj->pin(0).drive0());
tmp->pin(0).drive1(obj->pin(0).drive1());
@@ -834,12 +732,54 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
}
break;
}
#endif
default:
break;
}
}
static void replace_with_bufif(Design*des, NetMux*obj, NetLogic::TYPE type)
{
NetScope*scope = obj->scope();
NetLogic*tmp = new NetLogic(obj->scope(),
scope->local_symbol(),
3, type, obj->width());
des->add_node(tmp);
connect(obj->pin_Result(), tmp->pin(0));
connect(obj->pin_Data(type==NetLogic::BUFIF0? 0 : 1), tmp->pin(1));
if (obj->width() == 1) {
/* Special case that the expression is 1 bit
wide. Connect the select directly to the enable. */
connect(obj->pin_Sel(), tmp->pin(2));
} else {
/* General case that the expression is arbitrarily
wide. Replicate the enable signal (which we
assume is 1 bit wide) to match the expression,
and connect the enable vector to the enable
input of the gate. */
NetReplicate*rtmp = new NetReplicate(scope,
scope->local_symbol(),
obj->width(),
obj->width());
des->add_node(rtmp);
connect(obj->pin_Sel(), rtmp->pin(1));
connect(tmp->pin(2), rtmp->pin(0));
NetNet*rsig = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, obj->width());
rsig->local_flag(true);
rsig->data_type(IVL_VT_LOGIC);
connect(tmp->pin(2), rsig->pin(0));
}
delete obj;
}
/*
* This detects the case where the mux selects between a value and
* Vz. In this case, replace the device with a bufif with the sel
@@ -856,66 +796,36 @@ void cprop_functor::lpm_mux(Design*des, NetMux*obj)
NetMux with an array of BUFIF1 devices, with the enable
connected to the select input. */
bool flag = true;
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
if (! obj->pin_Data(idx, 0).nexus()->drivers_constant()) {
flag = false;
break;
}
if (obj->pin_Data(idx, 0).nexus()->driven_value() != verinum::Vz) {
flag = false;
break;
}
if (! obj->pin_Data(0).nexus()->drivers_constant()) {
flag = false;
}
if (flag && obj->pin_Data(0).nexus()->driven_value() != verinum::Vz) {
flag = false;
}
if (flag) {
NetScope*scope = obj->scope();
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
NetLogic*tmp = new NetLogic(obj->scope(),
scope->local_symbol(),
3, NetLogic::BUFIF1);
connect(obj->pin_Result(idx), tmp->pin(0));
connect(obj->pin_Data(idx,1), tmp->pin(1));
connect(obj->pin_Sel(0), tmp->pin(2));
des->add_node(tmp);
}
replace_with_bufif(des, obj, NetLogic::BUFIF1);
count += 1;
delete obj;
return;
}
/* If instead the second input is all constant Vz, replace the
NetMux with an array of BUFIF0 devices. */
flag = true;
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
if (! obj->pin_Data(idx, 1).nexus()->drivers_constant()) {
flag = false;
break;
}
if (! obj->pin_Data(1).nexus()->drivers_constant()) {
flag = false;
}
if (obj->pin_Data(idx, 1).nexus()->driven_value() != verinum::Vz) {
flag = false;
break;
}
if (flag && obj->pin_Data(1).nexus()->driven_value() != verinum::Vz) {
flag = false;
}
if (flag) {
NetScope*scope = obj->scope();
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
NetLogic*tmp = new NetLogic(obj->scope(),
scope->local_symbol(),
3, NetLogic::BUFIF0);
connect(obj->pin_Result(idx), tmp->pin(0));
connect(obj->pin_Data(idx,0), tmp->pin(1));
connect(obj->pin_Sel(0), tmp->pin(2));
des->add_node(tmp);
}
replace_with_bufif(des, obj, NetLogic::BUFIF0);
count += 1;
delete obj;
return;
}
}
@@ -1038,6 +948,37 @@ void cprop(Design*des)
/*
* $Log: cprop.cc,v $
* Revision 1.55 2006/05/24 04:32:57 steve
* Fix handling of ternary-to-bufif0 constant propagation.
*
* Revision 1.54 2005/07/15 19:22:52 steve
* bufif enable is LOGIC.
*
* Revision 1.53 2005/05/15 04:44:30 steve
* Disable obsolete logic constant fixup code.
*
* Revision 1.52 2005/04/24 23:44:01 steve
* Update DFF support to new data flow.
*
* Revision 1.51 2005/02/12 22:52:45 steve
* Fix copyright notice.
*
* Revision 1.50 2005/02/12 06:25:40 steve
* Restructure NetMux devices to pass vectors.
* Generate NetMux devices from ternary expressions,
* Reduce NetMux devices to bufif when appropriate.
*
* Revision 1.49 2005/01/16 04:20:32 steve
* Implement LPM_COMPARE nodes as two-input vector functors.
*
* Revision 1.48 2004/12/11 02:31:25 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.47 2004/02/20 18:53:34 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.46 2003/11/08 17:53:34 steve
* Do not remove constants accessible to VPI.
*
+35 -35
View File
@@ -1,35 +1,35 @@
This file describes the build procedure under cygwin32 (Windows 95/98/NT/2K)
----------------------------------------------------------------------------
Note: Icarus Verilog also compiles to native Windows binaries if you
use the instructions in the mingw.txt file. Some people prefer cygwin
binaries, and these instructions apply.
To build using cygwin:
Prerequisites:
o Latest net release (1.1.4) of cygwin (sources.redhat.com/cygwin)
Procedure:
o Get the source code - see the main Icarus Verilog page for how to
do this
o cd to the verilog directory
o autoconf.sh
o ./configure
o make
o make install
That's all that's needed.
To build your own extensions - just include vpi_user.h and link with
a command like this:
$(CC) -shared -o <dllname> <objects> -Wl,--enable-auto-image-base -L../vvm -lvvm -lvpip
- Venkat Iyer <[email protected]>
This file describes the build procedure under cygwin32 (Windows 95/98/NT/2K)
----------------------------------------------------------------------------
Note: Icarus Verilog also compiles to native Windows binaries if you
use the instructions in the mingw.txt file. Some people prefer cygwin
binaries, and these instructions apply.
To build using cygwin:
Prerequisites:
o Latest net release (1.1.4) of cygwin (sources.redhat.com/cygwin)
Procedure:
o Get the source code - see the main Icarus Verilog page for how to
do this
o cd to the verilog directory
o autoconf.sh
o ./configure
o make
o make install
That's all that's needed.
To build your own extensions - just include vpi_user.h and link with
a command like this:
$(CC) -shared -o <dllname> <objects> -Wl,--enable-auto-image-base -L../vvm -lvvm -lvpip
- Venkat Iyer <[email protected]>
+260 -77
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: design_dump.cc,v 1.145 2003/12/17 16:52:39 steve Exp $"
#ident "$Id: design_dump.cc,v 1.167 2006/07/31 03:50:17 steve Exp $"
#endif
# include "config.h"
@@ -29,7 +29,7 @@
# include <iostream>
# include <iomanip>
# include "netlist.h"
# include "compiler.h"
static ostream& operator<< (ostream&o, NetBlock::Type t)
{
@@ -68,6 +68,28 @@ ostream& operator << (ostream&o, Link::strength_t str)
return o;
}
ostream& operator << (ostream&o, ivl_variable_type_t val)
{
switch (val) {
case IVL_VT_VOID:
o << "void";
break;
case IVL_VT_NO_TYPE:
o << "<no_type>";
break;
case IVL_VT_REAL:
o << "real";
break;
case IVL_VT_BOOL:
o << "bool";
break;
case IVL_VT_LOGIC:
o << "logic";
break;
}
return o;
}
/* Dump a net. This can be a wire or register. */
void NetNet::dump_net(ostream&o, unsigned ind) const
{
@@ -75,6 +97,7 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
pin_count() << "]";
if (local_flag_)
o << " (local)";
o << " " << data_type_;
if (signed_)
o << " signed";
switch (port_type_) {
@@ -96,8 +119,10 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
o << " (eref=" << peek_eref() << ", lref=" << peek_lref() << ")";
if (scope())
o << " scope=" << scope()->name();
o << " #(" << rise_time() << "," << fall_time() << "," <<
decay_time() << ") init=";
o << " #(" << rise_time() << "," << fall_time() << ","
<< decay_time() << ") vector_width=" << vector_width()
<< " pin_count=" << pin_count()
<< " init=";
for (unsigned idx = pin_count() ; idx > 0 ; idx -= 1)
o << pin(idx-1).get_init();
@@ -117,13 +142,6 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetSubnet::dump_net(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "** " << name() << " is a NetSubnet **"
<< endl;
NetNet::dump_net(o, ind);
}
void NetMemory::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << name_ << "[" << width_ << "] " <<
@@ -189,18 +207,13 @@ void NetObj::dump_obj_attr(ostream&o, unsigned ind) const
void NetAddSub::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "Adder (NetAddSub): " << name() << endl;
o << setw(ind) << "" << "Adder (NetAddSub): " << name()
<< " width=" << width() << " pin_count=" << pin_count()
<< endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetCAssign::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "Procedural continuous assign (NetCAssign): "
<< name() << endl;
dump_node_pins(o, ind+4);
}
void NetCLShift::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "Combinatorial shift (NetCLShift): " <<
@@ -216,6 +229,16 @@ void NetCompare::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetConcat::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "NetConcat: "
<< name()
<< " scope=" << (scope()? scope()->name() : "")
<< " width=" << width_ << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetDivide::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "NET_DIVIDE (NetDivide): " << name() << endl;
@@ -223,12 +246,6 @@ void NetDivide::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetForce::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "force " << lval_->name() << endl;
dump_node_pins(o, ind+4);
}
void NetMult::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_MULT (NetMult): " << name() << endl;
@@ -239,6 +256,7 @@ void NetMult::dump_node(ostream&o, unsigned ind) const
void NetMux::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "Multiplexer (NetMux): " << name()
<< " width=" << width_ << " swidth=" << swidth_ << " size=" << size_
<< " scope=" << scope()->name() << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
@@ -249,20 +267,24 @@ void NetBUFZ::dump_node(ostream&o, unsigned ind) const
o << setw(ind) << "" << "NetBUFZ: " << name()
<< " scope=" << (scope()? scope()->name() : "")
<< " delay=(" << rise_time() << "," << fall_time() << "," <<
decay_time() << ")" << endl;
decay_time() << ") width=" << width() << endl;
dump_node_pins(o, ind+4);
}
void NetCaseCmp::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "case compare === : " << name() << endl;
if (eeq_)
o << setw(ind) << "" << "case compare === : " << name() << endl;
else
o << setw(ind) << "" << "case compare !== : " << name() << endl;
dump_node_pins(o, ind+4);
}
void NetConst::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "constant ";
for (unsigned idx = pin_count() ; idx > 0 ; idx -= 1)
o << setw(ind) << "" << "constant " << width_ << "'b";
for (unsigned idx = width_ ; idx > 0 ; idx -= 1)
o << value_[idx-1];
o << ": " << name() << endl;
dump_node_pins(o, ind+4);
@@ -278,6 +300,13 @@ void NetFF::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetLiteral::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "constant real " << real_
<< ": " << name() << endl;
dump_node_pins(o, ind+4);
}
void NetLogic::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "logic: ";
@@ -353,6 +382,26 @@ void NetModulo::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetPartSelect::dump_node(ostream&o, unsigned ind) const
{
const char*pt = "";
switch (dir_) {
case VP:
pt = "VP";
break;
case PV:
pt = "PV";
break;
case BI:
pt = "BI";
break;
}
o << setw(ind) << "" << "NetPartSelect(" << pt << "): "
<< name() << " off=" << off_ << " wid=" << wid_ <<endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetRamDq::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_RAM_DQ (" << mem_->name() << "): "
@@ -361,6 +410,65 @@ void NetRamDq::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetReplicate::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "NetReplicate: "
<< name() << " wid=" << width_ << ", repeat_=" << repeat_
<< ", input wid=" << width_/repeat_ << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetSignExtend::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "NetSignExtend: "
<< name() << " output width=" << width_ << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetUReduce::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "reduction logic: ";
switch (type_) {
case NONE:
o << "NONE";
break;
case AND:
o << "and";
break;
case OR:
o << "or";
break;
case XOR:
o << "xor";
break;
case NAND:
o << "nand";
break;
case NOR:
o << "nor";
break;
case XNOR:
o << "xnor";
break;
}
o << " #(" << rise_time()
<< "," << fall_time() << "," << decay_time() << ") " << name()
<< " scope=" << (scope()? scope()->name() : "")
<< endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetSysFunc::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << def_->name << "(...)" << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetUserFunc::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << def_->name() << "(";
@@ -436,8 +544,8 @@ void NetAssign_::dump_lval(ostream&o) const
if (bmux_) {
o << "[" << *bmux_ << "]";
} else {
o << "[" << (loff_+lwid_-1) << ":" << loff_ << "]";
} else if (base_) {
o << "[" << *base_ << " +: " << lwid_ << "]";
}
} else if (mem_) {
// Is there an obvious way to flag memories in the dump
@@ -447,8 +555,10 @@ void NetAssign_::dump_lval(ostream&o) const
if (bmux_) o << *bmux_;
else o << "**oops**";
o << "]";
} else if (var_) {
o << "<real " << var_->basename() << ">";
if (base_) {
o << "[" << *base_ << " +: " << lwid_ << "]";
}
} else {
o << "";
}
@@ -474,10 +584,10 @@ void NetAssign::dump(ostream&o, unsigned ind) const
dump_lval(o);
o << " = ";
#if 0
if (l_val(0)->rise_time())
o << "#" << l_val(0)->rise_time() << " ";
#endif
if (const NetExpr*de = get_delay())
o << "#(" << *de << ") ";
o << *rval() << ";" << endl;
}
@@ -487,10 +597,10 @@ void NetAssignNB::dump(ostream&o, unsigned ind) const
dump_lval(o);
o << " <= ";
#if 0
if (l_val(0)->rise_time())
o << "#" << l_val(0)->rise_time() << " ";
#endif
if (const NetExpr*de = get_delay())
o << "#(" << *de << ") ";
o << *rval() << ";" << endl;
}
@@ -557,8 +667,9 @@ void NetCase::dump(ostream&o, unsigned ind) const
void NetCAssign::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "cassign " << lval_->name() << " = "
<< name() << ";" << endl;
o << setw(ind) << "" << "cassign ";
dump_lval(o);
o << " = " << *rval() << "; /* " << get_line() << " */" << endl;
}
void NetCondit::dump(ostream&o, unsigned ind) const
@@ -578,8 +689,9 @@ void NetCondit::dump(ostream&o, unsigned ind) const
void NetDeassign::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "deassign " << lval_->name() << "; "
<< "/* " << get_line() << " */" << endl;
o << setw(ind) << "" << "deassign ";
dump_lval(o);
o << "; /* " << get_line() << " */" << endl;
}
void NetDisable::dump(ostream&o, unsigned ind) const
@@ -632,8 +744,9 @@ void NetEvWait::dump(ostream&o, unsigned ind) const
void NetForce::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "force " << lval_->name() << " = "
<< name() << ";" << endl;
o << setw(ind) << "" << "force ";
dump_lval(o);
o << " = " << *rval() << "; /* " << get_line() << " */" << endl;
}
void NetForever::dump(ostream&o, unsigned ind) const
@@ -645,6 +758,9 @@ void NetForever::dump(ostream&o, unsigned ind) const
void NetFuncDef::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "function " << scope_->name() << endl;
if (result_sig_)
o << setw(ind+2) << "" << "Return signal: "
<< result_sig_->name() << endl;
if (statement_)
statement_->dump(o, ind+2);
else
@@ -670,12 +786,9 @@ void NetPDelay::dump(ostream&o, unsigned ind) const
void NetRelease::dump(ostream&o, unsigned ind) const
{
if (lval_)
o << setw(ind) << "" << "release " << lval_->name() << "; "
<< "/* " << get_line() << " */" << endl;
else
o << setw(ind) << "" << "release (null); "
<< "/* " << get_line() << " */" << endl;
o << setw(ind) << "" << "release ";
dump_lval(o);
o << "; /* " << get_line() << " */" << endl;
}
void NetRepeat::dump(ostream&o, unsigned ind) const
@@ -686,7 +799,9 @@ void NetRepeat::dump(ostream&o, unsigned ind) const
void NetScope::dump(ostream&o) const
{
/* This is a constructed hierarchical name. */
o << name();
switch (type_) {
case BEGIN_END:
o << " sequential block";
@@ -698,11 +813,14 @@ void NetScope::dump(ostream&o) const
o << " function";
break;
case MODULE:
o << " module <" << (module_name_? module_name_ : "") << ">";
o << " module <" << (module_name_? module_name_.str() : "") << ">";
break;
case TASK:
o << " task";
break;
case GENBLOCK:
o << " generate block";
break;
}
o << endl;
@@ -715,7 +833,7 @@ void NetScope::dump(ostream&o) const
/* Dump the parameters for this scope. */
{
map<string,param_expr_t>::const_iterator pp;
map<perm_string,param_expr_t>::const_iterator pp;
for (pp = parameters.begin()
; pp != parameters.end() ; pp ++) {
o << " parameter ";
@@ -748,11 +866,6 @@ void NetScope::dump(ostream&o) const
}
}
for (NetVariable*cur = vars_ ; cur ; cur = cur->snext_) {
o << " real " << cur->basename() << " // "
<< cur->get_line() << endl;
}
/* Dump the events in this scope. */
for (NetEvent*cur = events_ ; cur ; cur = cur->snext_) {
o << " event " << cur->name() << "; nprobe="
@@ -779,7 +892,10 @@ void NetScope::dump(ostream&o) const
switch (type_) {
case FUNC:
func_def()->dump(o, 4);
if (func_def())
func_def()->dump(o, 4);
else
o << " MISSING FUNCTION DEFINITION" << endl;
break;
case TASK:
task_def()->dump(o, 4);
@@ -875,6 +991,9 @@ void NetEBinary::dump(ostream&o) const
case 'O':
o << "~|";
break;
case 'p':
o << "**";
break;
case 'r':
o << ">>";
break;
@@ -925,7 +1044,7 @@ void NetEConstParam::dump(ostream&o) const
{
o << "<" << name_ << "=";
NetEConst::dump(o);
o << ">";
o << ", wid=" << expr_width() << ">";
}
void NetECReal::dump(ostream&o) const
@@ -983,15 +1102,7 @@ void NetESignal::dump(ostream&o) const
{
if (has_sign())
o << "+";
o << name() << "[" << msi_<<":"<<lsi_ << "]";
}
void NetEBitSel::dump(ostream&o) const
{
sig_->dump(o);
o << "[";
idx_->dump(o);
o << "]";
o << name() << "[" << msi()<<":"<<lsi() << "]";
}
void NetEMemory::dump(ostream&o) const
@@ -1043,16 +1154,11 @@ void NetEUnary::dump(ostream&o) const
o << ")";
}
void NetEVariable::dump(ostream&o) const
{
o << var_->basename();
}
void Design::dump(ostream&o) const
{
o << "DESIGN TIME PRECISION: 10e" << get_precision() << endl;
o << "SCOPES:" << endl;
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
(*scope)->dump(o);
@@ -1077,6 +1183,83 @@ void Design::dump(ostream&o) const
/*
* $Log: design_dump.cc,v $
* Revision 1.167 2006/07/31 03:50:17 steve
* Add support for power in constant expressions.
*
* Revision 1.166 2006/06/18 04:15:50 steve
* Add support for system functions in continuous assignments.
*
* Revision 1.165 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.164 2006/02/02 02:43:57 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.163 2005/08/27 04:32:08 steve
* Handle synthesis of fully packed case statements.
*
* Revision 1.162 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.161 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.160 2005/05/24 01:44:27 steve
* Do sign extension of structuran nets.
*
* Revision 1.159 2005/05/17 20:56:55 steve
* Parameters cannot have their width changed.
*
* Revision 1.158 2005/05/07 03:13:30 steve
* Include delay expressions for assignments in dump.
*
* Revision 1.157 2005/03/09 05:52:03 steve
* Handle case inequality in netlists.
*
* Revision 1.156 2005/02/08 00:12:36 steve
* Add the NetRepeat node, and code generator support.
*
* Revision 1.155 2005/02/03 04:56:20 steve
* laborate reduction gates into LPM_RED_ nodes.
*
* Revision 1.154 2005/01/24 05:28:30 steve
* Remove the NetEBitSel and combine all bit/part select
* behavior into the NetESelect node and IVL_EX_SELECT
* ivl_target expression type.
*
* Revision 1.153 2005/01/22 18:16:00 steve
* Remove obsolete NetSubnet class.
*
* Revision 1.152 2005/01/09 20:16:00 steve
* Use PartSelect/PV and VP to handle part selects through ports.
*
* Revision 1.151 2004/12/29 23:55:43 steve
* Unify elaboration of l-values for all proceedural assignments,
* including assing, cassign and force.
*
* Generate NetConcat devices for gate outputs that feed into a
* vector results. Use this to hande gate arrays. Also let gate
* arrays handle vectors of gates when the outputs allow for it.
*
* Revision 1.150 2004/12/11 02:31:25 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.149 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.148 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.147 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.146 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.145 2003/12/17 16:52:39 steve
* Debug dumps for synth2.
*
+5 -7
View File
@@ -16,12 +16,12 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.5 2002/12/08 03:06:30 steve Exp $"
#ident "$Id: Makefile.in,v 1.7 2004/10/13 22:01:34 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.7
VERSION = 0.8
prefix = @prefix@
exec_prefix = @exec_prefix@
@@ -37,14 +37,12 @@ mandir = @mandir@
dllib=@DLLIB@
CC = @CC@
CXX = @CXX@
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @CPPFLAGS@ @DEFS@
CFLAGS = @CFLAGS@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"'
CXXFLAGS = @CXXFLAGS@ -I. -I$(srcdir)/..
CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
CFLAGS = -Wall @CFLAGS@
LDFLAGS = @LDFLAGS@
all: iverilog-vpi@EXEEXT@
@@ -63,7 +61,7 @@ iverilog-vpi@EXEEXT@: $O
main.o: main.c
$(CC) $(CFLAGS) -c $(srcdir)/main.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c $(srcdir)/main.c
# Windows specific...
res.o: res.rc
+565 -565
View File
File diff suppressed because it is too large Load Diff
+5 -7
View File
@@ -16,12 +16,12 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.22 2003/11/18 06:31:46 steve Exp $"
#ident "$Id: Makefile.in,v 1.24 2004/10/13 22:01:34 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.7
VERSION = 0.8
prefix = @prefix@
exec_prefix = @exec_prefix@
@@ -37,14 +37,12 @@ mandir = @mandir@
dllib=@DLLIB@
CC = @CC@
CXX = @CXX@
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @CPPFLAGS@ @DEFS@
CFLAGS = @CFLAGS@ -Wall @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"'
CXXFLAGS = @CXXFLAGS@ -I.. -I. -I$(srcdir)/.. -I$(srcdir)
CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
CFLAGS = -Wall @CFLAGS@
LDFLAGS = @LDFLAGS@
all: iverilog@EXEEXT@
@@ -70,7 +68,7 @@ cfparse.h cfparse.c: cfparse.y
main.o: main.c globals.h
$(CC) $(CFLAGS) -c -DCXX='"@CXX@"' -DIVL_ROOT='"@libdir@/ivl"' -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl"' -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
build_string.o: build_string.c globals.h
cflexor.o: cflexor.c cfparse.h cfparse_misc.h globals.h
+3 -3
View File
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cflexor.lex,v 1.7 2003/08/26 16:26:02 steve Exp $"
#ident "$Id: cflexor.lex,v 1.8 2004/10/04 01:10:56 steve Exp $"
#endif
# include "cfparse.h"
@@ -113,10 +113,10 @@ static int comment_enter;
is a little bit tricky, as we don't want to mistake a comment for
a string word. */
"/"[^\*\/].* { cflval.text = strdup(yytext);
return TOK_STRING; }
return TOK_STRING; }
[^/\n \t\b\r+-].* { cflval.text = strdup(yytext);
return TOK_STRING; }
return TOK_STRING; }
/* Fallback match. */
. { return yytext[0]; }
+6 -1
View File
@@ -20,7 +20,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cfparse_misc.h,v 1.5 2003/09/26 21:25:58 steve Exp $"
#ident "$Id: cfparse_misc.h,v 1.6 2004/02/15 18:03:30 steve Exp $"
#endif
/*
@@ -38,10 +38,15 @@ struct cfltype {
# define YYLTYPE struct cfltype
extern YYLTYPE yylloc;
int cflex(void);
int cferror(const char *);
int cfparse(void);
/*
* $Log: cfparse_misc.h,v $
* Revision 1.6 2004/02/15 18:03:30 steve
* Cleanup of warnings.
*
* Revision 1.5 2003/09/26 21:25:58 steve
* Warnings cleanup.
*
+34 -7
View File
@@ -1,10 +1,10 @@
.TH iverilog 1 "$Date: 2003/11/26 01:36:25 $" Version "$Date: 2003/11/26 01:36:25 $"
.TH iverilog 1 "$Date: 2005/06/28 04:25:55 $" Version "$Date: 2005/06/28 04:25:55 $"
.SH NAME
iverilog - Icarus Verilog compiler
.SH SYNOPSIS
.B iverilog
[-ESVv] [-Bpath] [-ccmdfile] [-g1|-g2|-g3.0] [-Dmacro[=defn]] [-pflag=value]
[-ESVv] [-Bpath] [-ccmdfile] [-g1|-g2|-g2x] [-Dmacro[=defn]] [-pflag=value]
[-Iincludedir] [-mmodule] [-Mfile] [-Nfile] [-ooutputfilename]
[-stopmodule] [-ttype] [-Tmin/typ/max] [-Wclass] [-ypath] sourcefile
@@ -48,16 +48,16 @@ is the Verilog input, but with file inclusions and macro references
expanded and removed. This is useful, for example, to preprocess
Verilog source for use by other compilers.
.TP 8
.B -g1\fI|\fP-g2\fI|\fP-g3.0
.B -g1\fI|\fP-g2\fI|\fP-g2x
Select the Verilog language \fIgeneration\fP to support in the
compiler. This selects between \fIIEEE1364-1995\fP(1),
\fIIEEE1364-2001\fP(2), or \fISystemVerilog 3.0\fP(3.0). Normally,
\fIIEEE1364-2001\fP(2), or \fIVerilog with extension\fP(2x). Normally,
Icarus Verilog defaults to the latest known generation of the
language. This flag is most useful to restrict the language to a set
supported by tools of specific generations, for compatibility with
other tools.
.TP 8
.B -I\fIincludedir\fP
.B -I\fIincludedir\fP
Append directory \fIincludedir\fP to list of directories searched
for Verilog include files. The \fB-I\fP switch may be used many times
to specify several directories to search, the directories are searched
@@ -212,6 +212,33 @@ inherit timescale from another file. Both probably mean that
timescales are inconsistent, and simulation timing can be confusing
and dependent on compilation order.
.SH "SYSTEM FUNCTION TABLE FILES"
If the source file name as a \fB.sft\fP suffix, then it is taken to be
a system function table file. A System function table file is used to
describe to the compiler the return types for system functions. This
is necessary because the compiler needs this information to elaborate
expressions that contain these system functions, but cannot run the
sizetf functions since it has no run-time.
The format of the table is ASCII, one function per line. Empty lines
are ignored, and lines that start with the '\fI#\fP' character are
comment lines. Each non-comment line starts with the function name,
then the vpi type (i.e. vpiSysFuncReal). The following types are
supported:
.TP 8
.B vpiSysFuncReal
The function returns a real/realtime value.
.TP 8
.B vpiSysFuncInt
The function returns an integer.
.TP 8
.B vpiSysFuncSized <wid> <signed|unsigned>
The function returns a vector with the given width, and is signed or
unsigned according to the flag.
.SH "COMMAND FILES"
The command file allows the user to place source file names and
certain command line switches into a text file instead of on a long
@@ -289,7 +316,7 @@ and directory strings.
Variable values come from the operating system environment, and not
from preprocessor defines elsewhere in the file or the command line.
.SH EXAMPLES
.SH EXAMPLES
These examples assume that you have a Verilog source file called hello.v in
the current directory
@@ -322,5 +349,5 @@ vvp(1),
.nf
Copyright \(co 2002 Stephen Williams
This document can be freely redistributed according to the terms of the
This document can be freely redistributed according to the terms of the
GNU General Public License version 2.0
+87 -56
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2001 Stephen Williams ([email protected])
* Copyright (c) 2000-2005 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: main.c,v 1.62 2003/12/12 04:36:48 steve Exp $"
#ident "$Id: main.c,v 1.69 2006/07/26 00:11:40 steve Exp $"
#endif
# include "config.h"
@@ -39,7 +39,7 @@ const char NOTICE[] =
;
const char HELP[] =
"Usage: iverilog [-ESvV] [-B base] [-c cmdfile] [-g1|-g2|-g3.0]\n"
"Usage: iverilog [-ESvV] [-B base] [-c cmdfile] [-g1|-g2|-g2x]\n"
" [-D macro[=defn]] [-I includedir] [-M depfile] [-m module]\n"
" [-N file] [-o filename] [-p flag=value]\n"
" [-s topmodule] [-t target] [-T min|typ|max]\n"
@@ -89,6 +89,7 @@ extern const char*optarg;
#endif
# include "globals.h"
#include "cfparse_misc.h" /* cfparse() */
#ifdef __MINGW32__
const char sep = '\\';
@@ -106,12 +107,10 @@ const char*npath = 0;
const char*targ = "vvp";
const char*depfile = 0;
const char*generation = "3.0";
const char*generation = "2x";
char warning_flags[16] = "";
char*inc_list = 0;
char*def_list = 0;
char*mod_list = 0;
char*command_filename = 0;
@@ -122,6 +121,9 @@ char*source_path = 0;
FILE*source_file = 0;
unsigned source_count = 0;
char*defines_path = 0;
FILE*defines_file = 0;
char*iconfig_path = 0;
FILE*iconfig_file = 0;
@@ -213,7 +215,9 @@ static const char*my_tempfile(const char*str, FILE**fout)
static int t_default(char*cmd, unsigned ncmd)
{
unsigned rc;
#ifdef __MINGW32__
unsigned ncmd_start = ncmd;
#endif
snprintf(tmp, sizeof tmp, " | %s/ivl", base);
rc = strlen(tmp);
@@ -266,8 +270,11 @@ static int t_default(char*cmd, unsigned ncmd)
rc = system(cmd);
remove(source_path);
if ( ! getenv("IVERILOG_ICONFIG"))
if ( ! getenv("IVERILOG_ICONFIG")) {
remove(iconfig_path);
remove(defines_path);
}
if (rc != 0) {
if (rc == 127) {
fprintf(stderr, "Failed to execute: %s\n", cmd);
@@ -337,38 +344,29 @@ void process_library2_switch(const char *name)
void process_include_dir(const char *name)
{
if (inc_list == 0) {
inc_list = malloc(strlen(" -I")+strlen(name)+1);
strcpy(inc_list, " -I");
strcat(inc_list, name);
} else {
inc_list = realloc(inc_list, strlen(inc_list)
+ strlen(" -I")
+ strlen(name) + 1);
strcat(inc_list, " -I");
strcat(inc_list, name);
}
fprintf(defines_file, "I:%s\n", name);
}
void process_define(const char*name)
{
if (def_list == 0) {
def_list = malloc(strlen(" -D")+strlen(name)+1);
strcpy(def_list, " -D");
strcat(def_list, name);
} else {
def_list = realloc(def_list, strlen(def_list)
+ strlen(" -D")
+ strlen(name) + 1);
strcat(def_list, " -D");
strcat(def_list, name);
}
fprintf(defines_file,"D:%s\n", name);
}
/*
* This function is called while processing a file name in a command
* file, or a file name on the command line. Look to see if there is a
* .sft suffix, and if so pass that as a sys_func file. Otherwise, it
* is a Verilog source file to be written into the file list.
*/
void process_file_name(const char*name)
{
fprintf(source_file, "%s\n", name);
source_count += 1;
if (strlen(name) > 4 && strcasecmp(".sft", name+strlen(name)-4) == 0) {
fprintf(iconfig_file,"sys_func:%s\n", name);
} else {
fprintf(source_file, "%s\n", name);
source_count += 1;
}
}
int process_generation(const char*name)
@@ -379,8 +377,8 @@ int process_generation(const char*name)
else if (strcmp(name,"2") == 0)
generation = "2";
else if (strcmp(name,"3.0") == 0)
generation = "3.0";
else if (strcmp(name,"2x") == 0)
generation = "2x";
else {
fprintf(stderr, "Unknown/Unsupported Language generation "
@@ -388,7 +386,7 @@ int process_generation(const char*name)
fprintf(stderr, "Supported generations are:\n");
fprintf(stderr, " 1 -- IEEE1364-1995 (Verilog 1)\n"
" 2 -- IEEE1364-2001 (Verilog 2001)\n"
" 3.0 -- SystemVerilog 3.0\n");
" 2x -- Verilog with extensions\n");
return 1;
}
@@ -451,6 +449,19 @@ int main(int argc, char **argv)
return 1;
}
defines_path = strdup(my_tempfile("ivrlg2", &defines_file));
if (NULL == defines_file) {
fprintf(stderr, "%s: Error opening temporary file %s\n",
argv[0], defines_path);
fprintf(stderr, "%s: Please check TMP or TMPDIR.\n", argv[0]);
fclose(source_file);
remove(source_path);
return 1;
}
fprintf(defines_file, "D:__ICARUS__=1\n");
/* Create another temporary file for passing configuration
information to ivl. */
@@ -471,6 +482,9 @@ int main(int argc, char **argv)
fprintf(stderr, "%s: Please check TMP or TMPDIR.\n", argv[0]);
fclose(source_file);
remove(source_path);
fclose(defines_file);
remove(defines_path);
return 1;
}
@@ -478,6 +492,10 @@ int main(int argc, char **argv)
switch (opt) {
case 'B':
/* Undocumented feature: The preprocessor itself
may be located at a different location. If the
base starts with a 'P', set this special base
instead of the main base. */
if (optarg[0] == 'P') {
pbase = optarg+1;
} else {
@@ -590,6 +608,12 @@ int main(int argc, char **argv)
/* Write values to the iconfig file. */
fprintf(iconfig_file, "basedir:%s\n", base);
/* Tell the core where to find the system.sft. This file
describes the system functions so that elaboration knows
how to handle them. */
fprintf(iconfig_file, "sys_func:%s%csystem.sft\n", base, sep);
if (mtm != 0) fprintf(iconfig_file, "-T:%s\n", mtm);
fprintf(iconfig_file, "generation:%s\n", generation);
fprintf(iconfig_file, "warnings:%s\n", warning_flags);
@@ -623,6 +647,9 @@ int main(int argc, char **argv)
fclose(source_file);
source_file = 0;
fclose(defines_file);
defines_file = 0;
if (source_count == 0) {
fprintf(stderr, "%s: No input files.\n", argv[0]);
fprintf(stderr, "%s\n", HELP);
@@ -632,31 +659,16 @@ int main(int argc, char **argv)
/* Start building the preprocess command line. */
sprintf(tmp, "%s%civlpp %s%s -D__ICARUS__=1 -f%s ", pbase,sep,
sprintf(tmp, "%s%civlpp %s%s -F%s -f%s ", pbase,sep,
verbose_flag?" -v":"",
e_flag?"":" -L", source_path);
e_flag?"":" -L", defines_path, source_path);
ncmd = strlen(tmp);
cmd = malloc(ncmd + 1);
strcpy(cmd, tmp);
if (inc_list) {
cmd = realloc(cmd, ncmd + strlen(inc_list) + 1);
strcat(cmd, inc_list);
ncmd += strlen(inc_list);
}
if (def_list) {
cmd = realloc(cmd, ncmd + strlen(def_list) + 1);
strcat(cmd, def_list);
ncmd += strlen(def_list);
}
if (depfile) {
cmd = realloc(cmd, ncmd + strlen(depfile) + 5);
strcat(cmd, " -M ");
strcat(cmd, depfile);
ncmd += strlen(depfile) + 4;
fprintf(defines_file, "M:%s\n", depfile);
}
/* If the -E flag was given on the command line, then all we
@@ -696,10 +708,8 @@ int main(int argc, char **argv)
/* Write the preprocessor command needed to preprocess a
single file. This may be used to preprocess library
files. */
fprintf(iconfig_file, "ivlpp:%s%civlpp -D__ICARUS__ -L %s %s\n",
pbase, sep,
inc_list? inc_list : "",
def_list? def_list : "");
fprintf(iconfig_file, "ivlpp:%s%civlpp -D__ICARUS__ -L -F%s\n",
pbase, sep, defines_path);
/* Done writing to the iconfig file. Close it now. */
fclose(iconfig_file);
@@ -711,6 +721,27 @@ int main(int argc, char **argv)
/*
* $Log: main.c,v $
* Revision 1.69 2006/07/26 00:11:40 steve
* Pass depfiles through temp defines file.
*
* Revision 1.68 2006/07/26 00:02:48 steve
* Pass defines and includes through temp file.
*
* Revision 1.67 2005/07/14 23:38:44 steve
* Display as version 0.9.devel
*
* Revision 1.66 2005/06/28 04:25:55 steve
* Remove reference to SystemVerilog.
*
* Revision 1.65 2004/06/17 14:47:22 steve
* Add a .sft file for the system functions.
*
* Revision 1.64 2004/03/10 04:51:25 steve
* Add support for system function table files.
*
* Revision 1.63 2004/02/15 18:03:30 steve
* Cleanup of warnings.
*
* Revision 1.62 2003/12/12 04:36:48 steve
* Fix make check to support -tconf configuration method.
*
+22 -9
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@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: dup_expr.cc,v 1.16 2003/10/31 02:47:11 steve Exp $"
#ident "$Id: dup_expr.cc,v 1.20 2005/07/11 16:56:50 steve Exp $"
#endif
# include "config.h"
@@ -75,6 +75,8 @@ NetESFunc* NetESFunc::dup_expr() const
{
NetESFunc*tmp = new NetESFunc(name_, type_, expr_width(), nparms());
assert(tmp);
tmp->cast_signed(has_sign());
for (unsigned idx = 0 ; idx < nparms() ; idx += 1) {
assert(tmp->parm(idx));
tmp->parm(idx, tmp->parm(idx)->dup_expr());
@@ -85,7 +87,7 @@ NetESFunc* NetESFunc::dup_expr() const
NetESignal* NetESignal::dup_expr() const
{
NetESignal*tmp = new NetESignal(net_, msi_, lsi_);
NetESignal*tmp = new NetESignal(net_);
assert(tmp);
tmp->expr_width(expr_width());
return tmp;
@@ -109,8 +111,9 @@ NetEUFunc* NetEUFunc::dup_expr() const
tmp_parms[idx] = parms_[idx]->dup_expr();
}
tmp = new NetEUFunc(func_, result_->dup_expr(), tmp_parms);
tmp = new NetEUFunc(func_, result_sig_->dup_expr(), tmp_parms);
assert(tmp);
return tmp;
}
@@ -128,14 +131,24 @@ NetEUReduce* NetEUReduce::dup_expr() const
return tmp;
}
NetEVariable* NetEVariable::dup_expr() const
{
NetEVariable*tmp = new NetEVariable(var_);
return tmp;
}
/*
* $Log: dup_expr.cc,v $
* Revision 1.20 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.19 2004/12/11 02:31:25 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.18 2004/06/17 16:06:18 steve
* Help system function signedness survive elaboration.
*
* Revision 1.17 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.16 2003/10/31 02:47:11 steve
* NetEUReduce has its own dup_expr method.
*
+15 -4
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@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_anet.cc,v 1.9 2003/09/19 03:50:12 steve Exp $"
#ident "$Id: elab_anet.cc,v 1.12 2006/05/01 20:47:58 steve Exp $"
#endif
# include "config.h"
@@ -89,10 +89,13 @@ NetNet* PEConcat::elaborate_anet(Design*des, NetScope*scope) const
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT_REG, pins);
/* Assume that all the data types are the same. */
osig->data_type(nets[0]->data_type());
pins = 0;
for (unsigned idx = nets.count() ; idx > 0 ; idx -= 1) {
NetNet*cur = nets[idx-1];
assert(cur->data_type() == osig->data_type());
for (unsigned pin = 0; pin < cur->pin_count(); pin += 1) {
connect(osig->pin(pins), cur->pin(pin));
pins += 1;
@@ -109,11 +112,10 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
NetNet* sig = 0;
NetMemory* mem = 0;
NetVariable* var = 0;
const NetExpr*par = 0;
NetEvent* eve = 0;
symbol_search(des, scope, path_, sig, mem, var, par, eve);
symbol_search(des, scope, path_, sig, mem, par, eve);
if (mem != 0) {
@@ -157,7 +159,7 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
cerr << get_line() << ": error: bit/part selects not allowed "
<< "on left side of procedural continuous assignment."
<< endl;
<< endl;
des->errors += 1;
return 0;
}
@@ -167,6 +169,15 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
/*
* $Log: elab_anet.cc,v $
* Revision 1.12 2006/05/01 20:47:58 steve
* More explicit datatype setup.
*
* Revision 1.11 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.10 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.9 2003/09/19 03:50:12 steve
* Remove find_memory method from Design class.
*
+872 -351
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File diff suppressed because it is too large Load Diff
+305 -165
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_lval.cc,v 1.27 2003/09/19 03:30:05 steve Exp $"
#ident "$Id: elab_lval.cc,v 1.36 2006/06/02 04:48:50 steve Exp $"
#endif
# include "config.h"
@@ -40,7 +40,7 @@
* If there is a part select (i.e., foo[3:1] <= <value>) the NetAssign_
* is made only as wide as it needs to be (3 bits in this example) and
* connected to the correct bits of foo. A constant bit select is a
* special case of the part select.
* special case of the part select.
*
* If the bit-select is non-constant (i.e., foo[<expr>] = <value>) the
* NetAssign_ is made wide enough to connect to all the bits of foo,
@@ -66,7 +66,9 @@
* is to try to make a net elaboration, and see if the result is
* suitable for assignment.
*/
NetAssign_* PExpr::elaborate_lval(Design*des, NetScope*scope) const
NetAssign_* PExpr::elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const
{
NetNet*ll = 0;
if (ll == 0) {
@@ -92,7 +94,9 @@ NetAssign_* PExpr::elaborate_lval(Design*des, NetScope*scope) const
* a is the MSB and b the LSB. Connect the LSB to the low pins of the
* NetAssign_ object.
*/
NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
NetAssign_* PEConcat::elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const
{
if (repeat_) {
cerr << get_line() << ": error: Repeat concatenations make "
@@ -112,7 +116,7 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
continue;
}
NetAssign_*tmp = parms_[idx]->elaborate_lval(des, scope);
NetAssign_*tmp = parms_[idx]->elaborate_lval(des, scope, is_force);
/* If the l-value doesn't elaborate, the error was
already detected and printed. We just skip it and let
@@ -140,23 +144,28 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
* Handle the ident as an l-value. This includes bit and part selects
* of that ident.
*/
NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
NetAssign_* PEIdent::elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const
{
NetNet* reg = 0;
NetMemory* mem = 0;
NetVariable* var = 0;
const NetExpr*par = 0;
NetEvent* eve = 0;
symbol_search(des, scope, path_, reg, mem, var, par, eve);
symbol_search(des, scope, path_, reg, mem, par, eve);
if (mem) {
return elaborate_mem_lval_(des, scope, mem);
}
if (is_force) {
cerr << get_line() << ": error: Memories "
<< "(" << path_ << " in this case)"
<< " are not allowed"
<< " as l-values to force statements." << endl;
des->errors += 1;
return 0;
}
if (var) {
NetAssign_*cur = new NetAssign_(var);
return cur;
return elaborate_mem_lval_(des, scope, mem);
}
if (reg == 0) {
@@ -170,60 +179,44 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
assert(reg);
if (sel_ == SEL_PART)
return elaborate_lval_net_part_(des, scope, reg);
if (sel_ == SEL_IDX_UP)
return elaborate_lval_net_idx_up_(des, scope, reg);
if (sel_ == SEL_IDX_DO)
return elaborate_lval_net_idx_do_(des, scope, reg);
/* Get the signal referenced by the identifier, and make sure
it is a register. (Wires are not allows in this context. */
if (reg->type() != NetNet::REG) {
it is a register. Wires are not allows in this context,
unless this is the l-value of a force. */
if ((reg->type() != NetNet::REG) && !is_force) {
cerr << get_line() << ": error: " << path_ <<
" is not a reg/integer/time in " << scope->name() <<
"." << endl;
cerr << reg->get_line() << ": : " << path_ <<
" is declared here as " << reg->type() << "." << endl;
des->errors += 1;
return 0;
}
assert(msb_ == 0);
assert(lsb_ == 0);
long msb, lsb;
NetExpr*mux;
if (msb_ && lsb_) {
/* This handles part selects. In this case, there are
two bit select expressions, and both must be
constant. Evaluate them and pass the results back to
the caller. */
verinum*vl = lsb_->eval_const(des, scope);
if (vl == 0) {
cerr << lsb_->get_line() << ": error: "
"Part select expressions must be constant."
<< endl;
cerr << lsb_->get_line() << ": : This lsb expression "
"violates the rule: " << *lsb_ << endl;
des->errors += 1;
return 0;
}
verinum*vm = msb_->eval_const(des, scope);
if (vm == 0) {
cerr << msb_->get_line() << ": error: "
"Part select expressions must be constant."
<< endl;
cerr << msb_->get_line() << ": : This msb expression "
"violates the rule: " << *msb_ << endl;
des->errors += 1;
return 0;
}
msb = vm->as_long();
lsb = vl->as_long();
mux = 0;
} else if (msb_) {
if (! idx_.empty()) {
/* If there is only a single select expression, it is a
bit select. Evaluate the constant value and treat it
as a part select with a bit width of 1. If the
expression it not constant, then return the
expression as a mux. */
assert(lsb_ == 0);
verinum*v = msb_->eval_const(des, scope);
assert(idx_.size() == 1);
verinum*v = idx_[0]->eval_const(des, scope);
if (v == 0) {
NetExpr*m = msb_->elaborate_expr(des, scope);
NetExpr*m = idx_[0]->elaborate_expr(des, scope, -1, false);
assert(m);
msb = 0;
lsb = 0;
@@ -241,8 +234,6 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
/* No select expressions, so presume a part select the
width of the register. */
assert(msb_ == 0);
assert(lsb_ == 0);
msb = reg->msb();
lsb = reg->lsb();
mux = 0;
@@ -257,7 +248,19 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
bmux to select the target bit. */
lv = new NetAssign_(reg);
lv->set_bmux(mux);
/* Correct the mux for the range of the vector. */
if (reg->msb() < reg->lsb())
mux = make_sub_expr(reg->lsb(), mux);
else if (reg->lsb() != 0)
mux = make_add_expr(mux, - reg->lsb());
lv->set_part(mux, 1);
} else if (msb == reg->msb() && lsb == reg->lsb()) {
/* No bit select, and part select covers the entire
vector. Simplest case. */
lv = new NetAssign_(reg);
} else {
@@ -281,7 +284,7 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
converted to normalized form so is relative the
variable pins. */
if ((wid + loff) > reg->pin_count()) {
if ((wid + loff) > reg->vector_width()) {
cerr << get_line() << ": error: bit/part select "
<< reg->name() << "[" << msb<<":"<<lsb<<"]"
<< " is out of range." << endl;
@@ -290,19 +293,161 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
}
lv = new NetAssign_(reg);
lv->set_part(loff, wid);
assert(moff < reg->pin_count());
lv->set_part(new NetEConst(verinum(loff)), wid);
}
return lv;
}
NetAssign_* PEIdent::elaborate_lval_net_part_(Design*des,
NetScope*scope,
NetNet*reg) const
{
assert(msb_ && lsb_);
/* This handles part selects. In this case, there are
two bit select expressions, and both must be
constant. Evaluate them and pass the results back to
the caller. */
NetExpr*lsb_ex = elab_and_eval(des, scope, lsb_, -1);
NetEConst*lsb_c = dynamic_cast<NetEConst*>(lsb_ex);
if (lsb_c == 0) {
cerr << lsb_->get_line() << ": error: "
"Part select expressions must be constant."
<< endl;
cerr << lsb_->get_line() << ": : This lsb expression "
"violates the rule: " << *lsb_ << endl;
des->errors += 1;
return 0;
}
NetExpr*msb_ex = elab_and_eval(des, scope, msb_, -1);
NetEConst*msb_c = dynamic_cast<NetEConst*>(msb_ex);
if (msb_c == 0) {
cerr << msb_->get_line() << ": error: "
"Part select expressions must be constant."
<< endl;
cerr << msb_->get_line() << ": : This msb expression "
"violates the rule: " << *msb_ << endl;
des->errors += 1;
return 0;
}
long msb = msb_c->value().as_long();
long lsb = lsb_c->value().as_long();
delete msb_ex;
delete lsb_ex;
NetAssign_*lv = 0;
if (msb == reg->msb() && lsb == reg->lsb()) {
/* No bit select, and part select covers the entire
vector. Simplest case. */
lv = new NetAssign_(reg);
} else {
/* If the bit/part select is constant, then make the
NetAssign_ only as wide as it needs to be and connect
only to the selected bits of the reg. */
unsigned loff = reg->sb_to_idx(lsb);
unsigned moff = reg->sb_to_idx(msb);
unsigned wid = moff - loff + 1;
if (moff < loff) {
cerr << get_line() << ": error: part select "
<< reg->name() << "[" << msb<<":"<<lsb<<"]"
<< " is reversed." << endl;
des->errors += 1;
return 0;
}
/* If the part select extends beyond the extreme of the
variable, then report an error. Note that loff is
converted to normalized form so is relative the
variable pins. */
if ((wid + loff) > reg->vector_width()) {
cerr << get_line() << ": error: bit/part select "
<< reg->name() << "[" << msb<<":"<<lsb<<"]"
<< " is out of range." << endl;
des->errors += 1;
return 0;
}
lv = new NetAssign_(reg);
lv->set_part(new NetEConst(verinum(loff)), wid);
}
return lv;
}
NetAssign_* PEIdent::elaborate_lval_net_idx_up_(Design*des,
NetScope*scope,
NetNet*reg) const
{
assert(lsb_);
assert(msb_);
if (reg->type() != NetNet::REG) {
cerr << get_line() << ": error: " << path_ <<
" is not a reg/integer/time in " << scope->name() <<
"." << endl;
cerr << reg->get_line() << ": : " << path_ <<
" is declared here as " << reg->type() << "." << endl;
des->errors += 1;
return 0;
}
/* Calculate the width expression (in the lsb_ position)
first. If the expression is not constant, error but guess 1
so we can keep going and find more errors. */
NetExpr*wid_ex = elab_and_eval(des, scope, lsb_, -1);
NetEConst*wid_c = dynamic_cast<NetEConst*>(wid_ex);
if (wid_c == 0) {
cerr << get_line() << ": error: Indexed part width must be "
<< "constant. Expression in question is..." << endl;
cerr << get_line() << ": : " << *wid_ex << endl;
des->errors += 1;
}
unsigned wid = wid_c? wid_c->value().as_ulong() : 1;
delete wid_ex;
NetExpr*base = elab_and_eval(des, scope, msb_, -1);
/* Correct the mux for the range of the vector. */
if (reg->msb() < reg->lsb())
base = make_sub_expr(reg->lsb(), base);
else if (reg->lsb() != 0)
base = make_add_expr(base, - reg->lsb());
NetAssign_*lv = new NetAssign_(reg);
lv->set_part(base, wid);
return lv;
}
NetAssign_* PEIdent::elaborate_lval_net_idx_do_(Design*des,
NetScope*scope,
NetNet*reg) const
{
assert(lsb_);
assert(msb_);
cerr << get_line() << ": internal error: don't know how to "
"deal with SEL_IDX_DO in lval?" << endl;
des->errors += 1;
return 0;
}
NetAssign_* PEIdent::elaborate_mem_lval_(Design*des, NetScope*scope,
NetMemory*mem) const
{
if (msb_ == 0) {
if (idx_.empty()) {
cerr << get_line() << ": error: Assign to memory \""
<< mem->name() << "\" requires a word select index."
<< endl;
@@ -310,37 +455,86 @@ NetAssign_* PEIdent::elaborate_mem_lval_(Design*des, NetScope*scope,
return 0;
}
if (msb_ && lsb_) {
cerr << get_line() << ": error: Cannot use part select on "
<< "memory \"" << mem->name() << ".\"" << endl;
if (idx_.size() != mem->dimensions()) {
cerr << get_line() << ": error: " << idx_.size()
<< " indices do not properly address a "
<< mem->dimensions() << "-dimension memory/array."
<< endl;
des->errors += 1;
return 0;
}
assert(msb_ && !lsb_);
// XXXX For now, require exactly 1 index.
assert(idx_.size() == 1);
NetExpr*ix = msb_->elaborate_expr(des, scope);
/* Elaborate the address expression. */
NetExpr*ix = elab_and_eval(des, scope, idx_[0], -1);
if (ix == 0)
return 0;
/* Evaluate the memory index expression down as must as
possible. Ideally, we can get it down to a constant. */
if (! dynamic_cast<NetEConst*>(ix)) {
NetExpr*tmp = ix->eval_tree();
if (tmp) {
tmp->set_line(*ix);
delete ix;
ix = tmp;
}
}
NetAssign_*lv = new NetAssign_(mem);
lv->set_bmux(ix);
lv->set_part(0, mem->width());
/* If there is no extra part select, then we are done. */
if (msb_ == 0 && lsb_ == 0) {
lv->set_part(0, mem->width());
return lv;
}
assert(sel_ != SEL_NONE);
assert(msb_ && lsb_);
if (sel_ == SEL_PART) {
NetExpr*le = elab_and_eval(des, scope, lsb_, -1);
NetExpr*me = elab_and_eval(des, scope, msb_, -1);
NetEConst*lec = dynamic_cast<NetEConst*>(le);
NetEConst*mec = dynamic_cast<NetEConst*>(me);
if (lec == 0 || mec == 0) {
cerr << get_line() << ": error: Part select "
<< "expressions must be constant." << endl;
des->errors += 1;
delete le;
delete me;
return lv;
}
verinum wedv = mec->value() - lec->value();
unsigned wid = wedv.as_long() + 1;
lv->set_part(lec, wid);
return lv;
}
assert(sel_ == SEL_IDX_UP || sel_ == SEL_IDX_DO);
NetExpr*wid_ex = elab_and_eval(des, scope, lsb_, -1);
NetEConst*wid_ec = dynamic_cast<NetEConst*> (wid_ex);
if (wid_ec == 0) {
cerr << lsb_->get_line() << ": error: "
<< "Second expression of indexed part select "
<< "most be constant." << endl;
des->errors += 1;
return lv;
}
unsigned wid = wid_ec->value().as_ulong();
NetExpr*base_ex = elab_and_eval(des, scope, msb_, -1);
if (base_ex == 0) {
return 0;
}
if (sel_ == SEL_IDX_DO && wid > 1) {
base_ex = make_add_expr(base_ex, 1-(long)wid);
}
lv->set_part(base_ex, wid);
return lv;
}
NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*, bool) const
{
cerr << get_line() << ": error: Constant values not allowed "
<< "in l-value expressions." << endl;
@@ -350,97 +544,43 @@ NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
/*
* $Log: elab_lval.cc,v $
* Revision 1.36 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.35 2006/04/16 00:54:04 steve
* Cleanup lval part select handling.
*
* Revision 1.34 2006/04/16 00:15:43 steve
* Fix part selects in l-values.
*
* Revision 1.33 2006/02/02 02:43:57 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.32 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.31 2004/12/29 23:55:43 steve
* Unify elaboration of l-values for all proceedural assignments,
* including assing, cassign and force.
*
* Generate NetConcat devices for gate outputs that feed into a
* vector results. Use this to hande gate arrays. Also let gate
* arrays handle vectors of gates when the outputs allow for it.
*
* Revision 1.30 2004/12/11 02:31:25 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.29 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.28 2004/08/28 14:59:44 steve
* More detailed error message about bad variable.
*
* Revision 1.27 2003/09/19 03:30:05 steve
* Fix name search in elab_lval.
*
* Revision 1.26 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.25 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.24 2003/01/19 00:35:39 steve
* Detect null arguments to concatenation operator.
*
* Revision 1.23 2002/11/21 23:27:51 steve
* Precalculate indices to l-value arrays.
*
* Revision 1.22 2002/11/21 18:15:40 steve
* Fix const test of msb in assignment l-values.
*
* Revision 1.21 2002/11/02 01:10:49 steve
* Detect memories without work index in l-value.
*
* Revision 1.20 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.19 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.18 2002/03/09 04:02:26 steve
* Constant expressions are not l-values for task ports.
*
* Revision 1.17 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.16 2001/11/08 05:15:50 steve
* Remove string paths from PExpr elaboration.
*
* Revision 1.15 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.14 2001/08/25 23:50:02 steve
* Change the NetAssign_ class to refer to the signal
* instead of link into the netlist. This is faster
* and uses less space. Make the NetAssignNB carry
* the delays instead of the NetAssign_ lval objects.
*
* Change the vvp code generator to support multiple
* l-values, i.e. concatenations of part selects.
*
* Revision 1.13 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.12 2001/02/09 03:16:48 steve
* Report bit/part select out of range errors. (PR#133)
*
* Revision 1.11 2001/01/10 03:13:23 steve
* Build task outputs as lval instead of nets. (PR#98)
*
* Revision 1.10 2001/01/06 06:31:58 steve
* declaration initialization for time variables.
*
* Revision 1.9 2001/01/06 02:29:36 steve
* Support arrays of integers.
*
* Revision 1.8 2000/12/12 06:14:51 steve
* sorry for concatenated memories in l-values. (PR#76)
*
* Revision 1.7 2000/12/01 02:55:37 steve
* Detect part select errors on l-values.
*
* Revision 1.6 2000/10/31 17:49:02 steve
* Support time variables.
*
* Revision 1.5 2000/10/26 17:09:46 steve
* Fix handling of errors in behavioral lvalues. (PR#28)
*
* Revision 1.4 2000/09/10 15:43:59 steve
* Some error checking.
*
* Revision 1.3 2000/09/10 03:59:59 steve
* Agressively merge NetAssign_ within concatenations.
*
* Revision 1.2 2000/09/10 02:18:16 steve
* elaborate complex l-values
*
* Revision 1.1 2000/09/09 15:21:26 steve
* move lval elaboration to PExpr virtual methods.
*
*/
+1521 -1040
View File
File diff suppressed because it is too large Load Diff
+32 -11
View File
@@ -17,12 +17,13 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_pexpr.cc,v 1.20 2003/05/30 02:55:32 steve Exp $"
#ident "$Id: elab_pexpr.cc,v 1.24 2006/06/02 04:48:50 steve Exp $"
#endif
# include "config.h"
# include "PExpr.h"
# include "compiler.h"
# include "util.h"
# include <iostream>
@@ -118,7 +119,7 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
NetExpr*PEFNumber::elaborate_pexpr(Design*des, NetScope*scope) const
{
return elaborate_expr(des, scope);
return elaborate_expr(des, scope, -1, false);
}
/*
@@ -136,31 +137,37 @@ NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
if (path.peek_name(0))
pscope = des->find_scope(scope, path);
const NetExpr*ex = pscope->get_parameter(name);
perm_string perm_name = lex_strings.make(name);
delete name;
const NetExpr*ex_msb;
const NetExpr*ex_lsb;
const NetExpr*ex = pscope->get_parameter(perm_name, ex_msb, ex_lsb);
if (ex == 0) {
cerr << get_line() << ": error: identifier ``" << path_ <<
"'' is not a parameter in " << scope->name() << "." << endl;
des->errors += 1;
delete name;
return 0;
}
NetExpr*res = new NetEParam(des, pscope, hname_t(name));
NetExpr*res = new NetEParam(des, pscope, perm_name);
res->set_line(*this);
assert(res);
delete name;
assert(idx_ == 0);
if (msb_ && lsb_) {
assert(idx_.empty());
cerr << get_line() << ": sorry: Cannot part select "
"bits of parameters." << endl;
des->errors += 1;
} else if (msb_) {
} else if (!idx_.empty()) {
assert(msb_==0);
assert(lsb_==0);
assert(idx_.size() == 1);
/* We have here a bit select. Insert a NetESelect node
to handle it. */
NetExpr*tmp = msb_->elaborate_pexpr(des, scope);
NetExpr*tmp = idx_[0]->elaborate_pexpr(des, scope);
if (tmp != 0) {
res = new NetESelect(res, tmp, 1);
}
@@ -174,13 +181,13 @@ NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
*/
NetExpr*PENumber::elaborate_pexpr(Design*des, NetScope*sc) const
{
return elaborate_expr(des, sc);
return elaborate_expr(des, sc, -1, false);
}
NetEConst* PEString::elaborate_pexpr(Design*des, NetScope*scope) const
{
return elaborate_expr(des, scope);
return elaborate_expr(des, scope, -1, false);
}
NetETernary* PETernary::elaborate_pexpr(Design*des, NetScope*scope) const
@@ -229,6 +236,20 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
/*
* $Log: elab_pexpr.cc,v $
* Revision 1.24 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.23 2006/02/02 02:43:58 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.22 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.21 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.20 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
+357 -114
View File
@@ -17,12 +17,14 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_scope.cc,v 1.27 2003/09/13 01:01:51 steve Exp $"
#ident "$Id: elab_scope.cc,v 1.41 2006/06/02 04:48:50 steve Exp $"
#endif
# include "config.h"
# include "compiler.h"
# include "netmisc.h"
# include <iostream>
# include <stdio.h>
/*
* Elaboration happens in two passes, generally. The first scans the
@@ -32,10 +34,10 @@
*/
# include "Module.h"
# include "PData.h"
# include "PEvent.h"
# include "PExpr.h"
# include "PGate.h"
# include "PGenerate.h"
# include "PTask.h"
# include "PWire.h"
# include "Statement.h"
@@ -44,8 +46,14 @@
# include <typeinfo>
# include <assert.h>
bool Module::elaborate_scope(Design*des, NetScope*scope) const
bool Module::elaborate_scope(Design*des, NetScope*scope,
const replace_t&replacements) const
{
if (debug_scopes) {
cerr << get_line() << ": debug: Elaborate scope "
<< scope->name() << "." << endl;
}
// Generate all the parameters that this instance of this
// module introduces to the design. This loop elaborates the
// parameters, but doesn't evaluate references to
@@ -57,7 +65,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
// the pform and just place a NetEParam placeholder in the
// place of the elaborated expression.
typedef map<string,param_expr_t>::const_iterator mparm_it_t;
typedef map<perm_string,param_expr_t>::const_iterator mparm_it_t;
typedef map<hname_t,PExpr*>::const_iterator hparm_it_t;
@@ -69,8 +77,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
NetEParam*tmp = new NetEParam;
tmp->set_line(*((*cur).second.expr));
if ((*cur).second.msb)
tmp->cast_signed( (*cur).second.signed_flag );
tmp->cast_signed( (*cur).second.signed_flag );
scope->set_parameter((*cur).first, tmp, 0, 0, false);
}
@@ -98,6 +105,67 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
PExpr*ex = (*cur).second.expr;
assert(ex);
NetExpr*val = ex->elaborate_pexpr(des, scope);
NetExpr*msb = 0;
NetExpr*lsb = 0;
bool signed_flag = (*cur).second.signed_flag;
/* If the parameter declaration includes msb and lsb,
then use them to calculate a width for the
result. Then make sure the constant expression of the
parameter value is coerced to have the correct
and defined width. */
if ((*cur).second.msb) {
msb = (*cur).second.msb ->elaborate_pexpr(des, scope);
assert(msb);
lsb = (*cur).second.lsb ->elaborate_pexpr(des, scope);
}
if (signed_flag) {
/* If explicitly signed, then say so. */
val->cast_signed(true);
} else if ((*cur).second.msb) {
/* If there is a range, then the signedness comes
from the type and not the expression. */
val->cast_signed(signed_flag);
} else {
/* otherwise, let the expression describe
itself. */
signed_flag = val->has_sign();
}
val = scope->set_parameter((*cur).first, val,
msb, lsb, signed_flag);
assert(val);
delete val;
}
/* run parameter replacements that were collected from the
containing scope and meant for me. */
for (replace_t::const_iterator cur = replacements.begin()
; cur != replacements.end() ; cur ++) {
NetExpr*val = (*cur).second;
if (debug_scopes) {
cerr << get_line() << ": debug: "
<< "Replace " << (*cur).first
<< " with expression " << *val
<< " from " << val->get_line() << "." << endl;
}
bool flag = scope->replace_parameter((*cur).first, val);
if (! flag) {
cerr << val->get_line() << ": warning: parameter "
<< (*cur).first << " not found in "
<< scope->name() << "." << endl;
}
}
for (mparm_it_t cur = localparams.begin()
; cur != localparams.end() ; cur ++) {
PExpr*ex = (*cur).second.expr;
assert(ex);
NetExpr*val = ex->elaborate_pexpr(des, scope);
NetExpr*msb = 0;
NetExpr*lsb = 0;
@@ -122,18 +190,6 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
delete val;
}
for (mparm_it_t cur = localparams.begin()
; cur != localparams.end() ; cur ++) {
PExpr*ex = (*cur).second.expr;
assert(ex);
NetExpr*val = ex->elaborate_pexpr(des, scope);
val = scope->set_parameter((*cur).first, val, 0, 0, false);
assert(val);
delete val;
}
// Run through the defparams for this module, elaborate the
// expressions in this context and save the result is a table
// for later final override.
@@ -165,18 +221,29 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
delete[]attr;
// Generate schemes can create new scopes in the form of
// generated code. Scan the generate schemes, and *generate*
// new scopes, which is slightly different from simple
// elaboration.
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
(*cur) -> generate_scope(des, scope);
}
// Tasks introduce new scopes, so scan the tasks in this
// module. Create a scope for the task and pass that to the
// elaborate_scope method of the PTask for detailed
// processing.
typedef map<string,PTask*>::const_iterator tasks_it_t;
typedef map<perm_string,PTask*>::const_iterator tasks_it_t;
for (tasks_it_t cur = tasks_.begin()
; cur != tasks_.end() ; cur ++ ) {
NetScope*task_scope = new NetScope(scope, (*cur).first.c_str(),
NetScope*task_scope = new NetScope(scope, (*cur).first,
NetScope::TASK);
(*cur).second->elaborate_scope(des, task_scope);
}
@@ -186,12 +253,12 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
// perspective of scopes. So handle them exactly the same
// way.
typedef map<string,PFunction*>::const_iterator funcs_it_t;
typedef map<perm_string,PFunction*>::const_iterator funcs_it_t;
for (funcs_it_t cur = funcs_.begin()
; cur != funcs_.end() ; cur ++ ) {
NetScope*func_scope = new NetScope(scope, (*cur).first.c_str(),
NetScope*func_scope = new NetScope(scope, (*cur).first,
NetScope::FUNC);
(*cur).second->elaborate_scope(des, func_scope);
}
@@ -201,7 +268,6 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
// scan all of them to create those scopes.
typedef list<PGate*>::const_iterator gates_it_t;
for (gates_it_t cur = gates_.begin()
; cur != gates_.end() ; cur ++ ) {
@@ -226,19 +292,114 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
// elaboration, so do it now. This allows for normal
// elaboration to reference these events.
for (map<string,PEvent*>::const_iterator et = events.begin()
for (map<perm_string,PEvent*>::const_iterator et = events.begin()
; et != events.end() ; et ++ ) {
(*et).second->elaborate_scope(des, scope);
}
for (map<hname_t,PData*>::const_iterator cur = datum.begin()
; cur != datum.end() ; cur ++ ) {
return des->errors == 0;
}
(*cur).second->elaborate_scope(des, scope);
bool PGenerate::generate_scope(Design*des, NetScope*container)
{
switch (scheme_type) {
case GS_LOOP:
return generate_scope_loop_(des, container);
default:
cerr << get_line() << ": sorry: Generate of this sort"
<< " is not supported yet!" << endl;
return false;
}
}
/*
* This is the elaborate scope method for a generate loop.
*/
bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
{
// We're going to need a genvar...
int genvar;
// The initial value for the genvar does not need (nor can it
// use) the genvar itself, so we can evaluate this expression
// the same way any other paramter value is evaluated.
NetExpr*init_ex = elab_and_eval(des, container, loop_init, -1);
NetEConst*init = dynamic_cast<NetEConst*> (init_ex);
if (init == 0) {
cerr << get_line() << ": error: Cannot evaluate genvar"
<< " init expression: " << *loop_init << endl;
des->errors += 1;
return false;
}
return des->errors == 0;
genvar = init->value().as_long();
delete init_ex;
if (debug_elaborate)
cerr << get_line() << ": debug: genvar init = " << genvar << endl;
container->genvar_tmp = loop_index;
container->genvar_tmp_val = 0;
NetExpr*test_ex = elab_and_eval(des, container, loop_test, -1);
NetEConst*test = dynamic_cast<NetEConst*>(test_ex);
assert(test);
while (test->value().as_long()) {
// The actual name of the scope includes the genvar so
// that each instance has a unique name in the
// container. The format of using [] is part of the
// Verilog standard.
char name_buf[128];
snprintf(name_buf, sizeof name_buf,
"%s[%d]", scope_name.str(), genvar);
perm_string use_name = lex_strings.make(name_buf);
if (debug_elaborate)
cerr << get_line() << ": debug: "
<< "Create generated scope " << use_name << endl;
NetScope*scope = new NetScope(container, use_name,
NetScope::GENBLOCK);
// Set in the scope a localparam for the value of the
// genvar within this instance of the generate
// block. Code within this scope thus has access to the
// genvar as a constant.
{
verinum genvar_verinum(genvar);
genvar_verinum.has_sign(true);
NetEConstParam*gp = new NetEConstParam(scope,
loop_index,
genvar_verinum);
scope->set_localparam(loop_index, gp);
}
scope_list_.push_back(scope);
// Calculate the step for the loop variable.
NetExpr*step_ex = elab_and_eval(des, container, loop_step, -1);
NetEConst*step = dynamic_cast<NetEConst*>(step_ex);
assert(step);
if (debug_elaborate)
cerr << get_line() << ": debug: genvar step from "
<< genvar << " to " << step->value().as_long() << endl;
genvar = step->value().as_long();
container->genvar_tmp_val = genvar;
delete step;
delete test_ex;
test_ex = elab_and_eval(des, container, loop_test, -1);
test = dynamic_cast<NetEConst*>(test_ex);
assert(test);
}
// Clear the genvar_tmp field in the scope to reflect that the
// genvar is no longer value for evaluating expressions.
container->genvar_tmp = perm_string();
return true;
}
void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
@@ -287,107 +448,145 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
return;
}
// Create the new scope as a MODULE with my name.
NetScope*my_scope = new NetScope(sc, get_name().c_str(), NetScope::MODULE);
my_scope->set_module_name(mod->mod_name());
NetExpr*mse = msb_ ? elab_and_eval(des, sc, msb_, -1) : 0;
NetExpr*lse = lsb_ ? elab_and_eval(des, sc, lsb_, -1) : 0;
NetEConst*msb = dynamic_cast<NetEConst*> (mse);
NetEConst*lsb = dynamic_cast<NetEConst*> (lse);
// Set time units and precision.
my_scope->time_unit(mod->time_unit);
my_scope->time_precision(mod->time_precision);
des->set_precision(mod->time_precision);
assert( (msb == 0) || (lsb != 0) );
// This call actually arranges for the description of the
// module type to process this instance and handle parameters
// and sub-scopes that might occur. Parameters are also
// created in that scope, as they exist. (I'll override them
// later.)
mod->elaborate_scope(des, my_scope);
long instance_low = 0;
long instance_high = 0;
long instance_count = 1;
bool instance_array = false;
// Look for module parameter replacements. The "replace" map
// maps parameter name to replacement expression that is
// passed. It is built up by the ordered overrides or named
// overrides.
if (msb) {
instance_array = true;
instance_high = msb->value().as_long();
instance_low = lsb->value().as_long();
if (instance_high > instance_low)
instance_count = instance_high - instance_low + 1;
else
instance_count = instance_low - instance_high + 1;
typedef map<string,PExpr*>::const_iterator mparm_it_t;
map<string,PExpr*> replace;
delete mse;
delete lse;
}
NetScope::scope_vec_t instances (instance_count);
if (debug_scopes) {
cerr << get_line() << ": debug: Create " << instance_count
<< " instances of " << get_name()
<< "." << endl;
}
// Positional parameter overrides are matched to parameter
// names by using the param_names list of parameter
// names. This is an ordered list of names so the first name
// is parameter 0, the second parameter 1, and so on.
// Run through the module instances, and make scopes out of
// them. Also do parameter overrides that are done on the
// instantiation line.
for (int idx = 0 ; idx < instance_count ; idx += 1) {
if (overrides_) {
assert(parms_ == 0);
list<string>::const_iterator cur = mod->param_names.begin();
unsigned idx = 0;
for (;;) {
if (idx >= overrides_->count())
break;
if (cur == mod->param_names.end())
break;
perm_string use_name = get_name();
replace[*cur] = (*overrides_)[idx];
if (instance_array) {
char name_buf[128];
int instance_idx = idx;
if (instance_low < instance_high)
instance_idx = instance_low + idx;
else
instance_idx = instance_low - idx;
idx += 1;
cur ++;
snprintf(name_buf, sizeof name_buf,
"%s[%d]", get_name().str(), instance_idx);
use_name = lex_strings.make(name_buf);
}
}
// Named parameter overrides carry a name with each override
// so the mapping into the replace list is much easier.
if (parms_) {
assert(overrides_ == 0);
for (unsigned idx = 0 ; idx < nparms_ ; idx += 1)
replace[parms_[idx].name] = parms_[idx].parm;
}
// And here we scan the replacements we collected. Elaborate
// the expression in my context, then replace the sub-scope
// parameter value with the new expression.
for (mparm_it_t cur = replace.begin()
; cur != replace.end() ; cur ++ ) {
PExpr*tmp = (*cur).second;
NetExpr*val = tmp->elaborate_pexpr(des, sc);
bool flag = my_scope->replace_parameter((*cur).first, val);
if (! flag) {
cerr << val->get_line() << ": warning: parameter "
<< (*cur).first << " not found in "
<< sc->name() << "." << endl;
if (debug_scopes) {
cerr << get_line() << ": debug: Module instance " << use_name
<< " becomes child of " << sc->name()
<< "." << endl;
}
}
}
/*
* Elaborate the datum within the module. This variable may be
* within a subscope (i.e., a function or task) so use the components
* of the name to find the precise scope where this item goes.
*/
void PData::elaborate_scope(Design*des, NetScope*scope) const
{
NetScope*sub_scope = scope;
for (unsigned idx = 0 ; idx < (hname_.component_count()-1); idx += 1) {
sub_scope = sub_scope->child(hname_.peek_name(idx));
// Create the new scope as a MODULE with my name.
NetScope*my_scope = new NetScope(sc, use_name, NetScope::MODULE);
my_scope->set_module_name(mod->mod_name());
my_scope->default_nettype(mod->default_nettype);
if (sub_scope == 0) {
cerr << get_line() << ": internal error: "
<< "Could not find sub-scope "
<< hname_.peek_name(idx) << " of "
<< hname_ << " in module " << scope->name()
<< endl;
des->errors += 1;
return;
instances[idx] = my_scope;
// Set time units and precision.
my_scope->time_unit(mod->time_unit);
my_scope->time_precision(mod->time_precision);
des->set_precision(mod->time_precision);
// Look for module parameter replacements. The "replace" map
// maps parameter name to replacement expression that is
// passed. It is built up by the ordered overrides or named
// overrides.
typedef map<perm_string,PExpr*>::const_iterator mparm_it_t;
map<perm_string,PExpr*> replace;
// Positional parameter overrides are matched to parameter
// names by using the param_names list of parameter
// names. This is an ordered list of names so the first name
// is parameter 0, the second parameter 1, and so on.
if (overrides_) {
assert(parms_ == 0);
list<perm_string>::const_iterator cur
= mod->param_names.begin();
unsigned idx = 0;
for (;;) {
if (idx >= overrides_->count())
break;
if (cur == mod->param_names.end())
break;
replace[*cur] = (*overrides_)[idx];
idx += 1;
cur ++;
}
}
// Named parameter overrides carry a name with each override
// so the mapping into the replace list is much easier.
if (parms_) {
assert(overrides_ == 0);
for (unsigned idx = 0 ; idx < nparms_ ; idx += 1)
replace[parms_[idx].name] = parms_[idx].parm;
}
Module::replace_t replace_net;
// And here we scan the replacements we collected. Elaborate
// the expression in my context, then replace the sub-scope
// parameter value with the new expression.
for (mparm_it_t cur = replace.begin()
; cur != replace.end() ; cur ++ ) {
PExpr*tmp = (*cur).second;
NetExpr*val = tmp->elaborate_pexpr(des, sc);
replace_net[(*cur).first] = val;
}
// This call actually arranges for the description of the
// module type to process this instance and handle parameters
// and sub-scopes that might occur. Parameters are also
// created in that scope, as they exist. (I'll override them
// later.)
mod->elaborate_scope(des, my_scope, replace_net);
}
const char*basename = hname_.peek_tail_name();
NetVariable*tmp = new NetVariable(lex_strings.add(basename));
tmp->set_line(*this);
sub_scope->add_variable(tmp);
/* Stash the instance array of scopes into the parent
scope. Later elaboration passes will use this vector to
further elaborate the array. */
sc->instance_arrays[get_name()] = instances;
}
/*
@@ -439,8 +638,8 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
{
NetScope*my_scope = scope;
if (name_ != "") {
my_scope = new NetScope(scope, name_.c_str(), bl_type_==BL_PAR
if (name_ != 0) {
my_scope = new NetScope(scope, name_, bl_type_==BL_PAR
? NetScope::FORK_JOIN
: NetScope::BEGIN_END);
}
@@ -549,6 +748,50 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
/*
* $Log: elab_scope.cc,v $
* Revision 1.41 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.40 2006/04/12 05:05:03 steve
* Use elab_and_eval to evaluate genvar expressions.
*
* Revision 1.39 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.38 2006/03/30 01:49:07 steve
* Fix instance arrays indexed by overridden parameters.
*
* Revision 1.37 2006/03/18 22:53:38 steve
* Support more parameter syntax.
*
* Revision 1.36 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.35 2004/09/10 00:15:17 steve
* Missing stdio.h header for warnings.
*
* Revision 1.34 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.33 2004/08/26 04:02:03 steve
* Add support for localparam ranges.
*
* Revision 1.32 2004/06/13 04:56:54 steve
* Add support for the default_nettype directive.
*
* Revision 1.31 2004/05/25 19:21:06 steve
* More identifier lists use perm_strings.
*
* Revision 1.30 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.29 2004/02/19 07:06:57 steve
* LPM, logic and Variables have perm_string names.
*
* Revision 1.28 2004/02/18 17:11:55 steve
* Use perm_strings for named langiage items.
*
* Revision 1.27 2003/09/13 01:01:51 steve
* Spelling fixes.
*
+260 -43
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2004 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_sig.cc,v 1.32 2003/09/20 05:24:00 steve Exp $"
#ident "$Id: elab_sig.cc,v 1.42 2006/06/02 04:48:50 steve Exp $"
#endif
# include "config.h"
@@ -27,8 +27,10 @@
# include "Module.h"
# include "PExpr.h"
# include "PGate.h"
# include "PGenerate.h"
# include "PTask.h"
# include "PWire.h"
# include "compiler.h"
# include "netlist.h"
# include "netmisc.h"
# include "util.h"
@@ -157,6 +159,16 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
des->errors += 1;
}
}
// Run through all the generate schemes to enaborate the
// signals that they hold. Note that the generate schemes hold
// the scopes that they instantiated, so we don't pass any
// scope in.
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
(*cur) -> elaborate_sig(des);
}
// Get all the gates of the module and elaborate them by
@@ -174,7 +186,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
}
typedef map<string,PFunction*>::const_iterator mfunc_it_t;
typedef map<perm_string,PFunction*>::const_iterator mfunc_it_t;
for (mfunc_it_t cur = funcs_.begin()
; cur != funcs_.end() ; cur ++) {
@@ -195,7 +207,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
// elaborate the ports of the tasks defined within this
// module. Run through them now.
typedef map<string,PTask*>::const_iterator mtask_it_t;
typedef map<perm_string,PTask*>::const_iterator mtask_it_t;
for (mtask_it_t cur = tasks_.begin()
; cur != tasks_.end() ; cur ++) {
@@ -210,31 +222,80 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
bool PGModule::elaborate_sig_mod_(Design*des, NetScope*scope,
Module*rmod) const
{
// Missing module instance names have already been rejected.
assert(get_name() != "");
bool flag = true;
NetScope::scope_vec_t instance = scope->instance_arrays[get_name()];
for (unsigned idx = 0 ; idx < instance.count() ; idx += 1) {
// I know a priori that the elaborate_scope created the scope
// already, so just look it up as a child of the current scope.
NetScope*my_scope = instance[idx];
assert(my_scope);
if (my_scope->parent() != scope) {
cerr << get_line() << ": internal error: "
<< "Instance " << my_scope->name()
<< " is in parent " << my_scope->parent()->name()
<< " instead of " << scope->name()
<< endl;
}
assert(my_scope->parent() == scope);
if (! rmod->elaborate_sig(des, my_scope))
flag = false;
if (msb_) {
cerr << get_line() << ": sorry: Module instantiation arrays "
"are not yet supported." << endl;
des->errors += 1;
return false;
}
// I know a priori that the elaborate_scope created the scope
// already, so just look it up as a child of the current scope.
NetScope*my_scope = scope->child(get_name());
assert(my_scope);
return rmod->elaborate_sig(des, my_scope);
return flag;
}
bool PGenerate::elaborate_sig(Design*des) const
{
bool flag = true;
typedef list<NetScope*>::const_iterator scope_list_it_t;
for (scope_list_it_t cur = scope_list_.begin()
; cur != scope_list_.end() ; cur ++ ) {
if (debug_elaborate)
cerr << get_line() << ": debug: Elaborate nets in "
<< "scope " << (*cur)->name() << endl;
flag = elaborate_sig_(des, *cur) & flag;
}
return flag;
}
bool PGenerate::elaborate_sig_(Design*des, NetScope*scope) const
{
// Scan the declared PWires to elaborate the obvious signals
// in the current scope.
typedef map<hname_t,PWire*>::const_iterator wires_it_t;
for (wires_it_t wt = wires.begin()
; wt != wires.end() ; wt ++ ) {
PWire*cur = (*wt).second;
if (debug_elaborate)
cerr << get_line() << ": debug: Elaborate PWire "
<< cur->path() << " in scope " << scope->name() << endl;
cur->elaborate_sig(des, scope);
}
return true;
}
/*
* A function definition exists within an elaborated module.
* A function definition exists within an elaborated module. This
* matters when elaborating signals, as the ports of the function are
* created as signals/variables for each instance of the
* function. That is why PFunction has an elaborate_sig method.
*/
void PFunction::elaborate_sig(Design*des, NetScope*scope) const
{
string fname = scope->basename();
perm_string fname = scope->basename();
assert(scope->type() == NetScope::FUNC);
/* Make sure the function has at least one input port. If it
@@ -248,21 +309,86 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
des->errors += 1;
}
svector<NetNet*>ports (ports_? ports_->count()+1 : 1);
NetNet*ret_sig = 0;
/* Get the reg for the return value. I know the name of the
reg variable, and I know that it is in this scope, so look
it up directly. */
ports[0] = scope->find_signal(scope->basename());
if (ports[0] == 0) {
cerr << get_line() << ": internal error: function scope "
<< scope->name() << " is missing return reg "
<< fname << "." << endl;
scope->dump(cerr);
des->errors += 1;
return;
/* Create the signals/variables of the return value and write
them into the function scope. */
switch (return_type_.type) {
case PTF_REG:
if (return_type_.range) {
NetExpr*me = elab_and_eval(des, scope,
(*return_type_.range)[0], -1);
assert(me);
NetExpr*le = elab_and_eval(des, scope,
(*return_type_.range)[1], -1);
assert(le);
long mnum = 0, lnum = 0;
if (NetEConst*tmp = dynamic_cast<NetEConst*>(me)) {
mnum = tmp->value().as_long();
} else {
cerr << me->get_line() << ": error: "
"Unable to evaluate constant expression "
<< *me << "." << endl;
des->errors += 1;
}
if (NetEConst*tmp = dynamic_cast<NetEConst*>(le)) {
lnum = tmp->value().as_long();
} else {
cerr << le->get_line() << ": error: "
"Unable to evaluate constant expression "
<< *le << "." << endl;
des->errors += 1;
}
ret_sig = new NetNet(scope, fname, NetNet::REG, mnum, lnum);
} else {
ret_sig = new NetNet(scope, fname, NetNet::REG);
}
ret_sig->set_line(*this);
ret_sig->port_type(NetNet::POUTPUT);
ret_sig->data_type(IVL_VT_LOGIC);
break;
case PTF_INTEGER:
ret_sig = new NetNet(scope, fname, NetNet::REG, INTEGER_WIDTH);
ret_sig->set_line(*this);
ret_sig->set_signed(true);
ret_sig->set_isint(true);
ret_sig->port_type(NetNet::POUTPUT);
ret_sig->data_type(IVL_VT_LOGIC);
break;
case PTF_TIME:
ret_sig = new NetNet(scope, fname, NetNet::REG, 64);
ret_sig->set_line(*this);
ret_sig->set_signed(false);
ret_sig->set_isint(false);
ret_sig->port_type(NetNet::POUTPUT);
ret_sig->data_type(IVL_VT_LOGIC);
break;
case PTF_REAL:
case PTF_REALTIME:
ret_sig = new NetNet(scope, fname, NetNet::REG, 1);
ret_sig->set_line(*this);
ret_sig->set_signed(true);
ret_sig->set_isint(false);
ret_sig->port_type(NetNet::POUTPUT);
ret_sig->data_type(IVL_VT_REAL);
break;
default:
cerr << get_line() << ": internal error: I don't know how "
<< "to deal with return type of function "
<< scope->basename() << "." << endl;
}
svector<NetNet*>ports (ports_? ports_->count() : 0);
if (ports_)
for (unsigned idx = 0 ; idx < ports_->count() ; idx += 1) {
@@ -271,8 +397,8 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
as two components: <func>.<port>. */
hname_t path = (*ports_)[idx]->path();
string pname = path.peek_name(1);
string ppath = path.peek_name(0);
perm_string pname = lex_strings.make(path.peek_name(1));
perm_string ppath = lex_strings.make(path.peek_name(0));
if (ppath != scope->basename()) {
cerr << get_line() << ": internal error: function "
@@ -288,14 +414,18 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
<< scope->name() << " is missing port "
<< pname << "." << endl;
scope->dump(cerr);
cerr << get_line() << ": Continuing..." << endl;
des->errors += 1;
}
ports[idx+1] = tmp;
ports[idx] = tmp;
}
NetFuncDef*def = new NetFuncDef(scope, ports);
NetFuncDef*def = 0;
if (ret_sig) def = new NetFuncDef(scope, ret_sig, ports);
assert(def);
scope->set_func_def(def);
}
@@ -366,6 +496,7 @@ bool PGate::elaborate_sig(Design*des, NetScope*scope) const
*/
void PWire::elaborate_sig(Design*des, NetScope*scope) const
{
/* The parser may produce hierarchical names for wires. I here
follow the scopes down to the base where I actually want to
elaborate the NetNet object. */
@@ -373,7 +504,13 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
free(tmp_path.remove_tail_name());
for (unsigned idx = 0 ; tmp_path.peek_name(idx) ; idx += 1) {
scope = scope->child(tmp_path.peek_name(idx));
assert(scope);
if (scope == 0) {
cerr << get_line() << ": internal error: "
<< "Bad scope component for name "
<< hname_ << endl;
assert(scope);
}
}
}
@@ -411,7 +548,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
}
NetEConst*tmp;
NetExpr*texpr = elab_and_eval(des, scope, msb_[idx]);
NetExpr*texpr = elab_and_eval(des, scope, msb_[idx], -1);
tmp = dynamic_cast<NetEConst*>(texpr);
if (tmp == 0) {
@@ -425,7 +562,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
mnum[idx] = tmp->value().as_long();
delete texpr;
texpr = elab_and_eval(des, scope, lsb_[idx]);
texpr = elab_and_eval(des, scope, lsb_[idx], -1);
tmp = dynamic_cast<NetEConst*>(texpr);
if (tmp == 0) {
cerr << msb_[idx]->get_line() << ": error: "
@@ -486,8 +623,8 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
if (lidx_ || ridx_) {
assert(lidx_ && ridx_);
NetExpr*lexp = elab_and_eval(des, scope, lidx_);
NetExpr*rexp = elab_and_eval(des, scope, ridx_);
NetExpr*lexp = elab_and_eval(des, scope, lidx_, -1);
NetExpr*rexp = elab_and_eval(des, scope, ridx_, -1);
if ((lexp == 0) || (rexp == 0)) {
cerr << get_line() << ": internal error: There is "
@@ -514,7 +651,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
delete lexp;
delete rexp;
string name = hname_.peek_tail_name();
perm_string name = lex_strings.make(hname_.peek_tail_name());
long lnum = lval.as_long();
long rnum = rval.as_long();
@@ -525,13 +662,57 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
} else {
string name = hname_.peek_tail_name();
/* If the net type is supply0 or supply1, replace it
with a simple wire with a pulldown/pullup with supply
strength. In other words, transform:
supply0 foo;
to:
wire foo;
pulldown #(supply0) (foo);
This reduces the backend burden, and behaves exactly
the same. */
NetLogic*pull = 0;
if (wtype == NetNet::SUPPLY0 || wtype == NetNet::SUPPLY1) {
NetLogic::TYPE pull_type = (wtype==NetNet::SUPPLY1)
? NetLogic::PULLUP
: NetLogic::PULLDOWN;
pull = new NetLogic(scope, scope->local_symbol(),
1, pull_type, wid);
pull->set_line(*this);
pull->pin(0).drive0(Link::SUPPLY);
pull->pin(0).drive1(Link::SUPPLY);
des->add_node(pull);
wtype = NetNet::WIRE;
if (debug_elaborate) {
cerr << get_line() << ": debug: "
<< "Generate a SUPPLY pulldown for the "
<< "supply0 net." << endl;
}
}
perm_string name = lex_strings.make(hname_.peek_tail_name());
if (debug_elaborate) {
cerr << get_line() << ": debug: Create signal "
<< name << "["<<msb<<":"<<lsb<<"]"
<< " in scope " << scope->name() << endl;
}
NetNet*sig = new NetNet(scope, name, wtype, msb, lsb);
sig->data_type(data_type_);
sig->set_line(*this);
sig->port_type(port_type_);
sig->set_signed(get_signed());
sig->set_isint(get_isint());
if (pull)
connect(sig->pin(0), pull->pin(0));
for (unsigned idx = 0 ; idx < nattrib ; idx += 1)
sig->attribute(attrib_list[idx].key, attrib_list[idx].val);
}
@@ -539,6 +720,42 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
/*
* $Log: elab_sig.cc,v $
* Revision 1.42 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.41 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.40 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.39 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.38 2005/02/13 01:15:07 steve
* Replace supply nets with wires connected to pullup/down supply devices.
*
* Revision 1.37 2004/12/11 02:31:25 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.36 2004/09/27 22:34:10 steve
* Cleanup and factoring of autoconf.
*
* Revision 1.35 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.34 2004/05/31 23:34:37 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.33 2004/02/18 17:11:55 steve
* Use perm_strings for named langiage items.
*
* Revision 1.32 2003/09/20 05:24:00 steve
* Evaluate memory index constants using elab_and_eval.
*
+968 -398
View File
File diff suppressed because it is too large Load Diff
+108 -167
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2005 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: emit.cc,v 1.75 2003/09/13 01:30:07 steve Exp $"
#ident "$Id: emit.cc,v 1.87 2006/06/18 04:15:50 steve Exp $"
#endif
# include "config.h"
@@ -63,12 +63,6 @@ bool NetCaseCmp::emit_node(struct target_t*tgt) const
return true;
}
bool NetCAssign::emit_node(struct target_t*tgt) const
{
tgt->net_cassign(this);
return true;
}
bool NetCLShift::emit_node(struct target_t*tgt) const
{
tgt->lpm_clshift(this);
@@ -81,6 +75,11 @@ bool NetCompare::emit_node(struct target_t*tgt) const
return true;
}
bool NetConcat::emit_node(struct target_t*tgt) const
{
return tgt->concat(this);
}
bool NetConst::emit_node(struct target_t*tgt) const
{
return tgt->net_const(this);
@@ -98,10 +97,9 @@ bool NetFF::emit_node(struct target_t*tgt) const
return true;
}
bool NetForce::emit_node(struct target_t*tgt) const
bool NetLiteral::emit_node(struct target_t*tgt) const
{
tgt->net_force(this);
return true;
return tgt->net_literal(this);
}
bool NetModulo::emit_node(struct target_t*tgt) const
@@ -122,12 +120,37 @@ bool NetMux::emit_node(struct target_t*tgt) const
return true;
}
bool NetPartSelect::emit_node(struct target_t*tgt) const
{
return tgt->part_select(this);
}
bool NetRamDq::emit_node(struct target_t*tgt) const
{
tgt->lpm_ram_dq(this);
return true;
}
bool NetReplicate::emit_node(struct target_t*tgt) const
{
return tgt->replicate(this);
}
bool NetSignExtend::emit_node(struct target_t*tgt) const
{
return tgt->sign_extend(this);
}
bool NetUReduce::emit_node(struct target_t*tgt) const
{
return tgt->ureduce(this);
}
bool NetSysFunc::emit_node(struct target_t*tgt) const
{
return tgt->net_sysfunction(this);
}
bool NetUserFunc::emit_node(struct target_t*tgt) const
{
return tgt->net_function(this);
@@ -312,9 +335,6 @@ void NetScope::emit_scope(struct target_t*tgt) const
for (NetEvent*cur = events_ ; cur ; cur = cur->snext_)
tgt->event(cur);
for (NetVariable*cur = vars_ ; cur ; cur = cur->snext_)
tgt->variable(cur);
for (NetScope*cur = sub_ ; cur ; cur = cur->sib_)
cur->emit_scope(tgt);
@@ -335,17 +355,18 @@ void NetScope::emit_scope(struct target_t*tgt) const
}
}
void NetScope::emit_defs(struct target_t*tgt) const
bool NetScope::emit_defs(struct target_t*tgt) const
{
bool flag = true;
switch (type_) {
case MODULE:
for (NetScope*cur = sub_ ; cur ; cur = cur->sib_)
cur->emit_defs(tgt);
flag &= cur->emit_defs(tgt);
break;
case FUNC:
tgt->func_def(this);
flag &= tgt->func_def(this);
break;
case TASK:
tgt->task_def(this);
@@ -354,6 +375,7 @@ void NetScope::emit_defs(struct target_t*tgt) const
break;
}
return flag;
}
void NetWhile::emit_proc_recurse(struct target_t*tgt) const
@@ -361,42 +383,50 @@ void NetWhile::emit_proc_recurse(struct target_t*tgt) const
proc_->emit_proc(tgt);
}
bool Design::emit(struct target_t*tgt) const
int Design::emit(struct target_t*tgt) const
{
bool rc = true;
int rc = 0;
rc = rc && tgt->start_design(this);
if (rc == false)
return false;
if (tgt->start_design(this) == false)
return -2;
// enumerate the scopes
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
(*scope)->emit_scope(tgt);
// emit nodes
bool nodes_rc = true;
if (nodes_) {
NetNode*cur = nodes_->node_next_;
do {
rc = rc && cur->emit_node(tgt);
nodes_rc = nodes_rc && cur->emit_node(tgt);
cur = cur->node_next_;
} while (cur != nodes_->node_next_);
}
// emit task and function definitions
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
bool tasks_rc = true;
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
(*scope)->emit_defs(tgt);
tasks_rc &= (*scope)->emit_defs(tgt);
// emit the processes
bool proc_rc = true;
for (const NetProcTop*idx = procs_ ; idx ; idx = idx->next_)
rc = rc && idx->emit(tgt);
proc_rc &= idx->emit(tgt);
if (tgt->end_design(this) != 0)
rc = false;
rc = tgt->end_design(this);
if (nodes_rc == false)
return -1;
if (tasks_rc == false)
return -2;
if (proc_rc == false)
return -3;
return rc;
}
@@ -472,11 +502,6 @@ void NetESignal::expr_scan(struct expr_scan_t*tgt) const
tgt->expr_signal(this);
}
void NetEBitSel::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_subsignal(this);
}
void NetETernary::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_ternary(this);
@@ -487,12 +512,7 @@ void NetEUnary::expr_scan(struct expr_scan_t*tgt) const
tgt->expr_unary(this);
}
void NetEVariable::expr_scan(struct expr_scan_t*tgt) const
{
tgt->expr_variable(this);
}
bool emit(const Design*des, const char*type)
int emit(const Design*des, const char*type)
{
for (unsigned idx = 0 ; target_table[idx] ; idx += 1) {
const struct target*tgt = target_table[idx];
@@ -503,12 +523,59 @@ bool emit(const Design*des, const char*type)
cerr << "error: Code generator type " << type
<< " not found." << endl;
return false;
return -1;
}
/*
* $Log: emit.cc,v $
* Revision 1.87 2006/06/18 04:15:50 steve
* Add support for system functions in continuous assignments.
*
* Revision 1.86 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.85 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.84 2005/05/24 01:44:27 steve
* Do sign extension of structuran nets.
*
* Revision 1.83 2005/02/08 00:12:36 steve
* Add the NetRepeat node, and code generator support.
*
* Revision 1.82 2005/02/03 04:56:20 steve
* laborate reduction gates into LPM_RED_ nodes.
*
* Revision 1.81 2005/01/24 05:28:30 steve
* Remove the NetEBitSel and combine all bit/part select
* behavior into the NetESelect node and IVL_EX_SELECT
* ivl_target expression type.
*
* Revision 1.80 2005/01/22 01:06:55 steve
* Change case compare from logic to an LPM node.
*
* Revision 1.79 2004/12/29 23:55:43 steve
* Unify elaboration of l-values for all proceedural assignments,
* including assing, cassign and force.
*
* Generate NetConcat devices for gate outputs that feed into a
* vector results. Use this to hande gate arrays. Also let gate
* arrays handle vectors of gates when the outputs allow for it.
*
* Revision 1.78 2004/12/11 02:31:26 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.77 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.76 2004/05/31 23:34:37 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.75 2003/09/13 01:30:07 steve
* Missing case warnings.
*
@@ -526,131 +593,5 @@ bool emit(const Design*des, const char*type)
* Revision 1.71 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.70 2002/11/03 20:36:10 steve
* Error message for mising code generator type.
*
* Revision 1.69 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.68 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.67 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.66 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.65 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.64 2002/01/19 19:02:08 steve
* Pass back target errors processing conditionals.
*
* Revision 1.63 2001/10/19 21:53:24 steve
* Support multiple root modules (Philip Blundell)
*
* Revision 1.62 2001/08/25 23:50:02 steve
* Change the NetAssign_ class to refer to the signal
* instead of link into the netlist. This is faster
* and uses less space. Make the NetAssignNB carry
* the delays instead of the NetAssign_ lval objects.
*
* Change the vvp code generator to support multiple
* l-values, i.e. concatenations of part selects.
*
* Revision 1.61 2001/07/27 04:51:44 steve
* Handle part select expressions as variants of
* NetESignal/IVL_EX_SIGNAL objects, instead of
* creating new and useless temporary signals.
*
* Revision 1.60 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.59 2001/04/22 23:09:46 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.58 2001/04/06 02:28:02 steve
* Generate vvp code for functions with ports.
*
* Revision 1.57 2001/04/02 02:28:12 steve
* Generate code for task calls.
*
* Revision 1.56 2001/03/27 03:31:06 steve
* Support error code from target_t::end_design method.
*
* Revision 1.55 2000/11/04 01:54:01 steve
* Modifications in support of gcc 2.96
*
* Revision 1.54 2000/09/26 01:35:42 steve
* Remove the obsolete NetEIdent class.
*
* Revision 1.53 2000/09/17 21:26:15 steve
* Add support for modulus (Eric Aardoom)
*
* Revision 1.52 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.51 2000/08/14 04:39:56 steve
* add th t-dll functions for net_const, net_bufz and processes.
*
* Revision 1.50 2000/08/09 03:43:45 steve
* Move all file manipulation out of target class.
*
* Revision 1.49 2000/08/08 01:50:42 steve
* target methods need not take a file stream.
*
* Revision 1.48 2000/07/30 18:25:43 steve
* Rearrange task and function elaboration so that the
* NetTaskDef and NetFuncDef functions are created during
* signal enaboration, and carry these objects in the
* NetScope class instead of the extra, useless map in
* the Design class.
*
* Revision 1.47 2000/07/29 16:21:08 steve
* Report code generation errors through proc_delay.
*
* Revision 1.46 2000/07/27 05:13:44 steve
* Support elaboration of disable statements.
*
* Revision 1.45 2000/05/11 23:37:27 steve
* Add support for procedural continuous assignment.
*
* Revision 1.44 2000/05/04 03:37:58 steve
* Add infrastructure for system functions, move
* $time to that structure and add $random.
*
* Revision 1.43 2000/05/02 03:13:31 steve
* Move memories to the NetScope object.
*
* Revision 1.42 2000/05/02 00:58:12 steve
* Move signal tables to the NetScope class.
*
* Revision 1.41 2000/04/23 03:45:24 steve
* Add support for the procedural release statement.
*
* Revision 1.40 2000/04/22 04:20:19 steve
* Add support for force assignment.
*
* Revision 1.39 2000/04/12 04:23:58 steve
* Named events really should be expressed with PEIdent
* objects in the pform,
*
* Handle named events within the mix of net events
* and edges. As a unified lot they get caught together.
* wait statements are broken into more complex statements
* that include a conditional.
*
* Do not generate NetPEvent or NetNEvent objects in
* elaboration. NetEvent, NetEvWait and NetEvProbe
* take over those functions in the netlist.
*/
+68 -11
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval.cc,v 1.36 2003/06/21 01:21:43 steve Exp $"
#ident "$Id: eval.cc,v 1.43 2006/08/08 05:11:37 steve Exp $"
#endif
# include "config.h"
@@ -26,14 +26,15 @@
# include "PExpr.h"
# include "netlist.h"
# include "netmisc.h"
# include "compiler.h"
verinum* PExpr::eval_const(const Design*, const NetScope*) const
verinum* PExpr::eval_const(const Design*, NetScope*) const
{
return 0;
}
verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
verinum* PEBinary::eval_const(const Design*des, NetScope*scope) const
{
verinum*l = left_->eval_const(des, scope);
if (l == 0) return 0;
@@ -142,16 +143,51 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
delete r;
return res;
}
verinum* PEConcat::eval_const(const Design*des, NetScope*scope) const
{
verinum*accum = parms_[0]->eval_const(des, scope);
if (accum == 0)
return 0;
for (unsigned idx = 1 ; idx < parms_.count() ; idx += 1) {
verinum*tmp = parms_[idx]->eval_const(des, scope);
if (tmp == 0) {
delete accum;
return 0;
}
assert(tmp);
*accum = concat(*accum, *tmp);
delete tmp;
}
return accum;
}
/*
* Evaluate an identifier as a constant expression. This is only
* possible if the identifier is that of a parameter.
*/
verinum* PEIdent::eval_const(const Design*des, const NetScope*scope) const
verinum* PEIdent::eval_const(const Design*des, NetScope*scope) const
{
assert(scope);
const NetExpr*expr = des->find_parameter(scope, path_);
NetNet*net;
NetMemory*mem;
NetEvent*eve;
const NetExpr*expr;
// Handle the special case that this ident is a genvar
// variable name. In that case, the genvar meaning preempts
// everything and we just return that value immediately.
if (scope->genvar_tmp
&& strcmp(path_.peek_tail_name(),scope->genvar_tmp) == 0) {
return new verinum(scope->genvar_tmp_val);
}
NetScope*found_in = symbol_search(des, scope, path_,
net, mem, expr, eve);
if (expr == 0)
return 0;
@@ -173,23 +209,23 @@ verinum* PEIdent::eval_const(const Design*des, const NetScope*scope) const
return new verinum(eval->value());
}
verinum* PEFNumber::eval_const(const Design*, const NetScope*) const
verinum* PEFNumber::eval_const(const Design*, NetScope*) const
{
long val = value_->as_long();
return new verinum(val);
}
verinum* PENumber::eval_const(const Design*, const NetScope*) const
verinum* PENumber::eval_const(const Design*, NetScope*) const
{
return new verinum(value());
}
verinum* PEString::eval_const(const Design*, const NetScope*) const
verinum* PEString::eval_const(const Design*, NetScope*) const
{
return new verinum(string(text_));
}
verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
verinum* PETernary::eval_const(const Design*des, NetScope*scope) const
{
verinum*test = expr_->eval_const(des, scope);
if (test == 0)
@@ -209,7 +245,7 @@ verinum* PETernary::eval_const(const Design*des, const NetScope*scope) const
}
}
verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
verinum* PEUnary::eval_const(const Design*des, NetScope*scope) const
{
verinum*val = expr_->eval_const(des, scope);
if (val == 0)
@@ -223,7 +259,7 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
/* We need to expand the value a bit if we are
taking the 2's complement so that we are
guaranteed to not overflow. */
verinum tmp (0UL, val->len()+1);
verinum tmp ((uint64_t)0, val->len()+1);
for (unsigned idx = 0 ; idx < val->len() ; idx += 1)
tmp.set(idx, val->get(idx));
@@ -240,6 +276,27 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
/*
* $Log: eval.cc,v $
* Revision 1.43 2006/08/08 05:11:37 steve
* Handle 64bit delay constants.
*
* Revision 1.42 2006/05/19 04:07:24 steve
* eval_const is not strict.
*
* Revision 1.41 2006/05/17 16:49:30 steve
* Error message if concat expression cannot evaluate.
*
* Revision 1.40 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.39 2005/12/07 04:04:23 steve
* Allow constant concat expressions.
*
* Revision 1.38 2005/11/27 17:01:57 steve
* Fix for stubborn compiler.
*
* Revision 1.37 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.36 2003/06/21 01:21:43 steve
* Harmless fixup of warnings.
*
+11 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2004 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval_attrib.cc,v 1.6 2003/01/27 05:09:17 steve Exp $"
#ident "$Id: eval_attrib.cc,v 1.8 2005/11/27 17:01:57 steve Exp $"
#endif
# include "config.h"
@@ -33,10 +33,10 @@
* for passing to netlist devices.
*/
attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
unsigned&natt,
const Design*des,
const NetScope*scope)
NetScope*scope)
{
natt = att.size();
if (natt == 0)
@@ -46,7 +46,7 @@ attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
unsigned idx = 0;
typedef map<string,PExpr*>::const_iterator iter_t;
typedef map<perm_string,PExpr*>::const_iterator iter_t;
for (iter_t cur = att.begin() ; cur != att.end() ; cur ++, idx++) {
table[idx].key = (*cur).first;
PExpr*exp = (*cur).second;
@@ -74,6 +74,12 @@ attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
/*
* $Log: eval_attrib.cc,v $
* Revision 1.8 2005/11/27 17:01:57 steve
* Fix for stubborn compiler.
*
* Revision 1.7 2004/02/20 18:53:35 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.6 2003/01/27 05:09:17 steve
* Spelling fixes.
*
+304 -122
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval_tree.cc,v 1.59 2003/10/31 02:47:11 steve Exp $"
#ident "$Id: eval_tree.cc,v 1.69 2006/07/31 03:50:17 steve Exp $"
#endif
# include "config.h"
@@ -55,26 +55,64 @@ NetEConst* NetEBAdd::eval_tree()
{
eval_sub_tree_();
NetEConst*lc = dynamic_cast<NetEConst*>(left_);
if (lc == 0) return 0;
NetEConst*rc = dynamic_cast<NetEConst*>(right_);
if (rc == 0) return 0;
verinum lval = lc->value();
verinum rval = rc->value();
/* If both operands are constant, then replace the entire
expression with a constant value. */
if (lc != 0 && rc != 0) {
verinum lval = lc->value();
verinum rval = rc->value();
verinum val;
switch (op_) {
case '+':
val = lval + rval;
break;
case '-':
val = lval - rval;
break;
default:
verinum val;
switch (op_) {
case '+':
val = lval + rval;
break;
case '-':
val = lval - rval;
break;
default:
return 0;
}
return new NetEConst(val);
}
/* Try to combine a right constant value with the right
constant value of a sub-expression add. For example, the
expression (a + 2) - 1 can be rewritten as a + 1. */
NetEBAdd*se = dynamic_cast<NetEBAdd*>(left_);
lc = se? dynamic_cast<NetEConst*>(se->right_) : 0;
if (lc != 0 && rc != 0) {
assert(se != 0);
verinum lval = lc->value();
verinum rval = rc->value();
verinum val;
if (op_ == se->op_) {
/* (a + lval) + rval --> a + (rval+lval) */
/* (a - lval) - rval --> a - (rval+lval) */
val = rval + lval;
} else {
/* (a - lval) + rval --> a + (rval-lval) */
/* (a + lval) - rval --> a - (rval-lval) */
val = rval - lval;
}
NetEConst*tmp = new NetEConst(val);
left_ = se->left_->dup_expr();
delete se;
delete right_;
right_ = tmp;
/* We've changed the subexpression, but the result is
still not constant, so return nil here anyhow. */
return 0;
}
return new NetEConst(val);
/* Nothing more to be done, the value is not constant. */
return 0;
}
NetEConst* NetEBBits::eval_tree()
@@ -175,43 +213,6 @@ NetEConst* NetEBBits::eval_tree()
return new NetEConst(res);
}
NetEConst* NetEBComp::eval_eqeq_()
{
NetEConst*l = dynamic_cast<NetEConst*>(left_);
if (l == 0) return 0;
NetEConst*r = dynamic_cast<NetEConst*>(right_);
if (r == 0) return 0;
const verinum&lv = l->value();
const verinum&rv = r->value();
unsigned s_len = lv.len();
if (rv.len() < s_len) s_len = rv.len();
verinum result(verinum::V1, 1);
for (unsigned idx = 0 ; idx < s_len; idx += 1) {
if (lv[idx] != rv[idx])
result = verinum::V0;
}
// If one operand was wider than the other, check that the
// remaining bits are all zero
if (lv.len() > s_len) {
for (unsigned idx = s_len; idx < lv.len(); idx += 1) {
if (lv[idx] != 0)
result = verinum::V0;
}
}
if (rv.len() > s_len) {
for (unsigned idx = s_len; idx < rv.len(); idx += 1) {
if (rv[idx] != 0)
result = verinum::V0;
}
}
return new NetEConst(result);
}
NetEConst* NetEBComp::eval_less_()
{
@@ -224,20 +225,27 @@ NetEConst* NetEBComp::eval_less_()
return new NetEConst(result);
}
/* Detect the case where the right side is greater that or
/* Detect the case where the right side is greater than or
equal to the largest value the left side can possibly
have. */
assert(left_->expr_width() > 0);
verinum lv (verinum::V1, left_->expr_width());
if (lv < rv) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
have. Use the width of the left expression as all 1's to
calculate the maximum possible width for the left_
expression. This test only works of the compare is
unsigned. */
if (! (rv.has_sign() || left_->has_sign())) {
assert(left_->expr_width() > 0);
verinum lv (verinum::V1, left_->expr_width());
if (lv < rv) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
}
/* Now go on to the normal test of the values. */
NetEConst*l = dynamic_cast<NetEConst*>(left_);
if (l == 0) return 0;
lv = l->value();
verinum lv = l->value();
if (! lv.is_defined()) {
verinum result(verinum::Vx, 1);
return new NetEConst(result);
@@ -266,7 +274,7 @@ NetEConst* NetEBComp::eval_leeq_real_()
double lv, rv;
switch (left_->expr_type()) {
case ET_REAL:
case IVL_VT_REAL:
rtmp = dynamic_cast<NetECReal*> (left_);
if (rtmp == 0)
return 0;
@@ -274,7 +282,7 @@ NetEConst* NetEBComp::eval_leeq_real_()
lv = rtmp->value().as_double();
break;
case ET_VECTOR:
case IVL_VT_LOGIC:
vtmp = dynamic_cast<NetEConst*> (left_);
if (vtmp == 0)
return 0;
@@ -288,7 +296,7 @@ NetEConst* NetEBComp::eval_leeq_real_()
switch (right_->expr_type()) {
case ET_REAL:
case IVL_VT_REAL:
rtmp = dynamic_cast<NetECReal*> (right_);
if (rtmp == 0)
return 0;
@@ -296,7 +304,7 @@ NetEConst* NetEBComp::eval_leeq_real_()
rv = rtmp->value().as_double();
break;
case ET_VECTOR:
case IVL_VT_LOGIC:
vtmp = dynamic_cast<NetEConst*> (right_);
if (vtmp == 0)
return 0;
@@ -317,9 +325,9 @@ NetEConst* NetEBComp::eval_leeq_real_()
NetEConst* NetEBComp::eval_leeq_()
{
if (right_->expr_type() == ET_REAL)
if (right_->expr_type() == IVL_VT_REAL)
return eval_leeq_real_();
if (left_->expr_type() == ET_REAL)
if (left_->expr_type() == IVL_VT_REAL)
return eval_leeq_real_();
NetEConst*r = dynamic_cast<NetEConst*>(right_);
@@ -374,8 +382,8 @@ NetEConst* NetEBComp::eval_leeq_()
NetEConst* NetEBComp::eval_gt_()
{
if ((left_->expr_type() == NetExpr::ET_REAL)
&& (right_->expr_type() == NetExpr::ET_REAL)) {
if ((left_->expr_type() == IVL_VT_REAL)
&& (right_->expr_type() == IVL_VT_REAL)) {
NetECReal*tmpl = dynamic_cast<NetECReal*>(left_);
if (tmpl == 0)
@@ -413,7 +421,7 @@ NetEConst* NetEBComp::eval_gt_()
}
/* Compare with a real value. Do it as double precision. */
if (right_->expr_type() == NetExpr::ET_REAL) {
if (right_->expr_type() == IVL_VT_REAL) {
NetECReal*tmp = dynamic_cast<NetECReal*>(right_);
if (tmp == 0)
return 0;
@@ -450,8 +458,8 @@ NetEConst* NetEBComp::eval_gt_()
NetEConst* NetEBComp::eval_gteq_()
{
if ((left_->expr_type() == NetExpr::ET_REAL)
&& (right_->expr_type() == NetExpr::ET_REAL)) {
if ((left_->expr_type() == IVL_VT_REAL)
&& (right_->expr_type() == IVL_VT_REAL)) {
NetECReal*tmpl = dynamic_cast<NetECReal*>(left_);
if (tmpl == 0)
@@ -479,7 +487,7 @@ NetEConst* NetEBComp::eval_gteq_()
/* Detect the case where the left side is greater than the
largest value the right side can possibly have. */
if (right_->expr_type() == NetExpr::ET_VECTOR) {
if (right_->expr_type() == IVL_VT_LOGIC) {
assert(right_->expr_width() > 0);
verinum rv (verinum::V1, right_->expr_width());
if (lv >= rv) {
@@ -489,7 +497,7 @@ NetEConst* NetEBComp::eval_gteq_()
}
/* Compare with a real value. Do it as double precision. */
if (right_->expr_type() == NetExpr::ET_REAL) {
if (right_->expr_type() == IVL_VT_REAL) {
NetECReal*tmp = dynamic_cast<NetECReal*>(right_);
if (tmp == 0)
return 0;
@@ -510,21 +518,25 @@ NetEConst* NetEBComp::eval_gteq_()
return new NetEConst(result);
}
if (lv.has_sign() && rv.has_sign() && (lv.as_long() >= rv.as_long())) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
if (lv.has_sign() && rv.has_sign()) {
if (lv.as_ulong() >= rv.as_ulong()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
if (lv.as_long() >= rv.as_long()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
} else {
if (lv.as_ulong() >= rv.as_ulong()) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
}
verinum result(verinum::V0, 1);
return new NetEConst(result);
}
NetEConst* NetEBComp::eval_neeq_()
NetEConst* NetEBComp::eval_eqeq_(bool ne_flag)
{
NetEConst*l = dynamic_cast<NetEConst*>(left_);
if (l == 0) return 0;
@@ -534,7 +546,10 @@ NetEConst* NetEBComp::eval_neeq_()
const verinum&lv = l->value();
const verinum&rv = r->value();
verinum::V res = verinum::V0;
const verinum::V eq_res = ne_flag? verinum::V0 : verinum::V1;
const verinum::V ne_res = ne_flag? verinum::V1 : verinum::V0;
verinum::V res = eq_res;
unsigned top = lv.len();
if (rv.len() < top)
top = rv.len();
@@ -567,10 +582,18 @@ NetEConst* NetEBComp::eval_neeq_()
break;
if (rv.get(idx) != lv.get(idx))
res = verinum::V1;
res = ne_res;
}
if (res != verinum::Vx) {
verinum::V lpad = verinum::V0;
verinum::V rpad = verinum::V0;
if (lv.has_sign() && lv.get(lv.len()-1) == verinum::V1)
lpad = verinum::V1;
if (rv.has_sign() && rv.get(rv.len()-1) == verinum::V1)
rpad = verinum::V1;
for (unsigned idx = top ; idx < lv.len() ; idx += 1)
switch (lv.get(idx)) {
@@ -579,9 +602,14 @@ NetEConst* NetEBComp::eval_neeq_()
res = verinum::Vx;
break;
case verinum::V0:
if (res != verinum::Vx && rpad != verinum::V0)
res = ne_res;
break;
case verinum::V1:
if (res != verinum::Vx)
res = verinum::V1;
if (res != verinum::Vx && rpad != verinum::V1)
res = ne_res;
break;
default:
@@ -596,9 +624,14 @@ NetEConst* NetEBComp::eval_neeq_()
res = verinum::Vx;
break;
case verinum::V0:
if (res != verinum::Vx && lpad != verinum::V0)
res = ne_res;
break;
case verinum::V1:
if (res != verinum::Vx)
res = verinum::V1;
if (res != verinum::Vx && lpad != verinum::V1)
res = ne_res;
break;
default:
@@ -666,7 +699,7 @@ NetEConst* NetEBComp::eval_tree()
return eval_eqeqeq_();
case 'e': // Equality (==)
return eval_eqeq_();
return eval_eqeq_(false);
case 'G': // >=
return eval_gteq_();
@@ -678,7 +711,7 @@ NetEConst* NetEBComp::eval_tree()
return eval_neeqeq_();
case 'n': // not-equal (!=)
return eval_neeq_();
return eval_eqeq_(true);
case '<': // Less than
return eval_less_();
@@ -699,7 +732,7 @@ NetExpr* NetEBDiv::eval_tree()
{
eval_sub_tree_();
if (expr_type() == NetExpr::ET_REAL) {
if (expr_type() == IVL_VT_REAL) {
NetECReal*lc = dynamic_cast<NetECReal*>(left_);
if (lc == 0) return 0;
@@ -744,7 +777,7 @@ NetExpr* NetEBDiv::eval_tree()
} else {
assert(expr_type() == NetExpr::ET_VECTOR);
assert(expr_type() == IVL_VT_LOGIC);
NetEConst*lc = dynamic_cast<NetEConst*>(left_);
if (lc == 0) return 0;
NetEConst*rc = dynamic_cast<NetEConst*>(right_);
@@ -837,14 +870,15 @@ NetExpr* NetEBMult::eval_tree_real_()
verireal rval;
switch (left_->expr_type()) {
case ET_REAL: {
case IVL_VT_REAL: {
NetECReal*lc = dynamic_cast<NetECReal*> (left_);
if (lc == 0) return 0;
lval = lc->value();
break;
}
case ET_VECTOR: {
case IVL_VT_BOOL:
case IVL_VT_LOGIC: {
NetEConst*lc = dynamic_cast<NetEConst*>(left_);
if (lc == 0) return 0;
verinum tmp = lc->value();
@@ -857,14 +891,15 @@ NetExpr* NetEBMult::eval_tree_real_()
}
switch (right_->expr_type()) {
case ET_REAL: {
case IVL_VT_REAL: {
NetECReal*rc = dynamic_cast<NetECReal*> (right_);
if (rc == 0) return 0;
rval = rc->value();
break;
}
case ET_VECTOR: {
case IVL_VT_BOOL:
case IVL_VT_LOGIC: {
NetEConst*rc = dynamic_cast<NetEConst*>(right_);
if (rc == 0) return 0;
verinum tmp = rc->value();
@@ -886,10 +921,10 @@ NetExpr* NetEBMult::eval_tree()
{
eval_sub_tree_();
if (expr_type() == ET_REAL)
if (expr_type() == IVL_VT_REAL)
return eval_tree_real_();
assert(expr_type() == ET_VECTOR);
assert(expr_type() == IVL_VT_LOGIC);
NetEConst*lc = dynamic_cast<NetEConst*>(left_);
if (lc == 0) return 0;
@@ -902,6 +937,80 @@ NetExpr* NetEBMult::eval_tree()
return new NetEConst(lval * rval);
}
NetExpr* NetEBPow::eval_tree_real_()
{
verireal lval;
verireal rval;
switch (left_->expr_type()) {
case IVL_VT_REAL: {
NetECReal*lc = dynamic_cast<NetECReal*> (left_);
if (lc == 0) return 0;
lval = lc->value();
break;
}
case IVL_VT_BOOL:
case IVL_VT_LOGIC: {
NetEConst*lc = dynamic_cast<NetEConst*>(left_);
if (lc == 0) return 0;
verinum tmp = lc->value();
lval = verireal(tmp.as_long());
break;
}
default:
assert(0);
}
switch (right_->expr_type()) {
case IVL_VT_REAL: {
NetECReal*rc = dynamic_cast<NetECReal*> (right_);
if (rc == 0) return 0;
rval = rc->value();
break;
}
case IVL_VT_BOOL:
case IVL_VT_LOGIC: {
NetEConst*rc = dynamic_cast<NetEConst*>(right_);
if (rc == 0) return 0;
verinum tmp = rc->value();
rval = verireal(tmp.as_long());
break;
}
default:
assert(0);
}
NetECReal*res = new NetECReal( pow(lval,rval) );
res->set_line(*this);
return res;
}
NetExpr* NetEBPow::eval_tree()
{
eval_sub_tree_();
if (expr_type() == IVL_VT_REAL)
return eval_tree_real_();
assert(expr_type() == IVL_VT_LOGIC);
NetEConst*lc = dynamic_cast<NetEConst*>(left_);
if (lc == 0) return 0;
NetEConst*rc = dynamic_cast<NetEConst*>(right_);
if (rc == 0) return 0;
verinum lval = lc->value();
verinum rval = rc->value();
return new NetEConst( pow(lval,rval) );
}
/*
* Evaluate the shift operator if possible. For this to work, both
* operands must be constant.
@@ -1124,8 +1233,9 @@ NetExpr* NetEParam::eval_tree()
return 0;
assert(scope_);
assert(name_.peek_name(1) == 0);
const NetExpr*expr = scope_->get_parameter(name_.peek_name(0));
const NetExpr*expr_msb;
const NetExpr*expr_lsb;
const NetExpr*expr = scope_->get_parameter(name_, expr_msb, expr_lsb);
if (expr == 0) {
cerr << get_line() << ": internal error: Unable to match "
<< "parameter " << name_ << " in scope "
@@ -1142,8 +1252,7 @@ NetExpr* NetEParam::eval_tree()
// return the constant value.
if (NetEConst*tmp = dynamic_cast<NetEConst*>(nexpr)) {
verinum val = tmp->value();
const char*name = lex_strings.add(name_.peek_name(0));
NetEConstParam*ptmp = new NetEConstParam(scope_, name, val);
NetEConstParam*ptmp = new NetEConstParam(scope_, name_, val);
ptmp->set_line(*this);
delete nexpr;
return ptmp;
@@ -1151,8 +1260,7 @@ NetExpr* NetEParam::eval_tree()
if (NetECReal*tmp = dynamic_cast<NetECReal*>(nexpr)) {
verireal val = tmp->value();
const char*name = lex_strings.add(name_.peek_name(0));
NetECRealParam*ptmp = new NetECRealParam(scope_, name, val);
NetECRealParam*ptmp = new NetECRealParam(scope_, name_, val);
ptmp->set_line(*this);
delete nexpr;
return ptmp;
@@ -1171,14 +1279,15 @@ NetExpr* NetEParam::eval_tree()
// The result can be saved as the value of the parameter for
// future reference, and return a copy to the caller.
scope_->replace_parameter(name_.peek_name(0), res);
scope_->replace_parameter(name_, res);
/* Return as a result a NetEConstParam or NetECRealParam
object, depending on the type of the expression. */
switch (res->expr_type()) {
case NetExpr::ET_VECTOR:
case IVL_VT_BOOL:
case IVL_VT_LOGIC:
{ NetEConst*tmp = dynamic_cast<NetEConst*>(res);
if (tmp == 0) {
cerr << get_line() << ": internal error: parameter "
@@ -1190,13 +1299,12 @@ NetExpr* NetEParam::eval_tree()
assert(tmp);
verinum val = tmp->value();
const char*name = lex_strings.add(name_.peek_name(0));
NetEConstParam*ptmp = new NetEConstParam(scope_, name, val);
NetEConstParam*ptmp = new NetEConstParam(scope_, name_, val);
return ptmp;
}
case NetExpr::ET_REAL:
case IVL_VT_REAL:
{ NetECReal*tmp = dynamic_cast<NetECReal*>(res);
if (tmp == 0) {
cerr << get_line() << ": internal error: parameter "
@@ -1208,8 +1316,7 @@ NetExpr* NetEParam::eval_tree()
assert(tmp);
verireal val = tmp->value();
const char*name = lex_strings.add(name_.peek_name(0));
NetECRealParam*ptmp = new NetECRealParam(scope_, name, val);
NetECRealParam*ptmp = new NetECRealParam(scope_, name_, val);
return ptmp;
}
@@ -1256,7 +1363,7 @@ NetEConst* NetESelect::eval_tree()
for (unsigned long idx = 0 ; idx < expr_width() ; idx += 1) {
if ((bval >= 0) && ((unsigned long) bval < eval.len()))
oval.set(idx, eval.get(bval));
else
else
oval.set(idx, verinum::Vx);
bval += 1;
@@ -1310,18 +1417,50 @@ NetExpr* NetETernary::eval_tree()
if (c == 0)
return 0;
/* Check the boolean value of the constant condition
expression. Note that the X case is handled explicitly, so
we must differentiate. */
verinum cond_value = c->value();
bool true_flag = false;
bool x_flag = false;
for (unsigned idx = 0 ; idx < cond_value.len() ; idx += 1) {
switch (cond_value.get(idx)) {
case verinum::V1:
true_flag = true;
break;
case verinum::V0:
break;
default:
x_flag = true;
}
}
/* If the condition is 1 or 0, return the true or false
expression. Try to evaluate the expression down as far as
we can. */
if (c->value().get(0) == verinum::V1)
if (true_flag) {
if (debug_eval_tree) {
cerr << get_line() << ": debug: Evaluate ternary with "
<< "constant condition value: " << c->value() << endl;
cerr << get_line() << ": : Selecting true case: "
<< *true_val_ << endl;
}
return true_val_->dup_expr();
}
if (c->value().get(0) == verinum::V0)
if (! x_flag) {
if (debug_eval_tree) {
cerr << get_line() << ": debug: Evaluate ternary with "
<< "constant condition value: " << c->value() << endl;
cerr << get_line() << ": : Selecting false case: "
<< *true_val_ << endl;
}
return false_val_->dup_expr();
}
/* Here we have a more complex case. We need to evaluate both
expressions down to constants then compare the values to
@@ -1337,13 +1476,15 @@ NetExpr* NetETernary::eval_tree()
return 0;
unsigned size = t->expr_width();
assert(size == f->expr_width());
unsigned tsize = t->expr_width();
unsigned fsize = f->expr_width();
/* Size of the result is the size of the widest operand. */
unsigned rsize = tsize > fsize? tsize : fsize;
verinum val (verinum::V0, size);
for (unsigned idx = 0 ; idx < size ; idx += 1) {
verinum::V tv = t->value().get(idx);
verinum::V fv = f->value().get(idx);
verinum val (verinum::V0, rsize);
for (unsigned idx = 0 ; idx < rsize ; idx += 1) {
verinum::V tv = idx < tsize? t->value().get(idx) : verinum::V0;
verinum::V fv = idx < rsize? f->value().get(idx) : verinum::V0;
if (tv == fv)
val.set(idx, tv);
@@ -1351,6 +1492,13 @@ NetExpr* NetETernary::eval_tree()
val.set(idx, verinum::Vx);
}
if (debug_eval_tree) {
cerr << get_line() << ": debug: Evaluate ternary with "
<< "constant condition value: " << c->value() << endl;
cerr << get_line() << ": : Blending cases to get "
<< val << endl;
}
NetEConst*rc = new NetEConst(val);
rc->set_line(*this);
return rc;
@@ -1387,7 +1535,7 @@ NetEConst* NetEUnary::eval_tree()
case '-': {
if (val.is_defined()) {
verinum tmp (verinum::V0, val.len());
tmp.has_sign(val.has_sign());
val = tmp - val;
@@ -1515,6 +1663,40 @@ NetEConst* NetEUReduce::eval_tree()
/*
* $Log: eval_tree.cc,v $
* Revision 1.69 2006/07/31 03:50:17 steve
* Add support for power in constant expressions.
*
* Revision 1.68 2006/03/18 22:52:27 steve
* Properly handle signedness in compare.
*
* Revision 1.67 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.66 2005/11/10 13:28:12 steve
* Reorganize signal part select handling, and add support for
* indexed part selects.
*
* Expand expression constant propagation to eliminate extra
* sums in certain cases.
*
* Revision 1.65 2005/09/14 02:53:14 steve
* Support bool expressions and compares handle them optimally.
*
* Revision 1.64 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.63 2005/06/17 05:05:53 steve
* Watch out for signed constants in magnitude compare.
*
* Revision 1.62 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.61 2004/09/10 23:51:42 steve
* Fix the evaluation of constant ternary expressions.
*
* Revision 1.60 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.59 2003/10/31 02:47:11 steve
* NetEUReduce has its own dup_expr method.
*
+8 -8
View File
@@ -218,11 +218,11 @@ output [1:48] k;
wire [1:56] YY;
assign YY[1:28]=c; assign YY[29:56]=d;
assign k[1]=YY[14]; assign k[2]=YY[17]; assign k[3]=YY[11]; assign k[4]=YY[24]; assign k[5]=YY[1]; assign k[6]=YY[5];
assign k[7]=YY[3]; assign k[8]=YY[28]; assign k[9]=YY[15]; assign k[10]=YY[6]; assign k[11]=YY[21]; assign k[12]=YY[10];
assign k[13]=YY[23]; assign k[14]=YY[19]; assign k[15]=YY[12]; assign k[16]=YY[4]; assign k[17]=YY[26]; assign k[18]=YY[8];
assign k[19]=YY[16]; assign k[20]=YY[7]; assign k[21]=YY[27]; assign k[22]=YY[20]; assign k[23]=YY[13]; assign k[24]=YY[2];
assign k[13]=YY[23]; assign k[14]=YY[19]; assign k[15]=YY[12]; assign k[16]=YY[4]; assign k[17]=YY[26]; assign k[18]=YY[8];
assign k[19]=YY[16]; assign k[20]=YY[7]; assign k[21]=YY[27]; assign k[22]=YY[20]; assign k[23]=YY[13]; assign k[24]=YY[2];
assign k[25]=YY[41]; assign k[26]=YY[52]; assign k[27]=YY[31]; assign k[28]=YY[37]; assign k[29]=YY[47]; assign k[30]=YY[55];
assign k[31]=YY[30]; assign k[32]=YY[40]; assign k[33]=YY[51]; assign k[34]=YY[45]; assign k[35]=YY[33]; assign k[36]=YY[48];
assign k[37]=YY[44]; assign k[38]=YY[49]; assign k[39]=YY[39]; assign k[40]=YY[56]; assign k[41]=YY[34]; assign k[42]=YY[53];
@@ -252,13 +252,13 @@ input [1:64] key;
output [1:48] k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x;
wire [1:28] c0x,c1x,c2x,c3x,c4x,c5x,c6x,c7x,c8x,c9x,c10x,c11x,c12x,c13x,c14x,c15x,c16x;
wire [1:28] d0x,d1x,d2x,d3x,d4x,d5x,d6x,d7x,d8x,d9x,d10x,d11x,d12x,d13x,d14x,d15x,d16x;
pc1 pc1(key, c0x, d0x);
rol1 rc1(c1x, c0x); rol1 rd1(d1x, d0x);
rol1 rc2(c2x, c1x); rol1 rd2(d2x, d1x);
rol2 rc3(c3x, c2x); rol2 rd3(d3x, d2x);
rol2 rc4(c4x, c3x); rol2 rd4(d4x, d3x);
rol2 rc4(c4x, c3x); rol2 rd4(d4x, d3x);
rol2 rc5(c5x, c4x); rol2 rd5(d5x, d4x);
rol2 rc6(c6x, c5x); rol2 rd6(d6x, d5x);
rol2 rc7(c7x, c6x); rol2 rd7(d7x, d6x);
@@ -272,7 +272,7 @@ rol2 rce(c14x, c13x); rol2 rde(d14x, d13x);
rol2 rcf(c15x, c14x); rol2 rdf(d15x, d14x);
rol1 rcg(c16x, c15x); rol1 rdg(d16x, d15x);
pc2 pc2x1(c1x,d1x,k1x);
pc2 pc2x2(c2x,d2x,k2x);
pc2 pc2x3(c3x,d3x,k3x);
@@ -913,7 +913,7 @@ assign l0x[17]=pt[62]; assign l0x[18]=pt[54]; assign l0x[19]=pt[46
assign l0x[21]=pt[30]; assign l0x[22]=pt[22]; assign l0x[23]=pt[14]; assign l0x[24]=pt[6];
assign l0x[25]=pt[64]; assign l0x[26]=pt[56]; assign l0x[27]=pt[48]; assign l0x[28]=pt[40];
assign l0x[29]=pt[32]; assign l0x[30]=pt[24]; assign l0x[31]=pt[16]; assign l0x[32]=pt[8];
assign r0x[1]=pt[57]; assign r0x[2]=pt[49]; assign r0x[3]=pt[41]; assign r0x[4]=pt[33];
assign r0x[5]=pt[25]; assign r0x[6]=pt[17]; assign r0x[7]=pt[9]; assign r0x[8]=pt[1];
assign r0x[9]=pt[59]; assign r0x[10]=pt[51]; assign r0x[11]=pt[43]; assign r0x[12]=pt[35];
@@ -935,7 +935,7 @@ assign e[9]=ri[6]; assign e[10]=ri[7]; assign e[11]=ri[8]; assign e[12]=r
assign e[17]=ri[12]; assign e[18]=ri[13]; assign e[19]=ri[12]; assign e[20]=ri[13]; assign e[21]=ri[14]; assign e[22]=ri[15]; assign e[23]=ri[16]; assign e[24]=ri[17];
assign e[25]=ri[16]; assign e[26]=ri[17]; assign e[27]=ri[18]; assign e[28]=ri[19]; assign e[29]=ri[20]; assign e[30]=ri[21]; assign e[31]=ri[20]; assign e[32]=ri[21];
assign e[33]=ri[22]; assign e[34]=ri[23]; assign e[35]=ri[24]; assign e[36]=ri[25]; assign e[37]=ri[24]; assign e[38]=ri[25]; assign e[39]=ri[26]; assign e[40]=ri[27];
assign e[41]=ri[28]; assign e[42]=ri[29]; assign e[43]=ri[28]; assign e[44]=ri[29]; assign e[45]=ri[30]; assign e[46]=ri[31]; assign e[47]=ri[32]; assign e[48]=ri[1];
assign e[41]=ri[28]; assign e[42]=ri[29]; assign e[43]=ri[28]; assign e[44]=ri[29]; assign e[45]=ri[30]; assign e[46]=ri[31]; assign e[47]=ri[32]; assign e[48]=ri[1];
endmodule
+5 -5
View File
@@ -26,21 +26,21 @@
* Compile this program with the command:
*
* iverilog -ohello hello.vl
*
*
* After churning for a little while, the program will create the output
* file "hello" which is compiled, linked and ready to run. Run this
* program like so:
*
*
* vvp hello
*
*
* and the program will print the message to its output. Easy! For
* more on how to make the iverilog command work, see the iverilog
* manual page.
*/
module main();
initial
initial
begin
$display("Hello, World");
$finish ;
+5 -5
View File
@@ -26,21 +26,21 @@
* Compile this program with the command:
*
* iverilog -ohello_vpi hello_vpi.vl
*
*
* After churning for a little while, the program will create the output
* file "hello" which is compiled, linked and ready to run. Run this
* program like so:
*
*
* vvp -M. -mhello_vpi hello_vpi
*
*
* and the program will print the message to its output. Easy! For
* more on how to make the iverilog command work, see the iverilog
* manual page.
*/
module main();
initial
initial
begin
$my_hello;
$finish ;
+11 -11
View File
@@ -20,36 +20,36 @@
/*
* This example program simulates a 16x1 ram, and is used as an
* example for using VCD output and waveform viewers.
*
*
* Like any other Verilog simulation, compile this program with the
* command:
*
*
* iverilog show_vcd.vl
*
*
* This will generate the show_vcd command in the current directory.
* When you run the command, you will see the output from all the
* calls to $display, but also there will be a dump file ``show_vcd.vcd''.
* The name of this file is set by the statement:
*
* $dumpfile("show_vcd.vcd");
*
*
* in the main module. The output file uses the standard VCD file format
* so can be viewed using off-the-shelf waveform viewers. The remaining
* steps describe how to use GTKWave to view the file. If you are using
* a different viewer, see the documentation for that tool.
*
*
* To view the output generated by running show_vcd, start the GTKWave
* viewer with the command:
*
*
* gtkwave show_vcd.vcd
*
*
* The GTKWave program will display its main window, and show in a small
* status box (upper left corner) that it succeeded in loading the dump
* file. However, there are no waveforms displayed yet. Select signals to
* add to the waveform display using the menu selection:
*
* "Search --> Signal Search Tree"
*
*
* This will bring up a dialog box that shows in directory tree format
* the signals of the program. Select the signals you wish to view, and
* click one of the buttons on the bottom of the dialog box to display
@@ -60,7 +60,7 @@
* $dumpvars system tasks. The $dumpfile task tells the simulation where
* to write the VCD output. This task must be called once before the
* $dumpvars task is called.
*
*
* The $dumpvars task tells the simulation what variables to write to
* the VCD output. The first parameter is how far to descend while
* scanning a scope, and the remaining paramters are signals or scope
@@ -77,7 +77,7 @@ module ram16x1 (q, d, a, we, wclk);
input wclk;
reg mem[15:0];
assign q = mem[a];
always @(posedge wclk) if (we) mem[a] = d;
@@ -88,7 +88,7 @@ module main;
reg d;
reg [3:0] a;
reg we, wclk;
ram16x1 r1 (q, d, a, we, wclk);
initial begin
+5 -5
View File
@@ -16,7 +16,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*
* $Id: sqrt.vl,v 1.3 2000/11/04 01:53:24 steve Exp $"
* $Id: sqrt.vl,v 1.4 2004/10/04 01:10:56 steve Exp $"
*/
/*
@@ -97,8 +97,8 @@ module sqrt32(clk, rdy, reset, x, .y(acc));
bitl = 15;
end
endtask
initial clear;
initial clear;
always @(reset or posedge clk)
if (reset)
@@ -121,14 +121,14 @@ module main;
wire rdy;
sqrt32 root(.clk(clk), .rdy(rdy), .reset(reset), .x(value), .y(result));
always #5 clk = ~clk;
always @(posedge rdy) begin
$display("sqrt(%d) --> %d", value, result);
$finish;
end
initial begin
clk = 0;
+1 -1
View File
@@ -73,7 +73,7 @@ module main;
// This can be done to wires and registers, as internally both
// are treated as named signals. It doesn't work (yet) on vectors,
// though, so break out the vectors with scalar assignments.
assign a[0] = a0;
assign a[1] = a1;
assign a[2] = a2;
+2 -2
View File
@@ -28,7 +28,7 @@ module ram16x1 (q, d, a, we, wclk);
input wclk;
reg mem[15:0];
assign q = mem[a];
always @(posedge wclk) if (we) mem[a] = d;
@@ -39,7 +39,7 @@ module main;
reg d;
reg [3:0] a;
reg we, wclk;
ram16x1 r1 (q, d, a, we, wclk);
initial begin
+451 -300
View File
File diff suppressed because it is too large Load Diff
+84
View File
@@ -0,0 +1,84 @@
Icarus Verilog Extensions
Icarus Verilog supports certain extensions to the baseline IEEE1364
standard. Some of these are picked from extended variants of the
language, such as SystemVerilog, and some are expressions of internal
behavior of Icarus Verilog, made available as a tool debugging aid.
* Builtin System Functions
** Extended Verilog Data Types
This feature is turned off if the generation flag "-g" is set to other
then the default "2x". For example, "iverilog -g2x" enables extended
data types, and "iverilog -g2" disables them.
Icarus Verilog adds support for extended data types. This extended
type syntax is based on a proposal by Cadence Design Systems,
originally as an update to the IEEE1364. That original proposal has
apparently been absorbed by the IEEE1800 SystemVerilog
standard. Icarus Verilog currently only takes the new primitive types
from the proposal.
Extended data types separates the concept of net/variable from the
data type. Both nets and variables can declared with any data
type. The primitive types available are:
logic - The familiar 0, 1, x and z, optionally with strength.
bool - Limited to only 0 and 1
real - 64bit real values
Nets with logic type may have multiple drivers with strength, and the
value is resolved the usual way. Only logic values may be driven to
logic nets, so bool values driven onto logic nets are implicitly
converted to logic.
Nets with any other type may not have multiple drivers. The compiler
should detect the multiple drivers and report an error.
- Declarations
The declaration of a net is extended to include the type of the wire,
with the syntax:
wire <type> <wire-assignment-list>... ;
The <type>, if omitted, is taken to be logic. The "wire" can be any of
the net keywords. Wires can be logic, bool, real, or vectors of logic
or bool. Some valid examples:
wire real foo = 1.0;
tri logic bus[31:0];
wire bool addr[23:0];
... and so on.
The declarations of variables is similar. The "reg" keyword is used to
specify that this is a variable. Variables can have the same data
types as nets.
- Ports
Module and task ports in standard verilog are restricted to logic
types. This extension removes that restriction, allowing any type to
pass through the port consistent with the continuous assignment
connectivity that is implied by the type.
- Expressions
Expressions in the face of real values is covered by the baseline
Verilog standard.
The bool type supports the same operators as the logic type, with the
obvious differences imposed by the limited domain.
Comparison operators (not case compare) return logic if either of
their operands is logic. If both are bool or real (including mix of
bool and real) then the result is bool. This is because comparison of
bools and reals always return exactly true or false.
Case comparison returns bool. This differs from baseline Verilog,
which strictly speaking returns a logic, but only 0 or 1 values.
All the arithmetic operators return bool if both of their operands are
bool or real. Otherwise, they return logic.
+42 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2002 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2005 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: functor.cc,v 1.31 2002/08/16 05:18:27 steve Exp $"
#ident "$Id: functor.cc,v 1.35 2005/07/07 16:22:49 steve Exp $"
#endif
# include "config.h"
@@ -59,6 +59,10 @@ void functor_t::lpm_divide(class Design*, class NetDivide*)
{
}
void functor_t::lpm_literal(class Design*, class NetLiteral*)
{
}
void functor_t::lpm_modulo(class Design*, class NetModulo*)
{
}
@@ -79,6 +83,14 @@ void functor_t::lpm_mux(class Design*, class NetMux*)
{
}
void functor_t::sign_extend(class Design*, class NetSignExtend*)
{
}
void functor_t::lpm_ureduce(class Design*, class NetUReduce*)
{
}
void NetScope::run_functor(Design*des, functor_t*fun)
{
@@ -114,7 +126,7 @@ void NetScope::run_functor(Design*des, functor_t*fun)
void Design::functor(functor_t*fun)
{
// Scan the scopes
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); scope++)
(*scope)->run_functor(this, fun);
@@ -186,6 +198,11 @@ void NetFF::functor_node(Design*des, functor_t*fun)
fun->lpm_ff(des, this);
}
void NetLiteral::functor_node(Design*des, functor_t*fun)
{
fun->lpm_literal(des, this);
}
void NetLogic::functor_node(Design*des, functor_t*fun)
{
fun->lpm_logic(des, this);
@@ -206,6 +223,16 @@ void NetMux::functor_node(Design*des, functor_t*fun)
fun->lpm_mux(des, this);
}
void NetSignExtend::functor_node(Design*des, functor_t*fun)
{
fun->sign_extend(des, this);
}
void NetUReduce::functor_node(Design*des, functor_t*fun)
{
fun->lpm_ureduce(des, this);
}
proc_match_t::~proc_match_t()
{
}
@@ -267,6 +294,18 @@ int proc_match_t::event_wait(NetEvWait*)
/*
* $Log: functor.cc,v $
* Revision 1.35 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.34 2005/05/24 01:44:27 steve
* Do sign extension of structuran nets.
*
* Revision 1.33 2005/02/03 04:56:20 steve
* laborate reduction gates into LPM_RED_ nodes.
*
* Revision 1.32 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.31 2002/08/16 05:18:27 steve
* Fix intermix of node functors and node delete.
*
+19 -2
View File
@@ -1,7 +1,7 @@
#ifndef __functor_H
#define __functor_H
/*
* Copyright (c) 1999-2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2005 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: functor.h,v 1.20 2002/08/12 01:34:59 steve Exp $"
#ident "$Id: functor.h,v 1.23 2005/07/07 16:22:49 steve Exp $"
#endif
/*
@@ -63,6 +63,9 @@ struct functor_t {
/* This method is called for each structural constant. */
virtual void lpm_divide(class Design*des, class NetDivide*);
/* Constant literals. */
virtual void lpm_literal(class Design*des, class NetLiteral*);
/* This method is called for each structural constant. */
virtual void lpm_modulo(class Design*des, class NetModulo*);
@@ -77,6 +80,11 @@ struct functor_t {
/* This method is called for each MUX. */
virtual void lpm_mux(class Design*des, class NetMux*);
/* This method is called for each unary reduction gate. */
virtual void lpm_ureduce(class Design*des, class NetUReduce*);
virtual void sign_extend(class Design*des, class NetSignExtend*);
};
struct proc_match_t {
@@ -92,6 +100,15 @@ struct proc_match_t {
/*
* $Log: functor.h,v $
* Revision 1.23 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.22 2005/05/24 01:44:27 steve
* Do sign extension of structuran nets.
*
* Revision 1.21 2005/02/03 04:56:20 steve
* laborate reduction gates into LPM_RED_ nodes.
*
* Revision 1.20 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
+8 -8
View File
@@ -103,7 +103,7 @@ fi
if [ x"$dir_arg" != x ]; then
dst=$src
src=""
if [ -d $dst ]; then
instcmd=:
else
@@ -112,7 +112,7 @@ if [ x"$dir_arg" != x ]; then
else
# Waiting for this to be detected by the "$instcmd $src $dsttmp" command
# might cause directories to be created, which would be especially bad
# might cause directories to be created, which would be especially bad
# if $src (and thus $dsttmp) contains '*'.
if [ -f $src -o -d $src ]
@@ -122,7 +122,7 @@ else
echo "install: $src does not exist"
exit 1
fi
if [ x"$dst" = x ]
then
echo "install: no destination specified"
@@ -150,7 +150,7 @@ dstdir=`echo $dst | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'`
# Skip lots of stat calls in the usual case.
if [ ! -d "$dstdir" ]; then
defaultIFS='
defaultIFS='
'
IFS="${IFS-${defaultIFS}}"
@@ -189,17 +189,17 @@ else
# If we're going to rename the final executable, determine the name now.
if [ x"$transformarg" = x ]
if [ x"$transformarg" = x ]
then
dstfile=`basename $dst`
else
dstfile=`basename $dst $transformbasename |
dstfile=`basename $dst $transformbasename |
sed $transformarg`$transformbasename
fi
# don't allow the sed command to completely eliminate the filename
if [ x"$dstfile" = x ]
if [ x"$dstfile" = x ]
then
dstfile=`basename $dst`
else
@@ -230,7 +230,7 @@ else
# Now rename the file to the real destination.
$doit $rmcmd -f $dstdir/$dstfile &&
$doit $mvcmd $dsttmp $dstdir/$dstfile
$doit $mvcmd $dsttmp $dstdir/$dstfile
fi &&
+2 -2
View File
@@ -1,4 +1,4 @@
.TH iverilog-vpi 1 "$Date: 2003/10/14 00:40:06 $" Version "$Date: 2003/10/14 00:40:06 $"
.TH iverilog-vpi 1 "$Date: 2004/10/04 01:10:53 $" Version "$Date: 2004/10/04 01:10:53 $"
.SH NAME
iverilog-vpi - Compile front end for VPI modules
@@ -118,5 +118,5 @@ iverilog(1), vvp(1),
.nf
Copyright \(co 2002 Stephen Williams
This document can be freely redistributed according to the terms of the
This document can be freely redistributed according to the terms of the
GNU General Public License version 2.0
+10 -4
View File
@@ -17,11 +17,11 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: iverilog-vpi.sh,v 1.13 2003/10/14 18:05:18 steve Exp $"
#ident "$Id: iverilog-vpi.sh,v 1.15 2006/02/21 02:38:44 steve Exp $"
# These are the variables used for compiling files
CC=gcc
CXX=gcc
CXX=g++
CFLAGS="@PIC@ -O -I@INCLUDEDIR@"
# These are used for linking...
@@ -45,6 +45,7 @@ CXSRC=
OBJ=
LIB=
OUT=
INCOPT=
# --
# parse the command line switches. This collects the source files
@@ -62,6 +63,7 @@ do
;;
*.cc) CXSRC="$CXSRC $parm"
LD=$CXX
if [ x$OUT = x ]; then
OUT=`basename $parm .cc`
fi
@@ -80,6 +82,10 @@ do
-l*) LIB="$LIB $parm"
;;
-I*) INCOPT="$INCOPT $parm"
echo "$parm"
;;
-m32) LDFLAGS="-m32 $LDFLAGS32"
CFLAGS="-m32 $CFLAGS"
INSTDIR="$INSTDIR32"
@@ -125,7 +131,7 @@ do
obj=$base".o"
echo "Compiling $src..."
$CC -c -o $obj $CFLAGS $src || compile_errors=`expr $compile_errors + 1`
$CC -c -o $obj $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
OBJ="$OBJ $obj"
done
@@ -135,7 +141,7 @@ do
obj=$base".o"
echo "Compiling $src..."
$CXX -c -o $obj $CFLAGS $src || compile_errors=`expr $compile_errors + 1`
$CXX -c -o $obj $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
OBJ="$OBJ $obj"
done
+1
View File
@@ -62,6 +62,7 @@ ivl_logic_udp
ivl_lpm_aset_value
ivl_lpm_async_clr
ivl_lpm_async_set
ivl_lpm_base
ivl_lpm_basename
ivl_lpm_clk
ivl_lpm_data
+748 -112
View File
File diff suppressed because it is too large Load Diff
+4 -4
View File
@@ -18,7 +18,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.15 2003/09/05 18:04:16 steve Exp $"
#ident "$Id: Makefile.in,v 1.17 2004/10/04 01:10:56 steve Exp $"
#
#
SHELL = /bin/sh
@@ -40,9 +40,9 @@ INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @CPPFLAGS@ @DEFS@
CFLAGS = @CFLAGS@ -I. -I.. -I$(srcdir)/.. -I$(srcdir)
LDFLAGS = @LDFLAGS@
CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
CFLAGS = -Wall @CFLAGS@
LDFLAGS = @LDFLAGS@
all: ivlpp
+4 -4
View File
@@ -1,17 +1,17 @@
Copyright (c) 1999 Stephen Williams ([email protected])
This source code is free software; you can redistribute it
and/or modify it in source code form under the terms of the GNU
General Public License as published by the Free Software
Foundation; either version 2 of the License, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
@@ -37,7 +37,7 @@ valid options include:
Predefine the symbol ``name'' to have the specified
value. If the value is not specified, then ``1'' is
used. This is mostly of use for controlling conditional
compilaiton.
compilation.
This option does *not* override existing `define
directives in the source file.
+8 -5
View File
@@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: lexor.lex,v 1.42 2003/09/26 02:08:31 steve Exp $"
#ident "$Id: lexor.lex,v 1.46 2004/09/10 00:15:45 steve Exp $"
#endif
# include "config.h"
@@ -30,6 +30,7 @@
#endif
# include <stdlib.h>
# include <string.h>
# include <ctype.h>
# include <assert.h>
# include "parse.h"
@@ -90,7 +91,8 @@ static void ifdef_enter(void)
{
struct ifdef_stack_t*cur;
cur = calloc(1, sizeof(struct ifdef_stack_t));
cur = (struct ifdef_stack_t*)
calloc(1, sizeof(struct ifdef_stack_t));
cur->path = strdup(istack->path);
cur->lineno = istack->lineno;
cur->next = ifdef_stack;
@@ -390,7 +392,8 @@ static void def_match()
return;
}
isp = calloc(1, sizeof(struct include_stack_t));
isp = (struct include_stack_t*)
calloc(1, sizeof(struct include_stack_t));
isp->str = cur->value;
isp->next = istack;
istack->yybs = YY_CURRENT_BUFFER;
@@ -552,7 +555,7 @@ static int def_is_done()
/*
* After some number of calls to do_define, this function is called to
* assigned value to the parsed name. If there is no value, then
* assign the string "1"
* assign the string "" (empty string.)
*/
static void def_finish()
{
@@ -566,7 +569,7 @@ static void def_finish()
define_cnt = 0;
} else {
define_macro(def_name, "1", 0);
define_macro(def_name, "", 0);
}
def_name[0] = 0;
}
+95 -33
View File
@@ -17,7 +17,7 @@ const char COPYRIGHT[] =
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: main.c,v 1.17 2003/09/26 02:08:31 steve Exp $"
#ident "$Id: main.c,v 1.22 2006/07/26 00:11:40 steve Exp $"
#endif
# include "config.h"
@@ -47,6 +47,7 @@ const char VERSION[] = "$Name: $ $State: Exp $";
#endif
# include <unistd.h>
# include <string.h>
# include <ctype.h>
#if defined(HAVE_GETOPT_H)
# include <getopt.h>
#endif
@@ -57,6 +58,8 @@ extern int getopt(int argc, char*argv[], const char*fmt);
extern int optind;
extern const char*optarg;
#endif
/* Path to the dependency file, if there is one. */
char *dep_path = NULL;
/*
* Keep in source_list an array of pointers to file names. The array
@@ -88,6 +91,76 @@ int line_direct_flag = 0;
unsigned error_count = 0;
FILE *depend_file = NULL;
static int flist_read_flags(const char*path)
{
char line_buf[2048];
FILE*fd = fopen(path, "r");
if (fd == 0) {
fprintf(stderr, "%s: unable to open for reading.\n", path);
return -1;
}
while (fgets(line_buf, sizeof line_buf, fd) != 0) {
/* Skip leading white space. */
char*cp = line_buf + strspn(line_buf, " \t\r\b\f");
/* Remove trailing white space. */
char*tail = cp + strlen(cp);
while (tail > cp) {
if (! isspace(tail[-1]))
break;
tail -= 1;
tail[0] = 0;
}
/* Skip empty lines */
if (*cp == 0)
continue;
/* Skip comment lines */
if (cp[0] == '#')
continue;
/* The arg points to the argument to the keyword. */
char*arg = strchr(cp, ':');
if (arg) *arg++ = 0;
if (strcmp(cp,"D") == 0) {
char*val = strchr(arg, '=');
if (val)
*val++ = 0;
else
val = "1";
define_macro(arg, val, 0);
} else if (strcmp(cp,"I") == 0) {
include_dir = realloc(include_dir,
(include_cnt+1)*sizeof(char*));
include_dir[include_cnt] = strdup(arg);
include_cnt += 1;
} else if (strcmp(cp,"keyword") == 0) {
char*buf = malloc(strlen(arg) + 2);
buf[0] = '`';
strcpy(buf+1, optarg);
define_macro(optarg, buf, 1);
free(buf);
} else if (strcmp(cp,"M") == 0) {
if (dep_path) {
fprintf(stderr, "duplicate -M flag.\n");
} else {
dep_path = arg;
}
} else {
fprintf(stderr, "%s: Invalid keyword %s\n", path, cp);
}
}
fclose(fd);
return 0;
}
/*
* This function reads from a file a list of file names. Each name
* starts with the first non-space character, and ends with the last
@@ -126,7 +199,6 @@ int main(int argc, char*argv[])
const char*flist_path = 0;
unsigned flag_errors = 0;
char*out_path = 0;
char *dep_path = NULL;
FILE*out;
/* Define preprocessor keywords that I plan to just pass. */
@@ -152,20 +224,11 @@ int main(int argc, char*argv[])
include_dir[0] = strdup(".");
include_cnt = 1;
while ((opt = getopt(argc, argv, "D:f:I:K:LM:o:v")) != EOF) switch (opt) {
while ((opt=getopt(argc, argv, "F:f:K:Lo:v")) != EOF) switch (opt) {
case 'D': {
char*tmp = strdup(optarg);
char*val = strchr(tmp, '=');
if (val)
*val++ = 0;
else
val = "1";
define_macro(tmp, val, 0);
free(tmp);
break;
}
case 'F':
flist_read_flags(optarg);
break;
case 'f':
if (flist_path) {
@@ -175,12 +238,6 @@ int main(int argc, char*argv[])
flist_path = optarg;
break;
case 'I':
include_dir = realloc(include_dir, (include_cnt+1)*sizeof(char*));
include_dir[include_cnt] = strdup(optarg);
include_cnt += 1;
break;
case 'K': {
char*buf = malloc(strlen(optarg) + 2);
buf[0] = '`';
@@ -194,14 +251,6 @@ int main(int argc, char*argv[])
line_direct_flag = 1;
break;
case 'M':
if (dep_path) {
fprintf(stderr, "duplicate -M flag.\n");
} else {
dep_path = optarg;
}
break;
case 'o':
if (out_path) {
fprintf(stderr, "duplicate -o flag.\n");
@@ -223,13 +272,11 @@ int main(int argc, char*argv[])
}
if (flag_errors) {
fprintf(stderr, "\nUsage: %s [-v][-L][-I<dir>][-D<def>] <file>...\n"
" -D<def> - Predefine a value.\n"
fprintf(stderr, "\nUsage: %s [-v][-L][-F<fil>][-f<fil>] <file>...\n"
" -F<fil> - Get defines and includes from file\n"
" -f<fil> - Read the sources listed in the file\n"
" -I<dir> - Add an include file search directory\n"
" -K<def> - Define a keyword macro that I just pass\n"
" -L - Emit line number directives\n"
" -M<fil> - Write dependencies to <fil>\n"
" -o<fil> - Send the output to <fil>\n"
" -v - Print version information\n",
argv[0]);
@@ -288,6 +335,21 @@ int main(int argc, char*argv[])
/*
* $Log: main.c,v $
* Revision 1.22 2006/07/26 00:11:40 steve
* Pass depfiles through temp defines file.
*
* Revision 1.21 2006/07/26 00:02:48 steve
* Pass defines and includes through temp file.
*
* Revision 1.20 2004/09/10 00:15:45 steve
* Remove bad casts.
*
* Revision 1.19 2004/09/05 21:29:08 steve
* Better type safety.
*
* Revision 1.18 2004/02/15 18:03:30 steve
* Cleanup of warnings.
*
* Revision 1.17 2003/09/26 02:08:31 steve
* Detect missing endif markers.
*
+57 -7
View File
@@ -1,4 +1,6 @@
%option never-interactive
%{
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
@@ -19,7 +21,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: lexor.lex,v 1.85 2003/08/31 21:14:28 steve Exp $"
#ident "$Id: lexor.lex,v 1.92 2006/07/31 03:50:17 steve Exp $"
#endif
# include "config.h"
@@ -98,6 +100,7 @@ static int comment_enter;
%x CSTRING
%s UDPTABLE
%x PPTIMESCALE
%x PPDEFAULT_NETTYPE
W [ \t\b\f\r]+
@@ -131,6 +134,7 @@ W [ \t\b\f\r]+
"<<<" { return K_LS; /* Note: Functionally, <<< is the same as <<. */}
">>" { return K_RS; }
">>>" { return K_RSS; }
"**" { return K_POW; }
"<=" { return K_LE; }
">=" { return K_GE; }
"=>" { return K_EG; }
@@ -153,7 +157,7 @@ W [ \t\b\f\r]+
/* Watch out for the tricky case of (*). Cannot parse this as "(*"
and ")", but since I know that this is really ( * ), replace it
with "*" and return that. */
"(*"{W}*")" { return '*'; }
"("{W}*"*"{W}*")" { return '*'; }
[}{;:\[\],()#=.@&!?<>%|^~+*/-] { return yytext[0]; }
@@ -178,6 +182,8 @@ W [ \t\b\f\r]+
<UDPTABLE>\(01\) { return 'r'; }
<UDPTABLE>\(0[xX]\) { return 'Q'; }
<UDPTABLE>\(b[xX]\) { return 'q'; }
<UDPTABLE>\(b0\) { return 'f'; /* b0 is 10|00, but only 10 is meaningful */}
<UDPTABLE>\(b1\) { return 'r'; /* b1 is 11|01, but only 01 is meaningful */}
<UDPTABLE>\(0\?\) { return 'P'; }
<UDPTABLE>\(10\) { return 'f'; }
<UDPTABLE>\(1[xX]\) { return 'M'; }
@@ -197,12 +203,27 @@ W [ \t\b\f\r]+
[a-zA-Z_][a-zA-Z0-9$_]* {
int rc = lexor_keyword_code(yytext, yyleng);
if (rc == IDENTIFIER) {
switch (rc) {
case IDENTIFIER:
yylval.text = strdup(yytext);
if (strncmp(yylval.text,"PATHPULSE$", 10) == 0)
rc = PATHPULSE_IDENTIFIER;
} else {
break;
case K_bool:
case K_logic:
case K_wone:
if (! gn_cadence_types_enabled()) {
yylval.text = strdup(yytext);
rc = IDENTIFIER;
} else {
yylval.text = 0;
}
break;
default:
yylval.text = 0;
break;
}
return rc;
@@ -269,22 +290,51 @@ W [ \t\b\f\r]+
should handle these, not an external preprocessor. */
^{W}?`celldefine{W}?.* { }
^{W}?`default_nettype{W}?.* { }
^{W}?`delay_mode_distributed{W}?.* { }
^{W}?`delay_mode_unit{W}?.* { }
^{W}?`delay_mode_path{W}?.* { }
^{W}?`disable_portfaults{W}?.* { }
^{W}?`enable_portfaults{W}?.* { }
^{W}?`endcelldefine{W}?.* { }
^{W}?`endprotect{W}?.* { }
`endprotect { }
^{W}?`nosuppress_faults{W}?.* { }
^{W}?`nounconnected_drive{W}?.* { }
^{W}?`protect{W}?.* { }
`protect { }
^{W}?`resetall{W}?.* { }
^{W}?`suppress_faults{W}?.* { }
^{W}?`unconnected_drive{W}?.* { }
^{W}?`uselib{W}?.* { }
/* Notice and handle the default_nettype directive. The lexor
detects the default_nettype keyword, and the second part of the
rule collects the rest of the line and processes it. We only need
to look for the first work, and interpret it. */
`default_nettype{W}? { BEGIN(PPDEFAULT_NETTYPE); }
<PPDEFAULT_NETTYPE>.* {
NetNet::Type net_type;
size_t wordlen = strcspn(yytext, " \t\f\r\n");
yytext[wordlen] = 0;
if (strcmp(yytext,"wire") == 0) {
net_type = NetNet::WIRE;
} else if (strcmp(yytext,"none") == 0) {
net_type = NetNet::NONE;
} else {
cerr << yylloc.text << ":" << yylloc.first_line
<< " error: Net type " << yytext
<< " is not a valid (and supported)"
<< " default net type." << endl;
net_type = NetNet::WIRE;
error_count += 1;
}
pform_set_default_nettype(net_type, yylloc.text, yylloc.first_line);
}
<PPDEFAULT_NETTYPE>\n {
yylloc.first_line += 1;
BEGIN(0); }
/* These are directives that are not supported by me and should have
been handled by an external preprocessor such as ivlpp. */
+7
View File
@@ -14,6 +14,7 @@ always, K_always
and, K_and
assign, K_assign
begin, K_begin
bool, K_bool
buf, K_buf
bufif0, K_bufif0
bufif1, K_bufif1
@@ -30,6 +31,7 @@ else, K_else
end, K_end
endcase, K_endcase
endfunction, K_endfunction
endgenerate, K_endgenerate
endmodule, K_endmodule
endprimitive, K_endprimitive
endspecify, K_endspecify
@@ -41,9 +43,12 @@ force, K_force
forever, K_forever
fork, K_fork
function, K_function
generate, K_generate
genvar, K_genvar
highz0, K_highz0
highz1, K_highz1
if, K_if
ifnone, K_ifnone
initial, K_initial
inout, K_inout
input, K_input
@@ -51,6 +56,7 @@ integer, K_integer
join, K_join
large, K_large
localparam, K_localparam
logic, K_logic
macromodule, K_macromodule
medium, K_medium
module, K_module
@@ -110,6 +116,7 @@ weak0, K_weak0
weak1, K_weak1
while, K_while
wire, K_wire
wone, K_wone
wor, K_wor
xnor, K_xnor
xor, K_xor
+7 -7
View File
@@ -16,7 +16,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.32 2004/01/15 20:52:32 steve Exp $"
#ident "$Id: Makefile.in,v 1.34 2004/10/04 01:10:07 steve Exp $"
#
#
SHELL = /bin/sh
@@ -33,13 +33,13 @@ libdir = @libdir@
libdir64 = @libdir64@
includedir = $(prefix)/include
CC = @CC@ -I. -I.. -I$(srcdir) -I$(srcdir)/..
CC = @CC@
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @CPPFLAGS@ @DEFS@ @PICFLAG@
CFLAGS = @CFLAGS@
CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@
CFLAGS = -Wall @CFLAGS@
LDFLAGS = @LDFLAGS@
STRIP = @STRIP@
RANLIB = @RANLIB@
@@ -84,12 +84,12 @@ dep:
mkdir dep
%.o: %.c
$(CC) -Wall @ident_support@ $(CPPFLAGS) $(CFLAGS) -MD -c $< -o $*.o
$(CC) $(CPPFLAGS) $(CFLAGS) -MD -c $< -o $*.o
mv $*.d dep
clean:
rm -rf *.o dep libveriuser.a libveriuser.o
rm -rf *.o dep libveriuser.a libveriuser.o bin32
distclean: clean
rm -f Makefile config.status config.log config.cache
@@ -112,7 +112,7 @@ bin32:
mkdir bin32
bin32/%.o: %.c
$(CC) -m32 -Wall $(CPPFLAGS) $(CFLAGS) -MD -c $< -o $@
$(CC) -m32 $(CPPFLAGS) $(CFLAGS) -MD -c $< -o $@
bin32/libveriuser.o: $(addprefix bin32/,$O)
$(LD) -melf_i386 -r -o $@ $(addprefix bin32/,$O)
+5 -2
View File
@@ -17,19 +17,22 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: a_compare_handles.c,v 1.2 2003/08/26 16:26:02 steve Exp $"
#ident "$Id: a_compare_handles.c,v 1.3 2004/02/18 02:51:59 steve Exp $"
#endif
# include <vpi_user.h>
# include <acc_user.h>
int acc_compare_handles(handle handle1, handle handle2)
PLI_INT32 acc_compare_handles(handle handle1, handle handle2)
{
return handle1 == handle2;
}
/*
* $Log: a_compare_handles.c,v $
* Revision 1.3 2004/02/18 02:51:59 steve
* Fix type mismatches of various VPI functions.
*
* Revision 1.2 2003/08/26 16:26:02 steve
* ifdef idents correctly.
*
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: a_fetch_range.c,v 1.1 2003/06/04 01:56:20 steve Exp $"
#ident "$Id: a_fetch_range.c,v 1.2 2004/02/18 02:51:59 steve Exp $"
#endif
#include <vpi_user.h>
@@ -26,7 +26,7 @@
/*
* acc_fetch_range implemented using VPI interface
*/
PLI_INT32 acc_fetch_range(handle object, PLI_INT32 *msb, PLI_INT32 *lsb)
PLI_INT32 acc_fetch_range(handle object, int *msb, int *lsb)
{
*msb = vpi_get(vpiLeftRange, object);
*lsb = vpi_get(vpiRightRange, object);
@@ -35,6 +35,9 @@ PLI_INT32 acc_fetch_range(handle object, PLI_INT32 *msb, PLI_INT32 *lsb)
/*
* $Log: a_fetch_range.c,v $
* Revision 1.2 2004/02/18 02:51:59 steve
* Fix type mismatches of various VPI functions.
*
* Revision 1.1 2003/06/04 01:56:20 steve
* 1) Adds configure logic to clean up compiler warnings
* 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+10 -4
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: a_fetch_tfarg.c,v 1.8 2003/06/14 01:16:17 steve Exp $"
#ident "$Id: a_fetch_tfarg.c,v 1.10 2004/10/04 01:10:56 steve Exp $"
#endif
#include <vpi_user.h>
@@ -42,7 +42,7 @@ double acc_fetch_itfarg(PLI_INT32 n, handle obj)
if (hand) {
value.format=vpiRealVal;
vpi_get_value(hand, &value);
rtn = value.value.real;
rtn = value.value.real;
vpi_free_object(iter);
} else {
rtn = 0.0;
@@ -56,7 +56,7 @@ double acc_fetch_itfarg(PLI_INT32 n, handle obj)
return rtn;
}
double acc_fetch_tfarg(int n)
double acc_fetch_tfarg(PLI_INT32 n)
{
return acc_fetch_itfarg_int(n, vpi_handle(vpiSysTfCall,0));
}
@@ -77,7 +77,7 @@ PLI_INT32 acc_fetch_itfarg_int(PLI_INT32 n, handle obj)
if (hand) {
value.format=vpiIntVal;
vpi_get_value(hand, &value);
rtn = value.value.integer;
rtn = value.value.integer;
vpi_free_object(iter);
} else {
rtn = 0;
@@ -134,6 +134,12 @@ char *acc_fetch_tfarg_str(PLI_INT32 n)
/*
* $Log: a_fetch_tfarg.c,v $
* Revision 1.10 2004/10/04 01:10:56 steve
* Clean up spurious trailing white space.
*
* Revision 1.9 2004/02/18 02:51:59 steve
* Fix type mismatches of various VPI functions.
*
* Revision 1.8 2003/06/14 01:16:17 steve
* ihand is system task, not scope.
*
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: a_fetch_type.c,v 1.7 2003/06/04 01:56:20 steve Exp $"
#ident "$Id: a_fetch_type.c,v 1.8 2004/10/04 01:10:56 steve Exp $"
#endif
# include <acc_user.h>
@@ -78,7 +78,7 @@ PLI_INT32 acc_fetch_fulltype(handle obj)
type = vpi_get(vpiNetType, obj);
switch(type) {
case vpiWire: return accWire;
default:
default:
vpi_printf("acc_fetch_fulltype: vpiNetType %d unknown?\n",
type);
return accUnknown;
@@ -121,6 +121,9 @@ PLI_INT32 acc_fetch_fulltype(handle obj)
/*
* $Log: a_fetch_type.c,v $
* Revision 1.8 2004/10/04 01:10:56 steve
* Clean up spurious trailing white space.
*
* Revision 1.7 2003/06/04 01:56:20 steve
* 1) Adds configure logic to clean up compiler warnings
* 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: a_handle_tfarg.c,v 1.5 2003/03/18 01:21:49 steve Exp $"
#ident "$Id: a_handle_tfarg.c,v 1.6 2004/10/04 01:10:56 steve Exp $"
#endif
#include <acc_user.h>
@@ -29,7 +29,7 @@
handle acc_handle_tfarg(int n)
{
vpiHandle sys_h, sys_i, rtn_h = 0;
if (n > 0) {
sys_h = vpi_handle(vpiSysTfCall, 0 /* NULL */);
sys_i = vpi_iterate(vpiArgument, sys_h);
@@ -58,6 +58,9 @@ handle acc_handle_tfinst(void)
/*
* $Log: a_handle_tfarg.c,v $
* Revision 1.6 2004/10/04 01:10:56 steve
* Clean up spurious trailing white space.
*
* Revision 1.5 2003/03/18 01:21:49 steve
* Fix warning about uninitialized variable.
*
+6 -3
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: a_object_of_type.c,v 1.5 2003/06/04 01:56:20 steve Exp $"
#ident "$Id: a_object_of_type.c,v 1.6 2004/02/18 02:51:59 steve Exp $"
#endif
#include <assert.h>
@@ -28,7 +28,7 @@
/*
* acc_object_of_type implemented using VPI interface
*/
PLI_INT32 acc_object_of_type(handle object, PLI_INT32 type)
int acc_object_of_type(handle object, PLI_INT32 type)
{
int vtype;
int rtn = 0; /* false */
@@ -86,7 +86,7 @@ PLI_INT32 acc_object_of_type(handle object, PLI_INT32 type)
return rtn;
}
PLI_INT32 acc_object_in_typelist(handle object, PLI_INT32*typelist)
int acc_object_in_typelist(handle object, PLI_INT32*typelist)
{
while (typelist[0] != 0) {
int rtn = acc_object_of_type(object, typelist[0]);
@@ -101,6 +101,9 @@ PLI_INT32 acc_object_in_typelist(handle object, PLI_INT32*typelist)
/*
* $Log: a_object_of_type.c,v $
* Revision 1.6 2004/02/18 02:51:59 steve
* Fix type mismatches of various VPI functions.
*
* Revision 1.5 2003/06/04 01:56:20 steve
* 1) Adds configure logic to clean up compiler warnings
* 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: a_vcl.c,v 1.6 2003/06/17 16:55:07 steve Exp $"
#ident "$Id: a_vcl.c,v 1.7 2004/10/04 01:10:56 steve Exp $"
#endif
#include <vpi_user.h>
@@ -154,7 +154,7 @@ static PLI_INT32 vcl_value_callback(struct t_cb_data*cb)
vcr.vc_hightime = sim_time.high;
vcr.vc_lowtime = sim_time.low;
vcr.user_data = cur->user_data;
(cur->consumer) (&vcr);
return 0;
}
@@ -206,6 +206,9 @@ void acc_vcl_delete(handle obj, PLI_INT32(*consumer)(p_vc_record),
/*
* $Log: a_vcl.c,v $
* Revision 1.7 2004/10/04 01:10:56 steve
* Clean up spurious trailing white space.
*
* Revision 1.6 2003/06/17 16:55:07 steve
* 1) setlinebuf() for vpi_trace
* 2) Addes error checks for trace file opens
+4 -24
View File
@@ -5,7 +5,6 @@ AC_PROG_CC
AC_PROG_INSTALL
AC_PROG_RANLIB
AC_CYGWIN
AC_EXEEXT
AX_CPP_IDENT
@@ -19,30 +18,11 @@ AC_CHECK_SIZEOF(unsigned long long)
AC_CHECK_SIZEOF(unsigned long)
AC_CHECK_SIZEOF(unsigned)
# Darwin requires -no-cpp-precomp
case "${host}" in
*-*-darwin*)
CPPFLAGS="-no-cpp-precomp $CPPFLAGS"
CFLAGS="-no-cpp-precomp $CFLAGS"
;;
esac
AC_MSG_CHECKING(for flag to make position independent code)
PICFLAG=-fPIC
case "${host}" in
*-*-cygwin*)
PICFLAG=
;;
*-*-hpux*)
PICFLAG=+z
;;
esac
AC_SUBST(PICFLAG)
AC_MSG_RESULT($PICFLAG)
# may modify CPPFLAGS and CFLAGS
AX_CPP_PRECOMP
# Compiler option for position independent code, needed whan making shared objects.
AX_C_PICFLAG
AC_SUBST(EXEEXT)
AC_SUBST(EXTRALIBS)
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: getinstance.c,v 1.4 2003/05/18 00:16:35 steve Exp $"
#ident "$Id: getinstance.c,v 1.5 2005/09/20 18:34:01 steve Exp $"
#endif
#include <veriuser.h>
@@ -28,11 +28,14 @@
*/
PLI_BYTE8* tf_getinstance(void)
{
return (char *)vpi_handle(vpiSysTfCall, 0 /* NULL */);
return (PLI_BYTE8 *)vpi_handle(vpiSysTfCall, 0 /* NULL */);
}
/*
* $Log: getinstance.c,v $
* Revision 1.5 2005/09/20 18:34:01 steve
* Clean up compiler warnings.
*
* Revision 1.4 2003/05/18 00:16:35 steve
* Add PLI_TRACE tracing of PLI1 modules.
*
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: getp.c,v 1.6 2003/06/17 16:55:07 steve Exp $"
#ident "$Id: getp.c,v 1.7 2004/10/04 01:10:56 steve Exp $"
#endif
# include <assert.h>
@@ -158,7 +158,7 @@ char *tf_istrgetp(PLI_INT32 n, PLI_INT32 fmt, void *obj)
case 'd': value.format = vpiDecStrVal; break;
case 'h': value.format = vpiHexStrVal; break;
}
if (value.format > 0) {
if (value.format > 0) {
vpi_get_value(arg_h, &value);
rtn = value.value.str;
}
@@ -184,6 +184,9 @@ char *tf_strgetp(PLI_INT32 n, PLI_INT32 fmt)
/*
* $Log: getp.c,v $
* Revision 1.7 2004/10/04 01:10:56 steve
* Clean up spurious trailing white space.
*
* Revision 1.6 2003/06/17 16:55:07 steve
* 1) setlinebuf() for vpi_trace
* 2) Addes error checks for trace file opens
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: putlongp.c,v 1.3 2003/03/15 05:42:39 steve Exp $"
#ident "$Id: putlongp.c,v 1.4 2004/09/10 23:13:05 steve Exp $"
#endif
#include <stdio.h>
@@ -58,13 +58,16 @@ void tf_putlongp(int n, int lowvalue, int highvalue)
sprintf(str, "%x%08x", highvalue, lowvalue);
val.format = vpiHexStrVal;
val.value.str = str;
(void)vpi_put_value(arg_h, &val, 0, vpiNoDelay);
vpi_put_value(arg_h, &val, 0, vpiNoDelay);
vpi_free_object(sys_i);
}
/*
* $Log: putlongp.c,v $
* Revision 1.4 2004/09/10 23:13:05 steve
* Compile cleanup of C code.
*
* Revision 1.3 2003/03/15 05:42:39 steve
* free argument iterators.
*
+6 -3
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: putp.c,v 1.6 2003/06/26 03:20:24 steve Exp $"
#ident "$Id: putp.c,v 1.7 2004/09/10 23:13:05 steve Exp $"
#endif
# include <assert.h>
@@ -74,7 +74,7 @@ PLI_INT32 tf_iputp(PLI_INT32 n, PLI_INT32 value, void *obj)
/* fill in vpi_value */
val.format = vpiIntVal;
val.value.integer = value;
(void)vpi_put_value(arg_h, &val, 0, vpiNoDelay);
vpi_put_value(arg_h, &val, 0, vpiNoDelay);
if (arg_h)
vpi_free_object(sys_i);
@@ -123,7 +123,7 @@ PLI_INT32 tf_iputrealp(PLI_INT32 n, double value, void *obj)
/* fill in vpi_value */
val.format = vpiRealVal;
val.value.real = value;
(void)vpi_put_value(arg_h, &val, 0, vpiNoDelay);
vpi_put_value(arg_h, &val, 0, vpiNoDelay);
free:
vpi_free_object(sys_i);
@@ -145,6 +145,9 @@ PLI_INT32 tf_putrealp(PLI_INT32 n, double value)
}
/*
* $Log: putp.c,v $
* Revision 1.7 2004/09/10 23:13:05 steve
* Compile cleanup of C code.
*
* Revision 1.6 2003/06/26 03:20:24 steve
* Correct handle of put to function return value.
*
+8 -5
View File
@@ -18,7 +18,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: veriusertfs.c,v 1.14 2003/06/25 04:04:19 steve Exp $"
#ident "$Id: veriusertfs.c,v 1.15 2004/09/10 23:13:05 steve Exp $"
#endif
/*
@@ -84,7 +84,7 @@ void veriusertfs_register_table(p_tfcell vtable)
}
/* squirrel away veriusertfs in persistent user_data */
data = (p_pli_data) calloc(1, sizeof(s_pli_data));
data = calloc(1, sizeof(s_pli_data));
assert(data != NULL);
data->tf = tf;
@@ -92,7 +92,7 @@ void veriusertfs_register_table(p_tfcell vtable)
it to the pli_data that represents this
function. Supply wrapper functions for the system
task actions. */
(void) memset(&tf_data, 0, sizeof(s_vpi_systf_data));
memset(&tf_data, 0, sizeof(s_vpi_systf_data));
switch (tf->type) {
case usertask:
tf_data.type = vpiSysTask;
@@ -164,7 +164,7 @@ static int compiletf(char *data)
vpi_put_userdata(call_h, pli);
/* default cb_data */
(void) memset(&cb_data, 0, sizeof(s_cb_data));
memset(&cb_data, 0, sizeof(s_cb_data));
cb_data.cb_rtn = callback;
cb_data.user_data = data;
@@ -182,7 +182,7 @@ static int compiletf(char *data)
cb_data.reason = cbValueChange;
while ((arg_h = vpi_scan(arg_i)) != NULL) {
/* replicate user_data for each instance */
dp = (p_pli_data)calloc(1, sizeof(s_pli_data));
dp = calloc(1, sizeof(s_pli_data));
assert(dp != NULL);
memcpy(dp, cb_data.user_data, sizeof(s_pli_data));
dp->paramvc = paramvc++;
@@ -389,6 +389,9 @@ PLI_INT32 tf_setrealdelay(double dly)
}
/*
* $Log: veriusertfs.c,v $
* Revision 1.15 2004/09/10 23:13:05 steve
* Compile cleanup of C code.
*
* Revision 1.14 2003/06/25 04:04:19 steve
* Fix mingw portability problems.
*
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: link_const.cc,v 1.16 2003/06/21 01:21:43 steve Exp $"
#ident "$Id: link_const.cc,v 1.17 2004/10/04 01:10:53 steve Exp $"
#endif
# include "config.h"
@@ -59,7 +59,7 @@ bool Nexus::drivers_constant() const
outside world. */
if (cur_dir == Link::PASSIVE) {
const NetObj*obj = cur->get_obj();
if (obj->scope()->parent() != 0)
continue;
@@ -164,6 +164,9 @@ verinum::V Nexus::driven_value() const
/*
* $Log: link_const.cc,v $
* Revision 1.17 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.16 2003/06/21 01:21:43 steve
* Harmless fixup of warnings.
*
+5 -2
View File
@@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: load_module.cc,v 1.12 2003/06/05 04:31:09 steve Exp $"
#ident "$Id: load_module.cc,v 1.13 2005/03/22 15:53:48 steve Exp $"
#endif
# include "config.h"
@@ -88,7 +88,7 @@ bool load_module(const char*type)
cerr << "Executing: " << cmdline << endl;
pform_parse(path, file);
fclose(file);
pclose(file);
free(cmdline);
} else {
@@ -193,6 +193,9 @@ int build_library_index(const char*path, bool key_case_sensitive)
/*
* $Log: load_module.cc,v $
* Revision 1.13 2005/03/22 15:53:48 steve
* popen must be matched by pclose.
*
* Revision 1.12 2003/06/05 04:31:09 steve
* INclude missing assert.h in load_module.
*
+1 -1
View File
@@ -38,7 +38,7 @@ quite similar.
lexor_keyword.gperf, and use that.
3) If working with a CVS snapshot, you must run autoconf in several
directories. This is aided by the 'autoconf.sh' script at the
directories. This is aided by the 'autoconf.sh' script at the
top of the source tree:
sh ./autoconf.sh

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