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2206 Commits

Author SHA1 Message Date
Alan Mishchenko a523ab792c Preprocessing for multi-output PLA tables. 2015-01-31 15:10:24 -08:00
Alan Mishchenko e30dae5a61 Preprocessing for multi-output PLA tables. 2015-01-31 15:10:01 -08:00
Alan Mishchenko 13cd3a6a4c Preprocessing for multi-output PLA tables. 2015-01-31 14:53:58 -08:00
Alan Mishchenko e293489f71 Preprocessing for multi-output PLA tables. 2015-01-31 13:42:14 -08:00
Alan Mishchenko 6c3f191172 Preprocessing for multi-output PLA tables. 2015-01-31 11:23:22 -08:00
Alan Mishchenko ff1fb1757b Preprocessing for multi-output PLA tables. 2015-01-31 11:10:07 -08:00
Alan Mishchenko 8ff4b79fc2 Several ongoing changes. 2015-01-26 20:48:59 -08:00
Alan Mishchenko 40cbacaf40 Several ongoing changes. 2015-01-26 20:45:28 -08:00
Alan Mishchenko 65cd556b1d Outputting initial state in Wlc_Ntk_t. 2015-01-26 09:14:51 -08:00
Alan Mishchenko 416cc3b2ae Outputting initial state in Wlc_Ntk_t. 2015-01-25 11:21:36 -08:00
Alan Mishchenko 3dd4e356fc Fix in deriving the init values for Wlc_Ntk_t. 2015-01-22 15:16:45 -08:00
Alan Mishchenko 674622a3c0 Bug fix in &cone (not able to extract the last PO). 2015-01-22 13:13:30 -08:00
Alan Mishchenko cf83242458 Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t. 2015-01-21 17:45:48 -08:00
Alan Mishchenko ffc7b60d2d Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t. 2015-01-21 17:43:46 -08:00
Alan Mishchenko 14425c111e Organizing commands for barbuf-aware flow. 2015-01-20 21:20:31 -08:00
Alan Mishchenko dc8926a928 Word-level extension of Cba_Ntk_t. 2015-01-18 20:38:52 -08:00
Alan Mishchenko d688af2601 Several small bug fixes. 2015-01-17 20:48:42 -08:00
Alan Mishchenko 17610c039f Organizing commands for barbuf-aware flow. 2015-01-17 20:27:23 -08:00
Alan Mishchenko 42cc56576b Compiler warnings. 2015-01-16 16:16:32 -08:00
Alan Mishchenko d6d0627d13 Organizing commands for barbuf-aware flow. 2015-01-16 16:14:16 -08:00
Alan Mishchenko 1a5a11cbc6 Various transformations of Cba_Ntk_t. 2015-01-15 20:08:15 -08:00
Alan Mishchenko c7e3c8f375 Various transformations of Cba_Ntk_t. 2015-01-15 18:23:32 -08:00
Alan Mishchenko e27edf5e1e Various transformations of Cba_Ntk_t. 2015-01-15 18:21:02 -08:00
Alan Mishchenko 8ac8923a91 Various transformations of Cba_Ntk_t. 2015-01-13 21:54:59 -08:00
Alan Mishchenko 2b2f05bacd Various transformations of Cba_Ntk_t. 2015-01-13 17:05:22 -08:00
Alan Mishchenko ee72b500d5 Various transformations of Cba_Ntk_t. 2015-01-11 16:42:38 -08:00
Alan Mishchenko 26b8116ac6 Changing memory model of Cba_Ntk_t. 2015-01-10 17:19:54 -08:00
Alan Mishchenko 63ce84d824 Implementation of CE extraction for multiple MUXes driving D-inputs of FFs. 2015-01-08 16:30:32 -08:00
Alan Mishchenko 3b9e363ef2 Returning multiple counter-examples. 2015-01-03 22:53:58 -08:00
Alan Mishchenko 58d28539a7 Gate sizing with barrier buffers. 2014-12-21 22:22:31 -08:00
Alan Mishchenko 6733abd72e Exprimental features in tech-mapping. 2014-12-21 01:04:39 -08:00
Alan Mishchenko 259d53ca3e Simplifying AIG with barrier buffers. 2014-12-19 22:02:28 -08:00
Alan Mishchenko c1d7f29dbd Bug fix in 'testcex' when flop count in the CEX is different from the network (say, after seq synthesis). 2014-12-19 18:36:10 -08:00
Alan Mishchenko d5a952c462 Bug fix in 'testcex' when flop count in the CEX is different from the network (say, after seq synthesis). 2014-12-19 18:34:29 -08:00
Alan Mishchenko c5162ba6d2 Induced bug with in DFS computation. 2014-12-16 21:48:16 -08:00
Alan Mishchenko 6b6e5861e5 Integrating barrier buffers. 2014-12-13 20:45:11 -08:00
Alan Mishchenko 6e59e4e542 Adding relax ratio to &synch2. 2014-12-13 20:10:24 -08:00
Alan Mishchenko e946deec81 Integrating barrier buffers. 2014-12-13 20:03:29 -08:00
Alan Mishchenko aadfea8b4d Integrating barrier buffers. 2014-12-13 12:37:04 -08:00
Alan Mishchenko ac7633c5a4 Integrating barrier buffers. 2014-12-11 11:14:04 -08:00
Alan Mishchenko 4f940de518 Converting AIG with MUXes into a logic network. 2014-12-10 22:52:34 -08:00
Alan Mishchenko a1fa224d61 New flavor of DSD-friendly 'eliminate'. 2014-12-09 23:30:46 -08:00
Alan Mishchenko 1398de7c46 Integrating barrier buffers. 2014-12-08 14:10:41 -08:00
Alan Mishchenko 3e2fad3574 Changes to the parser. 2014-12-04 18:23:20 -08:00
Alan Mishchenko 705006a648 Changes to the parser. 2014-12-03 20:35:39 -08:00
Alan Mishchenko e970aa8521 Added and verified bit-blasting of power operator. 2014-11-30 16:18:13 -08:00
Alan Mishchenko 109fc76f43 Changes to history recording and other small things. 2014-11-30 12:20:43 -08:00
Alan Mishchenko 5d1a5f3590 Changes to history recording and other small things. 2014-11-30 12:19:32 -08:00
Alan Mishchenko 1d20dea11b Induced bug fix in bitblasting of rotation operator. 2014-11-29 19:34:47 -08:00
Alan Mishchenko 87f0d187bf Compiler warnings. 2014-11-29 14:43:21 -08:00
Alan Mishchenko 24f1ca0703 New parser and framework. 2014-11-29 14:36:26 -08:00
Alan Mishchenko ba4063acb2 Improvements to handling boxes and flops. 2014-11-25 21:07:27 -08:00
Alan Mishchenko 8d5fa2c290 Improvements to handling boxes and flops. 2014-11-24 20:02:51 -08:00
Alan Mishchenko 8feac56509 Experiments with hierarchy representation. 2014-11-24 15:35:52 -08:00
Alan Mishchenko 3368b2dda9 Improvements to handling boxes and flops. 2014-11-24 15:15:45 -08:00
Alan Mishchenko df83fb5e04 Fix in reading flop classes. 2014-11-21 12:01:26 -08:00
Alan Mishchenko 9e6d74bc15 Experiments with hierarchy representation. 2014-11-20 22:09:57 -08:00
Alan Mishchenko 997a92fc54 Extending &fadds to support artificial chains. New command &setregnum. 2014-11-20 10:46:14 -08:00
Alan Mishchenko 716b9502c9 Extending &fadds to support artificial chains. 2014-11-19 20:49:15 -08:00
Alan Mishchenko c06bdc151c Added check if a given command exists. 2014-11-18 13:54:16 -08:00
Alan Mishchenko d662e7ff68 Merging two branches. 2014-11-17 18:03:51 -08:00
Alan Mishchenko 7a8d56b9ad AND/OR bug in the UIF computation. 2014-11-17 17:46:08 -08:00
Alan Mishchenko 345d4e24f3 Bug fix in abstracting boxes. 2014-11-17 12:55:12 -08:00
Alan Mishchenko 5a10c8ad01 Integrating mfs2 package to work with boxes. 2014-11-16 23:27:21 -08:00
Alan Mishchenko d9ffe9c3ad Improvements to word-level network package. 2014-11-14 20:38:13 -08:00
Alan Mishchenko 98c5668d4b Improvements to word-level network package. 2014-11-14 20:15:36 -08:00
Alan Mishchenko cc37fb9573 Improvements to word-level network package. 2014-11-14 20:12:20 -08:00
Alan Mishchenko 3dd08c7172 Enabling AIGs with boxes for word-level and sequential designs. 2014-11-14 15:34:03 -08:00
Alan Mishchenko a34183790f Enabling AIGs with boxes for word-level and sequential designs. 2014-11-13 18:28:25 -08:00
Alan Mishchenko 968be1577b Generation of barrier-buffers for hierarchical design. 2014-11-11 23:17:48 -08:00
Alan Mishchenko 96fa84ad77 Added switch -i to &filter to use FIs instead of FOs. 2014-11-11 15:11:44 -08:00
Alan Mishchenko 2a028aa147 Bug fix in blasting MUX with different ranges of inputs and the output. 2014-11-10 21:43:41 -08:00
Alan Mishchenko ac030ee42c Generation of barrier-buffers for hierarchical design. 2014-11-10 16:45:48 -08:00
Alan Mishchenko 5ebf135b6a Adding cyclicity check for netlist with boxes. 2014-11-10 14:55:27 -08:00
Alan Mishchenko 873c35018a Removing unauthorized printout in 'pdr'. 2014-11-09 23:54:57 -08:00
Alan Mishchenko 372a348c90 Detecting full-adder chains and putting them into white boxes. 2014-11-09 22:49:17 -08:00
Alan Mishchenko 8c2e51824e Experimental implementation of BMC-related procedures. 2014-11-04 20:35:36 -08:00
Alan Mishchenko b4cf2f7448 Added switches '-c' and '-n' to 'init'. 2014-11-02 17:35:47 -08:00
Alan Mishchenko 135bf3ecdf Compiler warnings. 2014-10-28 23:53:17 -07:00
Alan Mishchenko c556baa92e Changes to enable building external code. 2014-10-28 21:13:59 -07:00
Alan Mishchenko c0db4d2a12 Changes to enable building external code. 2014-10-27 17:56:48 -07:00
Alan Mishchenko 836723cf73 Changing switch -v in 'qbf' and '&qbf' to be non-verbose by default. 2014-10-26 08:57:13 -07:00
Alan Mishchenko b8556e7edf New command &satenum to enumerate SAT assignments of a miter in a naive way. 2014-10-25 17:55:35 -07:00
Alan Mishchenko f93ede121d Adding switch &fftest -N <num> to detect fixed vars after each <num> iterations. 2014-10-25 17:07:38 -07:00
Alan Mishchenko 96c9792f33 Merged in sterin/abc (pull request #9) 
make it easy to add intialization functions to Abc_FrameInit()/Abc_FrameEnd()
 2014-10-23 18:19:51 -07:00
Alan Mishchenko 49caf258d4 One bug fix and two small changes. 2014-10-22 20:18:13 -07:00
Alan Mishchenko 51be0f4c52 One bug fix and two small changes. 2014-10-22 20:17:09 -07:00
Baruch Sterin 392390d23e make it easy to add intialization functions to Abc_FrameInit()/Abc_FrameEnd() 2014-10-22 15:50:06 -07:00
Alan Mishchenko d2e42ec081 Disabling MiniSAT 2.2 for now. 2014-10-21 20:40:50 -07:00
Alan Mishchenko 5c93850553 Compiler problems. 2014-10-21 20:24:13 -07:00
Alan Mishchenko a9317eac75 Preparing to work with C++ code. 2014-10-21 19:37:33 -07:00
Alan Mishchenko 7592aa8a3e Adding commands backup/restore. 2014-10-21 10:51:41 -07:00
Alan Mishchenko bae5e26fb5 Adding switch &qbf -q to quantify functional variables. 2014-10-20 11:00:11 -07:00
Alan Mishchenko 23441c060a Improved QBF solver. 2014-10-18 16:10:18 -07:00
grigora 83a47278a9 Fixed "bm" command hang issue. 2014-10-11 13:30:02 +00:00
Alan Mishchenko f0044175ee Improvements to the parser. 2014-10-10 19:17:19 -07:00
Alan Mishchenko f6c1fc072c Naive (SAT-only) CEC option. 2014-10-10 16:14:48 -07:00
Alan Mishchenko 01e1b6345e Bug fix in the bit-blaster. 2014-10-10 13:46:58 -07:00
Alan Mishchenko 5a4592ee69 Improvements to ISOP. 2014-10-10 13:15:31 -07:00
Alan Mishchenko b8bd21c82d Improvements to ISOP. 2014-10-10 12:59:30 -07:00
Alan Mishchenko e4d5887671 Detection of threshold functions. 2014-10-08 10:41:20 -07:00
Alan Mishchenko 6d79be6b01 Bug fix in move_names. 2014-10-05 11:13:08 -07:00
Alan Mishchenko 734435f441 Deriving cell mapping with &if -kz. 2014-10-04 19:36:41 -07:00
Alan Mishchenko 24083998ab Deriving cell mapping with &if -kz. 2014-10-04 19:18:34 -07:00
Alan Mishchenko fa5f05e3a2 Deriving AIG after cell mapping. 2014-10-03 17:15:43 -07:00
Alan Mishchenko 3f31a8580f Bug fix in Verilog writer. 2014-10-02 14:53:30 -07:00
Alan Mishchenko 889b329d01 Adding switch -R to 'if'. 2014-10-02 13:17:53 -07:00
Alan Mishchenko 6d94b6b1a2 Improvements to bit-blaster. 2014-10-01 22:54:08 -07:00
Alan Mishchenko 27b1e49dee Improvements to bit-blaster. 2014-09-30 20:28:49 -07:00
Alan Mishchenko ed1bf0000e Improvements to bit-blaster. 2014-09-30 19:51:39 -07:00
Alan Mishchenko 69519f86cd Adding options to &flow. 2014-09-29 18:08:57 -07:00
Alan Mishchenko 69b4a92286 Adding options to &flow2. 2014-09-29 16:08:59 -07:00
Alan Mishchenko 4960af4e76 Adding options to &flow. 2014-09-29 14:54:55 -07:00
Alan Mishchenko 05ee370f85 Command to rename files in the same directory. 2014-09-28 20:48:53 -07:00
Alan Mishchenko 0c070a35e5 Adding out-of-bounds checks to AIGER readers. 2014-09-28 12:17:02 -07:00
Alan Mishchenko 98e377bdff Adding features to CNF generation. 2014-09-28 12:10:13 -07:00
Alan Mishchenko fbc9c00fd1 Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter). 2014-09-28 11:32:26 -07:00
Alan Mishchenko 69bd355467 Support for sequential designs in word-level Verilog. 2014-09-26 16:11:36 -07:00
Alan Mishchenko 6aa1c94ea5 Enabling print-out, for each operator, of the percetage of AND nodes after bit-blasting. 2014-09-25 20:33:29 -07:00
Alan Mishchenko a1b4773c77 Printing node type statistics. 2014-09-24 17:29:34 -04:00
Alan Mishchenko 7d21182067 Printing node type statistics. 2014-09-24 13:01:24 -04:00
Alan Mishchenko 4db5e3c02d Printing node type statistics. 2014-09-24 12:46:35 -04:00
Alan Mishchenko ffaad9ba10 Bug fix in handling MUXes in Verilog parser, induced by recent changes. 2014-09-24 09:05:40 -04:00
Alan Mishchenko ad079f7207 Added switch -t to &flow2. 2014-09-24 00:33:16 -04:00
Alan Mishchenko ea9c1c0bff Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:24:54 -04:00
Alan Mishchenko a4d5a9b5bc Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:22:18 -04:00
Alan Mishchenko d9b5aa49f7 Enables dumping stats into a file. 2014-09-23 20:32:37 -04:00
Alan Mishchenko 3f95853f3e Extending &cec to take a single-output miter (usage of switch -d has changed!). 2014-09-23 16:22:21 -04:00
Alan Mishchenko 93e5631cff Debugging the bit-blaster. 2014-09-23 16:04:35 -04:00
Alan Mishchenko 3f6c08dfc6 Debugging the bit-blaster. 2014-09-23 12:54:57 -04:00
Alan Mishchenko 15f5428989 Adding switch to enable SOP balancing in '&flow2'. 2014-09-21 21:40:34 -04:00
Alan Mishchenko 5ce7aa572f Synchronizing packages. 2014-09-20 17:01:47 -07:00
Alan Mishchenko 1fb65889a3 Updating command 'dsd_clean'. 2014-09-20 13:56:26 -07:00
Alan Mishchenko 29494c3a00 Tuning the flow scripts. 2014-09-20 13:15:57 -07:00
Alan Mishchenko b05ee94311 Improvements to Boolean matching. 2014-09-19 14:06:51 -07:00
Alan Mishchenko ee72791293 Improvements to Boolean matching. 2014-09-18 22:26:54 -07:00
Alan Mishchenko 69699da912 Improvements to Boolean matching. 2014-09-18 16:44:04 -07:00
Alan Mishchenko a0ed347992 Improving DSD manager. 2014-09-18 14:50:08 -07:00
Alan Mishchenko 043cfcd775 Concurrency for Boolean matching. 2014-09-18 11:46:14 -07:00
Alan Mishchenko 023e92c470 Improvements to Boolean matching. 2014-09-17 18:58:20 -07:00
Alan Mishchenko 69827a5a88 Improvements to word-level Verilog parser. 2014-09-17 15:20:04 -07:00
Alan Mishchenko ffd77ffedd Improvements to word-level Verilog parser. 2014-09-17 15:14:17 -07:00
Alan Mishchenko ec0b9b6b6e Improvements to word-level Verilog parser. 2014-09-16 22:08:22 -07:00
Alan Mishchenko 288d64d033 New choice computation. 2014-09-16 14:59:28 -07:00
Alan Mishchenko e033a62282 Code restructuring. 2014-09-16 12:13:25 -07:00
Alan Mishchenko 61e58b2d56 Compiler error (duplicate typedef). 2014-09-15 08:54:07 -07:00
Alan Mishchenko 501c3f0b1e Compiler warnings. 2014-09-12 13:53:04 -07:00
Alan Mishchenko 39c68e72e4 Replacing tabs with spaces. 2014-09-12 13:46:11 -07:00
Alan Mishchenko dcb7d0d3fc New word-level representation package. 2014-09-12 13:40:48 -07:00
Alan Mishchenko ae7e286213 Resetting the random seed in 'sparsify'. 2014-09-11 18:50:15 -07:00
Alan Mishchenko 49f2ec22b9 Bug fix in transferring timing info. 2014-09-09 22:50:15 -07:00
Alan Mishchenko 233e12610a Added command 'move_names'. 2014-08-28 13:06:02 -07:00
Alan Mishchenko 79c1928cf9 Added command 'move_names'. 2014-08-28 13:04:47 -07:00
Alan Mishchenko 3c51dd47b5 Tuning LUT mapping flow. 2014-08-28 00:11:24 -07:00
Alan Mishchenko 70a236379b Tuning LUT mapping flow. 2014-08-27 23:17:33 -07:00
Alan Mishchenko 17343bf144 Compiler warning. 2014-08-27 23:03:39 -07:00
Alan Mishchenko ce74153c9f Tuning LUT mapping flow. 2014-08-27 22:59:21 -07:00
Alan Mishchenko 6db6607114 Improvements BLIF parser. 2014-08-27 18:47:45 -07:00
Alan Mishchenko 9c154cfe61 Improvements to DSD balancing. 2014-08-27 12:23:31 -07:00
Alan Mishchenko 66d9a80b3d Adding commands to save/load best network. 2014-08-26 21:28:26 -07:00
Alan Mishchenko 5c30eb10ef Improving GIA interfaces for some procedures. 2014-08-25 17:33:53 -07:00
Alan Mishchenko 47dde4e478 Correcting incorrect handling of timing in several &-commands. 2014-08-25 16:55:39 -07:00
Alan Mishchenko cbbf78e6f4 Improving print-out of 'dsd -p'. 2014-08-22 22:18:38 -07:00
Alan Mishchenko c344f3e38c Propagating timing support to the new synthesis/mapping commands. 2014-08-20 22:12:51 -07:00
Alan Mishchenko 6dbaa4d0f8 Extended command &cone to extract timing critical cones. 2014-08-19 23:30:17 -07:00
Alan Mishchenko 3ef00645b8 Added command 'sparsify' to derive ISF from CSF. 2014-08-18 22:42:48 -07:00
Alan Mishchenko 65f9b73505 Changing default CNF generation in &bmc. 2014-08-18 20:19:32 -07:00
Alan Mishchenko 7c8136c82d Added DSD-based collapsing &dsd. 2014-08-16 18:38:34 -07:00
Alan Mishchenko 97e620a4b7 Adding specialized matching to 'if'. 2014-08-16 18:28:41 -07:00
Alan Mishchenko 06100279cd Added DSD-based collapsing &dsd. 2014-08-16 11:54:49 -07:00
Alan Mishchenko f907347484 Enabling circuit solver in &fraig. 2014-08-12 18:54:43 -07:00
Alan Mishchenko 9055265394 Bug fix in &fraig -L <num>. 2014-08-12 16:23:52 -07:00
Alan Mishchenko 99a917caf3 Bug fix in &fraig -L <num>. 2014-08-12 16:20:03 -07:00
Alan Mishchenko 68ce0bc1c1 Adding delay optimization to synthesis script &syn2. 2014-08-08 12:45:28 -07:00
Alan Mishchenko 35b816dd57 Enabling cofactoring in the mapper. 2014-08-06 14:18:20 -07:00
Alan Mishchenko 1d9d6814ee Enabling ISOP-based minimization in 'collapse' if EXDC is available. 2014-08-04 10:53:08 -07:00
Alan Mishchenko edba505d9d Profiling code for SOP/DSD/LMS balancing. 2014-08-02 17:01:48 -07:00
Alan Mishchenko 62bc45d1fb Changes to the hopelessly limited Verilog parser to skip one-bit bit-ranges, such as [7:7], which seems to help in some cases. 2014-08-02 17:00:24 -07:00
Alan Mishchenko 7fb1954268 Small changes. 2014-07-29 22:49:10 -07:00
Alan Mishchenko 6a69a9139c Adding support for standard-cell mapping. 2014-07-28 11:31:31 -07:00
Alan Mishchenko 704b4bad6b Generating abstraction of standard cell library. 2014-07-26 16:46:45 -07:00
Alan Mishchenko 7d81490fe6 Generating abstraction of standard cell library. 2014-07-25 20:02:56 -07:00
Alan Mishchenko 2cdc5ab850 Bug fix in 'print_gates' due to the mix-up of the inverter. 2014-07-22 17:23:48 -07:00
Alan Mishchenko ba29267563 Small changes. 2014-07-21 22:43:08 -07:00
Alan Mishchenko c0aa9b6a5d Adding new command &sopb for resource-aware SOP balancing. 2014-07-21 13:49:25 -07:00
Alan Mishchenko ea73401db5 Updates and changes to several packages. 2014-07-20 22:11:00 -07:00
Alan Mishchenko 4a861d868c Small changes in several packages. 2014-07-17 09:47:07 -07:00
Alan Mishchenko c58b57e2b4 Improvements to profiling and printing statistics. 2014-07-09 20:22:51 -07:00
Alan Mishchenko b389f2054b Improvements to false path detection. 2014-07-08 23:51:20 -07:00
Alan Mishchenko afcec52a49 Improvements to representation of choices. 2014-07-01 13:05:09 -07:00
Alan Mishchenko 6bc381baa3 Changes to align node IDs in Abc_Ntk_t representing a logic network with Abc_Ntk_t representing an AIG, by skipping object ID number 0 reserved for the constant node. 2014-06-30 15:28:53 -07:00
Alan Mishchenko 1586d96c3e Changes to align node IDs in Abc_Ntk_t representing a logic network with Abc_Ntk_t representing an AIG, by skipping object ID number 0 reserved for the constant node. 2014-06-30 15:21:47 -07:00
Alan Mishchenko 55404ca1af Changes and improvements to different packages. 2014-06-28 14:31:01 -07:00
Alan Mishchenko 933b749676 Changes and improvements to different packages. 2014-06-28 14:25:38 -07:00
Alan Mishchenko a68ec38df1 Changes and improvements to different packages. 2014-06-26 09:51:53 -07:00
Alan Mishchenko 2edf2a970e Improvements to power-aware mapping. 2014-06-23 18:05:51 -07:00
Alan Mishchenko f79d8e4b04 Improvements to CNF generation. 2014-06-23 14:50:46 -07:00
Alan Mishchenko 44d9c7e543 Improvements to CNF generation. 2014-06-23 13:11:59 -07:00
Alan Mishchenko f93e524421 Added command &mux_profile. 2014-06-22 17:08:21 -07:00
Alan Mishchenko 13dd4eeb59 Experiments with balancing. 2014-06-22 00:50:07 -07:00
Alan Mishchenko 1e76ebdf3b New tools for profiling verification miters. 2014-06-20 17:51:35 -07:00
Alan Mishchenko f04d32732b Added quick GIG parser. 2014-06-19 21:16:30 -07:00
Alan Mishchenko f98f610bab Added delay-oriented balancing to unmapping in &st. 2014-06-19 19:12:10 -07:00
Alan Mishchenko 85e23c8459 Various changes to enable better CNF generation. 2014-06-17 21:00:51 -07:00
Alan Mishchenko a03a726de2 Bug fix in writing latch init values in 'write_aiger'. 2014-06-17 14:21:28 -07:00
Alan Mishchenko dd867b404a Added transformation of CEX after 'fix_aig' and checking of transformed CEXes using 'testcex -a'. 2014-06-17 12:21:48 -07:00
Alan Mishchenko e20364896e Bug fix in CEC generation after rarity simulation and few small changes. 2014-06-16 16:46:39 -07:00
Alan Mishchenko 2340d279bd Adding support of multi-output problems in &splitprove. 2014-06-15 22:58:25 -07:00
Alan Mishchenko e2637595f8 Updates and bug fixes. 2014-06-15 16:28:05 -07:00
Alan Mishchenko cf993a9d90 Adding more features to the synthesis script &syn2. 2014-06-14 19:03:05 -07:00
Alan Mishchenko 0ac22c9e1d Specializing some truth-table functions to 6 inputs. 2014-06-14 18:29:19 -07:00
Alan Mishchenko fcdd9148b4 Various modifications. 2014-06-12 21:27:14 -07:00
Alan Mishchenko 865f6fd43f Enabling switching activity. 2014-06-12 11:28:47 -07:00
Alan Mishchenko 082e5dc1b0 Integrating recent changes. 2014-06-12 11:08:54 -07:00
Alan Mishchenko 0d1a1c4624 Adding switch to &st to convert to larger gates. 2014-06-11 22:21:55 -07:00
Alan Mishchenko 93d89eaaeb Various modifications. 2014-06-10 21:31:10 -07:00
Alan Mishchenko 6ce9ac9bbd Skip 'scorr' when the network has no primary inputs. 2014-06-09 08:14:45 -07:00
Alan Mishchenko 3c6def2915 Adding print-out to &splitprove to see impact of cof variable on AIG size. 2014-06-07 13:14:23 -07:00
Alan Mishchenko 2d38fc1608 Adding print-out to &splitprove to see impact of cof variable on AIG size. 2014-06-07 13:04:03 -07:00
Alan Mishchenko 8a341c200f Adding a feature to collapse hierarhical AIGs. 2014-06-05 19:15:40 -07:00
Alan Mishchenko 78e09e9119 Correcting switching activity computation. 2014-06-05 17:00:04 -07:00
Alan Mishchenko c5b620b9bf Fixed printout of in the hierarchy log file. 2014-06-05 11:17:32 -07:00
Alan Mishchenko 3abc3fb4ff Fixed printout of in the hierarchy log file. 2014-06-05 10:57:04 -07:00
Alan Mishchenko 54d3c1ab42 Fixed printout of in the hierarchy log file. 2014-06-05 10:46:43 -07:00
Alan Mishchenko 7c8e1b8de6 Fixed printout of in the hierarchy log file. 2014-06-05 10:45:59 -07:00
Jiang Long f18b0254c8 ci 2014-06-04 23:21:13 -07:00
Jiang Long fcbd6f83ec the latest version 2014-06-04 22:49:44 -07:00
Jiang Long 574af21208 merge unfold2 2014-06-04 21:59:03 -07:00
Alan Mishchenko ed695b74ee Adding CEC command &splitprove. 2014-06-04 17:10:22 -07:00
Alan Mishchenko 87143c1182 Adding CEC command &splitprove. 2014-06-04 16:50:39 -07:00
Alan Mishchenko b844433a0d Adding CEC command &splitprove. 2014-06-04 15:00:38 -07:00
Alan Mishchenko f2818ddb83 Adding CEC command &splitprove. 2014-06-04 12:00:37 -07:00
Alan Mishchenko 97bd9d8f1b Adding CEC command &splitprove. 2014-06-04 11:40:37 -07:00
Alan Mishchenko ab1e4ed7f1 Merging two branches. 2014-06-04 09:12:01 -07:00
Alan Mishchenko 5c0c8e1ae2 Fix PLA reader to correctly report error file numbers. 2014-06-02 17:27:21 -07:00
Alan Mishchenko e69854f540 Adding CEC command &splitprove. 2014-06-02 09:55:17 -07:00
Alan Mishchenko 3d8eff2cdc Corner-cases in &gprove and &mprove. 2014-06-01 23:49:52 -07:00
Alan Mishchenko ebf10fdc33 Allow delay increase to be negative in 'mfs2'. 2014-05-31 12:03:35 -07:00
Alan Mishchenko ccaa96549f Fixing the problem with 'phase -c'. 2014-05-29 10:39:55 -07:00
Alan Mishchenko bfa48cef2a Experiment with support minimization. 2014-05-27 01:12:00 +09:00
Alan Mishchenko ed1a925c61 Adding symbolic fault representation in &fftest. 2014-05-23 00:13:03 +09:00
Alan Mishchenko fee0da2310 Experiment with support minimization. 2014-05-22 16:41:11 +09:00
Alan Mishchenko 824ee5b4f3 Adding symbolic fault representation in &fftest. 2014-05-22 15:59:01 +09:00
Alan Mishchenko 79c62d22fc Simple version of ECO. 2014-05-21 22:32:08 +09:00
Alan Mishchenko 8160721240 Experiment with support minimization. 2014-05-21 22:11:44 +09:00
Alan Mishchenko fe5b5ffe19 Experiment with new idea for ISO. 2014-05-21 20:03:39 +09:00
Alan Mishchenko 368de31ae2 Simple version of ECO. 2014-05-21 12:40:20 +09:00
Alan Mishchenko 0e5b950ec6 Adding comment to usage message in 'pdr' regarding invariant dumped when init-state is not all-0. 2014-05-20 22:50:21 +09:00
Alan Mishchenko f30160f4be Adding symbolic fault representation in &fftest. 2014-05-19 21:10:19 +09:00
Alan Mishchenko 911b801f20 Adding symbolic fault representation in &fftest. 2014-05-14 20:28:55 +09:00
Baruch Sterin 26c92f161a add an option to write_cex to write the CEX in AIGER 1.9 format. 2014-05-12 15:20:17 -07:00
Alan Mishchenko b902b6843c Adding duplicator of the design manager. 2014-05-12 13:52:28 +08:00
Alan Mishchenko 954ab62ce6 Bug fix in handling barrier buffers. 2014-05-11 22:13:40 +07:00
Alan Mishchenko 0a79a38a4d Adding duplicator of the design manager. 2014-05-10 02:42:16 +07:00
Alan Mishchenko f39369a415 Adding switch -C <num> to 'amap' to control max number of cuts at a node. 2014-05-09 19:01:22 +07:00
Alan Mishchenko 421362f709 Bug fix in a recent code for mapping. 2014-05-04 23:55:19 +08:00
Alan Mishchenko 5acb147f61 Exploration of functions. 2014-04-28 15:33:15 -07:00
Alan Mishchenko fd1ed5b232 Added dumping original object names into a file. 2014-04-28 12:56:32 -07:00
Alan Mishchenko 6095b15174 Added dumping original object names into a file. 2014-04-26 23:47:54 -07:00
Alan Mishchenko 37703eaaa8 Exploration of functions. 2014-04-26 19:28:12 -07:00
Alan Mishchenko 857688b95e Exploration of functions. 2014-04-26 19:21:06 -07:00
Alan Mishchenko 8de7816daf Exploration of MFFCs. 2014-04-26 13:14:38 -07:00
Alan Mishchenko d948ef80bd Added command 'cubeenum'. 2014-04-23 11:31:38 -07:00
Alan Mishchenko 4f09348367 Experiments with permutations. 2014-04-23 09:52:35 -07:00
Alan Mishchenko d80efa1b49 Bug fix in if -g when choices are used. 2014-04-22 18:31:46 -07:00
Alan Mishchenko 375b46a355 Experiments with permutations. 2014-04-21 21:47:34 -07:00
Alan Mishchenko 76f2adb54f Adding color to sizing stats. 2014-04-19 22:44:18 -07:00
Alan Mishchenko 606fed3b84 Added optimization for average rather than maximum delay. 2014-04-19 19:57:32 -07:00
Alan Mishchenko e868d057bb Added structural hashing by default after if -g and &if -g. 2014-04-19 18:41:45 -07:00
Alan Mishchenko 1bca32bae3 Improvements to DSD balancing. 2014-04-19 17:13:00 -07:00
Alan Mishchenko d0c4c0cd7b Improvements to DSD balancing. 2014-04-19 16:55:44 -07:00
Alan Mishchenko 1efdd3726d Preserving outputs names in the &-space. 2014-04-18 10:10:49 -07:00
Alan Mishchenko 02cf869391 Changes in the LUT mapper data-structures. 2014-04-14 09:06:14 -05:00
Alan Mishchenko e7d0c9dc23 New feature to optimize delay during mapping. 2014-04-11 13:07:56 -07:00
Alan Mishchenko e855eaa080 Improvements to DSD in technology mapping. 2014-04-11 12:01:36 -07:00
Alan Mishchenko 80110cc328 New feature to optimize delay during mapping. 2014-04-11 11:01:54 -07:00
Alan Mishchenko b50894ab64 Removed obsolete code for sequential mapping. 2014-04-11 09:17:34 -07:00
Alan Mishchenko 0fef5d6031 Command to test console colors. 2014-04-10 17:47:41 -07:00
Alan Mishchenko 4bafc98aba Pass file name correctly. 2014-04-10 15:44:26 -07:00
Alan Mishchenko 1c582413da Adding new code to support barrier buffers. 2014-04-09 16:41:58 -07:00
Alan Mishchenko 91d80a63d8 Updating cost function to be the number of edges in ps -b. 2014-04-09 14:32:46 -07:00
Alan Mishchenko 46ab68ba17 Cleanup and bug fixing in hierarchy handling. 2014-04-09 12:51:08 -07:00
Alan Mishchenko b94b810297 Renamed Abc_Lib_t into Abc_Des_t and removed some dead code. 2014-04-09 10:16:07 -07:00
Alan Mishchenko 5374797be1 Adding switch to control area/delay quality tradeoff in 'amap'. 2014-04-08 22:15:55 -07:00
Alan Mishchenko 80d2eef712 Adding switch to control area/delay quality tradeoff in 'amap'. 2014-04-08 19:22:41 -07:00
Alan Mishchenko 42927d5ebb Adding command to dump UNSAT core of BMC instance. 2014-04-07 14:10:51 -07:00
Alan Mishchenko af6705a8b1 Implementation of DSD balancing. 2014-04-06 21:22:10 -07:00
Alan Mishchenko f1f1cf3eb1 Improvement in SOP balancing. 2014-04-06 15:54:02 -07:00
Alan Mishchenko a26d61f47d Improvement in SOP balancing. 2014-04-06 15:21:07 -07:00
Alan Mishchenko 2a399042ba Improvement in SOP balancing. 2014-04-06 12:26:25 -07:00
Alan Mishchenko 9c502b70f3 Preparing new implementation of SOP/DSD balancing in 'if' mapper. 2014-04-05 22:51:01 -07:00
Alan Mishchenko 5608d947ed Preparing new implementation of SOP/DSD balancing in 'if' mapper. 2014-04-05 11:06:35 -07:00
Alan Mishchenko 6ab0d68d56 Tuning LUT mapping to work while saving the best network. 2014-04-04 16:38:46 -07:00
Alan Mishchenko f6ae0e41f3 Better CEX minimization and renaming of write_counter into write_cex. 2014-04-04 13:14:16 -07:00
Alan Mishchenko d82be1fd05 Improvements to technology mapping. 2014-04-03 14:40:43 -07:00
Alan Mishchenko c1670d7444 Improvements to technology mapping. 2014-04-03 13:52:13 -07:00
Alan Mishchenko 7b8863466e Adding switch to handle only single faults. 2014-04-01 11:53:08 -07:00
Alan Mishchenko 1c56a92a6c Undoing previous change, which was made by mistake. 2014-03-31 22:16:47 -07:00
Alan Mishchenko 679e38b012 Making per-output timeout in bmc3 -a and pdr -a work in CLOCKS_PER_SECs instead of miliseconds. 2014-03-31 22:03:22 -07:00
Alan Mishchenko fa1fafe4de Adding functionally observable fault testing. 2014-03-31 21:33:02 -07:00
Alan Mishchenko f0b6795194 Improving cut computation. 2014-03-30 23:48:20 -07:00
Alan Mishchenko 473c584563 Mismatch in bmc3 printout. 2014-03-30 14:21:23 -07:00
Alan Mishchenko 2f926f2faf Improving cut computation. 2014-03-30 12:07:49 -07:00
Alan Mishchenko 7d500c8920 Updating &if for new cut function representation. 2014-03-29 22:14:15 -07:00
Alan Mishchenko ba4ed5b16c Experiments with technology mapping. 2014-03-29 20:58:15 -07:00
Alan Mishchenko 14f69d77fd Adding per-output logging to bmc3. 2014-03-29 10:28:20 -07:00
Alan Mishchenko 4745eac324 Improving network visualization in show/&show. 2014-03-28 15:32:29 -07:00
Alan Mishchenko c0f688349d Adding a feature to dump untestable multiple faults. 2014-03-28 13:47:00 -07:00
Alan Mishchenko 6cb3817a91 Ternary simulation for multi-output miters. 2014-03-28 11:05:12 -07:00
Alan Mishchenko c6663b04c7 Experiments with stuck-at fault testing. 2014-03-24 22:48:37 -07:00
Alan Mishchenko 6f17c44e91 Integrating barrier buffers into the mapper. 2014-03-23 16:52:40 -07:00
Alan Mishchenko f6eb5262a3 Experiments with mapping. 2014-03-23 11:05:26 -07:00
Alan Mishchenko c26f7cf331 Experiments with mapping. 2014-03-23 11:00:26 -07:00
Alan Mishchenko b13e65882d Experiments with stuck-at fault testing. 2014-03-23 10:47:08 -07:00
Alan Mishchenko b5df218dc4 Experiments with mapping. 2014-03-22 19:39:19 -07:00
Alan Mishchenko ace340997b Experiments with mapping. 2014-03-22 16:24:44 -07:00
Alan Mishchenko c86a13f0b5 Experiments with recent ideas. 2014-03-20 20:18:25 -07:00
Alan Mishchenko d44d9e2927 Experiments with recent ideas. 2014-03-19 23:49:27 -07:00
Alan Mishchenko 86d3c72beb Experiments with recent ideas. 2014-03-19 22:15:02 -07:00
Alan Mishchenko 37bbbcb2b4 Experiments with recent ideas. 2014-03-19 19:31:25 -07:00
Alan Mishchenko e34d41b374 Experiments with recent ideas. 2014-03-19 17:57:34 -07:00
Alan Mishchenko ffa881bce2 Experiments with recent ideas. 2014-03-19 15:54:50 -07:00
Alan Mishchenko 83cd20d647 Experiments with recent ideas. 2014-03-18 19:12:32 -07:00
Alan Mishchenko a1cdcb0b43 Updating code to support barrier buffers. 2014-03-18 17:50:53 -07:00
Alan Mishchenko faf9c2015a Updating code to support barrier buffers. 2014-03-18 14:20:03 -07:00
Alan Mishchenko f329105403 Adding barrier buffers. 2014-03-18 12:51:39 -07:00
Alan Mishchenko 79b585848b Adding barrier buffers. 2014-03-18 10:30:49 -07:00
Alan Mishchenko 455ecb6acc Adding barrier buffers. 2014-03-17 14:01:03 -07:00
Alan Mishchenko 12c8a54cff Adding barrier buffers. 2014-03-16 22:12:17 -07:00
Alan Mishchenko 89eed1aaf9 Adding barrier buffers. 2014-03-16 21:56:28 -07:00
Alan Mishchenko eae0455267 Experiments with simulation. 2014-03-14 21:37:34 -07:00
Alan Mishchenko 2eec6c6c17 Experiments with simulation. 2014-03-14 20:59:03 -07:00
Alan Mishchenko 508565ff72 Adding a warning when the current network or AIG has no POs. 2014-03-10 17:22:33 -07:00
Alan Mishchenko 716b8cc6b8 Improvements to print-outs. 2014-03-10 15:48:46 -07:00
Alan Mishchenko b5bde05aba Passing file name for stats print-out in &ps. 2014-03-09 22:25:29 -07:00
Alan Mishchenko ff997b1b65 Changes to LUT mappers. 2014-03-09 20:49:12 -07:00
Alan Mishchenko c97a9c0d18 Changes to LUT mappers. 2014-03-09 20:21:09 -07:00
Alan Mishchenko 4ad49af5b3 Compiler warnings. 2014-03-09 12:15:15 -07:00
Alan Mishchenko cc6c8b2f2a Experiments with stuck-at fault testing. 2014-03-09 12:11:49 -07:00
Alan Mishchenko e5d552138a Changes to LUT mappers. 2014-03-08 23:53:15 -08:00
Alan Mishchenko 76e35126e7 Changes to LUT mappers. 2014-03-08 22:57:33 -08:00
Alan Mishchenko 12c68e7e8e Changes to LUT mappers. 2014-03-08 19:56:36 -08:00
Alan Mishchenko 4b0c12eb1e Changes to LUT mappers. 2014-03-08 17:09:20 -08:00
Alan Mishchenko a8a08035f5 Changes to LUT mappers. 2014-03-06 21:48:15 -08:00
Alan Mishchenko 839632140e Changes to LUT mappers. 2014-03-06 21:21:02 -08:00
Alan Mishchenko 5b3d4b7de2 Experiments with delay fault testing. 2014-03-05 22:09:01 -08:00
Alan Mishchenko 5f9ca14a7f Changes to LUT mappers. 2014-03-04 14:48:36 -08:00
Alan Mishchenko 8f4854890c Changes to LUT mappers. 2014-02-28 21:14:22 -08:00
Alan Mishchenko 3d6eac52ab Changes to LUT mappers. 2014-02-28 21:06:21 -08:00
Alan Mishchenko b556c2591e Changes to LUT mappers. 2014-02-27 21:11:05 -08:00
Alan Mishchenko caa2227b11 Changes to LUT mappers. 2014-02-25 22:41:34 -08:00
Alan Mishchenko 4216976321 g++ compiler errors. 2014-02-25 07:54:53 -08:00
Alan Mishchenko 6ad7dae1ae Changes to LUT mappers. 2014-02-17 18:28:48 -08:00
Alan Mishchenko eb66ce9c31 Changes to LUT mappers. 2014-02-17 12:19:42 -08:00
Alan Mishchenko 2140c1298c Removing unused LMS code. 2014-02-16 19:49:10 -08:00
Alan Mishchenko 46532e6c2f Significant improvement to LUT mappers (if, &if). 2014-02-16 19:30:38 -08:00
Alan Mishchenko ea1baf6f70 Changing 'miter' to compute SEQUENTIAL miter by default. 2014-02-15 16:54:08 -08:00
Alan Mishchenko d5253839b9 Fixing timeout in &icheck. 2014-02-15 16:52:32 -08:00
Alan Mishchenko d3c42bb96a Experiments with inductive don't-cares. 2014-02-15 11:23:10 -08:00
Alan Mishchenko e1a80a3d01 Experiments with inductive don't-cares. 2014-02-15 10:09:55 -08:00
Alan Mishchenko 246e3a8850 Bug fix in arrival/departure time representation. 2014-02-13 20:38:48 -08:00
Alan Mishchenko 61ce18e1ef Adding APIs to specified input/output arrival/required times. 2014-02-12 22:09:44 -08:00
Alan Mishchenko 48e04c8f22 Extendig the size of command line when running ABC in batch mode. 2014-02-12 21:34:09 -08:00
Alan Mishchenko ee72a4caf6 Experiments with inductive don't-cares. 2014-02-12 12:05:23 -08:00
Alan Mishchenko 646b2169f0 Experiments with inductive don't-cares. 2014-02-11 20:46:48 -08:00
Alan Mishchenko 56110efaad Experiments with inductive don't-cares. 2014-02-11 20:30:53 -08:00
Alan Mishchenko 818aa231ce Experiments with inductive don't-cares. 2014-02-11 19:30:57 -08:00
Alan Mishchenko 0ff5925248 Experiments with inductive don't-cares. 2014-02-11 11:58:25 -08:00
Alan Mishchenko 367b02aecd Experiments with inductive don't-cares. 2014-02-10 22:21:23 -08:00
Alan Mishchenko 3e21258285 Commenting out warnings about combinational network during retiming. 2014-02-09 20:27:04 -08:00
Alan Mishchenko 68587eb467 Improving switching activity computation. 2013-12-30 15:15:43 +07:00
Alan Mishchenko 07bb26ba08 Improving switching activity computation. 2013-12-30 14:47:07 +07:00
Alan Mishchenko 737e4671ce Adding check for the presence of precomputed data. 2013-12-29 14:39:25 +07:00
Alan Mishchenko 227963f03d New command &write_cnf. 2013-12-18 00:22:26 +07:00
Baruch Sterin c5a0ce9063 add a new command line option to ABC, -q, same as -c, but without echoing the command 2013-12-07 00:44:57 -08:00
Alan Mishchenko 539f05c09f Upgrading command 'print_supp'. 2013-12-04 00:18:07 -08:00
Alan Mishchenko 681483c904 Bug fixes in the above patches. 2013-12-03 00:38:37 -08:00
Alan Mishchenko 34ab59574e Suggested patch of AIG writers. 2013-12-03 00:26:43 -08:00
Alan Mishchenko c8f341fd01 Patching ABC for Yosys. 2013-11-27 19:02:52 -08:00
Alan Mishchenko 55ba5a3e4c Patching ABC for Yosys. 2013-11-27 18:53:22 -08:00
Alan Mishchenko 9cbba3cce7 Patching ABC for Yosys. 2013-11-27 12:28:30 -08:00
Alan Mishchenko e73e5438ca Patching ABC for Yosys. 2013-11-27 12:17:00 -08:00
Alan Mishchenko ee50e84e57 Structural mapper into structures. 2013-11-26 23:19:22 -08:00
Alan Mishchenko 71166f602a Structural mapper into structures. 2013-11-24 21:21:01 -08:00
Alan Mishchenko 9de629ff59 Add command 'splitsop' to split large node SOPs into smaller ones. 2013-11-23 19:52:00 -08:00
Alan Mishchenko 00efa68053 Several changes to allow Liberty files without delay info. 2013-11-21 12:58:13 -08:00
Alan Mishchenko b21447b6df Bug fix in writing constants in write_verilog. 2013-11-21 11:39:57 -08:00
Alan Mishchenko a4325272c2 Adding switch to control the number of nodes tried in mfs2. 2013-11-14 23:50:17 -08:00
Alan Mishchenko 4e00ec6169 Structural mapper into structures. 2013-11-12 16:03:18 -08:00
Alan Mishchenko e70adbcd2d Improvements to the standard cell flow. 2013-11-08 15:16:13 -08:00
Alan Mishchenko 4774dc56fe Fixing the wire-load approximation problem. 2013-11-07 10:24:47 -08:00
Alan Mishchenko 66b6593513 Specialized inductive check. 2013-11-05 19:37:46 -08:00
Alan Mishchenko 053c9f54e4 Tuning for multi-ouptut solver. 2013-11-05 11:25:05 -08:00
Alan Mishchenko 5dce71d57a Tuning for multi-ouptut solver. 2013-11-04 22:46:10 -08:00
Alan Mishchenko a1d2ba0fcc Tuning for multi-ouptut solver. 2013-11-04 22:30:27 -08:00
Alan Mishchenko a564e2ab81 Sweeper internal verification and new switch for &cfraig. 2013-11-01 13:36:51 -04:00
Alan Mishchenko 3b8095a671 Sweeper condition complement bug-fix and code for internal verification. 2013-11-01 12:11:46 -04:00
Alan Mishchenko ec298486b6 False path detection. 2013-10-31 23:42:06 -04:00
Alan Mishchenko 34366b8aca Specialized induction check. 2013-10-31 20:30:40 -04:00
Alan Mishchenko 313caa456a False path detection. 2013-10-31 16:36:08 -04:00
Alan Mishchenko 6582e10a82 Specialized induction check. 2013-10-31 14:18:31 -04:00
Alan Mishchenko f620a857d3 Specialized induction check. 2013-10-31 13:07:43 -04:00
Alan Mishchenko b259a62d40 Compiler warnings. 2013-10-30 13:52:26 -04:00
Alan Mishchenko 2b85ef06e5 Compiler warnings. 2013-10-30 13:45:00 -04:00
Alan Mishchenko 80f46fa2ae Compiler warnings. 2013-10-30 10:29:44 -04:00
Alan Mishchenko e3f9ad3c97 New BMC engine. 2013-10-27 22:55:23 -07:00
Alan Mishchenko d65d8528b6 New BMC engine. 2013-10-27 22:39:58 -07:00
Alan Mishchenko 3b30fb2a11 Multi-output property solver. 2013-10-26 23:05:13 -07:00
Alan Mishchenko 9437664596 Multi-output property solver. 2013-10-26 21:29:57 -07:00
Alan Mishchenko 47afd0f4f4 Multi-output property solver. 2013-10-23 16:26:13 -07:00
Alan Mishchenko 8ad1729aa9 Adding new synthesis scripts. 2013-10-23 10:44:11 -07:00
Alan Mishchenko cb4631e64e Compiler warnings. 2013-10-17 18:04:07 -07:00
Alan Mishchenko 4ab7905b72 Fix for writing choices into a BLIF file. 2013-10-16 13:33:51 -07:00
Alan Mishchenko f9900a4c3b Adding switch 'pdr -i' to start push_clauses from an intermediate timeframe. 2013-10-15 09:04:27 -07:00
Alan Mishchenko 1692c1a57a Improvements to buffering and sizing. 2013-10-13 23:08:52 -07:00
Alan Mishchenko f8410b532b Improvements to buffering and sizing. 2013-10-12 22:51:43 -07:00
Alan Mishchenko 2c7f39026a Extending truth table support in &jf for more than 6 inputs. 2013-10-10 14:45:19 -07:00
Alan Mishchenko 33695bed11 Improvements to the canonical form computation. 2013-10-10 12:35:27 -07:00
Alan Mishchenko 12aab154c3 CNF generating using new mapper. 2013-10-10 01:18:15 -07:00
Alan Mishchenko 6ea3a35b03 Upgrading 'mfs2' to consider some nodes as having no level. 2013-10-09 22:30:38 -07:00
Alan Mishchenko 7d56aabab6 Upgrading 'mfs2' to consider some nodes as having no level. 2013-10-09 22:30:03 -07:00
Alan Mishchenko 608fe4e3bd Towards better Boolean matching. 2013-10-09 21:31:57 -07:00
Alan Mishchenko 51fb9e4ed4 Towards better Boolean matching. 2013-10-09 18:58:49 -07:00
Alan Mishchenko 8a03e530c2 Resubstitution code. 2013-10-06 15:57:17 -07:00
Alan Mishchenko a4a1053d98 Towards better Boolean matching. 2013-10-05 22:44:02 -07:00
Alan Mishchenko c59121f4e0 Bug fix and performance improvement in &iso. 2013-10-03 16:33:41 -07:00
Alan Mishchenko 6132d7cb10 Experiment with the AIG package. 2013-10-03 12:25:27 -07:00
Alan Mishchenko cfa7be1a07 Integrating synthesis into the new BMC engine. 2013-10-02 22:58:23 -07:00
Alan Mishchenko 38e577f5df Enabling counter-example generation in the new BMC engine. 2013-10-02 21:41:01 -07:00
Alan Mishchenko 7b99370e0a Changing default values. 2013-10-02 14:36:33 -07:00
Alan Mishchenko 19c361e387 Changes in specialized matching. 2013-10-02 12:55:20 -07:00
Alan Mishchenko 16f7903697 Changes in specialized matching. 2013-10-01 00:43:43 -07:00
Alan Mishchenko 1fb7ef8153 Converting mapped AIG into strashed AIG. 2013-09-30 22:41:55 -07:00
Alan Mishchenko cb845d4488 Changing default values. 2013-09-30 13:39:14 -07:00
Alan Mishchenko 846da1d2c7 Changing default values. 2013-09-30 13:33:39 -07:00
Alan Mishchenko 726e70392c Changing default values. 2013-09-30 01:00:25 -07:00
Alan Mishchenko 62439be84d New logic sharing extraction. 2013-09-29 23:14:00 -07:00
Alan Mishchenko 2a83a97164 Changing default values. 2013-09-28 23:56:08 -07:00
Alan Mishchenko 797cb49584 Changing default values. 2013-09-28 23:14:43 -07:00
Alan Mishchenko 68011de615 Improving printouts in sharing extraction. 2013-09-28 22:42:01 -07:00
Alan Mishchenko 5f97f5cffa New logic sharing extraction. 2013-09-28 20:19:53 -07:00
Alan Mishchenko 61ee156b72 New logic sharing extraction. 2013-09-28 18:35:38 -07:00
Alan Mishchenko a7fcdf20ab Performance balancing command &b. 2013-09-27 18:50:23 -07:00
Alan Mishchenko 4a74b7ced9 Generation of plain AIG after mapping. 2013-09-27 14:45:55 -07:00
Alan Mishchenko 940cf7f98b Generation of plain AIG after mapping. 2013-09-27 13:30:36 -07:00
Alan Mishchenko debbf4d807 Bug fix. 2013-09-27 10:09:57 -07:00
Alan Mishchenko 531657105b Improving DAG-aware unmapping. 2013-09-25 15:29:01 -07:00
Alan Mishchenko ee11ee1833 Changes to enable decomposition of non-DSD functions. 2013-09-25 13:18:21 -07:00
Alan Mishchenko cab8301065 Changing switch -R <num> in &gla to mean the max allowed size of abstraction. Adding switch -Q <num> to stop when the number of objects exceeds num % _during_refinement_. 2013-09-23 10:57:15 -07:00
Alan Mishchenko eec94a70f1 Adding API to return the mapped network. 2013-09-22 23:18:40 -07:00
Alan Mishchenko d61bedc627 Adding API to return the mapped network. 2013-09-22 16:23:57 -07:00
Alan Mishchenko cfebcae125 Adding resource limit to stop &gla when the number of remaining objects is less than R/2 during refinement. 2013-09-21 17:55:59 -04:00
Alan Mishchenko d4bd7846c3 Added bridge integration for multi-output 'bmc3 -a'. 2013-09-17 23:19:54 -07:00
Alan Mishchenko efa6b54b5e Debugging and finetuning the flow. 2013-09-17 21:47:39 -07:00
Alan Mishchenko 73a997a8bd Adding commands to set and print timing constraints. 2013-09-17 14:47:34 -07:00
Alan Mishchenko 7d3976a763 Unifying standard cell library representations. 2013-09-17 13:16:20 -07:00
Alan Mishchenko 105648bf7c Adding switch to enable reuse of proof-obligations in the last timeframe. 2013-09-16 22:57:50 -07:00
Alan Mishchenko 2ba12a76ff Adding new switch to &if to relax the delay. 2013-09-16 22:50:39 -07:00
Alan Mishchenko 653dc8cff5 Added bridge integration for multi-output 'pdr -a'. 2013-09-16 14:46:07 -07:00
Alan Mishchenko 3b1cf0976c Added bridge integration for multi-output 'pdr -a'. 2013-09-16 14:39:37 -07:00
Alan Mishchenko ff5d3591d1 Infrastructure to support full Liberty format and unitification of library representations. 2013-09-15 18:23:49 -07:00
Alan Mishchenko a4087e45f0 Enabling additional printouts in 'pdr'. 2013-09-13 17:36:29 -07:00
Alan Mishchenko 27be3d0185 Added command &struct for profiling non-dec structures. 2013-09-13 17:25:31 -07:00
Alan Mishchenko dfb43b2f58 Fix a bug in 'zeropo'. 2013-09-13 09:52:54 -07:00
Alan Mishchenko 7312ff3c4a Improvements to the new technology mapper. 2013-09-12 23:14:39 -07:00
Alan Mishchenko 75fee10708 Improvements to the new technology mapper. 2013-09-12 22:37:26 -07:00
Alan Mishchenko 14606c473e Improvements to the new technology mapper. 2013-09-12 17:53:41 -07:00
Alan Mishchenko b1b0202c05 Command '&slice' to cut out the bottom part of the AIG. 2013-09-11 14:38:08 -07:00
Alan Mishchenko 66b1d4de54 Small performance bug in new 'fx'. 2013-09-11 13:10:31 -07:00
Alan Mishchenko 0e256dc2c2 Updates for the new BMC engine. 2013-09-10 22:12:42 -07:00
Alan Mishchenko 8430b6dad4 New API to return the set of all reachable states as an AIG. 2013-09-10 14:51:47 -07:00
Alan Mishchenko d4c70cb6c1 Updates for the new BMC engine. 2013-09-09 23:12:01 -07:00
Alan Mishchenko 48db1c3a04 Improvements to the new technology mapper. 2013-09-09 00:15:01 -07:00
Alan Mishchenko 00bc43982e Improvements to the &ps. 2013-09-08 00:49:35 -07:00
Alan Mishchenko 5201509597 Improvements to the new technology mapper. 2013-09-07 18:49:32 -07:00
Alan Mishchenko 137a766207 Improvements to the new technology mapper. 2013-09-07 16:41:35 -07:00
Alan Mishchenko 23879f9200 Unifying parameters for the &ps command. 2013-09-05 20:40:50 -07:00
Alan Mishchenko 9d14b0c094 Updates for the new BMC engine. 2013-09-05 19:32:45 -07:00
Alan Mishchenko 8de1080272 Updates for the new BMC engine. 2013-09-05 15:54:52 -07:00
Alan Mishchenko e9d0466494 Updates for the new BMC engine. 2013-09-05 15:39:18 -07:00
Alan Mishchenko e651e22788 Adding check to &sim3 for the case when the AIG is combinational. 2013-09-05 12:57:55 -07:00
Alan Mishchenko f53e56e822 Improved unrolling manager. 2013-09-05 01:44:44 -07:00
Alan Mishchenko f591f1cd9a Added Python API status_get_vector() similar to cex_get_vector(). 2013-09-04 17:25:40 -07:00
Alan Mishchenko 30c2c48a65 Adding switch 'ps -s' to skip counting buffers/inverters as nodes. 2013-09-02 23:21:55 -07:00
Alan Mishchenko d1b9ade535 Adding switch 'ps -s' to skip counting buffers/inverters as nodes. 2013-09-02 23:15:15 -07:00
Alan Mishchenko b6cb626a12 Removing some old useless code. 2013-09-02 22:14:20 -07:00
Alan Mishchenko e16e3edae8 Removing some old useless code. 2013-09-02 22:10:27 -07:00
Alan Mishchenko 9914c16868 Adding interpolant computation sat_solver2. 2013-09-02 15:14:49 -07:00
Alan Mishchenko 57b9a9fe13 Modify level computation to take discretized arrival times into account. 2013-09-02 11:07:05 -07:00
Alan Mishchenko 5023be4aa0 Adding switch &get -m to import mapped network into the &-space. 2013-09-01 19:37:47 -07:00
Alan Mishchenko e2f11e14d0 Adding switch &get -m to import mapped network into the &-space. 2013-09-01 19:34:32 -07:00
Alan Mishchenko a495163f74 Buf fixes and minor changes to the &if mapper. 2013-08-29 14:41:01 -07:00
Alan Mishchenko 1ad363c156 Added switch &sim -g to enable flop grouping. 2013-08-20 08:46:31 -07:00
Alan Mishchenko 3459683e3b Extending 'permute' to handle user-specified flop permutation. 2013-08-16 13:13:38 -07:00
Alan Mishchenko 0916417e2e Enabling LUT decomposition in two special cases. 2013-08-14 12:10:55 -07:00
Alan Mishchenko ee1e20ddf8 Enabling additional matching feature in the LUT mapper. 2013-08-12 23:34:54 -07:00
Alan Mishchenko fcfafb0601 Enabling additional matching feature in the LUT mapper. 2013-08-12 23:27:20 -07:00
Alan Mishchenko d4ad3b4156 Improvements to buffering and sizing. 2013-08-09 19:47:58 -07:00
Alan Mishchenko 881b2ec46f Integrated buffering and sizing. 2013-08-08 18:23:00 -07:00
Alan Mishchenko 8576e4b440 Improvements to buffering and sizing. 2013-08-06 22:51:39 -07:00
Alan Mishchenko 7a6f335ea6 Improvements to buffering and sizing. 2013-08-06 12:22:13 -07:00
Alan Mishchenko 1a55882ad9 Adding new (un)buffering with phase information. 2013-08-05 18:33:38 -07:00
Alan Mishchenko f1615dccd5 Code for parsing the transcripts. 2013-08-02 23:15:37 -07:00
Alan Mishchenko da60781c13 SAT solver with dynamic CNF loading. 2013-08-01 19:01:53 -07:00
Alan Mishchenko f253e7aa41 Code for parsing the transcripts. 2013-07-30 21:48:02 -07:00
Alan Mishchenko f10480f9bc Parametrizing standard-cell mapper to account for the fanout delay. 2013-07-30 00:18:57 -07:00
Alan Mishchenko f09a704250 Added commands 'maxsize' and 'unbuffer'. 2013-07-29 21:01:05 -07:00
Alan Mishchenko 675f2bbf2d Compiler warning. 2013-07-29 19:13:09 -07:00
Alan Mishchenko a206287b21 Adding support for input slew and output capacitance to timer and gate-sizer (bug fix). 2013-07-24 11:42:37 -07:00
Alan Mishchenko 00d023713b Tuning standard-cell mapping flow. 2013-07-24 09:54:53 -07:00
Alan Mishchenko 84c0b9d69b Tuning standard-cell mapping flow. 2013-07-23 16:15:03 -07:00
Alan Mishchenko 038f296453 Bug fix and warning print. 2013-07-22 23:11:04 -07:00
Alan Mishchenko a9afe7e8b7 Improvements to post-mapping re-sizing. 2013-07-21 14:56:30 -07:00
Alan Mishchenko 710835f8d6 Memory leaks. 2013-07-21 01:28:54 -07:00
Alan Mishchenko 1ed823c67d Adding support for input slew and output capacitance to timer and gate-sizer. 2013-07-21 01:01:53 -07:00
Alan Mishchenko ab84c73eb0 Adding support for input slew (.input_drive) and output capacitance (.output_load) in BLIF reader/writer. 2013-07-21 00:15:24 -07:00
Alan Mishchenko a35599960b New technology mapper. 2013-07-18 13:03:01 -07:00
Alan Mishchenko 10c90de054 New technology mapper. 2013-07-17 14:19:33 -07:00
Alan Mishchenko fce4605f58 Improved printout of XOR/MUX/AND in 'print_stats'. 2013-07-16 16:46:37 -07:00
Alan Mishchenko 5f97612951 Imporvements to 'eliminate'. 2013-07-16 16:06:21 -07:00
Alan Mishchenko e731d3b1f4 Adding another network duplicator. 2013-07-16 00:44:51 -07:00
Alan Mishchenko fd80bf20da Adding another network duplicator. 2013-07-16 00:34:26 -07:00
Alan Mishchenko f8f37d261b New technology mapper. 2013-07-15 15:22:05 -07:00
Alan Mishchenko dd29ca30a6 New technology mapper. 2013-07-14 23:12:05 -07:00
Alan Mishchenko c0ac159888 New technology mapper. 2013-07-14 15:04:25 -07:00
Alan Mishchenko b3e0f5b2e9 New technology mapper. 2013-07-13 23:40:51 -07:00
Alan Mishchenko 118e40b809 New technology mapper. 2013-07-13 12:20:53 -07:00
Alan Mishchenko 4a50b09c67 New technology mapper. 2013-07-13 11:12:36 -07:00
Alan Mishchenko 7efe9f2afd New technology mapper. 2013-07-12 19:33:46 -07:00
Alan Mishchenko b0bd2025c6 Compiler warnings. 2013-07-12 13:16:12 -07:00
Alan Mishchenko 804e0261ab Compiler warnings. 2013-07-12 13:14:44 -07:00
Alan Mishchenko fba33fbba4 New technology mapper. 2013-07-12 13:02:32 -07:00
Alan Mishchenko 589e2edec2 Compiler problem. 2013-07-01 23:05:57 -07:00
Alan Mishchenko e7504c6dab Compiler problem. 2013-07-01 23:03:23 -07:00
Alan Mishchenko 32e58b8883 Fixing a typo. 2013-07-01 22:57:28 -07:00
Alan Mishchenko 60bb6dbf69 Adding commands 'bm2' and 'saucy3' developed by Hadi Katebi, Igor Markov, and Karem Sakallah at U Michigan. 2013-07-01 18:06:09 -07:00
Alan Mishchenko 4e247281d2 Updating new mapper. 2013-06-29 23:45:04 -07:00
Alan Mishchenko 8c7ca72ea9 Adding timeout to command 'ind'. 2013-06-28 12:21:48 -07:00
Alan Mishchenko e93cfb18ee Data-structure experiment. 2013-06-27 13:54:44 -07:00
Alan Mishchenko a66dc0afb6 Unifying representation of mapping in GIA. 2013-06-25 23:05:51 -07:00
Alan Mishchenko 0985491dce Improving integration of the 'if' mapper with GIA. 2013-06-25 19:46:07 -07:00
Alan Mishchenko ed319531be Improving integration of the 'if' mapper with GIA. 2013-06-25 17:19:44 -07:00
Alan Mishchenko 94b26fe5a2 Improving CEC (command 'dcec') by integrating XOR balancing. 2013-06-25 11:49:25 -07:00
Alan Mishchenko faa220401c New random FSM generation command 'genfsm'. 2013-06-22 14:03:23 -07:00
Alan Mishchenko 7ea3cdffb4 Limiting runtime limit checks in 'pdr'. 2013-06-22 11:56:34 -07:00
Alan Mishchenko 9eaa290b1f Limiting runtime limit checks in 'pdr'. 2013-06-22 11:54:58 -07:00
Alan Mishchenko a7339fdb99 Fix constant propagation after 'if'. 2013-06-18 13:56:46 -07:00
Alan Mishchenko ac4962eb2d Compiler warnings. 2013-06-18 11:32:24 -07:00
Alan Mishchenko 90a88462c4 New MFS package. 2013-05-31 02:01:36 -07:00
Alan Mishchenko ba309121d7 New MFS package. 2013-05-31 00:56:10 -07:00
Alan Mishchenko 3c97892514 New MFS package. 2013-05-30 14:09:50 -07:00
Alan Mishchenko c50c1fc662 Multiplexer profiling. 2013-05-27 17:48:17 -07:00
Alan Mishchenko 37077748a1 Moving one declaration to the header file. 2013-05-27 15:21:11 -07:00
Alan Mishchenko 19c25fd6aa Adding a wrapper around clock() for more accurate time counting in ABC. 2013-05-27 15:09:23 -07:00
Alan Mishchenko 94356f0d1f Several small changes to the MFS packages. 2013-05-27 14:39:08 -07:00
Alan Mishchenko 755935a6df Added switch -M to set max size of two-cube divisors to extract (often helps both runtime and quality). 2013-05-27 13:34:22 -07:00
Alan Mishchenko 0cad45fa90 New MFS package. 2013-05-27 09:49:13 -07:00
Alan Mishchenko fb6eaaf5d9 New MFS package. 2013-05-26 16:12:44 -07:00
Alan Mishchenko ed3d3dfc8e New MFS package. 2013-05-26 13:34:24 -07:00
Alan Mishchenko 8e639c3d79 New command 'putontop' to concatenate networks for don't-care-based optimization. 2013-05-25 22:13:46 -07:00
Alan Mishchenko 94a75fe6d8 New MFS package. 2013-05-25 18:10:45 -07:00
Alan Mishchenko f47cc6cefc New MFS package. 2013-05-25 11:14:12 -07:00
Alan Mishchenko 9268c10023 New MFS package. 2013-05-25 00:45:22 -07:00
Alan Mishchenko d5234332fb New MFS package. 2013-05-24 22:35:22 -07:00
Alan Mishchenko 283abd4795 New MFS package. 2013-05-24 19:54:28 -07:00
Alan Mishchenko 28e065b0ae Counter-example depth minimization. 2013-05-22 11:02:56 -07:00
Alan Mishchenko b7d670ecf2 Bug fix in saving CEXes and CEX vectors. 2013-05-21 17:28:15 -07:00
Alan Mishchenko 67357cda2f Added new switched to command &frames. 2013-05-19 10:58:36 -07:00
Alan Mishchenko 354333f98a Changing command 'history' to have simpler interface. 2013-05-18 23:24:29 -07:00
Alan Mishchenko e86e4b6698 Added switch -I <file_name> to &sim to perform simulation with the user's simulation pattern. 2013-05-18 23:19:51 -07:00
Alan Mishchenko 68e1a07fdb Improvements to 'bmc3'. 2013-05-18 17:31:23 -07:00
Alan Mishchenko 7bc2fb5199 SAT variable profiling. 2013-05-18 11:20:07 -07:00
Alan Mishchenko f9da2c790f SAT variable profiling. 2013-05-18 11:03:32 -07:00
Alan Mishchenko e04ded5640 Undoing commit from Nov 12, 2012: Extending GIA to represent pintypes and pins. 2013-05-17 12:05:28 -07:00
Alan Mishchenko 760c1f60d2 Adding new command &mprove for proving groups of properties. 2013-05-17 11:50:16 -07:00
Alan Mishchenko 7be3e3e6b4 Adding 'zeropo -o' to replace a given PO by const 1. 2013-05-15 00:17:06 -07:00
Alan Mishchenko 533ff6984e Commenting assertion that does not hold in AIGER 1.9, accoring to Baruch Sterin. 2013-05-13 23:25:34 -07:00
Alan Mishchenko 3880623c9b Extending cube representation to handle SOPs with many cubes. 2013-05-12 23:23:18 -07:00
Alan Mishchenko 9d219eee4b New MFS package. 2013-05-12 19:09:28 -07:00
Alan Mishchenko 6610f1c78e Preprocessing SOPs given to 'fx' to be D1C-free and SCC-free. Handling the case of non-prime SOPs. 2013-05-11 17:16:09 -07:00
Alan Mishchenko f2abd6b8a9 Preprocessing SOPs given to 'fx' to be D1C-free and SCC-free. Handling the case of non-prime SOPs. 2013-05-11 17:01:13 -07:00
Alan Mishchenko cac32a32c7 Enabled switch 'fx -N <num>' to extract a fixed number of divisors. 2013-05-09 12:51:18 -07:00
Alan Mishchenko 22806448c1 Adding comment about using 'dprove' for sequential synthesis. 2013-05-09 12:01:29 -07:00
Alan Mishchenko 7c7d527755 Changing per-output runtime limit to be in miliseconds. 2013-05-09 11:35:04 -07:00
Alan Mishchenko 027dbbd492 Making fanin ordering available for netlists, not only networks. 2013-05-07 18:57:40 -07:00
Alan Mishchenko a735d95a5b SAT sweeping under constraints (bug fix). 2013-05-07 18:11:29 -07:00
Alan Mishchenko 51db560206 Procedures for sorting fanins of the nodes. 2013-05-06 18:51:48 -07:00
Alan Mishchenko f02888635f Procedures for sorting fanins of the nodes. 2013-05-06 18:19:20 -07:00
Alan Mishchenko 05f7cd9ed2 Integration of the liveness property prover developed by Sayak Ray. 2013-05-05 21:08:55 -07:00
Alan Mishchenko 98cf5698a1 New fast extract. 2013-05-05 18:57:51 -07:00
Alan Mishchenko 7a78e30390 New fast extract. 2013-05-05 14:33:28 -07:00
Alan Mishchenko eacfad7622 Changing the queue to work in the same the array of costs is realloced. 2013-05-05 09:04:14 -07:00
Alan Mishchenko 7d3301584a New fast extract. 2013-05-05 01:56:16 -07:00
Alan Mishchenko a762c695d7 New fast extract. 2013-05-05 01:54:11 -07:00
Alan Mishchenko 4aff2d134d C++ compiler errors. 2013-05-04 20:28:05 -07:00
Alan Mishchenko 13ee4998c3 C++ compiler errors. 2013-05-04 20:24:53 -07:00
Alan Mishchenko 36d5ef4e62 Making changes suggested by Mark Jarvin. 2013-05-04 11:10:25 -07:00
Alan Mishchenko 95571be503 Changes to the ABC data-structures to allow for larger designs. 2013-05-04 10:48:46 -07:00
Alan Mishchenko 50df0813fb Allowing 'constr' to reset remove currently defined constraints. 2013-05-03 19:59:18 -07:00
Alan Mishchenko 50095be5ac Adding runtime limit per output to multi-output DPR (pdr -H <num_sec>). 2013-05-03 19:58:25 -07:00
Alan Mishchenko a59968ce8c Adding runtime limit per output to multi-output BMC (bmc3 -H <num_sec>). 2013-05-03 18:26:18 -07:00
Alan Mishchenko 6a49d1f4c6 Reading/writing MiniAIG and several minor changes. 2013-05-03 15:45:50 -07:00
Alan Mishchenko bc50421928 Minor changes and improvement in PO partitioning (command &popart). 2013-05-01 12:45:34 -07:00
Alan Mishchenko 1f573cfe58 Compiler warnings. 2013-05-01 00:13:29 -07:00
Alan Mishchenko b94766bce5 Faster isomorphism detection (command &iso). 2013-05-01 00:10:53 -07:00
Alan Mishchenko c53eb0b9e1 Changing the print-out of &iso. 2013-04-30 10:46:07 -07:00
Alan Mishchenko 3b1ebbaa28 SAT sweeping under constraints. 2013-04-28 19:17:59 -07:00
Alan Mishchenko 9e1765216b Added option 'int -I <filename>' to specify file names to dump invariants. 2013-04-28 16:55:25 -07:00
Alan Mishchenko 266667d8b2 Improving local BDD construction from local SOPs and local AIGs. 2013-04-28 16:33:42 -07:00
Alan Mishchenko 58e1041ad8 Modified command 'eliminate' to perform traditional 'eliminate -1'. 2013-04-28 16:21:58 -07:00
Alan Mishchenko a33821ab38 Added alias for 'eliminate'. 2013-04-28 15:41:29 -07:00
Alan Mishchenko 48d867f77d Modified command 'eliminate' to perform traditional 'eliminate -1'. 2013-04-28 15:02:03 -07:00
Alan Mishchenko 8db0b9c0c6 Improving local BDD construction from local SOPs and local AIGs. 2013-04-28 12:34:03 -07:00
Alan Mishchenko b09926e8e2 SAT sweeping under constraints. 2013-04-28 01:25:29 -07:00
Alan Mishchenko 17a0d944b3 SAT sweeping under constraints. 2013-04-27 22:38:01 -07:00
Alan Mishchenko 324d73c29a New fast extract. 2013-04-27 15:23:12 -07:00
Alan Mishchenko 486eacc542 SAT sweeping under constraints. 2013-04-25 15:32:30 -07:00
Alan Mishchenko e0462d8d2e Adding print-out of SOP literals with 'ps -f'. 2013-04-19 09:35:30 -07:00
Alan Mishchenko df198d2cef Enabled 'cec' to be applied to networks derived from BLIF with EXDCs. 2013-04-18 18:32:58 -07:00
Alan Mishchenko c80fce00fe Enabled reading the EXDC network by the default BLIF reader. 2013-04-18 17:39:13 -07:00
Alan Mishchenko 96b784ecd7 Fixing both AIGER readers (read_aiger and &r) to work with AIGER 1.9 (except for liveness properties). 2013-04-18 00:05:11 -07:00
Alan Mishchenko 61ecc9c633 Fixing both AIGER readers (read_aiger and &r) to work with AIGER 1.9 (except for liveness properties). 2013-04-17 23:48:58 -07:00
Alan Mishchenko 06ba3d3e6c Adding command &filter_equiv to filter candidate equivalence classes using indexes of disproved POs after handling SRM as a multi-output miter. 2013-04-17 22:18:43 -07:00
Alan Mishchenko 7808ee8e70 Adding parameter structure for rarity simulation. 2013-04-17 19:40:02 -07:00
Alan Mishchenko 9b6efa34ad Bug fix in 'write_pla'. 2013-04-15 22:59:54 -07:00
Alan Mishchenko 45d82477b7 Saving network name in 'blockpo'. 2013-04-12 00:10:21 -07:00
Alan Mishchenko 4876f1e21c Added switch '-x' to save CEXes in 'bmc3' and 'pdr' in multi-output mode. 2013-04-09 16:26:28 -07:00
Alan Mishchenko b902b00779 Small changes to LMS code. 2013-04-01 21:41:53 -07:00
Alan Mishchenko f99e5cd9d6 Shrink for 6-LUTs. 2013-04-01 20:21:34 -07:00
Alan Mishchenko 28f12c5f06 Shrink for 6-LUTs. 2013-04-01 19:25:21 -07:00
Alan Mishchenko 5ec77b66e1 Updating 'sim3' to move the design into the last rare state. 2013-04-01 18:41:56 -07:00
Alan Mishchenko 48fce79453 Updating 'sim3' to move the design into the last rare state. 2013-04-01 18:39:42 -07:00
Alan Mishchenko 2650f94598 Shrink for 6-LUTs. 2013-03-31 23:09:51 -07:00
Alan Mishchenko ca7c801150 Improving verbose printout of 'sim3' when solving multiple outputs. 2013-03-30 15:15:26 -07:00
Alan Mishchenko 05ea180902 Compiler warnings. 2013-03-30 14:20:10 -07:00
Alan Mishchenko 1d4674e548 Compiler warnings. 2013-03-30 14:17:10 -07:00
Alan Mishchenko 270d36ac05 Improved 'trim' and added 'dropsat' to replace sat POs by constant 0. 2013-03-30 14:11:39 -07:00
Alan Mishchenko 5ace683835 Updating bmc3 printout to show the number of failed outputs. 2013-03-30 13:02:32 -07:00
Alan Mishchenko cc7d3e3747 Added dumping QDIMACS files in command 'qbf'. 2013-03-28 22:21:05 -07:00
Alan Mishchenko b7cd22786e Changed to 'print_level' to be less verbose by default. 2013-03-28 20:09:08 -07:00
Alan Mishchenko fdb8d83f7a Adding command &miter2 to derive a specified sequential miter. 2013-03-28 12:30:27 -07:00
Alan Mishchenko 7a2132b237 Added dumping QDIMACS files in command 'qbf'. 2013-03-27 17:21:08 -07:00
Alan Mishchenko 272089221a Removing hard-coded limit on the number of solving iterations in command 'qbf'. 2013-03-27 12:51:57 -07:00
Alan Mishchenko e64cad10e2 Adding command &miter2 to derive a specified sequential miter. 2013-03-27 12:43:00 -07:00
Alan Mishchenko 17af45424f Commenting out undesirable warnings/assertions. 2013-03-26 14:32:21 -07:00
Alan Mishchenko bf795e57cf Handling special case in 'fold' when the network is combinational. 2013-03-13 11:47:17 +01:00
Alan Mishchenko 1eb4059f05 PO partitioning algorithm. 2013-03-09 13:33:12 -08:00
Alan Mishchenko eee8ceb0fa PO partitioning algorithm. 2013-03-09 12:19:11 -08:00
Alan Mishchenko a3bdba6875 Modified command 'init' to allow for specific init values. 2013-03-07 20:38:55 -08:00
Alan Mishchenko 1ce537e992 Misc changes. 2013-03-07 13:04:16 -08:00
Alan Mishchenko 1a6354c22f Improvements to the hierarchy/timing manager. 2013-03-05 17:01:41 -08:00
Alan Mishchenko dcc8907161 Improvements to the hierarchy/timing manager. 2013-03-05 16:53:18 -08:00
Alan Mishchenko 4ff5203f4c Improvements to the hierarchy/timing manager. 2013-03-05 13:13:15 -08:00
Alan Mishchenko 0c9337f627 User-controlable SAT sweeper. 2013-03-04 00:33:36 -08:00
Alan Mishchenko a27a7bc827 User-controlable SAT sweeper and other small changes. 2013-02-27 12:12:23 -05:00
Alan Mishchenko 69dd1337b0 Started PO partitioning command. 2013-02-24 09:27:25 -08:00
Alan Mishchenko 1c744cf10a K-hot STG encoding. 2013-02-23 13:53:22 -08:00
Alan Mishchenko 91ca83e864 Adding new features to 'dualrail'. 2013-02-21 22:51:25 -08:00
Alan Mishchenko dfe5f511b2 Adding new features to 'dualrail'. 2013-02-21 22:46:53 -08:00
Alan Mishchenko dd52905fa3 Enabling two-timeframe property check in the interpolation procedure. 2013-02-21 12:10:35 -08:00
Alan Mishchenko a82b0a8ad5 New command &cycle, which is faster than 'cycle'. 2013-02-19 23:51:13 -08:00
Alan Mishchenko 59fe3268a7 Adding STG generation (&era -d) and STG encoding (&read_stg <file>). 2013-02-19 23:07:29 -08:00
Alan Mishchenko 99a9718355 Integrating sweeping information. 2013-02-19 12:56:36 -08:00
Alan Mishchenko baa944e6a2 Added 'gap timeout' to pdr. 2013-02-16 14:54:11 -08:00
Alan Mishchenko fd0ff0171e Added 'gap timeout' to bmc3 and sim3. 2013-02-15 16:47:18 -08:00
Alan Mishchenko 8866a1aa6d Fixing performance problem in 'cone -s' 2013-02-13 19:42:11 -08:00
Alan Mishchenko 930369f36f Integration of timing manager. 2013-02-03 18:02:22 +08:00
Alan Mishchenko 30ec58fcda Added switch 'zeropo -s' to skip comb sweep after removing a PO. 2013-02-01 03:57:17 +07:00
Alan Mishchenko 7e598cd231 Fixing compilation problems on Linux-32 related to constants of type unsigned long long. 2013-01-30 16:15:53 +07:00
Alan Mishchenko 557448400e Added new Python API is_const_po( int iPoNum ), which returns 0/1 if current network is an AIG and the given PO has const 0/1 function. 2013-01-25 10:25:34 +07:00
Alan Mishchenko 853222ee7b Fixed a corner-case when 'sim3 -a' does not work for costant POs. 2013-01-25 06:49:49 +07:00
Alan Mishchenko edd4b2a29c Added switch &trim -V <num> to remove const POs with specific value <num>. 2013-01-25 06:19:51 +07:00
Alan Mishchenko aa9c87cf8d Extending verification status file format to allow for SAT status without CEX. 2013-01-25 05:59:56 +07:00
Alan Mishchenko 6863688789 Enabled detecting CEXes in multiple POs without stopping (sim3 -a). 2013-01-23 12:37:44 +07:00
Alan Mishchenko ac1207abea Enabled detecting CEXes in multiple POs without stopping (sim3 -a). 2013-01-23 02:07:50 +07:00
Alan Mishchenko 1b6662ce4a Fixing C++ compilation issues. 2013-01-08 14:16:59 +08:00
Alan Mishchenko 562b612691 Fixing C++ compilation issues. 2013-01-08 14:15:39 +08:00
Alan Mishchenko a625caa17d Fixing C++ compilation issues. 2013-01-08 13:56:20 +08:00
Alan Mishchenko f26e760e9d Fixing C++ compilation issues. 2013-01-08 13:33:17 +08:00
Alan Mishchenko 81a1d97079 Fixing C++ compilation issues. 2013-01-08 13:14:45 +08:00
Alan Mishchenko a8dad4ed61 Fixing C++ compilation issues. 2013-01-08 13:12:28 +08:00
Alan Mishchenko a0819f62ab Adding support of flops to the conversion of MiniAIG into ABC network. 2013-01-08 06:42:25 +08:00
Alan Mishchenko 79f3ecb15f Technology mapper. 2013-01-08 05:50:37 +08:00
Alan Mishchenko e1a5556e8c New unrolling manager. 2012-12-24 08:16:19 +07:00
Alan Mishchenko bfad654205 Assembling timing/hierarchy manager from input data. 2012-12-15 17:39:34 -08:00
Alan Mishchenko 82050bbe11 Assembling timing/hierarchy manager from input data. 2012-12-13 15:18:53 -08:00
Alan Mishchenko 2575a5d683 Unifification of custom extensions. 2012-12-10 13:56:40 -08:00
Alan Mishchenko f7b7ab59cf Retiring old 'fpga' command and package. 2012-12-10 01:14:55 -08:00
Alan Mishchenko dc843b03c9 Renaming If_Lut_t into If_LibLut_t. 2012-12-10 01:07:41 -08:00
Alan Mishchenko 5eedc74a15 Adding box library. 2012-12-10 00:59:54 -08:00
Alan Mishchenko 8355eb1d41 Enabling multi-output solving in 'pdr'. 2012-12-09 17:52:34 -08:00
Alan Mishchenko ce63869fe7 Enabling multi-output solving in 'pdr'. 2012-12-09 17:33:44 -08:00
Alan Mishchenko 8761942258 Renaming multi-output mode enable switch 'bmc3 -s' to be 'bmc3 -a'. 2012-12-09 16:56:43 -08:00
Alan Mishchenko 9fc1cd0b3f Enabling multi-output solving in 'pdr'. 2012-12-09 15:12:40 -08:00
Alan Mishchenko 58d4012a55 Enabling multi-output solving in 'pdr'. 2012-12-09 14:46:16 -08:00
Alan Mishchenko 9f396a0d7e Enabling multi-output solving in 'pdr'. 2012-12-09 10:11:52 -08:00
Alan Mishchenko b65ae7349a Enabling multi-output solving in 'pdr'. 2012-12-09 09:47:48 -08:00
Alan Mishchenko 0058cefee3 Deriving CEX after phase/tempor/reparam. 2012-12-09 00:19:18 -08:00
Alan Mishchenko a68593c4f2 Deriving CEX after phase/tempor/reparam. 2012-12-08 12:44:08 -08:00
Alan Mishchenko 8e5d771feb Deriving CEX after phase/tempor/reparam. 2012-12-08 12:38:31 -08:00