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Generation of barrier-buffers for hierarchical design.

This commit is contained in:
Alan Mishchenko 2014-11-11 23:17:48 -08:00
parent 96fa84ad77
commit 968be1577b
4 changed files with 153 additions and 15 deletions
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23
src/base/abc/abcDfs.c
View File

@ -1462,7 +1462,7 @@ int Abc_NtkIsAcyclicWithBoxes_rec( Abc_Obj_t * pNode )
assert( !Abc_ObjIsNet(pNode) );
if ( Abc_ObjIsBo(pNode) )
pNode = Abc_ObjFanin0(pNode);
if ( Abc_ObjIsPi(pNode) )
if ( Abc_ObjIsPi(pNode) || Abc_ObjIsLatch(pNode) || Abc_ObjIsBlackbox(pNode) )
return 1;
assert( Abc_ObjIsNode(pNode) || Abc_ObjIsBox(pNode) );
// make sure the node is not visited
@ -1487,11 +1487,11 @@ int Abc_NtkIsAcyclicWithBoxes_rec( Abc_Obj_t * pNode )
pFanin = Abc_ObjFanin0Ntk(pFanin);
// make sure there is no mixing of networks
assert( pFanin->pNtk == pNode->pNtk );
// check if the fanin is visited
if ( Abc_ObjIsPi(pFanin) )
continue;
if ( Abc_ObjIsBo(pFanin) )
pFanin = Abc_ObjFanin0(pFanin);
// check if the fanin is visited
if ( Abc_ObjIsPi(pFanin) || Abc_ObjIsLatch(pFanin) || Abc_ObjIsBlackbox(pFanin) )
continue;
assert( Abc_ObjIsNode(pFanin) || Abc_ObjIsBox(pFanin) );
if ( Abc_NodeIsTravIdPrevious(pFanin) )
continue;
@ -1532,6 +1532,21 @@ int Abc_NtkIsAcyclicWithBoxes( Abc_Ntk_t * pNtk )
fprintf( stdout, " PO \"%s\"\n", Abc_ObjName(Abc_ObjFanout0(pNode)) );
break;
}
if ( fAcyclic )
{
Abc_NtkForEachLatchInput( pNtk, pNode, i )
{
pNode = Abc_ObjFanin0Ntk(Abc_ObjFanin0(pNode));
if ( Abc_NodeIsTravIdPrevious(pNode) )
continue;
// traverse the output logic cone
if ( (fAcyclic = Abc_NtkIsAcyclicWithBoxes_rec(pNode)) )
continue;
// stop as soon as the first loop is detected
fprintf( stdout, " PO \"%s\"\n", Abc_ObjName(Abc_ObjFanout0(pNode)) );
break;
}
}
return fAcyclic;
}

128
src/base/abc/abcHieGia.c
View File

@ -86,7 +86,7 @@ int Abc_NodeStrashToGia( Gia_Man_t * pNew, Abc_Obj_t * pNode )
SeeAlso []
***********************************************************************/
void Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int * pCounter, Vec_Int_t * vBufs )
void Gia_ManFlattenLogicHierarchy2_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int * pCounter, Vec_Int_t * vBufs )
{
Vec_Ptr_t * vDfs = (Vec_Ptr_t *)pNtk->pData;
Abc_Obj_t * pObj, * pTerm;
@ -112,7 +112,7 @@ void Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int *
if ( vBufs )
Abc_ObjForEachFanin( pObj, pTerm, k )
Abc_ObjFanout0(Abc_NtkPi(pModel, k))->iTemp = Gia_ManAppendBuf( pNew, Abc_ObjFanout0(Abc_NtkPi(pModel, k))->iTemp );
Gia_ManFlattenLogicHierarchy_rec( pNew, pModel, pCounter, vBufs );
Gia_ManFlattenLogicHierarchy2_rec( pNew, pModel, pCounter, vBufs );
if ( vBufs )
Abc_ObjForEachFanout( pObj, pTerm, k )
Abc_ObjFanin0(Abc_NtkPo(pModel, k))->iTemp = Gia_ManAppendBuf( pNew, Abc_ObjFanin0(Abc_NtkPo(pModel, k))->iTemp );
@ -131,7 +131,7 @@ void Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int *
}
}
}
Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk )
Gia_Man_t * Gia_ManFlattenLogicHierarchy2( Abc_Ntk_t * pNtk )
{
int fUseBufs = 1;
int fUseInter = 0;
@ -165,7 +165,7 @@ Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk )
// call recursively
Gia_ManHashAlloc( pNew );
Gia_ManFlattenLogicHierarchy_rec( pNew, pNtk, &Counter, pNew->vBarBufs );
Gia_ManFlattenLogicHierarchy2_rec( pNew, pNtk, &Counter, pNew->vBarBufs );
Gia_ManHashStop( pNew );
printf( "Hierarchy reader flattened %d instances of logic boxes.\n", Counter );
@ -200,6 +200,126 @@ Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk )
}
/**Function*************************************************************
Synopsis [Flattens the logic hierarchy of the netlist.]
Description [This procedure requires that models are uniqified.]
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManFlattenLogicPrepare( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pTerm, * pBox;
int i, k;
Abc_NtkFillTemp( pNtk );
Abc_NtkForEachPi( pNtk, pTerm, i )
pTerm->iData = i;
Abc_NtkForEachPo( pNtk, pTerm, i )
pTerm->iData = i;
Abc_NtkForEachBox( pNtk, pBox, i )
{
assert( !Abc_ObjIsLatch(pBox) );
Abc_ObjForEachFanin( pBox, pTerm, k )
pTerm->iData = k;
Abc_ObjForEachFanout( pBox, pTerm, k )
pTerm->iData = k;
}
}
int Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Vec_Ptr_t * vSupers, Abc_Obj_t * pObj, Vec_Int_t * vBufs )
{
Abc_Ntk_t * pModel;
Abc_Obj_t * pBox, * pFanin;
int iLit, i;
if ( pObj->iTemp != -1 )
return pObj->iTemp;
if ( Abc_ObjIsNet(pObj) || Abc_ObjIsPo(pObj) || Abc_ObjIsBi(pObj) )
return (pObj->iTemp = Gia_ManFlattenLogicHierarchy_rec(pNew, vSupers, Abc_ObjFanin0(pObj), vBufs));
if ( Abc_ObjIsPi(pObj) )
{
pBox = (Abc_Obj_t *)Vec_PtrPop( vSupers );
pModel = (Abc_Ntk_t *)pBox->pData;
//printf( " Exiting %s\n", Abc_NtkName(pModel) );
assert( Abc_ObjFaninNum(pBox) == Abc_NtkPiNum(pModel) );
assert( pObj->iData >= 0 && pObj->iData < Abc_NtkPiNum(pModel) );
pFanin = Abc_ObjFanin( pBox, pObj->iData );
iLit = Gia_ManFlattenLogicHierarchy_rec( pNew, vSupers, pFanin, vBufs );
Vec_PtrPush( vSupers, pBox );
return (pObj->iTemp = (vBufs ? Gia_ManAppendBuf(pNew, iLit) : iLit));
}
if ( Abc_ObjIsBo(pObj) )
{
pBox = Abc_ObjFanin0(pObj);
assert( Abc_ObjIsBox(pBox) );
Vec_PtrPush( vSupers, pBox );
pModel = (Abc_Ntk_t *)pBox->pData;
//printf( "Entering %s\n", Abc_NtkName(pModel) );
assert( Abc_ObjFanoutNum(pBox) == Abc_NtkPoNum(pModel) );
assert( pObj->iData >= 0 && pObj->iData < Abc_NtkPoNum(pModel) );
pFanin = Abc_NtkPo( pModel, pObj->iData );
iLit = Gia_ManFlattenLogicHierarchy_rec( pNew, vSupers, pFanin, vBufs );
Vec_PtrPop( vSupers );
return (pObj->iTemp = (vBufs ? Gia_ManAppendBuf(pNew, iLit) : iLit));
}
assert( Abc_ObjIsNode(pObj) );
Abc_ObjForEachFanin( pObj, pFanin, i )
Gia_ManFlattenLogicHierarchy_rec( pNew, vSupers, pFanin, vBufs );
return (pObj->iTemp = Abc_NodeStrashToGia( pNew, pObj ));
}
Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk )
{
int fUseBufs = 1;
Gia_Man_t * pNew, * pTemp;
Abc_Ntk_t * pModel;
Abc_Obj_t * pTerm;
Vec_Ptr_t * vSupers;
int i;//, Counter = -1;
assert( Abc_NtkIsNetlist(pNtk) );
// Abc_NtkPrintBoxInfo( pNtk );
// create DFS order of nets
if ( !pNtk->pDesign )
Gia_ManFlattenLogicPrepare( pNtk );
else
Vec_PtrForEachEntry( Abc_Ntk_t *, pNtk->pDesign->vModules, pModel, i )
Gia_ManFlattenLogicPrepare( pModel );
// start the manager
pNew = Gia_ManStart( Abc_NtkObjNumMax(pNtk) );
pNew->pName = Abc_UtilStrsav(pNtk->pName);
pNew->pSpec = Abc_UtilStrsav(pNtk->pSpec);
if ( fUseBufs )
pNew->vBarBufs = Vec_IntAlloc( 1000 );
// create PIs and buffers
Abc_NtkForEachPi( pNtk, pTerm, i )
pTerm->iTemp = Gia_ManAppendCi( pNew );
// call recursively
vSupers = Vec_PtrAlloc( 100 );
Gia_ManHashAlloc( pNew );
Abc_NtkForEachPo( pNtk, pTerm, i )
Gia_ManFlattenLogicHierarchy_rec( pNew, vSupers, pTerm, pNew->vBarBufs );
Gia_ManHashStop( pNew );
Vec_PtrFree( vSupers );
printf( "Hierarchy reader flattened %d instances of boxes.\n", pNtk->pDesign ? Vec_PtrSize(pNtk->pDesign->vModules)-1 : 0 );
// create buffers and POs
Abc_NtkForEachPo( pNtk, pTerm, i )
Gia_ManAppendCo( pNew, pTerm->iTemp );
// save buffers
// Vec_IntPrint( pNew->vBarBufs );
// cleanup
pNew = Gia_ManCleanup( pTemp = pNew );
Gia_ManStop( pTemp );
return pNew;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

15
src/base/io/io.c
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@ -233,14 +233,17 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
{
extern Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk );
Abc_Ntk_t * pNtk = Io_ReadNetlist( pFileName, Io_ReadFileType(pFileName), fCheck );
Gia_Man_t * pGia = Gia_ManFlattenLogicHierarchy( pNtk );
Abc_NtkDelete( pNtk );
if ( pGia == NULL )
if ( pNtk )
{
Abc_Print( 1, "Abc_CommandBlast(): Bit-blasting has failed.\n" );
return 0;
Gia_Man_t * pGia = Gia_ManFlattenLogicHierarchy( pNtk );
Abc_NtkDelete( pNtk );
if ( pGia == NULL )
{
Abc_Print( 1, "Abc_CommandBlast(): Bit-blasting has failed.\n" );
return 0;
}
Abc_FrameUpdateGia( pAbc, pGia );
}
Abc_FrameUpdateGia( pAbc, pGia );
return 0;
}
// check if the library is available

2
src/base/io/ioUtil.c
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@ -157,7 +157,7 @@ Abc_Ntk_t * Io_ReadNetlist( char * pFileName, Io_FileType_t FileType, int fCheck
fprintf( stdout, "Reading network from file has failed.\n" );
return NULL;
}
if ( Abc_NtkBlackboxNum(pNtk) || Abc_NtkWhiteboxNum(pNtk) )
if ( fCheck && (Abc_NtkBlackboxNum(pNtk) || Abc_NtkWhiteboxNum(pNtk)) )
{
int i, fCycle = 0;
Abc_Ntk_t * pModel;