mirror of https://github.com/YosysHQ/abc.git
Experiments with inductive don't-cares.
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@ -4585,13 +4585,14 @@ usage:
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int Abc_CommandMfs2( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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extern int Abc_NtkPerformMfs( Abc_Ntk_t * pNtk, Sfm_Par_t * pPars );
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extern int Abc_NtkMfsAfterICheck( Abc_Ntk_t * p, int nFrames, Vec_Int_t * vFlops, Sfm_Par_t * pPars );
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Abc_Ntk_t * pNtk = Abc_FrameReadNtk(pAbc);
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Sfm_Par_t Pars, * pPars = &Pars;
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int c;
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int c, fIndDCs = 0;
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// set defaults
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Sfm_ParSetDefault( pPars );
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "WFDMLCZNdaevwh" ) ) != EOF )
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while ( ( c = Extra_UtilGetopt( argc, argv, "WFDMLCZNdaeivwh" ) ) != EOF )
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{
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switch ( c )
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{
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@ -4692,6 +4693,9 @@ int Abc_CommandMfs2( Abc_Frame_t * pAbc, int argc, char ** argv )
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case 'e':
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pPars->fMoreEffort ^= 1;
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break;
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case 'i':
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fIndDCs ^= 1;
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break;
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case 'v':
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pPars->fVerbose ^= 1;
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break;
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@ -4714,16 +4718,44 @@ int Abc_CommandMfs2( Abc_Frame_t * pAbc, int argc, char ** argv )
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Abc_Print( -1, "This command can only be applied to a logic network.\n" );
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return 1;
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}
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// modify the current network
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if ( !Abc_NtkPerformMfs( pNtk, pPars ) )
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if ( fIndDCs )
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{
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Abc_Print( -1, "Resynthesis has failed.\n" );
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return 1;
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if ( pAbc->nIndFrames <= 1 )
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{
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Abc_Print( -1, "The number of k-inductive frames is not specified.\n" );
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return 1;
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}
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if ( pAbc->vIndFlops == NULL )
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{
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Abc_Print( -1, "The set of k-inductive flops is not specified.\n" );
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return 1;
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}
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if ( Vec_IntSize(pAbc->vIndFlops) != Abc_NtkLatchNum(pNtk) )
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{
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Abc_Print( -1, "The saved flop count (%d) does not match that of the current network (%d).\n",
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Vec_IntSize(pAbc->vIndFlops), Abc_NtkLatchNum(pNtk) );
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return 1;
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}
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// modify the current network
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if ( !Abc_NtkMfsAfterICheck( pNtk, pAbc->nIndFrames, pAbc->vIndFlops, pPars ) )
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{
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Abc_Print( -1, "Resynthesis has failed.\n" );
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return 1;
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}
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}
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else
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{
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// modify the current network
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if ( !Abc_NtkPerformMfs( pNtk, pPars ) )
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{
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Abc_Print( -1, "Resynthesis has failed.\n" );
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return 1;
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}
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}
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return 0;
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usage:
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Abc_Print( -2, "usage: mfs2 [-WFDMLCZN <num>] [-daevwh]\n" );
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Abc_Print( -2, "usage: mfs2 [-WFDMLCZN <num>] [-daeivwh]\n" );
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Abc_Print( -2, "\t performs don't-care-based optimization of logic networks\n" );
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Abc_Print( -2, "\t-W <num> : the number of levels in the TFO cone (0 <= num) [default = %d]\n", pPars->nTfoLevMax );
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Abc_Print( -2, "\t-F <num> : the max number of fanouts to skip (1 <= num) [default = %d]\n", pPars->nFanoutMax );
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@ -4736,6 +4768,7 @@ usage:
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Abc_Print( -2, "\t-d : toggle performing redundancy removal [default = %s]\n", pPars->fRrOnly? "yes": "no" );
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Abc_Print( -2, "\t-a : toggle minimizing area or area+edges [default = %s]\n", pPars->fArea? "area": "area+edges" );
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Abc_Print( -2, "\t-e : toggle high-effort resubstitution [default = %s]\n", pPars->fMoreEffort? "yes": "no" );
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Abc_Print( -2, "\t-i : toggle using inductive don't-cares [default = %s]\n", fIndDCs? "yes": "no" );
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Abc_Print( -2, "\t-v : toggle printing optimization summary [default = %s]\n", pPars->fVerbose? "yes": "no" );
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Abc_Print( -2, "\t-w : toggle printing detailed stats for each node [default = %s]\n", pPars->fVeryVerbose? "yes": "no" );
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Abc_Print( -2, "\t-h : print the command usage\n");
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@ -32928,10 +32961,12 @@ int Abc_CommandAbc9ICheck( Abc_Frame_t * pAbc, int argc, char ** argv )
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Abc_Print( -1, "Abc_CommandAbc9ICheck(): The AIG is combinational.\n" );
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return 0;
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}
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Vec_IntFreeP( &pAbc->vIndFlops );
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if ( fSearch )
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Bmc_PerformISearch( pAbc->pGia, nFramesMax, nTimeOut, fReverse, fDump, fVerbose );
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pAbc->vIndFlops = Bmc_PerformISearch( pAbc->pGia, nFramesMax, nTimeOut, fReverse, fDump, fVerbose );
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else
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Bmc_PerformICheck( pAbc->pGia, nFramesMax, nTimeOut, fEmpty, fVerbose );
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pAbc->nIndFrames = nFramesMax;
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return 0;
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usage:
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@ -49,16 +49,16 @@ Abc_Ntk_t * Abc_NtkUnrollAndDrop( Abc_Ntk_t * p, int nFrames, Vec_Int_t * vFlops
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Abc_Ntk_t * pNew;
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Abc_Obj_t * pFanin, * pNode;
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Vec_Ptr_t * vNodes;
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int i, k, f, iObj;
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assert( Abc_NtkIsLogic(pNtk) );
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assert( Vec_IntSize(vFlops) <= Abc_NtkLatchNum(p) );
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int i, k, f, Value;
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assert( Abc_NtkIsLogic(p) );
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assert( Vec_IntSize(vFlops) == Abc_NtkLatchNum(p) );
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*piPivot = -1;
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// start the network
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pNew = Abc_NtkAlloc( p->ntkType, p->ntkFunc, 1 );
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pNew->pName = Extra_UtilStrsav(Abc_NtkName(p));
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// add the PIs corresponding to flop outputs
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Abc_NtkForEachLatchOutput( p, pNode, i )
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Abc_ObjFanout0(pNode)->pCopy = Abc_NtkCreatePi( pNew );
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pNode->pCopy = Abc_NtkCreatePi( pNew );
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// iterate unrolling
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vNodes = Abc_NtkDfs( p, 0 );
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for ( f = 0; f < nFrames; f++ )
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@ -71,9 +71,11 @@ Abc_Ntk_t * Abc_NtkUnrollAndDrop( Abc_Ntk_t * p, int nFrames, Vec_Int_t * vFlops
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Abc_ObjForEachFanin( pNode, pFanin, k )
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Abc_ObjAddFanin( pNode->pCopy, pFanin->pCopy );
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}
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Abc_NtkForEachCo( p, pNode, i )
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pNode->pCopy = Abc_ObjFanin0(pNode)->pCopy;
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Abc_NtkForEachPo( p, pNode, i )
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Abc_ObjAddFanin( Abc_NtkCreatePo(pNew), Abc_ObjFanin0(pNode)->pCopy );
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// transfer to outputs
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Abc_ObjAddFanin( Abc_NtkCreatePo(pNew), pNode->pCopy );
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// transfer to flop outputs
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Abc_NtkForEachLatch( p, pNode, i )
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Abc_ObjFanout0(pNode)->pCopy = Abc_ObjFanin0(pNode)->pCopy;
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if ( f == 0 )
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@ -81,10 +83,11 @@ Abc_Ntk_t * Abc_NtkUnrollAndDrop( Abc_Ntk_t * p, int nFrames, Vec_Int_t * vFlops
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}
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Vec_PtrFree( vNodes );
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// add final POs
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Vec_IntForEachEntry( vFlops, iObj, i )
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Vec_IntForEachEntry( vFlops, Value, i )
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{
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assert( iObj >= 0 && iObj < Abc_NtkLatchNum(p) );
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pNode = Abc_NtkCo( p, Abc_NtkPiNum(p) + iObj );
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if ( Value == 0 )
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continue;
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pNode = Abc_NtkCo( p, Abc_NtkPiNum(p) + i );
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Abc_ObjAddFanin( Abc_NtkCreatePo(pNew), Abc_ObjFanin0(pNode)->pCopy );
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}
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Abc_NtkAddDummyPiNames( pNew );
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@ -235,7 +238,7 @@ Sfm_Ntk_t * Abc_NtkExtractMfs2( Abc_Ntk_t * pNtk, int iPivot )
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// set fixed attributes
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Abc_NtkForEachNode( pNtk, pObj, i )
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if ( i >= iPivot )
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Vec_StrWriteEntry( vFixed, i, (char)1 );
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Vec_StrWriteEntry( vFixed, pObj->iTemp, (char)1 );
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return Sfm_NtkConstruct( vFanins, Abc_NtkCiNum(pNtk), Abc_NtkCoNum(pNtk), vFixed, NULL, vTruths );
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}
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@ -359,7 +362,7 @@ int Abc_NtkPerformMfs( Abc_Ntk_t * pNtk, Sfm_Par_t * pPars )
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SeeAlso []
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***********************************************************************/
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void Abc_NtkMfsAfterICheck( Abc_Ntk_t * p, int nFrames, Vec_Int_t * vFlops, Sfm_Par_t * pPars )
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int Abc_NtkMfsAfterICheck( Abc_Ntk_t * p, int nFrames, Vec_Int_t * vFlops, Sfm_Par_t * pPars )
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{
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Sfm_Ntk_t * pp;
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int nFaninMax, nNodes;
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@ -371,7 +374,7 @@ void Abc_NtkMfsAfterICheck( Abc_Ntk_t * p, int nFrames, Vec_Int_t * vFlops, Sfm_
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if ( nFaninMax > 6 )
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{
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Abc_Print( 1, "Currently \"mfs\" cannot process the network containing nodes with more than 6 fanins.\n" );
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return;
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return 0;
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}
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// derive unfolded network
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pNtk = Abc_NtkUnrollAndDrop( p, nFrames, vFlops, &iPivot );
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@ -392,8 +395,9 @@ void Abc_NtkMfsAfterICheck( Abc_Ntk_t * p, int nFrames, Vec_Int_t * vFlops, Sfm_
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if( pPars->fVerbose )
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Abc_Print( 1, "The network has %d nodes changed by \"mfs\".\n", nNodes );
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}
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Abc_NtkDelete( pNtk );
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Sfm_NtkFree( pp );
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return;
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return 1;
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}
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@ -202,6 +202,7 @@ void Abc_FrameDeallocate( Abc_Frame_t * p )
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ABC_FREE( pTemp );
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Vec_PtrFree( p->vPlugInComBinPairs );
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}
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Vec_IntFreeP( &p->vIndFlops );
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Vec_PtrFreeP( &p->vLTLProperties_global );
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Abc_FrameDeleteAllNetworks( p );
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ABC_FREE( p->pDrivingCell );
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@ -96,6 +96,9 @@ struct Abc_Frame_t_
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// timing constraints
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char * pDrivingCell; // name of the driving cell
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float MaxLoad; // maximum output load
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// inductive don't-cares
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Vec_Int_t * vIndFlops;
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int nIndFrames;
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// new code
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Gia_Man_t * pGia; // alternative current network as a light-weight AIG
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@ -132,7 +132,7 @@ extern Aig_Man_t * Bmc_AigTargetStates( Aig_Man_t * p, Abc_Cex_t * pCex, i
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extern Abc_Cex_t * Saig_ManCexMinPerform( Aig_Man_t * pAig, Abc_Cex_t * pCex );
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/*=== bmcICheck.c ==========================================================*/
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extern void Bmc_PerformICheck( Gia_Man_t * p, int nFramesMax, int nTimeOut, int fEmpty, int fVerbose );
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extern void Bmc_PerformISearch( Gia_Man_t * p, int nFramesMax, int nTimeOut, int fReverse, int fDump, int fVerbose );
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extern Vec_Int_t * Bmc_PerformISearch( Gia_Man_t * p, int nFramesMax, int nTimeOut, int fReverse, int fDump, int fVerbose );
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/*=== bmcUnroll.c ==========================================================*/
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extern Unr_Man_t * Unr_ManUnrollStart( Gia_Man_t * pGia, int fVerbose );
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extern Gia_Man_t * Unr_ManUnrollFrame( Unr_Man_t * p, int f );
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@ -397,9 +397,9 @@ void Bmc_PerformISearchOne( Gia_Man_t * p, int nFramesMax, int nTimeOut, int fRe
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Gia_ManStop( pMiter );
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// Vec_IntFree( vLits );
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}
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void Bmc_PerformISearch( Gia_Man_t * p, int nFramesMax, int nTimeOut, int fReverse, int fDump, int fVerbose )
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Vec_Int_t * Bmc_PerformISearch( Gia_Man_t * p, int nFramesMax, int nTimeOut, int fReverse, int fDump, int fVerbose )
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{
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Vec_Int_t * vLits;
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Vec_Int_t * vLits, * vFlops;
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int i, f;
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printf( "Solving M-inductiveness for design %s with %d AND nodes and %d flip-flops:\n",
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Gia_ManName(p), Gia_ManAndNum(p), Gia_ManRegNum(p) );
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@ -426,7 +426,15 @@ void Bmc_PerformISearch( Gia_Man_t * p, int nFramesMax, int nTimeOut, int fRever
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printf( "%d ", i );
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printf( "\n" );
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}
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// save flop indexes
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vFlops = Vec_IntAlloc( Gia_ManRegNum(p) );
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for ( i = 0; i < Gia_ManRegNum(p); i++ )
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if ( !Abc_LitIsCompl(Vec_IntEntry(vLits, i)) )
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Vec_IntPush( vFlops, 1 );
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else
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Vec_IntPush( vFlops, 0 );
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Vec_IntFree( vLits );
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return vFlops;
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}
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////////////////////////////////////////////////////////////////////////
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