mirror of https://github.com/YosysHQ/abc.git
Exprimental features in tech-mapping.
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@ -1681,7 +1681,46 @@ Gia_Man_t * Gia_ManFromIfLogic( If_Man_t * pIfMan )
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}
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else if ( pIfMan->pPars->fUseAndVars && pIfMan->pPars->fDeriveLuts && (int)pCutBest->nLeaves > pIfMan->pPars->nLutSize/2 )
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{
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assert( 0 );
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word pFunc[64], uTruth[2];
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int nLeaves = pCutBest->nLeaves;
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int truthId = Abc_Lit2Var(pCutBest->iCutFunc);
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int c, Mask = Vec_IntEntry(pIfMan->vTtDecs[nLeaves], truthId);
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int MaskOne[2] = { Mask & 0xFFFF, (Mask >> 16) & 0x3FFF };
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int iLitCofs[2], iTemp, fOrDec = (Mask >> 30) & 1;
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assert( Mask > 0 && nLeaves <= 2 * (pIfMan->pPars->nLutSize/2) && pIfMan->pPars->nLutSize <= 13 );
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Abc_TtCopy( pFunc, If_CutTruthWR(pIfMan, pCutBest), pIfMan->nTruth6Words[nLeaves], fOrDec );
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Abc_TtDeriveBiDec( pFunc, nLeaves, MaskOne[0], MaskOne[1], pIfMan->pPars->nLutSize/2, &uTruth[0], &uTruth[1] );
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uTruth[0] = fOrDec ? ~uTruth[0] : uTruth[0];
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uTruth[1] = fOrDec ? ~uTruth[1] : uTruth[1];
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for ( c = 0; c < 2; c++ )
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{
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Vec_IntClear( vLeaves2 );
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for ( k = 0; k < nLeaves; k++ )
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if ( (MaskOne[c] >> k) & 1 )
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Vec_IntPush( vLeaves2, Vec_IntEntry(vLeaves, k) );
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assert( Vec_IntSize(vLeaves2) >= 1 );
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iLitCofs[c] = Kit_TruthToGia( pNew, (unsigned *)&uTruth[c], Vec_IntSize(vLeaves2), vCover, vLeaves2, 0 );
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if ( Vec_IntSize(vLeaves2) == 1 )
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continue;
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// create mapping
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assert( Gia_ObjIsAnd(Gia_ManObj(pNew, Abc_Lit2Var(iLitCofs[c]))) );
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Vec_IntSetEntry( vMapping, Abc_Lit2Var(iLitCofs[c]), Vec_IntSize(vMapping2) );
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Vec_IntPush( vMapping2, Vec_IntSize(vLeaves2) );
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Vec_IntForEachEntry( vLeaves2, iTemp, k )
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Vec_IntPush( vMapping2, Abc_Lit2Var(iTemp) );
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Vec_IntPush( vMapping2, Abc_Lit2Var(iLitCofs[c]) );
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}
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iLitCofs[0] = Abc_LitNotCond( iLitCofs[0], fOrDec );
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iLitCofs[1] = Abc_LitNotCond( iLitCofs[1], fOrDec );
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pIfObj->iCopy = Gia_ManAppendAnd( pNew, iLitCofs[0], iLitCofs[1] );
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pIfObj->iCopy = Abc_LitNotCond( pIfObj->iCopy, fOrDec ^ Abc_LitIsCompl(pCutBest->iCutFunc) );
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// create mapping
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Vec_IntSetEntry( vMapping, Abc_Lit2Var(pIfObj->iCopy), Vec_IntSize(vMapping2) );
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Vec_IntPush( vMapping2, 2 );
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Vec_IntPush( vMapping2, Abc_Lit2Var(iLitCofs[0]) );
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Vec_IntPush( vMapping2, Abc_Lit2Var(iLitCofs[1]) );
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Vec_IntPush( vMapping2, -Abc_Lit2Var(pIfObj->iCopy) );
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pIfObj->iCopy = Abc_LitNotCond( pIfObj->iCopy, pCutBest->fCompl );
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}
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else if ( (pIfMan->pPars->fDeriveLuts && pIfMan->pPars->fTruth) || pIfMan->pPars->fUseDsd || pIfMan->pPars->fUseTtPerm )
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{
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@ -31706,7 +31706,7 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
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}
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pPars->pLutLib = (If_LibLut_t *)pAbc->pLibLut;
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "KCFAGRDEWSTqalepmrsdbgxyojfuikztncvh" ) ) != EOF )
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while ( ( c = Extra_UtilGetopt( argc, argv, "KCFAGRDEWSTqalepmrsdbgxyofuijkztncvh" ) ) != EOF )
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{
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switch ( c )
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{
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@ -31878,9 +31878,6 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
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case 'o':
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pPars->fUseBuffs ^= 1;
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break;
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case 'j':
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pPars->fEnableCheck07 ^= 1;
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break;
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case 'f':
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pPars->fEnableCheck75 ^= 1;
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break;
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@ -31890,6 +31887,12 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
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case 'i':
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pPars->fUseCofVars ^= 1;
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break;
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// case 'j':
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// pPars->fEnableCheck07 ^= 1;
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// break;
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case 'j':
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pPars->fUseAndVars ^= 1;
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break;
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case 'k':
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pPars->fUseDsdTune ^= 1;
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break;
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@ -31998,6 +32001,8 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
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}
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pPars->fCutMin = 1;
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}
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if ( pPars->fUseAndVars )
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pPars->fCutMin = 1;
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if ( pPars->fUseDsdTune )
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{
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If_DsdMan_t * pDsdMan = (If_DsdMan_t *)Abc_FrameReadManDsd();
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@ -32170,7 +32175,7 @@ usage:
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sprintf(LutSize, "library" );
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else
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sprintf(LutSize, "%d", pPars->nLutSize );
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Abc_Print( -2, "usage: &if [-KCFAGRT num] [-DEW float] [-S str] [-qarlepmsdbgxyojfuikztncvh]\n" );
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Abc_Print( -2, "usage: &if [-KCFAGRT num] [-DEW float] [-S str] [-qarlepmsdbgxyofuijkztncvh]\n" );
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Abc_Print( -2, "\t performs FPGA technology mapping of the network\n" );
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Abc_Print( -2, "\t-K num : the number of LUT inputs (2 < num < %d) [default = %s]\n", IF_MAX_LUTSIZE+1, LutSize );
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Abc_Print( -2, "\t-C num : the max number of priority cuts (0 < num < 2^12) [default = %d]\n", pPars->nCutsMax );
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@ -32197,10 +32202,11 @@ usage:
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Abc_Print( -2, "\t-x : toggles delay optimization by DSD balancing [default = %s]\n", pPars->fDsdBalance? "yes": "no" );
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Abc_Print( -2, "\t-y : toggles delay optimization with recorded library [default = %s]\n", pPars->fUserRecLib? "yes": "no" );
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Abc_Print( -2, "\t-o : toggles using buffers to decouple combinational outputs [default = %s]\n", pPars->fUseBuffs? "yes": "no" );
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Abc_Print( -2, "\t-j : toggles enabling additional check [default = %s]\n", pPars->fEnableCheck07? "yes": "no" );
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Abc_Print( -2, "\t-f : toggles enabling additional check [default = %s]\n", pPars->fEnableCheck75? "yes": "no" );
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Abc_Print( -2, "\t-u : toggles enabling additional check [default = %s]\n", pPars->fEnableCheck75u? "yes": "no" );
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Abc_Print( -2, "\t-i : toggles using cofactoring variables [default = %s]\n", pPars->fUseCofVars? "yes": "no" );
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// Abc_Print( -2, "\t-j : toggles enabling additional check [default = %s]\n", pPars->fEnableCheck07? "yes": "no" );
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Abc_Print( -2, "\t-j : toggles using AND bi-decomposition [default = %s]\n", pPars->fUseAndVars? "yes": "no" );
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Abc_Print( -2, "\t-k : toggles matching based on precomputed DSD manager [default = %s]\n", pPars->fUseDsdTune? "yes": "no" );
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Abc_Print( -2, "\t-z : toggles deriving LUTs when mapping into LUT structures [default = %s]\n", pPars->fDeriveLuts? "yes": "no" );
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Abc_Print( -2, "\t-t : toggles optimizing average rather than maximum level [default = %s]\n", pPars->fDoAverage? "yes": "no" );
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@ -275,12 +275,13 @@ void If_ObjPerformMappingAnd( If_Man_t * p, If_Obj_t * pObj, int Mode, int fPrep
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if ( p->pPars->fUseAndVars )
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{
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int iDecMask = -1, truthId = Abc_Lit2Var(pCut->iCutFunc);
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assert( p->pPars->nLutSize <= 13 );
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if ( truthId >= Vec_IntSize(p->vTtDecs[pCut->nLeaves]) || Vec_IntEntry(p->vTtDecs[pCut->nLeaves], truthId) == -1 )
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{
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while ( truthId >= Vec_IntSize(p->vTtDecs[pCut->nLeaves]) )
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Vec_IntPush( p->vTtDecs[pCut->nLeaves], -1 );
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if ( (int)pCut->nLeaves > p->pPars->nLutSize / 2 )
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iDecMask = Abc_TtProcessBiDec( If_CutTruthW(p, pCut), (int)pCut->nLeaves, p->pPars->nLutSize / 2 );
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if ( (int)pCut->nLeaves > p->pPars->nLutSize / 2 && (int)pCut->nLeaves <= 2 * (p->pPars->nLutSize / 2) )
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iDecMask = Abc_TtProcessBiDec( If_CutTruthWR(p, pCut), (int)pCut->nLeaves, p->pPars->nLutSize / 2 );
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else
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iDecMask = 0;
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Vec_IntWriteEntry( p->vTtDecs[pCut->nLeaves], truthId, iDecMask );
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@ -2428,10 +2428,10 @@ static inline int Abc_TtCheckBiDecSimple( word * pTruth, int nVars, int nSuppLim
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}
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return 0;
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}
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static inline int Abc_TtProcessBiDec( word * pTruth, int nVars, int nSuppLim )
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static inline int Abc_TtProcessBiDecInt( word * pTruth, int nVars, int nSuppLim )
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{
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int i, v, Res, nSupp, CountShared = 0, pGraph[12] = {0};
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assert( nSuppLim < nVars && nVars <= 12 );
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assert( nSuppLim < nVars && nVars <= 2 * nSuppLim && nVars <= 12 );
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assert( 2 <= nSuppLim && nSuppLim <= 6 );
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Res = Abc_TtCheckBiDecSimple( pTruth, nVars, nSuppLim );
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if ( Res )
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@ -2465,6 +2465,20 @@ static inline int Abc_TtProcessBiDec( word * pTruth, int nVars, int nSuppLim )
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}
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return 0;
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}
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static inline int Abc_TtProcessBiDec( word * pTruth, int nVars, int nSuppLim )
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{
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word pFunc[64];
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int Res, nWords = Abc_TtWordNum(nVars);
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Abc_TtCopy( pFunc, pTruth, nWords, 0 );
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Res = Abc_TtProcessBiDecInt( pFunc, nVars, nSuppLim );
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if ( Res )
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return Res;
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Abc_TtCopy( pFunc, pTruth, nWords, 1 );
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Res = Abc_TtProcessBiDecInt( pFunc, nVars, nSuppLim );
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if ( Res )
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return Res | (1 << 30);
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return 0;
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}
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/**Function*************************************************************
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