Exprimental features in tech-mapping.

This commit is contained in:
Alan Mishchenko 2014-12-21 01:04:39 -08:00
parent 55f0a2805c
commit 6733abd72e
4 changed files with 71 additions and 11 deletions

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@ -1681,7 +1681,46 @@ Gia_Man_t * Gia_ManFromIfLogic( If_Man_t * pIfMan )
}
else if ( pIfMan->pPars->fUseAndVars && pIfMan->pPars->fDeriveLuts && (int)pCutBest->nLeaves > pIfMan->pPars->nLutSize/2 )
{
assert( 0 );
word pFunc[64], uTruth[2];
int nLeaves = pCutBest->nLeaves;
int truthId = Abc_Lit2Var(pCutBest->iCutFunc);
int c, Mask = Vec_IntEntry(pIfMan->vTtDecs[nLeaves], truthId);
int MaskOne[2] = { Mask & 0xFFFF, (Mask >> 16) & 0x3FFF };
int iLitCofs[2], iTemp, fOrDec = (Mask >> 30) & 1;
assert( Mask > 0 && nLeaves <= 2 * (pIfMan->pPars->nLutSize/2) && pIfMan->pPars->nLutSize <= 13 );
Abc_TtCopy( pFunc, If_CutTruthWR(pIfMan, pCutBest), pIfMan->nTruth6Words[nLeaves], fOrDec );
Abc_TtDeriveBiDec( pFunc, nLeaves, MaskOne[0], MaskOne[1], pIfMan->pPars->nLutSize/2, &uTruth[0], &uTruth[1] );
uTruth[0] = fOrDec ? ~uTruth[0] : uTruth[0];
uTruth[1] = fOrDec ? ~uTruth[1] : uTruth[1];
for ( c = 0; c < 2; c++ )
{
Vec_IntClear( vLeaves2 );
for ( k = 0; k < nLeaves; k++ )
if ( (MaskOne[c] >> k) & 1 )
Vec_IntPush( vLeaves2, Vec_IntEntry(vLeaves, k) );
assert( Vec_IntSize(vLeaves2) >= 1 );
iLitCofs[c] = Kit_TruthToGia( pNew, (unsigned *)&uTruth[c], Vec_IntSize(vLeaves2), vCover, vLeaves2, 0 );
if ( Vec_IntSize(vLeaves2) == 1 )
continue;
// create mapping
assert( Gia_ObjIsAnd(Gia_ManObj(pNew, Abc_Lit2Var(iLitCofs[c]))) );
Vec_IntSetEntry( vMapping, Abc_Lit2Var(iLitCofs[c]), Vec_IntSize(vMapping2) );
Vec_IntPush( vMapping2, Vec_IntSize(vLeaves2) );
Vec_IntForEachEntry( vLeaves2, iTemp, k )
Vec_IntPush( vMapping2, Abc_Lit2Var(iTemp) );
Vec_IntPush( vMapping2, Abc_Lit2Var(iLitCofs[c]) );
}
iLitCofs[0] = Abc_LitNotCond( iLitCofs[0], fOrDec );
iLitCofs[1] = Abc_LitNotCond( iLitCofs[1], fOrDec );
pIfObj->iCopy = Gia_ManAppendAnd( pNew, iLitCofs[0], iLitCofs[1] );
pIfObj->iCopy = Abc_LitNotCond( pIfObj->iCopy, fOrDec ^ Abc_LitIsCompl(pCutBest->iCutFunc) );
// create mapping
Vec_IntSetEntry( vMapping, Abc_Lit2Var(pIfObj->iCopy), Vec_IntSize(vMapping2) );
Vec_IntPush( vMapping2, 2 );
Vec_IntPush( vMapping2, Abc_Lit2Var(iLitCofs[0]) );
Vec_IntPush( vMapping2, Abc_Lit2Var(iLitCofs[1]) );
Vec_IntPush( vMapping2, -Abc_Lit2Var(pIfObj->iCopy) );
pIfObj->iCopy = Abc_LitNotCond( pIfObj->iCopy, pCutBest->fCompl );
}
else if ( (pIfMan->pPars->fDeriveLuts && pIfMan->pPars->fTruth) || pIfMan->pPars->fUseDsd || pIfMan->pPars->fUseTtPerm )
{

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@ -31706,7 +31706,7 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
}
pPars->pLutLib = (If_LibLut_t *)pAbc->pLibLut;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "KCFAGRDEWSTqalepmrsdbgxyojfuikztncvh" ) ) != EOF )
while ( ( c = Extra_UtilGetopt( argc, argv, "KCFAGRDEWSTqalepmrsdbgxyofuijkztncvh" ) ) != EOF )
{
switch ( c )
{
@ -31878,9 +31878,6 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
case 'o':
pPars->fUseBuffs ^= 1;
break;
case 'j':
pPars->fEnableCheck07 ^= 1;
break;
case 'f':
pPars->fEnableCheck75 ^= 1;
break;
@ -31890,6 +31887,12 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
case 'i':
pPars->fUseCofVars ^= 1;
break;
// case 'j':
// pPars->fEnableCheck07 ^= 1;
// break;
case 'j':
pPars->fUseAndVars ^= 1;
break;
case 'k':
pPars->fUseDsdTune ^= 1;
break;
@ -31998,6 +32001,8 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
}
pPars->fCutMin = 1;
}
if ( pPars->fUseAndVars )
pPars->fCutMin = 1;
if ( pPars->fUseDsdTune )
{
If_DsdMan_t * pDsdMan = (If_DsdMan_t *)Abc_FrameReadManDsd();
@ -32170,7 +32175,7 @@ usage:
sprintf(LutSize, "library" );
else
sprintf(LutSize, "%d", pPars->nLutSize );
Abc_Print( -2, "usage: &if [-KCFAGRT num] [-DEW float] [-S str] [-qarlepmsdbgxyojfuikztncvh]\n" );
Abc_Print( -2, "usage: &if [-KCFAGRT num] [-DEW float] [-S str] [-qarlepmsdbgxyofuijkztncvh]\n" );
Abc_Print( -2, "\t performs FPGA technology mapping of the network\n" );
Abc_Print( -2, "\t-K num : the number of LUT inputs (2 < num < %d) [default = %s]\n", IF_MAX_LUTSIZE+1, LutSize );
Abc_Print( -2, "\t-C num : the max number of priority cuts (0 < num < 2^12) [default = %d]\n", pPars->nCutsMax );
@ -32197,10 +32202,11 @@ usage:
Abc_Print( -2, "\t-x : toggles delay optimization by DSD balancing [default = %s]\n", pPars->fDsdBalance? "yes": "no" );
Abc_Print( -2, "\t-y : toggles delay optimization with recorded library [default = %s]\n", pPars->fUserRecLib? "yes": "no" );
Abc_Print( -2, "\t-o : toggles using buffers to decouple combinational outputs [default = %s]\n", pPars->fUseBuffs? "yes": "no" );
Abc_Print( -2, "\t-j : toggles enabling additional check [default = %s]\n", pPars->fEnableCheck07? "yes": "no" );
Abc_Print( -2, "\t-f : toggles enabling additional check [default = %s]\n", pPars->fEnableCheck75? "yes": "no" );
Abc_Print( -2, "\t-u : toggles enabling additional check [default = %s]\n", pPars->fEnableCheck75u? "yes": "no" );
Abc_Print( -2, "\t-i : toggles using cofactoring variables [default = %s]\n", pPars->fUseCofVars? "yes": "no" );
// Abc_Print( -2, "\t-j : toggles enabling additional check [default = %s]\n", pPars->fEnableCheck07? "yes": "no" );
Abc_Print( -2, "\t-j : toggles using AND bi-decomposition [default = %s]\n", pPars->fUseAndVars? "yes": "no" );
Abc_Print( -2, "\t-k : toggles matching based on precomputed DSD manager [default = %s]\n", pPars->fUseDsdTune? "yes": "no" );
Abc_Print( -2, "\t-z : toggles deriving LUTs when mapping into LUT structures [default = %s]\n", pPars->fDeriveLuts? "yes": "no" );
Abc_Print( -2, "\t-t : toggles optimizing average rather than maximum level [default = %s]\n", pPars->fDoAverage? "yes": "no" );

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@ -275,12 +275,13 @@ void If_ObjPerformMappingAnd( If_Man_t * p, If_Obj_t * pObj, int Mode, int fPrep
if ( p->pPars->fUseAndVars )
{
int iDecMask = -1, truthId = Abc_Lit2Var(pCut->iCutFunc);
assert( p->pPars->nLutSize <= 13 );
if ( truthId >= Vec_IntSize(p->vTtDecs[pCut->nLeaves]) || Vec_IntEntry(p->vTtDecs[pCut->nLeaves], truthId) == -1 )
{
while ( truthId >= Vec_IntSize(p->vTtDecs[pCut->nLeaves]) )
Vec_IntPush( p->vTtDecs[pCut->nLeaves], -1 );
if ( (int)pCut->nLeaves > p->pPars->nLutSize / 2 )
iDecMask = Abc_TtProcessBiDec( If_CutTruthW(p, pCut), (int)pCut->nLeaves, p->pPars->nLutSize / 2 );
if ( (int)pCut->nLeaves > p->pPars->nLutSize / 2 && (int)pCut->nLeaves <= 2 * (p->pPars->nLutSize / 2) )
iDecMask = Abc_TtProcessBiDec( If_CutTruthWR(p, pCut), (int)pCut->nLeaves, p->pPars->nLutSize / 2 );
else
iDecMask = 0;
Vec_IntWriteEntry( p->vTtDecs[pCut->nLeaves], truthId, iDecMask );

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@ -2428,10 +2428,10 @@ static inline int Abc_TtCheckBiDecSimple( word * pTruth, int nVars, int nSuppLim
}
return 0;
}
static inline int Abc_TtProcessBiDec( word * pTruth, int nVars, int nSuppLim )
static inline int Abc_TtProcessBiDecInt( word * pTruth, int nVars, int nSuppLim )
{
int i, v, Res, nSupp, CountShared = 0, pGraph[12] = {0};
assert( nSuppLim < nVars && nVars <= 12 );
assert( nSuppLim < nVars && nVars <= 2 * nSuppLim && nVars <= 12 );
assert( 2 <= nSuppLim && nSuppLim <= 6 );
Res = Abc_TtCheckBiDecSimple( pTruth, nVars, nSuppLim );
if ( Res )
@ -2465,6 +2465,20 @@ static inline int Abc_TtProcessBiDec( word * pTruth, int nVars, int nSuppLim )
}
return 0;
}
static inline int Abc_TtProcessBiDec( word * pTruth, int nVars, int nSuppLim )
{
word pFunc[64];
int Res, nWords = Abc_TtWordNum(nVars);
Abc_TtCopy( pFunc, pTruth, nWords, 0 );
Res = Abc_TtProcessBiDecInt( pFunc, nVars, nSuppLim );
if ( Res )
return Res;
Abc_TtCopy( pFunc, pTruth, nWords, 1 );
Res = Abc_TtProcessBiDecInt( pFunc, nVars, nSuppLim );
if ( Res )
return Res | (1 << 30);
return 0;
}
/**Function*************************************************************