luke
/
abc
mirror of https://github.com/YosysHQ/abc.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Adding support for input slew and output capacitance to timer and gate-sizer.

This commit is contained in:
Alan Mishchenko 2013-07-21 01:01:53 -07:00
parent ab84c73eb0
commit 1ed823c67d
6 changed files with 99 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/base/abc/abc.h
View File

@ -113,7 +113,6 @@ typedef enum {
typedef struct Abc_Lib_t_ Abc_Lib_t;
typedef struct Abc_Ntk_t_ Abc_Ntk_t;
struct Abc_Obj_t_;
typedef struct Abc_Obj_t_ Abc_Obj_t;
typedef struct Abc_Aig_t_ Abc_Aig_t;
typedef struct Abc_ManTime_t_ Abc_ManTime_t;

4
src/base/abci/abcTiming.c
View File

@ -125,12 +125,12 @@ Abc_Time_t * Abc_NtkReadDefaultOutputLoad( Abc_Ntk_t * pNtk )
Abc_Time_t * Abc_NodeReadInputDrive( Abc_Ntk_t * pNtk, int iPi )
{
assert( pNtk->pManTime );
return pNtk->pManTime->tInDrive + iPi;
return pNtk->pManTime->tInDrive ? pNtk->pManTime->tInDrive + iPi : NULL;
}
Abc_Time_t * Abc_NodeReadOutputLoad( Abc_Ntk_t * pNtk, int iPo )
{
assert( pNtk->pManTime );
return pNtk->pManTime->tOutLoad + iPo;
return pNtk->pManTime->tOutLoad ? pNtk->pManTime->tOutLoad + iPo : NULL;
}
float Abc_NodeReadInputDriveWorst( Abc_Ntk_t * pNtk, int iPi )
{

1
src/map/scl/sclInt.h
View File

@ -229,6 +229,7 @@ static inline SC_Pin * SC_CellPin( SC_Cell * p, int i ) { return (SC
static inline Vec_Wrd_t * SC_CellFunc( SC_Cell * p ) { return SC_CellPin(p, p->n_inputs)->vFunc; }
static inline double SC_LibCapFf( SC_Lib * p, double cap ) { return cap * p->unit_cap_fst * pow(10.0, 15 - p->unit_cap_snd); }
static inline double SC_LibCapFromFf( SC_Lib * p, double cap ) { return cap / p->unit_cap_fst / pow(10.0, 15 - p->unit_cap_snd); }
static inline double SC_LibTimePs( SC_Lib * p, double time ) { return time * pow(10.0, 12 - p->unit_time); }
static inline double SC_LibTimeFromPs( SC_Lib * p, double ps ) { return ps / pow(10.0, 12 - p->unit_time); }

11
src/map/scl/sclLoad.c
View File

@ -146,7 +146,8 @@ void Abc_SclComputeLoad( SC_Man * p )
Abc_NtkForEachObj( p->pNtk, pObj, i )
{
SC_Pair * pLoad = Abc_SclObjLoad( p, pObj );
pLoad->rise = pLoad->fall = 0.0;
if ( !Abc_ObjIsPo(pObj) )
pLoad->rise = pLoad->fall = 0.0;
}
// add cell load
Abc_NtkForEachNode1( p->pNtk, pObj, i )
@ -160,6 +161,14 @@ void Abc_SclComputeLoad( SC_Man * p )
pLoad->fall += pPin->fall_cap;
}
}
// add PO load
Abc_NtkForEachPo( p->pNtk, pObj, i )
{
SC_Pair * pLoadPo = Abc_SclObjLoad( p, pObj );
SC_Pair * pLoad = Abc_SclObjLoad( p, Abc_ObjFanin0(pObj) );
pLoad->rise += pLoadPo->rise;
pLoad->fall += pLoadPo->fall;
}
if ( p->pWLoadUsed == NULL )
return;
// add wire load

17
src/map/scl/sclMan.h
View File

@ -193,9 +193,26 @@ static inline void Abc_SclManFree( SC_Man * p )
}
static inline void Abc_SclManCleanTime( SC_Man * p )
{
Vec_Flt_t * vSlews;
Abc_Obj_t * pObj;
int i;
vSlews = Vec_FltAlloc( 2 * Abc_NtkPiNum(p->pNtk) );
Abc_NtkForEachPi( p->pNtk, pObj, i )
{
SC_Pair * pSlew = Abc_SclObjSlew( p, pObj );
Vec_FltPush( vSlews, pSlew->rise );
Vec_FltPush( vSlews, pSlew->fall );
}
memset( p->pDepts, 0, sizeof(SC_Pair) * p->nObjs );
memset( p->pTimes, 0, sizeof(SC_Pair) * p->nObjs );
memset( p->pSlews, 0, sizeof(SC_Pair) * p->nObjs );
Abc_NtkForEachPi( p->pNtk, pObj, i )
{
SC_Pair * pSlew = Abc_SclObjSlew( p, pObj );
pSlew->rise = Vec_FltEntry( vSlews, 2 * i + 0 );
pSlew->fall = Vec_FltEntry( vSlews, 2 * i + 1 );
}
Vec_FltFree( vSlews );
}

71
src/map/scl/sclTime.c
View File

@ -111,7 +111,7 @@ static inline void Abc_SclTimeNodePrint( SC_Man * p, Abc_Obj_t * pObj, int fRise
printf( "%7d : ", Abc_ObjId(pObj) );
printf( "%d ", Abc_ObjFaninNum(pObj) );
printf( "%2d ", Abc_ObjFanoutNum(pObj) );
printf( "%-*s ", Length, Abc_SclObjCell(p, pObj)->pName );
printf( "%-*s ", Length, Abc_ObjIsPi(pObj) ? "pi" : Abc_SclObjCell(p, pObj)->pName );
if ( fRise >= 0 )
printf( "(%s) ", fRise ? "rise" : "fall" );
printf( "delay = (" );
@ -161,7 +161,7 @@ void Abc_SclTimeNtkPrint( SC_Man * p, int fShowAll, int fShort )
}
// print timing
pObj = Abc_ObjFanin0(pPivot);
while ( pObj && Abc_ObjIsNode(pObj) )
while ( pObj )//&& Abc_ObjIsNode(pObj) )
{
printf( "C-path %3d -- ", i-- );
Abc_SclTimeNodePrint( p, pObj, fRise, nLength, maxDelay );
@ -332,6 +332,72 @@ void Abc_SclTimeNtkRecompute( SC_Man * p, float * pArea, float * pDelay, int fRe
}
}
/**Function*************************************************************
Synopsis [Read input slew and output load.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_SclManReadSlewAndLoad( SC_Man * p, Abc_Ntk_t * pNtk )
{
Abc_Time_t * pTime;
Abc_Obj_t * pObj;
int i;
if ( pNtk->pManTime == NULL )
return;
// read input slew
pTime = Abc_NtkReadDefaultInputDrive( pNtk );
if ( Abc_MaxFloat(pTime->Rise, pTime->Fall) != 0 )
{
printf( "Default input slew is specified (%.2f ps; %.2f ps).\n", pTime->Rise, pTime->Fall );
Abc_NtkForEachPi( pNtk, pObj, i )
{
SC_Pair * pSlew = Abc_SclObjSlew( p, pObj );
pSlew->rise = SC_LibTimeFromPs( p->pLib, pTime->Rise );
pSlew->fall = SC_LibTimeFromPs( p->pLib, pTime->Fall );
}
}
if ( Abc_NodeReadInputDrive(pNtk, 0) != NULL )
{
printf( "Input slews for some primary inputs are specified.\n" );
Abc_NtkForEachPi( pNtk, pObj, i )
{
SC_Pair * pSlew = Abc_SclObjSlew( p, pObj );
pTime = Abc_NodeReadInputDrive(pNtk, i);
pSlew->rise = SC_LibTimeFromPs( p->pLib, pTime->Rise );
pSlew->fall = SC_LibTimeFromPs( p->pLib, pTime->Fall );
}
}
// read output load
pTime = Abc_NtkReadDefaultOutputLoad( pNtk );
if ( Abc_MaxFloat(pTime->Rise, pTime->Fall) != 0 )
{
printf( "Default output load is specified (%.2f ff; %.2f ff).\n", pTime->Rise, pTime->Fall );
Abc_NtkForEachPo( pNtk, pObj, i )
{
SC_Pair * pSlew = Abc_SclObjLoad( p, pObj );
pSlew->rise = SC_LibCapFromFf( p->pLib, pTime->Rise );
pSlew->fall = SC_LibCapFromFf( p->pLib, pTime->Fall );
}
}
if ( Abc_NodeReadOutputLoad(pNtk, 0) != NULL )
{
printf( "Output loads for some primary outputs are specified.\n" );
Abc_NtkForEachPo( pNtk, pObj, i )
{
SC_Pair * pSlew = Abc_SclObjLoad( p, pObj );
pTime = Abc_NodeReadOutputLoad(pNtk, i);
pSlew->rise = SC_LibCapFromFf( p->pLib, pTime->Rise );
pSlew->fall = SC_LibCapFromFf( p->pLib, pTime->Fall );
}
}
}
/**Function*************************************************************
Synopsis [Prepare timing manager.]
@ -348,6 +414,7 @@ SC_Man * Abc_SclManStart( SC_Lib * pLib, Abc_Ntk_t * pNtk, int fUseWireLoads, in
SC_Man * p = Abc_SclManAlloc( pLib, pNtk );
assert( p->vGates == NULL );
p->vGates = Abc_SclManFindGates( pLib, pNtk );
Abc_SclManReadSlewAndLoad( p, pNtk );
if ( fUseWireLoads )
p->pWLoadUsed = Abc_SclFindWireLoadModel( pLib, Abc_SclGetTotalArea(p) );
Abc_SclTimeNtkRecompute( p, &p->SumArea0, &p->MaxDelay0, fDept, DUser );