mirror of https://github.com/YosysHQ/abc.git
Adding cyclicity check for netlist with boxes.
This commit is contained in:
Alan Mishchenko
parent
873c35018a
commit
5ebf135b6a
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@ -135,6 +135,10 @@ SOURCE=.\src\base\abc\abcHieCec.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\base\abc\abcHieGia.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\base\abc\abcHieNew.c
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# End Source File
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# Begin Source File
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@ -610,6 +610,7 @@ extern ABC_DLL Vec_Ptr_t * Abc_NtkDfsIter( Abc_Ntk_t * pNtk, int fCollect
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extern ABC_DLL Vec_Ptr_t * Abc_NtkDfsIterNodes( Abc_Ntk_t * pNtk, Vec_Ptr_t * vRoots );
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extern ABC_DLL Vec_Ptr_t * Abc_NtkDfsHie( Abc_Ntk_t * pNtk, int fCollectAll );
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extern ABC_DLL int Abc_NtkIsDfsOrdered( Abc_Ntk_t * pNtk );
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extern ABC_DLL Vec_Ptr_t * Abc_NtkDfsWithBoxes( Abc_Ntk_t * pNtk );
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extern ABC_DLL Vec_Ptr_t * Abc_NtkSupport( Abc_Ntk_t * pNtk );
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extern ABC_DLL Vec_Ptr_t * Abc_NtkNodeSupport( Abc_Ntk_t * pNtk, Abc_Obj_t ** ppNodes, int nNodes );
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extern ABC_DLL Vec_Ptr_t * Abc_AigDfs( Abc_Ntk_t * pNtk, int fCollectAll, int fCollectCos );
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@ -619,6 +620,7 @@ extern ABC_DLL Vec_Vec_t * Abc_NtkLevelize( Abc_Ntk_t * pNtk );
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extern ABC_DLL int Abc_NtkLevel( Abc_Ntk_t * pNtk );
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extern ABC_DLL int Abc_NtkLevelReverse( Abc_Ntk_t * pNtk );
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extern ABC_DLL int Abc_NtkIsAcyclic( Abc_Ntk_t * pNtk );
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extern ABC_DLL int Abc_NtkIsAcyclicWithBoxes( Abc_Ntk_t * pNtk );
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extern ABC_DLL Vec_Ptr_t * Abc_AigGetLevelizedOrder( Abc_Ntk_t * pNtk, int fCollectCis );
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/*=== abcFanio.c ==========================================================*/
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extern ABC_DLL void Abc_ObjAddFanin( Abc_Obj_t * pObj, Abc_Obj_t * pFanin );
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@ -687,6 +687,95 @@ int Abc_NtkIsDfsOrdered( Abc_Ntk_t * pNtk )
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return 1;
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}
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/**Function*************************************************************
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Synopsis [Create DFS ordering of nets.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Abc_NtkDfsNets_rec( Abc_Obj_t * pNet, Vec_Ptr_t * vNets )
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{
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Abc_Obj_t * pNext;
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Abc_Obj_t * pNode; int i;
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assert( Abc_ObjIsNet(pNet) );
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if ( Abc_NodeIsTravIdCurrent( pNet ) )
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return;
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Abc_NodeSetTravIdCurrent( pNet );
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pNode = Abc_ObjFanin0( pNet );
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Abc_ObjForEachFanin( pNode, pNext, i )
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Abc_NtkDfsNets_rec( pNext, vNets );
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Abc_ObjForEachFanout( pNode, pNext, i )
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Vec_PtrPush( vNets, pNext );
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}
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Vec_Ptr_t * Abc_NtkDfsNets( Abc_Ntk_t * pNtk )
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{
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Vec_Ptr_t * vNets;
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Abc_Obj_t * pObj; int i;
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vNets = Vec_PtrAlloc( 100 );
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Abc_NtkIncrementTravId( pNtk );
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Abc_NtkForEachCi( pNtk, pObj, i )
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Abc_NodeSetTravIdCurrent( Abc_ObjFanout0(pObj) );
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Abc_NtkForEachCi( pNtk, pObj, i )
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Vec_PtrPush( vNets, Abc_ObjFanout0(pObj) );
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Abc_NtkForEachCo( pNtk, pObj, i )
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Abc_NtkDfsNets_rec( Abc_ObjFanin0(pObj), vNets );
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return vNets;
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}
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/**Function*************************************************************
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Synopsis [Returns the DFS ordered array of logic nodes.]
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Description [Collects only the internal nodes, leaving out CIs and CO.
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However it marks with the current TravId both CIs and COs.]
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Abc_NtkDfsWithBoxes_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes )
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{
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Abc_Obj_t * pFanin;
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int i;
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assert( !Abc_ObjIsNet(pNode) );
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if ( Abc_ObjIsBo(pNode) )
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pNode = Abc_ObjFanin0(pNode);
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if ( Abc_ObjIsPi(pNode) )
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return;
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assert( Abc_ObjIsNode( pNode ) || Abc_ObjIsBox( pNode ) );
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if ( Abc_NodeIsTravIdCurrent( pNode ) )
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return;
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Abc_NodeSetTravIdCurrent( pNode );
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Abc_ObjForEachFanin( pNode, pFanin, i )
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{
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if ( Abc_ObjIsBox(pNode) )
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pFanin = Abc_ObjFanin0(pFanin);
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assert( Abc_ObjIsNet(pFanin) );
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Abc_NtkDfsWithBoxes_rec( Abc_ObjFanin0Ntk(pFanin), vNodes );
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}
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Vec_PtrPush( vNodes, pNode );
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}
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Vec_Ptr_t * Abc_NtkDfsWithBoxes( Abc_Ntk_t * pNtk )
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{
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Vec_Ptr_t * vNodes;
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Abc_Obj_t * pObj;
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int i;
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Abc_NtkIncrementTravId( pNtk );
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vNodes = Vec_PtrAlloc( 100 );
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Abc_NtkForEachPo( pNtk, pObj, i )
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{
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assert( Abc_ObjIsNet(Abc_ObjFanin0(pObj)) );
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Abc_NtkDfsWithBoxes_rec( Abc_ObjFanin0Ntk(Abc_ObjFanin0(pObj)), vNodes );
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}
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return vNodes;
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}
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/**Function*************************************************************
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@ -1353,6 +1442,99 @@ int Abc_NtkIsAcyclic( Abc_Ntk_t * pNtk )
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}
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return fAcyclic;
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}
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/**Function*************************************************************
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Synopsis [Checks for the loops with boxes.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Abc_NtkIsAcyclicWithBoxes_rec( Abc_Obj_t * pNode )
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{
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Abc_Ntk_t * pNtk = pNode->pNtk;
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Abc_Obj_t * pFanin;
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int fAcyclic, i;
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assert( !Abc_ObjIsNet(pNode) );
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if ( Abc_ObjIsBo(pNode) )
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pNode = Abc_ObjFanin0(pNode);
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if ( Abc_ObjIsPi(pNode) )
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return 1;
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assert( Abc_ObjIsNode(pNode) || Abc_ObjIsBox(pNode) );
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// make sure the node is not visited
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assert( !Abc_NodeIsTravIdPrevious(pNode) );
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// check if the node is part of the combinational loop
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if ( Abc_NodeIsTravIdCurrent(pNode) )
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{
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fprintf( stdout, "Network \"%s\" contains combinational loop!\n", Abc_NtkName(pNtk) );
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if ( Abc_ObjIsBox(pNode) )
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fprintf( stdout, "Box \"%s\" is encountered twice on the following path to the COs:\n", Abc_ObjName(pNode) );
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else
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fprintf( stdout, "Node \"%s\" is encountered twice on the following path to the COs:\n", Abc_ObjName(Abc_ObjFanout0(pNode)) );
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return 0;
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}
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// mark this node as a node on the current path
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Abc_NodeSetTravIdCurrent( pNode );
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// visit the transitive fanin
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Abc_ObjForEachFanin( pNode, pFanin, i )
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{
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if ( Abc_ObjIsBox(pNode) )
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pFanin = Abc_ObjFanin0(pFanin);
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pFanin = Abc_ObjFanin0Ntk(pFanin);
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// make sure there is no mixing of networks
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assert( pFanin->pNtk == pNode->pNtk );
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// check if the fanin is visited
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if ( Abc_ObjIsPi(pFanin) )
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continue;
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if ( Abc_ObjIsBo(pFanin) )
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pFanin = Abc_ObjFanin0(pFanin);
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assert( Abc_ObjIsNode(pFanin) || Abc_ObjIsBox(pFanin) );
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if ( Abc_NodeIsTravIdPrevious(pFanin) )
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continue;
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// traverse the fanin's cone searching for the loop
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if ( (fAcyclic = Abc_NtkIsAcyclicWithBoxes_rec(pFanin)) )
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continue;
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// return as soon as the loop is detected
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fprintf( stdout, " %s ->", Abc_ObjName( Abc_ObjIsBox(pFanin) ? pFanin : Abc_ObjFanout0(pFanin) ) );
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return 0;
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}
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// mark this node as a visited node
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assert( Abc_ObjIsNode(pNode) || Abc_ObjIsBox(pNode) );
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Abc_NodeSetTravIdPrevious( pNode );
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return 1;
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}
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int Abc_NtkIsAcyclicWithBoxes( Abc_Ntk_t * pNtk )
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{
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Abc_Obj_t * pNode;
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int fAcyclic;
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int i;
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// set the traversal ID for this DFS ordering
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Abc_NtkIncrementTravId( pNtk );
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Abc_NtkIncrementTravId( pNtk );
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// pNode->TravId == pNet->nTravIds means "pNode is on the path"
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// pNode->TravId == pNet->nTravIds - 1 means "pNode is visited but is not on the path"
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// pNode->TravId < pNet->nTravIds - 1 means "pNode is not visited"
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// traverse the network to detect cycles
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fAcyclic = 1;
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Abc_NtkForEachPo( pNtk, pNode, i )
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{
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pNode = Abc_ObjFanin0Ntk(Abc_ObjFanin0(pNode));
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if ( Abc_NodeIsTravIdPrevious(pNode) )
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continue;
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// traverse the output logic cone
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if ( (fAcyclic = Abc_NtkIsAcyclicWithBoxes_rec(pNode)) )
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continue;
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// stop as soon as the first loop is detected
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fprintf( stdout, " PO \"%s\"\n", Abc_ObjName(Abc_ObjFanout0(pNode)) );
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break;
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}
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return fAcyclic;
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}
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/**Function*************************************************************
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@ -0,0 +1,184 @@
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/**CFile****************************************************************
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FileName [abcHieGia.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Network and node package.]
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Synopsis [Procedures to handle hierarchy.]
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Author [Alan Mishchenko]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - June 20, 2005.]
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Revision [$Id: abcHieGia.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "abc.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Transfers the AIG from one manager into another.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Abc_NodeStrashToGia_rec( Gia_Man_t * pNew, Hop_Obj_t * pObj )
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{
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assert( !Hop_IsComplement(pObj) );
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if ( !Hop_ObjIsNode(pObj) || Hop_ObjIsMarkA(pObj) )
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return;
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Abc_NodeStrashToGia_rec( pNew, Hop_ObjFanin0(pObj) );
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Abc_NodeStrashToGia_rec( pNew, Hop_ObjFanin1(pObj) );
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pObj->iData = Gia_ManHashAnd( pNew, Hop_ObjChild0CopyI(pObj), Hop_ObjChild1CopyI(pObj) );
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assert( !Hop_ObjIsMarkA(pObj) ); // loop detection
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Hop_ObjSetMarkA( pObj );
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}
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int Abc_NodeStrashToGia( Gia_Man_t * pNew, Abc_Obj_t * pNode )
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{
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Hop_Man_t * pMan = (Hop_Man_t *)pNode->pNtk->pManFunc;
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Hop_Obj_t * pRoot = (Hop_Obj_t *)pNode->pData;
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Abc_Obj_t * pFanin; int i;
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assert( Abc_ObjIsNode(pNode) );
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assert( Abc_NtkHasAig(pNode->pNtk) && !Abc_NtkIsStrash(pNode->pNtk) );
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// check the constant case
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if ( Abc_NodeIsConst(pNode) || Hop_Regular(pRoot) == Hop_ManConst1(pMan) )
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return Abc_LitNotCond( 1, Hop_IsComplement(pRoot) );
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// set elementary variables
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Abc_ObjForEachFanin( pNode, pFanin, i )
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assert( pFanin->iTemp != -1 );
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Abc_ObjForEachFanin( pNode, pFanin, i )
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Hop_IthVar(pMan, i)->iData = pFanin->iTemp;
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// strash the AIG of this node
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Abc_NodeStrashToGia_rec( pNew, Hop_Regular(pRoot) );
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Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
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return Abc_LitNotCond( Hop_Regular(pRoot)->iData, Hop_IsComplement(pRoot) );
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}
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/**Function*************************************************************
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Synopsis [Flattens the logic hierarchy of the netlist.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Gia_ManFlattenLogicHierarchy_rec( Gia_Man_t * pNew, Abc_Ntk_t * pNtk, int * pCounter )
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{
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Vec_Ptr_t * vDfs = (Vec_Ptr_t *)pNtk->pData;
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Abc_Obj_t * pObj, * pTerm;
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int i, k; (*pCounter)++;
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//printf( "[%d:%d] ", Abc_NtkPiNum(pNtk), Abc_NtkPoNum(pNtk) );
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Vec_PtrForEachEntry( Abc_Obj_t *, vDfs, pObj, i )
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{
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if ( Abc_ObjIsNode(pObj) )
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Abc_ObjFanout0(pObj)->iTemp = Abc_NodeStrashToGia( pNew, pObj );
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else
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{
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Abc_Ntk_t * pModel = (Abc_Ntk_t *)pObj->pData;
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assert( !Abc_ObjIsLatch(pObj) );
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assert( Abc_NtkPiNum(pModel) == Abc_ObjFaninNum(pObj) );
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assert( Abc_NtkPoNum(pModel) == Abc_ObjFanoutNum(pObj) );
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Abc_NtkFillTemp( pModel );
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Abc_ObjForEachFanin( pObj, pTerm, k )
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{
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assert( Abc_ObjIsNet(Abc_ObjFanin0(pTerm)) );
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// Abc_ObjFanout0(Abc_NtkPi(pModel, k))->iTemp = Gia_ManAppendBuf( pNew, Abc_ObjFanin0(pTerm)->iTemp );
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Abc_ObjFanout0(Abc_NtkPi(pModel, k))->iTemp = Abc_ObjFanin0(pTerm)->iTemp;
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}
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Gia_ManFlattenLogicHierarchy_rec( pNew, pModel, pCounter );
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Abc_ObjForEachFanout( pObj, pTerm, k )
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{
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assert( Abc_ObjIsNet(Abc_ObjFanout0(pTerm)) );
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// Abc_ObjFanout0(pTerm)->iTemp = Gia_ManAppendBuf( pNew, Abc_ObjFanin0(Abc_NtkPo(pModel, k))->iTemp );
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Abc_ObjFanout0(pTerm)->iTemp = Abc_ObjFanin0(Abc_NtkPo(pModel, k))->iTemp;
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}
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}
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}
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}
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Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk )
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{
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Gia_Man_t * pNew, * pTemp;
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Abc_Ntk_t * pModel;
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Abc_Obj_t * pTerm;
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int i, Counter = -1;
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assert( Abc_NtkIsNetlist(pNtk) );
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// Abc_NtkPrintBoxInfo( pNtk );
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Abc_NtkFillTemp( pNtk );
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// start the manager
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pNew = Gia_ManStart( Abc_NtkObjNumMax(pNtk) );
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pNew->pName = Abc_UtilStrsav(pNtk->pName);
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pNew->pSpec = Abc_UtilStrsav(pNtk->pSpec);
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// create PIs and buffers
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Abc_NtkForEachPi( pNtk, pTerm, i )
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pTerm->iTemp = Gia_ManAppendCi( pNew );
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Abc_NtkForEachPi( pNtk, pTerm, i )
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// Abc_ObjFanout0(pTerm)->iTemp = Gia_ManAppendBuf( pNew, pTerm->iTemp );
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Abc_ObjFanout0(pTerm)->iTemp = pTerm->iTemp;
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// create DFS order of nets
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if ( !pNtk->pDesign )
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pNtk->pData = Abc_NtkDfsWithBoxes( pNtk );
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else
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Vec_PtrForEachEntry( Abc_Ntk_t *, pNtk->pDesign->vModules, pModel, i )
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pModel->pData = Abc_NtkDfsWithBoxes( pModel );
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// call recursively
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Gia_ManHashAlloc( pNew );
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Gia_ManFlattenLogicHierarchy_rec( pNew, pNtk, &Counter );
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Gia_ManHashStop( pNew );
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printf( "Hierarchy reader flattened %d instances of logic boxes.\n", Counter );
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// delete DFS order of nets
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if ( !pNtk->pDesign )
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Vec_PtrFreeP( (Vec_Ptr_t **)&pNtk->pData );
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else
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Vec_PtrForEachEntry( Abc_Ntk_t *, pNtk->pDesign->vModules, pModel, i )
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Vec_PtrFreeP( (Vec_Ptr_t **)&pModel->pData );
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// create buffers and POs
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Abc_NtkForEachPo( pNtk, pTerm, i )
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// pTerm->iTemp = Gia_ManAppendBuf( pNew, Abc_ObjFanin0(pTerm)->iTemp );
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pTerm->iTemp = Abc_ObjFanin0(pTerm)->iTemp;
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Abc_NtkForEachPo( pNtk, pTerm, i )
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Gia_ManAppendCo( pNew, pTerm->iTemp );
|
||||
|
||||
pNew = Gia_ManCleanup( pTemp = pNew );
|
||||
Gia_ManStop( pTemp );
|
||||
return pNew;
|
||||
}
|
||||
|
||||
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
/// END OF FILE ///
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
|
||||
|
||||
ABC_NAMESPACE_IMPL_END
|
||||
|
||||
|
|
@ -8,6 +8,7 @@ SRC += src/base/abc/abcAig.c \
|
|||
src/base/abc/abcFunc.c \
|
||||
src/base/abc/abcHie.c \
|
||||
src/base/abc/abcHieCec.c \
|
||||
src/base/abc/abcHieGia.c \
|
||||
src/base/abc/abcHieNew.c \
|
||||
src/base/abc/abcLatch.c \
|
||||
src/base/abc/abcLib.c \
|
||||
|
|
|
|||
|
|
@ -170,13 +170,14 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
char Command[1000];
|
||||
Abc_Ntk_t * pNtk;
|
||||
char * pFileName, * pTemp;
|
||||
int c, fCheck, fBarBufs;
|
||||
int c, fCheck, fBarBufs, fReadGia;
|
||||
|
||||
fCheck = 1;
|
||||
fBarBufs = 0;
|
||||
fReadGia = 0;
|
||||
glo_fMapped = 0;
|
||||
Extra_UtilGetoptReset();
|
||||
while ( ( c = Extra_UtilGetopt( argc, argv, "mcbh" ) ) != EOF )
|
||||
while ( ( c = Extra_UtilGetopt( argc, argv, "mcbgh" ) ) != EOF )
|
||||
{
|
||||
switch ( c )
|
||||
{
|
||||
|
|
@ -189,6 +190,9 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
case 'b':
|
||||
fBarBufs ^= 1;
|
||||
break;
|
||||
case 'g':
|
||||
fReadGia ^= 1;
|
||||
break;
|
||||
case 'h':
|
||||
goto usage;
|
||||
default:
|
||||
|
|
@ -225,6 +229,20 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
Cmd_CommandExecute( pAbc, Command );
|
||||
return 0;
|
||||
}
|
||||
if ( fReadGia )
|
||||
{
|
||||
extern Gia_Man_t * Gia_ManFlattenLogicHierarchy( Abc_Ntk_t * pNtk );
|
||||
Abc_Ntk_t * pNtk = Io_ReadNetlist( pFileName, Io_ReadFileType(pFileName), fCheck );
|
||||
Gia_Man_t * pGia = Gia_ManFlattenLogicHierarchy( pNtk );
|
||||
Abc_NtkDelete( pNtk );
|
||||
if ( pGia == NULL )
|
||||
{
|
||||
Abc_Print( 1, "Abc_CommandBlast(): Bit-blasting has failed.\n" );
|
||||
return 0;
|
||||
}
|
||||
Abc_FrameUpdateGia( pAbc, pGia );
|
||||
return 0;
|
||||
}
|
||||
// check if the library is available
|
||||
if ( glo_fMapped && Abc_FrameReadLibGen() == NULL )
|
||||
{
|
||||
|
|
@ -247,13 +265,14 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
return 0;
|
||||
|
||||
usage:
|
||||
fprintf( pAbc->Err, "usage: read [-mcbh] <file>\n" );
|
||||
fprintf( pAbc->Err, "usage: read [-mcbgh] <file>\n" );
|
||||
fprintf( pAbc->Err, "\t replaces the current network by the network read from <file>\n" );
|
||||
fprintf( pAbc->Err, "\t by calling the parser that matches the extension of <file>\n" );
|
||||
fprintf( pAbc->Err, "\t (to read a hierarchical design, use \"read_hie\")\n" );
|
||||
fprintf( pAbc->Err, "\t-m : toggle reading mapped Verilog [default = %s]\n", glo_fMapped? "yes":"no" );
|
||||
fprintf( pAbc->Err, "\t-c : toggle network check after reading [default = %s]\n", fCheck? "yes":"no" );
|
||||
fprintf( pAbc->Err, "\t-b : toggle reading barrier buffers [default = %s]\n", fBarBufs? "yes":"no" );
|
||||
fprintf( pAbc->Err, "\t-g : toggle reading and flattening into &-space [default = %s]\n", fBarBufs? "yes":"no" );
|
||||
fprintf( pAbc->Err, "\t-h : prints the command summary\n" );
|
||||
fprintf( pAbc->Err, "\tfile : the name of a file to read\n" );
|
||||
return 1;
|
||||
|
|
|
|||
|
|
@ -158,7 +158,19 @@ Abc_Ntk_t * Io_ReadNetlist( char * pFileName, Io_FileType_t FileType, int fCheck
|
|||
return NULL;
|
||||
}
|
||||
if ( Abc_NtkBlackboxNum(pNtk) || Abc_NtkWhiteboxNum(pNtk) )
|
||||
{
|
||||
int i, fCycle = 0;
|
||||
Abc_Ntk_t * pModel;
|
||||
fprintf( stdout, "Warning: The network contains hierarchy.\n" );
|
||||
Vec_PtrForEachEntry( Abc_Ntk_t *, pNtk->pDesign->vModules, pModel, i )
|
||||
if ( !Abc_NtkIsAcyclicWithBoxes( pModel ) )
|
||||
fCycle = 1;
|
||||
if ( fCycle )
|
||||
{
|
||||
Abc_NtkDelete( pNtk );
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
return pNtk;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue