Snapshot 20030815.

through to elaborated form.

.cvsignore

@@ -2,10 +2,14 @@ lexor_keyword.cc
 parse.h
 parse.cc
 parse.cc.output
+parse.output
 syn-rules.cc
 syn-rules.cc.output
+syn-rules.output
 lexor.cc
 iverilog-vpi
+iverilog-vpi.pdf
+iverilog-vpi.ps
 ivl
 ivl.exp
 dep
@@ -16,5 +20,6 @@ check.cc
 config.status
 config.log
 config.cache
+autom4te.cache
 config.h
 dosify

BUGS.txt

@@ -16,7 +16,7 @@ compilation tools you are using. Specifically, I need to know:
 	- Operating system and processor type,
 	- Compiler w/ version,
 	- Library version, and
-	- anything else you think relevent.
+	- anything else you think relevant.
 
 Be aware that I do not have at my disposal a porting lab. I have the
 alpha on my desk, and the Linux/Intel box with a logic analyzer and
@@ -110,6 +110,24 @@ program and include a GPL license statement if you can. Your test
 program may find its way into the test suite, and the notices will
 make it all nice and legal.
 
+RESEARCHING EXISTING/PAST BUGS, AND FILING REPORTS
+
+The URL <http://www.icarus.com/cgi-bin/ivl-bugs> is the main bug
+tracking system. Once you believe you have found a bug, you may browse
+the bugs database for existing bugs that may be related to yours. You
+might find that your bug has already been fixed in a later release or
+snapshot. If that's the case, then you are set.
+
+The bug database supports basic keyword searches, and you can
+optionally limit your search to active bugs, or fixed bugs. You may
+also browse the bug database, just to get an idea what is still
+broken. You may for example find a related bug that explains your
+symptom.
+
+The root page of the bug report database describes how to submit your
+completed bug report. You may submit it via the web form, or via
+e-mail.
+
 HOW TO SEND PATCHES
 
 Bug reports with patches are very welcome, especially if they are
@@ -130,7 +148,7 @@ patch is for, I will ask for clarification before applying it.)
 
 COPYRIGHT ISSUES
 
-Icarus Verilog is Copyright (c) 1998-1999 Stephen Williams except
+Icarus Verilog is Copyright (c) 1998-2003 Stephen Williams except
 where otherwise noted. Minor patches are covered as derivative works
 (or editorial comment or whatever the appropriate legal term is) and
 folded into the rest of ivl. However, if a submission can reasonably
@@ -141,8 +159,15 @@ then falls under the "otherwise noted" category.
 I must insist that any copyright material submitted for inclusion
 include the GPL license notice as shown in the rest of the source.
 
-$Id: BUGS.txt,v 1.2 1999/08/06 04:05:28 steve Exp $
+
+$Id: BUGS.txt,v 1.4 2003/02/19 04:36:31 steve Exp $
 $Log: BUGS.txt,v $
+Revision 1.4  2003/02/19 04:36:31  steve
+ Notes on hte bug database.
+
+Revision 1.3  2003/01/30 16:23:07  steve
+ Spelling fixes.
+
 Revision 1.2  1999/08/06 04:05:28  steve
  Handle scope of parameters.
 

HName.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: HName.cc,v 1.4 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: HName.cc,v 1.5 2002/11/02 03:27:52 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -75,6 +75,11 @@ hname_t::~hname_t()
       }
 }
 
+unsigned hname_t::component_count() const
+{
+      return count_;
+}
+
 void hname_t::append(const char*text)
 {
       char**tmp;
@@ -253,6 +258,10 @@ ostream& operator<< (ostream&out, const hname_t&that)
 
 /*
  * $Log: HName.cc,v $
+ * Revision 1.5  2002/11/02 03:27:52  steve
+ *  Allow named events to be referenced by
+ *  hierarchical names.
+ *
  * Revision 1.4  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

HName.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: HName.h,v 1.3 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: HName.h,v 1.4 2002/11/02 03:27:51 steve Exp $"
 #endif
 
 # include  <iostream>
@@ -61,6 +61,10 @@ class hname_t {
       const char*peek_name(unsigned idx) const;
       const char*peek_tail_name() const;
 
+	// Return the number of components in the hierarchical
+	// name. If this is a simple name, this will return 1.
+      unsigned component_count() const;
+
       friend ostream& operator<< (ostream&, const hname_t&);
 
     private:
@@ -79,6 +83,10 @@ extern bool operator == (const hname_t&, const hname_t&);
 
 /*
  * $Log: HName.h,v $
+ * Revision 1.4  2002/11/02 03:27:51  steve
+ *  Allow named events to be referenced by
+ *  hierarchical names.
+ *
  * Revision 1.3  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

LineInfo.cc

@@ -17,13 +17,18 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: LineInfo.cc,v 1.3 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: LineInfo.cc,v 1.4 2003/01/17 05:49:03 steve Exp $"
 #endif
 
 # include "config.h"
 
 # include  "LineInfo.h"
-# include  <cstdio>
+# include  <sstream>
+
+LineInfo::LineInfo()
+: file_(0), lineno_(0)
+{
+}
 
 LineInfo::~LineInfo()
 {
@@ -31,9 +36,11 @@ LineInfo::~LineInfo()
 
 string LineInfo::get_line() const
 {
-      char buf[8];
-      sprintf(buf, "%u", lineno_);
-      return string(file_? file_ : "") + ":" + buf;
+      ostringstream buf;
+      buf << (file_? file_ : "") << ":" << lineno_;
+
+      string res = buf.str();
+      return res;
 }
 
 void LineInfo::set_line(const LineInfo&that)
@@ -42,8 +49,21 @@ void LineInfo::set_line(const LineInfo&that)
       lineno_ = that.lineno_;
 }
 
+void LineInfo::set_file(const char*f)
+{
+      file_ = f;
+}
+
+void LineInfo::set_lineno(unsigned n)
+{
+      lineno_ = n;
+}
+
 /*
  * $Log: LineInfo.cc,v $
+ * Revision 1.4  2003/01/17 05:49:03  steve
+ *  Use stringstream in place of sprintf.
+ *
  * Revision 1.3  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

LineInfo.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: LineInfo.h,v 1.6 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: LineInfo.h,v 1.7 2003/01/17 05:49:03 steve Exp $"
 #endif
 
 # include  <string>
@@ -35,15 +35,15 @@
 
 class LineInfo {
     public:
-      LineInfo() : file_(0), lineno_(0) { }
+      LineInfo();
       ~LineInfo();
 
       string get_line() const;
 
       void set_line(const LineInfo&that);
 
-      void set_file(const char*f) { file_ = f; }
-      void set_lineno(unsigned n) { lineno_ = n; }
+      void set_file(const char*f);
+      void set_lineno(unsigned n);
 
     private:
       const char* file_;
@@ -52,6 +52,9 @@ class LineInfo {
 
 /*
  * $Log: LineInfo.h,v $
+ * Revision 1.7  2003/01/17 05:49:03  steve
+ *  Use stringstream in place of sprintf.
+ *
  * Revision 1.6  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

Makefile.in

@@ -16,7 +16,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.134 2002/09/16 00:30:33 steve Exp $"
+#ident "$Id: Makefile.in,v 1.151 2003/08/10 00:39:13 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -25,7 +25,7 @@ SHELL = /bin/sh
 # by the compiler. It reflects the assigned version number for the
 # product as a whole. Most components also print the CVS Name: token
 # in order to get a more automatic version stamp as well.
-VERSION = 0.6
+VERSION = 0.7
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -67,24 +67,26 @@ ifeq ('@HAVE_IPAL@','yes')
 TARGETS += tgt-pal
 endif
 
-all: ivl@EXEEXT@ libvpi.a
-	for dir in $(SUBDIRS) ; do (cd $$dir ; $(MAKE) all); done
-	cd vpi ; $(MAKE) all
-	cd ivlpp ; $(MAKE) all
-	cd driver ; $(MAKE) VERSION=$(VERSION) all
-	cd tgt-verilog ; $(MAKE) all
-	cd tgt-stub ; $(MAKE) all
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) all); done
+all: dep ivl@EXEEXT@
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
+	for dir in vpi ivlpp tgt-verilog tgt-stub; \
+	    do (cd $$dir ; $(MAKE) $@); done
+	cd driver ; $(MAKE) VERSION=$(VERSION) $@
 
 # In the windows world, the installer will need a dosify program to
 # dosify text files.
 ifeq (@WIN32@,yes)
-all: dosify.exe
+all: dep dosify.exe
 dosify.exe: dosify.c
 	$(CC) -o dosify.exe dosify.c
 
+ifeq (@MINGW32@,yes)
+SUBDIRS += driver-vpi
+endif
+
 else
-all: iverilog-vpi
+all: dep iverilog-vpi
 endif
 
 # This rule rules the compiler in the trivial hello.vl program to make
@@ -92,64 +94,47 @@ endif
 check: all
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) check); done
 	driver/iverilog -Ccheck.conf -ocheck.vvp -tvvp-check -B./ivlpp $(srcdir)/examples/hello.vl
-	vvp/vvp -M./vpi ./check.vvp | grep 'Hello, World'
+	vvp/vvp -M- -M./vpi ./check.vvp | grep 'Hello, World'
 
 clean:
-	rm -f *.o parse.cc parse.cc.output parse.h dep/*.d lexor.cc lexor_keyword.cc ivl@EXEEXT@ libivl.a libvpi.a iverilog-vpi
-	cd vpi ; $(MAKE) clean
-	cd driver ; $(MAKE) clean
-	cd ivlpp ; $(MAKE) clean
-	cd tgt-verilog ; $(MAKE) clean
-	cd tgt-stub ; $(MAKE) clean
-	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) clean); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) clean); done
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
+	for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
+	    do (cd $$dir ; $(MAKE) $@); done
+	rm -f *.o parse.cc parse.cc.output parse.h lexor.cc 
+	rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc*
+	rm -rf dep ivl@EXEEXT@
 
 distclean: clean
-	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) distclean); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) distclean); done
-	rm -f vpi/Makefile
-	rm -f ivlpp/Makefile
-	rm -f driver/Makefile
-	rm -f config.status config.cache config.log
-	rm -f Makefile
-	rm -f tgt-pal/Makefile tgt-stub/Makefile tgt-verilog/Makefile
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
+	for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
+	    do (cd $$dir ; $(MAKE) $@); done
+	rm -f Makefile config.status config.log config.cache config.h
 
 TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-xnf.o
 FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o xnfio.o
 
 O = main.o async.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
 elab_lval.o elab_net.o elab_anet.o elab_pexpr.o elab_scope.o \
-elab_sig.o emit.o eval.o eval_attrib.o eval_rconst.o \
+elab_sig.o emit.o eval.o eval_attrib.o \
 eval_tree.o expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
 load_module.o netlist.o netmisc.o net_assign.o \
 net_design.o net_event.o net_expr.o net_force.o net_func.o \
 net_link.o net_modulo.o net_nex_input.o net_nex_output.o \
-net_proc.o net_scope.o net_udp.o pad_to_width.o \
+net_proc.o net_scope.o net_udp.o net_variable.o pad_to_width.o \
 parse.o parse_misc.o pform.o pform_dump.o \
 set_width.o sync.o \
 verinum.o verireal.o target.o targets.o \
-Attrib.o HName.o LineInfo.o Module.o PDelays.o PEvent.o \
+Attrib.o HName.o LineInfo.o Module.o PData.o PDelays.o PEvent.o \
 PExpr.o PGate.o \
-PTask.o PFunction.o PWire.o Statement.o StringHeap.o \
+PTask.o PUdp.o PFunction.o PWire.o Statement.o StringHeap.o \
 $(FF) $(TT)
 
 Makefile: Makefile.in config.h.in config.status
 	./config.status
 
 
-libvpi.a: vpithunk.o
-	rm -f $@
-	ar cvq $@ vpithunk.o
-	ranlib $@
-
-# The vpithunk.c file (that makes up the libvpi.a library) needs to
-# be make with PIC flags, because shared objects load it.
-vpithunk.o: vpithunk.c
-	@[ -d dep ] || mkdir dep
-	$(CC) $(CPPFLAGS) $(CFLAGS) $(PICFLAGS) -MD -c $< -o $*.o
-	mv $*.d dep/$*.d
-
-
 ifeq (@WIN32@,yes)
 # Under Windows (mingw) I need to make the ivl.exe in two steps.
 # The first step makes an ivl.exe that dlltool can use to make an
@@ -175,9 +160,11 @@ iverilog-vpi: iverilog-vpi.sh
 	chmod +x $@
 endif
 
+dep:
+	mkdir dep
+
 %.o: %.cc
-	@[ -d dep ] || mkdir dep
-	$(CXX) @ident_support@ $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
+	$(CXX) -Wall @ident_support@ $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
 	mv $*.d dep/$*.d
 
 
@@ -185,8 +172,10 @@ lexor.o: lexor.cc parse.h
 
 parse.o: parse.cc
 
-parse.h parse.cc: $(srcdir)/parse.y
+parse.cc: $(srcdir)/parse.y
 	$(YACC) --verbose -t -p VL -d -o parse.cc $(srcdir)/parse.y
+
+parse.h: parse.cc
 	mv parse.cc.h parse.h || mv parse.hh parse.h
 
 syn-rules.cc: $(srcdir)/syn-rules.y
@@ -195,7 +184,7 @@ syn-rules.cc: $(srcdir)/syn-rules.y
 lexor.cc: $(srcdir)/lexor.lex
 	$(LEX) -PVL -s -olexor.cc $(srcdir)/lexor.lex
 
-lexor_keyword.o: lexor_keyword.cc
+lexor_keyword.o: lexor_keyword.cc parse.h
 
 lexor_keyword.cc: lexor_keyword.gperf
 	gperf -o -i 7 -C -k 1-3,$$ -L ANSI-C -H keyword_hash -N check_identifier -t $(srcdir)/lexor_keyword.gperf > lexor_keyword.cc || (rm -f lexor_keyword.cc ; false)
@@ -207,43 +196,45 @@ iverilog-vpi.pdf: iverilog-vpi.ps
 	ps2pdf iverilog-vpi.ps iverilog-vpi.pdf
 
 ifeq (@WIN32@,yes)
-INSTALL_DOC = $(prefix)/iverilog-vpi.pdf
-INSTALL_DOCDIR =
-all: iverilog-vpi.pdf
+INSTALL_DOC = $(prefix)/iverilog-vpi.pdf $(mandir)/man1/iverilog-vpi.1
+INSTALL_DOCDIR = $(mandir)/man1
+all: dep iverilog-vpi.pdf
 else
 INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
 INSTALL_DOCDIR = $(mandir)/man1
 endif
 
 ifeq (@WIN32@,yes)
-WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/QUICK_START.txt
+WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/sqrt-virtex.v $(prefix)/QUICK_START.txt
 else
 WIN32_INSTALL = $(bindir)/iverilog-vpi
 endif
 
-install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(libdir)/ivl/iverilog.conf $(includedir)/ivl_target.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(libdir)/libvpi.a $(WIN32_INSTALL) $(INSTALL_DOC)
-	cd vpi ; $(MAKE) install
-	cd ivlpp ; $(MAKE) install
-	cd driver ; $(MAKE) install
-	for tgt in $(SUBDIRS); do (cd $$tgt ; $(MAKE) install); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) install); done
+install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(libdir)/ivl/iverilog.conf $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
+	for dir in vpi ivlpp driver; \
+	    do (cd $$dir ; $(MAKE) $@); done
 
 $(bindir)/iverilog-vpi: ./iverilog-vpi
-	$(INSTALL_PROGRAM) ./iverilog-vpi $(bindir)/iverilog-vpi
-
-$(libdir)/libvpi.a : ./libvpi.a
-	$(INSTALL_DATA) libvpi.a $(libdir)/libvpi.a
+	$(INSTALL_SCRIPT) ./iverilog-vpi $(bindir)/iverilog-vpi
 
 $(libdir)/ivl/ivl@EXEEXT@: ./ivl@EXEEXT@
 	$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(libdir)/ivl/ivl@EXEEXT@
 	$(STRIP) $(strip_dynamic) $(libdir)/ivl/ivl@EXEEXT@
 
-$(libdir)/ivl/iverilog.conf: $(srcdir)/iverilog.conf
+# Install iverilog.conf whenever ivl.exe is installed. This
+# forces iverilog.conf to be treated similarly, in spite of
+# dates in the source bundle.
+$(libdir)/ivl/iverilog.conf: $(libdir)/ivl/ivl@EXEEXT@
 	$(INSTALL_DATA) $(srcdir)/iverilog.conf $(libdir)/ivl/iverilog.conf
 
 $(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
 	$(INSTALL_DATA) $(srcdir)/ivl_target.h $(includedir)/ivl_target.h
 
+$(includedir)/_pli_types.h: $(srcdir)/_pli_types.h
+	$(INSTALL_DATA) $(srcdir)/_pli_types.h $(includedir)/_pli_types.h
+
 $(includedir)/vpi_user.h: $(srcdir)/vpi_user.h
 	$(INSTALL_DATA) $(srcdir)/vpi_user.h $(includedir)/vpi_user.h
 
@@ -270,6 +261,10 @@ $(prefix)/sqrt.vl: $(srcdir)/examples/sqrt.vl
 	./dosify.exe $(srcdir)/examples/sqrt.vl tmp.vl
 	mv tmp.vl $(prefix)/sqrt.vl
 
+$(prefix)/sqrt-virtex.v: $(srcdir)/examples/sqrt-virtex.v
+	./dosify.exe $(srcdir)/examples/sqrt-virtex.v tmp.vl
+	mv tmp.vl $(prefix)/sqrt-virtex.v
+
 $(prefix)/QUICK_START.txt: $(srcdir)/QUICK_START.txt
 	./dosify.exe $(srcdir)/QUICK_START.txt tmp.txt
 	mv tmp.txt $(prefix)/QUICK_START.txt
@@ -280,23 +275,18 @@ installdirs: mkinstalldirs
 	    $(mandir) $(mandir)/man1
 
 uninstall:
-	rm -f $(libdir)/ivl/iverilog.conf
-	rm -f $(libdir)/ivl/ivl
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
+	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
+	for dir in vpi ivlpp driver; \
+	    do (cd $$dir ; $(MAKE) $@); done
+	for f in iverilog.conf ivl; \
+	    do rm -f $(libdir)/ivl/$$f; done
 	-rmdir $(libdir)/ivl
-	rm -f $(libdir)/libvpi.a
-	rm -f $(bindir)/verilog
-	rm -f $(bindir)/iverilog-vpi
-	rm -f $(bindir)/gverilog@EXEEXT@
-	rm -f $(includedir)/ivl_target.h
-	rm -f $(includedir)/vpi_user.h
-	rm -f $(includedir)/acc_user.h
-	rm -f $(includedir)/veriuser.h
+	for f in verilog iverilog-vpi gverilog@EXEEXT@; \
+	    do rm -f $(bindir)/$$f; done
+	for f in ivl_target.h vpi_user.h _pli_types.h acc_user.h veriuser.h; \
+	    do rm -f $(includedir)/$$f; done
 	rm -f $(mandir)/man1/iverilog-vpi.1
-	cd driver ; $(MAKE) uninstall
-	cd vpi ; $(MAKE) uninstall
-	cd ivlpp ; $(MAKE) uninstall
-	for tgt in $(SUBDIRS); do (cd $$tgt ; $(MAKE) uninstall); done
-	for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) uninstall); done
 
 
 -include $(patsubst %.o, dep/%.d, $O)

Module.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Module.cc,v 1.19 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: Module.cc,v 1.21 2003/04/02 03:00:14 steve Exp $"
 #endif
 
 # include "config.h"
@@ -27,14 +27,14 @@
 # include  "PWire.h"
 # include  <assert.h>
 
-Module::Module(const char*name)
-: name_(strdup(name))
+/* n is a permallocated string. */
+Module::Module(const char*n)
+: name_(n)
 {
 }
 
 Module::~Module()
 {
-      free(name_);
 }
 
 void Module::add_gate(PGate*gate)
@@ -91,9 +91,19 @@ const svector<PEIdent*>& Module::get_port(unsigned idx) const
 unsigned Module::find_port(const string&name) const
 {
       assert(name != "");
-      for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1)
+      for (unsigned idx = 0 ;  idx < ports.count() ;  idx += 1) {
+	    if (ports[idx] == 0) {
+		    /* It is possible to have undeclared ports. These
+		       are ports that are skipped in the declaration,
+		       for example like so: module foo(x ,, y); The
+		       port between x and y is unnamed and thus
+		       inaccessible to binding by name. */
+		  continue;
+	    }
+	    assert(ports[idx]);
 	    if (ports[idx]->name == name)
 		  return idx;
+      }
 
       return ports.count();
 }
@@ -139,6 +149,12 @@ const list<PProcess*>& Module::get_behaviors() const
 
 /*
  * $Log: Module.cc,v $
+ * Revision 1.21  2003/04/02 03:00:14  steve
+ *  Cope with empty module ports while binding by name.
+ *
+ * Revision 1.20  2003/03/06 04:37:12  steve
+ *  lex_strings.add module names earlier.
+ *
  * Revision 1.19  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

Module.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Module.h,v 1.27 2002/08/19 02:39:16 steve Exp $"
+#ident "$Id: Module.h,v 1.32 2003/06/20 00:53:19 steve Exp $"
 #endif
 
 # include  <list>
@@ -29,6 +29,7 @@
 # include  "named.h"
 # include  "LineInfo.h"
 # include  <string>
+class PData;
 class PEvent;
 class PExpr;
 class PEIdent;
@@ -60,6 +61,8 @@ class Module : public LineInfo {
       };
 
     public:
+	/* The name passed here is the module name, not the instance
+	   name. This make must be a permallocated string. */
       explicit Module(const char*name);
       ~Module();
 
@@ -76,6 +79,12 @@ class Module : public LineInfo {
       map<string,param_expr_t>parameters;
       map<string,param_expr_t>localparams;
 
+
+	/* specparams are simpler then other params, in that they have
+	   no type information. They are merely constant
+	   expressions. */
+      map<string,PExpr*>specparams;
+
 	/* The module also has defparam assignments which don't create
 	   new parameters within the module, but may be used to set
 	   values within this module (when instantiated) or in other
@@ -97,6 +106,11 @@ class Module : public LineInfo {
 	/* Keep a table of named events declared in the module. */
       map<string,PEvent*>events;
 
+	/* Keep a table of datum variables declared in the module. */
+      map<hname_t,PData*>datum;
+
+      map<string,PExpr*> attributes;
+
 	/* These are the timescale for this module. The default is
 	   set by the `timescale directive. */
       int time_unit, time_precision;
@@ -135,7 +149,7 @@ class Module : public LineInfo {
       bool elaborate_sig(Design*, NetScope*scope) const;
 
     private:
-      char* name_;
+      const char* name_;
 
       map<hname_t,PWire*> wires_;
       list<PGate*> gates_;
@@ -151,6 +165,23 @@ class Module : public LineInfo {
 
 /*
  * $Log: Module.h,v $
+ * Revision 1.32  2003/06/20 00:53:19  steve
+ *  Module attributes from the parser
+ *  through to elaborated form.
+ *
+ * Revision 1.31  2003/06/13 19:10:45  steve
+ *  Properly manage real variables in subscopes.
+ *
+ * Revision 1.30  2003/03/06 04:37:12  steve
+ *  lex_strings.add module names earlier.
+ *
+ * Revision 1.29  2003/02/27 06:45:11  steve
+ *  specparams as far as pform.
+ *
+ * Revision 1.28  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
  * Revision 1.27  2002/08/19 02:39:16  steve
  *  Support parameters with defined ranges.
  *
@@ -159,97 +190,5 @@ class Module : public LineInfo {
  *
  * Revision 1.25  2002/05/19 23:37:28  steve
  *  Parse port_declaration_lists from the 2001 Standard.
- *
- * Revision 1.24  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.23  2001/10/31 03:11:15  steve
- *  detect module ports not declared within the module.
- *
- * Revision 1.22  2001/10/20 05:21:51  steve
- *  Scope/module names are char* instead of string.
- *
- * Revision 1.21  2000/11/05 06:05:59  steve
- *  Handle connectsion to internally unconnected modules (PR#38)
- *
- * Revision 1.20  2000/07/22 22:09:03  steve
- *  Parse and elaborate timescale to scopes.
- *
- * Revision 1.19  2000/05/16 04:05:15  steve
- *  Module ports are really special PEIdent
- *  expressions, because a name can be used
- *  many places in the port list.
- *
- * Revision 1.18  2000/05/02 16:27:38  steve
- *  Move signal elaboration to a seperate pass.
- *
- * Revision 1.17  2000/04/01 19:31:57  steve
- *  Named events as far as the pform.
- *
- * Revision 1.16  2000/03/12 17:09:40  steve
- *  Support localparam.
- *
- * Revision 1.15  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
- * Revision 1.14  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.13  2000/01/09 20:37:57  steve
- *  Careful with wires connected to multiple ports.
- *
- * Revision 1.12  2000/01/09 05:50:48  steve
- *  Support named parameter override lists.
- *
- * Revision 1.11  1999/12/11 05:45:41  steve
- *  Fix support for attaching attributes to primitive gates.
- *
- * Revision 1.10  1999/11/27 19:07:57  steve
- *  Support the creation of scopes.
- *
- * Revision 1.9  1999/08/23 16:48:39  steve
- *  Parameter overrides support from Peter Monta
- *  AND and XOR support wide expressions.
- *
- * Revision 1.8  1999/08/04 02:13:02  steve
- *  Elaborate module ports that are concatenations of
- *  module signals.
- *
- * Revision 1.7  1999/08/03 04:14:49  steve
- *  Parse into pform arbitrarily complex module
- *  port declarations.
- *
- * Revision 1.6  1999/07/31 19:14:47  steve
- *  Add functions up to elaboration (Ed Carter)
- *
- * Revision 1.5  1999/07/03 02:12:51  steve
- *  Elaborate user defined tasks.
- *
- * Revision 1.4  1999/06/15 03:44:53  steve
- *  Get rid of the STL vector template.
- *
- * Revision 1.3  1999/02/21 17:01:57  steve
- *  Add support for module parameters.
- *
- * Revision 1.2  1999/01/25 05:45:56  steve
- *  Add the LineInfo class to carry the source file
- *  location of things. PGate, Statement and PProcess.
- *
- *  elaborate handles module parameter mismatches,
- *  missing or incorrect lvalues for procedural
- *  assignment, and errors are propogated to the
- *  top of the elaboration call tree.
- *
- *  Attach line numbers to processes, gates and
- *  assignment statements.
- *
- * Revision 1.1  1998/11/03 23:28:52  steve
- *  Introduce verilog to CVS.
- *
  */
 #endif

PData.cc

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2003 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PData.cc,v 1.1 2003/01/26 21:15:58 steve Exp $"
+#endif
+
+# include  "PData.h"
+
+PData::PData(const hname_t&h)
+: hname_(h)
+{
+}
+
+PData::~PData()
+{
+}
+
+const hname_t&PData::name() const
+{
+      return hname_;
+}
+
+/*
+ * $Log: PData.cc,v $
+ * Revision 1.1  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
+ */
+

PData.h

@@ -0,0 +1,63 @@
+#ifndef __PData_H
+#define __PData_H
+/*
+ * Copyright (c) 2003 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: PData.h,v 1.1 2003/01/26 21:15:58 steve Exp $"
+#endif
+
+# include  "HName.h"
+# include  "netlist.h"
+# include  "LineInfo.h"
+
+/*
+ * The PData object represents declaration of atomic datum such as
+ * real and realtime variables. These are variables that cannot be bit
+ * or part selected, but can be used in expressions.
+ */
+
+class PData : public LineInfo {
+
+    public:
+      PData(const hname_t&hname);
+      ~PData();
+
+	// Return a hierarchical name.
+      const hname_t&name() const;
+
+      void elaborate_scope(Design*des, NetScope*scope) const;
+
+      map<string,PExpr*> attributes;
+
+    private:
+      hname_t hname_;
+
+    private:
+      PData(const PData&);
+      PData& operator= (const PData&);
+};
+
+/*
+ * $Log: PData.h,v $
+ * Revision 1.1  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
+ */
+#endif

PDelays.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PDelays.cc,v 1.9 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PDelays.cc,v 1.11 2003/06/21 01:21:42 steve Exp $"
 #endif
 
 # include "config.h"
@@ -62,34 +62,51 @@ void PDelays::set_delays(const svector<PExpr*>*del, bool df)
       delete_flag_ = df;
 }
 
-static unsigned long calculate_val(Design*des, const NetScope*scope,
+static unsigned long calculate_val(Design*des, NetScope*scope,
 				   const PExpr*expr)
 {
-      assert(expr);
-      unsigned long val;
 
-      int shift = scope->time_unit() - des->get_precision();
-
-      if (verireal*dr = expr->eval_rconst(des, scope)) {
-	    val = dr->as_long(shift);
-	    delete dr;
-
-      } else {
-	    verinum*dv = expr->eval_const(des, scope);
-	    if (dv == 0) {
-		  cerr << expr->get_line() << ": sorry: non-constant "
-		       << "delays not supported here: " << *expr << endl;
-		  des->errors += 1;
-		  return 0;
-	    }
-
-	    assert(dv);
-	    val = dv->as_ulong();
-	    val = des->scale_to_precision(val, scope);
-	    delete dv;
+      NetExpr*dex = expr->elaborate_expr(des, scope);
+      if (NetExpr*tmp = dex->eval_tree()) {
+	    delete dex;
+	    dex = tmp;
       }
 
-      return val;
+	/* If the delay expression is a real constant or vector
+	   constant, then evaluate it, scale it to the local time
+	   units, and return an adjusted value. */
+
+      if (NetECReal*tmp = dynamic_cast<NetECReal*>(dex)) {
+	    verireal fn = tmp->value();
+
+	    int shift = scope->time_unit() - des->get_precision();
+	    long delay = fn.as_long(shift);
+	    if (delay < 0)
+		  delay = 0;
+
+	    delete tmp;
+	    return delay;
+      }
+
+
+      if (NetEConst*tmp = dynamic_cast<NetEConst*>(dex)) {
+	    verinum fn = tmp->value();
+
+	    unsigned long delay =
+		  des->scale_to_precision(fn.as_ulong(), scope);
+
+	    delete tmp;
+	    return delay;
+      }
+
+	/* Oops, cannot evaluate down to a constant. Error message. */
+      delete dex;
+
+      cerr << expr->get_line() << ": sorry: non-constant "
+	   << "delays not supported here: " << *expr << endl;
+      des->errors += 1;
+      return 0;
+
 }
 
 void PDelays::eval_delays(Design*des, NetScope*scope,
@@ -99,8 +116,6 @@ void PDelays::eval_delays(Design*des, NetScope*scope,
 {
       assert(scope);
 
-      int shift = scope->time_unit() - des->get_precision();
-
 
       if (delay_[0]) {
 	    rise_time = calculate_val(des, scope, delay_[0]);
@@ -131,6 +146,16 @@ void PDelays::eval_delays(Design*des, NetScope*scope,
 
 /*
  * $Log: PDelays.cc,v $
+ * Revision 1.11  2003/06/21 01:21:42  steve
+ *  Harmless fixup of warnings.
+ *
+ * Revision 1.10  2003/02/08 19:49:21  steve
+ *  Calculate delay statement delays using elaborated
+ *  expressions instead of pre-elaborated expression
+ *  trees.
+ *
+ *  Remove the eval_pexpr methods from PExpr.
+ *
  * Revision 1.9  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PEvent.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 200Stephen Williams ([email protected])
+ * Copyright (c) 2003 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,14 +17,14 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PEvent.cc,v 1.3 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PEvent.cc,v 1.4 2003/03/01 06:25:30 steve Exp $"
 #endif
 
 # include "config.h"
 
 # include  "PEvent.h"
 
-PEvent::PEvent(const string&n)
+PEvent::PEvent(const char*n)
 : name_(n)
 {
 }
@@ -33,13 +33,19 @@ PEvent::~PEvent()
 {
 }
 
-string PEvent::name() const
+const char* PEvent::name() const
 {
       return name_;
 }
 
 /*
  * $Log: PEvent.cc,v $
+ * Revision 1.4  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
  * Revision 1.3  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PEvent.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PEvent.h,v 1.6 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PEvent.h,v 1.8 2003/03/01 06:25:30 steve Exp $"
 #endif
 
 # include  "LineInfo.h"
@@ -31,20 +31,21 @@ class NetScope;
 /*
  * The PEvent class represents event objects. These are things that
  * are declared in Verilog as ``event foo;'' The name passed to the
- * constructure is the "foo" part of the declaration.
+ * constructor is the "foo" part of the declaration.
  */
 class PEvent : public LineInfo {
 
     public:
-      explicit PEvent(const string&name);
+	// The name is a perm-allocated string.
+      explicit PEvent(const char*name);
       ~PEvent();
 
-      string name() const;
+      const char* name() const;
 
       void elaborate_scope(Design*des, NetScope*scope) const;
 
     private:
-      string name_;
+      const char* name_;
 
     private: // not implemented
       PEvent(const PEvent&);
@@ -53,6 +54,15 @@ class PEvent : public LineInfo {
 
 /*
  * $Log: PEvent.h,v $
+ * Revision 1.8  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
+ * Revision 1.7  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
  * Revision 1.6  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PExpr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PExpr.cc,v 1.31 2002/08/19 02:39:16 steve Exp $"
+#ident "$Id: PExpr.cc,v 1.33 2003/01/27 05:09:17 steve Exp $"
 #endif
 
 # include "config.h"
@@ -46,7 +46,7 @@ bool PExpr::is_constant(Module*) const
       return false;
 }
 
-NetNet* PExpr::elaborate_lnet(Design*des, NetScope*) const
+NetNet* PExpr::elaborate_lnet(Design*des, NetScope*, bool) const
 {
       cerr << get_line() << ": error: expression not valid in assign l-value: "
 	   << *this << endl;
@@ -154,7 +154,7 @@ const hname_t& PEIdent::path() const
 }
 
 /*
- * An identifier can be in a constant expresion if (and only if) it is
+ * An identifier can be in a constant expression if (and only if) it is
  * a parameter.
  */
 bool PEIdent::is_constant(Module*mod) const
@@ -256,6 +256,12 @@ bool PEUnary::is_constant(Module*m) const
 
 /*
  * $Log: PExpr.cc,v $
+ * Revision 1.33  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.32  2002/11/09 19:20:48  steve
+ *  Port expressions for output ports are lnets, not nets.
+ *
  * Revision 1.31  2002/08/19 02:39:16  steve
  *  Support parameters with defined ranges.
  *

PExpr.h

@@ -19,13 +19,12 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PExpr.h,v 1.62 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PExpr.h,v 1.65 2003/02/08 19:49:21 steve Exp $"
 #endif
 
 # include  <string>
 # include  "netlist.h"
 # include  "verinum.h"
-# include  "verireal.h"
 # include  "LineInfo.h"
 
 class Design;
@@ -51,7 +50,7 @@ class PExpr : public LineInfo {
 
       virtual void dump(ostream&) const;
 
-	// Procedural elaboration of the expression. Set thie
+	// Procedural elaboration of the expression. Set the
 	// bare_memory_ok flag if the result is allowed to be a
 	// NetEMemory without an index.
       virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
@@ -80,7 +79,8 @@ class PExpr : public LineInfo {
 
 	// This method elaborates the expression as gates, but
 	// restricted for use as l-values of continuous assignments.
-      virtual NetNet* elaborate_lnet(Design*des, NetScope*scope) const;
+      virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
+				     bool implicit_net_ok =false) const;
 
 	// Expressions that can be in the l-value of procedural
 	// assignments can be elaborated with this method.
@@ -91,11 +91,6 @@ class PExpr : public LineInfo {
 	// evaluated, return 0.
       virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
 
-	// This attempts to evaluate a constant expression as a
-	// decimal floating point. This is used when calculating delay
-	// constants.
-      virtual verireal* eval_rconst(const Design*, const NetScope*) const;
-
 	// This method returns true if that expression is the same as
 	// this expression. This method is used for comparing
 	// expressions that must be structurally "identical".
@@ -104,7 +99,7 @@ class PExpr : public LineInfo {
 	// Return true if this expression is a valid constant
 	// expression. the Module pointer is needed to find parameter
 	// identifiers and any other module specific interpretations
-	// of expresions.
+	// of expressions.
       virtual bool is_constant(Module*) const;
 
     private: // not implemented
@@ -126,7 +121,8 @@ class PEConcat : public PExpr {
 	// continuous assignments.
       virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
 
-      virtual NetNet* elaborate_lnet(Design*des, NetScope*scope) const;
+      virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
+				     bool implicit_net_ok =false) const;
       virtual NetNet* elaborate_net(Design*des, NetScope*scope,
 				    unsigned width,
 				    unsigned long rise,
@@ -188,9 +184,6 @@ class PEFNumber : public PExpr {
 	   any rounding that is needed to get the value. */
       virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
 
-	/* This method returns the full floating point value. */
-      virtual verireal* eval_rconst(const Design*, const NetScope*) const;
-
 	/* A PEFNumber is a constant, so this returns true. */
       virtual bool is_constant(Module*) const;
 
@@ -216,7 +209,8 @@ class PEIdent : public PExpr {
       virtual NetNet* elaborate_anet(Design*des, NetScope*scope) const;
 
 	// Identifiers are allowed (with restrictions) is assign l-values.
-      virtual NetNet* elaborate_lnet(Design*des, NetScope*scope) const;
+      virtual NetNet* elaborate_lnet(Design*des, NetScope*scope,
+				     bool implicit_net_ok =false) const;
 
 	// Identifiers are also allowed as procedural assignment l-values.
       virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
@@ -240,7 +234,6 @@ class PEIdent : public PExpr {
 
       virtual bool is_constant(Module*) const;
       verinum* eval_const(const Design*des, const NetScope*sc) const;
-      verireal*eval_rconst(const Design*des, const NetScope*sc) const;
 
       const hname_t& path() const;
 
@@ -298,7 +291,6 @@ class PENumber : public PExpr {
       virtual NetAssign_* elaborate_lval(Design*des, NetScope*scope) const;
 
       virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
-      virtual verireal*eval_rconst(const Design*, const NetScope*) const;
 
       virtual bool is_the_same(const PExpr*that) const;
       virtual bool is_constant(Module*) const;
@@ -386,7 +378,6 @@ class PEBinary : public PExpr {
 					bool sys_task_arg =false) const;
       virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
       virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
-      virtual verireal*eval_rconst(const Design*des, const NetScope*sc) const;
 
     private:
       char op_;
@@ -501,6 +492,19 @@ class PECallFunction : public PExpr {
 
 /*
  * $Log: PExpr.h,v $
+ * Revision 1.65  2003/02/08 19:49:21  steve
+ *  Calculate delay statement delays using elaborated
+ *  expressions instead of pre-elaborated expression
+ *  trees.
+ *
+ *  Remove the eval_pexpr methods from PExpr.
+ *
+ * Revision 1.64  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.63  2002/11/09 19:20:48  steve
+ *  Port expressions for output ports are lnets, not nets.
+ *
  * Revision 1.62  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PGate.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PGate.cc,v 1.14 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PGate.cc,v 1.15 2003/03/06 04:37:12 steve Exp $"
 #endif
 
 # include "config.h"
@@ -146,7 +146,7 @@ PGModule::PGModule(const char*type, const string&name, svector<PExpr*>*pins)
 : PGate(name, pins), overrides_(0), pins_(0),
   npins_(0), parms_(0), nparms_(0), msb_(0), lsb_(0)
 {
-      type_ = strdup(type);
+      type_ = type;
 }
 
 PGModule::PGModule(const char*type, const string&name,
@@ -154,12 +154,11 @@ PGModule::PGModule(const char*type, const string&name,
 : PGate(name, 0), overrides_(0), pins_(pins),
   npins_(npins), parms_(0), nparms_(0), msb_(0), lsb_(0)
 {
-      type_ = strdup(type);
+      type_ = type;
 }
 
 PGModule::~PGModule()
 {
-      free(type_);
 }
 
 void PGModule::set_parameters(svector<PExpr*>*o)
@@ -192,6 +191,9 @@ const char* PGModule::get_type()
 
 /*
  * $Log: PGate.cc,v $
+ * Revision 1.15  2003/03/06 04:37:12  steve
+ *  lex_strings.add module names earlier.
+ *
  * Revision 1.14  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PGate.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PGate.h,v 1.24 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PGate.h,v 1.25 2003/03/06 04:37:12 steve Exp $"
 #endif
 
 # include  "svector.h"
@@ -171,6 +171,9 @@ class PGBuiltin  : public PGate {
 class PGModule  : public PGate {
 
     public:
+	// NOTE: The type parameter to all the constructors is assumed
+	// to have been permallocated.
+
 	// If the binding of ports is by position, this constructor
 	// builds everything all at once.
       explicit PGModule(const char*type, const string&name,
@@ -198,10 +201,12 @@ class PGModule  : public PGate {
       virtual void elaborate_scope(Design*des, NetScope*sc) const;
       virtual bool elaborate_sig(Design*des, NetScope*scope) const;
 
+	// This returns the module name of this module. It is a
+	// permallocated string.
       const char* get_type();
 
     private:
-      char* type_;
+      const char* type_;
       svector<PExpr*>*overrides_;
       named<PExpr*>*pins_;
       unsigned npins_;
@@ -222,6 +227,9 @@ class PGModule  : public PGate {
 
 /*
  * $Log: PGate.h,v $
+ * Revision 1.25  2003/03/06 04:37:12  steve
+ *  lex_strings.add module names earlier.
+ *
  * Revision 1.24  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PUdp.cc

@@ -1,7 +1,5 @@
-#ifndef __debug_H
-#define __debug_H
 /*
- * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -19,18 +17,20 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: debug.h,v 1.2 2002/08/12 01:35:08 steve Exp $"
+#ident "$Id: PUdp.cc,v 1.1 2003/07/15 05:07:13 steve Exp $"
 #endif
 
-extern void breakpoint(void);
+# include  "PUdp.h"
+
+PUdp::PUdp(const string&n, unsigned nports)
+: ports(nports), sequential(false), initial(verinum::Vx), name_(n)
+{
+}
 
 /*
- * $Log: debug.h,v $
- * Revision 1.2  2002/08/12 01:35:08  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.1  2001/05/05 23:55:46  steve
- *  Add the beginnings of an interactive debugger.
+ * $Log: PUdp.cc,v $
+ * Revision 1.1  2003/07/15 05:07:13  steve
+ *  Move PUdp constructor into compiled file.
  *
  */
-#endif
+

PUdp.h

@@ -19,26 +19,20 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PUdp.h,v 1.7 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PUdp.h,v 1.10 2003/07/15 05:07:13 steve Exp $"
 #endif
 
 # include  <map>
 # include  "svector.h"
-# include  <string>
 # include  "verinum.h"
 
 class PExpr;
 
-svector<string>::svector<string>(unsigned size)
-: nitems_(size), items_(new string[size])
-{
-}
-
 /*
  * This class represents a parsed UDP. This is a much simpler object
  * then a module or macromodule.
  *
- *   - all ports are scaler,
+ *   - all ports are scalar,
  *   - pin 0 (the first port) is always output,
  *     and the remaining pins are input.
  *
@@ -53,13 +47,12 @@ svector<string>::svector<string>(unsigned size)
  * the current output.
  *
  * If the UDP is sequential, the "initial" member is taken to be the
- * intial value assigned in the source, or 'x' if none is given.
+ * initial value assigned in the source, or 'x' if none is given.
  */
 class PUdp {
 
     public:
-      explicit PUdp(const string&n, unsigned nports)
-      : ports(nports), sequential(false), initial(verinum::Vx), name_(n) { }
+      explicit PUdp(const string&n, unsigned nports);
 
       svector<string>ports;
       bool sequential;
@@ -84,6 +77,15 @@ class PUdp {
 
 /*
  * $Log: PUdp.h,v $
+ * Revision 1.10  2003/07/15 05:07:13  steve
+ *  Move PUdp constructor into compiled file.
+ *
+ * Revision 1.9  2003/07/15 03:49:22  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.8  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
  * Revision 1.7  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

PWire.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: PWire.h,v 1.14 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: PWire.h,v 1.16 2003/01/30 16:23:07 steve Exp $"
 #endif
 
 # include  "netlist.h"
@@ -38,7 +38,7 @@ class Design;
 
 /*
  * Wires include nets, registers and ports. A net or register becomes
- * a port by declaration, so ports are not seperate. The module
+ * a port by declaration, so ports are not separate. The module
  * identifies a port by keeping it in its port list.
  *
  * The hname parameter to the constructor is a hierarchical name. It
@@ -53,7 +53,6 @@ class PWire : public LineInfo {
       PWire(char*name, NetNet::Type t, NetNet::PortType pt);
 
 	// Return a hierarchical name.
-	//const string name() const;
       const hname_t&path() const;
 
       NetNet::Type get_wire_type() const;
@@ -101,6 +100,13 @@ class PWire : public LineInfo {
 
 /*
  * $Log: PWire.h,v $
+ * Revision 1.16  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.15  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
  * Revision 1.14  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

QUICK_START.txt

@@ -79,5 +79,5 @@ Verilog packages from the main Debian software site.
 
 * Install From Source
 
-In this case, see the readme and other documentation that comes with
+In this case, see README.txt and other documentation that comes with
 the source.

README.txt

@@ -13,7 +13,7 @@ home page at <http://www.icarus.com/eda/verilog>.
 Icarus Verilog is not aimed at being a simulator in the traditional
 sense, but a compiler that generates code employed by back-end
 tools. These back-end tools currently include a simulator engine
-called VVP, an XNF (Xilinx Netlist Format) generator and an EDIF fpga
+called VVP, an XNF (Xilinx Netlist Format) generator and an EDIF FPGA
 netlist generator. In the future, backends are expected for EDIF/LPM,
 structural Verilog, VHDL, etc.
 
@@ -59,6 +59,14 @@ on a UNIX-like system:
 	  A version problem with this program is the most common cause
 	  of difficulty. See the Icarus Verilog FAQ.
 
+	- readline 4.2
+	  On Linux systems, this usually means the readline-devel
+	  rpm. In any case, it is the development headers of readline
+	  that are needed.
+
+	- termcap
+	  The readline library in turn uses termcap.
+
 2.2 Compilation
 
 Unpack the tar-ball and cd into the verilog-######### directory
@@ -68,7 +76,7 @@ with the commands:
   ./configure
   make
 
-Normally, this command automatically figures out every thing it needs
+Normally, this command automatically figures out everything it needs
 to know. It generally works pretty well. There are a few flags to the
 configure script that modify its behavior:
 
@@ -130,14 +138,14 @@ only sees a single input file. See ivlpp/ivlpp.txt for details.
 3.2 Parse
 
 The Verilog compiler starts by parsing the Verilog source file. The
-output of the parse in a list of Module objects in PFORM. The pform
+output of the parse is a list of Module objects in "pform". The pform
 (see pform.h) is mostly a direct reflection of the compilation
 step. There may be dangling references, and it is not yet clear which
 module is the root.
 
-One can see a human readable version of the final PFORM by using the
+One can see a human readable version of the final pform by using the
 ``-P <path>'' flag to the compiler. This will cause iverilog to dump
-the PFORM into the file named <path>.
+the pform into the file named <path>.
 
 3.3 Elaboration
 
@@ -296,10 +304,6 @@ Verilog web page for the current state of support for Verilog, and in
 particular, browse the bug report database for reported unsupported
 constructs.
 
-  - real data types not supported. This includes real and
-    realtime. However, floating point constants in delay expressions
-    are supported so that `timescale works properly.
-
   - System functions are supported, but the compiler presumes that
     they return 32 bits. This is the typical case.
 
@@ -344,13 +348,26 @@ language that are defined.
 	The $sizeof function is deprecated in favor of $bits, which is
 	the same thing, but included in the SystemVerilog definition.
 
+    $simtime
+	The $simtime system function returns as a 64bit value the
+	simulation time, unscaled by the time units of local
+	scope. This is different from the $time and $stime functions
+	which return the scaled times. This function is added for
+	regression testing of the compiler and run time, but can be
+	used by applications who really want the simulation time.
+
+	Note that the simulation time can be confusing if there are
+	lots of different `timescales within a design. It is not in
+	general possible to predict what the simulation precision will
+	turn out to be.
+
     Builtin system functions
 
 	Certain of the system functions have well defined meanings, so
 	can theoretically be evaluated at compile time, instead of
 	using runtime VPI code. Doing so means that VPI cannot
 	override the definitions of functions handled in this
-	manner. On the other hand, this makes them synthesizeable, and
+	manner. On the other hand, this makes them synthesizable, and
 	also allows for more aggressive constant propagation. The
 	functions handled in this manner are:
 
@@ -390,44 +407,31 @@ language that are defined.
 	completely specify the format.
 
 	Icarus Verilog allows the programmer to specify the field
-	with. The "%t" format in Icarus Verilog works exactly as it
+	width. The "%t" format in Icarus Verilog works exactly as it
 	does in standard Verilog. However, if the programmer chooses
 	to specify a minimum width (i.e., "%5t"), then for that display
 	Icarus Verilog will override the $timeformat minimum width and
 	use the explicit minimum width.
 
+    vpiScope iterator on vpiScope objects.
+
+	In the VPI, the normal way to iterate over vpiScope objects
+	contained within a vpiScope object, is the vpiInternalScope
+	iterator. Icarus Verilog adds support for the vpiScope
+	iterator of a vpiScope object, that iterates over *everything*
+	the is contained in the current scope. This is useful in cases
+	where one wants to iterate over all the objects in a scope
+	without iterating over all the contained types explicitly.
+
+
 6.0 CREDITS
 
 Except where otherwise noted, Icarus Verilog, ivl and ivlpp are
 Copyright Stephen Williams. The proper notices are in the head of each
 file. However, I have early on received aid in the form of fixes,
-Verilog guidance, and especially testing from many people, including
-(in alphabetical order):
-
-	Eric Aardoom <[email protected]>
-	Stephan I. Boettcher <[email protected]>
-	Ed Carter <[email protected]>
-	Larry Doolittle <[email protected]>
-	Guy Hutchison <[email protected]>
-	Ales Hvezda <[email protected]>
-	Venkat Iyer <[email protected]>
-	Yasuhisa Kato <[email protected]>
-        James Lee <[email protected]>
-	Peter Monta <[email protected]>
-	Daniel H. Nelsen <[email protected]>
-	Stefan Petersen <[email protected]>
-	Michael Ruff <[email protected]>
-	Mike Runyan <[email protected]>
-	Jason Schonberg <[email protected]>
-	Stuart Sutherland <[email protected]>
-	Stephen Tell <[email protected]>
-        Stefan Theide <[email protected]>
-	Tom Verbeure
-	Steve Wilson <[email protected]>
-
-and others. Testers in particular include a larger community of people
-interested in a GPL Verilog for Linux. Special thanks to Steve Wilson
-for collecting and organizing the test suite code for all those testers.
+Verilog guidance, and especially testing from many people. Testers in
+particular include a larger community of people interested in a GPL
+Verilog for Linux.
 
 
 6.1 PORT MAINTAINERS

Statement.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: Statement.h,v 1.36 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: Statement.h,v 1.38 2003/05/19 02:50:58 steve Exp $"
 #endif
 
 # include  <string>
@@ -287,7 +287,7 @@ class PDelayStatement  : public Statement {
 
 
 /*
- * This represends the parsing of a disable <scope> statement.
+ * This represents the parsing of a disable <scope> statement.
  */
 class PDisable  : public Statement {
 
@@ -331,6 +331,8 @@ class PEventStatement  : public Statement {
 	// elaborated statement to the event.
       NetProc* elaborate_st(Design*des, NetScope*scope, NetProc*st) const;
 
+      NetProc* elaborate_wait(Design*des, NetScope*scope, NetProc*st) const;
+
     private:
       svector<PEEvent*>expr_;
       Statement*statement_;
@@ -453,6 +455,12 @@ class PWhile  : public Statement {
 
 /*
  * $Log: Statement.h,v $
+ * Revision 1.38  2003/05/19 02:50:58  steve
+ *  Implement the wait statement behaviorally instead of as nets.
+ *
+ * Revision 1.37  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
  * Revision 1.36  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

StringHeap.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2002 Stephen Williams ([email protected])
+ * Copyright (c) 2002-2003 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -15,15 +15,9 @@
  *    You should have received a copy of the GNU General Public License
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- *  ---
- *    You should also have recieved a copy of the Picture Elements
- *    Binary Software License offer along with the source. This offer
- *    allows you to obtain the right to redistribute the software in
- *    binary (compiled) form. If you have not received it, contact
- *    Picture Elements, Inc., 777 Panoramic Way, Berkeley, CA 94704.
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: StringHeap.cc,v 1.2 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: StringHeap.cc,v 1.5 2003/03/01 06:25:30 steve Exp $"
 #endif
 
 # include  "StringHeap.h"
@@ -38,11 +32,12 @@ StringHeap::StringHeap()
 {
       cell_base_ = 0;
       cell_ptr_ = HEAPCELL;
+      cell_count_ = 0;
 }
 
 StringHeap::~StringHeap()
 {
-	// This is a planned memory leak. The string heap is indended
+	// This is a planned memory leak. The string heap is intended
 	// to hold permanently-allocated strings.
 }
 
@@ -55,6 +50,8 @@ const char* StringHeap::add(const char*text)
       if (rem < (len+1)) {
 	    cell_base_ = (char*)malloc(HEAPCELL);
 	    cell_ptr_ = 0;
+	    cell_count_ += 1;
+	    assert(cell_base_ != 0);
       }
 
       char*res = cell_base_ + cell_ptr_;
@@ -62,11 +59,82 @@ const char* StringHeap::add(const char*text)
       cell_ptr_ += len;
       cell_base_[cell_ptr_++] = 0;
 
+      assert(cell_ptr_ <= HEAPCELL);
+
+      return res;
+}
+
+
+StringHeapLex::StringHeapLex()
+{
+      hit_count_ = 0;
+      add_count_ = 0;
+
+      for (unsigned idx = 0 ;  idx < HASH_SIZE ;  idx += 1)
+	    hash_table_[idx] = 0;
+}
+
+StringHeapLex::~StringHeapLex()
+{
+}
+
+unsigned StringHeapLex::add_hit_count() const
+{
+      return hit_count_;
+}
+
+unsigned StringHeapLex::add_count() const
+{
+      return add_count_;
+}
+
+static unsigned hash_string(const char*text)
+{
+      unsigned h = 0;
+
+      while (*text) {
+	    h = (h << 4) ^ (h >> 28) ^ *text;
+	    text += 1;
+      }
+      return h;
+}
+
+const char* StringHeapLex::add(const char*text)
+{
+      unsigned hash_value = hash_string(text) % HASH_SIZE;
+
+	/* If we easily find the string in the hash table, then return
+	   that and be done. */
+      if (hash_table_[hash_value]
+	  && (strcmp(hash_table_[hash_value], text) == 0)) {
+	    hit_count_ += 1;
+	    return hash_table_[hash_value];
+      }
+
+	/* The existing hash entry is not a match. Replace it with the
+	   newly allocated value, and return the new pointer as the
+	   result to the add. */
+      const char*res = StringHeap::add(text);
+      hash_table_[hash_value] = res;
+      add_count_ += 1;
+
       return res;
 }
 
 /*
  * $Log: StringHeap.cc,v $
+ * Revision 1.5  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
+ * Revision 1.4  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.3  2003/01/16 21:44:46  steve
+ *  Keep some debugging status.
+ *
  * Revision 1.2  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

StringHeap.h

@@ -1,7 +1,7 @@
 #ifndef __StringHeap_H
 #define __StringHeap_H
 /*
- * Copyright (c) 2002 Stephen Williams ([email protected])
+ * Copyright (c) 2002-2003 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -19,9 +19,14 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: StringHeap.h,v 1.2 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: StringHeap.h,v 1.4 2003/03/01 06:25:30 steve Exp $"
 #endif
 
+/*
+ * The string heap is a way to permanently allocate strings
+ * efficiently. They only take up the space of the string characters
+ * and the terminating nul, there is no malloc overhead.
+ */
 class StringHeap {
 
     public:
@@ -35,14 +40,53 @@ class StringHeap {
 
       char*cell_base_;
       unsigned cell_ptr_;
+      unsigned cell_count_;
 
     private: // not implemented
       StringHeap(const StringHeap&);
       StringHeap& operator= (const StringHeap&);
 };
 
+/*
+ * A lexical string heap is a string heap that makes an effort to
+ * return the same pointer for identical strings. This saves further
+ * space by not allocating duplicate strings, so in a system with lots
+ * of identifiers, this can theoretically save more space.
+ */
+class StringHeapLex  : private StringHeap {
+
+    public:
+      StringHeapLex();
+      ~StringHeapLex();
+
+      const char*add(const char*);
+
+      unsigned add_count() const;
+      unsigned add_hit_count() const;
+
+    private:
+      enum { HASH_SIZE = 4096 };
+      const char*hash_table_[HASH_SIZE];
+
+      unsigned add_count_;
+      unsigned hit_count_;
+
+    private: // not implemented
+      StringHeapLex(const StringHeapLex&);
+      StringHeapLex& operator= (const StringHeapLex&);
+};
+
 /*
  * $Log: StringHeap.h,v $
+ * Revision 1.4  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
+ * Revision 1.3  2003/01/16 21:44:46  steve
+ *  Keep some debugging status.
+ *
  * Revision 1.2  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

_pli_types.h

@@ -0,0 +1,46 @@
+#ifndef PLI_TYPES
+#define PLI_TYPES
+/*
+ * Copyright (c) 2003 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: _pli_types.h,v 1.2 2003/05/26 04:39:16 steve Exp $"
+#endif
+
+typedef signed int     PLI_INT32;
+typedef unsigned int   PLI_UINT32;
+typedef signed short   PLI_INT16;
+typedef unsigned short PLI_UINT16;
+typedef signed char    PLI_BYTE8;
+typedef unsigned char  PLI_UBYTE8;
+
+/*
+ * $Log: _pli_types.h,v $
+ * Revision 1.2  2003/05/26 04:39:16  steve
+ *  Typo type name.
+ *
+ * Revision 1.1  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
+ */
+#endif

acc_user.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: acc_user.h,v 1.6 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: acc_user.h,v 1.18 2003/06/13 19:23:41 steve Exp $"
 #endif
 
 /*
@@ -31,6 +31,7 @@
  * implemented using VPI routines.
  */
 
+
 #ifdef __cplusplus
 # define EXTERN_C_START extern "C" {
 # define EXTERN_C_END }
@@ -42,16 +43,36 @@
 
 EXTERN_C_START
 
+# include  "_pli_types.h"
+
 /*
  * This is a declaration of the "handle" type that is compatible with
- * the vpiHandle from vpi_user.h.
+ * the vpiHandle from vpi_user.h. The libveriuser library implements
+ * the acc handle type as a vpiHandle, to prevent useless indirection.
  */
 typedef struct __vpiHandle *handle;
 
 /* OBJECT TYPES */
-#define accScope   21
-#define accScalar  300
-#define accVector  302
+#define accModule    20
+#define accScope     21
+#define accNet       25
+#define accReg       30
+#define accIntegerParam   200
+#define accRealParam 202
+#define accStringParam 204
+#define accParameter   220
+#define accTopModule      224
+#define accModuleInstance 226
+#define accWire        260
+#define accNamedEvent  280
+#define accIntegerVar  281
+#define accRealVar   282
+#define accTimeVar   283
+#define accIntVar    accIntegerVar
+#define accScalar    300
+#define accVector    302
+#define accUnknown   412
+#define accConstant  600
 
 /* type VALUES FOR t_setval_delay STRUCTURE */
 #define accNoDelay  0
@@ -72,11 +93,44 @@ typedef struct __vpiHandle *handle;
 #define accStringVal 8
 #define accVectorVal 9
 
+/* Scalar values */
+#define acc0 0
+#define acc1 1
+#define accX 2
+#define accZ 3
+
 /* type VALUES FOR t_acc_time STRUCTURE */
 #define accTime 1
 #define accSimTime 2
 #define accRealTime 3
 
+/* reason codes */
+#define logic_value_change     1
+#define strength_value_change  2
+#define real_value_change      3
+#define vector_value_change    4
+#define event_value_change     5
+#define integer_value_change   6
+#define time_value_change      7
+#define sregister_value_change 8
+#define vregister_value_change 9
+#define realtime_value_change 10
+
+/* VCL strength values */
+#define vclSupply  7
+#define vclStrong  6
+#define vclPull    5
+#define vclLarge   4
+#define vclWeak    3
+#define vclMedium  2
+#define vclSmall   1
+#define vclHighZ   0
+
+/* Constants used by acc_vcl_add */
+#define vcl_verilog_logic 2
+#define VCL_VERILOG_LOGIC vcl_verilog_logic
+#define vcl_verilog_strength 3
+#define VCL_VERILOG_STRENGTH vcl_verilog_strength
 
 typedef struct t_acc_time {
       int type;
@@ -105,37 +159,161 @@ typedef struct t_setval_value {
       } value;
 } s_setval_value, *p_setval_value, s_acc_value, *p_acc_value;
 
+typedef struct t_strengths {
+      PLI_UBYTE8 logic_value;
+      PLI_UBYTE8 strength1;
+      PLI_UBYTE8 strength2;
+} s_strengths, *p_strengths;
+
+typedef struct t_vc_record {
+      PLI_INT32 vc_reason;
+      PLI_INT32 vc_hightime;
+      PLI_INT32 vc_lowtime;
+      void*     user_data;
+      union {
+	    PLI_UBYTE8 logic_value;
+	    double real_value;
+	    handle vector_handle;
+	    s_strengths strengths_s;
+      } out_value;
+} s_vc_record, *p_vc_record;
+
+
+typedef struct t_location {
+      PLI_INT32 line_no;
+      const char*filename;
+} s_location, *p_location;
+
 extern int acc_error_flag;
 
 extern int acc_initialize(void);
 
 extern void acc_close(void);
 
+/*
+ * This is the acc_configure command, and the config_param
+ * codes that are accepted.
+ */
+extern int   acc_configure(PLI_INT32 config_param, const char*value);
+#define accDevelopmentVersion 11
+
 extern int   acc_fetch_argc(void);
 extern char**acc_fetch_argv(void);
 
 extern char* acc_fetch_fullname(handle obj);
 
-extern int   acc_fetch_tfarg_int(int n);
-extern char* acc_fetch_tfarg_str(int n);
+extern int   acc_fetch_location(p_location loc, handle obj);
+
+extern char* acc_fetch_name(handle obj);
+extern char* acc_fetch_defname(handle obj);
+
+extern double acc_fetch_paramval(handle obj);
+
+extern double    acc_fetch_tfarg(PLI_INT32);
+extern double    acc_fetch_itfarg(PLI_INT32, handle);
+extern PLI_INT32 acc_fetch_tfarg_int(PLI_INT32);
+extern PLI_INT32 acc_fetch_itfarg_int(PLI_INT32, handle);
+extern char*     acc_fetch_tfarg_str(PLI_INT32);
+extern char*     acc_fetch_itfarg_str(PLI_INT32, handle);
+
+typedef struct t_timescale_info {
+      PLI_INT16 unit;
+      PLI_INT16 precision;
+} s_timescale_info, *p_timescale_info;
+extern void acc_fetch_timescale_info(handle obj, p_timescale_info info);
+
+extern PLI_INT32 acc_fetch_size(handle obj);
+
+extern PLI_INT32 acc_fetch_type(handle obj);
+extern PLI_INT32 acc_fetch_fulltype(handle obj);
+extern PLI_INT32 acc_fetch_range(handle object, int *msb, int *lsb);
+extern char*     acc_fetch_type_str(PLI_INT32 type);
+
+extern char* acc_fetch_value(handle obj, const char*fmt, s_acc_value*value);
+
+extern handle acc_handle_by_name(const char*name, handle scope);
+extern handle acc_handle_object(const char*name);
+extern handle acc_handle_parent(handle obj);
+extern handle acc_handle_scope(handle obj);
 
 extern handle acc_handle_tfarg(int n);
+extern handle acc_handle_tfinst(void);
 
+extern PLI_INT32 acc_compare_handles(handle, handle);
+
+extern handle acc_next(PLI_INT32 *, handle, handle);
+extern handle acc_next_scope(handle, handle);
 extern handle acc_next_topmod(handle prev_topmod);
 
-extern int acc_object_of_type(handle object, int type);
+extern int acc_object_in_typelist(handle object, PLI_INT32*typelist);
+extern int acc_object_of_type(handle object, PLI_INT32 type);
 
 extern char*acc_product_version(void);
 
 extern int acc_set_value(handle obj, p_setval_value value,
 			 p_setval_delay delay);
 
+extern void acc_vcl_add(handle obj, PLI_INT32(*consumer)(p_vc_record),
+			void*data, PLI_INT32 vcl_flag);
+extern  void acc_vcl_delete(handle obj, PLI_INT32(*consumer)(p_vc_record),
+			    void*data, PLI_INT32 vcl_flag);
+
 extern char* acc_version(void);
 
 EXTERN_C_END
 
 /*
  * $Log: acc_user.h,v $
+ * Revision 1.18  2003/06/13 19:23:41  steve
+ *  Add a bunch more PLI1 routines.
+ *
+ * Revision 1.17  2003/06/04 01:56:20  steve
+ * 1) Adds configure logic to clean up compiler warnings
+ * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+ *    tf_isetrealdelay, acc_handle_scope
+ * 3) makes acc_next reentrant
+ * 4) adds basic vpiWire type support
+ * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
+ * 6) add vpiLeftRange/RigthRange to signals
+ *
+ * Revision 1.16  2003/05/30 04:18:31  steve
+ *  Add acc_next function.
+ *
+ * Revision 1.15  2003/05/29 02:35:41  steve
+ *  acc_fetch_type supports module.
+ *
+ * Revision 1.14  2003/05/29 02:21:45  steve
+ *  Implement acc_fetch_defname and its infrastructure in vvp.
+ *
+ * Revision 1.13  2003/05/24 03:02:04  steve
+ *  Add implementation of acc_handle_by_name.
+ *
+ * Revision 1.12  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
+ * Revision 1.11  2003/04/24 18:57:05  steve
+ *  Add acc_fetch_fulltype function.
+ *
+ * Revision 1.10  2003/04/20 02:48:39  steve
+ *  Support value change callbacks.
+ *
+ * Revision 1.9  2003/04/12 18:57:13  steve
+ *  More acc_ function stubs.
+ *
+ * Revision 1.8  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ * Revision 1.7  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
  * Revision 1.6  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

attributes.txt

@@ -28,21 +28,36 @@ warning.)
 (* ivl_synthesis_on *)
 
     This attribute tells the compiler that the marked always statement
-    is synthesizeable. The compiler will attempt to synthesize the
+    is synthesizable. The compiler will attempt to synthesize the
     code in the marked "always" statement. If it cannot in any way
     synthesize it, then it will report an error.
 
 (* ivl_synthesis_off *)
 
     If this value is attached to an "always" statement, then the
-    compiler will *not* synthesize the "always" statment. This can be
+    compiler will *not* synthesize the "always" statement. This can be
     used, for example, to mark embedded test bench code.
 
 
+* Attributes for modules
+
+(* ivl_synthesis_cell *)
+
+    If this value is attached to a module during synthesis, that
+    module will be considered a target architecture primitive, and
+    its interior will not be synthesized further.  The module can
+    therefore hold a model for simulation purposes.
+
+
 * Attributes for signals (wire/reg/integer/tri/etc.)
 
-[ none defined yet ]
+(* PAD = "<pad assignment list>" *)
 
+    If this attribute is attached to a signal that happens to be a
+    root module port, then targets that support it will use the string
+    value as a list of pin assignments for the port/signal. The format
+    is a comma separated list of location tokens, with the format of
+    the token itself defined by the back-end tools in use.
 
 * Other Attributes
 

autoconf.sh

@@ -9,7 +9,7 @@
 echo "Autoconf in root..."
 autoconf
 
-for dir in vpip vvp tgt-vvp tgt-fpga libveriuser
+for dir in vpip vvp tgt-vvp tgt-fpga libveriuser cadpli
 do
     echo "Autoconf in $dir..."
     ( cd ./$dir ; autoconf )

cadpli/.cvsignore

@@ -0,0 +1,7 @@
+Makefile
+cadpli.vpl
+dep
+configure
+config.log
+config.status
+autom4te.cache

cadpli/Makefile.in

@@ -0,0 +1,89 @@
+#
+#    This source code is free software; you can redistribute it
+#    and/or modify it in source code form under the terms of the GNU
+#    Library General Public License as published by the Free Software
+#    Foundation; either version 2 of the License, or (at your option)
+#    any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#    GNU Library General Public License for more details.
+#
+#    You should have received a copy of the GNU Library General Public
+#    License along with this program; if not, write to the Free
+#    Software Foundation, Inc.,
+#    59 Temple Place - Suite 330
+#    Boston, MA 02111-1307, USA
+#
+#ident "$Id: Makefile.in,v 1.4 2003/02/27 22:13:22 steve Exp $"
+#
+#
+SHELL = /bin/sh
+
+VERSION = 0.0
+
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+srcdir = @srcdir@
+
+VPATH = $(srcdir)
+
+bindir = @bindir@
+libdir = @libdir@
+includedir = $(prefix)/include
+
+strip_dynamic=@strip_dynamic@
+
+CC = @CC@
+CXX = @CXX@
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
+
+CPPFLAGS = @CPPFLAGS@ @DEFS@ @PICFLAG@
+CFLAGS = @CFLAGS@
+LDFLAGS = @LDFLAGS@
+STRIP = @STRIP@
+
+all: dep cadpli.vpl
+
+# No specific check operations.
+check: all
+
+dep:
+	mkdir dep
+
+%.o: %.c
+	$(CC) -Wall -I$(srcdir) -I$(srcdir)/.. $(CPPFLAGS) $(CFLAGS) -MD -c $<
+	mv $*.d dep
+
+O = cadpli.o
+
+SYSTEM_VPI_LDFLAGS = @whole_archive@ ../libveriuser/libveriuser.a @no_whole_archive@ -L../vvp -lvpi
+ifeq (@WIN32@,yes)
+    SYSTEM_VPI_LDFLAGS += -liberty
+endif
+
+cadpli.vpl: $O ../vvp/libvpi.a ../libveriuser/libveriuser.a
+	$(CC) @shared@ -o $@ $O $(SYSTEM_VPI_LDFLAGS)
+
+clean:
+	rm -rf *.o dep cadpli.vpl
+
+distclean: clean
+	rm -f Makefile config.status config.log config.cache
+
+install: all installdirs $(libdir)/ivl/cadpli.vpl
+
+$(libdir)/ivl/cadpli.vpl: ./cadpli.vpl
+	$(INSTALL_PROGRAM) ./cadpli.vpl $(libdir)/ivl/cadpli.vpl
+
+installdirs: ../mkinstalldirs
+	$(srcdir)/../mkinstalldirs $(libdir)/ivl
+
+uninstall:
+	rm -f $(libdir)/ivl/cadpli.vpl
+
+
+-include $(patsubst %.o, dep/%.d, $O)

cadpli/cadpli.c

@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2003 Stephen Williams ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ident "$Id: cadpli.c,v 1.4 2003/04/30 01:28:06 steve Exp $"
+
+# include  <vpi_user.h>
+# include  <veriuser.h>
+# include  <stdlib.h>
+#ifdef HAVE_MALLOC_H
+# include  <malloc.h>
+#endif
+# include  <string.h>
+# include  <assert.h>
+# include  "ivl_dlfcn.h"
+
+typedef void* (*funcvp)(void);
+
+static void thunker_register(void)
+{
+      struct t_vpi_vlog_info vlog_info;
+      void*mod;
+      void*boot;
+      void*tf;
+      int idx;
+
+      vpi_get_vlog_info(&vlog_info);
+
+      for (idx = 0 ;  idx < vlog_info.argc ;  idx += 1) {
+	    char*module, *cp, *bp;
+	    if (strncmp("-cadpli=", vlog_info.argv[idx], 8) != 0)
+		  continue;
+
+	    cp = vlog_info.argv[idx] + 8;
+	    assert(cp);
+
+	    bp = strchr(cp, ':');
+	    assert(bp);
+
+	    module = malloc(bp-cp+1);
+	    strncpy(module, cp, bp-cp);
+	    module[bp-cp] = 0;
+
+	    mod = ivl_dlopen(module);
+	    if (mod == 0) {
+		  vpi_printf("%s link: %s\n", vlog_info.argv[idx], dlerror());
+		  free(module);
+		  continue;
+	    }
+
+	    bp += 1;
+	    boot = ivl_dlsym(mod, bp);
+	    if (boot == 0) {
+		  vpi_printf("%s: Symbol %s not found.\n",
+			     vlog_info.argv[idx], bp);
+		  free(module);
+		  continue;
+	    }
+
+	    free(module);
+	    assert(boot);
+
+	    tf = (*((funcvp)boot))();
+	    assert(tf);
+
+	    veriusertfs_register_table(tf);
+      }
+}
+
+void (*vlog_startup_routines[])() = {
+      thunker_register,
+      0
+};
+
+
+/*
+ * $Log: cadpli.c,v $
+ * Revision 1.4  2003/04/30 01:28:06  steve
+ *  Remove veriusertfs stuf.
+ *
+ * Revision 1.3  2003/02/22 04:04:38  steve
+ *  Only include malloc.h if it is present.
+ *
+ * Revision 1.2  2003/02/17 00:01:25  steve
+ *  Use a variant of ivl_dlfcn to do dynamic loading
+ *  from within the cadpli module.
+ *
+ *  Change the +cadpli flag to -cadpli, to keep the
+ *  plusargs namespace clear.
+ *
+ * Revision 1.1  2003/02/16 02:23:54  steve
+ *  Add the cadpli interface module.
+ *
+ */
+

cadpli/cadpli.txt

@@ -0,0 +1,48 @@
+
+CADENCE PLI1 MODULES
+
+   Copyright 2003 Stephen Williams
+   $Id: cadpli.txt,v 1.2 2003/02/17 00:01:25 steve Exp $
+
+With the cadpli module, Icarus Verilog is able to load PLI1
+applications that were compiled and linked to be dynamic loaded by
+Verilog-XL or NC-Verilog. This allows Icarus Verilog users to run
+third-party modules that were compiled to interface with XL or
+NC. Obviously, this only works on the operating system that the PLI
+application was compiled to run on. For example, a Linux module can
+only be loaded and run under Linux.
+
+Icarus Verilog uses an interface module, the "cadpli" module, to
+connect the worlds. This module is installed with Icarus Verilog, and
+is invoked by the usual -m flag to iverilog or vvp. This module in
+turn scans the extended arguments, looking for +cadpli= arguments. The
+latter specify the share object and bootstrap function for running the
+module. For example, to run the module product.so, that has the
+bootstrap function "my_boot":
+
+    vvp -mcadpli a.out -cadpli=./product.so:my_boot
+
+The "-mcadpli" argument causes vvp to load the cadpli.vpl library
+module. This activates the -cadpli= argument interpreter. The
+-cadpli=<module>:<boot_func> argument, then, causes vvp, through the
+cadpli module, to load the loadable PLI application, invoke the
+my_boot function to get a veriusertfs table, and scan that table to
+register the system tasks and functions exported by that object. The
+format of the -cadpli= extended argument is essentially the same as
+the +loadpli1= argument to Verilog-XL.
+
+The integration from this point is seamless. The PLI application
+hardly knows that it is being invoked by Icarus Verilog instead of
+Verilog-XL, so operates as it would otherwise.
+
+$Log: cadpli.txt,v $
+Revision 1.2  2003/02/17 00:01:25  steve
+ Use a variant of ivl_dlfcn to do dynamic loading
+ from within the cadpli module.
+
+ Change the +cadpli flag to -cadpli, to keep the
+ plusargs namespace clear.
+
+Revision 1.1  2003/02/16 02:44:47  steve
+ Add the cadpli HOWTO.
+

cadpli/configure.in

@@ -0,0 +1,222 @@
+AC_INIT(Makefile.in)
+
+AC_PROG_CC
+AC_PROG_CXX
+AC_CHECK_TOOL(STRIP, strip, true)
+
+AC_CYGWIN
+AC_EXEEXT
+AC_MINGW32
+AC_SUBST(EXEEXT)
+
+AC_PROG_INSTALL
+
+AC_CHECK_HEADERS(malloc.h)
+
+AC_CHECK_SIZEOF(unsigned long long)
+AC_CHECK_SIZEOF(unsigned long)
+AC_CHECK_SIZEOF(unsigned)
+
+# --
+# Look for a dl library to use. First look for the standard dlopen
+# functions, and failing that look for the HP specific shl_load function.
+
+AC_CHECK_HEADERS(dlfcn.h dl.h, break)
+
+DLLIB=''
+AC_CHECK_LIB(dl,dlopen,[DLLIB=-ldl])
+if test -z "$DLLIB" ; then
+AC_CHECK_LIB(dld,shl_load,[DLLIB=-ldld])
+fi
+AC_SUBST(DLLIB)
+
+
+# Darwin requires -no-cpp-precomp
+case "${host}" in
+    *-*-darwin*)
+	CPPFLAGS="-no-cpp-precomp $CPPFLAGS"
+	CFLAGS="-no-cpp-precomp $CFLAGS"
+	;;
+esac
+
+# The -fPIC flag is used to tell the compiler to make position
+# independent code. It is needed when making shared objects.
+
+AC_MSG_CHECKING("for flag to make position independent code")
+PICFLAG=-fPIC
+case "${host}" in
+
+     *-*-cygwin*)
+	PICFLAG=
+	;;
+
+     *-*-hpux*)
+	PICFLAG=+z
+	;;
+
+esac
+AC_SUBST(PICFLAG)
+AC_MSG_RESULT($PICFLAG)
+
+# The -rdynamic flag is used by iverilog when compiling the target,
+# to know how to export symbols of the main program to loadable modules
+# that are brought in by -ldl. VPI support requires this.
+AC_MSG_CHECKING("for -rdynamic compiler flag")
+
+rdynamic=-rdynamic
+whole_archive=-Wl,-whole-archive
+no_whole_archive=-Wl,-no-whole-archive
+case "${host}" in
+
+    *-*-netbsd*)
+	rdynamic="-Wl,--export-dynamic"
+	;;
+
+    *-*-openbsd*)
+	whole_archive=""
+	no_whole_archive=""
+	;;
+
+    *-*-solaris*)
+	rdynamic=""
+	;;
+
+    *-*-cygwin*)
+	rdynamic=""
+	;;
+
+    *-*-hpux*)
+	rdynamic="-E"
+	;;
+
+    *-*-darwin*)
+	rdynamic="-Wl,-all_load"
+	whole_archive=""
+	no_whole_archive=""
+	;;
+
+esac
+AC_SUBST(rdynamic)
+AC_SUBST(whole_archive)
+AC_SUBST(no_whole_archive)
+AC_MSG_RESULT($rdynamic)
+
+AC_MSG_CHECKING("for -whole-archive compiler flags")
+AC_MSG_RESULT($whole_archive $no_whole_archive)
+
+AC_MSG_CHECKING("for shared library link flag")
+shared=-shared
+case "${host}" in
+
+     *-*-cygwin*)
+        shared="-shared -Wl,--enable-auto-image-base"
+	;;
+
+     *-*-hpux*)
+	shared="-b"
+	;;
+
+     *-*-darwin1.[0123])
+	shared="-bundle -undefined suppress"
+	;;
+
+     *-*-darwin*)
+	shared="-bundle -undefined suppress -flat_namespace"
+	;;
+esac
+
+AC_SUBST(shared)
+AC_MSG_RESULT($shared)
+
+AC_MSG_CHECKING("for extra libs needed")
+EXTRALIBS=
+case "${host}" in
+     *-*-cygwin*)
+	EXTRALIBS="-liberty"
+	;;
+esac
+AC_SUBST(EXTRALIBS)
+AC_MSG_RESULT($EXTRALIBS)
+
+#######################
+## test for underscores. The vpi module loader in vvm needs to know this
+## in order to know the name of the start symbol for the .vpi module.
+#######################
+
+AC_CYGWIN
+AC_EXEEXT
+AC_MINGW32
+
+
+WIN32=no
+AC_MSG_CHECKING("Checking for windows")
+if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
+then
+    WIN32=yes
+fi
+AC_SUBST(WIN32)
+AC_MSG_RESULT($WIN32)
+AC_SUBST(EXEEXT)
+
+
+AC_MSG_CHECKING("for leading and/or trailing underscores")
+cat << EOF > underscore.c
+       void underscore(void){}
+EOF
+$CC -shared -c underscore.c > /dev/null 2>&1
+
+CC_LEADING_UNDERSCORE=no
+CC_TRAILING_UNDERSCORE=no
+
+output=`nm underscore.o|grep _underscore 2>&1`
+if test ! -z "$output" -a "$CYGWIN" != "yes" -a "$MINGW32" != "yes"; then
+  CC_LEADING_UNDERSCORE=yes
+  AC_DEFINE(NEED_LU)
+fi
+
+
+
+output=`nm underscore.o|grep underscore_ 2>&1`
+if test ! -z "$output"; then
+  CC_TRAILING_UNDERSCORE=yes
+  AC_DEFINE(NEED_TU)
+fi
+
+if test "$CC_LEADING_UNDERSCORE" = yes; then
+  AC_DEFINE(WLU)
+fi
+if test "$CC_TRAILING_UNDERSCORE" = yes; then
+  AC_DEFINE(WTU)
+fi
+
+rm underscore.c underscore.o
+
+AC_MSG_RESULT("$CC_LEADING_UNDERSCORE $CC_TRAILING_UNDERSCORE")
+
+#######################
+## end of test for underscores
+#######################
+
+
+
+AC_MSG_CHECKING("for ident support in C compiler")
+ident_support='-DHAVE_CVS_IDENT=1'
+case "${host}" in
+
+     *-*-cygwin*)
+	ident_support=
+	;;
+
+     *-*-darwin*)
+	ident_support=
+	;;
+
+     *-*-machten*)
+	ident_support=
+	;;
+esac
+
+AC_SUBST(ident_support)
+AC_MSG_RESULT($ident_support)
+
+AC_OUTPUT(Makefile)

cadpli/ivl_dlfcn.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: ivl_dlfcn.h,v 1.5 2002/08/12 01:35:06 steve Exp $"
+#ident "$Id: ivl_dlfcn.h,v 1.1 2003/02/17 00:01:25 steve Exp $"
 #endif
 
 #if defined(__MINGW32__)
@@ -45,7 +45,20 @@ inline void ivl_dlclose(ivl_dll_t dll)
 { (void)FreeLibrary((HINSTANCE)dll);}
 
 inline const char *dlerror(void)
-{ static char s[30]; sprintf(s,"DLError:%ld", GetLastError()); return s;}
+{
+  static char msg[256];
+  unsigned long err = GetLastError();
+  FormatMessage( 
+		FORMAT_MESSAGE_FROM_SYSTEM | FORMAT_MESSAGE_IGNORE_INSERTS,
+		NULL,
+		err,
+		MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), // Default language
+		(LPTSTR) &msg,
+		sizeof(msg) - 1,
+		NULL 
+		);
+  return msg;
+}
 
 #elif defined(HAVE_DLFCN_H)
 inline ivl_dll_t ivl_dlopen(const char*name)
@@ -77,24 +90,12 @@ inline const char*dlerror(void)
 
 /*
  * $Log: ivl_dlfcn.h,v $
- * Revision 1.5  2002/08/12 01:35:06  steve
- *  conditional ident string using autoconfig.
+ * Revision 1.1  2003/02/17 00:01:25  steve
+ *  Use a variant of ivl_dlfcn to do dynamic loading
+ *  from within the cadpli module.
  *
- * Revision 1.4  2002/01/23 04:54:38  steve
- *  Load modules with RTLD_LAZY
- *
- * Revision 1.3  2001/05/22 02:14:47  steve
- *  Update the mingw build to not require cygwin files.
- *
- * Revision 1.2  2001/05/20 15:09:40  steve
- *  Mingw32 support (Venkat Iyer)
- *
- * Revision 1.1  2001/03/16 01:44:34  steve
- *  Add structures for VPI support, and all the %vpi_call
- *  instruction. Get linking of VPI modules to work.
- *
- * Revision 1.1  2001/01/14 17:12:59  steve
- *  possible HP/UX portability support.
+ *  Change the +cadpli flag to -cadpli, to keep the
+ *  plusargs namespace clear.
  *
  */
 #endif

compiler.h

@@ -19,10 +19,11 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: compiler.h,v 1.13 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: compiler.h,v 1.16 2003/03/01 06:25:30 steve Exp $"
 #endif
 
 # include  <list>
+# include  "StringHeap.h"
 
 /*
  * This defines constants and defaults for the compiler in general.
@@ -69,13 +70,16 @@
 extern bool warn_implicit;
 extern bool error_implicit;
 
-/* inherit timescales accross files. */
+/* inherit timescales across files. */
 extern bool warn_timescale;
 
+/* Warn about legal but questionable module port bindings. */
+extern bool warn_portbinding;
+
 /* This is true if verbose output is requested. */
 extern bool verbose_flag;
 
-/* This is an ordered list of library suffixxes to search. */
+/* This is an ordered list of library suffixes to search. */
 extern list<const char*>library_suff;
 extern int build_library_index(const char*path, bool key_case_sensitive);
 
@@ -93,8 +97,23 @@ extern generation_t generation_flag;
   /* This is the string to use to invoke the preprocessor. */
 extern char*ivlpp_string;
 
+
+extern StringHeapLex lex_strings;
+
 /*
  * $Log: compiler.h,v $
+ * Revision 1.16  2003/03/01 06:25:30  steve
+ *  Add the lex_strings string handler, and put
+ *  scope names and system task/function names
+ *  into this table. Also, permallocate event
+ *  names from the beginning.
+ *
+ * Revision 1.15  2003/02/22 04:12:49  steve
+ *  Add the portbind warning.
+ *
+ * Revision 1.14  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
  * Revision 1.13  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

config.h.in

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT)
-#ident "$Id: config.h.in,v 1.5 2002/08/11 23:39:33 steve Exp $"
+#ident "$Id: config.h.in,v 1.9 2003/07/03 16:29:55 steve Exp $"
 #endif
 
 #if defined(__cplusplus)
@@ -37,15 +37,31 @@
 # undef HAVE_TIMES
 # undef HAVE_IOSFWD
 # undef HAVE_GETOPT_H
+# undef HAVE_LIBIBERTY_H
 # undef HAVE_MALLOC_H
 # undef HAVE_DLFCN_H
 # undef HAVE_DL_H
 # undef HAVE_FCHMOD
 # undef HAVE_LIBREADLINE
+# undef HAVE_LIBZ
+# undef HAVE_LIBBZ2
 # undef HAVE_SYS_WAIT_H
+# undef WORDS_BIGENDIAN
 
 /*
  * $Log: config.h.in,v $
+ * Revision 1.9  2003/07/03 16:29:55  steve
+ *  spemm WORDS_BIGENDIAN correctly.
+ *
+ * Revision 1.8  2003/03/07 02:44:33  steve
+ *  Implement $realtobits.
+ *
+ * Revision 1.7  2003/02/20 00:49:24  steve
+ *  detect -lz and -lbz2 libraries.
+ *
+ * Revision 1.6  2003/01/10 19:01:04  steve
+ *  Only use libiberty.h if available.
+ *
  * Revision 1.5  2002/08/11 23:39:33  steve
  *  Remove VVM option.
  *

config.sub

@@ -1,8 +1,10 @@
 #! /bin/sh
-# Configuration validation subroutine script, version 1.1.
-#   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
-#   Free Software Foundation, Inc.
-#
+# Configuration validation subroutine script.
+#   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+#   2000, 2001, 2002 Free Software Foundation, Inc.
+
+timestamp='2002-07-03'
+
 # This file is (in principle) common to ALL GNU software.
 # The presence of a machine in this file suggests that SOME GNU software
 # can handle that machine.  It does not imply ALL GNU software can.
@@ -27,8 +29,8 @@
 # configuration script generated by Autoconf, you may include it under
 # the same distribution terms that you use for the rest of that program.
 
-# Written by Per Bothner <[email protected]>.
-# Please send patches to <[email protected]>.
+# Please send patches to <[email protected]>.  Submit a context
+# diff and a properly formatted ChangeLog entry.
 #
 # Configuration subroutine to validate and canonicalize a configuration type.
 # Supply the specified configuration type as an argument.
@@ -50,30 +52,73 @@
 #	CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM
 # It is wrong to echo any other type of specification.
 
-if [ x$1 = x ]
-then
-	echo Configuration name missing. 1>&2
-	echo "Usage: $0 CPU-MFR-OPSYS" 1>&2
-	echo "or     $0 ALIAS" 1>&2
-	echo where ALIAS is a recognized configuration type. 1>&2
-	exit 1
-fi
+me=`echo "$0" | sed -e 's,.*/,,'`
 
-# First pass through any local machine types.
-case $1 in
-	*local*)
-		echo $1
-		exit 0
-		;;
-	*)
-	;;
+usage="\
+Usage: $0 [OPTION] CPU-MFR-OPSYS
+       $0 [OPTION] ALIAS
+
+Canonicalize a configuration name.
+
+Operation modes:
+  -h, --help         print this help, then exit
+  -t, --time-stamp   print date of last modification, then exit
+  -v, --version      print version number, then exit
+
+Report bugs and patches to <[email protected]>."
+
+version="\
+GNU config.sub ($timestamp)
+
+Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
+Free Software Foundation, Inc.
+
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."
+
+help="
+Try \`$me --help' for more information."
+
+# Parse command line
+while test $# -gt 0 ; do
+  case $1 in
+    --time-stamp | --time* | -t )
+       echo "$timestamp" ; exit 0 ;;
+    --version | -v )
+       echo "$version" ; exit 0 ;;
+    --help | --h* | -h )
+       echo "$usage"; exit 0 ;;
+    -- )     # Stop option processing
+       shift; break ;;
+    - )	# Use stdin as input.
+       break ;;
+    -* )
+       echo "$me: invalid option $1$help"
+       exit 1 ;;
+
+    *local*)
+       # First pass through any local machine types.
+       echo $1
+       exit 0;;
+
+    * )
+       break ;;
+  esac
+done
+
+case $# in
+ 0) echo "$me: missing argument$help" >&2
+    exit 1;;
+ 1) ;;
+ *) echo "$me: too many arguments$help" >&2
+    exit 1;;
 esac
 
 # Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any).
 # Here we must recognize all the valid KERNEL-OS combinations.
 maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
 case $maybe_os in
-  nto-qnx* | linux-gnu*)
+  nto-qnx* | linux-gnu* | freebsd*-gnu* | storm-chaos* | os2-emx* | windows32-* | rtmk-nova*)
     os=-$maybe_os
     basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`
     ;;
@@ -99,7 +144,7 @@ case $os in
 	-convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\
 	-c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \
 	-harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \
-	-apple)
+	-apple | -axis)
 		os=
 		basic_machine=$1
 		;;
@@ -113,6 +158,14 @@ case $os in
 		os=-vxworks
 		basic_machine=$1
 		;;
+	-chorusos*)
+		os=-chorusos
+		basic_machine=$1
+		;;
+ 	-chorusrdb)
+ 		os=-chorusrdb
+		basic_machine=$1
+ 		;;
 	-hiux*)
 		os=-hiuxwe2
 		;;
@@ -171,30 +224,58 @@ esac
 case $basic_machine in
 	# Recognize the basic CPU types without company name.
 	# Some are omitted here because they have special meanings below.
-	tahoe | i860 | ia64 | m32r | m68k | m68000 | m88k | ns32k | arc | arm \
-		| arme[lb] | pyramid | mn10200 | mn10300 | tron | a29k \
-		| 580 | i960 | h8300 \
-		| x86 | ppcbe | mipsbe | mipsle | shbe | shle | armbe | armle \
-		| hppa | hppa1.0 | hppa1.1 | hppa2.0 | hppa2.0w | hppa2.0n \
-		| hppa64 \
-		| alpha | alphaev[4-8] | alphaev56 | alphapca5[67] \
-		| alphaev6[78] \
-		| we32k | ns16k | clipper | i370 | sh | powerpc | powerpcle \
-		| 1750a | dsp16xx | pdp11 | mips16 | mips64 | mipsel | mips64el \
-		| mips64orion | mips64orionel | mipstx39 | mipstx39el \
-		| mips64vr4300 | mips64vr4300el | mips64vr4100 | mips64vr4100el \
-		| mips64vr5000 | miprs64vr5000el | mcore \
-		| sparc | sparclet | sparclite | sparc64 | sparcv9 | v850 | c4x \
-		| thumb | d10v | fr30 | avr)
+	1750a | 580 \
+	| a29k \
+	| alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \
+	| alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \
+	| arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr \
+	| c4x | clipper \
+	| d10v | d30v | dlx | dsp16xx \
+	| fr30 | frv \
+	| h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \
+	| i370 | i860 | i960 | ia64 \
+	| ip2k \
+	| m32r | m68000 | m68k | m88k | mcore \
+	| mips | mipsbe | mipseb | mipsel | mipsle \
+	| mips16 \
+	| mips64 | mips64el \
+	| mips64orion | mips64orionel \
+	| mips64vr4100 | mips64vr4100el \
+	| mips64vr4300 | mips64vr4300el \
+	| mips64vr5000 | mips64vr5000el \
+	| mipsisa32 | mipsisa32el \
+	| mipsisa64 | mipsisa64el \
+	| mipsisa64sb1 | mipsisa64sb1el \
+	| mipstx39 | mipstx39el \
+	| mn10200 | mn10300 \
+	| ns16k | ns32k \
+	| openrisc | or32 \
+	| pdp10 | pdp11 | pj | pjl \
+	| powerpc | powerpc64 | powerpc64le | powerpcle | ppcbe \
+	| pyramid \
+	| sh | sh[1234] | sh3e | sh[34]eb | shbe | shle | sh[1234]le | sh3ele \
+	| sh64 | sh64le \
+	| sparc | sparc64 | sparc86x | sparclet | sparclite | sparcv9 | sparcv9b \
+	| strongarm \
+	| tahoe | thumb | tic80 | tron \
+	| v850 | v850e \
+	| we32k \
+	| x86 | xscale | xstormy16 | xtensa \
+	| z8k)
 		basic_machine=$basic_machine-unknown
 		;;
-	m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | z8k | v70 | h8500 | w65 | pj | pjl)
+	m6811 | m68hc11 | m6812 | m68hc12)
+		# Motorola 68HC11/12.
+		basic_machine=$basic_machine-unknown
+		os=-none
+		;;
+	m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k)
 		;;
 
 	# We use `pc' rather than `unknown'
 	# because (1) that's what they normally are, and
 	# (2) the word "unknown" tends to confuse beginning users.
-	i[34567]86)
+	i*86 | x86_64)
 	  basic_machine=$basic_machine-pc
 	  ;;
 	# Object if more than one company name word.
@@ -203,28 +284,54 @@ case $basic_machine in
 		exit 1
 		;;
 	# Recognize the basic CPU types with company name.
-	# FIXME: clean up the formatting here.
-	vax-* | tahoe-* | i[34567]86-* | i860-* | ia64-* | m32r-* | m68k-* | m68000-* \
-	      | m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | arm-* | c[123]* \
-	      | mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* \
-	      | power-* | none-* | 580-* | cray2-* | h8300-* | h8500-* | i960-* \
-	      | xmp-* | ymp-* \
-	      | x86-* | ppcbe-* | mipsbe-* | mipsle-* | shbe-* | shle-* | armbe-* | armle-* \
-	      | hppa-* | hppa1.0-* | hppa1.1-* | hppa2.0-* | hppa2.0w-* \
-	      | hppa2.0n-* | hppa64-* \
-	      | alpha-* | alphaev[4-8]-* | alphaev56-* | alphapca5[67]-* \
-	      | alphaev6[78]-* \
-	      | we32k-* | cydra-* | ns16k-* | pn-* | np1-* | xps100-* \
-	      | clipper-* | orion-* \
-	      | sparclite-* | pdp11-* | sh-* | powerpc-* | powerpcle-* \
-	      | sparc64-* | sparcv9-* | sparc86x-* | mips16-* | mips64-* | mipsel-* \
-	      | mips64el-* | mips64orion-* | mips64orionel-* \
-	      | mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \
-	      | mipstx39-* | mipstx39el-* | mcore-* \
-	      | f301-* | armv*-* | s390-* | sv1-* | t3e-* \
-	      | m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \
-	      | thumb-* | v850-* | d30v-* | tic30-* | c30-* | fr30-* \
-	      | bs2000-*)
+	580-* \
+	| a29k-* \
+	| alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \
+	| alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \
+	| alphapca5[67]-* | alpha64pca5[67]-* | arc-* \
+	| arm-*  | armbe-* | armle-* | armeb-* | armv*-* \
+	| avr-* \
+	| bs2000-* \
+	| c[123]* | c30-* | [cjt]90-* | c54x-* \
+	| clipper-* | cydra-* \
+	| d10v-* | d30v-* | dlx-* \
+	| elxsi-* \
+	| f30[01]-* | f700-* | fr30-* | frv-* | fx80-* \
+	| h8300-* | h8500-* \
+	| hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \
+	| i*86-* | i860-* | i960-* | ia64-* \
+	| ip2k-* \
+	| m32r-* \
+	| m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \
+	| m88110-* | m88k-* | mcore-* \
+	| mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \
+	| mips16-* \
+	| mips64-* | mips64el-* \
+	| mips64orion-* | mips64orionel-* \
+	| mips64vr4100-* | mips64vr4100el-* \
+	| mips64vr4300-* | mips64vr4300el-* \
+	| mips64vr5000-* | mips64vr5000el-* \
+	| mipsisa32-* | mipsisa32el-* \
+	| mipsisa64-* | mipsisa64el-* \
+	| mipsisa64sb1-* | mipsisa64sb1el-* \
+	| mipstx39 | mipstx39el \
+	| none-* | np1-* | ns16k-* | ns32k-* \
+	| orion-* \
+	| pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \
+	| powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* | ppcbe-* \
+	| pyramid-* \
+	| romp-* | rs6000-* \
+	| sh-* | sh[1234]-* | sh3e-* | sh[34]eb-* | shbe-* \
+	| shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \
+	| sparc-* | sparc64-* | sparc86x-* | sparclet-* | sparclite-* \
+	| sparcv9-* | sparcv9b-* | strongarm-* | sv1-* | sx?-* \
+	| tahoe-* | thumb-* | tic30-* | tic54x-* | tic80-* | tron-* \
+	| v850-* | v850e-* | vax-* \
+	| we32k-* \
+	| x86-* | x86_64-* | xps100-* | xscale-* | xstormy16-* \
+	| xtensa-* \
+	| ymp-* \
+	| z8k-*)
 		;;
 	# Recognize the various machine names and aliases which stand
 	# for a CPU type and a company and sometimes even an OS.
@@ -261,14 +368,14 @@ case $basic_machine in
 		os=-sysv
 		;;
 	amiga | amiga-*)
-		basic_machine=m68k-cbm
+		basic_machine=m68k-unknown
 		;;
 	amigaos | amigados)
-		basic_machine=m68k-cbm
+		basic_machine=m68k-unknown
 		os=-amigaos
 		;;
 	amigaunix | amix)
-		basic_machine=m68k-cbm
+		basic_machine=m68k-unknown
 		os=-sysv4
 		;;
 	apollo68)
@@ -287,6 +394,10 @@ case $basic_machine in
 		basic_machine=ns32k-sequent
 		os=-dynix
 		;;
+	c90)
+		basic_machine=c90-cray
+		os=-unicos
+		;;
 	convex-c1)
 		basic_machine=c1-convex
 		os=-bsd
@@ -307,27 +418,30 @@ case $basic_machine in
 		basic_machine=c38-convex
 		os=-bsd
 		;;
-	cray | ymp)
-		basic_machine=ymp-cray
-		os=-unicos
-		;;
-	cray2)
-		basic_machine=cray2-cray
-		os=-unicos
-		;;
-	[ctj]90-cray)
-		basic_machine=c90-cray
+	cray | j90)
+		basic_machine=j90-cray
 		os=-unicos
 		;;
 	crds | unos)
 		basic_machine=m68k-crds
 		;;
+	cris | cris-* | etrax*)
+		basic_machine=cris-axis
+		;;
 	da30 | da30-*)
 		basic_machine=m68k-da30
 		;;
 	decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn)
 		basic_machine=mips-dec
 		;;
+	decsystem10* | dec10*)
+		basic_machine=pdp10-dec
+		os=-tops10
+		;;
+	decsystem20* | dec20*)
+		basic_machine=pdp10-dec
+		os=-tops20
+		;;
 	delta | 3300 | motorola-3300 | motorola-delta \
 	      | 3300-motorola | delta-motorola)
 		basic_machine=m68k-motorola
@@ -369,6 +483,10 @@ case $basic_machine in
 		basic_machine=tron-gmicro
 		os=-sysv
 		;;
+	go32)
+		basic_machine=i386-pc
+		os=-go32
+		;;
 	h3050r* | hiux*)
 		basic_machine=hppa1.1-hitachi
 		os=-hiuxwe2
@@ -444,19 +562,19 @@ case $basic_machine in
 		basic_machine=i370-ibm
 		;;
 # I'm not sure what "Sysv32" means.  Should this be sysv3.2?
-	i[34567]86v32)
+	i*86v32)
 		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
 		os=-sysv32
 		;;
-	i[34567]86v4*)
+	i*86v4*)
 		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
 		os=-sysv4
 		;;
-	i[34567]86v)
+	i*86v)
 		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
 		os=-sysv
 		;;
-	i[34567]86sol2)
+	i*86sol2)
 		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
 		os=-solaris2
 		;;
@@ -468,14 +586,6 @@ case $basic_machine in
 		basic_machine=i386-unknown
 		os=-vsta
 		;;
-	i386-go32 | go32)
-		basic_machine=i386-unknown
-		os=-go32
-		;;
-	i386-mingw32 | mingw32)
-		basic_machine=i386-unknown
-		os=-mingw32
-		;;
 	iris | iris4d)
 		basic_machine=mips-sgi
 		case $os in
@@ -501,6 +611,10 @@ case $basic_machine in
 		basic_machine=ns32k-utek
 		os=-sysv
 		;;
+	mingw32)
+		basic_machine=i386-pc
+		os=-mingw32
+		;;
 	miniframe)
 		basic_machine=m68000-convergent
 		;;
@@ -508,14 +622,6 @@ case $basic_machine in
 		basic_machine=m68k-atari
 		os=-mint
 		;;
-	mipsel*-linux*)
-		basic_machine=mipsel-unknown
-		os=-linux-gnu
-		;;
-	mips*-linux*)
-		basic_machine=mips-unknown
-		os=-linux-gnu
-		;;
 	mips3*-*)
 		basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
 		;;
@@ -530,8 +636,12 @@ case $basic_machine in
 		basic_machine=m68k-rom68k
 		os=-coff
 		;;
+	morphos)
+		basic_machine=powerpc-unknown
+		os=-morphos
+		;;
 	msdos)
-		basic_machine=i386-unknown
+		basic_machine=i386-pc
 		os=-msdos
 		;;
 	mvs)
@@ -595,6 +705,10 @@ case $basic_machine in
 		basic_machine=i960-intel
 		os=-mon960
 		;;
+	nonstopux)
+		basic_machine=mips-compaq
+		os=-nonstopux
+		;;
 	np1)
 		basic_machine=np1-gould
 		;;
@@ -605,6 +719,10 @@ case $basic_machine in
 		basic_machine=hppa1.1-oki
 		os=-proelf
 		;;
+	or32 | or32-*)
+		basic_machine=or32-unknown
+		os=-coff
+		;;
 	OSE68000 | ose68000)
 		basic_machine=m68000-ericsson
 		os=-ose
@@ -630,28 +748,28 @@ case $basic_machine in
         pc532 | pc532-*)
 		basic_machine=ns32k-pc532
 		;;
-	pentium | p5 | k5 | k6 | nexen)
+	pentium | p5 | k5 | k6 | nexgen | viac3)
 		basic_machine=i586-pc
 		;;
-	pentiumpro | p6 | 6x86)
+	pentiumpro | p6 | 6x86 | athlon)
 		basic_machine=i686-pc
 		;;
 	pentiumii | pentium2)
-		basic_machine=i786-pc
+		basic_machine=i686-pc
 		;;
-	pentium-* | p5-* | k5-* | k6-* | nexen-*)
+	pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*)
 		basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'`
 		;;
-	pentiumpro-* | p6-* | 6x86-*)
+	pentiumpro-* | p6-* | 6x86-* | athlon-*)
 		basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
 		;;
 	pentiumii-* | pentium2-*)
-		basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'`
+		basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
 		;;
 	pn)
 		basic_machine=pn-gould
 		;;
-	power)	basic_machine=rs6000-ibm
+	power)	basic_machine=power-ibm
 		;;
 	ppc)	basic_machine=powerpc-unknown
 	        ;;
@@ -663,9 +781,23 @@ case $basic_machine in
 	ppcle-* | powerpclittle-*)
 		basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'`
 		;;
+	ppc64)	basic_machine=powerpc64-unknown
+	        ;;
+	ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	ppc64le | powerpc64little | ppc64-le | powerpc64-little)
+		basic_machine=powerpc64le-unknown
+	        ;;
+	ppc64le-* | powerpc64little-*)
+		basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
 	ps2)
 		basic_machine=i386-ibm
 		;;
+	pw32)
+		basic_machine=i586-unknown
+		os=-pw32
+		;;
 	rom68k)
 		basic_machine=m68k-rom68k
 		os=-coff
@@ -676,6 +808,12 @@ case $basic_machine in
 	rtpc | rtpc-*)
 		basic_machine=romp-ibm
 		;;
+	s390 | s390-*)
+		basic_machine=s390-ibm
+		;;
+	s390x | s390x-*)
+		basic_machine=s390x-ibm
+		;;
 	sa29200)
 		basic_machine=a29k-amd
 		os=-udi
@@ -687,7 +825,7 @@ case $basic_machine in
 		basic_machine=sh-hitachi
 		os=-hms
 		;;
-	sparclite-wrs)
+	sparclite-wrs | simso-wrs)
 		basic_machine=sparclite-wrs
 		os=-vxworks
 		;;
@@ -745,7 +883,7 @@ case $basic_machine in
 	sun386 | sun386i | roadrunner)
 		basic_machine=i386-sun
 		;;
-	sv1)
+        sv1)
 		basic_machine=sv1-cray
 		os=-unicos
 		;;
@@ -753,16 +891,32 @@ case $basic_machine in
 		basic_machine=i386-sequent
 		os=-dynix
 		;;
-	t3e)
-		basic_machine=t3e-cray
+	t3d)
+		basic_machine=alpha-cray
 		os=-unicos
 		;;
+	t3e)
+		basic_machine=alphaev5-cray
+		os=-unicos
+		;;
+	t90)
+		basic_machine=t90-cray
+		os=-unicos
+		;;
+	tic54x | c54x*)
+		basic_machine=tic54x-unknown
+		os=-coff
+		;;
 	tx39)
 		basic_machine=mipstx39-unknown
 		;;
 	tx39el)
 		basic_machine=mipstx39el-unknown
 		;;
+	toad1)
+		basic_machine=pdp10-xkl
+		os=-tops20
+		;;
 	tower | tower-32)
 		basic_machine=m68k-ncr
 		;;
@@ -809,13 +963,17 @@ case $basic_machine in
 		basic_machine=hppa1.1-winbond
 		os=-proelf
 		;;
-	xmp)
-		basic_machine=xmp-cray
-		os=-unicos
+	windows32)
+		basic_machine=i386-pc
+		os=-windows32-msvcrt
 		;;
         xps | xps100)
 		basic_machine=xps100-honeywell
 		;;
+	ymp)
+		basic_machine=ymp-cray
+		os=-unicos
+		;;
 	z8k-*-coff)
 		basic_machine=z8k-unknown
 		os=-sim
@@ -836,13 +994,6 @@ case $basic_machine in
 	op60c)
 		basic_machine=hppa1.1-oki
 		;;
-	mips)
-		if [ x$os = x-linux-gnu ]; then
-			basic_machine=mips-unknown
-		else
-			basic_machine=mips-mips
-		fi
-		;;
 	romp)
 		basic_machine=romp-ibm
 		;;
@@ -852,13 +1003,23 @@ case $basic_machine in
 	vax)
 		basic_machine=vax-dec
 		;;
+	pdp10)
+		# there are many clones, so DEC is not a safe bet
+		basic_machine=pdp10-unknown
+		;;
 	pdp11)
 		basic_machine=pdp11-dec
 		;;
 	we32k)
 		basic_machine=we32k-att
 		;;
-	sparc | sparcv9)
+	sh3 | sh4 | sh3eb | sh4eb | sh[1234]le | sh3ele)
+		basic_machine=sh-unknown
+		;;
+	sh64)
+		basic_machine=sh64-unknown
+		;;
+	sparc | sparcv9 | sparcv9b)
 		basic_machine=sparc-sun
 		;;
         cydra)
@@ -880,6 +1041,9 @@ case $basic_machine in
 		basic_machine=c4x-none
 		os=-coff
 		;;
+	*-unknown)
+		# Make sure to match an already-canonicalized machine name.
+		;;
 	*)
 		echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
 		exit 1
@@ -936,15 +1100,19 @@ case $os in
 	      | -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \
 	      | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
 	      | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
+	      | -chorusos* | -chorusrdb* \
 	      | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
-	      | -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \
+	      | -mingw32* | -linux* | -uxpv* | -beos* | -mpeix* | -udk* \
 	      | -interix* | -uwin* | -rhapsody* | -darwin* | -opened* \
-	      | -openstep* | -oskit*)
+	      | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \
+	      | -storm-chaos* | -tops10* | -tenex* | -tops20* | -its* \
+	      | -os2* | -vos* | -palmos* | -uclinux* | -nucleus* \
+	      | -morphos* | -superux* | -rtmk* | -rtmk-nova* | -windiss* | -powermax*)
 	# Remember, each alternative MUST END IN *, to match a version number.
 		;;
 	-qnx*)
 		case $basic_machine in
-		    x86-* | i[34567]86-*)
+		    x86-* | i*86-*)
 			;;
 		    *)
 			os=-nto$os
@@ -961,9 +1129,6 @@ case $os in
 	-mac*)
 		os=`echo $os | sed -e 's|mac|macos|'`
 		;;
-	-linux*)
-		os=`echo $os | sed -e 's|linux|linux-gnu|'`
-		;;
 	-sunos5*)
 		os=`echo $os | sed -e 's|sunos5|solaris2|'`
 		;;
@@ -991,16 +1156,22 @@ case $os in
 	-acis*)
 		os=-aos
 		;;
+	-atheos*)
+		os=-atheos
+		;;
 	-386bsd)
 		os=-bsd
 		;;
 	-ctix* | -uts*)
 		os=-sysv
 		;;
+	-nova*)
+		os=-rtmk-nova
+		;;
 	-ns2 )
 	        os=-nextstep2
 		;;
-	-nsk)
+	-nsk*)
 		os=-nsk
 		;;
 	# Preserve the version number of sinix5.
@@ -1037,7 +1208,7 @@ case $os in
 	-xenix)
 		os=-xenix
 		;;
-        -*mint | -*MiNT)
+        -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*)
 	        os=-mint
 		;;
 	-none)
@@ -1071,6 +1242,10 @@ case $basic_machine in
 	arm*-semi)
 		os=-aout
 		;;
+	# This must come before the *-dec entry.
+	pdp10-*)
+		os=-tops20
+		;;
         pdp11-*)
 		os=-none
 		;;
@@ -1098,6 +1273,9 @@ case $basic_machine in
 	mips*-*)
 		os=-elf
 		;;
+	or32-*)
+		os=-coff
+		;;
 	*-tti)	# must be before sparc entry or we get the wrong os.
 		os=-sysv3
 		;;
@@ -1179,7 +1357,7 @@ case $basic_machine in
 	*-masscomp)
 		os=-rtu
 		;;
-	f301-fujitsu)
+	f30[01]-fujitsu | f700-fujitsu)
 		os=-uxpv
 		;;
 	*-rom68k)
@@ -1245,7 +1423,7 @@ case $basic_machine in
 			-ptx*)
 				vendor=sequent
 				;;
-			-vxsim* | -vxworks*)
+			-vxsim* | -vxworks* | -windiss*)
 				vendor=wrs
 				;;
 			-aux*)
@@ -1257,12 +1435,23 @@ case $basic_machine in
 			-mpw* | -macos*)
 				vendor=apple
 				;;
-			-*mint | -*MiNT)
+			-*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*)
 				vendor=atari
 				;;
+			-vos*)
+				vendor=stratus
+				;;
 		esac
 		basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"`
 		;;
 esac
 
 echo $basic_machine$os
+exit 0
+
+# Local variables:
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "timestamp='"
+# time-stamp-format: "%:y-%02m-%02d"
+# time-stamp-end: "'"
+# End:

configure.in

@@ -30,9 +30,33 @@ then
         exit 1
 fi
 
+AC_CYGWIN
+AC_EXEEXT
+AC_MINGW32
+
+WIN32=no
+AC_MSG_CHECKING("Checking for windows")
+if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
+then
+    WIN32=yes
+fi
+
+AC_SUBST(MINGW32)
+AC_SUBST(WIN32)
+AC_MSG_RESULT($WIN32)
+AC_SUBST(EXEEXT)
+
+
 AC_LANG_CPLUSPLUS
 
-AC_CHECK_HEADERS(getopt.h malloc.h iosfwd sys/wait.h)
+AC_CHECK_HEADERS(getopt.h malloc.h libiberty.h iosfwd sys/wait.h)
+
+AC_CHECK_LIB(z, gzwrite)
+if test "$WIN32" = "yes"; then
+AC_CHECK_LIB(bz2, main)
+else
+AC_CHECK_LIB(bz2, BZ2_bzdopen)
+fi
 
 AC_MSG_CHECKING(for sys/times)
 AC_TRY_LINK(
@@ -71,6 +95,7 @@ AC_SUBST(DLLIB)
 AC_PROG_INSTALL
 
 AC_LANG_C
+AC_C_BIGENDIAN
 
 AC_CANONICAL_HOST
 # $host
@@ -110,8 +135,8 @@ AC_MSG_RESULT($EXTRALIBS)
 # Darwin requires -no-cpp-precomp
 case "${host}" in
     *-*-darwin*)
-	CPPFLAGS="-no-cpp-precomp"
-	CFLAGS="-no-cpp-precomp"
+	CPPFLAGS="-no-cpp-precomp $CPPFLAGS"
+	CFLAGS="-no-cpp-precomp $CFLAGS"
 	;;
 esac
 
@@ -179,22 +204,6 @@ AC_MSG_RESULT($shared)
 ## in order to know the name of the start symbol for the .vpi module.
 #######################
 
-AC_CYGWIN
-AC_EXEEXT
-AC_MINGW32
-
-
-WIN32=no
-AC_MSG_CHECKING("Checking for windows")
-if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
-then
-    WIN32=yes
-fi
-AC_SUBST(WIN32)
-AC_MSG_RESULT($WIN32)
-AC_SUBST(EXEEXT)
-
-
 AC_MSG_CHECKING("for leading and/or trailing underscores")
 cat << EOF > underscore.c
        void underscore(void){}
@@ -206,7 +215,7 @@ CC_LEADING_UNDERSCORE=no
 CC_TRAILING_UNDERSCORE=no
 
 output=`nm underscore.o|grep _underscore 2>&1`
-if test ! -z "$output" -o $WIN32 = "yes"; then
+if test ! -z "$output" -a "$CYGWIN" != "yes" -a "$MINGW32" != "yes"; then
   CC_LEADING_UNDERSCORE=yes
   AC_DEFINE(NEED_LU)
 fi
@@ -253,6 +262,6 @@ AC_SUBST(ident_support)
 AC_MSG_RESULT($ident_support)
 
 
-AC_CONFIG_SUBDIRS(vvp tgt-vvp tgt-fpga libveriuser)
+AC_CONFIG_SUBDIRS(vvp tgt-vvp tgt-fpga libveriuser cadpli)
 
-AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile driver/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
+AC_OUTPUT(Makefile vpi/Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)

cprop.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2003 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: cprop.cc,v 1.39 2002/08/20 04:12:22 steve Exp $"
+#ident "$Id: cprop.cc,v 1.44 2003/04/25 05:06:32 steve Exp $"
 #endif
 
 # include "config.h"
@@ -30,7 +30,7 @@
 
 
 /*
- * The cprop function below invokes constant propogation where
+ * The cprop function below invokes constant propagation where
  * possible. The elaboration generates NetConst objects. I can remove
  * these and replace the gates connected to it with simpler ones. I
  * may even be able to replace nets with a new constant.
@@ -118,8 +118,8 @@ void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
 	    NetLogic*tmp;
 	    if (obj->pin_Cout().is_linked()) {
 		  tmp = new NetLogic(obj->scope(),
-				     des->local_symbol(obj->name()), 3,
-				     NetLogic::AND);
+				     obj->scope()->local_symbol(),
+				     3, NetLogic::AND);
 		  connect(tmp->pin(0), obj->pin_Cout());
 		  connect(tmp->pin(1), obj->pin_DataA(0));
 		  connect(tmp->pin(2), obj->pin_DataB(0));
@@ -155,6 +155,9 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
 {
       NetScope*scope = obj->scope();
 
+      unsigned const_count = 0;
+      bool unknown_flag = false;
+
 	/* First, look for the case where constant bits on matching A
 	   and B inputs are different. This this is so, the device can
 	   be completely eliminated and replaced with a constant 0. */
@@ -164,8 +167,21 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
 		  continue;
 	    if (! obj->pin_DataB(idx).nexus()->drivers_constant())
 		  continue;
-	    if (obj->pin_DataA(idx).nexus()->driven_value() ==
-		obj->pin_DataB(idx).nexus()->driven_value())
+
+	    const_count += 1;
+
+	    verinum::V abit = obj->pin_DataA(idx).nexus()->driven_value();
+	    verinum::V bbit = obj->pin_DataB(idx).nexus()->driven_value();
+
+	    if ((abit == verinum::V0) && (bbit == verinum::V0))
+		  continue;
+	    if ((abit == verinum::V1) && (bbit == verinum::V1))
+		  continue;
+
+	    unknown_flag = true;
+	    if ((abit == verinum::Vz) || (abit == verinum::Vx))
+		  continue;
+	    if ((bbit == verinum::Vz) || (bbit == verinum::Vx))
 		  continue;
 
 	    NetConst*zero = new NetConst(scope, obj->name(), verinum::V0);
@@ -176,6 +192,21 @@ void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj)
 	    return;
       }
 
+	/* If all the inputs are constant, then at this point the
+	   result is either V1 or Vx. */
+      if (const_count == obj->width()) {
+
+	    NetConst*val = new NetConst(scope, obj->name(),
+					unknown_flag
+					  ? verinum::Vx
+					  : verinum::V1);
+	    connect(val->pin(0), obj->pin_AEB());
+	    delete obj;
+	    des->add_node(val);
+	    count += 1;
+	    return;
+      }
+
 	/* Still may need the gate. Run through the inputs again, and
 	   look for pairs of constants. Those inputs can be removed. */
 
@@ -806,7 +837,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
 }
 
 /*
- * This detects the case where the mux selects between a value an
+ * This detects the case where the mux selects between a value and
  * Vz. In this case, replace the device with a bufif with the sel
  * input used to enable the output.
  */
@@ -834,9 +865,10 @@ void cprop_functor::lpm_mux(Design*des, NetMux*obj)
       }
 
       if (flag) {
+	    NetScope*scope = obj->scope();
 	    for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
 		  NetLogic*tmp = new NetLogic(obj->scope(),
-					      des->local_symbol(obj->name()),
+					      scope->local_symbol(),
 					      3, NetLogic::BUFIF1);
 
 		  connect(obj->pin_Result(idx), tmp->pin(0));
@@ -866,9 +898,10 @@ void cprop_functor::lpm_mux(Design*des, NetMux*obj)
       }
 
       if (flag) {
+	    NetScope*scope = obj->scope();
 	    for (unsigned idx = 0 ;  idx < obj->width() ;  idx += 1) {
 		  NetLogic*tmp = new NetLogic(obj->scope(),
-					      des->local_symbol(obj->name()),
+					      scope->local_symbol(),
 					      3, NetLogic::BUFIF0);
 
 		  connect(obj->pin_Result(idx), tmp->pin(0));
@@ -897,7 +930,7 @@ struct cprop_dc_functor  : public functor_t {
 void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
 {
 	// 'bz constant values drive high impedance to whatever is
-	// connected to it. In otherwords, it is a noop.
+	// connected to it. In other words, it is a noop.
       { unsigned tmp = 0;
         for (unsigned idx = 0 ;  idx < obj->pin_count() ;  idx += 1)
 	      if (obj->value(idx) == verinum::Vz) {
@@ -980,7 +1013,7 @@ void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
 
 void cprop(Design*des)
 {
-	// Continually propogate constants until a scan finds nothing
+	// Continually propagate constants until a scan finds nothing
 	// to do.
       cprop_functor prop;
       do {
@@ -994,6 +1027,21 @@ void cprop(Design*des)
 
 /*
  * $Log: cprop.cc,v $
+ * Revision 1.44  2003/04/25 05:06:32  steve
+ *  Handle X values in constant == nets.
+ *
+ * Revision 1.43  2003/03/06 00:28:41  steve
+ *  All NetObj objects have lex_string base names.
+ *
+ * Revision 1.42  2003/02/26 01:29:24  steve
+ *  LPM objects store only their base names.
+ *
+ * Revision 1.41  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.40  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
  * Revision 1.39  2002/08/20 04:12:22  steve
  *  Copy gate delays when doing gate delay substitutions.
  *
@@ -1013,128 +1061,5 @@ void cprop(Design*des)
  *
  *  Divide signal reference counts between rval
  *  and lval references.
- *
- * Revision 1.34  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.33  2002/04/14 02:51:37  steve
- *  Fix bug removing pairs of ones in XOR.
- *
- * Revision 1.32  2002/02/03 00:06:28  steve
- *  Comments about xor evaluation.
- *
- * Revision 1.31  2001/12/31 01:56:08  steve
- *  Get sense of 1-bit == operator right.
- *
- * Revision 1.30  2001/10/28 01:14:53  steve
- *  NetObj constructor finally requires a scope.
- *
- * Revision 1.29  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.28  2001/06/15 04:14:18  steve
- *  Generate vvp code for GT and GE comparisons.
- *
- * Revision 1.27  2001/06/07 02:12:43  steve
- *  Support structural addition.
- *
- * Revision 1.26  2001/02/18 01:07:32  steve
- *  check signals in the cprop functor.
- *
- * Revision 1.25  2001/02/16 03:27:31  steve
- *  Constant propagation for compare ==.
- *
- * Revision 1.24  2001/02/10 04:50:54  steve
- *  Catch constants driving root module ports. (PR#130)
- *
- * Revision 1.23  2000/12/30 03:11:15  steve
- *  Propagate initial value of constants into wires.
- *
- * Revision 1.22  2000/11/23 01:55:52  steve
- *  Propagate constants through xnor gates. (PR#51)
- *
- * Revision 1.21  2000/11/19 05:26:58  steve
- *  Replace AND constand propagation.
- *
- * Revision 1.20  2000/11/18 05:13:27  steve
- *  Thorough constant propagation for or and nor gates.
- *
- * Revision 1.19  2000/11/18 04:10:37  steve
- *  Handle constant propagation through XOR gates,
- *  including reducing the gate to a constant,
- *  a buffer or an inverter if possible.
- *
- * Revision 1.18  2000/11/11 00:03:36  steve
- *  Add support for the t-dll backend grabing flip-flops.
- *
- * Revision 1.17  2000/10/07 19:45:42  steve
- *  Put logic devices into scopes.
- *
- * Revision 1.16  2000/10/06 21:26:34  steve
- *  Eliminate zero inputs to xor.
- *
- * Revision 1.15  2000/08/02 14:48:01  steve
- *  use bufif0 if z is in true case of mux.
- *
- * Revision 1.14  2000/07/25 02:55:13  steve
- *  Unlink z constants from nets.
- *
- * Revision 1.13  2000/07/15 05:13:43  steve
- *  Detect muxing Vz as a bufufN.
- *
- * Revision 1.12  2000/06/25 19:59:41  steve
- *  Redesign Links to include the Nexus class that
- *  carries properties of the connected set of links.
- *
- * Revision 1.11  2000/06/24 22:55:19  steve
- *  Get rid of useless next_link method.
- *
- * Revision 1.10  2000/05/14 17:55:04  steve
- *  Support initialization of FF Q value.
- *
- * Revision 1.9  2000/05/07 04:37:56  steve
- *  Carry strength values from Verilog source to the
- *  pform and netlist for gates.
- *
- *  Change vvm constants to use the driver_t to drive
- *  a constant value. This works better if there are
- *  multiple drivers on a signal.
- *
- * Revision 1.8  2000/04/28 21:00:28  steve
- *  Over agressive signal elimination in constant probadation.
- *
- * Revision 1.7  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.6  2000/01/02 17:56:42  steve
- *  Do not delete constants that input to exressions.
- *
- * Revision 1.5  1999/12/30 04:19:12  steve
- *  Propogate constant 0 in low bits of adders.
- *
- * Revision 1.4  1999/12/17 06:18:15  steve
- *  Rewrite the cprop functor to use the functor_t interface.
- *
- * Revision 1.3  1999/12/17 03:38:46  steve
- *  NetConst can now hold wide constants.
- *
- * Revision 1.2  1998/12/02 04:37:13  steve
- *  Add the nobufz function to eliminate bufz objects,
- *  Object links are marked with direction,
- *  constant propagation is more careful will wide links,
- *  Signal folding is aware of attributes, and
- *  the XNF target can dump UDP objects based on LCA
- *  attributes.
- *
- * Revision 1.1  1998/11/13 06:23:17  steve
- *  Introduce netlist optimizations with the
- *  cprop function to do constant propogation.
- *
  */
 

cygwin.txt

@@ -1,6 +1,12 @@
 
 This file describes the build procedure under cygwin32 (Windows 95/98/NT/2K)
 ----------------------------------------------------------------------------
+
+Note: Icarus Verilog also compiles to native Windows binaries if you
+use the instructions in the mingw.txt file. Some people prefer cygwin
+binaries, and these instructions apply.
+
+
 To build using cygwin:
 
 Prerequisites:
@@ -8,7 +14,7 @@ Prerequisites:
  o Latest net release (1.1.4) of cygwin (sources.redhat.com/cygwin)
 
 Procedure:
- o Get the source code - see the main icarus verilog page for how to 
+ o Get the source code - see the main Icarus Verilog page for how to 
    do this
  o cd to the verilog directory
  o autoconf.sh

design_dump.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: design_dump.cc,v 1.135 2002/10/23 01:47:17 steve Exp $"
+#ident "$Id: design_dump.cc,v 1.144 2003/07/26 03:34:42 steve Exp $"
 #endif
 
 # include "config.h"
@@ -447,6 +447,8 @@ void NetAssign_::dump_lval(ostream&o) const
 	    if (bmux_) o << *bmux_;
 	      else     o << "**oops**";
 	    o << "]";
+      } else if (var_) {
+	    o << "<real " << var_->basename() << ">";
       } else {
 	    o << "";
       }
@@ -695,14 +697,18 @@ void NetScope::dump(ostream&o) const
       }
       o << endl;
 
+      for (unsigned idx = 0 ;  idx < attr_cnt() ;  idx += 1)
+	    o << "    (* " << attr_key(idx) << " = "
+	      << attr_value(idx) << " *)" << endl;
+
       o << "    timescale = 10e" << time_unit() << " / 10e"
 	<< time_precision() << endl;
 
 	/* Dump the parameters for this scope. */
       {
 	    map<string,param_expr_t>::const_iterator pp;
-	    for (pp = parameters_.begin()
-		       ; pp != parameters_.end() ;  pp ++) {
+	    for (pp = parameters.begin()
+		       ; pp != parameters.end() ;  pp ++) {
 		  o << "    parameter ";
 
 		  if ((*pp).second.signed_flag)
@@ -716,8 +722,8 @@ void NetScope::dump(ostream&o) const
 			*(*pp).second.expr << ";" << endl;
 	    }
 
-	    for (pp = localparams_.begin()
-		       ; pp != localparams_.end() ;  pp ++) {
+	    for (pp = localparams.begin()
+		       ; pp != localparams.end() ;  pp ++) {
 		  o << "    localparam " << (*pp).first << " = "  <<
 			*(*pp).second.expr << ";" << endl;
 	    }
@@ -733,6 +739,11 @@ void NetScope::dump(ostream&o) const
 	    }
       }
 
+      for (NetVariable*cur = vars_ ;  cur ;  cur = cur->snext_) {
+	    o << "    real " << cur->basename() << " // "
+	      << cur->get_line() << endl;
+      }
+
 	/* Dump the events in this scope. */
       for (NetEvent*cur = events_ ;  cur ;  cur = cur->snext_) {
 	    o << "    event " << cur->name() << "; nprobe="
@@ -764,6 +775,8 @@ void NetScope::dump(ostream&o) const
 	  case TASK:
 	    task_def()->dump(o, 4);
 	    break;
+	  default:
+	    break;
       }
 
 	/* Dump any sub-scopes. */
@@ -808,7 +821,7 @@ void NetProc::dump(ostream&o, unsigned ind) const
       o << setw(ind) << "" << "// " << typeid(*this).name() << endl;
 }
 
-/* Dump an expression that noone wrote a dump method for. */
+/* Dump an expression that no one wrote a dump method for. */
 void NetExpr::dump(ostream&o) const
 {
       o << "(?" << typeid(*this).name() << "?)";
@@ -856,6 +869,9 @@ void NetEBinary::dump(ostream&o) const
 	  case 'r':
 	    o << ">>";
 	    break;
+	  case 'R':
+	    o << ">>>";
+	    break;
 	  case 'X':
 	    o << "~^";
 	    break;
@@ -896,11 +912,54 @@ void NetEConst::dump(ostream&o) const
 	    o << value_;
 }
 
+void NetEConstParam::dump(ostream&o) const
+{
+      o << "<" << name_ << "=";
+      NetEConst::dump(o);
+      o << ">";
+}
+
+void NetECReal::dump(ostream&o) const
+{
+      o << value_;
+}
+
+void NetECRealParam::dump(ostream&o) const
+{
+      o << "<" << name_ << "=";
+      NetECReal::dump(o);
+      o << ">";
+}
+
+void NetEEvent::dump(ostream&o) const
+{
+      o << "<event=" << event_->name() << ">";
+}
+
 void NetEScope::dump(ostream&o) const
 {
       o << "<scope=" << scope_->name() << ">";
 }
 
+void NetESelect::dump(ostream&o) const
+{
+      o << "<select";
+      if (has_sign())
+	    o << "+=";
+      else
+	    o << "=";
+
+      expr_->dump(o);
+      o << "[";
+
+      if (base_)
+	    base_->dump(o);
+      else
+	    o << "(0)";
+
+      o << "+:" << expr_width() << "]>";
+}
+
 void NetESFunc::dump(ostream&o) const
 {
       o << name_ << "(";
@@ -975,6 +1034,11 @@ void NetEUnary::dump(ostream&o) const
       o << ")";
 }
 
+void NetEVariable::dump(ostream&o) const
+{
+      o << var_->basename();
+}
+
 void Design::dump(ostream&o) const
 {
       o << "DESIGN TIME PRECISION: 10e" << get_precision() << endl;
@@ -1004,6 +1068,37 @@ void Design::dump(ostream&o) const
 
 /*
  * $Log: design_dump.cc,v $
+ * Revision 1.144  2003/07/26 03:34:42  steve
+ *  Start handling pad of expressions in code generators.
+ *
+ * Revision 1.143  2003/07/05 20:42:08  steve
+ *  Fix some enumeration warnings.
+ *
+ * Revision 1.142  2003/06/20 00:53:19  steve
+ *  Module attributes from the parser
+ *  through to elaborated form.
+ *
+ * Revision 1.141  2003/06/18 03:55:18  steve
+ *  Add arithmetic shift operators.
+ *
+ * Revision 1.140  2003/05/30 02:55:32  steve
+ *  Support parameters in real expressions and
+ *  as real expressions, and fix multiply and
+ *  divide with real results.
+ *
+ * Revision 1.139  2003/04/22 04:48:29  steve
+ *  Support event names as expressions elements.
+ *
+ * Revision 1.138  2003/03/10 23:40:53  steve
+ *  Keep parameter constants for the ivl_target API.
+ *
+ * Revision 1.137  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.136  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
  * Revision 1.135  2002/10/23 01:47:17  steve
  *  Fix synth2 handling of aset/aclr signals where
  *  flip-flops are split by begin-end blocks.

dosify.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: dosify.c,v 1.3 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: dosify.c,v 1.5 2003/07/15 16:17:47 steve Exp $"
 #endif
 
 /*
@@ -69,6 +69,12 @@ int main(int argc, char*argv[])
 
 /*
  * $Log: dosify.c,v $
+ * Revision 1.5  2003/07/15 16:17:47  steve
+ *  Fix spelling of ifdef.
+ *
+ * Revision 1.4  2003/07/15 03:49:22  steve
+ *  Spelling fixes.
+ *
  * Revision 1.3  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

driver-vpi/.cvsignore

@@ -0,0 +1,2 @@
+Makefile
+iverilog-vpi.exe

driver-vpi/Makefile.in

@@ -0,0 +1,82 @@
+#
+#    This source code is free software; you can redistribute it
+#    and/or modify it in source code form under the terms of the GNU
+#    Library General Public License as published by the Free Software
+#    Foundation; either version 2 of the License, or (at your option)
+#    any later version.
+#
+#    This program is distributed in the hope that it will be useful,
+#    but WITHOUT ANY WARRANTY; without even the implied warranty of
+#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#    GNU Library General Public License for more details.
+#
+#    You should have received a copy of the GNU Library General Public
+#    License along with this program; if not, write to the Free
+#    Software Foundation, Inc.,
+#    59 Temple Place - Suite 330
+#    Boston, MA 02111-1307, USA
+#
+#ident "$Id: Makefile.in,v 1.5 2002/12/08 03:06:30 steve Exp $"
+#
+#
+SHELL = /bin/sh
+
+VERSION = 0.7
+
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+srcdir = @srcdir@
+
+VPATH = $(srcdir)
+
+bindir = $(exec_prefix)/bin
+libdir = $(exec_prefix)/lib
+includedir = $(prefix)/include
+mandir = @mandir@
+
+dllib=@DLLIB@
+
+CC = @CC@
+CXX = @CXX@
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
+
+CPPFLAGS = @CPPFLAGS@ @DEFS@
+CFLAGS = @CFLAGS@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"'
+CXXFLAGS = @CXXFLAGS@ -I. -I$(srcdir)/..
+LDFLAGS = @LDFLAGS@
+
+all: iverilog-vpi@EXEEXT@
+
+clean:
+	rm -f *.o
+	rm -f iverilog-vpi@EXEEXT@
+
+distclean: clean
+	rm -f Makefile
+
+O = main.o res.o
+
+iverilog-vpi@EXEEXT@: $O
+	$(CC) $(LDFLAGS) $O -o iverilog-vpi@EXEEXT@ @EXTRALIBS@
+
+
+main.o: main.c
+	$(CC) $(CFLAGS) -c $(srcdir)/main.c
+
+# Windows specific...
+res.o: res.rc
+	windres -i res.rc -o res.o
+#
+
+install: all installdirs $(bindir)/iverilog-vpi@EXEEXT@
+
+$(bindir)/iverilog-vpi@EXEEXT@: ./iverilog-vpi@EXEEXT@
+	$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi@EXEEXT@
+
+installdirs: ../mkinstalldirs
+	$(srcdir)/../mkinstalldirs $(bindir)
+
+uninstall:
+	rm -f $(bindir)/iverilog-vpi@EXEEXT@

driver-vpi/main.c

@@ -0,0 +1,565 @@
+/*
+ * Copyright (c) 2002 Gus Baldauf ([email protected])
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+/*
+ *	iverilog-vpi.c
+ *
+ *	this program provides the functionality of iverilog-vpi.sh under Win32
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+
+#include <windows.h>
+
+/* Macros used for compiling and linking */
+
+#define IVERILOG_VPI_CC        "gcc"				/* no .exe extension  */
+#define IVERILOG_VPI_CXX       "gcc"				/* no .exe extension  */
+#define IVERILOG_VPI_CFLAGS    "-O"					/* -I appended  later */
+#define IVERILOG_VPI_LD        "gcc"				/* no .exe extension  */
+#define IVERILOG_VPI_LDFLAGS   "-shared -Wl,--enable-auto-image-base"
+#define IVERILOG_VPI_LDLIBS    "-lveriuser -lvpi"	/* -L prepended later */
+
+/* pointers to global strings */
+
+static struct global_strings {
+	char *pCCSRC;		/* list of C source files */
+	char *pCXSRC;		/* list of C++ source files */
+	char *pOBJ;			/* list of object files */
+	char *pLIB;			/* list of library files */
+	char *pOUT;			/* output file name (.vpi extension), if 0 length then no source files specified */
+	char *pMINGW;		/* path to MinGW directory */
+	char *pIVL;			/* path to IVL directory */
+	char *pCFLAGS;		/* CFLAGS option */
+	char *pLDLIBS;		/* LDLIBS option */
+	char *pNewPath;		/* new PATH environment variable setting */
+} gstr;
+
+
+static void deInitDynString(char *str)
+{
+	free(str);
+}
+
+/* when finished, free allocated memory and return error code */
+
+static void myExit(int exitVal)
+{
+	deInitDynString(gstr.pCCSRC);
+	deInitDynString(gstr.pCXSRC);
+	deInitDynString(gstr.pOBJ);
+	deInitDynString(gstr.pLIB);
+	deInitDynString(gstr.pOUT);
+	deInitDynString(gstr.pMINGW);
+	deInitDynString(gstr.pIVL);
+	deInitDynString(gstr.pCFLAGS);
+	deInitDynString(gstr.pLDLIBS);
+	deInitDynString(gstr.pNewPath);
+
+	exit(exitVal);
+}
+
+/* display usage summary and exit */
+
+static void usage()
+{
+	fprintf(stderr,"usage: iverilog-vpi [--name=name] [-llibrary] [-mingw=dir] [-ivl=dir] sourcefile...\n");
+	fprintf(stderr,"   or  iverilog-vpi -mingw=dir\n");
+	fprintf(stderr,"   or  iverilog-vpi -ivl=dir\n");
+	myExit(1);
+}
+
+static void initDynString(char **str)
+{
+	*str = (char *) malloc(1);
+
+	if (!*str) {
+		fprintf(stderr,"error: out of memory\n");
+		myExit(4);
+	}
+
+	*str[0] = 0;
+}
+
+/* initialize dynamic memory buffers */
+
+static void init()
+{
+	initDynString(&gstr.pCCSRC);
+	initDynString(&gstr.pCXSRC);
+	initDynString(&gstr.pOBJ);
+	initDynString(&gstr.pLIB);
+	initDynString(&gstr.pOUT);
+	initDynString(&gstr.pMINGW);
+	initDynString(&gstr.pIVL);
+	initDynString(&gstr.pCFLAGS);
+	initDynString(&gstr.pLDLIBS);
+	initDynString(&gstr.pNewPath);
+}
+
+/* return true if "str" is terminated with with "end", case insensitive */
+
+static int endsIn (char *end, char *str)
+{
+	char *ext;
+
+	if (strlen(end) >= strlen(str))
+		return 0;
+
+	ext = str + (strlen(str) - strlen(end));
+
+	return stricmp(end,ext) ? 0 : 1;
+}
+
+/* return true if "str" begins with "prefix", case insensitive */
+
+static int startsWith (char *prefix, char *str)
+{
+	if (strlen(prefix) >= strlen(str))
+		return 0;
+
+	return strnicmp(prefix,str,strlen(prefix)) ? 0 : 1;
+}
+
+/* append "app" to "ptr", allocating memory as needed    */
+/*   if count is zero, then copy all characters of "app" */
+
+static void appendn (char **ptr, char *app, int count)
+{
+	*ptr = (char *) realloc(*ptr,strlen(*ptr)+(count?count:strlen(app))+1);
+
+	if (*ptr == NULL) {
+		fprintf(stderr,"error: out of memory\n");
+		myExit(4);
+	}
+
+	if (count)
+		strncat(*ptr,app,count);
+	else
+		strcat(*ptr,app);
+}
+
+/* append "app" to "ptr", allocating memory as needed    */
+
+static void append (char **ptr, char *app)
+{
+	appendn(ptr,app,0);
+}
+
+/* if the string does not end with a backslash, add one */
+
+static void appendBackSlash(char **str)
+{
+	if ((*str)[strlen(*str)-1] != '\\')
+		append(str,"\\");
+}
+
+/* copy count characters of "str" to "ptr", allocating memory as needed */
+/*   if count is zero, then copy all characters of "str"                */
+
+static void assignn (char **ptr, char *str, int count)
+{
+	*ptr = (char *) realloc(*ptr,(count?count:strlen(str))+1);
+
+	if (*ptr == NULL) {
+		fprintf(stderr,"error: out of memory\n");
+		myExit(4);
+	}
+
+	if (count) {
+		strncpy(*ptr,str,count);
+		(*ptr)[count] = 0;
+	}
+	else
+		strcpy(*ptr,str);
+}
+
+/* copy count characters of "str" to "ptr", allocating memory as needed */
+
+static void assign (char **ptr, char *str)
+{
+	assignn(ptr,str,0);
+}
+
+/* get a copy of a Icarus Verilog registry string key */
+
+static int GetRegistryKey(char *key, char **value)
+{
+	long lrv;
+	HKEY hkKey;
+	char *regKeyBuffer;
+	DWORD regKeyType, regKeySize;
+
+	lrv = RegOpenKeyEx(HKEY_LOCAL_MACHINE,"Software\\Icarus Verilog",0,KEY_QUERY_VALUE,&hkKey);
+	if (lrv != ERROR_SUCCESS)
+		return 0;
+
+	lrv = RegQueryValueEx(hkKey,key,NULL,&regKeyType,NULL,&regKeySize);
+	if ((lrv != ERROR_SUCCESS) || (regKeyType != REG_SZ) || (!regKeySize)) {
+		lrv = RegCloseKey(hkKey);
+		return 0;
+	}
+
+	regKeyBuffer = (char *) malloc(regKeySize+1);
+	if (!regKeyBuffer) {
+		lrv = RegCloseKey(hkKey);
+		fprintf(stderr,"error: out of memory\n");
+		myExit(4);
+	}
+	regKeyBuffer[regKeySize] = 0;		/* makes sure there is a trailing NULL */
+
+	lrv = RegQueryValueEx(hkKey,key,NULL,&regKeyType,regKeyBuffer,&regKeySize);
+	if ((lrv != ERROR_SUCCESS) || (regKeyType != REG_SZ) || (!regKeySize)) {
+		lrv = RegCloseKey(hkKey);
+		free(regKeyBuffer);
+		return 0;
+	}
+
+	RegCloseKey(hkKey);
+
+	assign(value,regKeyBuffer);
+	free(regKeyBuffer);
+
+	return 1;
+}
+
+/* store a copy of a Icarus Verilog registry string key */
+
+static void SetRegistryKey(char *key, char *value)
+{
+	HKEY hkKey;
+	DWORD res;
+
+	if (RegCreateKeyEx(
+		HKEY_LOCAL_MACHINE,
+		"Software\\Icarus Verilog",
+		0,
+		"",
+		REG_OPTION_NON_VOLATILE,
+		KEY_ALL_ACCESS,NULL,
+		&hkKey,
+		&res) != ERROR_SUCCESS)
+			return;
+
+	RegSetValueEx(hkKey,key,0,REG_SZ,value,strlen(value)+1);
+	RegCloseKey(hkKey);
+
+	printf("info:  storing %s in Windows' registry entry\n",value);
+	printf("       HKEY_LOCAL_MACHINE\\Software\\Icarus Verilog\\%s\n",key);
+}
+
+/* parse the command line, assign results to global variable strings */
+
+static int parse(int argc, char *argv[])
+{
+	int idx, srcFileCnt=0;
+
+	char dot_c_ext[]    = ".c";
+	char dot_cc_ext[]   = ".cc";
+	char dot_o_ext[]    = ".o";
+	char name_option[]  = "--name=";
+	char lib_option[]   = "-l";
+	char mingw_option[] = "-mingw=";
+	char ivl_option[]   = "-ivl=";
+
+	if (argc == 1)
+		return 0;
+
+	for (idx=1; idx<argc; ++idx) {
+		if (endsIn(dot_c_ext,argv[idx])) {				/* check for C source files */
+			++srcFileCnt;
+			append(&gstr.pCCSRC,argv[idx]);
+			append(&gstr.pCCSRC," ");
+			if (!*gstr.pOUT)
+			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_c_ext));
+		}
+		else if (endsIn(dot_cc_ext,argv[idx])) {		/* check for C++ source files */
+			++srcFileCnt;
+			append(&gstr.pCXSRC,argv[idx]);
+			append(&gstr.pCXSRC," ");
+			if (!*gstr.pOUT)
+			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_cc_ext));
+		}
+		else if (endsIn(dot_o_ext,argv[idx])) {			/* check for compiled object files */
+			++srcFileCnt;
+			append(&gstr.pOBJ,argv[idx]);
+			append(&gstr.pOBJ," ");
+			if (!*gstr.pOUT)
+			   assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_o_ext));
+		}
+		else if (startsWith(name_option,argv[idx])) {	/* check for --name option */
+			assignn(&gstr.pOUT,argv[idx]+sizeof(name_option)-1,strlen(argv[idx])-(sizeof(name_option)-1));
+		}
+		else if (startsWith(lib_option,argv[idx])) {	/* check for -l option */
+			append(&gstr.pLIB,argv[idx]);
+			append(&gstr.pLIB," ");
+		}
+		else if (startsWith(mingw_option,argv[idx]))	/* check for -mingw option */
+			assignn(&gstr.pMINGW,argv[idx]+sizeof(mingw_option)-1,strlen(argv[idx])-(sizeof(mingw_option)-1));
+		else if (startsWith(ivl_option,argv[idx]))		/* check for -ivl   option */
+			assignn(&gstr.pIVL,argv[idx]+sizeof(ivl_option)-1,strlen(argv[idx])-(sizeof(ivl_option)-1));
+		else
+			return 0;	/* different from iverilog-vpi.sh, we don't ignore accept arguments */
+	}
+
+	if (0 == srcFileCnt)
+		assign(&gstr.pOUT,"");				/* in case they used --name with no source files */
+
+	if (!*gstr.pOUT) {						/* normally it's an error if there are no *.c,*.cc,*.o files */
+		if (!*gstr.pMINGW && !*gstr.pIVL)	/* unless they are just setting the IVL or MinGW registry entries */
+			usage();
+	}
+	else {
+		append(&gstr.pOUT,".vpi");			/* the result file should have a .vpi extension */
+		append(&gstr.pOUT," ");
+	}
+
+	return 1;
+}
+
+/* do minimal check that the MinGW root directory looks valid */
+
+static void checkMingwDir(char *root)
+{
+	int irv;
+	struct _stat stat_buf;
+
+	char *path;
+	initDynString(&path);
+	assign(&path,gstr.pMINGW);
+	appendBackSlash(&path);
+	append(&path,"bin\\" IVERILOG_VPI_CC ".exe");
+
+	irv = _stat(path,&stat_buf);
+	deInitDynString(path);
+
+	if (irv) {
+		fprintf(stderr,"error: %s does not appear to be the valid root directory\n",root);
+		fprintf(stderr,"       of MinGW.  Use the -mingw option of iverilog-vpi.exe to\n");
+		fprintf(stderr,"       point to the MinGW root directory.  For a Windows command\n");
+		fprintf(stderr,"       shell the option would be something like -mingw=c:\\mingw\n");
+		fprintf(stderr,"       For a Cygwin shell the option would be something like\n");
+		fprintf(stderr,"       -mingw=c:\\\\mingw\n");
+		myExit(5);
+	}
+}
+
+/* do minimal check that the Icarus Verilog root directory looks valid */
+
+static void checkIvlDir(char *root)
+{
+	int irv;
+	struct _stat stat_buf;
+
+	char *path;
+	initDynString(&path);
+	assign(&path,gstr.pIVL);
+	appendBackSlash(&path);
+	append(&path,"bin\\vvp.exe");
+
+	irv = _stat(path,&stat_buf);
+	deInitDynString(path);
+
+	if (irv) {
+		fprintf(stderr,"error: %s does not appear to be the valid root directory of\n",root);
+		fprintf(stderr,"       Icarus Verilog.  Use the -ivl option of iverilog-vpi.exe to\n");
+		fprintf(stderr,"       point to the Icarus Verilog root directory.  For a Windows\n");
+		fprintf(stderr,"       command shell the option would be something like -ivl=c:\\iverilog\n");
+		fprintf(stderr,"       For a Cygwin shell the option would be something like\n");
+		fprintf(stderr,"       -ivl=c:\\\\iverilog\n");
+		myExit(6);
+	}
+}
+
+/* see if we can find mingw root */
+
+#define IVL_REGKEY_MINGW "MingwDir"
+
+static void setup_mingw_environment()
+{
+	char *pOldPATH = getenv("PATH");		/* get current path */
+	
+	if (*gstr.pMINGW) {
+		checkMingwDir(gstr.pMINGW);
+		SetRegistryKey(IVL_REGKEY_MINGW,gstr.pMINGW);
+	}
+	else
+		if (!GetRegistryKey(IVL_REGKEY_MINGW,&gstr.pMINGW)) {
+			fprintf(stderr,"error: can not locate the MinGW root directory, use the -mingw option of\n");
+			fprintf(stderr,"       iverilog-vpi.exe to point to the MinGW root directory.  For\n");
+			fprintf(stderr,"       a Windows command shell the option would be something like\n");
+			fprintf(stderr,"       -mingw=c:\\mingw  For a Cygwin shell the option would be\n");
+			fprintf(stderr,"       something like -mingw=c:\\\\mingw\n");
+			myExit(5);
+		}
+
+	assign(&gstr.pNewPath,"PATH=");			/* create new path */
+	append(&gstr.pNewPath,gstr.pMINGW);
+	appendBackSlash(&gstr.pNewPath);
+	append(&gstr.pNewPath,"bin;");
+	append(&gstr.pNewPath,pOldPATH);
+
+	_putenv(gstr.pNewPath);					/* place new path in environment variable */
+}
+
+/* see if we can find iverilog root */
+
+#define IVL_REGKEY_IVL   "InstallDir"
+
+static void setup_ivl_environment()
+{
+	if (*gstr.pIVL) {
+		checkIvlDir(gstr.pIVL);
+		SetRegistryKey(IVL_REGKEY_IVL,gstr.pIVL);
+	}
+	else
+		if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) {
+			fprintf(stderr,"error: can not locate the Icarus Verilog root directory, use the -ivl option\n");
+			fprintf(stderr,"       of iverilog-vpi.exe to point to the Icarus Verilog root directory.\n");
+			fprintf(stderr,"       For a Windows command shell the option would be something like\n");
+			fprintf(stderr,"       -ivl=c:\\iverilog  For a Cygwin shell the option would be something\n");
+			fprintf(stderr,"       like -ivl=c:\\\\iverilog\n");
+			myExit(6);
+		}
+
+	/* build up the CFLAGS option string */
+
+	assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS);
+	append(&gstr.pCFLAGS," -I");
+	append(&gstr.pCFLAGS,gstr.pIVL);
+	appendBackSlash(&gstr.pCFLAGS);
+	append(&gstr.pCFLAGS,"include");
+
+	/* build up the LDFLAGS option string */
+
+	assign(&gstr.pLDLIBS,"-L");
+	append(&gstr.pLDLIBS,gstr.pIVL);
+	appendBackSlash(&gstr.pLDLIBS);
+	append(&gstr.pLDLIBS,"lib ");
+	append(&gstr.pLDLIBS,IVERILOG_VPI_LDLIBS);
+}
+
+/* compile source modules */
+
+static void compile(char *pSource, char **pObject, char *ext, int *compile_errors, char *compiler)
+{
+	char *ptr1 = pSource;
+	char *ptr2 = strchr(pSource,' ');
+	char *buf=0,*src=0,*obj=0;
+
+	while (ptr2) {
+		int len = ptr2 - ptr1;
+		assignn(&src,ptr1,len);
+
+		assignn(&obj,ptr1,len-strlen(ext));		/* strip off the extension */
+		append (&obj,".o");
+
+		assign (&buf,compiler);
+		append (&buf," -c -o ");
+		append (&buf,obj);
+		append (&buf," ");
+		append (&buf,gstr.pCFLAGS);
+		append (&buf," ");
+		append (&buf,src);
+
+		append (pObject,obj);
+		append (pObject," ");
+
+		printf("%s\n",buf);
+
+		if (system(buf))
+			++*compile_errors;
+
+		ptr1 = ptr2 + 1;					/* advance to next token */
+		ptr2 = strchr(ptr1,' ');
+	}
+
+	free(buf);
+	free(src);
+	free(obj);
+}
+
+/* using the global strings, compile and link */
+
+static void compile_and_link()
+{
+	char *buf=0;
+	int iRet, compile_errors = 0;
+
+	/* print out the mingw and ivl directories to help the user debug problems */
+
+	printf("info:  %s will be used as the MinGW root directory.\n",gstr.pMINGW);
+	checkMingwDir(gstr.pMINGW);
+
+	printf("info:  %s will be used as the Icarus Verilog root directory.\n",gstr.pIVL);
+	checkIvlDir(gstr.pIVL);
+
+	/* compile */
+
+	compile(gstr.pCCSRC,&gstr.pOBJ,".c" ,&compile_errors,IVERILOG_VPI_CC );		/* compile the C   source files */
+	compile(gstr.pCXSRC,&gstr.pOBJ,".cc",&compile_errors,IVERILOG_VPI_CXX);		/* compile the C++ source files */
+
+	if (compile_errors) {
+		fprintf(stderr,"iverilog-vpi: Some %d files failed to compile.\n",compile_errors);
+		myExit(2);
+	}
+
+	/* link */
+
+	assign(&buf,IVERILOG_VPI_LD);
+	append(&buf," -o ");
+	append(&buf,gstr.pOUT);				/* has a trailing space */
+	append(&buf,IVERILOG_VPI_LDFLAGS);
+	append(&buf," ");
+	append(&buf,gstr.pOBJ)				/* has a trailing space */;
+	append(&buf,gstr.pLIB);				/* has a trailing space */
+	append(&buf,gstr.pLDLIBS);
+
+	printf("%s\n",buf);
+
+	iRet = system(buf);
+
+	free(buf);
+
+	if (iRet)
+		myExit(3);
+}
+
+/* program execution starts here */
+
+int main(int argc, char *argv[])
+{
+	init();
+
+	if (!parse(argc,argv))
+		usage();
+
+	setup_mingw_environment();
+	setup_ivl_environment();
+
+	if (*gstr.pOUT)				/* are there any *.c,*.cc,*.o files specified */
+		compile_and_link();
+
+	myExit(0);
+}

driver-vpi/res.rc

@@ -0,0 +1,38 @@
+
+// LANGUAGE ENGLISH
+LANGUAGE 9, 4
+
+
+/////////////////////////////////////////////////////////////////////////////
+//
+// Version
+//
+
+1 VERSIONINFO
+ FILEVERSION 2002,11,13,0
+ PRODUCTVERSION 0,7,0,0
+ FILEFLAGSMASK 0x3fL
+ FILEFLAGS 0x2L
+ FILEOS 0x40004L
+ FILETYPE 0x2L
+ FILESUBTYPE 0x0L
+BEGIN
+    BLOCK "StringFileInfo"
+    BEGIN
+        BLOCK "040904b0"
+        BEGIN
+            VALUE "CompanyName", "Icarus Verilog\0"
+            VALUE "FileDescription", "Icarus Verilog VPI Tool\0"
+            VALUE "FileVersion", "2002, 11, 13, 0\0"
+            VALUE "InternalName", "iverilog-vpi\0"
+            VALUE "LegalCopyright", "Copyright 2002 Gus Baldauf\0"
+            VALUE "OriginalFilename", "iverilog-vpi.exe\0"
+            VALUE "ProductName", "Icarus Verilog\0"
+            VALUE "ProductVersion", "0, 7, 0, 0\0"
+        END
+    END
+    BLOCK "VarFileInfo"
+    BEGIN
+        VALUE "Translation", 0x409, 1200
+    END
+END

driver/Makefile.in

@@ -3,9 +3,7 @@
 #    and/or modify it in source code form under the terms of the GNU
 #    Library General Public License as published by the Free Software
 #    Foundation; either version 2 of the License, or (at your option)
-#    any later version. In order to redistribute the software in
-#    binary form, you will need a Picture Elements Binary Software
-#    License.
+#    any later version.
 #
 #    This program is distributed in the hope that it will be useful,
 #    but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -18,12 +16,12 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.15 2002/08/10 22:36:59 steve Exp $"
+#ident "$Id: Makefile.in,v 1.18 2003/08/10 00:39:13 steve Exp $"
 #
 #
 SHELL = /bin/sh
 
-VERSION = 0.6
+VERSION = 0.7
 
 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -54,6 +52,10 @@ all: iverilog@EXEEXT@
 clean:
 	rm -f *.o lexor.c parse.c parse.h parse.output
 	rm -f cflexor.c cfparse.c cfparse.h cfparse.output
+	rm -f iverilog@EXEEXT@
+
+distclean: clean
+	rm -f Makefile
 
 O = main.o build_string.o lexor.o parse.o substit.o cflexor.o cfparse.o
 
@@ -89,8 +91,8 @@ iverilog.pdf: iverilog.ps
 	ps2pdf iverilog.ps iverilog.pdf
 
 ifeq (@WIN32@,yes)
-INSTALL_DOC = $(prefix)/iverilog.pdf
-INSTALL_DOCDIR =
+INSTALL_DOC = $(prefix)/iverilog.pdf $(mandir)/man1/iverilog.1
+INSTALL_DOCDIR = $(mandir)/man1
 all: iverilog.pdf
 else
 INSTALL_DOC = $(mandir)/man1/iverilog.1

driver/iverilog.man

@@ -1,4 +1,4 @@
-.TH iverilog 1 "$Date: 2002/06/23 20:10:51 $" Version "$Date: 2002/06/23 20:10:51 $"
+.TH iverilog 1 "$Date: 2003/08/09 04:31:44 $" Version "$Date: 2003/08/09 04:31:44 $"
 .SH NAME
 iverilog - Icarus Verilog compiler
 
@@ -175,14 +175,15 @@ but must be run by the \fBvvp\fP command.
 .TP 8
 .B xnf
 This is the Xilinx Netlist Format used by many tools for placing
-devices in FPGAs or other programmable devices. The Icarus Verilog XNF
-code generator can generate complete designs or XNF macros that can be
-imported into larger designs by other tools. (This target is obsolete,
-use the \fBfpga\fP target instead.)
+devices in FPGAs or other programmable devices. This target is
+obsolete, use the \fBfpga\fP target instead.
 .TP 8
 .B fpga
 This is a synthesis target that supports a variety of fpga devices,
-mostly by EDIF format output.
+mostly by EDIF format output. The Icarus Verilog fpga code generator
+can generate complete designs or EDIF macros that can in turn be
+imported into larger designs by other tools. The \fBfpga\fP target
+implies the synthesis \fB-S\fP flag.
 
 .SH "WARNING TYPES"
 These are the types of warnings that can be selected by the \fB-W\fP
@@ -200,6 +201,12 @@ This enables warnings for creation of implicit declarations. For
 example, if a scalar wire X is used but not declared in the Verilog
 source, this will print a warning at its first use.
 
+.TP 8
+.B portbind
+This enables warnings for ports of module instantiations that are not
+connected but probably should be. Dangling input ports, for example,
+will generate a warning.
+
 .TP 8
 .B timescale
 This enables warnings for inconsistent use of the timescale

driver/main.c

@@ -16,7 +16,7 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
-#ident "$Id: main.c,v 1.47 2002/08/12 01:27:48 steve Exp $"
+#ident "$Id: main.c,v 1.52 2003/02/22 04:55:36 steve Exp $"
 
 # include "config.h"
 
@@ -44,8 +44,10 @@ const char HELP[] =
 
 #ifdef __MINGW32__
 #include <windows.h>
+#ifdef HAVE_LIBIBERTY_H
 #include <libiberty.h>
 #endif
+#endif
 
 #if HAVE_GETOPT_H
 #include <getopt.h>
@@ -119,6 +121,35 @@ char tmp[MAXSIZE];
 
 static char ivl_root[MAXSIZE];
 
+#ifdef __MINGW32__
+# include  <io.h>
+# include  <fcntl.h>
+static FILE*fopen_safe(const char*path)
+{
+      FILE*file = 0;
+      int fd;
+
+      fd = _open(path, _O_WRONLY|_O_CREAT|_O_EXCL, 0700);
+      if (fd != -1)
+	    file = _fdopen(fd, "w");
+
+       return file;
+}
+#else
+# include  <fcntl.h>
+static FILE*fopen_safe(const char*path)
+{
+      FILE*file = 0;
+      int fd;
+
+      fd = open(path, O_WRONLY|O_CREAT|O_EXCL, 0700);
+      if (fd != -1)
+	    file = fdopen(fd, "w");
+
+       return file;
+}
+#endif
+
 static const char*my_tempfile(const char*str, FILE**fout)
 {
       FILE*file;
@@ -148,7 +179,7 @@ static const char*my_tempfile(const char*str, FILE**fout)
       while ((retry > 0) && (file == NULL)) {
 	    unsigned code = rand();
 	    sprintf(pathbuf, "%s%c%s%04x", tmpdir, sep, str, code);
-	    file = fopen(pathbuf, "w");
+	    file = fopen_safe(pathbuf);
 	    retry -= 1;
       }
 
@@ -220,11 +251,14 @@ static void process_warning_switch(const char*name)
 	    strcpy(warning_flags, "-W");
 
       if (strcmp(name,"all") == 0) {
-	    strcat(warning_flags, "it");
+	    strcat(warning_flags, "ipt");
 
       } else if (strcmp(name,"implicit") == 0) {
 	    if (! strchr(warning_flags+2, 'i'))
 		  strcat(warning_flags, "i");
+      } else if (strcmp(name,"portbind") == 0) {
+	    if (! strchr(warning_flags+2, 'p'))
+		  strcat(warning_flags, "p");
       } else if (strcmp(name,"timescale") == 0) {
 	    if (! strchr(warning_flags+2, 't'))
 		  strcat(warning_flags, "t");
@@ -234,6 +268,12 @@ static void process_warning_switch(const char*name)
 		  cp[0] = cp[1];
 		  cp += 1;
 	    }
+      } else if (strcmp(name,"no-portbind") == 0) {
+	    char*cp = strchr(warning_flags+2, 'p');
+	    if (cp) while (*cp) {
+		  cp[0] = cp[1];
+		  cp += 1;
+	    }
       } else if (strcmp(name,"no-timescale") == 0) {
 	    char*cp = strchr(warning_flags+2, 't');
 	    if (cp) while (*cp) {
@@ -657,6 +697,21 @@ int main(int argc, char **argv)
 
 /*
  * $Log: main.c,v $
+ * Revision 1.52  2003/02/22 04:55:36  steve
+ *  portbind adds p, not i, flag.
+ *
+ * Revision 1.51  2003/02/22 04:12:49  steve
+ *  Add the portbind warning.
+ *
+ * Revision 1.50  2003/01/10 19:01:04  steve
+ *  Only use libiberty.h if available.
+ *
+ * Revision 1.49  2002/12/04 03:26:59  steve
+ *  Mingw32 compatible temp file management.
+ *
+ * Revision 1.48  2002/12/04 02:29:36  steve
+ *  Use O_EXCL when opening temp files.
+ *
  * Revision 1.47  2002/08/12 01:27:48  steve
  *  Escape the backslash in the windows file name.
  *

dup_expr.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2002 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: dup_expr.cc,v 1.8 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: dup_expr.cc,v 1.15 2003/05/30 02:55:32 steve Exp $"
 #endif
 
 # include "config.h"
@@ -25,6 +25,40 @@
 # include  "netlist.h"
 # include  <cassert>
 
+NetEBComp* NetEBComp::dup_expr() const
+{
+      NetEBComp*result = new NetEBComp(op_, left_->dup_expr(),
+				       right_->dup_expr());
+      return result;
+}
+
+NetEConst* NetEConst::dup_expr() const
+{
+      NetEConst*tmp = new NetEConst(value_);
+      tmp->set_line(*this);
+      return tmp;
+}
+
+NetEConstParam* NetEConstParam::dup_expr() const
+{
+      NetEConstParam*tmp = new NetEConstParam(scope_, name_, value());
+      tmp->set_line(*this);
+      return tmp;
+}
+
+NetECRealParam* NetECRealParam::dup_expr() const
+{
+      NetECRealParam*tmp = new NetECRealParam(scope_, name_, value());
+      tmp->set_line(*this);
+      return tmp;
+}
+
+NetEEvent* NetEEvent::dup_expr() const
+{
+      assert(0);
+      return 0;
+}
+
 NetEScope* NetEScope::dup_expr() const
 {
       assert(0);
@@ -39,7 +73,7 @@ NetESelect* NetESelect::dup_expr() const
 
 NetESFunc* NetESFunc::dup_expr() const
 {
-      NetESFunc*tmp = new NetESFunc(name_, expr_width(), nparms());
+      NetESFunc*tmp = new NetESFunc(name_, type_, expr_width(), nparms());
       assert(tmp);
       for (unsigned idx = 0 ;  idx < nparms() ;  idx += 1) {
 	    assert(tmp->parm(idx));
@@ -65,6 +99,21 @@ NetETernary* NetETernary::dup_expr() const
       return tmp;
 }
 
+NetEUFunc* NetEUFunc::dup_expr() const
+{
+      NetEUFunc*tmp;
+      svector<NetExpr*> tmp_parms (parms_.count());
+
+      for (unsigned idx = 0 ;  idx < tmp_parms.count() ;  idx += 1) {
+	    assert(parms_[idx]);
+	    tmp_parms[idx] = parms_[idx]->dup_expr();
+      }
+
+      tmp = new NetEUFunc(func_, result_->dup_expr(), tmp_parms);
+
+      return tmp;
+}
+
 NetEUnary* NetEUnary::dup_expr() const
 {
       NetEUnary*tmp = new NetEUnary(op_, expr_->dup_expr());
@@ -72,8 +121,38 @@ NetEUnary* NetEUnary::dup_expr() const
       return tmp;
 }
 
+NetEVariable* NetEVariable::dup_expr() const
+{
+      NetEVariable*tmp = new NetEVariable(var_);
+      return tmp;
+}
+
 /*
  * $Log: dup_expr.cc,v $
+ * Revision 1.15  2003/05/30 02:55:32  steve
+ *  Support parameters in real expressions and
+ *  as real expressions, and fix multiply and
+ *  divide with real results.
+ *
+ * Revision 1.14  2003/04/22 04:48:29  steve
+ *  Support event names as expressions elements.
+ *
+ * Revision 1.13  2003/03/15 18:08:43  steve
+ *  Comparison operators do have defined width.
+ *
+ * Revision 1.12  2003/03/15 04:46:28  steve
+ *  Better organize the NetESFunc return type guesses.
+ *
+ * Revision 1.11  2003/03/10 23:40:53  steve
+ *  Keep parameter constants for the ivl_target API.
+ *
+ * Revision 1.10  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
+ * Revision 1.9  2002/11/09 00:25:27  steve
+ *  Add dup_expr for user defined function calls.
+ *
  * Revision 1.8  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *
@@ -97,12 +176,5 @@ NetEUnary* NetEUnary::dup_expr() const
  * Revision 1.3  2000/05/04 03:37:58  steve
  *  Add infrastructure for system functions, move
  *  $time to that structure and add $random.
- *
- * Revision 1.2  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.1  1999/11/27 19:07:57  steve
- *  Support the creation of scopes.
- *
  */
 

elab_anet.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_anet.cc,v 1.5 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: elab_anet.cc,v 1.8 2003/06/21 01:21:43 steve Exp $"
 #endif
 
 # include "config.h"
@@ -34,7 +34,7 @@
 NetNet* PExpr::elaborate_anet(Design*des, NetScope*scope) const
 {
       cerr << get_line() << ": error: Invalid expression on left side "
-	   << "of precedural continuous asignment." << endl;
+	   << "of procedural continuous assignment." << endl;
       return 0;
 }
 
@@ -86,7 +86,7 @@ NetNet* PEConcat::elaborate_anet(Design*des, NetScope*scope) const
 	   Allow for a repeat count other then 1 by repeating the
 	   connect loop as many times as necessary. */
 
-      NetNet*osig = new NetNet(scope, des->local_symbol(scope->name()),
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
 			       NetNet::IMPLICIT_REG, pins);
 
       pins = 0;
@@ -107,10 +107,10 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
       NetNet*sig = des->find_signal(scope, path_);
 
       if (sig == 0) {
-	    if (NetMemory*mem = des->find_memory(scope, path_)) {
+	    if (des->find_memory(scope, path_)) {
 		  cerr << get_line() << ": error: memories not allowed "
 		       << "on left side of procedural continuous "
-		       << "asignment." << endl;
+		       << "assignment." << endl;
 		  des->errors += 1;
 		  return 0;
 	    }
@@ -138,7 +138,7 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
       if (msb_ || lsb_) {
 
 	    cerr << get_line() << ": error: bit/part selects not allowed "
-		 << "on left side of procedural continuous asignment."
+		 << "on left side of procedural continuous assignment."
 		 << endl; 
 	    des->errors += 1;
 	    return 0;
@@ -149,6 +149,15 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_anet.cc,v $
+ * Revision 1.8  2003/06/21 01:21:43  steve
+ *  Harmless fixup of warnings.
+ *
+ * Revision 1.7  2003/03/06 00:28:41  steve
+ *  All NetObj objects have lex_string base names.
+ *
+ * Revision 1.6  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
  * Revision 1.5  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

elab_expr.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2000 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2003 Stephen Williams ([email protected])
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,17 +17,41 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_expr.cc,v 1.66 2002/09/21 21:28:18 steve Exp $"
+#ident "$Id: elab_expr.cc,v 1.80 2003/06/24 01:38:02 steve Exp $"
 #endif
 
 # include "config.h"
-
+# include "compiler.h"
 
 # include  "pform.h"
 # include  "netlist.h"
 # include  "netmisc.h"
 # include  "util.h"
 
+/*
+ * This table describes all the return values of various system
+ * functions. This table is used to elaborate expressions that are
+ * system function calls.
+ */
+struct sfunc_return_type {
+      const char*   name;
+      NetExpr::TYPE type;
+      unsigned      wid;
+      int           signed_flag;
+};
+
+static const struct sfunc_return_type sfunc_table[] = {
+      { "$realtime",   NetExpr::ET_REAL,    0, 0 },
+      { "$bitstoreal", NetExpr::ET_REAL,    0, 0 },
+      { "$itor",       NetExpr::ET_REAL,    0, 0 },
+      { "$realtobits", NetExpr::ET_VECTOR, 64, 0 },
+      { "$time",       NetExpr::ET_VECTOR, 64, 0 },
+      { "$stime",      NetExpr::ET_VECTOR, 32, 0 },
+      { "$simtime",    NetExpr::ET_VECTOR, 64, 0 },
+      { 0,             NetExpr::ET_VECTOR, 32, 0 }
+};
+
+
 NetExpr* PExpr::elaborate_expr(Design*des, NetScope*, bool) const
 {
       cerr << get_line() << ": internal error: I do not know how to elaborate"
@@ -111,8 +135,9 @@ NetEBinary* PEBinary::elaborate_expr_base_(Design*des,
 	    tmp->set_line(*this);
 	    break;
 
-	  case 'l':
-	  case 'r':
+	  case 'l': // <<
+	  case 'r': // >>
+	  case 'R': // >>>
 	    tmp = new NetEBShift(op_, lp, rp);
 	    tmp->set_line(*this);
 	    break;
@@ -137,6 +162,15 @@ NetEBinary* PEBinary::elaborate_expr_base_(Design*des,
 	  case 'E': /* === */
 	  case 'n': /* != */
 	  case 'N': /* !== */
+	    if (dynamic_cast<NetEConst*>(rp)
+		&& (lp->expr_width() > rp->expr_width()))
+		  rp->set_width(lp->expr_width());
+
+	    if (dynamic_cast<NetEConst*>(lp)
+		&& (lp->expr_width() < rp->expr_width()))
+		  lp->set_width(rp->expr_width());
+
+	      /* from here, handle this like other compares. */
 	  case 'L': /* <= */
 	  case 'G': /* >= */
 	  case '<':
@@ -211,12 +245,15 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
 	    return sub;
       }
 
-      unsigned wid = 32;
+	/* Get the return type of the system function by looking it up
+	   in the sfunc_table. */
+      unsigned sfunc_idx;
+      for (sfunc_idx = 0 ;  sfunc_table[sfunc_idx].name ;  sfunc_idx += 1)
+	    if (strcmp(path_.peek_name(0), sfunc_table[sfunc_idx].name) == 0)
+		  break;
 
-      if (strcmp(path_.peek_name(0), "$time") == 0)
-	    wid = 64;
-      if (strcmp(path_.peek_name(0), "$stime") == 0)
-	    wid = 32;
+      NetExpr::TYPE sfunc_type = sfunc_table[sfunc_idx].type;
+      unsigned wid = sfunc_table[sfunc_idx].wid;
 
 
 	/* How many parameters are there? The Verilog language allows
@@ -225,13 +262,14 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
 	   be interpreted as a single empty parameter.
 
 	   Functions cannot really take empty parameters, but the
-	   case ``func()'' is the same as no parmaters at all. So
+	   case ``func()'' is the same as no parameters at all. So
 	   catch that special case here. */
       unsigned nparms = parms_.count();
       if ((nparms == 1) && (parms_[0] == 0))
 	    nparms = 0;
 
-      NetESFunc*fun = new NetESFunc(path_.peek_name(0), wid, nparms);
+      NetESFunc*fun = new NetESFunc(path_.peek_name(0), sfunc_type,
+				    wid, nparms);
 
 	/* Now run through the expected parameters. If we find that
 	   there are missing parameters, print an error message.
@@ -404,8 +442,9 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope, bool) const
 
 NetExpr* PEFNumber::elaborate_expr(Design*des, NetScope*scope, bool) const
 {
-      long val = value_->as_long();
-      return new NetEConst(verinum(val));
+      NetECReal*tmp = new NetECReal(*value_);
+      tmp->set_line(*this);
+      return tmp;
 }
 
 /*
@@ -423,15 +462,15 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 				 bool sys_task_arg) const
 {
       assert(scope);
+      NetScope*found_in;
 
 	// If the identifier name is a parameter name, then return
 	// a reference to the parameter expression.
-      if (const NetExpr*ex = des->find_parameter(scope, path_)) {
+      if (const NetExpr*ex = des->find_parameter(scope, path_, found_in)) {
 	    NetExpr*tmp;
-	    if (dynamic_cast<const NetExpr*>(ex))
-		  tmp = ex->dup_expr();
-	    else
-		  tmp = new NetEParam(des, scope, path_);
+
+	    assert(ex);
+	    tmp = ex->dup_expr();
 
 	    if (msb_ && lsb_) {
 		    /* If the parameter has a part select, we support
@@ -444,7 +483,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 		  verinum*msn = msb_->eval_const(des, scope);
 		  if ((lsn == 0) || (msn == 0)) {
 			cerr << get_line() << ": error: "
-			      "Part select expresions must be "
+			      "Part select expressions must be "
 			      "constant expressions." << endl;
 			des->errors += 1;
 			return 0;
@@ -459,6 +498,8 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 			des->errors += 1;
 			return 0;
 		  }
+		  unsigned long ulsb=lsb;
+		  unsigned long umsb=msb;
 
 		  NetEConst*le = dynamic_cast<NetEConst*>(tmp);
 		  assert(le);
@@ -472,7 +513,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 		       the range, we sign extend signed unsized
 		       numbers, zero extend unsigned unsigned numbers,
 		       and X extend sized numbers. */
-		  for (long idx = lsb ;  idx <= msb ;  idx += 1) {
+		  for (unsigned long idx = ulsb ;  idx <= umsb ;  idx += 1) {
 			if (idx < exl.len())
 			      result.set(idx-lsb, exl.get(idx));
 		        else if (exl.is_string())
@@ -523,7 +564,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 			verinum::V rb = verinum::Vx;
 
 			long ridx = rv.as_long();
-			if ((ridx >= 0) && (ridx < lv.len())) {
+			if ((ridx >= 0) && ((unsigned long) ridx < lv.len())) {
 			      rb = lv[ridx];
 
 			} else if ((ridx >= 0) && (!lv.has_len())) {
@@ -544,8 +585,20 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 			tmp->set_line(*this);
 			tmp = stmp;
 		  }
-	    }
 
+	    } else {
+		    /* No bit or part select. Make the constant into a
+		       NetEConstParam if possible. */
+		  NetEConst*ctmp = dynamic_cast<NetEConst*>(tmp);
+		  if (ctmp != 0) {
+			const char*name
+			     = lex_strings.add(path_.peek_name(0));
+			NetEConstParam*ptmp
+			     = new NetEConstParam(found_in, name, ctmp->value());
+			delete tmp;
+			tmp = ptmp;
+		  }
+	    }
 
 	    tmp->set_line(*this);
 	    return tmp;
@@ -565,7 +618,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 		  verinum*msn = msb_->eval_const(des, scope);
 		  if ((lsn == 0) || (msn == 0)) {
 			cerr << get_line() << ": error: "
-			      "Part select expresions must be "
+			      "Part select expressions must be "
 			      "constant expressions." << endl;
 			des->errors += 1;
 			return 0;
@@ -578,7 +631,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 		       integers, so allow negative values. However,
 		       the width that they represent is
 		       unsigned. Remember that any order is possible,
-		       i.e. [1:0], [-4,6], etc. */
+		       i.e., [1:0], [-4,6], etc. */
 
 		  long lsv = lsn->as_long();
 		  long msv = msn->as_long();
@@ -629,7 +682,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 	    verinum*msn;
 	    if (msb_ && (msn = msb_->eval_const(des, scope))) {
 		  assert(idx_ == 0);
-		  unsigned long msv = msn->as_ulong();
+		  long msv = msn->as_long();
 		  unsigned idx = net->sb_to_idx(msv);
 
 		  if (idx >= net->pin_count()) {
@@ -719,9 +772,26 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 	    return node;
       }
 
+	// If the identifier names a variable of some sort, then this
+	// is a variable reference.
+      if (NetVariable*var = des->find_variable(scope, path_)) {
+
+	    NetEVariable*node = new NetEVariable(var);
+	    node->set_line(*this);
+	    return node;
+      }
+
+	// If the identifier is a named event.
+	// is a variable reference.
+      if (NetEvent*nev = des->find_event(scope, path_)) {
+	    NetEEvent*tmp = new NetEEvent(nev);
+	    tmp->set_line(*this);
+	    return tmp;
+      }
+
 	// Finally, if this is a scope name, then return that. Look
 	// first to see if this is a name of a local scope. Failing
-	// that, search globally for a heirarchical name.
+	// that, search globally for a hierarchical name.
       if ((path_.peek_name(1) == 0))
 	    if (NetScope*nsc = scope->child(path_.peek_name(0))) {
 		  NetEScope*tmp = new NetEScope(nsc);
@@ -729,15 +799,20 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
 		  return tmp;
 	    }
 
-	// NOTE: This search pretty much assumes that text_ is a
-	// complete hierarchical name, since there is no mention of
-	// the current scope in the call to find_scope.
+	// Try full hierarchical scope name.
       if (NetScope*nsc = des->find_scope(path_)) {
 	    NetEScope*tmp = new NetEScope(nsc);
 	    tmp->set_line(*this);
 	    return tmp;
       }
 
+	// Try relative scope name.
+      if (NetScope*nsc = des->find_scope(scope, path_)) {
+	    NetEScope*tmp = new NetEScope(nsc);
+	    tmp->set_line(*this);
+	    return tmp;
+      }
+
 	// I cannot interpret this identifier. Error message.
       cerr << get_line() << ": error: Unable to bind wire/reg/memory "
 	    "`" << path_ << "' in `" << scope->name() << "'" << endl;
@@ -789,6 +864,7 @@ NetETernary*PETernary::elaborate_expr(Design*des, NetScope*scope, bool) const
       }
 
       NetETernary*res = new NetETernary(con, tru, fal);
+      res->set_line(*this);
       return res;
 }
 
@@ -810,10 +886,13 @@ NetExpr* PEUnary::elaborate_expr(Design*des, NetScope*scope, bool) const
 
 	  case '-':
 	    if (NetEConst*ipc = dynamic_cast<NetEConst*>(ip)) {
+		    /* When taking the - of a number, turn it into a
+		       signed expression and extend it one bit to
+		       accommodate a possible sign bit. */
 		  verinum val = ipc->value();
-		  verinum zero (verinum::V0, val.len(), val.has_len());
+		  verinum zero (verinum::V0, val.len()+1, val.has_len());
 		  val = zero - val;
-		  val.has_sign(ipc->has_sign());
+		  val.has_sign(true);
 		  tmp = new NetEConst(val);
 		  delete ip;
 	    } else {
@@ -885,6 +964,55 @@ NetExpr* PEUnary::elaborate_expr(Design*des, NetScope*scope, bool) const
 
 /*
  * $Log: elab_expr.cc,v $
+ * Revision 1.80  2003/06/24 01:38:02  steve
+ *  Various warnings fixed.
+ *
+ * Revision 1.79  2003/06/18 03:55:18  steve
+ *  Add arithmetic shift operators.
+ *
+ * Revision 1.78  2003/06/10 04:29:57  steve
+ *  PR735: bit select indices are signed constants.
+ *
+ * Revision 1.77  2003/05/30 02:55:32  steve
+ *  Support parameters in real expressions and
+ *  as real expressions, and fix multiply and
+ *  divide with real results.
+ *
+ * Revision 1.76  2003/04/22 04:48:29  steve
+ *  Support event names as expressions elements.
+ *
+ * Revision 1.75  2003/04/19 04:19:38  steve
+ *  Set line number for ternary expressions.
+ *
+ * Revision 1.74  2003/04/02 04:25:26  steve
+ *  Fix xz extension of constants.
+ *
+ * Revision 1.73  2003/03/25 03:00:04  steve
+ *  Scope names can be relative.
+ *
+ * Revision 1.72  2003/03/15 04:46:28  steve
+ *  Better organize the NetESFunc return type guesses.
+ *
+ * Revision 1.71  2003/03/10 23:40:53  steve
+ *  Keep parameter constants for the ivl_target API.
+ *
+ * Revision 1.70  2003/03/07 02:44:34  steve
+ *  Implement $realtobits.
+ *
+ * Revision 1.69  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.68  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
+ * Revision 1.67  2002/12/21 00:55:57  steve
+ *  The $time system task returns the integer time
+ *  scaled to the local units. Change the internal
+ *  implementation of vpiSystemTime the $time functions
+ *  to properly account for this. Also add $simtime
+ *  to get the simulation time.
+ *
  * Revision 1.66  2002/09/21 21:28:18  steve
  *  Allow constant bit selects out of range.
  *

elab_lval.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_lval.cc,v 1.20 2002/08/12 01:34:58 steve Exp $"
+#ident "$Id: elab_lval.cc,v 1.26 2003/01/27 05:09:17 steve Exp $"
 #endif
 
 # include "config.h"
@@ -29,23 +29,23 @@
 
 /*
  * These methods generate a NetAssign_ object for the l-value of the
- * assignemnt. This is common code for the = and <= statements.
+ * assignment. This is common code for the = and <= statements.
  *
  * What gets generated depends on the structure of the l-value. If the
- * l-value is a simple name (i.e. foo <= <value>) the the NetAssign_
+ * l-value is a simple name (i.e., foo <= <value>) the the NetAssign_
  * is created the width of the foo reg and connected to all the
  * bits.
  *
- * If there is a part select (i.e. foo[3:1] <= <value>) the NetAssign_
+ * If there is a part select (i.e., foo[3:1] <= <value>) the NetAssign_
  * is made only as wide as it needs to be (3 bits in this example) and
  * connected to the correct bits of foo. A constant bit select is a
  * special case of the part select. 
  *
- * If the bit-select is non-constant (i.e. foo[<expr>] = <value>) the
+ * If the bit-select is non-constant (i.e., foo[<expr>] = <value>) the
  * NetAssign_ is made wide enough to connect to all the bits of foo,
  * then the mux expression is elaborated and attached to the
  * NetAssign_ node as a b_mux value. The target must interpret the
- * presense of a bmux value as taking a single bit and assigning it to
+ * presence of a bmux value as taking a single bit and assigning it to
  * the bit selected by the bmux expression.
  *
  * If the l-value expression is non-trivial, but can be fully
@@ -55,7 +55,7 @@
  * l-value.
  *
  * This last case can turn up in statements like: {a, b[1]} = c;
- * rather then create a NetAssign_ for each item in the contatenation,
+ * rather then create a NetAssign_ for each item in the concatenation,
  * elaboration makes a single NetAssign_ and connects it up properly.
  */
 
@@ -103,6 +103,14 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
       NetAssign_*res = 0;
 
       for (unsigned idx = 0 ;  idx < parms_.count() ;  idx += 1) {
+
+	    if (parms_[idx] == 0) {
+		  cerr << get_line() << ": error: Empty expressions "
+		       << "not allowed in concatenations." << endl;
+		  des->errors += 1;
+		  continue;
+	    }
+
 	    NetAssign_*tmp = parms_[idx]->elaborate_lval(des, scope);
 
 	      /* If the l-value doesn't elaborate, the error was
@@ -130,17 +138,24 @@ NetAssign_* PEConcat::elaborate_lval(Design*des, NetScope*scope) const
 /*
  * Handle the ident as an l-value. This includes bit and part selects
  * of that ident.
+ *
+ * XXXX FIXME: The search order looks for signals all the way up the
+ * scope tree, then looks for memories then variables. It should be
+ * looking for signals, memories and variables in parallel.
  */
 NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 {
-	/* Get the signal referenced by the identifier, and make sure
-	   it is a register. (Wires are not allows in this context. */
       NetNet*reg = des->find_signal(scope, path_);
 
       if (reg == 0) {
-	    NetMemory*mem = des->find_memory(scope, path_);
-	    if (mem != 0)
+	    if (NetMemory*mem = des->find_memory(scope, path_)) {
 		  return elaborate_mem_lval_(des, scope, mem);
+	    }
+
+	    if (NetVariable*var = des->find_variable(scope, path_)) {
+		  NetAssign_*cur = new NetAssign_(var);
+		  return cur;
+	    }
 
 	    cerr << get_line() << ": error: Could not find variable ``"
 		 << path_ << "'' in ``" << scope->name() <<
@@ -149,8 +164,11 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 	    des->errors += 1;
 	    return 0;
       }
+
       assert(reg);
 
+	/* Get the signal referenced by the identifier, and make sure
+	   it is a register. (Wires are not allows in this context. */
       if (reg->type() != NetNet::REG) {
 	    cerr << get_line() << ": error: " << path_ <<
 		  " is not a reg/integer/time in " << scope->name() <<
@@ -170,16 +188,20 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 	    verinum*vl = lsb_->eval_const(des, scope);
 	    if (vl == 0) {
 		  cerr << lsb_->get_line() << ": error: "
-			"Part select expressions must be constant: "
-		       << *lsb_;
+			"Part select expressions must be constant."
+		       << endl;
+		  cerr << lsb_->get_line() << ":      : This lsb expression "
+			"violates the rule: " << *lsb_ << endl;
 		  des->errors += 1;
 		  return 0;
 	    }
 	    verinum*vm = msb_->eval_const(des, scope);
-	    if (vl == 0) {
+	    if (vm == 0) {
 		  cerr << msb_->get_line() << ": error: "
-			"Part select expressions must be constant: "
-		       << *msb_;
+			"Part select expressions must be constant."
+		       << endl;
+		  cerr << msb_->get_line() << ":      : This msb expression "
+			"violates the rule: " << *msb_ << endl;
 		  des->errors += 1;
 		  return 0;
 	    }
@@ -277,12 +299,38 @@ NetAssign_* PEIdent::elaborate_lval(Design*des, NetScope*scope) const
 NetAssign_* PEIdent::elaborate_mem_lval_(Design*des, NetScope*scope,
 					NetMemory*mem) const
 {
+      if (msb_ == 0) {
+	    cerr << get_line() << ": error: Assign to memory \""
+		 << mem->name() << "\" requires a word select index."
+		 << endl;
+	    des->errors += 1;
+	    return 0;
+      }
+
+      if (msb_ && lsb_) {
+	    cerr << get_line() << ": error: Cannot use part select on "
+		 << "memory \"" << mem->name() << ".\"" << endl;
+	    des->errors += 1;
+	    return 0;
+      }
+
       assert(msb_ && !lsb_);
 
       NetExpr*ix = msb_->elaborate_expr(des, scope);
       if (ix == 0)
 	    return 0;
 
+	/* Evaluate the memory index expression down as must as
+	   possible. Ideally, we can get it down to a constant. */
+      if (! dynamic_cast<NetEConst*>(ix)) {
+	    NetExpr*tmp = ix->eval_tree();
+	    if (tmp) {
+		  tmp->set_line(*ix);
+		  delete ix;
+		  ix = tmp;
+	    }
+      }
+
       NetAssign_*lv = new NetAssign_(mem);
       lv->set_bmux(ix);
       lv->set_part(0, mem->width());
@@ -299,6 +347,25 @@ NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
 
 /*
  * $Log: elab_lval.cc,v $
+ * Revision 1.26  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.25  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
+ * Revision 1.24  2003/01/19 00:35:39  steve
+ *  Detect null arguments to concatenation operator.
+ *
+ * Revision 1.23  2002/11/21 23:27:51  steve
+ *  Precalculate indices to l-value arrays.
+ *
+ * Revision 1.22  2002/11/21 18:15:40  steve
+ *  Fix const test of msb in assignment l-values.
+ *
+ * Revision 1.21  2002/11/02 01:10:49  steve
+ *  Detect memories without work index in l-value.
+ *
  * Revision 1.20  2002/08/12 01:34:58  steve
  *  conditional ident string using autoconfig.
  *

elab_pexpr.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_pexpr.cc,v 1.16 2002/08/12 01:34:59 steve Exp $"
+#ident "$Id: elab_pexpr.cc,v 1.20 2003/05/30 02:55:32 steve Exp $"
 #endif
 
 # include "config.h"
@@ -61,7 +61,7 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
  * expressions can include concatenation expressions. This requires
  * that the subexpressions all have well-defined size (in spite of
  * being in a parameter expression) in order to get a defined
- * value. The sub-expressions themsilves must also be value parameter
+ * value. The sub-expressions themselves must also be value parameter
  * expressions.
  */
 NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
@@ -108,11 +108,6 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
 		       << *ex << endl;
 		  des->errors += 1;
 
-	    } else if (ex->expr_width() == 0) {
-		  cerr << ex->get_line() << ": internal error: "
-		       << "Operand of concatenation has no width: "
-		       << *ex << endl;
-		  des->errors += 1;
 	    }
 
 	    tmp->set(idx, ex);
@@ -150,15 +145,27 @@ NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
 	    return 0;
       }
 
-      if (msb_ || lsb_ || idx_) {
-	    cerr << get_line() << ": error: Cannot bit/part select "
-		  "bits of parameters." << endl;
-	    des->errors += 1;
-      }
-
       NetExpr*res = new NetEParam(des, pscope, hname_t(name));
+      res->set_line(*this);
       assert(res);
       delete name;
+
+      assert(idx_ == 0);
+      if (msb_ && lsb_) {
+	    cerr << get_line() << ": sorry: Cannot part select "
+		  "bits of parameters." << endl;
+	    des->errors += 1;
+
+      } else if (msb_) {
+
+	      /* We have here a bit select. Insert a NetESelect node
+		 to handle it. */
+	    NetExpr*tmp = msb_->elaborate_pexpr(des, scope);
+	    if (tmp != 0) {
+		  res = new NetESelect(res, tmp, 1);
+	    }
+      }
+
       return res;
 }
 
@@ -222,6 +229,20 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_pexpr.cc,v $
+ * Revision 1.20  2003/05/30 02:55:32  steve
+ *  Support parameters in real expressions and
+ *  as real expressions, and fix multiply and
+ *  divide with real results.
+ *
+ * Revision 1.19  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.18  2002/12/05 02:14:33  steve
+ *  Support bit select in constant expressions.
+ *
+ * Revision 1.17  2002/11/09 01:40:19  steve
+ *  Postpone parameter width check to evaluation.
+ *
  * Revision 1.16  2002/08/12 01:34:59  steve
  *  conditional ident string using autoconfig.
  *

elab_scope.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2003 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,11 +17,11 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_scope.cc,v 1.17 2002/10/19 22:59:49 steve Exp $"
+#ident "$Id: elab_scope.cc,v 1.25 2003/06/24 01:38:02 steve Exp $"
 #endif
 
-# include "config.h"
-
+# include  "config.h"
+# include  "compiler.h"
 # include  <iostream>
 
 /*
@@ -32,6 +32,7 @@
  */
 
 # include  "Module.h"
+# include  "PData.h"
 # include  "PEvent.h"
 # include  "PExpr.h"
 # include  "PGate.h"
@@ -39,7 +40,9 @@
 # include  "PWire.h"
 # include  "Statement.h"
 # include  "netlist.h"
+# include  "util.h"
 # include  <typeinfo>
+# include  <assert.h>
 
 bool Module::elaborate_scope(Design*des, NetScope*scope) const
 {
@@ -65,6 +68,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 		 ; cur != parameters.end() ;  cur ++) {
 
 	    NetEParam*tmp = new NetEParam;
+	    tmp->set_line(*((*cur).second.expr));
 	    if ((*cur).second.msb)
 		  tmp->cast_signed( (*cur).second.signed_flag );
 
@@ -75,6 +79,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 		 ; cur != localparams.end() ;  cur ++) {
 
 	    NetEParam*tmp = new NetEParam;
+	    tmp->set_line(*((*cur).second.expr));
 	    if ((*cur).second.msb)
 		  tmp->cast_signed( (*cur).second.signed_flag );
 
@@ -136,7 +141,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	// It is OK to elaborate the expressions of the defparam here
 	// because Verilog requires that the expressions only use
 	// local parameter names. It is *not* OK to do the override
-	// here becuase the parameter receiving the assignment may be
+	// here because the parameter receiving the assignment may be
 	// in a scope not discovered by this pass.
 
       for (hparm_it_t cur = defparms.begin()
@@ -150,6 +155,16 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	    scope->defparams[(*cur).first] = val;
       }
 
+	// Evaluate the attributes. Evaluate them in the scope of the
+	// module that the attribute is attached to. Is this correct?
+      unsigned nattr;
+      attrib_list_t*attr = evaluate_attributes(attributes, nattr, des, scope);
+
+      for (unsigned idx = 0 ;  idx < nattr ;  idx += 1)
+	    scope->attribute(attr[idx].key, attr[idx].val);
+
+      delete[]attr;
+
 
 	// Tasks introduce new scopes, so scan the tasks in this
 	// module. Create a scope for the task and pass that to the
@@ -217,6 +232,12 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
 	    (*et).second->elaborate_scope(des, scope);
       }
 
+      for (map<hname_t,PData*>::const_iterator cur = datum.begin()
+		 ; cur != datum.end() ;  cur ++ ) {
+
+	    (*cur).second->elaborate_scope(des, scope);
+      }
+
       return des->errors == 0;
 }
 
@@ -236,7 +257,7 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 	// about to create, and if I find it then somebody beat me to
 	// it.
 
-      if (NetScope*tmp = sc->child(get_name())) {
+      if (sc->child(get_name())) {
 	    cerr << get_line() << ": error: Instance/Scope name " <<
 		  get_name() << " already used in this context." <<
 		  endl;
@@ -284,7 +305,7 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 
 	// Look for module parameter replacements. The "replace" map
 	// maps parameter name to replacement expression that is
-	// passed. It is built up by the ordered overrices or named
+	// passed. It is built up by the ordered overrides or named
 	// overrides.
 
       typedef map<string,PExpr*>::const_iterator mparm_it_t;
@@ -341,6 +362,34 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
       }
 }
 
+/*
+ * Elaborate the datum within the module. This variable make be
+ * within a subscope (i.e. a function or task) so use the components
+ * of the name to find the precise scope where this item goes.
+ */
+void PData::elaborate_scope(Design*des, NetScope*scope) const
+{
+      NetScope*sub_scope = scope;
+      for (unsigned idx = 0 ;  idx < (hname_.component_count()-1); idx += 1) {
+	    sub_scope = sub_scope->child(hname_.peek_name(idx));
+
+	    if (sub_scope == 0) {
+		  cerr << get_line() << ": internal error: "
+		       << "Could not find sub-scope "
+		       << hname_.peek_name(idx) << " of "
+		       << hname_ << " in module " << scope->name()
+		       << endl;
+		  des->errors += 1;
+		  return;
+	    }
+      }
+
+      const char*basename = hname_.peek_tail_name();
+      NetVariable*tmp = new NetVariable(lex_strings.add(basename));
+      tmp->set_line(*this);
+      sub_scope->add_variable(tmp);
+}
+
 /*
  * The isn't really able to create new scopes, but it does create the
  * event name in the current scope, so can be done during the
@@ -357,6 +406,10 @@ void PEvent::elaborate_scope(Design*des, NetScope*scope) const
 
 void PFunction::elaborate_scope(Design*des, NetScope*scope) const
 {
+      assert(scope->type() == NetScope::FUNC);
+
+      if (statement_)
+	    statement_->elaborate_scope(des, scope);
 }
 
 void PTask::elaborate_scope(Design*des, NetScope*scope) const
@@ -398,7 +451,7 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
 }
 
 /*
- * The case statement itseof does not introduce scope, but contains
+ * The case statement itself does not introduce scope, but contains
  * other statements that may be named blocks. So scan the case items
  * with the elaborate_scope method.
  */
@@ -496,6 +549,34 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_scope.cc,v $
+ * Revision 1.25  2003/06/24 01:38:02  steve
+ *  Various warnings fixed.
+ *
+ * Revision 1.24  2003/06/20 00:53:19  steve
+ *  Module attributes from the parser
+ *  through to elaborated form.
+ *
+ * Revision 1.23  2003/06/16 00:34:08  steve
+ *  Functions can have sub-scope.
+ *
+ * Revision 1.22  2003/06/13 19:10:46  steve
+ *  Properly manage real variables in subscopes.
+ *
+ * Revision 1.21  2003/05/30 02:55:32  steve
+ *  Support parameters in real expressions and
+ *  as real expressions, and fix multiply and
+ *  divide with real results.
+ *
+ * Revision 1.20  2003/03/06 00:28:41  steve
+ *  All NetObj objects have lex_string base names.
+ *
+ * Revision 1.19  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.18  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
  * Revision 1.17  2002/10/19 22:59:49  steve
  *  Redo the parameter vector support to allow
  *  parameter names in range expressions.
@@ -515,48 +596,5 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
  * Revision 1.12  2001/12/03 04:47:14  steve
  *  Parser and pform use hierarchical names as hname_t
  *  objects instead of encoded strings.
- *
- * Revision 1.11  2001/10/20 05:21:51  steve
- *  Scope/module names are char* instead of string.
- *
- * Revision 1.10  2001/10/09 02:01:04  steve
- *  Tasks can have sub-scopes.
- *
- * Revision 1.9  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.8  2001/04/28 23:18:08  steve
- *  UDP instances need not have user supplied names.
- *
- * Revision 1.7  2000/12/16 01:45:48  steve
- *  Detect recursive instantiations (PR#2)
- *
- * Revision 1.6  2000/07/30 18:25:43  steve
- *  Rearrange task and function elaboration so that the
- *  NetTaskDef and NetFuncDef functions are created during
- *  signal enaboration, and carry these objects in the
- *  NetScope class instead of the extra, useless map in
- *  the Design class.
- *
- * Revision 1.5  2000/07/22 22:09:03  steve
- *  Parse and elaborate timescale to scopes.
- *
- * Revision 1.4  2000/04/09 17:44:30  steve
- *  Catch event declarations during scope elaborate.
- *
- * Revision 1.3  2000/03/12 17:09:41  steve
- *  Support localparam.
- *
- * Revision 1.2  2000/03/11 03:25:52  steve
- *  Locate scopes in statements.
- *
- * Revision 1.1  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
  */
 

elab_sig.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_sig.cc,v 1.25 2002/08/12 01:34:59 steve Exp $"
+#ident "$Id: elab_sig.cc,v 1.31 2003/07/15 03:49:22 steve Exp $"
 #endif
 
 # include "config.h"
@@ -360,7 +360,7 @@ bool PGate::elaborate_sig(Design*des, NetScope*scope) const
 /*
  * Elaborate a source wire. The "wire" is the declaration of wires,
  * registers, ports and memories. The parser has already merged the
- * multiple properties of a wire (i.e. "input wire") so come the
+ * multiple properties of a wire (i.e., "input wire") so come the
  * elaboration this creates an object in the design that represent the
  * defined item.
  */
@@ -391,12 +391,12 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 	    svector<long>mnum (msb_.count());
 	    svector<long>lnum (msb_.count());
 	      /* There may be places where the signal is declared as a
-		 scaler. Count those here, for consistency check
+		 scalar. Count those here, for consistency check
 		 later. */
 	    unsigned count_scalars = 0;
 
 	      /* There may be multiple declarations of ranges, because
-		 the symbol may have its range declared in i.e. input
+		 the symbol may have its range declared in e.g., input
 		 and reg declarations. Calculate *all* the numbers
 		 here. I will resolve the values later. */
 
@@ -504,14 +504,13 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 	    long rnum = rval->as_long();
 	    delete lval;
 	    delete rval;
-	    NetMemory*sig = new NetMemory(scope, name, wid, lnum, rnum);
+	    new NetMemory(scope, name, wid, lnum, rnum);
+	      // The constructor automatically adds the memory object
+	      // to the scope. Do I need to set line number information?
 
       } else {
 
-	      /* Make a hierarchical make for the signal. */
-	    string name = scope->name();
-	    name = name + "." + hname_.peek_tail_name();
-
+	    string name = hname_.peek_tail_name();
 	    NetNet*sig = new NetNet(scope, name, wtype, msb, lsb);
 	    sig->set_line(*this);
 	    sig->port_type(port_type_);
@@ -525,6 +524,24 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
 
 /*
  * $Log: elab_sig.cc,v $
+ * Revision 1.31  2003/07/15 03:49:22  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.30  2003/06/24 01:38:02  steve
+ *  Various warnings fixed.
+ *
+ * Revision 1.29  2003/06/21 01:21:43  steve
+ *  Harmless fixup of warnings.
+ *
+ * Revision 1.28  2003/03/06 00:28:41  steve
+ *  All NetObj objects have lex_string base names.
+ *
+ * Revision 1.27  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.26  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
  * Revision 1.25  2002/08/12 01:34:59  steve
  *  conditional ident string using autoconfig.
  *
@@ -616,7 +633,7 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
  *  for regs that are not really values.
  *
  * Revision 1.1  2000/05/02 16:27:38  steve
- *  Move signal elaboration to a seperate pass.
+ *  Move signal elaboration to a separate pass.
  *
  */
 

emit.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: emit.cc,v 1.69 2002/08/12 01:34:59 steve Exp $"
+#ident "$Id: emit.cc,v 1.74 2003/05/30 02:55:32 steve Exp $"
 #endif
 
 # include "config.h"
@@ -312,6 +312,9 @@ void NetScope::emit_scope(struct target_t*tgt) const
       for (NetEvent*cur = events_ ;  cur ;  cur = cur->snext_)
 	    tgt->event(cur);
 
+      for (NetVariable*cur = vars_ ;  cur ;  cur = cur->snext_)
+	    tgt->variable(cur);
+
       for (NetScope*cur = sub_ ;  cur ;  cur = cur->sib_)
 	    cur->emit_scope(tgt);
 
@@ -411,6 +414,21 @@ void NetEConst::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_const(this);
 }
 
+void NetEConstParam::expr_scan(struct expr_scan_t*tgt) const
+{
+      tgt->expr_param(this);
+}
+
+void NetECReal::expr_scan(struct expr_scan_t*tgt) const
+{
+      tgt->expr_creal(this);
+}
+
+void NetECRealParam::expr_scan(struct expr_scan_t*tgt) const
+{
+      tgt->expr_rparam(this);
+}
+
 void NetEMemory::expr_scan(struct expr_scan_t*tgt) const
 {
       tgt->expr_memory(this);
@@ -422,6 +440,11 @@ void NetEParam::expr_scan(struct expr_scan_t*tgt) const
 	   << endl;
 }
 
+void NetEEvent::expr_scan(struct expr_scan_t*tgt) const
+{
+      tgt->expr_event(this);
+}
+
 void NetEScope::expr_scan(struct expr_scan_t*tgt) const
 {
       tgt->expr_scope(this);
@@ -462,6 +485,11 @@ void NetEUnary::expr_scan(struct expr_scan_t*tgt) const
       tgt->expr_unary(this);
 }
 
+void NetEVariable::expr_scan(struct expr_scan_t*tgt) const
+{
+      tgt->expr_variable(this);
+}
+
 bool emit(const Design*des, const char*type)
 {
       for (unsigned idx = 0 ;  target_table[idx] ;  idx += 1) {
@@ -470,11 +498,33 @@ bool emit(const Design*des, const char*type)
 		  return des->emit(tgt->meth);
 
       }
+
+      cerr << "error: Code generator type " << type
+	   << " not found." << endl;
+      return false;
 }
 
 
 /*
  * $Log: emit.cc,v $
+ * Revision 1.74  2003/05/30 02:55:32  steve
+ *  Support parameters in real expressions and
+ *  as real expressions, and fix multiply and
+ *  divide with real results.
+ *
+ * Revision 1.73  2003/04/22 04:48:29  steve
+ *  Support event names as expressions elements.
+ *
+ * Revision 1.72  2003/03/10 23:40:53  steve
+ *  Keep parameter constants for the ivl_target API.
+ *
+ * Revision 1.71  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
+ * Revision 1.70  2002/11/03 20:36:10  steve
+ *  Error message for mising code generator type.
+ *
  * Revision 1.69  2002/08/12 01:34:59  steve
  *  conditional ident string using autoconfig.
  *

eval.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: eval.cc,v 1.32 2002/10/19 22:59:49 steve Exp $"
+#ident "$Id: eval.cc,v 1.36 2003/06/21 01:21:43 steve Exp $"
 #endif
 
 # include "config.h"
@@ -47,9 +47,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
       switch (op_) {
 	  case '+': {
 		if (l->is_defined() && r->is_defined()) {
-		      long lv = l->as_long();
-		      long rv = r->as_long();
-		      res = new verinum(lv+rv, l->len());
+		      res = new verinum(*l + *r);
 		} else {
 		      res = new verinum(verinum::Vx, l->len());
 		}
@@ -57,9 +55,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
 	  }
 	  case '-': {
 		if (l->is_defined() && r->is_defined()) {
-		      long lv = l->as_long();
-		      long rv = r->as_long();
-		      res = new verinum(lv-rv, l->len());
+		      res = new verinum(*l - *r);
 		} else {
 		      res = new verinum(verinum::Vx, l->len());
 		}
@@ -67,9 +63,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
 	  }
 	  case '*': {
 		if (l->is_defined() && r->is_defined()) {
-		      long lv = l->as_long();
-		      long rv = r->as_long();
-		      res = new verinum(lv * rv, l->len());
+		      res = new verinum(*l * *r);
 		} else {
 		      res = new verinum(verinum::Vx, l->len());
 		}
@@ -95,6 +89,26 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
 		}
 		break;
 	  }
+	  case '>': {
+		if (l->is_defined() && r->is_defined()) {
+		      long lv = l->as_long();
+		      long rv = r->as_long();
+		      res = new verinum(lv > rv, l->len());
+		} else {
+		      res = new verinum(verinum::Vx, l->len());
+		}
+		break;
+	  }
+	  case '<': {
+		if (l->is_defined() && r->is_defined()) {
+		      long lv = l->as_long();
+		      long rv = r->as_long();
+		      res = new verinum(lv < rv, l->len());
+		} else {
+		      res = new verinum(verinum::Vx, l->len());
+		}
+		break;
+	  }
 	  case 'l': { // left shift (<<)
 		assert(r->is_defined());
 		unsigned long rv = r->as_ulong();
@@ -226,6 +240,19 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
 
 /*
  * $Log: eval.cc,v $
+ * Revision 1.36  2003/06/21 01:21:43  steve
+ *  Harmless fixup of warnings.
+ *
+ * Revision 1.35  2003/04/14 03:40:21  steve
+ *  Make some effort to preserve bits while
+ *  operating on constant values.
+ *
+ * Revision 1.34  2003/03/26 06:16:18  steve
+ *  Evaluate > and < in constant expressions.
+ *
+ * Revision 1.33  2003/03/10 23:40:53  steve
+ *  Keep parameter constants for the ivl_target API.
+ *
  * Revision 1.32  2002/10/19 22:59:49  steve
  *  Redo the parameter vector support to allow
  *  parameter names in range expressions.

eval_attrib.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: eval_attrib.cc,v 1.5 2002/08/12 01:34:59 steve Exp $"
+#ident "$Id: eval_attrib.cc,v 1.6 2003/01/27 05:09:17 steve Exp $"
 #endif
 
 # include  "config.h"
@@ -29,7 +29,7 @@
 
 /*
  * The evaluate_attributes function evaluates the attribute
- * expressions from the map, and resturns a table in a form suitable
+ * expressions from the map, and returns a table in a form suitable
  * for passing to netlist devices.
  */
 
@@ -52,7 +52,7 @@ attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
 	    PExpr*exp = (*cur).second;
 
 	      /* If the attribute value is given in the source, then
-		 evalulate it as a constant. If the value is not
+		 evaluate it as a constant. If the value is not
 		 given, then assume the value is 1. */
 	    verinum*tmp;
 	    if (exp)
@@ -74,6 +74,9 @@ attrib_list_t* evaluate_attributes(const map<string,PExpr*>&att,
 
 /*
  * $Log: eval_attrib.cc,v $
+ * Revision 1.6  2003/01/27 05:09:17  steve
+ *  Spelling fixes.
+ *
  * Revision 1.5  2002/08/12 01:34:59  steve
  *  conditional ident string using autoconfig.
  *

eval_rconst.cc

@@ -1,104 +0,0 @@
-/*
- * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
- *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
- */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: eval_rconst.cc,v 1.5 2002/08/12 01:34:59 steve Exp $"
-#endif
-
-# include "config.h"
-
-# include  "PExpr.h"
-
-verireal* PExpr::eval_rconst(const Design*, const NetScope*) const
-{
-      return 0;
-}
-
-verireal* PEFNumber::eval_rconst(const Design*, const NetScope*) const
-{
-      verireal*res = new verireal;
-      *res = *value_;
-      return res;
-}
-
-verireal* PENumber::eval_rconst(const Design*, const NetScope*) const
-{
-      verireal*res = new verireal(value_->as_long());
-      return res;
-}
-
-verireal* PEBinary::eval_rconst(const Design*des, const NetScope*scope) const
-{
-      verireal*lef = left_->eval_rconst(des, scope);
-      verireal*rig = right_->eval_rconst(des, scope);
-      verireal*res = 0;
-
-      switch (op_) {
-	  case '*':
-	    if (lef == 0)
-		  break;
-	    if (rig == 0)
-		  break;
-	    res = new verireal;
-	    *res = (*lef) * (*rig);
-	    break;
-
-	  default:
-	    break;
-      }
-
-      delete lef;
-      delete rig;
-      return res;
-}
-
-
-verireal* PEIdent::eval_rconst(const Design*des, const NetScope*scope) const
-{
-      verinum* val = eval_const(des, scope);
-      if (val == 0)
-	    return 0;
-
-      verireal*res = new verireal(val->as_long());
-      delete val;
-      return res;
-}
-
-/*
- * $Log: eval_rconst.cc,v $
- * Revision 1.5  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.4  2001/11/07 04:01:59  steve
- *  eval_const uses scope instead of a string path.
- *
- * Revision 1.3  2001/11/06 06:11:55  steve
- *  Support more real arithmetic in delay constants.
- *
- * Revision 1.2  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.1  2001/01/14 23:04:56  steve
- *  Generalize the evaluation of floating point delays, and
- *  get it working with delay assignment statements.
- *
- *  Allow parameters to be referenced by hierarchical name.
- *
- */
-

eval_tree.cc

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2003 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,10 +17,11 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: eval_tree.cc,v 1.42 2002/10/19 22:59:49 steve Exp $"
+#ident "$Id: eval_tree.cc,v 1.56 2003/08/01 02:12:30 steve Exp $"
 #endif
 
 # include "config.h"
+# include "compiler.h"
 
 # include  <iostream>
 
@@ -240,8 +241,69 @@ NetEConst* NetEBComp::eval_less_()
       return new NetEConst(result);
 }
 
+NetEConst* NetEBComp::eval_leeq_real_()
+{
+      NetEConst*vtmp;
+      NetECReal*rtmp;
+      double lv, rv;
+
+      switch (left_->expr_type()) {
+	  case ET_REAL:
+	    rtmp = dynamic_cast<NetECReal*> (left_);
+	    if (rtmp == 0)
+		  return 0;
+
+	    lv = rtmp->value().as_double();
+	    break;
+
+	  case ET_VECTOR:
+	    vtmp = dynamic_cast<NetEConst*> (left_);
+	    if (vtmp == 0)
+		  return 0;
+
+	    lv = vtmp->value().as_long();
+	    break;
+
+	  default:
+	    assert(0);
+      }
+
+
+      switch (right_->expr_type()) {
+	  case ET_REAL:
+	    rtmp = dynamic_cast<NetECReal*> (right_);
+	    if (rtmp == 0)
+		  return 0;
+
+	    rv = rtmp->value().as_double();
+	    break;
+
+	  case ET_VECTOR:
+	    vtmp = dynamic_cast<NetEConst*> (right_);
+	    if (vtmp == 0)
+		  return 0;
+
+	    rv = vtmp->value().as_long();
+	    break;
+
+	  default:
+	    assert(0);
+      }
+
+      verinum result((lv <= rv)? verinum::V1 : verinum::V0, 1);
+      vtmp = new NetEConst(result);
+      vtmp->set_line(*this);
+
+      return vtmp;
+}
+
 NetEConst* NetEBComp::eval_leeq_()
 {
+      if (right_->expr_type() == ET_REAL)
+	    return eval_leeq_real_();
+      if (left_->expr_type() == ET_REAL)
+	    return eval_leeq_real_();
+
       NetEConst*r = dynamic_cast<NetEConst*>(right_);
       if (r == 0) return 0;
 
@@ -251,6 +313,11 @@ NetEConst* NetEBComp::eval_leeq_()
 	    return new NetEConst(result);
       }
 
+      if (left_->expr_width() == 0) {
+	    cerr << get_line() << ": internal error: Something wrong "
+		 << "with the left side width of <= ?" << endl;
+	    cerr << get_line() << ":               : " << *this << endl;
+      }
 
 	/* Detect the case where the right side is greater that or
 	   equal to the largest value the left side can possibly
@@ -289,6 +356,24 @@ NetEConst* NetEBComp::eval_leeq_()
 
 NetEConst* NetEBComp::eval_gt_()
 {
+      if ((left_->expr_type() == NetExpr::ET_REAL)
+	  && (right_->expr_type() == NetExpr::ET_REAL)) {
+
+	    NetECReal*tmpl = dynamic_cast<NetECReal*>(left_);
+	    if (tmpl == 0)
+		  return 0;
+
+	    NetECReal*tmpr = dynamic_cast<NetECReal*>(right_);
+	    if (tmpr == 0)
+		  return 0;
+
+	    double ll = tmpl->value().as_double();
+	    double rr = tmpr->value().as_double();
+
+	    verinum result ((ll > rr)? verinum::V1 : verinum::V0, 1, true);
+	    return new NetEConst(result);
+      }
+
       NetEConst*l = dynamic_cast<NetEConst*>(left_);
       if (l == 0) return 0;
 
@@ -298,19 +383,34 @@ NetEConst* NetEBComp::eval_gt_()
 	    return new NetEConst(result);
       }
 
-	/* Detect the case where the left side is greater than the
-	   largest value the right side can possibly have. */
-      assert(right_->expr_width() > 0);
-      verinum rv (verinum::V1, right_->expr_width());
-      if (lv > rv) {
-	    verinum result(verinum::V1, 1);
-	    return new NetEConst(result);
+	/* Check for the special case where we know, simply by the
+	   limited width of the right expression, that it cannot
+	   possibly be false. */
+      if (right_->expr_width() > 0) {
+	    verinum rv (verinum::V1, right_->expr_width());
+	    if (lv > rv) {
+		  verinum result(verinum::V1, 1);
+		  return new NetEConst(result);
+	    }
+      }
+
+	/* Compare with a real value. Do it as double precision. */
+      if (right_->expr_type() == NetExpr::ET_REAL) {
+	    NetECReal*tmp = dynamic_cast<NetECReal*>(right_);
+	    if (tmp == 0)
+		  return 0;
+
+	     double rr = tmp->value().as_double();
+	     double ll = lv.has_sign()? lv.as_long() : lv.as_ulong();
+
+	     verinum result ((ll > rr)? verinum::V1 : verinum::V0, 1, true);
+	     return new NetEConst(result);
       }
 
 	/* Now go on to the normal test of the values. */
       NetEConst*r = dynamic_cast<NetEConst*>(right_);
       if (r == 0) return 0;
-      rv = r->value();
+      verinum rv = r->value();
       if (! rv.is_defined()) {
 	    verinum result(verinum::Vx, 1);
 	    return new NetEConst(result);
@@ -332,6 +432,24 @@ NetEConst* NetEBComp::eval_gt_()
 
 NetEConst* NetEBComp::eval_gteq_()
 {
+      if ((left_->expr_type() == NetExpr::ET_REAL)
+	  && (right_->expr_type() == NetExpr::ET_REAL)) {
+
+	    NetECReal*tmpl = dynamic_cast<NetECReal*>(left_);
+	    if (tmpl == 0)
+		  return 0;
+
+	    NetECReal*tmpr = dynamic_cast<NetECReal*>(right_);
+	    if (tmpr == 0)
+		  return 0;
+
+	    double ll = tmpl->value().as_double();
+	    double rr = tmpr->value().as_double();
+
+	    verinum result ((ll >= rr)? verinum::V1 : verinum::V0, 1, true);
+	    return new NetEConst(result);
+      }
+
       NetEConst*l = dynamic_cast<NetEConst*>(left_);
       if (l == 0) return 0;
 
@@ -343,17 +461,32 @@ NetEConst* NetEBComp::eval_gteq_()
 
 	/* Detect the case where the left side is greater than the
 	   largest value the right side can possibly have. */
-      assert(right_->expr_width() > 0);
-      verinum rv (verinum::V1, right_->expr_width());
-      if (lv >= rv) {
-	    verinum result(verinum::V1, 1);
-	    return new NetEConst(result);
+      if (right_->expr_type() == NetExpr::ET_VECTOR) {
+	    assert(right_->expr_width() > 0);
+	    verinum rv (verinum::V1, right_->expr_width());
+	    if (lv >= rv) {
+		  verinum result(verinum::V1, 1);
+		  return new NetEConst(result);
+	    }
+      }
+
+	/* Compare with a real value. Do it as double precision. */
+      if (right_->expr_type() == NetExpr::ET_REAL) {
+	    NetECReal*tmp = dynamic_cast<NetECReal*>(right_);
+	    if (tmp == 0)
+		  return 0;
+
+	     double rr = tmp->value().as_double();
+	     double ll = lv.has_sign()? lv.as_long() : lv.as_ulong();
+
+	     verinum result ((ll >= rr)? verinum::V1 : verinum::V0, 1, true);
+	     return new NetEConst(result);
       }
 
 	/* Now go on to the normal test of the values. */
       NetEConst*r = dynamic_cast<NetEConst*>(right_);
       if (r == 0) return 0;
-      rv = r->value();
+      verinum rv = r->value();
       if (! rv.is_defined()) {
 	    verinum result(verinum::Vx, 1);
 	    return new NetEConst(result);
@@ -523,7 +656,7 @@ NetEConst* NetEBComp::eval_tree()
 	  case 'L': // <=
 	    return eval_leeq_();
 
-	  case 'N': // Cse inequality (!==)
+	  case 'N': // Case inequality (!==)
 	    return eval_neeqeq_();
 
 	  case 'n': // not-equal (!=)
@@ -541,27 +674,74 @@ NetEConst* NetEBComp::eval_tree()
 }
 
 /*
- * The NetEBDiv operator includes the / and % opeators. First evaluate
+ * The NetEBDiv operator includes the / and % operators. First evaluate
  * the sub-expressions, then perform the required operation.
  */
-NetEConst* NetEBDiv::eval_tree()
+NetExpr* NetEBDiv::eval_tree()
 {
       eval_sub_tree_();
 
-      NetEConst*lc = dynamic_cast<NetEConst*>(left_);
-      if (lc == 0) return 0;
-      NetEConst*rc = dynamic_cast<NetEConst*>(right_);
-      if (rc == 0) return 0;
+      if (expr_type() == NetExpr::ET_REAL) {
+	    NetECReal*lc = dynamic_cast<NetECReal*>(left_);
+	    if (lc == 0) return 0;
 
-      verinum lval = lc->value();
-      verinum rval = rc->value();
+	    verireal lval = lc->value();
 
-      switch (op_) {
-	  case '/':
-	    return new NetEConst(lval / rval);
+	    if (NetECReal*rc = dynamic_cast<NetECReal*>(right_)) {
+		  NetECReal*tmp = 0;
+		  verireal rval = rc->value();
 
-	  case '%':
-	    return new NetEConst(lval % rval);
+		  switch (op_) {
+		      case '/':
+			tmp = new NetECReal(lval / rval);
+			break;
+
+		      case '%':
+			tmp = new NetECReal(lval % rval);
+		  }
+
+		  assert(tmp);
+		  tmp->set_line(*this);
+		  return tmp;
+
+	    } else if (NetEConst*rc = dynamic_cast<NetEConst*>(right_)) {
+
+		  NetECReal*tmp = 0;
+		  verinum rval = rc->value();
+
+		  switch (op_) {
+		      case '/':
+			tmp = new NetECReal(lval / rval);
+			break;
+
+		      case '%':
+			tmp = new NetECReal(lval % rval);
+		  }
+
+		  assert(tmp);
+		  tmp->set_line(*this);
+		  return tmp;
+
+	    }
+
+
+      } else {
+	    assert(expr_type() == NetExpr::ET_VECTOR);
+	    NetEConst*lc = dynamic_cast<NetEConst*>(left_);
+	    if (lc == 0) return 0;
+	    NetEConst*rc = dynamic_cast<NetEConst*>(right_);
+	    if (rc == 0) return 0;
+
+	    verinum lval = lc->value();
+	    verinum rval = rc->value();
+
+	    switch (op_) {
+		case '/':
+		  return new NetEConst(lval / rval);
+
+		case '%':
+		  return new NetEConst(lval % rval);
+	    }
       }
 
       return 0;
@@ -593,7 +773,7 @@ NetEConst* NetEBLogic::eval_tree()
 	    if (v.get(idx) == verinum::V1)
 		  rv = verinum::V1;
 
-      if (lv == verinum::V0)
+      if (rv == verinum::V0)
 	    for (unsigned idx = 0 ;  idx < v.len() ;  idx += 1)
 		  if (v.get(idx) != verinum::V0)
 			rv = verinum::Vx;
@@ -633,10 +813,66 @@ NetEConst* NetEBLogic::eval_tree()
       return new NetEConst(verinum(res, 1));
 }
 
-NetEConst* NetEBMult::eval_tree()
+NetExpr* NetEBMult::eval_tree_real_()
+{
+      verireal lval;
+      verireal rval;
+
+      switch (left_->expr_type()) {
+	  case ET_REAL: {
+		NetECReal*lc = dynamic_cast<NetECReal*> (left_);
+		if (lc == 0) return 0;
+		lval = lc->value();
+		break;
+	  }
+
+	  case ET_VECTOR: {
+		NetEConst*lc = dynamic_cast<NetEConst*>(left_);
+		if (lc == 0) return 0;
+		verinum tmp = lc->value();
+		lval = verireal(tmp.as_long());
+		break;
+	  }
+
+	  default:
+	    assert(0);
+      }
+
+      switch (right_->expr_type()) {
+	  case ET_REAL: {
+		NetECReal*rc = dynamic_cast<NetECReal*> (right_);
+		if (rc == 0) return 0;
+		rval = rc->value();
+		break;
+	  }
+
+	  case ET_VECTOR: {
+		NetEConst*rc = dynamic_cast<NetEConst*>(right_);
+		if (rc == 0) return 0;
+		verinum tmp = rc->value();
+		rval = verireal(tmp.as_long());
+		break;
+	  }
+
+	  default:
+	    assert(0);
+      }
+
+
+      NetECReal*res = new NetECReal(lval * rval);
+      res->set_line(*this);
+      return res;
+}
+
+NetExpr* NetEBMult::eval_tree()
 {
       eval_sub_tree_();
 
+      if (expr_type() == ET_REAL)
+	    return eval_tree_real_();
+
+      assert(expr_type() == ET_VECTOR);
+
       NetEConst*lc = dynamic_cast<NetEConst*>(left_);
       if (lc == 0) return 0;
       NetEConst*rc = dynamic_cast<NetEConst*>(right_);
@@ -668,19 +904,26 @@ NetEConst* NetEBShift::eval_tree()
       verinum rv = re->value();
       verinum lv = le->value();
 
-	/* Calculate the width of the result. If it is not fixed, then
-	   get it from the left operand. */
+	/* Make an early estimate of the expression width. */
       unsigned wid = expr_width();
-      if (wid == 0)
-	    wid = left_->expr_width();
 
       if (rv.is_defined()) {
 
 	    unsigned shift = rv.as_ulong();
 
+	    if ((wid == 0) || ! lv.has_len()) {
+		    /* If the caller doesn't care what the width is,
+		       then calcuate a width from the trimmed left
+		       expression, plus the shift. This avoids
+		       data loss. */
+		  lv = trim_vnum(lv);
+		  wid = lv.len();
+		  if (op() == 'l')
+			wid = lv.len() + shift;
+	    }
 
 	    assert(wid);
-	    verinum nv (verinum::V0, wid);
+	    verinum nv (verinum::V0, wid, lv.has_len());
 
 	    if (op() == 'r') {
 		  unsigned cnt = wid;
@@ -709,7 +952,9 @@ NetEConst* NetEBShift::eval_tree()
 	    res = new NetEConst(nv);
 
       } else {
-	    assert(wid);
+	    if (wid == 0)
+		  wid = left_->expr_width();
+
 	    verinum nv (verinum::Vx, wid);
 	    res = new NetEConst(nv);
       }
@@ -752,7 +997,13 @@ NetEConst* NetEConcat::eval_tree()
 			     << "operand has indefinite width: "
 			     << *parms_[idx] << endl;
 			local_errors += 1;
+		  } else if (expr->expr_width() == 0) {
+			cerr << expr->get_line() << ": internal error: "
+			     << "Operand of concatenation has no width: "
+			     << *expr << endl;
+			local_errors += 1;
 		  }
+
 		  gap += expr->expr_width();
 	    }
 
@@ -871,13 +1122,31 @@ NetExpr* NetEParam::eval_tree()
 
 	// If the parameter that I refer to is already evaluated, then
 	// return the constant value.
-      if (dynamic_cast<NetEConst*>(nexpr))
-	    return nexpr;
+      if (NetEConst*tmp = dynamic_cast<NetEConst*>(nexpr)) {
+	    verinum val = tmp->value();
+	    const char*name = lex_strings.add(name_.peek_name(0));
+	    NetEConstParam*ptmp = new NetEConstParam(scope_, name, val);
+	    ptmp->set_line(*this);
+	    delete nexpr;
+	    return ptmp;
+      }
+
+      if (NetECReal*tmp = dynamic_cast<NetECReal*>(nexpr)) {
+	    verireal val = tmp->value();
+	    const char*name = lex_strings.add(name_.peek_name(0));
+	    NetECRealParam*ptmp = new NetECRealParam(scope_, name, val);
+	    ptmp->set_line(*this);
+	    delete nexpr;
+	    return ptmp;
+      }
 
 	// Try to evaluate the expression. If I cannot, then the
 	// expression is not a constant expression and I fail here.
       NetExpr*res = nexpr->eval_tree();
       if (res == 0) {
+	    cerr << get_line() << ": internal error: Unable to evaluate "
+		 << "parameter " << name_ << " expression: "
+		 << *nexpr << endl;
 	    delete nexpr;
 	    return 0;
       }
@@ -885,9 +1154,64 @@ NetExpr* NetEParam::eval_tree()
 	// The result can be saved as the value of the parameter for
 	// future reference, and return a copy to the caller.
       scope_->replace_parameter(name_.peek_name(0), res);
-      return res->dup_expr();
+
+      NetEConst*tmp = dynamic_cast<NetEConst*>(res);
+      assert(tmp);
+
+      verinum val = tmp->value();
+      const char*name = lex_strings.add(name_.peek_name(0));
+      NetEConstParam*ptmp = new NetEConstParam(scope_, name, val);
+
+      return ptmp;
 }
 
+NetEConst* NetESelect::eval_tree()
+{
+      NetEConst*expr = dynamic_cast<NetEConst*>(expr_);
+      if (expr == 0) {
+	    NetExpr*tmp = expr_->eval_tree();
+	    if (tmp != 0) {
+		  delete expr_;
+		  expr_ = tmp;
+	    }
+
+	    expr = dynamic_cast<NetEConst*>(expr_);
+      }
+
+      NetEConst*base = dynamic_cast<NetEConst*>(base_);
+      if (base == 0) {
+	    NetExpr*tmp = base_->eval_tree();
+	    if (tmp != 0) {
+		  delete base_;
+		  base_ = tmp;
+	    }
+
+	    base = dynamic_cast<NetEConst*>(base_);
+      }
+
+      if (expr == 0)
+	    return 0;
+      if (base == 0)
+	    return 0;
+
+      verinum eval = expr->value();
+      verinum oval (verinum::V0, expr_width(), true);
+      long bval = base->value().as_long();
+
+      for (unsigned long idx = 0 ;  idx < expr_width() ;  idx += 1) {
+	    if ((bval >= 0) && ((unsigned long) bval < eval.len()))
+		  oval.set(idx, eval.get(bval));
+	    else 
+		  oval.set(idx, verinum::Vx);
+
+	    bval += 1;
+      }
+
+      NetEConst*res = new NetEConst(oval);
+      return res;
+}
+
+
 /*
  * A ternary expression evaluation is controlled by the condition
  * expression. If the condition evaluates to true or false, then
@@ -1134,151 +1458,28 @@ NetEConst* NetEUReduce::eval_tree()
 
 /*
  * $Log: eval_tree.cc,v $
- * Revision 1.42  2002/10/19 22:59:49  steve
- *  Redo the parameter vector support to allow
- *  parameter names in range expressions.
+ * Revision 1.56  2003/08/01 02:12:30  steve
+ *  Fix || with true case on the right.
  *
- * Revision 1.41  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
+ * Revision 1.55  2003/06/24 01:38:02  steve
+ *  Various warnings fixed.
  *
- * Revision 1.40  2002/05/25 16:43:47  steve
- *  Eval ^ and &0 expressions.
+ * Revision 1.54  2003/06/05 04:28:24  steve
+ *  Evaluate <= with real operands.
  *
- * Revision 1.39  2002/05/06 02:30:27  steve
- *  Allow parameters in concatenation of widths are defined.
+ * Revision 1.53  2003/06/04 01:26:17  steve
+ *  internal error for <= expression errors.
  *
- * Revision 1.38  2002/05/05 21:11:50  steve
- *  Put off evaluation of concatenation repeat expresions
- *  until after parameters are defined. This allows parms
- *  to be used in repeat expresions.
+ * Revision 1.52  2003/05/30 02:55:32  steve
+ *  Support parameters in real expressions and
+ *  as real expressions, and fix multiply and
+ *  divide with real results.
  *
- *  Add the builtin $signed system function.
- *
- * Revision 1.37  2002/04/27 05:03:46  steve
- *  Preserve stringiness string part select and concatenation.
- *
- * Revision 1.36  2002/04/27 03:17:15  steve
- *  Fixup eval of signed constants.
- *
- * Revision 1.35  2002/04/24 02:47:02  steve
- *  Fix compile time eval of signed <= signed.
- *
- * Revision 1.34  2002/04/14 19:28:47  steve
- *  Fix constant evaluation of unary
- *
- * Revision 1.33  2002/02/01 05:09:14  steve
- *  Propagate sign in unary minus.
- *
- * Revision 1.32  2002/01/22 01:40:04  steve
- *  Precalculate constant results of memory index expressions.
- *
- * Revision 1.31  2001/12/30 00:39:25  steve
- *  Evaluate constant unary minus.
- *
- * Revision 1.30  2001/12/03 04:47:15  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.29  2001/11/19 01:54:14  steve
- *  Port close cropping behavior from mcrgb
- *  Move window array reset to libmc.
- *
- * Revision 1.28  2001/10/22 15:31:21  steve
- *  fix constant overrun in | operands.
- *
- * Revision 1.27  2001/10/20 00:11:24  steve
- *  Evaluate constant == when operands differ in width.
- *
- * Revision 1.26  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.25  2001/07/16 20:41:41  steve
- *  Handle 0 counts in repeat concatenation.
- *
- * Revision 1.24  2001/02/10 20:29:39  steve
- *  In the context of range declarations, use elab_and_eval instead
- *  of the less robust eval_const methods.
- *
- * Revision 1.23  2001/02/09 05:44:23  steve
- *  support evaluation of constant < in expressions.
- *
- * Revision 1.22  2001/02/07 02:46:31  steve
- *  Support constant evaluation of / and % (PR#124)
- *
- * Revision 1.21  2001/01/14 23:04:56  steve
- *  Generalize the evaluation of floating point delays, and
- *  get it working with delay assignment statements.
- *
- *  Allow parameters to be referenced by hierarchical name.
- *
- * Revision 1.20  2001/01/04 16:49:50  steve
- *  Evaluate constant === and !== expressions.
- *
- * Revision 1.19  2001/01/04 04:28:42  steve
- *  Evaluate constant logical && and ||.
- *
- * Revision 1.18  2001/01/02 04:21:14  steve
- *  Support a bunch of unary operators in parameter expressions.
- *
- * Revision 1.17  2001/01/02 03:23:40  steve
- *  Evaluate constant &, | and unary ~.
- *
- * Revision 1.16  2001/01/01 21:49:33  steve
- *  Fix shift and ternary operators in parameter expressions (PR#86)
- *
- * Revision 1.15  2000/12/16 20:00:17  steve
- *  Handle non-constant l-values.
- *
- * Revision 1.14  2000/12/16 19:03:30  steve
- *  Evaluate <= and ?: in parameter expressions (PR#81)
- *
- * Revision 1.13  2000/09/29 04:42:56  steve
- *  Cnstant evaluation of NE.
- *
- * Revision 1.12  2000/09/27 18:28:37  steve
- *  multiply in parameter expressions.
- *
- * Revision 1.11  2000/07/07 04:53:54  steve
- *  Add support for non-constant delays in delay statements,
- *  Support evaluating ! in constant expressions, and
- *  move some code from netlist.cc to net_proc.cc.
- *
- * Revision 1.10  2000/04/28 18:43:23  steve
- *  integer division in expressions properly get width.
- *
- * Revision 1.9  2000/03/08 04:36:53  steve
- *  Redesign the implementation of scopes and parameters.
- *  I now generate the scopes and notice the parameters
- *  in a separate pass over the pform. Once the scopes
- *  are generated, I can process overrides and evalutate
- *  paremeters before elaboration begins.
- *
- * Revision 1.8  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.7  2000/01/13 03:35:35  steve
- *  Multiplication all the way to simulation.
- *
- * Revision 1.6  1999/10/22 23:57:53  steve
- *  do the <= in bits, not numbers.
- *
- * Revision 1.5  1999/10/10 23:29:37  steve
- *  Support evaluating + operator at compile time.
- *
- * Revision 1.4  1999/09/23 03:56:57  steve
- *  Support shift operators.
- *
- * Revision 1.3  1999/09/23 00:21:54  steve
- *  Move set_width methods into a single file,
- *  Add the NetEBLogic class for logic expressions,
- *  Fix error setting with of && in if statements.
- *
- * Revision 1.2  1999/09/21 00:13:40  steve
- *  Support parameters that reference other paramters.
- *
- * Revision 1.1  1999/09/20 02:21:10  steve
- *  Elaborate parameters in phases.
+ * Revision 1.51  2003/04/15 05:06:56  steve
+ *  Handle real constants evaluation > and >=.
  *
+ * Revision 1.50  2003/04/14 03:40:21  steve
+ *  Make some effort to preserve bits while
+ *  operating on constant values.
  */
 

examples/hello.vl

@@ -31,7 +31,7 @@
   *  file "hello" which is compiled, linked and ready to run. Run this
   *  program like so:
   *  
-  *      ./hello
+  *      vvp hello
   *  
   *  and the program will print the message to its output. Easy! For
   *  more on how to make the iverilog command work, see the iverilog

examples/sqrt-virtex.v

@@ -0,0 +1,377 @@
+/*
+ * Copyright (c) 2002 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ *
+ *   $Id: sqrt-virtex.v,v 1.3 2003/07/05 20:22:18 steve Exp $"
+ */
+
+/*
+ * This module is a synthesizeable square-root function. It is also a
+ * detailed example of how to target Xilinx Virtex parts using
+ * Icarus Verilog. In fact, for no particular reason other then to
+ * be excessively specific, I will step through the process of
+ * generating a design for a Spartan-II XC2S15-VQ100, and also how to
+ * generate a generic library part for larger Virtex designs.
+ *
+ * In addition to Icarus Verilog, you will need implementation
+ * software from Xilinx. As of this writing, this example was tested
+ * with Foundation 4.2i, but it should work the same with ISE and
+ * Webpack software.
+ *
+ * This example source contains all the Verilog needed to do
+ * everything described below. We use conditional compilation to
+ * select the bits of Verilog that are needed to perform each specific
+ * task.
+ *
+ * SIMULATE THE DESIGN
+ *
+ * This source file includes a simulation test bench. To compile the
+ * program to include this test bench, use the command line:
+ *
+ *    iverilog -DSIMULATE=1 -oa.out sqrt-virtex.v
+ *
+ * This generates the file "a.out" that can then be executed with the
+ * command:
+ *
+ *    vvp a.out
+ *
+ * This causes the simulation to run a long set of example sqrt
+ * calculations. Each result is checked by the test bench to assure
+ * that the result is valid. When it is done, the program prints
+ * "PASSED" and finishes the simulation.
+ *
+ * When you take a close look at the "main" module below, you will see
+ * that it uses Verilog constructs that are not synthesizeable. This
+ * is fine, as we will never try to synthesize it.
+ *
+ * LIBRARY PARTS
+ *
+ * One can use the sqrt32 module to generate an EDIF file suitable for
+ * use as a library part. This part can be imported to the Xilinx
+ * schematic editor, then placed like any other pre-existing
+ * macro. One can also pass the generated EDIF as a precompiled macro
+ * that other designers may use as they see fit.
+ *
+ * To make an EDIF file from the sqrt32 module, execute the command:
+ *
+ *    iverilog -osqrt32.edf -tfpga -parch=virtex sqrt-virtex.v
+ *
+ * The -parch=virtex tells the code generator to generate code for the
+ * virtex architecture family (we don't yet care what specific part)
+ * and the -osqrt32.edf places the output into the file
+ * sqrt32.edf.
+ *
+ * Without any preprocessor directives, the only module is the sqrt32
+ * module, so sqrt32 is compiled as the root. The ports of the module
+ * are automatically made into ports of the sqrt32.edf netlist, and
+ * the contents of the sqrt32 module are connected approprately.
+ *
+ * COMPLETE CHIP DESIGNS
+ *
+ * To make a complete chip design, there are other bits that need to
+ * be accounted for. Signals must be assigned to pins, and some
+ * special devices may need to be created. We also want to write into
+ * the EDIF file complete part information so that the implementation
+ * tools know how to route the complete design. The command to compile
+ * for our target part is:
+ *
+ *    iverilog -ochip.edf -tfpga \
+ *           -parch=virtex -ppart=XC2S15-VQ100 \
+ *           -DMAKE_CHIP=1 sqrt-virtex.v
+ *
+ * This command uses the "chip" module as the root. This module in
+ * turn has ports that are destined to be the pins of the completed
+ * part. The -ppart= option gives complete part information, that is
+ * in turn written into the EDIF file. This saves us the drudgery of
+ * repeating that part number for later commands.
+ *
+ * The next steps involve Xilinx software, and to talk to Xilinx
+ * software, the netlist must be in the form of an "ngd" file, a
+ * binary netlist format. The command:
+ *
+ *    ngdbuild chip.edf chip.ngd
+ *
+ * does the trick. The input to ngdbuild is the chip.edf file created
+ * by Icarus Verilog, and the output is the chip.ngd file that the
+ * implementation tools may read. From this point, it is best to refer
+ * to Xilinx documentation for the software you are using, but the
+ * quick summary is:
+ *
+ *    map -o map.ncd chip.ngd
+ *    par -w map.ncd chip.ncd
+ *
+ * The result of this sequence of commands is the chip.ncd file that
+ * is ready to be viewed by FPGA Edit, or converted to a bit stream,
+ * or whatever.
+ *
+ * POST MAP SIMULATION
+ *
+ * Warm fuzzies are good, and retesting your design after the part
+ * is mapped by the Xilinx backend tools is a cheap source of fuzzies.
+ * The command to make a Verilog file out of the mapped design is:
+ *
+ *    ngd2ver chip.ngd chip_root.v
+ *
+ * This command creates from the chip.ngd the file "chip_root.v" that
+ * contains Verilog code that simulates the mapped design. This output
+ * Verilog has the single root module "chip_root", which came from the
+ * name of the root module when we were making hte EDIF file in the
+ * first place. The module has ports named just line the ports of the
+ * chip_root module below.
+ *
+ * The generated Verilog uses the library in the directory
+ * $(XILINX)/verilog/src/simprims. This directory comes with the ISE
+ * WebPACK installation that you are using. Icarus Verilog is able to
+ * simulate using that library.
+ *
+ * To compile a post-map simulation of the chip_root.v, use the
+ * command:
+ *
+ *    iverilog -DSIMULATE -DPOST_MAP -ob.out \
+ *             -y $(XILINX)/verilog/src/simprims \
+ *             sqrt-virtex.v chip_root.v \
+ *             $(XILINX)/verilog/src/glbl.v
+ *
+ * This command line generates b.out from the source files
+ * sqrt-virtex.v and chip_root.v (the latter from ngd2ver)
+ * and the "-y <path>" flag specifies the library directory that will
+ * be needed. The glbl.v source file is also included to provide the
+ * GSR and related signals.
+ *
+ * The POST_MAP compiler directive causes the GSR manipulations
+ * included in the test bench to be compiled in, to simulate the chip
+ * startup. Other then that, the test bench runs the post-map design
+ * the same way the pre-synthesis design works.
+ *
+ * Run this design with the command:
+ *
+ *    vvp b.out
+ *
+ * And there you go.
+ */
+
+`ifndef POST_MAP
+ /*
+  * This module approximates the square root of an unsigned 32bit
+  * number. The algorithm works by doing a bit-wise binary search.
+  * Starting from the most significant bit, the accumulated value
+  * tries to put a 1 in the bit position. If that makes the square
+  * too big for the input, the bit is left zero, otherwise it is set
+  * in the result. This continues for each bit, decreasing in
+  * significance, until all the bits are calculated or all the
+  * remaining bits are zero.
+  *
+  * Since the result is an integer, this function really calculates
+  * value of the expression:
+  *
+  *      x = floor(sqrt(y))
+  *
+  * where sqrt(y) is the exact square root of y and floor(N) is the
+  * largest integer <= N.
+  *
+  * For 32bit numbers, this will never run more then 16 iterations,
+  * which amounts to 16 clocks.
+  */
+
+module sqrt32(clk, rdy, reset, x, .y(acc));
+   input  clk;
+   output rdy;
+   input  reset;
+
+   input [31:0] x;
+   output [15:0] acc;
+
+
+   // acc holds the accumulated result, and acc2 is the accumulated
+   // square of the accumulated result.
+   reg [15:0] acc;
+   reg [31:0] acc2;
+
+   // Keep track of which bit I'm working on.
+   reg [4:0]  bitl;
+   wire [15:0] bit = 1 << bitl;
+   wire [31:0] bit2 = 1 << (bitl << 1);
+
+   // The output is ready when the bitl counter underflows.
+   wire rdy = bitl[4];
+
+   // guess holds the potential next values for acc, and guess2 holds
+   // the square of that guess. The guess2 calculation is a little bit
+   // subtle. The idea is that:
+   //
+   //      guess2 = (acc + bit) * (acc + bit)
+   //             = (acc * acc) + 2*acc*bit + bit*bit
+   //             = acc2 + 2*acc*bit + bit2
+   //             = acc2 + 2 * (acc<<bitl) + bit
+   //
+   // This works out using shifts because bit and bit2 are known to
+   // have only a single bit in them.
+   wire [15:0] guess  = acc | bit;
+   wire [31:0] guess2 = acc2 + bit2 + ((acc << bitl) << 1);
+
+   (* ivl_synthesis_on *)
+   always @(posedge clk or posedge reset)
+      if (reset) begin
+	 acc = 0;
+	 acc2 = 0;
+	 bitl = 15;
+      end else begin
+	 if (guess2 <= x) begin
+	    acc  <= guess;
+	    acc2 <= guess2;
+	 end
+	 bitl <= bitl - 5'd1;
+      end
+
+endmodule // sqrt32
+
+`endif //  `ifndef POST_MAP
+
+`ifdef SIMULATE
+ /*
+  * This module is a test bench for the sqrt32 module. It runs some
+  * test input values through the sqrt32 module, and checks that the
+  * output is valid. If an invalid output is generated, print and
+  * error message and stop immediately. If all the tested values pass,
+  * then print PASSED after the test is complete.
+  */
+module main;
+
+   reg [31:0] x;
+   reg 	      clk, reset;
+
+   wire [15:0] y;
+   wire        rdy;
+
+`ifdef POST_MAP
+   chip_root dut(.clk(clk), .reset(reset), .rdy(rdy), .x(x), .y(y));
+`else
+   sqrt32 dut(.clk(clk), .reset(reset), .rdy(rdy), .x(x), .y(y));
+`endif
+
+   (* ivl_synthesis_off *)
+   always #5 clk = !clk;
+
+   task reset_dut;
+      begin
+	 reset = 1;
+	 #1 reset = 0;
+	 @(negedge clk) ;
+      end
+   endtask // reset_dut
+
+   task crank_dut;
+      begin
+	 while (rdy == 0) begin
+	    @(posedge clk) /* wait */;
+	 end
+      end
+   endtask // crank_dut
+
+`ifdef POST_MAP
+   reg        GSR;
+   assign      glbl.GSR = GSR;
+`endif
+
+   integer idx;
+
+   (* ivl_synthesis_off *)
+   initial begin
+      reset = 0;
+      clk = 0;
+
+      /* If doing a post-map simulation, when we need to wiggle
+         The GSR bit to simulate chip power-up. */
+`ifdef POST_MAP
+      GSR = 1;
+      #100 GSR = 0;
+`endif
+      #100 x = 1;
+      reset_dut;
+      crank_dut;
+      $display("x=%d, y=%d", x, y);
+
+      x = 3;
+      reset_dut;
+      crank_dut;
+      $display("x=%d, y=%d", x, y);
+
+      x = 4;
+      reset_dut;
+      crank_dut;
+      $display("x=%d, y=%d", x, y);
+
+      for (idx = 0 ;  idx < 200 ;  idx = idx + 1) begin
+	 x = $random;
+	 reset_dut;
+	 crank_dut;
+	 $display("x=%d, y=%d", x, y);
+
+	 if (x < (y * y)) begin
+	    $display("ERROR: y is too big");
+	    $finish;
+	 end
+
+	 if (x > ((y + 1)*(y + 1))) begin
+	    $display("ERROR: y is too small");
+	    $finish;
+	 end
+      end
+
+      $display("PASSED");
+      $finish;
+   end
+
+endmodule // main
+`endif
+
+`ifdef MAKE_CHIP
+ /*
+  * This module represents the chip packaging that we intend to
+  * generate. We bind pins here, and route the clock to the global
+  * clock buffer.
+  */
+module chip_root(clk, rdy, reset, x, y);
+   input  clk;
+   output rdy;
+   input  reset;
+
+   input [31:0] x;
+   output [15:0] y;
+
+   wire 	 clk_int;
+
+   (* cellref="BUFG:O,I" *)
+   buf gbuf (clk_int, clk);
+
+   sqrt32 dut(.clk(clk_int), .reset(reset), .rdy(rdy), .x(x), .y(y));
+
+   /* Assign the clk to GCLK0, which is on pin P39. */
+   $attribute(clk, "PAD", "P39");
+
+   // We don't care where the remaining pins go, so set the pin number
+   // to 0. This tells the implementation tools that we want a PAD,
+   // but we don't care which. Also note the use of a comma (,)
+   // separated list to assign pins to the bits of a vector.
+   $attribute(rdy, "PAD", "0");
+   $attribute(reset, "PAD", "0");
+   $attribute(x, "PAD", "0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0");
+   $attribute(y, "PAD", "0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0");
+
+endmodule // chip_root
+
+`endif

examples/xnf_add.vl

@@ -72,7 +72,7 @@ module main;
    // These attribute commands assign pins to the listed wires.
    // This can be done to wires and registers, as internally both
    // are treated as named signals. It doesn't work (yet) on vectors,
-   // though, so break out the vectors with scaler assignments.
+   // though, so break out the vectors with scalar assignments.
    
    assign a[0] = a0;
    assign a[1] = a1;

expr_synth.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: expr_synth.cc,v 1.36 2002/08/12 01:34:59 steve Exp $"
+#ident "$Id: expr_synth.cc,v 1.47 2003/08/09 03:23:40 steve Exp $"
 #endif
 
 # include "config.h"
@@ -48,11 +48,11 @@ NetNet* NetEBAdd::synthesize(Design*des)
       assert(lsig->pin_count() == rsig->pin_count());
       unsigned width=lsig->pin_count();
 
-      string path = lsig->scope()->name()+"."+lsig->scope()->local_symbol();
+      string path = lsig->scope()->local_symbol();
       NetNet*osig = new NetNet(lsig->scope(), path, NetNet::IMPLICIT, width);
       osig->local_flag(true);
 
-      string oname = des->local_symbol(path);
+      string oname = osig->scope()->local_symbol();
       NetAddSub *adder = new NetAddSub(lsig->scope(), oname, width);
       for (unsigned idx = 0 ;  idx < width;  idx += 1) {
 	    connect(lsig->pin(idx), adder->pin_DataA(idx));
@@ -100,12 +100,12 @@ NetNet* NetEBBits::synthesize(Design*des)
       }
 
       assert(lsig->pin_count() == rsig->pin_count());
-      NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT,
-			       lsig->pin_count());
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
+			       NetNet::IMPLICIT, lsig->pin_count());
       osig->local_flag(true);
 
       for (unsigned idx = 0 ;  idx < osig->pin_count() ;  idx += 1) {
-	    string oname = des->local_symbol(path);
+	    string oname = scope->local_hsymbol();
 	    NetLogic*gate;
 
 	      /* If the rsig bit is constant, then look for special
@@ -175,23 +175,50 @@ NetNet* NetEBComp::synthesize(Design*des)
 		  : right_->synthesize(des);
 	    NetScope*scope = lsig->scope();
 	    assert(scope);
-	    string path = des->local_symbol(scope->name());
 
-	    NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, 1);
+	    NetNet*osig = new NetNet(scope, scope->local_symbol(),
+				     NetNet::IMPLICIT, 1);
 	    osig->local_flag(true);
 
 	    NetLogic*gate;
 	    switch (op_) {
 		case 'e':
 		case 'E':
-		  gate = new NetLogic(scope, des->local_symbol(path),
+		  gate = new NetLogic(scope, scope->local_hsymbol(),
 				      lsig->pin_count()+1, NetLogic::NOR);
 		  break;
 		case 'n':
 		case 'N':
-		  gate = new NetLogic(scope, des->local_symbol(path),
+		  gate = new NetLogic(scope, scope->local_hsymbol(),
 				      lsig->pin_count()+1, NetLogic::OR);
 		  break;
+
+		case '>':
+		    /* sig > 0 is true if any bit in sig is set. This
+		       is very much like sig != 0. (0 > sig) shouldn't
+		       happen. */
+		  if (rcon) {
+			gate = new NetLogic(scope, scope->local_hsymbol(),
+					    lsig->pin_count()+1, NetLogic::OR);
+		  } else {
+			assert(0);
+			gate = new NetLogic(scope, scope->local_hsymbol(),
+				      lsig->pin_count()+1, NetLogic::NOR);
+		  }
+		  break;
+
+		case '<':
+		    /* 0 < sig is handled like sig > 0. */
+		  if (! rcon) {
+			gate = new NetLogic(scope, scope->local_hsymbol(),
+					    lsig->pin_count()+1, NetLogic::OR);
+		  } else {
+			assert(0);
+			gate = new NetLogic(scope, scope->local_hsymbol(),
+				      lsig->pin_count()+1, NetLogic::NOR);
+		  }
+		  break;
+
 		default:
 		  assert(0);
 	    }
@@ -209,7 +236,6 @@ NetNet* NetEBComp::synthesize(Design*des)
 
       NetScope*scope = lsig->scope();
       assert(scope);
-      string path = des->local_symbol(scope->name());
 
       unsigned width = lsig->pin_count();
       if (rsig->pin_count() > lsig->pin_count())
@@ -218,13 +244,14 @@ NetNet* NetEBComp::synthesize(Design*des)
       lsig = pad_to_width(des, lsig, width);
       rsig = pad_to_width(des, rsig, width);
 
-      NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, 1);
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
+			       NetNet::IMPLICIT, 1);
       osig->local_flag(true);
 
 	/* Handle the special case of a single bit equality
 	   operation. Make an XNOR gate instead of a comparator. */
       if ((width == 1) && ((op_ == 'e') || (op_ == 'E'))) {
-	    NetLogic*gate = new NetLogic(scope, des->local_symbol(path),
+	    NetLogic*gate = new NetLogic(scope, scope->local_hsymbol(),
 					 3, NetLogic::XNOR);
 	    connect(gate->pin(0), osig->pin(0));
 	    connect(gate->pin(1), lsig->pin(0));
@@ -237,7 +264,7 @@ NetNet* NetEBComp::synthesize(Design*des)
 	   operation. This is similar to single bit equality, but uses
 	   an XOR instead of an XNOR gate. */
       if ((width == 1) && ((op_ == 'n') || (op_ == 'N'))) {
-	    NetLogic*gate = new NetLogic(scope, des->local_symbol(path),
+	    NetLogic*gate = new NetLogic(scope, scope->local_hsymbol(),
 					 3, NetLogic::XOR);
 	    connect(gate->pin(0), osig->pin(0));
 	    connect(gate->pin(1), lsig->pin(0));
@@ -247,7 +274,7 @@ NetNet* NetEBComp::synthesize(Design*des)
       }
 
 
-      NetCompare*dev = new NetCompare(scope, des->local_symbol(path), width);
+      NetCompare*dev = new NetCompare(scope, scope->local_symbol(), width);
       des->add_node(dev);
 
       for (unsigned idx = 0 ;  idx < lsig->pin_count() ;  idx += 1)
@@ -289,6 +316,45 @@ NetNet* NetEBComp::synthesize(Design*des)
       return osig;
 }
 
+NetNet* NetEBMult::synthesize(Design*des)
+{
+      NetNet*lsig = left_->synthesize(des);
+      NetNet*rsig = right_->synthesize(des);
+
+      if (lsig == 0)
+	    return 0;
+
+      if (rsig == 0)
+	    return 0;
+
+      NetScope*scope = lsig->scope();
+      assert(scope);
+
+      NetMult*mult = new NetMult(scope, scope->local_symbol(),
+				 expr_width(),
+				 lsig->pin_count(),
+				 rsig->pin_count());
+      des->add_node(mult);
+
+      mult->set_signed( has_sign() );
+      mult->set_line(*this);
+
+      for (unsigned idx = 0 ;  idx < lsig->pin_count() ;  idx += 1)
+	    connect(mult->pin_DataA(idx), lsig->pin(idx));
+
+      for (unsigned idx = 0 ;  idx < rsig->pin_count() ;  idx += 1)
+	    connect(mult->pin_DataB(idx), lsig->pin(idx));
+
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
+			       NetNet::IMPLICIT, expr_width());
+      osig->local_flag(true);
+
+      for (unsigned idx = 0 ;  idx < osig->pin_count() ;  idx += 1)
+	    connect(mult->pin_Result(idx), osig->pin(idx));
+
+      return osig;
+}
+
 NetNet* NetEBDiv::synthesize(Design*des)
 {
       cerr << get_line() << ": internal error: cannot synthesize division: "
@@ -310,9 +376,9 @@ NetNet* NetEBLogic::synthesize(Design*des)
 
       NetScope*scope = lsig->scope();
       assert(scope);
-      string path = des->local_symbol(scope->name());
 
-      NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, 1);
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
+			       NetNet::IMPLICIT, 1);
       osig->local_flag(true);
 
 
@@ -322,12 +388,11 @@ NetNet* NetEBLogic::synthesize(Design*des)
 		 comparison with a single wide OR gate. So handle this
 		 magically. */
 
-	    string oname = des->local_symbol(path);
-	    NetLogic*olog;
+	    string oname = scope->local_hsymbol();
 
-	    olog = new NetLogic(scope, oname,
-				lsig->pin_count()+rsig->pin_count()+1,
-				NetLogic::OR);
+	    NetLogic*olog = new NetLogic(scope, oname,
+					 lsig->pin_count()+rsig->pin_count()+1,
+					 NetLogic::OR);
 
 	    connect(osig->pin(0), olog->pin(0));
 
@@ -347,7 +412,7 @@ NetNet* NetEBLogic::synthesize(Design*des)
 	      /* Create the logic AND gate. This is a single bit
 		 output, with inputs for each of the operands. */
 	    NetLogic*olog;
-	    string oname = des->local_symbol(path);
+	    string oname = scope->local_hsymbol();
 
 	    olog = new NetLogic(scope, oname, 3, NetLogic::AND);
 
@@ -372,6 +437,94 @@ NetNet* NetEBLogic::synthesize(Design*des)
       return osig;
 }
 
+NetNet* NetEBShift::synthesize(Design*des)
+{
+      if (! dynamic_cast<NetEConst*>(right_)) {
+	    NetExpr*tmp = right_->eval_tree();
+	    if (tmp) {
+		  delete right_;
+		  right_ = tmp;
+	    }
+      }
+
+      NetNet*lsig = left_->synthesize(des);
+      if (lsig == 0)
+	    return 0;
+
+      NetScope*scope = lsig->scope();
+
+	/* Detect the special case where the shift amount is
+	   constant. Evaluate the shift amount, and simply reconnect
+	   the left operand to the output, but shifted. */
+      if (NetEConst*rcon = dynamic_cast<NetEConst*>(right_)) {
+	    verinum shift_v = rcon->value();
+	    long shift = shift_v.as_long();
+
+	    if (op() == 'r')
+		  shift = 0-shift;
+
+	    assert(shift >= 0);
+	    if (shift == 0)
+		  return lsig;
+	    unsigned long ushift=shift;
+
+	    NetNet*osig = new NetNet(scope, scope->local_symbol(),
+				     NetNet::IMPLICIT, expr_width());
+	    osig->local_flag(true);
+
+	    NetConst*zcon = new NetConst(scope, scope->local_symbol(),
+					 verinum::V0);
+	    des->add_node(zcon);
+	    NetNet*zsig = new NetNet(scope, scope->local_symbol(),
+				     NetNet::WIRE, 1);
+	    connect(zcon->pin(0), zsig->pin(0));
+
+	    for (unsigned idx = 0 ;  idx < osig->pin_count() ;  idx += 1) {
+		  if (idx < ushift) {
+			connect(osig->pin(idx), zsig->pin(0));
+		  } else {
+			connect(osig->pin(idx), lsig->pin(idx-ushift));
+		  }
+	    }
+
+	    return osig;
+      }
+
+      NetNet*rsig = right_->synthesize(des);
+      if (rsig == 0)
+	    return 0;
+
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
+			       NetNet::IMPLICIT, expr_width());
+      osig->local_flag(true);
+
+      assert(op() == 'l');
+      NetCLShift*dev = new NetCLShift(scope, scope->local_symbol(),
+				      osig->pin_count(),
+				      rsig->pin_count());
+      des->add_node(dev);
+
+      for (unsigned idx = 0 ; idx < dev->width() ;  idx += 1)
+	    connect(dev->pin_Result(idx), osig->pin(idx));
+
+      assert(lsig->pin_count() >= dev->width());
+      for (unsigned idx = 0 ;  idx < dev->width() ;  idx += 1)
+	    connect(dev->pin_Data(idx), lsig->pin(idx));
+
+      for (unsigned idx = 0 ;  idx < dev->width_dist() ;  idx += 1)
+	    connect(dev->pin_Distance(idx), rsig->pin(idx));
+
+      verinum dir_v = (op() == 'r')? verinum::V1 : verinum::V0;
+      NetNet*dir_n = new NetNet(scope, scope->local_symbol(),
+				NetNet::WIRE, 1);
+      NetConst*dir = new NetConst(scope, scope->local_symbol(), dir_v);
+      des->add_node(dir);
+      connect(dev->pin_Direction(), dir->pin(0));
+      connect(dev->pin_Direction(), dir_n->pin(0));
+
+      return osig;
+}
+
 NetNet* NetEConcat::synthesize(Design*des)
 {
 	/* First, synthesize the operands. */
@@ -384,7 +537,7 @@ NetNet* NetEConcat::synthesize(Design*des)
       assert(scope);
 
 	/* Make a NetNet object to carry the output vector. */
-      string path = scope->name() + "." + scope->local_symbol();
+      string path = scope->local_symbol();
       NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, expr_width());
       osig->local_flag(true);
 
@@ -412,12 +565,12 @@ NetNet* NetEConst::synthesize(Design*des)
       NetScope*scope = des->find_root_scope();
       assert(scope);
 
-      string path = scope->name() + "." + scope->local_symbol();
+      string path = scope->local_symbol();
       unsigned width=expr_width();
 
       NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, width);
       osig->local_flag(true);
-      NetConst*con = new NetConst(scope, des->local_symbol(path), value());
+      NetConst*con = new NetConst(scope, scope->local_symbol(), value());
       for (unsigned idx = 0 ;  idx < width;  idx += 1)
 	    connect(osig->pin(idx), con->pin(idx));
 
@@ -425,6 +578,14 @@ NetNet* NetEConst::synthesize(Design*des)
       return osig;
 }
 
+NetNet* NetECReal::synthesize(Design*des)
+{
+      cerr << get_line() << ": error: Real constants are "
+	   << "not synthesizable." << endl;
+      des->errors += 1;
+      return 0;
+}
+
 /*
  * The bitwise unary logic operator (there is only one) is turned
  * into discrete gates just as easily as the binary ones above.
@@ -435,14 +596,13 @@ NetNet* NetEUBits::synthesize(Design*des)
 
       NetScope*scope = isig->scope();
       assert(scope);
-      string path = des->local_symbol(scope->name());
 
-      NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT,
-			       isig->pin_count());
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
+			       NetNet::IMPLICIT, isig->pin_count());
       osig->local_flag(true);
 
       for (unsigned idx = 0 ;  idx < osig->pin_count() ;  idx += 1) {
-	    string oname = des->local_symbol(path);
+	    string oname = scope->local_hsymbol();
 	    NetLogic*gate;
 
 	    switch (op()) {
@@ -468,12 +628,12 @@ NetNet* NetEUReduce::synthesize(Design*des)
 
       NetScope*scope = isig->scope();
       assert(scope);
-      string path = des->local_symbol(scope->name());
 
-      NetNet*osig = new NetNet(scope, path, NetNet::IMPLICIT, 1);
+      NetNet*osig = new NetNet(scope, scope->local_symbol(),
+			       NetNet::IMPLICIT, 1);
       osig->local_flag(true);
 
-      string oname = des->local_symbol(path);
+      string oname = scope->local_hsymbol();
       NetLogic*gate;
 
       switch (op()) {
@@ -522,6 +682,44 @@ NetNet* NetEUReduce::synthesize(Design*des)
       return osig;
 }
 
+NetNet* NetESelect::synthesize(Design *des)
+{
+	// XXXX For now, only support pad form
+      assert(base_ == 0);
+
+      NetNet*sub = expr_->synthesize(des);
+      if (sub == 0)
+	    return 0;
+
+      NetScope*scope = sub->scope();
+      NetNet*net = new NetNet(scope, scope->local_symbol(),
+			      NetNet::IMPLICIT, expr_width());
+      if (has_sign()) {
+	    unsigned idx;
+
+	    for (idx = 0 ;  idx < sub->pin_count() ;  idx += 1)
+		  connect(sub->pin(idx), net->pin(idx));
+
+	    for ( ;  idx < net->pin_count(); idx += 1)
+		  connect(sub->pin(sub->pin_count()-1), net->pin(idx));
+
+      } else {
+	    unsigned idx;
+	    for (idx = 0 ;  idx < sub->pin_count() ;  idx += 1)
+		  connect(sub->pin(idx), net->pin(idx));
+
+	    NetConst*tmp = new NetConst(scope, scope->local_symbol(),
+					verinum::V0);
+
+	    for ( ;  idx < net->pin_count() ;  idx += 1)
+		  connect(net->pin(idx), tmp->pin(0));
+
+	    des->add_node(tmp);
+      }
+
+      return net;
+}
+
 /*
  * Synthesize a ?: operator an a NetMux device. Connect the condition
  * expression to the select input, then connect the true and false
@@ -534,15 +732,18 @@ NetNet* NetETernary::synthesize(Design *des)
       NetNet*tsig = true_val_->synthesize(des);
       NetNet*fsig = false_val_->synthesize(des);
 
-      string path = csig->scope()->name()+"."+csig->scope()->local_symbol();
+      string path = csig->scope()->local_symbol();
 
       assert(csig->pin_count() == 1);
-      assert(tsig->pin_count() == fsig->pin_count());
-      unsigned width=tsig->pin_count();
+
+      unsigned width=expr_width();
       NetNet*osig = new NetNet(csig->scope(), path, NetNet::IMPLICIT, width);
       osig->local_flag(true);
 
-      string oname = des->local_symbol(path);
+      assert(width <= tsig->pin_count());
+      assert(width <= fsig->pin_count());
+
+      string oname = csig->scope()->local_symbol();
       NetMux *mux = new NetMux(csig->scope(), oname, width, 2, 1);
       for (unsigned idx = 0 ;  idx < width;  idx += 1) {
 	    connect(tsig->pin(idx), mux->pin_Data(idx, 1));
@@ -596,7 +797,7 @@ NetNet* NetESignal::synthesize(Design*des)
       NetScope*scope = net_->scope();
       assert(scope);
 
-      string name = scope->name() + "." + scope->local_symbol();
+      string name = scope->local_symbol();
       NetNet*tmp = new NetNet(scope, name, NetNet::NetNet::WIRE, wid);
       tmp->local_flag(true);
 
@@ -608,6 +809,40 @@ NetNet* NetESignal::synthesize(Design*des)
 
 /*
  * $Log: expr_synth.cc,v $
+ * Revision 1.47  2003/08/09 03:23:40  steve
+ *  Add support for IVL_LPM_MULT device.
+ *
+ * Revision 1.46  2003/07/26 03:34:42  steve
+ *  Start handling pad of expressions in code generators.
+ *
+ * Revision 1.45  2003/06/24 01:38:02  steve
+ *  Various warnings fixed.
+ *
+ * Revision 1.44  2003/04/19 04:52:56  steve
+ *  Less picky about expression widths while synthesizing ternary.
+ *
+ * Revision 1.43  2003/04/08 05:07:15  steve
+ *  Detect constant shift distances in synthesis.
+ *
+ * Revision 1.42  2003/04/08 04:33:55  steve
+ *  Synthesize shift expressions.
+ *
+ * Revision 1.41  2003/03/06 00:28:41  steve
+ *  All NetObj objects have lex_string base names.
+ *
+ * Revision 1.40  2003/02/26 01:29:24  steve
+ *  LPM objects store only their base names.
+ *
+ * Revision 1.39  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
+ *
+ * Revision 1.38  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
+ *
+ * Revision 1.37  2002/11/17 23:37:55  steve
+ *  Magnitude compare to 0.
+ *
  * Revision 1.36  2002/08/12 01:34:59  steve
  *  conditional ident string using autoconfig.
  *
@@ -623,131 +858,5 @@ NetNet* NetESignal::synthesize(Design*des)
  *
  *  Divide signal reference counts between rval
  *  and lval references.
- *
- * Revision 1.32  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.31  2001/12/30 17:06:52  steve
- *  Synthesize reduction logic.
- *
- * Revision 1.30  2001/12/18 05:34:02  steve
- *  Comments about MUX synthesis.
- *
- * Revision 1.29  2001/11/29 01:58:18  steve
- *  Handle part selects in l-values of DFF devices.
- *
- * Revision 1.28  2001/10/28 01:14:53  steve
- *  NetObj constructor finally requires a scope.
- *
- * Revision 1.27  2001/10/20 05:21:51  steve
- *  Scope/module names are char* instead of string.
- *
- * Revision 1.26  2001/08/31 22:59:48  steve
- *  synthesize the special case of compare with 0.
- *
- * Revision 1.25  2001/08/05 02:49:07  steve
- *  Properly synthesize part selects.
- *
- * Revision 1.24  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.23  2001/07/07 01:38:45  steve
- *  Put synthesized signals in proper scope.
- *
- * Revision 1.22  2001/06/15 04:14:18  steve
- *  Generate vvp code for GT and GE comparisons.
- *
- * Revision 1.21  2001/06/07 02:12:43  steve
- *  Support structural addition.
- *
- * Revision 1.20  2001/02/15 06:59:36  steve
- *  FreeBSD port has a maintainer now.
- *
- * Revision 1.19  2001/01/18 03:16:35  steve
- *  NetMux needs a scope. (PR#115)
- *
- * Revision 1.18  2000/11/29 23:16:18  steve
- *  Do not delete synthesized signals used in expressions.
- *
- * Revision 1.17  2000/11/29 05:24:00  steve
- *  synthesis for unary reduction ! and N operators.
- *
- * Revision 1.16  2000/11/29 02:09:52  steve
- *  Add support for || synthesis (PR#53)
- *
- * Revision 1.15  2000/10/07 19:45:43  steve
- *  Put logic devices into scopes.
- *
- * Revision 1.14  2000/05/02 00:58:12  steve
- *  Move signal tables to the NetScope class.
- *
- * Revision 1.13  2000/04/28 18:43:23  steve
- *  integer division in expressions properly get width.
- *
- * Revision 1.12  2000/04/20 00:28:03  steve
- *  Catch some simple identity compareoptimizations.
- *
- * Revision 1.11  2000/04/16 23:32:18  steve
- *  Synthesis of comparator in expressions.
- *
- *  Connect the NetEvent and related classes
- *  together better.
- *
- * Revision 1.10  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.9  2000/01/01 06:18:00  steve
- *  Handle synthesis of concatenation.
- *
- * Revision 1.8  1999/12/17 06:18:15  steve
- *  Rewrite the cprop functor to use the functor_t interface.
- *
- * Revision 1.7  1999/12/17 03:38:46  steve
- *  NetConst can now hold wide constants.
- *
- * Revision 1.6  1999/11/28 23:42:02  steve
- *  NetESignal object no longer need to be NetNode
- *  objects. Let them keep a pointer to NetNet objects.
- *
- * Revision 1.5  1999/11/27 19:07:57  steve
- *  Support the creation of scopes.
- *
- * Revision 1.4  1999/11/19 03:00:59  steve
- *  Whoops, created a signal with a duplicate name.
- *
- * Revision 1.3  1999/11/05 04:40:40  steve
- *  Patch to synthesize LPM_ADD_SUB from expressions,
- *  Thanks to Larry Doolittle. Also handle constants
- *  in expressions.
- *
- *  Synthesize adders in XNF, based on a patch from
- *  Larry. Accept synthesis of constants from Larry
- *  as is.
- *
- * Revision 1.2  1999/11/04 03:53:26  steve
- *  Patch to synthesize unary ~ and the ternary operator.
- *  Thanks to Larry Doolittle <LRDoolittle@lbl.gov>.
- *
- *  Add the LPM_MUX device, and integrate it with the
- *  ternary synthesis from Larry. Replace the lpm_mux
- *  generator in t-xnf.cc to use XNF EQU devices to
- *  put muxs into function units.
- *
- *  Rewrite elaborate_net for the PETernary class to
- *  also use the LPM_MUX device.
- *
- * Revision 1.1  1999/11/02 04:55:34  steve
- *  Add the synthesize method to NetExpr to handle
- *  synthesis of expressions, and use that method
- *  to improve r-value handling of LPM_FF synthesis.
- *
- *  Modify the XNF target to handle LPM_FF objects.
- *
  */
 

ieee1364-notes.txt

@@ -203,6 +203,34 @@ interpreted as a loop head, and this is what Icarus Verilog does, as
 well as all the other major Verilog tools, but the standard does not
 say this.
 
+* UNSIZED NUMERIC CONSTANTS ARE NOT LIMITED TO 32 BITS
+
+The Verilog standard allows Verilog implementations to limit the size
+of unsized constants to a bit width of at least 32. That means that a
+constant 17179869183 (36'h3_ffff_ffff) may overflow some compilers. In
+fact, it is common to limit these values to 32bits. However, a
+compiler may just as easily choose another width limit, for example
+64bits. That value is equally good.
+
+However, it is not *required* that an implementation truncate at 32
+bits, and in fact Icarus Verilog does not truncate at all. It will
+make the unsized constant as big as it needs to be to hold the value
+accurately. This is especially useful in situations like this;
+
+	    reg [width-1:0] foo = 17179869183;
+
+The programmer wants the constant to take on the width of the reg,
+which in this example is parameterized. Since constant sizes cannot be
+parameterized, the programmer ideally gives an unsized constant, which
+the compiler then expands/contracts to match the l-value.
+
+Also, by choosing to not ever truncate, Icarus Verilog can handle code
+written for a 64bit compiler as easily as for a 32bit compiler. In
+particular, any constants that the user does not expect to be
+arbitrarily truncated by his compiler will also not be truncated by
+Icarus Verilog, no matter what that other compiler chooses as a
+truncation point.
+
 
 * UNSIZED EXPRESSIONS AS PARAMETERS TO CONCATENATION {}
 
@@ -404,8 +432,87 @@ parameter range (i.e. parameter [5:0] foo = 9;) so Icarus Verilog will
 (or should) use the explicitly declared vector dimensions to interpret
 bit and part selects.
 
-$Id: ieee1364-notes.txt,v 1.13 2002/08/20 04:11:53 steve Exp $
+
+* EDGES OF VECTORS
+
+Consider this example:
+
+   reg [ 5:0] clock;
+   always @(posedge clock) [do stuff]
+
+The IEEE1364 standard clearly states that the @(posedge clock) looks
+only at the bit clock[0] (the least significant bit) to search for
+edges. It has been pointed out by some that Verilog XL instead
+implements it as "@(posedge |clock)": it looks for a rise in the
+reduction or of the vector. Cadence Design Systems technical support
+has been rumored to claim that the IEEE1364 specification is wrong,
+but NC-Verilog behaves according to the specification, and thus
+different from XL.
+
+Icarus Verilog, therefore, takes the position that the specification
+is clear and correct, and it behaves as does NC-Verilog in this
+matter.
+
+
+* REAL VARIABLES IN $dumpoff DEAD-ZONES
+
+The IEEE1364 standard clearly states that in VCD files, the $dumpoff
+section checkpoints all the dumped variables as X values. For reg and
+wire bits/vectors, this obviously means 'bx values. Icarus Verilog
+does this, for example:
+
+    $dumpoff
+    x!
+    x"
+    $end
+
+Real variables can also be included in VCD dumps, but it is not at
+all obvious what is supposed to be dumped into the $dumpoff-$end
+section of the VCD file. Verilog-XL dumps "r0 !" to set the real
+variables to the dead-zone value of 0.0, whereas other tools, such as
+ModelTech, ignore real variables in this section.
+
+For example (from XL):
+
+    $dumpoff
+    r0 !
+    r0 "
+    $end
+
+Icarus Verilog dumps NaN values for real variables in the
+$dumpoff-$end section of the VCD file. The NaN value is the IEEE754
+equivalent of an unknown value, and so better reflects the unknown
+(during the dead zone) status of the variable, like this:
+
+    $dumpoff
+    rNaN !
+    rNaN "
+    $end
+
+It turns out that NaN is conventionally accepted by scanf functions,
+and viewers that support real variables support NaN values. So while
+the IEEE1364 doesn't require this behavior, and given the variety that
+already seems to exist amongst VCD viewers in the wild, this behavior
+seems to be acceptable according to the standard, is a better mirror
+of 4-value behavior in the dead zone, and appears more user friendly
+when viewed by reasonable viewers.
+
+
+$Id: ieee1364-notes.txt,v 1.17 2003/07/15 03:49:22 steve Exp $
 $Log: ieee1364-notes.txt,v $
+Revision 1.17  2003/07/15 03:49:22  steve
+ Spelling fixes.
+
+Revision 1.16  2003/04/14 03:40:21  steve
+ Make some effort to preserve bits while
+ operating on constant values.
+
+Revision 1.15  2003/02/16 23:39:08  steve
+ NaN in dead zones of VCD dumps.
+
+Revision 1.14  2003/02/06 17:51:36  steve
+ Edge of vectors notes.
+
 Revision 1.13  2002/08/20 04:11:53  steve
  Support parameters with defined ranges.
 

iverilog-vpi.man

@@ -1,4 +1,4 @@
-.TH iverilog-vpi 1 "$Date: 2002/07/05 17:17:20 $" Version "$Date: 2002/07/05 17:17:20 $"
+.TH iverilog-vpi 1 "$Date: 2003/07/15 03:49:22 $" Version "$Date: 2003/07/15 03:49:22 $"
 .SH NAME
 iverilog-vpi - Compile front end for VPI modules
 
@@ -32,13 +32,37 @@ VPI modules to further reference external libraries.
 Normally, the output VPI module will be named after the first source
 file passed to the command. This flag sets the name (without the .vpi
 suffix) of the output vpi module.
+
+.SH "PC-ONLY OPTIONS"
+
+The PC port of \fIiverilog-vpi\fP includes two special flags needed to
+support the more intractable development environment. These flags help
+the program locate parts that it needs.
+
+.TP 8
+.B -mingw=\fIpath\fP
+Tell the program the root of the Mingw compiler tool suite. The
+\fBvvp\fP runtime is compiled with this compiler, and this is the
+compiler that \fIiverilog-vpi\fP expects to use to compile your source
+code. This is normally not needed, and if you do use it, it is only
+needed once. The compiler will save the \fIpath\fP in the registry for
+use later.
+
+.TP 8
+.B -ivl=\fIpath\fP
+Set for the use during compilation the root if the Icarus Verilog
+install. This is the place where you installed Icarus Verilog when you
+ran the installer. This flag is also only needed once, and the path is
+stored in the registry for future use.
+
 .SH "AUTHOR"
 .nf
 Steve Williams ([email protected])
 
 .SH SEE ALSO
 iverilog(1), vvp(1),
-.BR "<http://www.icarus.com/eda/verilog/>"
+.BR "<http://www.icarus.com/eda/verilog/>",
+.BR "<http://www.mingw.org>",
 
 .SH COPYRIGHT
 .nf

iverilog.conf

@@ -32,7 +32,7 @@
 #
 #     %f  Substitute the -f flags from the command line.
 #
-#     %g  Substitule the -g flag
+#     %g  Substitute the -g flag
 #
 #     %s  Substitute the start module (-s flag) from the user.
 #
@@ -57,7 +57,7 @@
 #       terminated by a ``]'' character.
 
 
-# This is the null (no op) target. Thre is a synthesis version and a
+# This is the null (no op) target. There is a synthesis version and a
 # non-synthesis version. Normally, this does not matter, but this can
 # be useful and interesting if the -N flag is included.
 
@@ -80,7 +80,7 @@
 # This is the XNF code generator.
 
 [-txnf]
-<ivl>%B/ivl -C%C %[v-v] %g %s %[M-M%M] %[N-N%N] %[T-T%T] -txnf -Fsynth2 -Fsynth -Fsyn-rules -Fxnfio -Fcprop -Fnodangle -o%o -- -
+<ivl>%B/ivl -C%C %[v-v] %g %s %[M-M%M] %[N-N%N] %[T-T%T] -txnf -Fsynth -Fsyn-rules -Fxnfio -Fcprop -Fnodangle -o%o -- -
 
 # And this is another XNF code generator, under development.
 [-tfpga]

ivl.def

@@ -25,6 +25,8 @@ ivl_event_pos
 ivl_expr_type
 ivl_expr_bits
 ivl_expr_def
+ivl_expr_dvalue
+ivl_expr_event
 ivl_expr_lsi
 ivl_expr_memory
 ivl_expr_name
@@ -32,6 +34,7 @@ ivl_expr_opcode
 ivl_expr_oper1
 ivl_expr_oper2
 ivl_expr_oper3
+ivl_expr_parameter
 ivl_expr_parm
 ivl_expr_parms
 ivl_expr_repeat
@@ -40,6 +43,8 @@ ivl_expr_signal
 ivl_expr_signed
 ivl_expr_string
 ivl_expr_uvalue
+ivl_expr_value
+ivl_expr_variable
 ivl_expr_width
 
 ivl_logic_attr
@@ -71,7 +76,11 @@ ivl_lpm_q
 ivl_lpm_scope
 ivl_lpm_select
 ivl_lpm_selects
+ivl_lpm_signed
 ivl_lpm_size
+ivl_lpm_sset_value
+ivl_lpm_sync_clr
+ivl_lpm_sync_set
 ivl_lpm_type
 ivl_lpm_width
 
@@ -82,6 +91,7 @@ ivl_lval_part_off
 ivl_lval_pin
 ivl_lval_pins
 ivl_lval_sig
+ivl_lval_var
 
 ivl_memory_basename
 ivl_memory_root
@@ -103,6 +113,11 @@ ivl_nexus_ptr_lpm
 ivl_nexus_ptr_log
 ivl_nexus_ptr_sig
 
+ivl_parameter_basename
+ivl_parameter_expr
+
+ivl_scope_attr_cnt
+ivl_scope_attr_val
 ivl_scope_basename
 ivl_scope_children
 ivl_scope_def
@@ -115,13 +130,18 @@ ivl_scope_lpm
 ivl_scope_mem
 ivl_scope_mems
 ivl_scope_name
+ivl_scope_param
+ivl_scope_params
 ivl_scope_parent
 ivl_scope_port
 ivl_scope_ports
 ivl_scope_sigs
 ivl_scope_sig
+ivl_scope_time_units
 ivl_scope_type
 ivl_scope_tname
+ivl_scope_var
+ivl_scope_vars
 
 ivl_signal_attr
 ivl_signal_attr_cnt
@@ -174,3 +194,6 @@ ivl_udp_nin
 ivl_udp_row
 ivl_udp_rows
 ivl_udp_sequ
+
+ivl_variable_name
+ivl_variable_type

ivl_target.h

@@ -1,7 +1,7 @@
 #ifndef __ivl_target_H
 #define __ivl_target_H
 /*
- * Copyright (c) 2000 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2003 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: ivl_target.h,v 1.108 2002/10/23 01:47:17 steve Exp $"
+#ident "$Id: ivl_target.h,v 1.121 2003/08/15 02:23:52 steve Exp $"
 #endif
 
 #ifdef __cplusplus
@@ -95,6 +95,12 @@ _BEGIN_DECL
  *    there are backward references to all the device pins that point
  *    to it.
  *
+ * ivl_parameter_t
+ *    Scopes have zero or more parameter objects that represent
+ *    parameters that the source defined. The parameter has a value
+ *    that is fully elaborated, with defparams and other parameter
+ *    overrides taken care of.
+ *
  * ivl_process_t
  *    A Verilog process is represented by one of these. A process may
  *    be an "initial" or an "always" process. These come from initial
@@ -120,6 +126,10 @@ _BEGIN_DECL
  * -- A Note About Names --
  * The names of objects are complete, hierarchical names. That is,
  * they include the instance name of the module that contains them.
+ *
+ * basenames are the name of the object without the containing
+ * scope. These names are unique within a scope, but not necessarily
+ * throughout the design.
  */
 typedef struct ivl_design_s   *ivl_design_t;
 typedef struct ivl_event_s    *ivl_event_t;
@@ -132,11 +142,13 @@ typedef struct ivl_udp_s      *ivl_udp_t;
 typedef struct ivl_net_probe_s*ivl_net_probe_t;
 typedef struct ivl_nexus_s    *ivl_nexus_t;
 typedef struct ivl_nexus_ptr_s*ivl_nexus_ptr_t;
+typedef struct ivl_parameter_s*ivl_parameter_t;
 typedef struct ivl_process_s  *ivl_process_t;
 typedef struct ivl_scope_s    *ivl_scope_t;
 typedef struct ivl_signal_s   *ivl_signal_t;
 typedef struct ivl_memory_s   *ivl_memory_t;
 typedef struct ivl_statement_s*ivl_statement_t;
+typedef struct ivl_variable_s *ivl_variable_t;
 
 /*
  * These are types that are defined as enumerations. These have
@@ -155,23 +167,28 @@ typedef enum ivl_drive_e {
       IVL_DR_SUPPLY = 7
 } ivl_drive_t;
 
-/* This is the type of an ivl_expr_t object. */
+/* This is the type of an ivl_expr_t object. The explicit numbers
+   allow additions to the enumeration without causing values to shift
+   and incompatibilities to be introduced. */
 typedef enum ivl_expr_type_e {
       IVL_EX_NONE = 0,
-      IVL_EX_BITSEL,
-      IVL_EX_BINARY,
-      IVL_EX_CONCAT,
-      IVL_EX_MEMORY,
-      IVL_EX_NUMBER,
-      IVL_EX_SCOPE,
-      IVL_EX_SELECT,
-      IVL_EX_SFUNC,
-      IVL_EX_SIGNAL,
-      IVL_EX_STRING,
-      IVL_EX_TERNARY,
-      IVL_EX_UFUNC,
-      IVL_EX_ULONG,
-      IVL_EX_UNARY
+      IVL_EX_BITSEL = 1,
+      IVL_EX_BINARY = 2,
+      IVL_EX_CONCAT = 3,
+      IVL_EX_EVENT  = 17,
+      IVL_EX_MEMORY = 4,
+      IVL_EX_NUMBER = 5,
+      IVL_EX_SCOPE  = 6,
+      IVL_EX_SELECT = 7,
+      IVL_EX_SFUNC  = 8,
+      IVL_EX_SIGNAL = 9,
+      IVL_EX_STRING = 10,
+      IVL_EX_TERNARY = 11,
+      IVL_EX_UFUNC = 12,
+      IVL_EX_ULONG = 13,
+      IVL_EX_UNARY = 14,
+      IVL_EX_VARIABLE = 15,
+      IVL_EX_REALNUM  = 16
 } ivl_expr_type_t;
 
 /* This is the type code for an ivl_net_logic_t object. */
@@ -259,39 +276,46 @@ typedef enum ivl_signal_type_e {
       IVL_SIT_TRI0,
       IVL_SIT_TRI1,
       IVL_SIT_TRIAND,
-      IVL_SIT_TRIOR,
-      IVL_SIT_WAND,
-      IVL_SIT_WOR
+      IVL_SIT_TRIOR
 } ivl_signal_type_t;
 
 /* This is the type code for ivl_statement_t objects. */
 typedef enum ivl_statement_type_e {
-      IVL_ST_NONE   = 0,
-      IVL_ST_NOOP   = 1,
-      IVL_ST_ASSIGN,
-      IVL_ST_ASSIGN_NB,
-      IVL_ST_BLOCK,
-      IVL_ST_CASE,
-      IVL_ST_CASEX,
-      IVL_ST_CASEZ,
-      IVL_ST_CASSIGN,
-      IVL_ST_CONDIT,
-      IVL_ST_DEASSIGN,
-      IVL_ST_DELAY,
-      IVL_ST_DELAYX,
-      IVL_ST_DISABLE,
-      IVL_ST_FORCE,
-      IVL_ST_FOREVER,
-      IVL_ST_FORK,
-      IVL_ST_RELEASE,
-      IVL_ST_REPEAT,
-      IVL_ST_STASK,
-      IVL_ST_TRIGGER,
-      IVL_ST_UTASK,
-      IVL_ST_WAIT,
-      IVL_ST_WHILE
+      IVL_ST_NONE    = 0,
+      IVL_ST_NOOP    = 1,
+      IVL_ST_ASSIGN    = 2,
+      IVL_ST_ASSIGN_NB = 3,
+      IVL_ST_BLOCK   = 4,
+      IVL_ST_CASE    = 5,
+      IVL_ST_CASER   = 24, /* Case statement with real expressions. */
+      IVL_ST_CASEX   = 6,
+      IVL_ST_CASEZ   = 7,
+      IVL_ST_CASSIGN = 8,
+      IVL_ST_CONDIT  = 9,
+      IVL_ST_DEASSIGN = 10,
+      IVL_ST_DELAY   = 11,
+      IVL_ST_DELAYX  = 12,
+      IVL_ST_DISABLE = 13,
+      IVL_ST_FORCE   = 14,
+      IVL_ST_FOREVER = 15,
+      IVL_ST_FORK    = 16,
+      IVL_ST_RELEASE = 17,
+      IVL_ST_REPEAT  = 18,
+      IVL_ST_STASK   = 19,
+      IVL_ST_TRIGGER = 20,
+      IVL_ST_UTASK   = 21,
+      IVL_ST_WAIT    = 22,
+      IVL_ST_WHILE   = 23
 } ivl_statement_type_t;
 
+/* This is the type of a variable, and also used as the type for an
+   expression. */
+typedef enum ivl_variable_type_e {
+      IVL_VT_VOID = 0,  /* Not used */
+      IVL_VT_REAL,
+      IVL_VT_VECTOR
+} ivl_variable_type_t;
+
 /* This is the type of the function to apply to a process. */
 typedef int (*ivl_process_f)(ivl_process_t net, void*cd);
 
@@ -377,15 +401,17 @@ extern int         ivl_const_signed(ivl_net_const_t net);
  * Events are a unification of named events and implicit events
  * generated by the @ statements.
  *
- * ivl_event_name
+ * ivl_event_name (Obsolete)
  * ivl_event_basename
+ *    Return the name of the event. The basename is the name within
+ *    the scope, as declared by the user.
  *
  * ivl_event_edge
  *    Return the edge type for the event. If this is a named event
  *    that has no network input, then the edge is IVL_EDGE_NONE.
  */
-extern const char*     ivl_event_name(ivl_event_t net);
-extern const char*     ivl_event_basename(ivl_event_t net);
+extern const char* ivl_event_name(ivl_event_t net);
+extern const char* ivl_event_basename(ivl_event_t net);
 
 extern unsigned    ivl_event_nany(ivl_event_t net);
 extern ivl_nexus_t ivl_event_any(ivl_event_t net, unsigned idx);
@@ -416,28 +442,42 @@ extern ivl_nexus_t ivl_event_pos(ivl_event_t net, unsigned idx);
  *    type, which can affect how some of the other expression methods
  *    operate on the node
  *
+ * ivl_expr_value
+ *    Get the data type of the expression node. This uses the variable
+ *    type enum to express the type of the expression node.
+ *
  * ivl_expr_width
  *    This method returns the bit width of the expression at this
  *    node. It can be applied to any expression node, and returns the
  *    *output* width of the expression node.
  *
+ * ivl_expr_parameter
+ *    This function returns the ivl_parameter_t object that represents
+ *    this object, or 0 (nil) if it is not a parameter value. This
+ *    function allows the code generator to detect the case where the
+ *    expression is a parameter. This will normally only return a
+ *    non-nil value for constants.
+ *
  * ivl_expr_opcode
  *    IVL_EX_BINARY and IVL_EX_UNARY expression nodes include an
- *    upcode from this table:
+ *    opcode from this table:
  *              &   -- AND
  *              A   -- NAND (~&)
  *              X   -- XNOR (~^)
  */
 
 extern ivl_expr_type_t ivl_expr_type(ivl_expr_t net);
+extern ivl_variable_type_t ivl_expr_value(ivl_expr_t net);
 
   /* IVL_EX_NUMBER */
 extern const char* ivl_expr_bits(ivl_expr_t net);
   /* IVL_EX_UFUNC */
 extern ivl_scope_t ivl_expr_def(ivl_expr_t net);
+  /* IVL_EX_REALNUM */
+extern double ivl_expr_dvalue(ivl_expr_t net);
   /* IVL_EX_SIGNAL */
 extern unsigned    ivl_expr_lsi(ivl_expr_t net);
-  /* IVL_EX_SIGNAL, IVL_EX_SFUNC */
+  /* IVL_EX_SIGNAL, IVL_EX_SFUNC, IVL_EX_VARIABLE */
 extern const char* ivl_expr_name(ivl_expr_t net);
   /* IVL_EX_BINARY IVL_EX_UNARY */
 extern char        ivl_expr_opcode(ivl_expr_t net);
@@ -447,12 +487,16 @@ extern ivl_expr_t  ivl_expr_oper1(ivl_expr_t net);
 extern ivl_expr_t  ivl_expr_oper2(ivl_expr_t net);
   /* IVL_EX_TERNARY */
 extern ivl_expr_t  ivl_expr_oper3(ivl_expr_t net);
+  /* and expression */
+extern ivl_parameter_t ivl_expr_parameter(ivl_expr_t net);
   /* IVL_EX_CONCAT IVL_EX_UFUNC */
 extern ivl_expr_t  ivl_expr_parm(ivl_expr_t net, unsigned idx);
   /* IVL_EX_CONCAT IVL_EX_SFUNC IVL_EX_UFUNC */
 extern unsigned    ivl_expr_parms(ivl_expr_t net);
   /* IVL_EX_CONCAT */
 extern unsigned    ivl_expr_repeat(ivl_expr_t net);
+  /* IVL_EX_EVENT */
+extern ivl_event_t ivl_expr_event(ivl_expr_t net);
   /* IVL_EX_SCOPE */
 extern ivl_scope_t ivl_expr_scope(ivl_expr_t net);
   /* IVL_EX_BITSEL */
@@ -463,6 +507,8 @@ extern int         ivl_expr_signed(ivl_expr_t net);
 extern const char* ivl_expr_string(ivl_expr_t net);
   /* IVL_EX_ULONG */
 extern unsigned long ivl_expr_uvalue(ivl_expr_t net);
+  /* IVL_EX_VARIABLE */
+extern ivl_variable_t ivl_expr_variable(ivl_expr_t net);
   /* any expression */
 extern unsigned    ivl_expr_width(ivl_expr_t net);
 
@@ -503,7 +549,7 @@ extern ivl_memory_t ivl_expr_memory(ivl_expr_t net);
  *    This method returns the type of logic gate that the cookie
  *    represents.
  *
- * ivl_logic_name
+ * ivl_logic_name (obsolete)
  *    This method returns the complete name of the logic gate. Every
  *    gate has a complete name (that includes the scope) even if the
  *    Verilog source doesn't include one. The compiler will choose one
@@ -518,7 +564,7 @@ extern ivl_memory_t ivl_expr_memory(ivl_expr_t net);
  * ivl_logic_pins
  * ivl_logic_pin
  *
- * ivl_logic_attr
+ * ivl_logic_attr (obsolete)
  *    Return the value of a specific attribute, given the key name as
  *    a string. If the key is not defined, then return 0 (null).
  *
@@ -563,7 +609,7 @@ extern const char* ivl_udp_name(ivl_udp_t net);
  *
  * These are the functions that apply to all LPM devices:
  *
- * ivl_lpm_name
+ * ivl_lpm_name (Obsolete)
  * ivl_lpm_basename
  *    Return the name of the device. The name is the name of the
  *    device with the scope part, and the basename is without the scope.
@@ -601,14 +647,20 @@ extern const char* ivl_udp_name(ivl_udp_t net);
  *    This is the size of the select input for a LPM_MUX device, or the 
  *    address bus width of an LPM_RAM.
  *
+ * ivl_lpm_signed
+ *    Arithmetic LPM devices may be signed or unsigned if there is a
+ *    distinction.
+ *
  * ivl_lpm_size
  *    In addition to a width, some devices have a size. The size is
  *    often the number of inputs per out, i.e., the number of inputs
  *    per bit for a MUX.
  */
-extern const char*    ivl_lpm_name(ivl_lpm_t net);
+
+extern const char*    ivl_lpm_name(ivl_lpm_t net); /* (Obsolete) */
 extern const char*    ivl_lpm_basename(ivl_lpm_t net);
 extern ivl_scope_t    ivl_lpm_scope(ivl_lpm_t net);
+extern int            ivl_lpm_signed(ivl_lpm_t net);
 extern ivl_lpm_type_t ivl_lpm_type(ivl_lpm_t net);
 extern unsigned       ivl_lpm_width(ivl_lpm_t net);
 
@@ -616,6 +668,9 @@ extern unsigned       ivl_lpm_width(ivl_lpm_t net);
 extern ivl_nexus_t ivl_lpm_async_clr(ivl_lpm_t net);
 extern ivl_nexus_t ivl_lpm_async_set(ivl_lpm_t net);
 extern ivl_expr_t  ivl_lpm_aset_value(ivl_lpm_t net);
+extern ivl_nexus_t ivl_lpm_sync_clr(ivl_lpm_t net);
+extern ivl_nexus_t ivl_lpm_sync_set(ivl_lpm_t net);
+extern ivl_expr_t  ivl_lpm_sset_value(ivl_lpm_t net);
   /* IVL_LPM_FF IVL_LPM_RAM */
 extern ivl_nexus_t ivl_lpm_clk(ivl_lpm_t net);
   /* IVL_LPM_UFUNC */
@@ -671,6 +726,12 @@ extern ivl_memory_t ivl_lpm_memory(ivl_lpm_t net);
  *    If the l-value is a variable, this method returns the signal
  *    object that is the target of the assign.
  *
+ * ivl_lval_var
+ *    If the l-value is a non-signal variable (i.e. a real) this
+ *    method returns the ivl_variable_t object that represents it.
+ *    If the lval is this sort of variable, then the part_off, idx and
+ *    pin methods do not apply.
+ *
  * ivl_lval_part_off
  *    The part select of the signal is based here. This is the
  *    canonical index of bit-0 of the part select.
@@ -690,6 +751,7 @@ extern ivl_memory_t ivl_lpm_memory(ivl_lpm_t net);
 extern ivl_expr_t  ivl_lval_mux(ivl_lval_t net);
 extern ivl_expr_t  ivl_lval_idx(ivl_lval_t net);
 extern ivl_memory_t ivl_lval_mem(ivl_lval_t net);
+extern ivl_variable_t ivl_lval_var(ivl_lval_t net);
 extern unsigned    ivl_lval_part_off(ivl_lval_t net);
 extern unsigned    ivl_lval_pins(ivl_lval_t net);
 extern ivl_nexus_t ivl_lval_pin(ivl_lval_t net, unsigned idx);
@@ -781,6 +843,37 @@ extern ivl_net_logic_t ivl_nexus_ptr_log(ivl_nexus_ptr_t net);
 extern ivl_lpm_t    ivl_nexus_ptr_lpm(ivl_nexus_ptr_t net);
 extern ivl_signal_t ivl_nexus_ptr_sig(ivl_nexus_ptr_t net);
 
+/* PARAMETER
+ * Parameters are named constants associated with a scope. The user
+ * may set in the Verilog source the value of parameters, and that
+ * leads to ivl_parameter_t objects contained in the ivl_scope_t
+ * objects.
+ *
+ * Parameters are essentially named constants. These constant values
+ * can be accessed by looking at the scope (using ivl_scope_param) or
+ * they can be discovered when they are used, via the
+ * ivl_expr_parameter function. The fact that a constant has a name
+ * (i.e. is a parameter) does not otherwise impose on the value or
+ * interpretation of the constant expression so far as ivl_target is
+ * concerned. The target may need this information, or may choose to
+ * completely ignore it.
+ *
+ * ivl_parameter_basename
+ *    return the name of the parameter.
+ *
+ * ivl_parameter_scope
+ *    Return the scope of the parameter. The parameter name is only
+ *    unique within its scope.
+ *
+ * ivl_parameter_expr
+ *    Return the value of the parameter. This should be a simple
+ *    constant expression, an IVL_EX_STRING or IVL_EX_NUMBER.
+ */
+extern const char* ivl_parameter_basename(ivl_parameter_t net);
+extern ivl_scope_t ivl_parameter_scope(ivl_parameter_t net);
+extern ivl_expr_t  ivl_parameter_expr(ivl_parameter_t net);
+
+
 /* SCOPE
  * Scopes of various sort have these properties. Use these methods to
  * access them. Scopes come to exist in the elaborated design
@@ -806,6 +899,10 @@ extern ivl_signal_t ivl_nexus_ptr_sig(ivl_nexus_ptr_t net);
  * - task scopes (IVL_SCT_TASK)
  *    [...]
  *
+ * ivl_scope_attr_cnt
+ * ivl_scope_attr_val
+ *    A scope may have attributes attached to it. These functions
+ *    allow the target to access the attributes values.
  *
  * ivl_scope_children
  *    A scope may in turn contain other scopes. This method iterates
@@ -825,6 +922,10 @@ extern ivl_signal_t ivl_nexus_ptr_sig(ivl_nexus_ptr_t net);
  * ivl_scope_events
  *    Scopes have 0 or more event objects in them.
  *
+ * ivl_scope_var
+ * ivl_scope_vars
+ *    Scopes have 0 or more variable objects in them.
+ *
  * ivl_scope_log
  * ivl_scope_logs
  *    Scopes have 0 or more logic devices in them. A logic device is
@@ -842,6 +943,11 @@ extern ivl_signal_t ivl_nexus_ptr_sig(ivl_nexus_ptr_t net);
  *    ivl_scope_basename is the name of the scope without the included
  *    hierarchy. 
  *
+ * ivl_scope_param
+ * ivl_scope_params
+ *    A scope has zero or more named parameters. These parameters have
+ *    a name and an expression value.
+ *
  * ivl_scope_parent
  *    If this is a non-root scope, then the parent is the scope that
  *    contains this scope. Otherwise, the parent is nil.
@@ -861,6 +967,11 @@ extern ivl_signal_t ivl_nexus_ptr_sig(ivl_nexus_ptr_t net);
  *    anything that can become and ivl_signal_t, include synthetic
  *    signals generated by the compiler.
  *
+ * ivl_scope_time_units
+ *    Scopes have their own intrinsic time units, typically from the
+ *    timescale compiler directive. This method returns the units as a
+ *    signed power of 10 value.
+ *
  * ivl_scope_type
  * ivl_scope_tname
  *    Scopes have a type and a type name. For example, if a scope is
@@ -869,6 +980,9 @@ extern ivl_signal_t ivl_nexus_ptr_sig(ivl_nexus_ptr_t net);
  *    returned by ivl_scope_name above.
  */
 
+extern unsigned        ivl_scope_attr_cnt(ivl_scope_t net);
+extern ivl_attribute_t ivl_scope_attr_val(ivl_scope_t net, unsigned idx);
+
 extern int          ivl_scope_children(ivl_scope_t net,
 				       ivl_scope_f func, void*cd);
 
@@ -882,8 +996,12 @@ extern unsigned     ivl_scope_lpms(ivl_scope_t net);
 extern ivl_lpm_t    ivl_scope_lpm(ivl_scope_t, unsigned idx);
 extern unsigned     ivl_scope_mems(ivl_scope_t net);
 extern ivl_memory_t ivl_scope_mem(ivl_scope_t net, unsigned idx);
+extern unsigned     ivl_scope_vars(ivl_scope_t net);
+extern ivl_variable_t ivl_scope_var(ivl_scope_t net, unsigned idx);
 extern const char*  ivl_scope_name(ivl_scope_t net);
 extern const char*  ivl_scope_basename(ivl_scope_t net);
+extern unsigned     ivl_scope_params(ivl_scope_t net);
+extern ivl_parameter_t ivl_scope_param(ivl_scope_t net, unsigned idx);
 extern ivl_scope_t  ivl_scope_parent(ivl_scope_t net);
 extern unsigned     ivl_scope_ports(ivl_scope_t net);
 extern ivl_signal_t ivl_scope_port(ivl_scope_t net, unsigned idx);
@@ -891,6 +1009,7 @@ extern unsigned     ivl_scope_sigs(ivl_scope_t net);
 extern ivl_signal_t ivl_scope_sig(ivl_scope_t net, unsigned idx);
 extern ivl_scope_type_t ivl_scope_type(ivl_scope_t net);
 extern const char*  ivl_scope_tname(ivl_scope_t net);
+extern int          ivl_scope_time_units(ivl_scope_t net);
 
 
 /* SIGNALS
@@ -929,7 +1048,7 @@ extern const char*  ivl_scope_tname(ivl_scope_t net);
  *    This function returns the fully scoped hierarchical name for the
  *    signal. The name refers to the entire vector that is the signal.
  *
- *    NOTE: This function is deprecated. The heirarchical name is too
+ *    NOTE: This function is deprecated. The hierarchical name is too
  *    vague a construct when escaped names can have . characters in
  *    them. Do no use this function in new code, it will disappear.
  *
@@ -1024,11 +1143,11 @@ extern ivl_scope_t ivl_stmt_block_scope(ivl_statement_t net);
 extern ivl_statement_t ivl_stmt_block_stmt(ivl_statement_t net, unsigned i);
   /* IVL_ST_UTASK IVL_ST_DISABLE */
 extern ivl_scope_t ivl_stmt_call(ivl_statement_t net);
-  /* IVL_ST_CASE */
+  /* IVL_ST_CASE,IVL_ST_CASER,IVL_ST_CASEX,IVL_ST_CASEZ */
 extern unsigned ivl_stmt_case_count(ivl_statement_t net);
-  /* IVL_ST_CASE */
+  /* IVL_ST_CASE,IVL_ST_CASER,IVL_ST_CASEX,IVL_ST_CASEZ */
 extern ivl_expr_t ivl_stmt_case_expr(ivl_statement_t net, unsigned i);
-  /* IVL_ST_CASE */
+  /* IVL_ST_CASE,IVL_ST_CASER,IVL_ST_CASEX,IVL_ST_CASEZ */
 extern ivl_statement_t ivl_stmt_case_stmt(ivl_statement_t net, unsigned i);
   /* IVL_ST_CONDIT IVL_ST_CASE IVL_ST_REPEAT IVL_ST_WHILE */
 extern ivl_expr_t      ivl_stmt_cond_expr(ivl_statement_t net);
@@ -1065,6 +1184,19 @@ extern ivl_expr_t ivl_stmt_rval(ivl_statement_t net);
      IVL_ST_WAIT, IVL_ST_WHILE */
 extern ivl_statement_t ivl_stmt_sub_stmt(ivl_statement_t net);
 
+/*
+ * These functions manipulate variable objects.
+ *
+ * ivl_variable_name
+ *   Return the base name of the variable.
+ *
+ * ivl_variable_type
+ *   Return the type of the variable. The ivl_variable_type_t is an
+ *   enumeration that is defined earlier.
+ */
+extern const char*         ivl_variable_name(ivl_variable_t net);
+extern ivl_variable_type_t ivl_variable_type(ivl_variable_t net);
+
 
 #if defined(__MINGW32__) || defined (__CYGWIN32__)
 #  define DLLEXPORT __declspec(dllexport)
@@ -1091,85 +1223,49 @@ _END_DECL
 
 /*
  * $Log: ivl_target.h,v $
- * Revision 1.108  2002/10/23 01:47:17  steve
- *  Fix synth2 handling of aset/aclr signals where
- *  flip-flops are split by begin-end blocks.
+ * Revision 1.121  2003/08/15 02:23:52  steve
+ *  Add synthesis support for synchronous reset.
  *
- * Revision 1.107  2002/09/26 03:18:04  steve
- *  Generate vvp code for asynch set/reset of NetFF.
+ * Revision 1.120  2003/07/30 01:13:28  steve
+ *  Add support for triand and trior.
  *
- * Revision 1.106  2002/09/12 15:49:43  steve
- *  Add support for binary nand operator.
+ * Revision 1.119  2003/06/23 01:25:44  steve
+ *  Module attributes make it al the way to ivl_target.
  *
- * Revision 1.105  2002/08/24 05:03:40  steve
- *  Missing declaration of ivl_memory_scope.
+ * Revision 1.118  2003/05/14 05:26:41  steve
+ *  Support real expressions in case statements.
  *
- * Revision 1.104  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
+ * Revision 1.117  2003/04/22 04:48:29  steve
+ *  Support event names as expressions elements.
  *
- * Revision 1.103  2002/08/05 04:18:45  steve
- *  Store only the base name of memories.
+ * Revision 1.116  2003/04/11 05:18:08  steve
+ *  Handle signed magnitude compare all the
+ *  way through to the vvp code generator.
  *
- * Revision 1.102  2002/08/04 18:28:14  steve
- *  Do not use hierarchical names of memories to
- *  generate vvp labels. -tdll target does not
- *  used hierarchical name string to look up the
- *  memory objects in the design.
+ * Revision 1.115  2003/03/10 23:40:53  steve
+ *  Keep parameter constants for the ivl_target API.
  *
- * Revision 1.101  2002/07/05 21:26:17  steve
- *  Avoid emitting to vvp local net symbols.
+ * Revision 1.114  2003/03/06 01:24:37  steve
+ *  Obsolete the ivl_event_name function.
  *
- * Revision 1.100  2002/06/21 04:59:35  steve
- *  Carry integerness throughout the compilation.
+ * Revision 1.113  2003/03/06 00:28:41  steve
+ *  All NetObj objects have lex_string base names.
  *
- * Revision 1.99  2002/06/11 03:34:33  steve
- *  Spelling patch (Larry Doolittle)
+ * Revision 1.112  2003/02/26 01:29:24  steve
+ *  LPM objects store only their base names.
  *
- * Revision 1.98  2002/05/27 00:08:45  steve
- *  Support carrying the scope of named begin-end
- *  blocks down to the code generator, and have
- *  the vvp code generator use that to support disable.
+ * Revision 1.111  2003/01/30 16:23:07  steve
+ *  Spelling fixes.
  *
- * Revision 1.97  2002/05/26 01:39:02  steve
- *  Carry Verilog 2001 attributes with processes,
- *  all the way through to the ivl_target API.
+ * Revision 1.110  2003/01/26 21:15:58  steve
+ *  Rework expression parsing and elaboration to
+ *  accommodate real/realtime values and expressions.
  *
- *  Divide signal reference counts between rval
- *  and lval references.
- *
- * Revision 1.96  2002/05/24 04:36:23  steve
- *  Verilog 2001 attriubtes on nets/wires.
- *
- * Revision 1.95  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.94  2002/03/17 19:30:20  steve
- *  Add API to support user defined function.
- *
- * Revision 1.93  2002/03/09 02:10:22  steve
- *  Add the NetUserFunc netlist node.
- *
- * Revision 1.92  2002/01/28 00:52:41  steve
- *  Add support for bit select of parameters.
- *  This leads to a NetESelect node and the
- *  vvp code generator to support that.
- *
- * Revision 1.91  2002/01/03 04:19:01  steve
- *  Add structural modulus support down to vvp.
- *
- * Revision 1.90  2001/12/15 02:13:17  steve
- *  The IVL_SIT_WIRE type does not exist, it is a
- *  synonym for IVL_SIT_TRI.
- *
- * Revision 1.89  2001/12/06 03:11:00  steve
- *  Add ivl_logic_delay function to ivl_target.
- *
- * Revision 1.88  2001/11/14 03:28:49  steve
- *  DLL target support for force and release.
+ * Revision 1.109  2002/12/21 00:55:58  steve
+ *  The $time system task returns the integer time
+ *  scaled to the local units. Change the internal
+ *  implementation of vpiSystemTime the $time functions
+ *  to properly account for this. Also add $simtime
+ *  to get the simulation time.
  */
 #endif

ivlpp/Makefile.in

@@ -18,7 +18,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.12 2001/08/10 00:39:22 steve Exp $"
+#ident "$Id: Makefile.in,v 1.13 2003/02/27 22:13:22 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -47,7 +47,10 @@ LDFLAGS = @LDFLAGS@
 all: ivlpp
 
 clean:
-	rm -f *.o lexor.c parse.c parse.h parse.output
+	rm -f *.o lexor.c parse.c parse.h parse.output ivlpp
+
+distclean: clean
+	rm -f Makefile
 
 O = main.o lexor.o parse.o
 

ivlpp/lexor.lex

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: lexor.lex,v 1.35 2002/09/25 02:23:08 steve Exp $"
+#ident "$Id: lexor.lex,v 1.40 2003/07/15 02:41:07 steve Exp $"
 #endif
 
 # include "config.h"
@@ -104,32 +104,46 @@ W [ \t\b\f]+
 
 %%
 
-"//".* { ECHO; }
+"//"[^\r\n]* { ECHO; }
 
   /* detect multiline, c-style comments, passing them directly to the
      output. This is necessary to allow for ignoring directives that
      are included within the comments. */
 
 "/*" { comment_enter = YY_START; BEGIN(CCOMMENT); ECHO; }
-<CCOMMENT>.    { ECHO; }
-<CCOMMENT>\n   { istack->lineno += 1; ECHO; }
+<CCOMMENT>[^\r\n]    { ECHO; }
+<CCOMMENT>\n\r { istack->lineno += 1; fputc('\n', yyout); }
+<CCOMMENT>\r\n { istack->lineno += 1; fputc('\n', yyout); }
+<CCOMMENT>\n   { istack->lineno += 1; fputc('\n', yyout); }
+<CCOMMENT>\r   { istack->lineno += 1; fputc('\n', yyout); }
 <CCOMMENT>"*/" { BEGIN(comment_enter); ECHO; }
 
   /* Detect and pass multiline pragma comments. As with C-style
-     comments, pragma comments are passed through, and CPP directives
-     contained within are ignored. */
+     comments, pragma comments are passed through, and preprocessor
+     directives contained within are ignored. Contains macros are
+     expanded, however. */
 
 "(*" { comment_enter = YY_START; BEGIN(PCOMENT); ECHO; }
-<PCOMENT>.    { ECHO; }
-<PCOMENT>\n   { istack->lineno += 1; ECHO; }
+<PCOMENT>[^\r\n]    { ECHO; }
+<PCOMENT>\n\r { istack->lineno += 1; fputc('\n', yyout); }
+<PCOMENT>\r\n { istack->lineno += 1; fputc('\n', yyout); }
+<PCOMENT>\n   { istack->lineno += 1; fputc('\n', yyout); }
+<PCOMENT>\r   { istack->lineno += 1; fputc('\n', yyout); }
 <PCOMENT>"*)" { BEGIN(comment_enter); ECHO; }
+<PCOMENT>`[a-zA-Z][a-zA-Z0-9_$]* { def_match(); }
 
-  /* Strings do not contain macros or preprocessor directives. */
+  /* Strings do not contain preprocessor directives, but can expand
+     macros. If that happens, they get expanded in the context of the
+     string. */
 \"            { comment_enter = YY_START; BEGIN(CSTRING); ECHO; }
-<CSTRING>\\\" { yymore(); }
-<CSTRING>\n   { yymore(); }
+<CSTRING>\\\" { ECHO; }
+<CSTRING>\r\n { fputc('\n', yyout); }
+<CSTRING>\n\r { fputc('\n', yyout); }
+<CSTRING>\n   { fputc('\n', yyout); }
+<CSTRING>\r   { fputc('\n', yyout); }
 <CSTRING>\"   { BEGIN(comment_enter);  ECHO; }
-<CSTRING>.    { yymore(); }
+<CSTRING>.    { ECHO; }
+<CSTRING>`[a-zA-Z][a-zA-Z0-9_$]* { def_match(); }
 
   /* This set of patterns matches the include directive and the name
      that follows it. when the directive ends, the do_include function
@@ -151,9 +165,10 @@ W [ \t\b\f]+
   /* These finish the include directive (EOF or EOL) so I revert the
      lexor state and execute the inclusion. */
 
-<PPINCLUDE>\n { istack->lineno += 1; yy_pop_state(); do_include(); }
 <PPINCLUDE>\r\n { istack->lineno += 1; yy_pop_state(); do_include(); }
 <PPINCLUDE>\n\r { istack->lineno += 1; yy_pop_state(); do_include(); }
+<PPINCLUDE>\n   { istack->lineno += 1; yy_pop_state(); do_include(); }
+<PPINCLUDE>\r   { istack->lineno += 1; yy_pop_state(); do_include(); }
 <PPINCLUDE><<EOF>> { istack->lineno += 1; yy_pop_state(); do_include(); }
 
   /* Anything that is not matched by the above is an error of some
@@ -172,11 +187,9 @@ W [ \t\b\f]+
 
 `define{W}[a-zA-Z_][a-zA-Z0-9_$]*{W}? { yy_push_state(PPDEFINE); def_start(); }
 
-<PPDEFINE>.* {
-      do_define();
-  }
+<PPDEFINE>.*[^\r\n] { do_define(); }
 
-<PPDEFINE>(\n|"\r\n"|"\n\r") {
+<PPDEFINE>(\n|"\r\n"|"\n\r"|\r) {
       if (def_is_done()) {
 	    def_finish();
 	    istack->lineno += 1;
@@ -239,8 +252,12 @@ W [ \t\b\f]+
 <IFDEF_FALSE>`else { BEGIN(IFDEF_TRUE); }
 <IFDEF_SUPR>`else  {  }
 
-<IFDEF_FALSE,IFDEF_SUPR>.  {  }
-<IFDEF_FALSE,IFDEF_SUPR>\n { istack->lineno += 1; fputc('\n', yyout); }
+<IFDEF_FALSE,IFDEF_SUPR>"//"[^\r\n]* {  }
+<IFDEF_FALSE,IFDEF_SUPR>[^\r\n]  {  }
+<IFDEF_FALSE,IFDEF_SUPR>\n\r { istack->lineno += 1; fputc('\n', yyout); }
+<IFDEF_FALSE,IFDEF_SUPR>\r\n { istack->lineno += 1; fputc('\n', yyout); }
+<IFDEF_FALSE,IFDEF_SUPR>\n   { istack->lineno += 1; fputc('\n', yyout); }
+<IFDEF_FALSE,IFDEF_SUPR>\r   { istack->lineno += 1; fputc('\n', yyout); }
 
 <IFDEF_FALSE,IFDEF_TRUE,IFDEF_SUPR>`endif {
       yy_pop_state();
@@ -252,11 +269,14 @@ W [ \t\b\f]+
   /* Any text that is not a directive just gets passed through to the
      output. Very easy. */
 
-. { ECHO; }
-\n { istack->lineno += 1; ECHO; }
+[^\r\n] { ECHO; }
+\n\r { istack->lineno += 1; fputc('\n', yyout); }
+\r\n { istack->lineno += 1; fputc('\n', yyout); }
+\n   { istack->lineno += 1; fputc('\n', yyout); }
+\r   { istack->lineno += 1; fputc('\n', yyout); }
 
   /* Absorb the rest of the line when a broken directive is detected. */
-<ERROR_LINE>.* { yy_pop_state(); }
+<ERROR_LINE>[^\r\n]* { yy_pop_state(); }
 
 %%
   /* Defined macros are kept in this table for convenient lookup. As
@@ -305,7 +325,6 @@ static int is_defined(const char*name)
 static void def_match()
 {
       struct define_t*cur = def_lookup(yytext+1);
-
       if (cur) {
 	    struct include_stack_t*isp;
 
@@ -319,7 +338,7 @@ static void def_match()
 	    isp->next = istack;
 	    istack->yybs = YY_CURRENT_BUFFER;
 	    istack = isp;
-	    yy_switch_to_buffer(yy_new_buffer(istack->file, YY_BUF_SIZE));
+	    yy_switch_to_buffer(yy_create_buffer(istack->file, YY_BUF_SIZE));
 
       } else {
 	    emit_pathline(istack);
@@ -404,11 +423,32 @@ static void do_define()
 
       define_continue_flag = 0;
 
-	/* FIXME: This strips trailing line comments out of the
-	   definition. It's not adequate as the "//" may have been
-	   quoted or commented, but it'll do for now. */
-      if(cp = strstr(yytext, "//"))
-	    *cp = 0;
+	/* Look for comments in the definition, and remove them. The
+	   "//" style comments go to the end of the line and terminate
+	   the definition, but the multi-line comments are simply cut
+	   out, and the define continues. */
+      cp = strchr(yytext, '/');
+      while (cp && *cp) {
+	    if (cp[1] == '/') {
+		  *cp = 0;
+		  break;
+	    }
+
+	    if (cp[1] == '*') {
+		  char*tail = strstr(cp+2, "*/");
+		  if (tail == 0) {
+			fprintf(stderr, "%s:%u: Unterminated comment "
+				"in define\n", istack->path, istack->lineno);
+			*cp = 0;
+			break;
+		  }
+
+		  memmove(cp, tail+2, strlen(tail+2)+1);
+		  continue;
+	    }
+
+	    cp = strchr(cp+1, '/');
+      }
 
 	/* Trim trailing white space. */
       cp = yytext + strlen(yytext);
@@ -629,7 +669,7 @@ static void do_include()
       istack->yybs = YY_CURRENT_BUFFER;
       istack = standby;
       standby = 0;
-      yy_switch_to_buffer(yy_new_buffer(istack->file, YY_BUF_SIZE));
+      yy_switch_to_buffer(yy_create_buffer(istack->file, YY_BUF_SIZE));
 
       if (line_direct_flag && istack->path)
 	    fprintf(yyout, "\n`line %u \"%s\" 1\n",

lexor.lex

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #if !defined(WINNT) && !defined(macintosh)
-#ident "$Id: lexor.lex,v 1.73 2002/06/06 18:57:18 steve Exp $"
+#ident "$Id: lexor.lex,v 1.82 2003/06/18 03:55:18 steve Exp $"
 #endif
 
 # include "config.h"
@@ -80,10 +80,6 @@ void reset_lexor();
 static void line_directive();
 static void line_directive2();
 
-static verinum*make_sized_binary(const char*txt);
-static verinum*make_sized_dec(const char*txt);
-static verinum*make_sized_octal(const char*txt);
-static verinum*make_sized_hex(const char*txt);
 static verinum*make_unsized_binary(const char*txt);
 static verinum*make_unsized_dec(const char*txt);
 static verinum*make_unsized_octal(const char*txt);
@@ -132,7 +128,9 @@ W [ \t\b\f\r]+
 "(*" { return K_PSTAR; }
 "*)" { return K_STARP; }
 "<<" { return K_LS; }
-">>" { return K_RS; }
+"<<<" { return K_LS; /* Note: Functionally, <<< is the same as <<. */}
+">>"  { return K_RS; }
+">>>" { return K_RSS; }
 "<=" { return K_LE; }
 ">=" { return K_GE; }
 "=>" { return K_EG; }
@@ -152,6 +150,11 @@ W [ \t\b\f\r]+
 "+:" { return K_PO_POS; }
 "-:" { return K_PO_NEG; }
 
+  /* Watch out for the tricky case of (*). Cannot parse this as "(*"
+     and ")", but since I know that this is really ( * ), replace it
+     with "*" and return that. */
+"(*"{W}*")" { return '*'; }
+
 
 [}{;:\[\],()#=.@&!?<>%|^~+*/-] { return yytext[0]; }
 
@@ -174,6 +177,7 @@ W [ \t\b\f\r]+
 <UDPTABLE>\(\?\?\)  { return '*'; }
 <UDPTABLE>\(01\)    { return 'r'; }
 <UDPTABLE>\(0[xX]\) { return 'Q'; }
+<UDPTABLE>\(b[xX]\) { return 'q'; }
 <UDPTABLE>\(0\?\)   { return 'P'; }
 <UDPTABLE>\(10\)    { return 'f'; }
 <UDPTABLE>\(1[xX]\) { return 'M'; }
@@ -227,67 +231,19 @@ W [ \t\b\f\r]+
       yylval.text = strdup(yytext);
       return SYSTEM_IDENTIFIER; }
 
-[0-9][0-9_]*[ \t]*\'[sS]?[dD][ \t]*[0-9][0-9_]* {
-      yylval.number = make_sized_dec(yytext);
-      return NUMBER; }
-[0-9][0-9_]*[ \t]*\'[sS]?[bB][ \t]*[0-1xzXZ_\?]+ {
-      yylval.number = make_sized_binary(yytext);
-      return NUMBER; }
-[0-9][0-9_]*[ \t]*\'[sS]?[oO][ \t]*[0-7xzXZ_\?]+ {
-      yylval.number = make_sized_octal(yytext);
-      return NUMBER; }
-[0-9][0-9_]*[ \t]*\'[sS]?[hH][ \t]*[0-9a-fA-FxzXZ_\?]+ {
-      yylval.number = make_sized_hex(yytext);
-      return NUMBER; }
 
 \'[sS]?[dD][ \t]*[0-9][0-9_]*  { yylval.number = make_unsized_dec(yytext);
-                            return NUMBER; }
+                            return BASED_NUMBER; }
 \'[sS]?[bB][ \t]*[0-1xzXZ_\?]+ { yylval.number = make_unsized_binary(yytext);
-                        return NUMBER; }
+                        return BASED_NUMBER; }
 \'[sS]?[oO][ \t]*[0-7xzXZ_\?]+ { yylval.number = make_unsized_octal(yytext);
-                        return NUMBER; }
+                        return BASED_NUMBER; }
 \'[sS]?[hH][ \t]*[0-9a-fA-FxzXZ_\?]+ { yylval.number = make_unsized_hex(yytext);
-                              return NUMBER; }
+                              return BASED_NUMBER; }
 
-[0-9][0-9_]*		 {
-      char buf[4096];
-
-      if (strlen(yytext) >= sizeof(buf)-2){
-	  fprintf(stderr, "Ridicilously long decimal constant will be truncated!\n");
-      }
-
-      strncpy(buf, yytext, sizeof(buf)-2);
-      buf[sizeof(buf)-1] = 0;
-
-      /* Convert the decimal number to a binary value, one digit at
-	 a time. Watch out for overflow. */
-      verinum::V*bits = new verinum::V[INTEGER_WIDTH];
-      unsigned idx=0;
-      unsigned nbits=INTEGER_WIDTH;
-
-      while(idx<nbits){
-	  int rem = dec_buf_div2(buf);
-
-	  bits[idx] = (rem==1) ? verinum::V1 : verinum::V0;
-	  ++idx;
-      }
-
-      for(; idx<nbits; ++idx){
-	  bits[idx] = verinum::V0;
-      }
-      
-      /* If we run out of bits to hold the value, but there are
-	 still valueable bits in the number, print a warning. */
-      if (strcmp(buf, "0") != 0){
-        cerr << yylloc.text << ":" << yylloc.first_line <<
-          ": warning: Numeric decimal constant ``" << yytext <<
-           "'' truncated to " << nbits << " bits." << endl;
-      }
-
-      yylval.number = new verinum(bits, nbits, false);
-      yylval.number->has_sign(true);
-      delete[]bits;
-      return NUMBER; }
+[0-9][0-9_]* {
+      yylval.number = make_unsized_dec(yytext);
+      return DEC_NUMBER; }
 
 [0-9][0-9_]*\.[0-9][0-9_]*([Ee][+-]?[0-9][0-9_]*)? {
       yylval.realtime = new verireal(yytext);
@@ -368,16 +324,24 @@ W [ \t\b\f\r]+
   }
 
 
+`{W} { cerr << yylloc.text << ":" << yylloc.first_line << ": error: "
+	    << "Stray tic (`) here. Perhaps you put white space" << endl;
+       cerr << yylloc.text << ":" << yylloc.first_line << ":      : "
+	    << "between the tic and preprocessor directive?"
+	    << endl;
+       error_count += 1; }
 
   /* Final catchall. something got lost or mishandled. */
 
-. {   cerr << yylloc.first_line << ": unmatched character (";
+. {   cerr << yylloc.text << ":" << yylloc.first_line
+	   << ": error: unmatched character (";
       if (isgraph(yytext[0]))
 	    cerr << yytext[0];
       else
-	    cerr << (unsigned)yytext[0];
+	    cerr << "hex " << hex << (0xffU & ((unsigned) (yytext[0])));
 
-      cerr << ")" << endl; }
+      cerr << ")" << endl;
+      error_count += 1; }
 
 %%
 
@@ -396,96 +360,6 @@ void lex_end_table()
       BEGIN(INITIAL);
 }
 
-static verinum*make_binary_with_size(unsigned size, bool fixed, const char*ptr)
-{
-      bool sign_flag = false;
-      verinum::V*bits = new verinum::V[size];
-
-      if (tolower(ptr[0]) == 's') {
-	    ptr += 1;
-	    sign_flag = true;
-      }
-      assert(tolower(*ptr) == 'b');
-      ptr += 1;
-
-      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
-	    ptr += 1;
-
-      unsigned idx = 0;
-      const char*eptr = ptr + strlen(ptr) - 1;
-
-      while ((eptr >= ptr) && (idx < size)) {
-
-	    switch (*eptr) {
-		case '_':
-		  break;
-		case '0':
-		  bits[idx++] = verinum::V0;
-		  break;
-		case '1':
-		  bits[idx++] = verinum::V1;
-		  break;
-		case 'z': case 'Z': case '?':
-		  bits[idx++] = verinum::Vz;
-		  break;
-		case 'x': case 'X':
-		  bits[idx++] = verinum::Vx;
-		  break;
-		default:
-		  assert(0);
-	    }
-
-	    eptr -= 1;
-      }
-
-
-	/* If we filled up the expected number of bits, but there are
-	   still characters of the number part left, then report a
-	   warning that we are truncating. */
-
-      if ((idx >= size) && (eptr >= ptr))
-        cerr << yylloc.text << ":" << yylloc.first_line <<
-          ": warning: Numeric binary constant ``" << ptr <<
-           "'' truncated to " << size << " bits." << endl;
-
-
-	// Zero-extend binary number, except that z or x is extended
-	// if it is the highest supplied digit.
-      while (idx < size) {
-	    switch (ptr[0]) {
-		case '0':
-		case '1':
-		  bits[idx++] = verinum::V0;
-		  break;
-		case 'z': case 'Z': case '?':
-		  bits[idx++] = verinum::Vz;
-		  break;
-		case 'x': case 'X':
-		  bits[idx++] = verinum::Vx;
-		  break;
-		default:
-		  assert(0);
-	    }
-      }
-
-      verinum*out = new verinum(bits, size, fixed);
-      delete[]bits;
-      out->has_sign(sign_flag);
-      return out;
-}
-
-static verinum*make_sized_binary(const char*txt)
-{
-      char*ptr;
-      unsigned size = strtoul(txt,&ptr,10);
-      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
-	    ptr += 1;
-      assert(*ptr == '\'');
-      ptr += 1;
-
-      return make_binary_with_size(size, true, ptr);
-}
-
 static verinum*make_unsized_binary(const char*txt)
 {
       bool sign_flag = false;
@@ -497,8 +371,11 @@ static verinum*make_unsized_binary(const char*txt)
 	    sign_flag = true;
 	    ptr += 1;
       }
+
       assert(tolower(*ptr) == 'b');
-      while (*ptr && ((*ptr == 'b') || (*ptr == ' ') || (*ptr == '\t')))
+      ptr += 1;
+
+      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
 	    ptr += 1;
 
       unsigned size = 0;
@@ -537,95 +414,6 @@ static verinum*make_unsized_binary(const char*txt)
       return out;
 }
 
-static verinum*make_sized_octal(const char*txt)
-{
-      bool sign_flag = false;
-      char*ptr;
-
-      unsigned size = strtoul(txt,&ptr,10);
-      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
-	    ptr += 1;
-      assert(*ptr == '\'');
-      ptr += 1;
-
-      if (tolower(*ptr) == 's') {
-	    sign_flag = true;
-	    ptr += 1;
-      }
-      assert(tolower(*ptr) == 'o');
-      ptr += 1;
-
-	/* We know from the size number how bit to make the verinum
-	   array, so make it now. */
-      verinum::V*bits = new verinum::V[(size+2)/3 * 3];
-
-	/* skip white space between size and the base token. */
-      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
-	    ptr += 1;
-
-	/* Get a pointer to the last character of the number string,
-	   then work back from there (the least significant digit)
-	   forward until I run out of digits or space to put them. */
-      char*eptr = ptr + strlen(ptr) - 1;
-      unsigned idx = 0;
-
-      while ((eptr >= ptr) && (idx < size)) {
-	    switch (*eptr) {
-		case 'x': case 'X':
-		  bits[idx++] = verinum::Vx;
-		  bits[idx++] = verinum::Vx;
-		  bits[idx++] = verinum::Vx;
-		  break;
-		case 'z': case 'Z': case '?':
-		  bits[idx++] = verinum::Vz;
-		  bits[idx++] = verinum::Vz;
-		  bits[idx++] = verinum::Vz;
-		  break;
-		case '0': case '1': case '2': case '3':
-		case '4': case '5': case '6': case '7':
-		    {
-			  unsigned val = *eptr - '0';
-			  bits[idx++] = (val&1)? verinum::V1 : verinum::V0;
-			  bits[idx++] = (val&2)? verinum::V1 : verinum::V0;
-			  bits[idx++] = (val&4)? verinum::V1 : verinum::V0;
-			  break;
-		    }
-		case '_':
-		  break;
-		default:
-		  assert(0);
-	    }
-
-	    eptr -= 1;
-      }
-
-	/* If we filled up all the bits and there are still characters
-	   in the number string, then we overflowed. Report a warning
-	   that we are truncating. */
-      if ((idx >= size) && (eptr >= ptr))
-	    cerr << yylloc.text << ":" << yylloc.first_line <<
-		  ": warning: Numeric octal constant ``" << ptr <<
-		  "'' truncated to " << size << " bits." << endl;
-
-
-	/* If we did not fill up all the bits from the string, then
-	   zero-extend the number. */
-      while (idx < size) switch (ptr[1]) {
-	  case 'x': case 'X':
-	    bits[idx++] = verinum::Vx;
-	    break;
-	  case 'z': case 'Z': case '?':
-	    bits[idx++] = verinum::Vz;
-	    break;
-	  default:
-	    bits[idx++] = verinum::V0;
-      }
-
-      verinum*out = new verinum(bits, size, true);
-      delete[]bits;
-      out->has_sign(sign_flag);
-      return out;
-}
 
 static verinum*make_unsized_octal(const char*txt)
 {
@@ -686,102 +474,6 @@ static verinum*make_unsized_octal(const char*txt)
       return out;
 }
 
-static verinum*make_sized_hex(const char*txt)
-{
-      bool sign_flag = false;
-      char*ptr;
-      unsigned size = strtoul(txt,&ptr,10);
-
-      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
-	    ptr += 1;
-
-      assert(*ptr == '\'');
-      ptr += 1;
-
-      if (tolower(*ptr) == 's') {
-	    sign_flag = true;
-	    ptr += 1;
-      }
-
-      assert(tolower(*ptr) == 'h');
-
-      ptr += 1;
-      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
-	    ptr += 1;
-
-      verinum::V*bits = new verinum::V[(size+3)&~3];
-
-      unsigned idx = 0;
-      char*eptr = ptr + strlen(ptr) - 1;
-
-      while ((eptr >= ptr) && (idx < size)) {
-	    switch (*eptr) {
-		case 'x': case 'X':
-		  bits[idx++] = verinum::Vx;
-		  bits[idx++] = verinum::Vx;
-		  bits[idx++] = verinum::Vx;
-		  bits[idx++] = verinum::Vx;
-		  break;
-		case 'z': case 'Z': case '?':
-		  bits[idx++] = verinum::Vz;
-		  bits[idx++] = verinum::Vz;
-		  bits[idx++] = verinum::Vz;
-		  bits[idx++] = verinum::Vz;
-		  break;
-		case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
-		case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
-		    {
-			  unsigned val = tolower(*eptr) - 'a' + 10;
-			  bits[idx++] = (val&1)? verinum::V1 : verinum::V0;
-			  bits[idx++] = (val&2)? verinum::V1 : verinum::V0;
-			  bits[idx++] = (val&4)? verinum::V1 : verinum::V0;
-			  bits[idx++] = (val&8)? verinum::V1 : verinum::V0;
-			  break;
-		    }
-		case '0': case '1': case '2': case '3': case '4':
-		case '5': case '6': case '7': case '8': case '9':
-		    {
-			  unsigned val = *eptr - '0';
-			  bits[idx++] = (val&1)? verinum::V1 : verinum::V0;
-			  bits[idx++] = (val&2)? verinum::V1 : verinum::V0;
-			  bits[idx++] = (val&4)? verinum::V1 : verinum::V0;
-			  bits[idx++] = (val&8)? verinum::V1 : verinum::V0;
-			  break;
-		    }
-		case '_':
-		  break;
-		default:
-		  assert(0);
-	    }
-
-	    eptr -= 1;
-      }
-
-	/* If we filled up the expected number of bits, but there are
-	   still characters of the number part left, then report a
-	   warning that we are truncating. */
-      if ((idx >= size) && (eptr >= ptr))
-        cerr << yylloc.text << ":" << yylloc.first_line <<
-          ": warning: Numeric hex constant ``" << ptr <<
-           "'' truncated to " << size << " bits." << endl;
-
-	// zero extend hex numbers
-      while (idx < size) switch (ptr[0]) {
-	  case 'x': case 'X':
-	    bits[idx++] = verinum::Vx;
-	    break;
-	  case 'z': case 'Z': case '?':
-	    bits[idx++] = verinum::Vz;
-	    break;
-	  default:
-	    bits[idx++] = verinum::V0;
-      }
-
-      verinum*out = new verinum(bits, size, true);
-      out->has_sign(sign_flag);
-      delete[]bits;
-      return out;
-}
 
 static verinum*make_unsized_hex(const char*txt)
 {
@@ -904,78 +596,93 @@ static int dec_buf_div2(char *buf)
 
 /*
  * Making a decimal number is much easier then the other base numbers
- * because there are no z or x values to worry about.
+ * because there are no z or x values to worry about. It is much
+ * harder then other base numbers because the width needed in bits is
+ * hard to calculate.
  */
-static verinum*make_dec_with_size(unsigned size, bool fixed, const char*ptr)
+
+static verinum*make_unsized_dec(const char*ptr)
 {
       char buf[4096];
       bool signed_flag = false;
+      unsigned idx;
 
-      if (tolower(*ptr) == 's') {
+      if (ptr[0] == '\'') {
+	      /* The number has decorations of the form 'sd<digits>,
+		 possibly with space between the d and the <digits>.
+		 Also, the 's' is optional, and markes the number as
+		 signed. */
+	    ptr += 1;
+
+	    if (tolower(*ptr) == 's') {
+		  signed_flag = true;
+		  ptr += 1;
+	    }
+
+	    assert(tolower(*ptr) == 'd');
+	    ptr += 1;
+
+	    while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
+		  ptr += 1;
+
+      } else {
+	      /* ... or an undecorated decimal number is passed
+		 it. These numbers are treated as signed decimal. */
+	    assert(isdigit(*ptr));
 	    signed_flag = true;
-	    ptr += 1;
-      }
-      assert(tolower(*ptr) == 'd');
-
-      ptr += 1;
-      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
-	    ptr += 1;
-
-      if (strlen(ptr) >= sizeof(buf)-2){
-	  fprintf(stderr, "Ridicilously long decimal constant will be truncated!\n");
       }
 
-      strncpy(buf, ptr, sizeof(buf)-2);
-      buf[sizeof(buf)-1] = 0;
 
-      /* Convert the decimal number to a binary value, one digit at
-	 a time. Watch out for overflow. */
-      verinum::V*bits = new verinum::V[size];
-      unsigned idx=0;
+	/* Copy the digits into a buffer that I can use to do in-place
+	   decimal divides. */
+      idx = 0;
+      while ((idx < sizeof buf) && (*ptr != 0)) {
+	    if (*ptr == '_') {
+		  ptr += 1;
+		  continue;
+	    }
 
-      while(idx<size){
-	  int rem = dec_buf_div2(buf);
-
-	  bits[idx] = (rem==1) ? verinum::V1 : verinum::V0;
-	  ++idx;
+	    buf[idx++] = *ptr++;
       }
 
-      for(; idx<size; ++idx){
-	  bits[idx] = verinum::V0;
-      }
-      
-      /* If we run out of bits to hold the value, but there are
-	 still valueable bits in the number, print a warning. */
-      if (strcmp(buf, "0") != 0){
-        cerr << yylloc.text << ":" << yylloc.first_line <<
-          ": warning: Numeric decimal constant ``" << ptr <<
-           "'' truncated to " << size << " bits." << endl;
+      if (idx == sizeof buf) {
+	    fprintf(stderr, "Ridiculously long"
+		    " decimal constant will be truncated!\n");
+	    idx -= 1;
       }
 
-      verinum*out = new verinum(bits, size, fixed);
-      out->has_sign(signed_flag);
+      buf[idx] = 0;
+      unsigned tmp_size = idx * 4 + 1;
+      verinum::V *bits = new verinum::V[tmp_size];
+
+      idx = 0;
+      while (idx < tmp_size) {
+	    int rem = dec_buf_div2(buf);
+	    bits[idx++] = (rem == 1) ? verinum::V1 : verinum::V0;
+      }
+
+      assert(strcmp(buf, "0") == 0);
+
+	/* Now calculate the minimum number of bits needed to
+	   represent this unsigned number. */
+      unsigned size = tmp_size;
+      while ((size > 1) && (bits[size-1] == verinum::V0))
+	    size -= 1;
+
+	/* Now account for the signedness. Don't leave a 1 in the high
+	   bit if this is a signed number. */
+      if (signed_flag && (bits[size-1] == verinum::V1)) {
+	    size += 1;
+	    assert(size <= tmp_size);
+      }
+
+      verinum*res = new verinum(bits, size, false);
+      res->has_sign(signed_flag);
+
       delete[]bits;
-      return out;
+      return res;
 }
 
-static verinum*make_sized_dec(const char*txt)
-{
-      char*ptr;
-      unsigned size = strtoul(txt,&ptr,10);
-
-      while (*ptr && ((*ptr == ' ') || (*ptr == '\t')))
-	    ptr += 1;
-
-      assert(*ptr == '\'');
-      ptr += 1;
-
-      return make_dec_with_size(size, true, ptr);
-}
-
-static verinum*make_unsized_dec(const char*txt)
-{
-      return make_dec_with_size(INTEGER_WIDTH, false, txt+1);
-}
 
 /*
  * The timescale parameter has the form:

libveriuser/.cvsignore

@@ -1,4 +1,5 @@
 Makefile
 configure
 config.*
+autom4te.cache
 dep

libveriuser/Makefile.in

@@ -16,7 +16,7 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.14 2002/06/11 15:19:12 steve Exp $"
+#ident "$Id: Makefile.in,v 1.26 2003/06/04 01:56:20 steve Exp $"
 #
 #
 SHELL = /bin/sh
@@ -38,21 +38,26 @@ INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
 
-CPPFLAGS = @CPPFLAGS@ @DEFS@
+CPPFLAGS = @CPPFLAGS@ @DEFS@ @PICFLAG@
 CXXFLAGS = @CXXFLAGS@
 CFLAGS = @CFLAGS@
 LDFLAGS = @LDFLAGS@
 STRIP = @STRIP@
+RANLIB = @RANLIB@
 
-A = a_close.o a_fetch_argc.o a_fetch_argv.o a_fetch_fullname.o \
-a_fetch_tfarg.o a_handle_tfarg.o \
-a_initialize.o a_next_topmod.o a_object_of_type.o a_product_version.o \
-a_set_value.o a_version.o
-O = asynch.o finish.o getcstringp.o getinstance.o getlongp.o \
-getp.o getsimtime.o io_print.o mc_scan_plusargs.o nump.o putlongp.o \
-putp.o veriusertfs.o $A
+A = a_close.o a_compare_handles.o a_configure.o a_fetch_argc.o \
+a_fetch_argv.o a_fetch_fullname.o a_fetch_location.o \
+a_fetch_param.o a_fetch_range.o a_fetch_tfarg.o a_fetch_time.o \
+a_fetch_type.o a_fetch_type_str.o a_fetch_value.o a_handle_by_name.o \
+a_handle_object.o a_handle_parent.o a_handle_tfarg.o a_initialize.o \
+a_next.o a_next_topmod.o a_object_of_type.o a_product_version.o \
+a_set_value.o a_vcl.o a_version.o
 
-all: libveriuser.a
+O = asynch.o delay.o finish.o getcstringp.o getinstance.o getlongp.o \
+getp.o getsimtime.o io_print.o math.o mc_scan_plusargs.o nump.o putlongp.o \
+putp.o spname.o typep.o workarea.o veriusertfs.o priv.o $A
+
+all: dep libveriuser.a
 
 check: all
 
@@ -62,15 +67,18 @@ Makefile: Makefile.in config.status
 libveriuser.a: $O
 	rm -f $@
 	ar cvq $@ $O
+	$(RANLIB) $@
+
+dep:
+	mkdir dep
 
 %.o: %.c
-	@[ -d dep ] || mkdir dep
 	$(CC) -Wall $(CPPFLAGS) $(CFLAGS) -MD -c $< -o $*.o
 	mv $*.d dep
 
 
 clean:
-	rm -f *.o dep/*.d libveriuser.a
+	rm -rf *.o dep libveriuser.a
 
 distclean: clean
 	rm -f Makefile config.status config.log config.cache

libveriuser/a_close.c

@@ -17,15 +17,33 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: a_close.c,v 1.2 2002/08/12 01:35:02 steve Exp $"
+#ident "$Id: a_close.c,v 1.4 2003/06/17 16:55:07 steve Exp $"
 #endif
 
 # include  <acc_user.h>
+# include  "priv.h"
 
-void acc_close(void) { }
+void acc_close(void)
+{
+      if (pli_trace) {
+	    fprintf(pli_trace, "acc_close()\n");
+      }
+}
 
 /*
  * $Log: a_close.c,v $
+ * Revision 1.4  2003/06/17 16:55:07  steve
+ *  1) setlinebuf() for vpi_trace
+ *  2) Addes error checks for trace file opens
+ *  3) removes now extraneous flushes
+ *  4) fixes acc_next() bug
+ *
+ * Revision 1.3  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
  * Revision 1.2  2002/08/12 01:35:02  steve
  *  conditional ident string using autoconfig.
  *

libveriuser/a_compare_handles.c

@@ -0,0 +1,42 @@
+/* vi:sw=6
+ * Copyright (c) 2003 Michael Ruff (mruff at chiaro.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#if !defined(WINNT)
+#ident "$Id: a_compare_handles.c,v 1.1 2003/06/04 01:56:20 steve Exp $"
+#endif
+
+# include  <vpi_user.h>
+# include  <acc_user.h>
+
+int acc_compare_handles(handle handle1, handle handle2)
+{
+      return handle1 == handle2;
+}
+
+/*
+ * $Log: a_compare_handles.c,v $
+ * Revision 1.1  2003/06/04 01:56:20  steve
+ * 1) Adds configure logic to clean up compiler warnings
+ * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+ *    tf_isetrealdelay, acc_handle_scope
+ * 3) makes acc_next reentrant
+ * 4) adds basic vpiWire type support
+ * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
+ * 6) add vpiLeftRange/RigthRange to signals
+ *
+ */

libveriuser/a_configure.c

@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_configure.c,v 1.3 2003/06/17 16:55:07 steve Exp $"
+#endif
+
+#include  <acc_user.h>
+#include  <vpi_user.h>
+#include  "priv.h"
+
+int acc_configure(PLI_INT32 config_param, const char*value)
+{
+      int rc;
+      switch (config_param) {
+	  case accDevelopmentVersion:
+	    vpi_printf("Request PLI Development Version %s\n", value);
+	    rc = 1;
+
+	    if (pli_trace) {
+		  fprintf(pli_trace,
+			  "acc_configure(accDevelopmentVersion, %s)\n",
+			  value);
+	    }
+	    break;
+
+	  default:
+
+	    if (pli_trace) {
+		  fprintf(pli_trace, "acc_configure(config=%d, %s)\n",
+			  config_param, value);
+	    }
+
+	    vpi_printf("XXXX acc_configure(%d, %s)\n", config_param, value);
+	    rc = 0;
+	    break;
+      }
+
+      return rc;
+}
+
+/*
+ * $Log: a_configure.c,v $
+ * Revision 1.3  2003/06/17 16:55:07  steve
+ *  1) setlinebuf() for vpi_trace
+ *  2) Addes error checks for trace file opens
+ *  3) removes now extraneous flushes
+ *  4) fixes acc_next() bug
+ *
+ * Revision 1.2  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
+ * Revision 1.1  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
+ */
+

libveriuser/a_fetch_fullname.c

@@ -17,22 +17,47 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: a_fetch_fullname.c,v 1.2 2002/08/12 01:35:02 steve Exp $"
+#ident "$Id: a_fetch_fullname.c,v 1.5 2003/05/29 02:21:45 steve Exp $"
 #endif
 
 #include  <vpi_user.h>
 #include  <acc_user.h>
+#include  "priv.h"
 
 /*
  * acc_fetch_fullname implemented using VPI interface
  */
 char *acc_fetch_fullname(handle object)
 {
-      return vpi_get_str(vpiFullName, object);
+      return __acc_newstring(vpi_get_str(vpiFullName, object));
+}
+
+char* acc_fetch_name(handle object)
+{
+      return __acc_newstring(vpi_get_str(vpiName, object));
+}
+
+char* acc_fetch_defname(handle object)
+{
+      return __acc_newstring(vpi_get_str(vpiDefName, object));
 }
 
 /*
  * $Log: a_fetch_fullname.c,v $
+ * Revision 1.5  2003/05/29 02:21:45  steve
+ *  Implement acc_fetch_defname and its infrastructure in vvp.
+ *
+ * Revision 1.4  2003/03/13 05:07:46  steve
+ *  Declaration warnings.
+ *
+ * Revision 1.3  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
  * Revision 1.2  2002/08/12 01:35:02  steve
  *  conditional ident string using autoconfig.
  *

libveriuser/a_fetch_location.c

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_fetch_location.c,v 1.1 2003/02/17 06:39:47 steve Exp $"
+#endif
+
+#include  <acc_user.h>
+#include  <vpi_user.h>
+
+int acc_fetch_location(p_location loc, handle obj)
+{
+      loc->line_no = 0;
+      loc->filename = "<filename>";
+      return 1;
+}
+
+/*
+ * $Log: a_fetch_location.c,v $
+ * Revision 1.1  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
+ */
+

libveriuser/a_fetch_param.c

@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_fetch_param.c,v 1.4 2003/06/17 16:55:07 steve Exp $"
+#endif
+
+#include  <assert.h>
+#include  <vpi_user.h>
+#include  <acc_user.h>
+#include  "priv.h"
+
+double acc_fetch_paramval(handle object)
+{
+      s_vpi_value val;
+
+      val.format = vpiObjTypeVal;
+      vpi_get_value(object, &val);
+
+      switch (val.format) {
+
+	  case vpiStringVal:
+	    if (pli_trace) {
+		  fprintf(pli_trace, "acc_fetch_paramval(%s) --> \"%s\"\n",
+			  vpi_get_str(vpiName, object), val.value.str);
+	    }
+	    return (double) (long)val.value.str;
+
+	  default:
+	    vpi_printf("XXXX: parameter %s has type %d\n",
+		       vpi_get_str(vpiName, object), val.format);
+	    assert(0);
+	    return 0.0;
+      }
+}
+
+/*
+ * $Log: a_fetch_param.c,v $
+ * Revision 1.4  2003/06/17 16:55:07  steve
+ *  1) setlinebuf() for vpi_trace
+ *  2) Addes error checks for trace file opens
+ *  3) removes now extraneous flushes
+ *  4) fixes acc_next() bug
+ *
+ * Revision 1.3  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
+ * Revision 1.2  2003/03/14 04:59:54  steve
+ *  Better message when asserting funky value type.
+ *
+ * Revision 1.1  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ */
+

libveriuser/a_fetch_range.c

@@ -0,0 +1,47 @@
+/* vi:sw=6
+ * Copyright (c) 2003 Michael Ruff (mruff at chiaro.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_fetch_range.c,v 1.1 2003/06/04 01:56:20 steve Exp $"
+#endif
+
+#include  <vpi_user.h>
+#include  <acc_user.h>
+
+/*
+ * acc_fetch_range implemented using VPI interface
+ */
+PLI_INT32 acc_fetch_range(handle object, PLI_INT32 *msb, PLI_INT32 *lsb)
+{
+      *msb = vpi_get(vpiLeftRange, object);
+      *lsb = vpi_get(vpiRightRange, object);
+      return 0;
+}
+
+/*
+ * $Log: a_fetch_range.c,v $
+ * Revision 1.1  2003/06/04 01:56:20  steve
+ * 1) Adds configure logic to clean up compiler warnings
+ * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+ *    tf_isetrealdelay, acc_handle_scope
+ * 3) makes acc_next reentrant
+ * 4) adds basic vpiWire type support
+ * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
+ * 6) add vpiLeftRange/RigthRange to signals
+ *
+ */

libveriuser/a_fetch_tfarg.c

@@ -1,5 +1,5 @@
 /* vi:sw=6
- * Copyright (c) 2002 Michael Ruff (mruff at chiaro.com)
+ * Copyright (c) 2002,2003 Michael Ruff (mruff at chiaro.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,63 +17,149 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: a_fetch_tfarg.c,v 1.2 2002/08/12 01:35:02 steve Exp $"
+#ident "$Id: a_fetch_tfarg.c,v 1.8 2003/06/14 01:16:17 steve Exp $"
 #endif
 
 #include  <vpi_user.h>
 #include  <acc_user.h>
+#include  "priv.h"
 
 /*
- * acc_fetch_tfarg routines implemented using VPI interface
+ * acc_fetch_tfarg and friends implemented using VPI interface
  */
-int acc_fetch_tfarg_int(int n)
+double acc_fetch_itfarg(PLI_INT32 n, handle obj)
 {
-      vpiHandle sys_h, sys_i, arg_h = 0;
+      vpiHandle iter, hand = 0;
       s_vpi_value value;
-      int rtn;
+      int idx = n;
+      double rtn;
 
-      sys_h = vpi_handle(vpiSysTfCall, 0);
-      sys_i = vpi_iterate(vpiArgument, sys_h);
+      iter = vpi_iterate(vpiArgument, obj);
 
       /* scan to nth argument */
-      while (n > 0 && (arg_h = vpi_scan(sys_i))) n--;
+      while (idx > 0 && (hand = vpi_scan(iter))) idx--;
 
-      if (arg_h) {
+      if (hand) {
+	    value.format=vpiRealVal;
+	    vpi_get_value(hand, &value);
+	    rtn = value.value.real; 
+	    vpi_free_object(iter);
+      } else {
+	    rtn = 0.0;
+      }
+
+      if (pli_trace) {
+	    fprintf(pli_trace, "%s: acc_fetch_itfarg(%d, %p) --> %f\n",
+		    vpi_get_str(vpiName, obj), n, obj, rtn);
+      }
+
+      return rtn;
+}
+
+double acc_fetch_tfarg(int n)
+{
+      return acc_fetch_itfarg_int(n, vpi_handle(vpiSysTfCall,0));
+}
+
+
+PLI_INT32 acc_fetch_itfarg_int(PLI_INT32 n, handle obj)
+{
+      vpiHandle iter, hand = 0;
+      s_vpi_value value;
+      int idx = n;
+      int rtn;
+
+      iter = vpi_iterate(vpiArgument, obj);
+
+      /* scan to nth argument */
+      while (idx > 0 && (hand = vpi_scan(iter))) idx--;
+
+      if (hand) {
 	    value.format=vpiIntVal;
-	    vpi_get_value(arg_h, &value);
+	    vpi_get_value(hand, &value);
 	    rtn = value.value.integer; 
+	    vpi_free_object(iter);
       } else {
 	    rtn = 0;
       }
 
-      return rtn;
-}
-
-char *acc_fetch_tfarg_str(int n)
-{
-      vpiHandle sys_h, sys_i, arg_h = 0;
-      s_vpi_value value;
-      char *rtn;
-
-      sys_h = vpi_handle(vpiSysTfCall, 0);
-      sys_i = vpi_iterate(vpiArgument, sys_h);
-
-      /* scan to nth argument */
-      while (n > 0 && (arg_h = vpi_scan(sys_i))) n--;
-
-      if (arg_h) {
-	    value.format=vpiStringVal;
-	    vpi_get_value(arg_h, &value);
-	    rtn = value.value.str; 
-      } else {
-	    rtn = (char *) 0;
+      if (pli_trace) {
+	    fprintf(pli_trace, "%s: acc_fetch_itfarg_int(%d, %p) --> %d\n",
+		    vpi_get_str(vpiName, obj), n, obj, rtn);
       }
 
       return rtn;
 }
 
+PLI_INT32 acc_fetch_tfarg_int(PLI_INT32 n)
+{
+      return acc_fetch_itfarg_int(n, vpi_handle(vpiSysTfCall,0));
+}
+
+
+char *acc_fetch_itfarg_str(PLI_INT32 n, handle obj)
+{
+      vpiHandle iter, hand = 0;
+      s_vpi_value value;
+      int idx = n;
+      char *rtn;
+
+      iter = vpi_iterate(vpiArgument, obj);
+
+      /* scan to nth argument */
+      while (idx > 0 && (hand = vpi_scan(iter))) idx -= 1;
+
+      if (hand) {
+	    value.format=vpiStringVal;
+	    vpi_get_value(hand, &value);
+	    rtn = __acc_newstring(value.value.str);
+	    vpi_free_object(iter);
+      } else {
+	    rtn = (char *) 0;
+      }
+
+      if (pli_trace) {
+	    fprintf(pli_trace, "%s: acc_fetch_itfarg_str(%d, %p) --> \"%s\"\n",
+		    vpi_get_str(vpiName, obj),
+		    n, obj, rtn? rtn : "");
+      }
+
+      return rtn;
+}
+
+char *acc_fetch_tfarg_str(PLI_INT32 n)
+{
+      return acc_fetch_itfarg_str(n, vpi_handle(vpiSysTfCall,0));
+}
+
 /*
  * $Log: a_fetch_tfarg.c,v $
+ * Revision 1.8  2003/06/14 01:16:17  steve
+ *  ihand is system task, not scope.
+ *
+ * Revision 1.7  2003/06/13 19:23:42  steve
+ *  Add a bunch more PLI1 routines.
+ *
+ * Revision 1.6  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
+ * Revision 1.5  2003/03/14 04:58:50  steve
+ *  Free the iterator when Im done.
+ *
+ * Revision 1.4  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ * Revision 1.3  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
  * Revision 1.2  2002/08/12 01:35:02  steve
  *  conditional ident string using autoconfig.
  *

libveriuser/a_fetch_time.c

@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_fetch_time.c,v 1.1 2003/03/13 04:35:09 steve Exp $"
+#endif
+
+
+#include  <vpi_user.h>
+#include  <acc_user.h>
+#include  "priv.h"
+
+void acc_fetch_timescale_info(handle obj, p_timescale_info info)
+{
+      info->precision = vpi_get(vpiTimePrecision, 0);
+      info->unit = vpi_get(vpiTimeUnit, obj);
+}
+
+/*
+ * $Log: a_fetch_time.c,v $
+ * Revision 1.1  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ */
+

libveriuser/a_fetch_type.c

@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_fetch_type.c,v 1.7 2003/06/04 01:56:20 steve Exp $"
+#endif
+
+# include  <acc_user.h>
+# include  <vpi_user.h>
+# include  <assert.h>
+
+PLI_INT32 acc_fetch_size(handle obj)
+{
+      return vpi_get(vpiSize, obj);
+}
+
+PLI_INT32 acc_fetch_type(handle obj)
+{
+      switch (vpi_get(vpiType, obj)) {
+
+	  case vpiConstant:
+	      /*XXXX SWIFT PLI tasks seem to assume that string
+		constants show up an accParameter, instead of
+		accConstant. */
+	    if (vpi_get(vpiConstType, obj) == vpiStringConst)
+		  return accParameter;
+	    else
+		  return accConstant;
+
+	  case vpiNamedEvent:
+	    return accNamedEvent;
+
+	  case vpiNet:
+	    return accNet;
+
+	  case vpiParameter:
+	    return accParameter;
+
+	  case vpiReg:
+	    return accReg;
+
+	  case vpiIntegerVar:
+	    return accIntegerVar;
+
+	  case vpiModule:
+	    return accModule;
+
+	  default:
+	    vpi_printf("acc_fetch_type: vpiType %d is what accType?\n",
+		       vpi_get(vpiType, obj));
+	    return accUnknown;
+      }
+
+      return 0;
+}
+
+PLI_INT32 acc_fetch_fulltype(handle obj)
+{
+      int type = vpi_get(vpiType, obj);
+
+      switch (type) {
+	  case vpiNet: {
+	    type = vpi_get(vpiNetType, obj);
+	    switch(type) {
+		case vpiWire: return accWire;
+		default: 
+		vpi_printf("acc_fetch_fulltype: vpiNetType %d unknown?\n",
+			   type);
+		return accUnknown;
+	    }
+	  }
+
+	  case vpiConstant:
+	      /* see acc_fetch_type */
+	    if (vpi_get(vpiConstType, obj) == vpiStringConst)
+		  return accStringParam;
+	    else
+		  return accConstant;
+
+	  case vpiIntegerVar: return accIntegerVar;
+
+	  case vpiModule:
+	    if (!vpi_handle(vpiScope, obj))
+		return accTopModule;
+	    else
+		return accModuleInstance;
+	    // FIXME accCellInstance
+
+	  case vpiNamedEvent: return accNamedEvent;
+
+	  case vpiParameter:
+	    switch(vpi_get(vpiConstType, obj)) {
+		case vpiRealConst: return accRealParam;
+		case vpiStringConst: return accStringParam;
+		default: return accIntegerParam;
+	    }
+
+	  case vpiReg: return accReg;
+
+	  default:
+	    vpi_printf("acc_fetch_fulltype: vpiType %d unknown?\n",
+		       type);
+	    return accUnknown;
+      }
+}
+
+/*
+ * $Log: a_fetch_type.c,v $
+ * Revision 1.7  2003/06/04 01:56:20  steve
+ * 1) Adds configure logic to clean up compiler warnings
+ * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+ *    tf_isetrealdelay, acc_handle_scope
+ * 3) makes acc_next reentrant
+ * 4) adds basic vpiWire type support
+ * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
+ * 6) add vpiLeftRange/RigthRange to signals
+ *
+ * Revision 1.6  2003/05/30 04:18:31  steve
+ *  Add acc_next function.
+ *
+ * Revision 1.5  2003/05/29 02:35:41  steve
+ *  acc_fetch_type supports module.
+ *
+ * Revision 1.4  2003/04/24 18:57:06  steve
+ *  Add acc_fetch_fulltype function.
+ *
+ * Revision 1.3  2003/04/12 18:57:14  steve
+ *  More acc_ function stubs.
+ *
+ * Revision 1.2  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ * Revision 1.1  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
+ */
+

libveriuser/a_fetch_type_str.c

@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_fetch_type_str.c,v 1.5 2003/04/12 18:57:14 steve Exp $"
+#endif
+
+#include  <assert.h>
+#include  <vpi_user.h>
+#include  <acc_user.h>
+
+
+char* acc_fetch_type_str(PLI_INT32 type)
+{
+      switch (type) {
+	  case accNet:
+	    return "accNet";
+
+	  case accReg:
+	    return "accReg";
+
+	  case accParameter:
+	    return "accParameter";
+
+	  case accConstant:
+	    return "accConstant";
+
+	  default:
+	    vpi_printf("XXXX acc_fetch_type_str(%d);\n", type);
+	    return "acc_fetch_type_str(unknown)";
+      }
+
+      return "";
+}
+
+/*
+ * $Log: a_fetch_type_str.c,v $
+ * Revision 1.5  2003/04/12 18:57:14  steve
+ *  More acc_ function stubs.
+ *
+ * Revision 1.4  2003/03/13 05:07:46  steve
+ *  Declaration warnings.
+ *
+ * Revision 1.3  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ * Revision 1.2  2003/02/19 04:37:04  steve
+ *  fullname for accConstant.
+ *
+ * Revision 1.1  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
+ */
+

libveriuser/a_fetch_value.c

@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_fetch_value.c,v 1.5 2003/06/17 16:55:07 steve Exp $"
+#endif
+
+# include  <acc_user.h>
+# include  <vpi_user.h>
+# include  "priv.h"
+# include  <assert.h>
+# include  <string.h>
+
+static char* fetch_struct_value(handle obj, s_acc_value*value)
+{
+      struct t_vpi_value val;
+
+      switch (value->format) {
+
+	  case accScalarVal:
+	    val.format = vpiScalarVal;
+	    vpi_get_value(obj, &val);
+	    switch (val.value.scalar) {
+		case vpi0:
+		  value->value.scalar = acc0;
+		  break;
+		case vpi1:
+		  value->value.scalar = acc1;
+		  break;
+		case vpiX:
+		  value->value.scalar = accX;
+		  break;
+		case vpiZ:
+		  value->value.scalar = accZ;
+		  break;
+		default:
+		  assert(0);
+	    }
+
+	    if (pli_trace) {
+		  fprintf(pli_trace, "acc_fetch_value(<%s>, "
+			  "accScalarVal) --> %d\n",
+			  vpi_get_str(vpiFullName,obj),
+			  value->value.scalar);
+	    }
+	    break;
+
+	  case accIntVal:
+	    val.format = vpiIntVal;
+	    vpi_get_value(obj, &val);
+	    value->value.integer = val.value.integer;
+
+	    if (pli_trace) {
+		  fprintf(pli_trace, "acc_fetch_value(<%s>, "
+			  "accIntVal) --> %d\n",
+			  vpi_get_str(vpiFullName,obj),
+			  value->value.integer);
+	    }
+	    break;
+
+	  case accRealVal:
+	    val.format = vpiRealVal;
+	    vpi_get_value(obj, &val);
+	    value->value.real = val.value.real;
+
+	    if (pli_trace) {
+		  fprintf(pli_trace, "acc_fetch_value(<%s>, "
+			  "accRealVal) --> %g\n",
+			  vpi_get_str(vpiFullName,obj),
+			  value->value.real);
+	    }
+	    break;
+
+	  default:
+	    vpi_printf("XXXX acc_fetch_value(..., \"%%%%\", <%d>);\n",
+		       value->format);
+	    value->value.str = "<string value>";
+	    break;
+      }
+
+      return 0;
+}
+
+static char* fetch_strength_value(handle obj)
+{
+      struct t_vpi_value val;
+      char str[4];
+
+      val.format = vpiStrengthVal;
+      vpi_get_value(obj, &val);
+
+      vpip_format_strength(str, &val);
+
+      if (pli_trace) {
+	    fprintf(pli_trace, "acc_fetch_value(<%s>, \"%%v\") --> %s\n",
+		    vpi_get_str(vpiFullName,obj), str);
+      }
+
+      return __acc_newstring(str);
+}
+
+char* acc_fetch_value(handle obj, const char*fmt, s_acc_value*value)
+{
+      if (strcmp(fmt, "%%") == 0)
+	    return fetch_struct_value(obj, value);
+
+      if (strcmp(fmt, "%v") == 0)
+	    return fetch_strength_value(obj);
+
+      vpi_printf("XXXX acc_fetch_value(..., \"%s\", ...)\n", fmt);
+      return "<acc_fetch_value>";
+}
+
+
+/*
+ * $Log: a_fetch_value.c,v $
+ * Revision 1.5  2003/06/17 16:55:07  steve
+ *  1) setlinebuf() for vpi_trace
+ *  2) Addes error checks for trace file opens
+ *  3) removes now extraneous flushes
+ *  4) fixes acc_next() bug
+ *
+ * Revision 1.4  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
+ * Revision 1.3  2003/04/24 02:02:37  steve
+ *  Clean up some simple warnings.
+ *
+ * Revision 1.2  2003/04/20 02:49:07  steve
+ *  acc_fetch_value support for %v format.
+ *
+ * Revision 1.1  2003/04/12 18:57:14  steve
+ *  More acc_ function stubs.
+ *
+ */
+

libveriuser/a_handle_by_name.c

@@ -0,0 +1,65 @@
+/* vi:sw=6
+ * Copyright (c) 2003 Michael Ruff (mruff at chiaro.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_handle_by_name.c,v 1.2 2003/06/17 16:55:07 steve Exp $"
+#endif
+
+# include  <acc_user.h>
+# include  <vpi_user.h>
+# include  "priv.h"
+# include  <assert.h>
+# include  <string.h>
+
+/*
+ * acc_handle_by_name implemented using VPI interface
+ */
+handle acc_handle_by_name(const char*obj_name, handle scope)
+{
+      vpiHandle sys_h;
+      vpiHandle res;
+
+      /* if no scope provided, use tasks scope */
+      if (!scope) {
+	    sys_h = vpi_handle(vpiSysTfCall, 0 /* NULL */);
+	    scope = vpi_handle(vpiScope, sys_h);
+      }
+
+      res = vpi_handle_by_name(obj_name, scope);
+
+      if (pli_trace) {
+	    fprintf(pli_trace, "acc_handle_by_name(\"%s\", scope=%s) "
+		    " --> %p\n", obj_name,
+		    vpi_get_str(vpiFullName, scope), res);
+      }
+
+      return res;
+}
+
+/*
+ * $Log: a_handle_by_name.c,v $
+ * Revision 1.2  2003/06/17 16:55:07  steve
+ *  1) setlinebuf() for vpi_trace
+ *  2) Addes error checks for trace file opens
+ *  3) removes now extraneous flushes
+ *  4) fixes acc_next() bug
+ *
+ * Revision 1.1  2003/05/24 03:02:04  steve
+ *  Add implementation of acc_handle_by_name.
+ *
+ */

libveriuser/a_handle_object.c

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_handle_object.c,v 1.1 2003/03/13 04:35:09 steve Exp $"
+#endif
+
+#include  <vpi_user.h>
+#include  <acc_user.h>
+#include  "priv.h"
+
+handle acc_handle_object(const char*name)
+{
+      vpiHandle sys = vpi_handle(vpiSysTfCall, 0);
+      vpiHandle scope = vpi_handle(vpiScope, sys);
+
+      vpiHandle res = vpi_handle_by_name(name, scope);
+      return res;
+}
+
+/*
+ * $Log: a_handle_object.c,v $
+ * Revision 1.1  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ */
+

libveriuser/a_handle_parent.c

@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_handle_parent.c,v 1.2 2003/06/04 01:56:20 steve Exp $"
+#endif
+
+#include  <vpi_user.h>
+#include  <acc_user.h>
+#include  "priv.h"
+
+handle acc_handle_parent(handle obj)
+{
+      vpiHandle scope = vpi_handle(vpiScope, obj);
+
+      while (scope && (vpi_get(vpiType, scope) != vpiModule))
+	    scope = vpi_handle(vpiScope, scope);
+
+      return scope;
+}
+
+
+handle acc_handle_scope(handle obj)
+{
+      return vpi_handle(vpiScope, obj);
+}
+
+/*
+ * $Log: a_handle_parent.c,v $
+ * Revision 1.2  2003/06/04 01:56:20  steve
+ * 1) Adds configure logic to clean up compiler warnings
+ * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+ *    tf_isetrealdelay, acc_handle_scope
+ * 3) makes acc_next reentrant
+ * 4) adds basic vpiWire type support
+ * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
+ * 6) add vpiLeftRange/RigthRange to signals
+ *
+ * Revision 1.1  2003/03/13 04:35:09  steve
+ *  Add a bunch of new acc_ and tf_ functions.
+ *
+ */
+

libveriuser/a_handle_tfarg.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: a_handle_tfarg.c,v 1.2 2002/08/12 01:35:02 steve Exp $"
+#ident "$Id: a_handle_tfarg.c,v 1.5 2003/03/18 01:21:49 steve Exp $"
 #endif
 
 #include  <acc_user.h>
@@ -28,7 +28,7 @@
  */
 handle acc_handle_tfarg(int n)
 {
-      vpiHandle sys_h, sys_i, rtn_h;
+      vpiHandle sys_h, sys_i, rtn_h = 0;
       
       if (n > 0) {
 	    sys_h = vpi_handle(vpiSysTfCall, 0 /* NULL */);
@@ -37,8 +37,13 @@ handle acc_handle_tfarg(int n)
 	    /* find nth arg */
 	    while (n > 0) {
 		  rtn_h = vpi_scan(sys_i);
+		  if (rtn_h == 0)
+			break;
 		  n--;
 	    }
+
+	    if (rtn_h) vpi_free_object(sys_i);
+
       } else {
 	    rtn_h = (vpiHandle) 0;
       }
@@ -46,8 +51,27 @@ handle acc_handle_tfarg(int n)
       return rtn_h;
 }
 
+handle acc_handle_tfinst(void)
+{
+      return vpi_handle(vpiSysTfCall, 0);
+}
+
 /*
  * $Log: a_handle_tfarg.c,v $
+ * Revision 1.5  2003/03/18 01:21:49  steve
+ *  Fix warning about uninitialized variable.
+ *
+ * Revision 1.4  2003/03/14 04:58:50  steve
+ *  Free the iterator when Im done.
+ *
+ * Revision 1.3  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
  * Revision 1.2  2002/08/12 01:35:02  steve
  *  conditional ident string using autoconfig.
  *

libveriuser/a_next.c

@@ -0,0 +1,115 @@
+/* vi:sw=6
+ * Copyright (c) 2003 Michael Ruff (mruff at chiaro.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_next.c,v 1.3 2003/06/17 16:55:07 steve Exp $"
+#endif
+
+#include  <stdio.h>
+#include  <acc_user.h>
+#include  <vpi_user.h>
+#include  "priv.h"
+
+/*
+ * acc_next and friends implemented using VPI
+ */
+handle acc_next(PLI_INT32 *type, handle scope, handle prev)
+{
+      vpiHandle iter, hand = 0;
+
+      /* trace */
+      if (pli_trace) {
+	    int *ip;
+	    fprintf(pli_trace, "acc_next(%p <", type);
+	    for (ip = type; *ip; ip++) {
+		  fprintf(pli_trace, "%s%d", ip != type ? "," : "", *ip);
+	    }
+	    fprintf(pli_trace, ">, %p", scope);
+	    if (scope)
+		  fprintf(pli_trace, " \"%s\"", vpi_get_str(vpiName, scope));
+	    fprintf(pli_trace, ", %p", prev);
+	    if (prev)
+		  fprintf(pli_trace, " \"%s\"", vpi_get_str(vpiName, prev));
+	    else
+		  fprintf(pli_trace, ")");
+	    fflush(pli_trace);
+      }
+
+      /*
+       * The acc_next_* functions need to be reentrant, so we need to
+       * rescan all the items upto the previous one, then return
+       * the next one.
+      */
+      iter = vpi_iterate(vpiScope, scope);	// ICARUS extension
+      if (prev) {
+	    while ((hand = vpi_scan(iter))) {
+		  if (hand == prev) break;
+	    }
+      }
+
+      /* scan for next */
+      if (!prev || hand) {
+	    while ((hand = vpi_scan(iter))) {
+		  if (acc_object_in_typelist(hand, type))
+			break;
+	    }
+      }
+
+      /* don't leak iterators */
+      if (hand) vpi_free_object(iter);
+
+      /* trace */
+      if (pli_trace) {
+	    fprintf(pli_trace, " --> %p", hand);
+	    if (hand)
+		  fprintf(pli_trace, " \"%s\"\n", vpi_get_str(vpiName, hand));
+	    else
+		  fprintf(pli_trace, "\n");
+
+      }
+
+      return hand;
+}
+
+handle acc_next_scope(handle scope, handle prev)
+{
+      PLI_INT32 type[2] = {accScope, 0};
+      return acc_next(type, scope, prev);
+}
+
+/*
+ * $Log: a_next.c,v $
+ * Revision 1.3  2003/06/17 16:55:07  steve
+ *  1) setlinebuf() for vpi_trace
+ *  2) Addes error checks for trace file opens
+ *  3) removes now extraneous flushes
+ *  4) fixes acc_next() bug
+ *
+ * Revision 1.2  2003/06/04 01:56:20  steve
+ * 1) Adds configure logic to clean up compiler warnings
+ * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+ *    tf_isetrealdelay, acc_handle_scope
+ * 3) makes acc_next reentrant
+ * 4) adds basic vpiWire type support
+ * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
+ * 6) add vpiLeftRange/RigthRange to signals
+ *
+ * Revision 1.1  2003/05/30 04:18:31  steve
+ *  Add acc_next function.
+ *
+ */

libveriuser/a_object_of_type.c

@@ -1,5 +1,5 @@
 /* vi:sw=6
- * Copyright (c) 2002 Michael Ruff (mruff at chiaro.com)
+ * Copyright (c) 2002, 2003 Michael Ruff (mruff at chiaro.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -17,48 +17,110 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: a_object_of_type.c,v 1.2 2002/08/12 01:35:02 steve Exp $"
+#ident "$Id: a_object_of_type.c,v 1.5 2003/06/04 01:56:20 steve Exp $"
 #endif
 
 #include  <assert.h>
 #include  <vpi_user.h>
 #include  <acc_user.h>
+#include  "priv.h"
 
 /*
  * acc_object_of_type implemented using VPI interface
  */
-int acc_object_of_type(handle object, int type)
+PLI_INT32 acc_object_of_type(handle object, PLI_INT32 type)
 {
       int vtype;
       int rtn = 0;	/* false */
 
+      if (pli_trace) {
+	    fprintf(pli_trace, "acc_object_of_type(%p \"%s\", %d)",
+	    	object, vpi_get_str(vpiName, object), type);
+	    fflush(pli_trace);
+      }
+
       /* get VPI type of object */
       vtype = vpi_get(vpiType, object);
 
       switch (type) {
-	    case accScope:
-		  if (vtype == vpiModule || vtype == vpiNamedBegin ||
-		      vtype == vpiNamedFork || vtype == vpiTask ||
-		      vtype == vpiFunction) rtn = 1;
-		  break;
-	    case accScalar:
-		  if (vtype == vpiReg || vtype == vpiNet)
-			rtn = vpi_get(vpiSize, object) == 1;
-		  break;
-	    case accVector:
-		  if (vtype == vpiReg || vtype == vpiNet)
-			rtn = vpi_get(vpiSize, object) > 1;
-		  break;
+	  case accModule: rtn = vtype == vpiModule; break;
+
+	  case accScope:
+	    if (vtype == vpiModule || vtype == vpiNamedBegin ||
+		vtype == vpiNamedFork || vtype == vpiTask ||
+		vtype == vpiFunction) rtn = 1;
+	    break;
+
+	  case accNet: rtn = vtype == vpiNet; break;
+	  case accReg: rtn = vtype == vpiReg; break;
+
+	  case accRealParam:
+	    if (vtype == vpiNamedEvent &&
+	        vpi_get(vpiConstType, object) == vpiRealConst)
+		  rtn = 1;
+	    break;
+
+	  case accParameter: rtn = vtype == vpiParameter; break;
+	  case accNamedEvent: rtn = vtype == vpiNamedEvent; break;
+	  case accIntegerVar: rtn = vtype == vpiIntegerVar; break;
+	  case accRealVar: rtn = vtype == vpiRealVar; break;
+	  case accTimeVar: rtn = vtype == vpiTimeVar; break;
+
+	  case accScalar:
+	    if (vtype == vpiReg || vtype == vpiNet)
+		  rtn = vpi_get(vpiSize, object) == 1;
+	    break;
+
+	  case accVector:
+	    if (vtype == vpiReg || vtype == vpiNet)
+		  rtn = vpi_get(vpiSize, object) > 1;
+	    break;
+
 	    default:
 		  vpi_printf("acc_object_of_type: Unknown type %d\n", type);
-		  assert(0);
+		  rtn = 0;
       }
 
+      if (pli_trace) fprintf(pli_trace, " --> %d\n", rtn);
+
       return rtn;
 }
 
+PLI_INT32 acc_object_in_typelist(handle object, PLI_INT32*typelist)
+{
+      while (typelist[0] != 0) {
+	    int rtn = acc_object_of_type(object, typelist[0]);
+	    if (rtn)
+		  return rtn;
+
+	    typelist += 1;
+      }
+
+      return 0;
+}
+
 /*
  * $Log: a_object_of_type.c,v $
+ * Revision 1.5  2003/06/04 01:56:20  steve
+ * 1) Adds configure logic to clean up compiler warnings
+ * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
+ *    tf_isetrealdelay, acc_handle_scope
+ * 3) makes acc_next reentrant
+ * 4) adds basic vpiWire type support
+ * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
+ * 6) add vpiLeftRange/RigthRange to signals
+ *
+ * Revision 1.4  2003/05/30 04:18:31  steve
+ *  Add acc_next function.
+ *
+ * Revision 1.3  2003/02/17 06:39:47  steve
+ *  Add at least minimal implementations for several
+ *  acc_ functions. Add support for standard ACC
+ *  string handling.
+ *
+ *  Add the _pli_types.h header file to carry the
+ *  IEEE1364-2001 standard PLI type declarations.
+ *
  * Revision 1.2  2002/08/12 01:35:02  steve
  *  conditional ident string using autoconfig.
  *

libveriuser/a_set_value.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: a_set_value.c,v 1.2 2002/08/12 01:35:02 steve Exp $"
+#ident "$Id: a_set_value.c,v 1.3 2003/05/18 00:16:35 steve Exp $"
 #endif
 
 #include  <assert.h>
@@ -101,7 +101,11 @@ int acc_set_value(handle object, p_setval_value value, p_setval_delay delay)
 		  val.format = vpiVectorVal;
 		  val.value.vector = (p_vpi_vecval)value->value.vector;
 		  break;
-	    default: assert(0); break;
+	    default:
+	      vpi_printf("XXXX acc_set_value(value->format=%d)\n",
+			 value->format);
+	      assert(0);
+	      break;
       }
 
       /* put value */
@@ -112,6 +116,12 @@ int acc_set_value(handle object, p_setval_value value, p_setval_delay delay)
 
 /*
  * $Log: a_set_value.c,v $
+ * Revision 1.3  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
  * Revision 1.2  2002/08/12 01:35:02  steve
  *  conditional ident string using autoconfig.
  *

libveriuser/a_vcl.c

@@ -0,0 +1,234 @@
+/*
+ * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ *
+ *    This source code is free software; you can redistribute it
+ *    and/or modify it in source code form under the terms of the GNU
+ *    General Public License as published by the Free Software
+ *    Foundation; either version 2 of the License, or (at your option)
+ *    any later version.
+ *
+ *    This program is distributed in the hope that it will be useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ifdef HAVE_CVS_IDENT
+#ident "$Id: a_vcl.c,v 1.6 2003/06/17 16:55:07 steve Exp $"
+#endif
+
+#include  <vpi_user.h>
+#include  <acc_user.h>
+#include  <stdlib.h>
+#ifdef HAVE_MALLOC_H
+#include  <malloc.h>
+#endif
+#include  "priv.h"
+#include  <assert.h>
+
+/*
+ * This is the structure of a record that I use locally to hold the
+ * information about a VCL. This record includes a pointer to the vpi
+ * callback that is actually watching the value, and that callback has
+ * a pointer to this record in its user_data so that I can get to it
+ * when the value changes.
+ *
+ * Keep all these records in a vcl_list so that I can get access to
+ * them for the vcl_delete.
+ */
+struct vcl_record {
+	/* Object who's value I'm watching. */
+      vpiHandle obj;
+	/* User's callback routine. */
+      PLI_INT32(*consumer)(p_vc_record);
+      void*user_data;
+
+      PLI_INT32 vcl_flag;
+
+      vpiHandle callback;
+      struct vcl_record*next;
+};
+
+static struct vcl_record*vcl_list = 0;
+
+static int vpi_strength_to_vcl(int vs)
+{
+      switch (vs) {
+	  case vpiSupplyDrive:
+	    return vclSupply;
+	  case vpiStrongDrive:
+	    return vclStrong;
+	  case vpiPullDrive:
+	    return vclPull;
+	  case vpiLargeCharge:
+	    return vclLarge;
+	  case vpiWeakDrive:
+	    return vclWeak;
+	  case vpiMediumCharge:
+	    return vclMedium;
+	  case vpiSmallCharge:
+	    return vclSmall;
+	  case vpiHiZ:
+	    return vclHighZ;
+	  default:
+	    return -1;
+      }
+}
+
+/*
+ * This is a VPI callback that notices the value change. This function
+ * further dispatches the information about the callback to the
+ * consumer function.
+ */
+static PLI_INT32 vcl_value_callback(struct t_cb_data*cb)
+{
+      s_vpi_time sim_time;
+      s_vpi_value obj_value;
+      struct t_vc_record vcr;
+      struct vcl_record*cur = (struct vcl_record*)cb->user_data;
+
+      sim_time.type = vpiSimTime;
+      vpi_get_time(cur->obj, &sim_time);
+
+      switch (cur->vcl_flag) {
+	  case VCL_VERILOG_LOGIC:
+	    vpi_printf("XXXX vcl_value_callback(%s=%d);\n",
+		       vpi_get_str(vpiName, cur->obj), -1);
+
+	    vcr.vc_reason = logic_value_change;
+	    break;
+
+	  case VCL_VERILOG_STRENGTH:
+	    vcr.vc_reason = strength_value_change;
+	    obj_value.format = vpiStrengthVal;
+	    vpi_get_value(cur->obj, &obj_value);
+	    assert(obj_value.format == vpiStrengthVal);
+	    switch (obj_value.value.strength[0].logic) {
+		case vpi0:
+		  vcr.out_value.strengths_s.logic_value = acc0;
+		  vcr.out_value.strengths_s.strength1 =
+			vpi_strength_to_vcl(obj_value.value.strength[0].s0);
+		  vcr.out_value.strengths_s.strength2 =
+			vpi_strength_to_vcl(obj_value.value.strength[0].s0);
+		  break;
+		case vpi1:
+		  vcr.out_value.strengths_s.logic_value = acc1;
+		  vcr.out_value.strengths_s.strength1 =
+			vpi_strength_to_vcl(obj_value.value.strength[0].s1);
+		  vcr.out_value.strengths_s.strength2 =
+			vpi_strength_to_vcl(obj_value.value.strength[0].s1);
+		  break;
+		case vpiX:
+		  vcr.out_value.strengths_s.logic_value = accX;
+		  vcr.out_value.strengths_s.strength1 =
+			vpi_strength_to_vcl(obj_value.value.strength[0].s1);
+		  vcr.out_value.strengths_s.strength2 =
+			vpi_strength_to_vcl(obj_value.value.strength[0].s0);
+		  break;
+		case vpiZ:
+		  vcr.out_value.strengths_s.logic_value = accZ;
+		  vcr.out_value.strengths_s.strength1 = vclHighZ;
+		  vcr.out_value.strengths_s.strength2 = vclHighZ;
+		  break;
+		default:
+		  assert(0);
+	    }
+
+	    if (pli_trace) {
+		  fprintf(pli_trace,
+			  "Call vcl_value_callback(%s=%d <s1=%d,s2=%d>)\n",
+			  vpi_get_str(vpiFullName, cur->obj),
+			  vcr.out_value.strengths_s.logic_value,
+			  vcr.out_value.strengths_s.strength1,
+			  vcr.out_value.strengths_s.strength2);
+	    }
+	    break;
+
+	  default:
+	    assert(0);
+      }
+
+      vcr.vc_hightime = sim_time.high;
+      vcr.vc_lowtime  = sim_time.low;
+      vcr.user_data = cur->user_data;
+      
+      (cur->consumer) (&vcr);
+      return 0;
+}
+
+void acc_vcl_add(handle obj, PLI_INT32(*consumer)(p_vc_record),
+		 void*data, PLI_INT32 vcl_flag)
+{
+      struct vcl_record*cur;
+      struct t_cb_data cb;
+
+      switch (vpi_get(vpiType, obj)) {
+	  case vpiNet:
+	    cur = malloc(sizeof (struct vcl_record));
+	    cur->obj = obj;
+	    cur->consumer = consumer;
+	    cur->user_data = data;
+	    cur->vcl_flag = vcl_flag;
+	    cur->next = vcl_list;
+	    vcl_list = cur;
+
+	    cb.reason = cbValueChange;
+	    cb.cb_rtn = vcl_value_callback;
+	    cb.obj = obj;
+	    cb.time = 0;
+	    cb.value = 0;
+	    cb.user_data = (void*)cur;
+	    cur->callback = vpi_register_cb(&cb);
+
+	    if (pli_trace) {
+		  fprintf(pli_trace, "acc_vcl_add(<%s>, ..., %p, %d)\n",
+			  vpi_get_str(vpiFullName, obj), data, vcl_flag);
+	    }
+	    break;
+
+	  default:
+	    vpi_printf("XXXX acc_vcl_add(<type=%d>, ..., %d);\n",
+		       vpi_get(vpiType, obj), vcl_flag);
+	    break;
+      }
+
+}
+
+void acc_vcl_delete(handle obj, PLI_INT32(*consumer)(p_vc_record),
+		    void*data, PLI_INT32 vcl_flag)
+{
+      vpi_printf("XXXX acc_vcl_delete(...)\n");
+}
+
+
+/*
+ * $Log: a_vcl.c,v $
+ * Revision 1.6  2003/06/17 16:55:07  steve
+ *  1) setlinebuf() for vpi_trace
+ *  2) Addes error checks for trace file opens
+ *  3) removes now extraneous flushes
+ *  4) fixes acc_next() bug
+ *
+ * Revision 1.5  2003/05/18 00:16:35  steve
+ *  Add PLI_TRACE tracing of PLI1 modules.
+ *
+ *  Add tf_isetdelay and friends, and add
+ *  callback return values for acc_vcl support.
+ *
+ * Revision 1.4  2003/04/30 01:09:29  steve
+ *  Conditionally include malloc.h
+ *
+ * Revision 1.3  2003/04/24 02:02:37  steve
+ *  Clean up some simple warnings.
+ *
+ * Revision 1.2  2003/04/20 02:48:39  steve
+ *  Support value change callbacks.
+ *
+ * Revision 1.1  2003/04/12 18:57:14  steve
+ *  More acc_ function stubs.
+ *
+ */
+