Jacob Walker
|
c1fb3cab6c
|
1kb rom DRC clean
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
7805fcb21e
|
more top level routing cleanup
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
fef9902c45
|
rom base passing tests with top level routing
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
4c34a54d32
|
top level boundary fixes
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
7fe5ed5c41
|
edge routing
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
09f9c4cc20
|
some rom bank cleanup
|
2023-03-30 11:30:50 -07:00 |
|
mrg
|
56e14113aa
|
Change rom_base_bank name and top pin names
|
2023-03-30 11:30:50 -07:00 |
|
mrg
|
fe65a20431
|
Rename ROM unit tests.
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
b50ec272da
|
updated top level rom unit tests
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
41f0b9a412
|
rom compiler top level
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
2d5199961d
|
revert changes to pinvbuf
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
382c91f342
|
precharge array test passing sky130
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
92251fe61e
|
more code cleaning
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
90cf382a43
|
removed hardcoded DRC rule
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
af0209ec96
|
passing code style
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
79efff9ca6
|
code cleanup and updated copyright
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
bbf2cd2913
|
Changes for test generation and simulation
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
89c7d50bd1
|
added row of nmos to end of array for precharge
|
2023-03-30 11:30:50 -07:00 |
|
SWalker
|
f847721500
|
changes to control logic, invert polarity of precharge
|
2023-03-30 11:30:50 -07:00 |
|
SWalker
|
9cefe5da7c
|
added unrouted output buffers
|
2023-03-30 11:30:50 -07:00 |
|
SWalker
|
764601a721
|
added binning to precharge pmos
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
736bd51fe1
|
add top level pins for sim
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
81bf2d7ae7
|
fixed decode lvs
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
16df8e0e43
|
fixing decoder lvs
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
559300e5cc
|
taps in main array and decoder
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
f7aed247fd
|
column control and address precharge
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
ce8197d206
|
pitch match decoder and array
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
e697efa5f6
|
fixed base array lvs
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
b2631b60ff
|
updated imports to match upstream dev openram
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
63925bd48e
|
Decoder array and start of rom bank
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
bc8d564dbf
|
array with poly straps passing drc/lvs
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
aea3c0ad01
|
passing drc/lvs on 4x4 rom array
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
a3e271f6fb
|
reoriented cell and added tap cell
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
7309af7e29
|
base and dummy array alignment in sky130
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
d7ac26a053
|
array generation and bitline routing with array module
|
2023-03-30 11:30:50 -07:00 |
|
Jacob Walker
|
4db5c3be26
|
basic nmos array, for nand rom
|
2023-03-30 11:30:50 -07:00 |
|
Sam Crow
|
e20f28580f
|
support no rbls in local array
|
2023-03-09 14:44:05 -08:00 |
|
Sam Crow
|
41344a980b
|
change array modules to allow rbl=[0, 0]
|
2023-03-09 10:23:28 -08:00 |
|
mrg
|
58f1b55e08
|
Over-ride build_graph in row/col caps to remove incorrect graph error.
|
2023-03-01 09:25:56 -08:00 |
|
samuelkcrow
|
e90964fbda
|
update copyright
|
2023-02-21 14:04:31 -08:00 |
|
samuelkcrow
|
ad4b4f66dc
|
use capped array to create banks
|
2023-02-21 09:58:46 -08:00 |
|
samuelkcrow
|
3a8e29ce77
|
Merge remote-tracking branch 'origin/dev' into no_rbl
|
2023-02-20 22:11:02 -08:00 |
|
samuelkcrow
|
52dcd81a08
|
use left_rbl instead of rbl to calculate replica column mirroring (column offset)
|
2023-02-20 17:28:24 -08:00 |
|
samuelkcrow
|
51a7161cd7
|
fix mirroring of cap cells in cap rows
|
2023-02-14 10:59:00 -08:00 |
|
samuelkcrow
|
2565305158
|
fix positional getters
|
2023-02-13 18:45:21 -08:00 |
|
samuelkcrow
|
8d6d8f2f8c
|
revert variable names to those inherited from bitcell base array
|
2023-02-13 18:45:21 -08:00 |
|
samuelkcrow
|
2948b08e66
|
copy rbl default values logic from lower array modules
|
2023-02-06 20:04:54 -08:00 |
|
samuelkcrow
|
796b1913cf
|
fix typo in wordline var
|
2023-02-06 20:01:49 -08:00 |
|
samuelkcrow
|
c256a5eb44
|
fix coppied functions from replica array to work correctly in capped array
|
2023-02-06 19:57:42 -08:00 |
|
samuelkcrow
|
4a22c5c56f
|
add instance offset to capped array offset getters
|
2023-02-06 19:40:37 -08:00 |
|