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OpenRAM
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  • 2189af06b0
         Merge d4dc7e94a2 into c99b134deb K.Makise 2026-01-22 14:29:51 +0800
  • 4f976bb9bd
         Merge 21868f9de7 into c99b134deb Marti Alonso 2026-01-22 14:29:50 +0800
  • c99b134deb
         Merge pull request #280 from Aurora7913/issue279 dev Matt Guthaus 2026-01-16 06:24:55 -0800
  • e32f3164e4
         fix typo Maarten Boersma 2026-01-16 14:58:41 +0100
  • 7382ea7dda
         fix #279: expliticly extract single number from numpy array to meet stricter numpy>=2.4.0 code hygiene Maarten Boersma 2026-01-16 13:40:05 +0100
  • ce5595adf1
         Merge pull request #275 from vikashpatel24/dev Matt Guthaus 2025-10-17 09:46:49 -0700
  • b9bb6898af Fix for Missing lef_rom_interconnect in tech.py Vikash Patel 2025-10-17 14:40:03 +0530
  • 21868f9de7 Consider spare columns when building liberty file Marti Alonso 2025-08-15 23:48:31 +0000
  • 3227f1bb52
         Merge aa2cf88870 into ea15a81443 Mik Igor 2025-08-01 02:09:32 +0000
  • aa33706449
         Merge 6c7c6a9fba into ea15a81443 Felix Schneider 2025-07-21 20:55:43 -0400
  • ea15a81443
         Merge pull request #270 from hpretl/stable stable Matt Guthaus 2025-06-26 13:15:50 -0700
  • 9492349d7a Bump version Harald Pretl 2025-06-26 21:21:13 +0200
  • 01686a2005 Switch from `volare` to `ciel` Harald Pretl 2025-06-26 21:21:06 +0200
  • e63f70da5e Update README by removing slack and email group. Update website. Matthew Guthaus 2025-04-01 10:44:49 -0700
  • d4dc7e94a2 remove gitlab-ci FriedrichWu 2025-02-12 09:51:12 +0100
  • 2ff7833e3b
         Merge pull request #1 from FriedrichWu/dev_supply_fix K.Makise 2025-02-09 10:06:15 +0100
  • a0ff83c00a solve overlap of wmask in channel router FriedrichWu 2024-12-23 23:44:21 +0100
  • 48a7065b31 make channel router better FriedrichWu 2024-12-23 19:38:42 +0100
  • 691f7a989e speed up constructive approach in 1rw-only FriedrichWu 2024-12-23 17:19:19 +0100
  • 70ed2a506e deleting spacing, add ci test, fixing merge error FriedrichWu 2024-12-22 12:14:57 +0100
  • 74cab87782 add tech fix FriedrichWu 2024-12-21 18:57:06 +0100
  • 474a240f38 move apporach select to options.py FriedrichWu 2024-12-21 18:22:06 +0100
  • bda3adf9f9 more stable FriedrichWu 2024-12-16 00:13:40 +0100
  • 4fe635a05f add route_outside, remove unused methods FriedrichWu 2024-11-20 16:24:26 +0100
  • 86588619fd first commt FriedrichWu 2024-11-17 10:35:01 +0100
  • 8104a42f0e
         Update artifact action Jesse Cirimelli-Low 2024-11-13 22:45:31 -0800
  • bc1cc36ade Merge branch 'whitespace_fix' of github.com:TristanRobitaille/OpenRAM into dev mrg 2024-11-12 09:49:00 -0800
  • 3184e1d0e4 Merge branch 'add-doc' of github.com:FriedrichWu/OpenRAM into dev mrg 2024-11-12 09:47:57 -0800
  • f56460bb94 make code clean FriedrichWu 2024-11-12 17:02:02 +0100
  • 7ec407314a add documentation FriedrichWu 2024-11-11 16:18:45 +0100
  • 1f5fe62456 Added whitespace between : and 'minimum_period', '1kOhm' and 'min_pulse_width' as required by Liberty file standard Tristan Robitaille 2024-11-10 14:31:21 +0100
  • 1f1f064036 fix clk csb overlap problem FriedrichWu 2024-10-31 09:44:11 +0100
  • 434063656f fix bugs in channel routing, which will add strange shape in m2 at dff pins FriedrichWu 2024-10-31 09:43:34 +0100
  • 61f5ff6ec4 updata io_pin_placer FriedrichWu 2024-10-30 13:24:53 +0100
  • ee6be23cfa first comment FriedrichWu 2024-09-17 11:54:30 +0200
  • 20e454925a add io placer FriedrichWu 2024-09-05 10:14:00 +0200
  • 6743049d44 clean version FriedrichWu 2024-09-05 10:08:59 +0200
  • 0ae194f17c Simple version fix FriedrichWu 2024-08-20 09:28:48 +0200
  • 725c4423cf fix FriedrichWu 2024-07-30 16:11:40 +0200
  • e3170abd01 Simple version without lvs(rutiime problem with magic FriedrichWu 2024-07-30 15:04:47 +0200
  • e6ca825157 recrusive placement of dffs-naive edition FriedrichWu 2024-07-22 10:44:06 +0200
  • fb7f92394b fix the [0] problem in spare_wen FriedrichWu 2024-07-15 14:59:25 +0200
  • 8ecdc939d0 temp_fix of gds/lef cell name not unique problem, not elegant FriedrichWu 2024-07-10 13:30:23 +0200
  • 4efc0e688b fix the lef file problem partly, spare_wen0[0] left FriedrichWu 2024-07-03 21:14:32 +0200
  • 3f1f58065d Add nand4 leakage to sky130 tech mrg 2024-07-01 10:14:43 -0700
  • f69f8de000 first commit FriedrichWu 2024-06-26 17:40:22 +0200
  • 3ee769a771 first commit FriedrichWu 2024-06-21 13:48:42 +0200
  • 8e7f523ed8
         Ensure rom_data dir exists Uri Shaked 2024-03-26 15:07:13 +0200
  • 0937f86761 Disable check_lvsdrc for gf180mcu mole99 2024-02-03 12:15:11 +0100
  • 85e242fa27 Add gf180mcu ROM example mole99 2024-01-18 18:16:13 +0100
  • 6c7c6a9fba Fix wire capacitance unit in sky130, gf180 Felix Schneider 2024-01-22 17:31:15 +0100
  • b6a6f12642 Bump version: 1.2.47 -> 1.2.48 v1.2.48 vlsida-bot 2024-01-21 17:32:32 +0000
  • 306da8a895 Merge branch 'sky130_regress' into dev Eren Dogan 2024-01-20 21:05:22 -0800
  • 0cf60a6a18 Give u+x permissions for rom tests Eren Dogan 2024-01-20 17:49:52 -0800
  • 55e5c425e9 Fix same file error and enable passing tests Eren Dogan 2024-01-20 08:38:18 -0800
  • 14c219d9f1 Enable working tests from disabled stamps Eren Dogan 2024-01-19 15:16:30 -0800
  • 855139bc4e Add Makefile target to run broken tests only Eren Dogan 2024-01-19 15:15:52 -0800
  • 0423f10926 Bump version: 1.2.46 -> 1.2.47 v1.2.47 vlsida-bot 2024-01-19 15:39:54 +0000
  • 156eb4f0f7 Force install requirements in miniconda Eren Dogan 2024-01-18 20:17:14 -0800
  • 18b19b8d9d Install dependencies before running regression Eren Dogan 2024-01-18 14:59:33 -0800
  • 5081cf2383 Fix make target in regression Eren Dogan 2024-01-18 14:45:44 -0800
  • 84020f13c6 Clarify OpenRAM installation mole99 2024-01-18 23:24:22 +0100
  • 0861ea5632 Update documentation mole99 2024-01-18 18:43:52 +0100
  • daa6286a3a Use volare as PDK version manager mole99 2023-12-23 15:32:09 +0100
  • e7dbf7443e Bump version: 1.2.45 -> 1.2.46 v1.2.46 vlsida-bot 2024-01-04 11:31:14 +0000
  • 0a1de57cae Update copyright year Eren Dogan 2024-01-03 14:32:44 -0800
  • fc37bf6859 Bump version: 1.2.44 -> 1.2.45 v1.2.45 vlsida-bot 2023-12-21 20:03:42 +0000
  • 8032fa75a4 Add LEF output for ROM mole99 2023-12-14 16:44:09 +0100
  • 05884cf6a7 Bump version: 1.2.43 -> 1.2.44 v1.2.44 vlsida-bot 2023-12-21 01:03:55 +0000
  • 9d6052b86c fix for matching the layout vs verilog port names for rom Hadir Khan 2023-12-20 15:27:55 -0800
  • caa9b2a2d8 Bump version: 1.2.42 -> 1.2.43 v1.2.43 vlsida-bot 2023-12-20 18:07:25 +0000
  • e35f060d32 Use newer builds for trilinos and xyce Eren Dogan 2023-12-20 08:30:36 -0800
  • efd43c3191 Merge branch 'dev' into issue_fix Eren Dogan 2023-12-06 13:30:22 -0800
  • 7531e38cad Remove unused local variable Eren Dogan 2023-12-05 11:18:58 -0800
  • 39a66fcb87 Fix some lint errors Eren Dogan 2023-12-05 11:16:22 -0800
  • 6cfb22959c Remove unused imports Eren Dogan 2023-12-05 11:08:32 -0800
  • 02810a0740 Prevent import error Eren Dogan 2023-12-05 10:31:18 -0800
  • e73ff401fb Bump version: 1.2.41 -> 1.2.42 v1.2.42 vlsida-bot 2023-11-08 03:28:12 +0000
  • 6bd437cfa8 Fixed bug that made metal-metal vias think they were well contacts SWalker 2023-11-07 14:27:11 -0800
  • d59a60eaf3 Update gitignore for gf180 SWalker 2023-11-07 01:18:21 -0800
  • b9570b8ddf removed gf180 specific code from ptx SWalker 2023-11-07 01:01:05 -0800
  • 6e2dadeff5 added some documentation for GF180 usage SWalker 2023-11-07 01:00:44 -0800
  • fc1a9a9a2b revert change to Openpdks commit SWalker 2023-11-07 00:56:16 -0800
  • ce1861f342 proper output rom bank output layer SWalker 2023-10-31 23:23:57 -0700
  • d161cc55a5 fixed missing broken stamp SWalker 2023-10-30 22:54:59 -0700
  • a45e16bff5 re-added rom tests to regression ignore for freepdk45 SWalker 2023-10-30 21:00:48 -0700
  • 26068fd2e1 more ptx fixes SWalker 2023-10-30 20:31:29 -0700
  • b453aa23c2 fix ptx minwidth calculation for freepdk45 SWalker 2023-10-30 17:58:17 -0700
  • 5378a308c1 updated gitignore and regression make to ignore gf180. Fixed issue with rom decoder routing SWalker 2023-10-26 21:56:13 -0700
  • bd9ebc3300 updated the spice file Hadir Khan 2023-03-13 13:41:54 -0700
  • 561e0c228c updated the cell name for layout and schematic hadirkhan10 2023-01-23 17:56:43 -0800
  • 4b4153bdea renamed the gds and sp file to reflect the cell name hadirkhan10 2023-01-22 18:20:10 -0800
  • 98a4210b06 added the gds and spice of the bitcell hadirkhan10 2023-01-22 16:37:52 -0800
  • 042bfcabea added the custom cell definition hadirkhan10 2023-01-22 18:18:45 -0800
  • b65ebc6160 corrected the import statement and removed strap variant attribute which is no longer needed Hadir Khan 2023-04-07 14:56:18 -0700
  • 1f35855c6d remove old rom test SWalker 2023-09-14 21:48:40 -0700
  • 9b99e6c124 bunch of cleanups to core rom classes SWalker 2023-09-14 21:36:57 -0700
  • ddba3b3718 move vdd pins around to make routing nice SWalker 2023-09-14 21:33:49 -0700
  • 5c22e382b5 add parameter to make routing horizonal vdd rails easier SWalker 2023-09-14 21:31:45 -0700
  • 4b3af38727 change min rail to contact spacing for long gf180 contact extend SWalker 2023-09-14 21:29:17 -0700