mirror of https://github.com/VLSIDA/OpenRAM.git
reoriented cell and added tap cell
This commit is contained in:
Jacob Walker
parent
7309af7e29
commit
a3e271f6fb
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@ -39,7 +39,8 @@ class ptx(design):
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connect_drain_active=False,
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connect_source_active=False,
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connect_poly=False,
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num_contacts=None):
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num_contacts=None,
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):
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if "li" in layer:
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self.route_layer = "li"
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@ -47,11 +48,11 @@ class ptx(design):
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self.route_layer = "m1"
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# Default contacts are the lowest layer
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if not add_source_contact:
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if add_source_contact == None:
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add_source_contact = self.route_layer
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# Default contacts are the lowest layer
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if not add_drain_contact:
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if add_drain_contact == None:
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add_drain_contact = self.route_layer
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# We need to keep unique names because outputting to GDSII
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@ -31,15 +31,16 @@ class rom_base_array(bitcell_base_array):
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def create_netlist(self):
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self.add_modules()
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self.add_pins()
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self.create_instances()
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self.create_taps()
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def create_layout(self):
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#self.add_layout_pins()
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self.place_ptx()
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#self.route_horizontal_pins(insts=self.cell_inst.values(), layer=self.route_layer, name="S")
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self.place_tap(self.column_size)
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self.place_tap(0)
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#self.route_horizo ntal_pins(insts=self.cell_inst.values(), layer=self.route_layer, name="S")
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#self.route_bitlines()
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#self.route_wordlines()
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@ -51,63 +52,72 @@ class rom_base_array(bitcell_base_array):
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#def add_pins(self):
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def add_boundary(self):
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self.width = self.cell.width * self.column_size
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self.height = self.cell.height * self.row_size
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self.width = self.dummy.width * self.column_size
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self.height = self.dummy.height * self.row_size
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super().add_boundary()
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def add_modules(self):
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# base cell, nmos tx that represents a 1
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self.cell = factory.create(module_type="rom_base_cell")
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self.dummy = factory.create(module_type="rom_dummy_cell", route_layer=self.route_layer)
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# "dummy" cells represent 0
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#dummy cell with no contacts
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self.dummy_nc = factory.create(module_type="rom_dummy_cell")
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self.cell_nc = factory.create(module_type="rom_base_cell")
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#dummy cell with drain contact
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self.dummy_dc = factory.create(module_type="rom_dummy_cell", drain_contact=True)
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self.cell_dc = factory.create(module_type="rom_base_cell", add_drain_contact=self.route_layer)
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#dummy cell with source contact
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self.dummy_sc = factory.create(module_type="rom_dummy_cell", source_contact=True)
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self.cell_sc = factory.create(module_type="rom_base_cell", add_source_contact=self.route_layer)
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#dummy cell with all contacts
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self.dummy_ac = factory.create(module_type="rom_dummy_cell", source_contact=True, drain_contact=True)
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self.cell_ac = factory.create(module_type="rom_base_cell", add_source_contact=self.route_layer, add_drain_contact=self.route_layer)
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self.poly_tap = factory.create(module_type="rom_poly_tap")
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def create_taps(self):
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self.tap_inst = {}
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for()
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def create_instances(self):
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self.cell_inst = {}
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self.cell_list = []
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self.current_row = 0
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#When rotated correctly rows are bit lines
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for row in range(self.row_size):
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row_list = []
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#when rotated correctly cols are word lines
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for col in range(self.column_size):
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name = "bit_r{0}_c{1}".format(row, col)
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if(self.data[row][col] == 1):
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self.cell_inst[row, col]=self.add_inst(name=name,
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mod=self.cell)
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self.connect_inst(["vdd", "gnd", "gnd"])
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else:
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if row < self.row_size - 1 and row > 0 and self.data[row + 1][col] == 0 and self.data[row - 1][col] == 0:
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self.cell_inst[row, col]=self.add_inst(name=name, mod=self.cell_ac)
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if col < self.column_size - 1 and col > 0 and self.data[row][col + 1] == 1 and self.data[row][col - 1] == 1:
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self.cell_inst[row, col]=self.add_inst(name=name, mod=self.dummy_ac)
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elif row > 0 and self.data[row - 1][col] == 0:
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self.cell_inst[row, col]=self.add_inst(name=name, mod=self.cell_sc)
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elif col > 0 and self.data[row][col - 1] == 1:
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self.cell_inst[row, col]=self.add_inst(name=name, mod=self.dummy_dc)
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elif col < self.column_size - 1 and self.data[row][col + 1] == 1:
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self.cell_inst[row, col]=self.add_inst(name=name, mod=self.dummy_sc)
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elif row < self.row_size - 1 and self.data[row + 1][col] == 0:
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self.cell_inst[row, col]=self.add_inst(name=name, mod=self.cell_dc)
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else:
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self.cell_inst[row, col]=self.add_inst(name=name, mod=self.dummy_nc)
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self.cell_inst[row, col]=self.add_inst(name=name, mod=self.cell_nc)
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self.connect_inst(["vdd", "gnd", "gnd"])
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else:
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self.cell_inst[row, col]=self.add_inst(name=name,
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mod=self.dummy)
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self.connect_inst([])
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row_list.append(self.cell_inst[row, col])
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self.cell_list.append(row_list)
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@ -120,6 +130,19 @@ class rom_base_array(bitcell_base_array):
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# Make a flat list too
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self.all_bitline_names = [x for sl in zip(*self.bitline_names) for x in sl]
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def place_tap(self, col):
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self.tap_pos = {}
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for row in range(self.row_size):
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tap_x = self.dummy.width * (col_offset)
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tap_y = self.dummy.height * row
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self.tap_pos[row, col] = vector(tap_x, tap_y)
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self.tap_inst[row, col].place(self.tap_pos[row, col])
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def place_ptx(self):
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self.cell_pos = {}
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@ -129,11 +152,11 @@ class rom_base_array(bitcell_base_array):
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# columns are word lines
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for col in range(self.column_size):
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cell_x = (self.cell.width) * col
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cell_y = row * (self.cell.height)
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cell_x = (self.dummy.width) * col
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cell_y = row * (self.dummy.height)
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self.cell_pos[row, col] = vector(cell_x, cell_y)
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self.cell_inst[row, col].place(self.cell_pos[row, col])
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self.cell_inst[row, col].place(self.cell_pos[row, col], rotate=90)
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#cell_x = self.cell.width * col
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#cell_y = self.cell.height * row
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#print(self.nmos.height + self.nmos.poly_extend_active)
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@ -242,7 +265,3 @@ class rom_base_array(bitcell_base_array):
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bitcell_pins.append("gnd")
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return bitcell_pins
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@ -19,8 +19,8 @@ from tech import drc
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class rom_base_cell(rom_dummy_cell):
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def __init__(self, name="", cell_name=None):
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super().__init__(name, cell_name)
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def __init__(self, name="", cell_name=None, add_source_contact=False, add_drain_contact=False, route_layer="m1"):
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super().__init__(name, cell_name, add_source_contact, add_drain_contact, route_layer)
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#self.route_layer= route_layer
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#self.create_netlist()
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#self.create_layout()
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@ -52,7 +52,7 @@ class rom_base_cell(rom_dummy_cell):
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def create_nmos(self):
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self.cell_inst = self.add_inst( name=self.name,
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mod=self.nmos,
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rotate=90)
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)
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self.connect_inst(["bl_h", "wl", "bl_l", "gnd"])
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@ -17,11 +17,11 @@ from tech import drc
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class rom_dummy_cell(design):
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def __init__(self, name="", cell_name=None, source_contact=False, drain_contact=False):
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def __init__(self, name="", cell_name=None, add_source_contact=False, add_drain_contact=False, route_layer="m1"):
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super().__init__(name, cell_name)
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self.route_layer = "m1"
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self.source_contact=source_contact
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self.drain_contact=drain_contact
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self.route_layer = route_layer
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self.add_source_contact=add_source_contact
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self.add_drain_contact=add_drain_contact
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self.create_netlist()
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self.create_layout()
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@ -42,17 +42,10 @@ class rom_dummy_cell(design):
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self.add_boundary()
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self.add_poly()
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self.add_metal()
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#poly_offset =
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# vector(0.5 * self.nmos.active_contact.width + 0.5 * self.nmos.poly_width + self.nmos.active_contact_to_gate, 0)
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#self.add_rect( layer="poly",
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# offset=poly_offset,
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# height=self.nmos.height + self.nmos.poly_extend_active,
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# width=self.nmos.poly_width
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# )
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print(self.height)
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print(self.width)
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self.add_label("0,0", self.route_layer)
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#self.add_wire( layers=self.route_layer)
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#self.add_rect( layer=self.route_layer)
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@ -73,17 +66,21 @@ class rom_dummy_cell(design):
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self.cell_diffusion_offset = ((self.base_width - 2 * self.active_enclose_contact - self.nmos.contact_width) - drc("active_to_active")) * 0.5
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# width offset to account for poly-active spacing between base and dummy cells on the same bitline
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self.poly_active_offset = 0.5 * (self.base_width - 2 * self.cell_diffusion_offset - (self.poly_width + 2 * self.active_enclose_contact + self.nmos.contact_width)) - self.poly_to_active
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#so that the poly taps are far enough apart
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self.poly_tap_offset = (self.base_width - self.cell_diffusion_offset - self.poly_contact.width - self.poly_active_offset) - drc("poly_to_poly")
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def add_boundary(self):
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#cell height with offsets applied
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self.height = self.nmos.height + self.poly_extend_active_spacing + 2 * self.nmos.poly_extend_active
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#cell width with offsets applied, height becomes width when the cells are rotated
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self.width = self.nmos.height + self.poly_extend_active_spacing + 2 * self.nmos.poly_extend_active
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# cell width with offsets applied, if the offsets are positive (greater than 0) they are not applied
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self.width = self.base_width - min(self.cell_diffusion_offset, 0) - min(self.poly_active_offset, 0)
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# cell height with offsets applied, width becomes height when the cells are rotated, if the offsets are positive (greater than 0) they are not applied
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self.height = self.base_width - min(self.cell_diffusion_offset, 0) - min(self.poly_active_offset, 0) - min(self.poly_tap_offset, 0)
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super().add_boundary()
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@ -93,22 +90,23 @@ class rom_dummy_cell(design):
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poly_x = 0.5 * self.nmos.contact_width + self.contact_to_gate
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self.add_rect("poly", vector(poly_x, 0), self.poly_width, self.height)
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self.poly = self.add_rect("poly", vector(poly_x, 0), self.poly_width, self.nmos.poly_height + self.poly_extend_active_spacing)
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print(self.poly_width, self.height)
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def add_metal(self):
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wire_x = min(self.cell_diffusion_offset, 0) + min(self.poly_active_offset, 0)
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wire_y = 0.5 * (self.height - self.poly_extend_active_spacing)
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wire_y = 0.5 * (self.width - self.poly_extend_active_spacing)
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wire_start = vector( wire_x, wire_y )
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wire_end = vector(self.width, wire_y)
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wire_end = vector(self.height, wire_y)
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if self.route_layer == 'm1':
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# if self.route_layer == 'm1':
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if self.drain_contact:
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self.add_via_center(self.li_stack, [wire_x, wire_y])
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if self.source_contact:
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self.add_via_center(self.li_stack, [self.width, wire_y])
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# if self.drain_contact:
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# self.add_via_center(self.li_stack, [wire_x, wire_y])
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# if self.source_contact:
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# self.add_via_center(self.li_stack, [self.width, wire_y])
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self.add_path(self.route_layer, [wire_start, wire_end])
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@ -118,8 +116,19 @@ class rom_dummy_cell(design):
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def add_nmos(self):
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#used only for layout constants
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# if not self.source_contact:
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# add_source = False
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# else:
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# add_source = self.route_layer
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# if not self.drain_contact:
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# add_drain = False
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# else:
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# add_drain = self.route_layer
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self.nmos = factory.create(module_type="ptx",
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tx_type="nmos"
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tx_type="nmos",
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add_source_contact=self.add_source_contact,
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add_drain_contact=self.add_drain_contact
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)
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@ -0,0 +1,54 @@
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from base import design
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from base import vector
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from sram_factory import factory
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class rom_poly_tap(design):
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def __init__(self, name, strap_length=0, cell_name=None, prop=None, strap_layer="m2"):
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super().__init__(name, cell_name, prop)
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self.strap_layer=strap_layer
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self.length = strap_length
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self.create_netlist()
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self.create_layout()
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def create_netlist(self):
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#for layout constants
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self.dummy = factory.create(module_type="rom_dummy_cell")
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pass
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def create_layout(self):
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self.place_via()
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self.add_boundary()
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if self.length < 0:
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self.place_strap(self.length)
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def add_boundary(self):
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self.height = self.dummy.height
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self.width = self.poly_contact.width
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super().add_boundary()
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def place_via(self):
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contact_width = self.poly_contact.width
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contact_x = contact_width * 0.5
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contact_y = self.dummy.poly.offset.x + (self.poly_width * 0.5)
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contact_offset = vector(contact_x, contact_y)
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self.via = self.add_via_stack_center(from_layer="poly",
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to_layer=self.strap_layer,
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offset=contact_offset)
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def place_strap(self, length):
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strap_start = vector(self.via.cx(), self.via.cy())
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strap_end = vector( self.dummy.width * length, self.via.cy())
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self.strap = self.add_path(self.strap_layer, (strap_start, strap_end))
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