stefan schippers
|
dcef3d4b9d
|
waves_callback(): do not set GRAPHPAN when setting cursor position numerically
|
2024-01-05 11:21:34 +01:00 |
|
Stefan Schippers
|
cd6deb0bf9
|
xschem raw_read: allow specifying t1 and t2 to load only a portion of simulation file
|
2023-12-31 20:33:08 +01:00 |
|
stefan schippers
|
b95289ca5e
|
better line width calculation / restore in export images
|
2023-12-11 16:06:49 +01:00 |
|
stefan schippers
|
4cb060f817
|
better placement of graphs in image exports. If something is selected export image will export selection. Add ability to specify area to print in ps/pdf export (set media size to bbox)
|
2023-12-11 15:18:46 +01:00 |
|
stefan schippers
|
39769187d3
|
add `xschem set cursor[12]_x` commands for moving graph cursors
|
2023-12-10 00:28:44 +01:00 |
|
stefan schippers
|
d64f4a3fc2
|
do not `xschem unhilight_all` in mos_power_ampli->hi_current launcher
|
2023-12-09 23:57:15 +01:00 |
|
stefan schippers
|
c8ced06bbe
|
add `fast` option in xschem hilight_instname. mos_power_ampli: use hilight to show devices with high current
|
2023-12-09 11:39:04 +01:00 |
|
stefan schippers
|
1e9d189ad4
|
rotated short.sym, so it matches pin positions with most other 2-terminal devices
|
2023-12-08 00:45:30 +01:00 |
|
stefan schippers
|
926cc26b74
|
updated poweramp.sch and ngspice_get_expr.sym
|
2023-12-04 00:19:50 +01:00 |
|
stefan schippers
|
8d155af82f
|
`Alt-e` does a true descend sub-schematic and opens it in another window
|
2023-11-20 17:53:28 +01:00 |
|
stefan schippers
|
2c773c4a25
|
poweramp.sch and mos_power_ampli.sch updates
|
2023-11-19 12:52:57 +01:00 |
|
stefan schippers
|
397293f227
|
spice netlist: use symbol for port list of top level schematic only if it is of type subcircuit
|
2023-11-16 23:37:16 +01:00 |
|
stefan schippers
|
a50bfb3622
|
when doing spice netlisting if top level has a symbol (and the symbol has i/o ports) use the symbol for printing the top level subckt port list. This ensures same port ordering when netlisting a testbench containing a component and netlisting the component itself. Tab context menu: open Symbol / open Schematic will use the search_schematic setting and search counterpart accordingly.
|
2023-11-16 01:26:55 +01:00 |
|
stefan schippers
|
be914f4ee4
|
raw_read(): clear text floater caches if a rawfile is successfully read
|
2023-11-15 21:04:10 +01:00 |
|
stefan schippers
|
0df3cfcc7b
|
better recognize global nets in LCC schematics (translate(), @spice_get_voltage(..) )
|
2023-11-12 13:43:31 +01:00 |
|
stefan schippers
|
6bace90b41
|
revert test changes on cmos_example.sch
|
2023-11-11 00:09:05 +01:00 |
|
stefan schippers
|
bdd641cad3
|
allow tcleval(xxxx) in % dataset specification on graph nodes
|
2023-11-11 00:03:22 +01:00 |
|
stefan schippers
|
769c7d4663
|
Add incremental_select tcl variable. It is normally set. If set show selected objects while dragging a selection rectangle. If unset show selection at end of drag operation. Fix possible endless loop whiel zooming on X axis if raw file has only one point (OP). Also if graph specifies custom plot switch to that raw file to get correct x range.
|
2023-11-09 16:41:53 +01:00 |
|
stefan schippers
|
1d59571e52
|
revert poweramp.sch changes for testing
|
2023-11-07 15:02:04 +01:00 |
|
stefan schippers
|
366fa86d57
|
do not sel tctc::*_simulation_id var if no process was started due to errors /missing command
|
2023-11-07 12:44:56 +01:00 |
|
stefan schippers
|
0b93634fee
|
Better Simulation->Graphs-> Load raw file (ask filename)
|
2023-11-03 23:37:09 +01:00 |
|
stefan schippers
|
391a744302
|
xschem setprop command: redraw all viewport if show_pin_net_names is enabled
|
2023-10-29 22:22:05 +01:00 |
|
stefan schippers
|
8c10ecb8b7
|
schematic example updates
|
2023-10-24 10:29:39 +02:00 |
|
stefan schippers
|
4beb2d08a6
|
update example schematics
|
2023-10-24 00:07:36 +02:00 |
|
stefan schippers
|
a65cd534b7
|
update circuit examples
|
2023-10-23 18:41:13 +02:00 |
|
stefan schippers
|
8f3fedab1f
|
fix a bug when closing with ctrl-q (ie from callback(), calling proc quit_xschem) and there are multiple windows, some with changed data (switch_tab() was skipped due to xctx->semaphore). Process status dialog window will not be updated if vertical slider is not positioned to bottom
|
2023-10-22 02:53:03 +02:00 |
|
stefan schippers
|
52572a6ca4
|
update cmos_example.sch
|
2023-10-17 18:16:48 +02:00 |
|
stefan schippers
|
306c5d0d15
|
fix two small memory leaks, doc updates (xschem raw command) Raw.filename renamed to Raw.rawfile
|
2023-10-17 16:08:27 +02:00 |
|
stefan schippers
|
b165720bc8
|
allow loading more and different analyses from the same raw file. Implied tcleval() in rawfile given in graphdialog, transform multiple saved OP sims into a dc sweep.
|
2023-10-17 14:00:43 +02:00 |
|
stefan schippers
|
745e3fc5f4
|
update cmos_example.sch
|
2023-10-17 00:56:49 +02:00 |
|
stefan schippers
|
8cfd51d8f9
|
add the ability to load multiple raw files with different analyses in a single schematic ( extra_rawfile() )
|
2023-10-17 00:42:31 +02:00 |
|
stefan schippers
|
63bc486391
|
update test schematic with new dataset node plotting functions
|
2023-10-14 00:19:38 +02:00 |
|
stefan schippers
|
617e6b3b8d
|
update live backannotation if "a" and "b" cursors are swapped, syntax node%n is now allowed to plot only dataset "n" of the node. Update html docs and example autozero_comp circuit
|
2023-10-13 15:51:51 +02:00 |
|
stefan schippers
|
94bccc08d9
|
do not duplicate empty strings as NULLs in hash tables
|
2023-10-09 12:49:11 +02:00 |
|
stefan schippers
|
9fee9610ab
|
vsource.sym and ammeter.sym: add "savecurrent=1|0|true|false" attribute do decide if a .save I(...) is to be printed in netlist. default is 1 for ammeter.sym and 0 for vsource.sym. Add "deltax deltay rot flip" optional parameters for xschem "copy_objects" command to make copy operation scriptable (lot more efficient than using clipboard)
|
2023-10-02 12:11:05 +02:00 |
|
stefan schippers
|
810b814211
|
added some comments in code / schematics
|
2023-06-18 23:44:52 +02:00 |
|
stefan schippers
|
d56e3939d5
|
updated xschem_library/examples/test_backannotated_subckt.sch; fix a potential segfault in proc fix_symbol
|
2023-06-08 01:08:05 +02:00 |
|
stefan schippers
|
4d98cc7b41
|
moved test_generators under generators/
|
2023-06-07 09:51:11 +02:00 |
|
stefan schippers
|
3a42cfa64c
|
added test_generators.sch example
|
2023-06-07 09:38:11 +02:00 |
|
stefan schippers
|
245993f034
|
added attributes spice_ignore=short, verilog_ignore=short, .... that will transform the instance into a short in the current netlisting mode, shorting all pins to the same net. Works similarly as lvs_ignore=short, but does not need lvs_ignore global setting
|
2023-06-07 03:41:49 +02:00 |
|
stefan schippers
|
394db224d1
|
added global tcl variable `lvs_ignore` that can be used to enable instance or symbol attributes `lvs_ignore=open` or `lvs_ignore=short` while netlisting, added `test_lvs_ignore.sch` example
|
2023-06-06 15:22:45 +02:00 |
|
stefan schippers
|
ff216e8187
|
function reset_flags() set flags on symbols and instances; call reset_flags before rebuilding connectivity to update cached values; add short.sym component that can be used to short two nets together (and remove the short using *_ignore=true); instcheck(): do not proces instances that have *_ignore=true set.
|
2023-06-06 08:42:43 +02:00 |
|
Stefan Schippers
|
f5c592c889
|
xschem resolved_net command: add [net] parameter; instcheck(): use inst[].lab instead of get_tok_value(inst[].prop_ptr, "lab",0)
|
2023-06-01 18:00:47 +02:00 |
|
Stefan Schippers
|
f3f12da486
|
updated test_extracted_netlist.sch example
|
2023-06-01 16:02:40 +02:00 |
|
stefan schippers
|
60a6a76ac2
|
update test_extracted_netlist.sch
|
2023-06-01 11:36:47 +02:00 |
|
stefan schippers
|
39f2747149
|
fix some errors found by Joanne in test_bus_tap.sch
|
2023-05-31 00:14:22 +02:00 |
|
stefan schippers
|
5085301cd7
|
add net_name=true in bus_tap.sym (so avoid setting it on instancs), add documentation for bus taps
|
2023-05-30 11:03:07 +02:00 |
|
stefan schippers
|
4a06176f0d
|
comments, more test_bus_tap examples
|
2023-05-29 16:48:13 +02:00 |
|
stefan schippers
|
487b1eb202
|
more flexible bus_tap syntax
|
2023-05-29 09:17:06 +02:00 |
|
stefan schippers
|
6bbc60f8fb
|
add more ".." bus notations: XX[4,2,8..1..3,12,23] and others. bus_tap.sym: if no "[n]" pattern is given assume it is the complete name of the slice (does not need bus basename)
|
2023-05-28 15:30:40 +02:00 |
|
stefan schippers
|
5043b14921
|
fix uninitialized wave_color due to regression after rainbow wave color enablement in double dc sweeps; more bus_tap.sym usage in examples; make bus_tap.sym work correctly for all netlist formats
|
2023-05-27 23:36:10 +02:00 |
|
Stefan Schippers
|
cff9f7d169
|
some bug fixes in resolved_net hashing, use some @#n:resolved_net labels in examples
|
2023-05-27 21:48:21 +02:00 |
|
stefan schippers
|
c3d7780150
|
updated test_bus_tap.sch with more bus tapping cases
|
2023-05-25 09:51:17 +02:00 |
|
Stefan Schippers
|
ba402e65c0
|
remove unneeded variable in create_new_tab()
|
2023-05-24 18:20:18 +02:00 |
|
stefan schippers
|
d3b99d3a76
|
update n and p jfets, added pjfet simulation
|
2023-05-24 10:02:26 +02:00 |
|
stefan schippers
|
608a144dd1
|
fix tcl procedures using find_file to find a component: use find_file_first (return 1st match) , since find_file may return multiple matches; add njfet.sym, pjfet.sym and test_jfet.sch
|
2023-05-24 08:43:05 +02:00 |
|
Stefan Schippers
|
1774ff4e3a
|
allow @#n:pin_attr or @#pin_name:pin_attr in spice format string (print_spice_element), in addition to @#n (convergence to translate()
|
2023-05-22 21:50:14 +02:00 |
|
stefan schippers
|
ade1aaf858
|
(3) update examples/test_bus_tap.sch
|
2023-05-22 08:51:23 +02:00 |
|
stefan schippers
|
6de12e5a0f
|
(2) update examples/test_bus_tap.sch
|
2023-05-22 08:09:42 +02:00 |
|
stefan schippers
|
8f63560737
|
examples/test_bus_tap.sch: auto set show_pin_net_names=1
|
2023-05-22 08:05:37 +02:00 |
|
stefan schippers
|
9715cf4a5c
|
update examples/test_bus_tap.sch
|
2023-05-22 07:45:23 +02:00 |
|
stefan schippers
|
b68dd8c099
|
when a bus label is edited correctly propagate list of instances to be redrawn if show net names on components is enabled (ie: propagate thru bus taps)
|
2023-05-22 07:28:12 +02:00 |
|
stefan schippers
|
a4d5ddb63f
|
add examples/test_bus_tap.sch
|
2023-05-22 00:49:54 +02:00 |
|
stefan schippers
|
df2111c277
|
(2) update poweramp.sch floater attributes(floater->name)
|
2023-05-19 09:36:02 +02:00 |
|
stefan schippers
|
f09731589b
|
update poweramp.sch floater attributes(floater->name)
|
2023-05-19 09:28:17 +02:00 |
|
stefan schippers
|
9d58f8cbbc
|
clear text member `floater_ptr` when text is changed to force cache update
|
2023-05-14 02:45:56 +02:00 |
|
stefan schippers
|
1ea0516b55
|
if floaters are used to display simulation data (@spice_get_voltage) force update on floater text caches on `b` cursor move
|
2023-05-14 02:22:18 +02:00 |
|
stefan schippers
|
9fcde30a52
|
do not perform tcl substitution before displaying netlist_commands text into an editor. Correctly restore xctx->current_dirname after netlisting. get_generator_command(): quote command name (just in case its pathname contains spaces). floater example labels in solar_panel.sch. Various corrections and optimizations in new floater labels code.
|
2023-05-14 01:13:18 +02:00 |
|
stefan schippers
|
9ea93e9938
|
hide_texts=true attribute added on instance will avoid the display of all symbol texts (will be probably used when using floater symbol texts)
|
2023-05-12 12:09:20 +02:00 |
|
stefan schippers
|
5e281e7f10
|
*_ignore attributes for instances and symbols cached in .flags struct member for speed optimization. added some generator netlist testcases in xschemtest.tcl
|
2023-05-10 23:29:16 +02:00 |
|
stefan schippers
|
f8846ca969
|
use symbol_ignore=true attribute on some objects in mos_power_ampli.sch, so they disappear in poweramp_lcc.sch
|
2023-05-10 04:49:32 +02:00 |
|
stefan schippers
|
3142279d02
|
Add inst_sch_select/ example directory (instance based implementation selection)
|
2023-04-25 09:15:17 +02:00 |
|
stefan schippers
|
68cf318134
|
load_sym_def(): removed embedded parameter, recognize generator names and pipe in data from generator instead of loading from file. No more set flags for generated symbols to EMBEDDED
|
2023-04-24 23:56:56 +02:00 |
|
stefan schippers
|
c4844ddd4c
|
update poweramp.sch, remove obsolete comments
|
2023-04-18 00:35:23 +02:00 |
|
stefan schippers
|
2725e0c533
|
add exit code to xschem netlist command, add execute(error,last) and execute(exitcode,last) to inspect stderr and exit code of last simulation job
|
2023-03-23 18:34:14 +01:00 |
|
stefan schippers
|
baca559ffc
|
refactor some code (use set_text_flags() to avoid repetitive code), add xschem setprop text and xschem getprop text commands to set/get text attributes
|
2023-02-01 00:23:33 +01:00 |
|
stefan schippers
|
48549f1212
|
update test schematics
|
2023-01-23 18:23:18 +01:00 |
|
stefan schippers
|
9b6b7bc19a
|
Fix some compiler warnings and add a little optimization in ascii85 encoder
|
2023-01-23 11:49:08 +01:00 |
|
stefan schippers
|
d3c6bf3c6e
|
add postscript quality attrs to some example schematics
|
2023-01-21 23:47:43 +01:00 |
|
stefan schippers
|
6af6079084
|
set line buffering when stderr redirected to file
|
2023-01-20 18:25:43 +01:00 |
|
stefan schippers
|
fba0db0c2d
|
fix corrupted postscript generation on test_images3.sch. Need to investigate why fflush()es are needed. in psprint.c
|
2023-01-16 18:06:50 +01:00 |
|
stefan schippers
|
4c59008bc5
|
ps/pdf ecxport: dont print rectangle frames around images
|
2023-01-16 16:46:57 +01:00 |
|
stefan schippers
|
2d30755f79
|
doc/sch updates (.op backannotation)
|
2023-01-15 00:25:57 +01:00 |
|
stefan schippers
|
9fa05afad9
|
fix a bug when loading multiple AC sim datasets (wrong nvars calculation, has to be doubled due to Im/Re complex components)
|
2022-12-20 01:01:58 +01:00 |
|
Stefan Frederik
|
3d49ca63c9
|
avoid tcleval() of strings returned by translate2(), show currents of resistors and diodes when annotating.
|
2022-11-04 13:35:06 +01:00 |
|
Stefan Frederik
|
98d59cd8e9
|
better handle xyce nodes in ngspice:: functions
|
2022-11-02 11:17:22 +01:00 |
|
Stefan Frederik
|
b1f011f933
|
clean up testing @path in symbols
|
2022-11-01 13:17:51 +01:00 |
|
Stefan Frederik
|
b0a88325e7
|
"@path" will be expanded in symbols with the hierarchy path, so a fully qualified instance name is obtained with @path@name
|
2022-11-01 12:54:43 +01:00 |
|
Stefan Frederik
|
4c43e77818
|
eliminated hide=true attribute for backannotation current/voltage texts (will be hidden anyway if no sim data is loaded)
|
2022-10-24 17:28:39 +02:00 |
|
Stefan Frederik
|
b3832bbe56
|
doc updates (tutorial_use_existing_subckt.html)
|
2022-10-22 22:52:55 +02:00 |
|
Stefan Frederik
|
bbf8d68681
|
example update for op backannotation
|
2022-10-22 11:05:30 +02:00 |
|
Stefan Frederik
|
8575859c63
|
doc updates (2) (op backannotation)
|
2022-10-22 11:03:40 +02:00 |
|
Stefan Frederik
|
edf33192a2
|
doc updates (op backannotation)
|
2022-10-22 10:39:44 +02:00 |
|
Stefan Frederik
|
e34211368f
|
translate2() fix recursive param substitution
|
2022-10-20 23:31:02 +02:00 |
|
Stefan Frederik
|
bc33261f90
|
better parsing xxx='<expr>' or xxx={expr} patterns in flatten.awk. Doc upcates, test circuit updates.
|
2022-10-20 20:25:49 +02:00 |
|
Stefan Frederik
|
dad83010f0
|
perf. improvements in plot_raw_custom_data() / ravg_store()
|
2022-10-17 15:17:47 +02:00 |
|
Stefan Frederik
|
ea359b8c92
|
added poweramp_lcc
|
2022-10-17 13:35:01 +02:00 |
|
Stefan Frederik
|
b0359d880a
|
use sim_pinnumber for port ordering in simulation netlists and leave pinnumber for package pin position. These two collide, for example in spice port ordering vs (transistor problem) device package pinnumbers. Dont load graphs in lcc symbols
|
2022-10-17 12:05:54 +02:00 |
|
Stefan Frederik
|
91ba5fd1d3
|
annotation of voltage and currents in (nested) LCC instances
|
2022-10-16 13:08:52 +02:00 |
|
Stefan Frederik
|
e14c8b9a11
|
wire labels: default name set to p1 instead of l1, so it will not clash with typical inductor names
|
2022-10-12 16:36:56 +02:00 |