Commit Graph

126 Commits

Author SHA1 Message Date
Hunter Nichols 907b7310ee Actually changed the noops default data in this commit. 2018-08-30 15:16:54 -07:00
Hunter Nichols 53fa6108e1 Changed most noops calls to have default input of all 0's. Changed parse_values to return dict even if some values fail. 2018-08-30 15:11:54 -07:00
Hunter Nichols e32c1fdd23 Changed part (4) of analyze to use the updated measure names. 2018-08-30 01:18:34 -07:00
Hunter Nichols 78be724867 Edited find_feasible period to use dynamic naming on its measured values and edited the algorithm to work with multiport. 2018-08-30 00:11:14 -07:00
Hunter Nichols 02cf51d3be Added generic parsing function to capture multiple values. This commit does not run and it messes up some naming conventions 2018-08-29 22:16:42 -07:00
Hunter Nichols 4b515fe1ac Changed create_test_cycles to have targeted ports for characterization rather than all ports always. 2018-08-29 17:16:11 -07:00
Hunter Nichols 775fe7b57c Fixed measure statement stating times. This commit crashes if there are no readwrite ports. 2018-08-29 15:13:31 -07:00
Hunter Nichols 8fad81ff1e Changed delay measures to add additional measure based on # of ports. Measure times are not correct yet. 2018-08-29 00:43:27 -07:00
Hunter Nichols ffe59bdf51 Edited delay measures to handle multiple readwrite ports. This commit is not well tested. 2018-08-29 00:01:22 -07:00
Hunter Nichols fa8434e5f0 Added debug checks for unsupported port options. 2018-08-28 13:01:35 -07:00
Hunter Nichols bd763fa1e3 Fixed naming issue between sram instance and PWL in stimulus 2018-08-28 12:09:02 -07:00
Hunter Nichols 75da5a994b Edited create_test_cycles to generate values that characterize all ports. Still several bugs and lib file does not support multiple ports. 2018-08-28 00:30:15 -07:00
Hunter Nichols ba5988ec7f Added write port structure to create_test_cycles. This commit contains test code. 2018-08-27 20:35:29 -07:00
Hunter Nichols d82d3df4a7 Added read port cycle data generation. This commit contains test code in create_test_cycles 2018-08-27 18:17:02 -07:00
Hunter Nichols a0e06809f9 Comments now display port in stim file. 2018-08-27 16:23:23 -07:00
Hunter Nichols 350823d434 Added basic structure to add_test_cycles to characterize multiple ports and its helper functions to allow for ports to be selected for characterization 2018-08-27 15:56:42 -07:00
Hunter Nichols 6dc72f5b1e Added additional control signal to stim file based on # of ports. 2018-08-23 17:46:24 -07:00
Hunter Nichols efcb435fde Changed # of address signals to reflect # of ports in delay 2018-08-23 14:49:56 -07:00
Hunter Nichols 9151858449 Characterizer now recognizesmultiple ports and additional DIN/DOUT signals are added to stim file. 2018-08-22 23:45:43 -07:00
Hunter Nichols 21e85297d3 Merge branch 'dev' into multiport_characterization 2018-08-22 14:50:29 -07:00
Hunter Nichols 8abf45a5d3 Some test code added. To be removed later. 2018-08-22 14:19:09 -07:00
Matt Guthaus 49bee6a96e Remove OEB signal since we split DIN/DOUT ports 2018-08-13 14:09:49 -07:00
Matt Guthaus 71606e1097 Add read cycle to clear DOUT bus before each read measure. 2018-07-27 14:06:59 -07:00
Matt Guthaus 8f72621f4a Converted delay measurement to use add_read/add_write functions.
Rewrote the logic to add one cycle at a time for easier
manipulation. This can be extended more easily into the
functional simulations.
2018-07-27 11:36:17 -07:00
Matt Guthaus bc67ad5ead Fixed timing to be measured from positive clock edge since
reading a 1 will be the precharge time.
Started modifying the lib file for DIN and DOUT ports, but did not
check the syntax yet.
2018-07-26 13:58:50 -07:00
Matt Guthaus 00a87d57ab Modified pinvbuf to have a stage effort of 4 for driving the
clock bar to wordline enable.
Fixed comments in stimulus file to have right cycle numbers.
Removed clock gating on we signal since clock gating is already
done on the WL signals. It is redundant.
2018-07-26 11:28:48 -07:00
Matt Guthaus b7525a14c2 Change DIN to DOUT in characterizer. Spacing dff flops down by m2 not m1 pitch. 2018-07-25 15:50:49 -07:00
Matt Guthaus a2d8d16c7a Split DATA into DIN and DOUT in characterizer 2018-07-11 14:19:09 -07:00
Matt Guthaus df2dce2439 Fix module import names for python3. Rename parse function to something meaningful. 2018-06-29 09:45:07 -07:00
Matt Guthaus f34c4eb7dc Convert entire OpenRAM to use python3. Works with Python 3.6.
Major changes:
Remove mpmath library and use numpy instead.
Convert bytes to new bytearrays.
Fix class name check for duplicate gds instances.
Add explicit integer conversion from floats.
Fix importlib reload from importlib library
Fix new key/index syntax issues.
Fix filter and map conversion to lists.
Fix deprecation warnings.
Fix Circuits vs Netlist in Magic LVS results.
Fix file closing warnings.
2018-05-14 16:15:45 -07:00
Hunter Nichols 6a3f0843ff Fixed accidental changes made to analytical delay. 2018-02-28 12:18:41 -08:00
Hunter Nichols e6d6680da1 Fixed conflict in delay.py 2018-02-27 13:02:22 -08:00
Hunter Nichols d0e6dc9ce7 First version of analytical power models. Still huge room for improvement. Analytical power printed with 1 verbose level. 2018-02-26 16:32:28 -08:00
Matt Guthaus 35137d1c67 Add extra comments in stimulus output. 2018-02-26 14:39:06 -08:00
Matt Guthaus a732405836 Add utility script gen_stimulus.py to help create simulations for debugging. 2018-02-26 08:54:35 -08:00
mguthaus 322f354878 Convert period to float to avoid type mismatch. 2018-02-25 11:13:43 -08:00
mguthaus f3efb5fb50 Fixed leakage and power unit test results. 2018-02-23 15:20:52 -08:00
Matt Guthaus 23f06bfa9a Reduce number of parameters in function calls for delay.py. 2018-02-22 11:14:58 -08:00
Hunter Nichols d4a0f48d4f Added power calculations for inverter. Still testing. 2018-02-21 19:51:21 -08:00
Matt Guthaus 4e414b6c15 Fix unintended unmerge of changes. Bad bad. 2018-02-21 16:03:49 -08:00
Matt Guthaus a44346110b Fix merge of results. 2018-02-21 15:47:07 -08:00
Matt Guthaus fcacd46866 UPdate tests with new delay and slew names and leakage power. 2018-02-21 15:45:49 -08:00
mguthaus b8b2375346 Updated golden tests with new leakage aware power numbers. 2018-02-21 15:44:52 -08:00
Matt Guthaus 4b9ea66a42 Change names of variables to indicate transistions for clarity. 2018-02-21 15:13:46 -08:00
Matt Guthaus 71831e7737 Get delays only for successful run. 2018-02-21 14:05:39 -08:00
Matt Guthaus 9600dae7df Remove print statements. 2018-02-21 13:45:14 -08:00
Matt Guthaus 7d2f4386e2 Include leakage of non-trimmed array. Back out leakage of trimmed, add back leakage of nontrimmed. Reorgs simulation of delay and power a bit. 2018-02-21 13:38:43 -08:00
Hunter Nichols 8ea384a761 Fixed merging issues with power branch 2018-02-14 15:21:42 -08:00
Matt Guthaus f86985821a Begin modifications for corner-based characterization. Made stimuli.py a class. Golden output files are not updated. 2018-02-09 15:33:03 -08:00
Matt Guthaus 1b4be741df Fix broken print statements 2018-02-07 17:39:42 -08:00
Matt Guthaus 8e91552701 Remvoe newline. 2018-02-07 14:33:29 -08:00
Matt Guthaus 3e4ef36efe Clean up Python comments and improve comments in stimulus file. 2018-02-07 14:04:18 -08:00
Matt Guthaus 5c4999d4cc Move delay-specific stimulus commands to delay.py. Keep stimuli.py generic. 2018-02-07 12:58:47 -08:00
Matt Guthaus 941094ce31 Return slews to 10-90 and 90-10 so I don't have to re-hardcode the results in unit tests. 2018-02-05 15:21:53 -08:00
Matt Guthaus e2e5f45cec Correct vague comments about char cycles. End simulation after last period even though a transition would mean a failed simulation. 2018-02-05 14:07:12 -08:00
Matt Guthaus a8e1abdce8 Use method=gear for ngspice to improve convergence. Split TD for trig and targ in measure statements. Start waiting for clk neg edge trigger at clk pos edge. 2018-02-05 11:36:46 -08:00
Matt Guthaus 84b42b0170 Fix bug in trim netlist. Add info comments to spice netlist and trimmed netlist. Increase verbosity for simulations. 2018-02-02 19:33:07 -08:00
Matt Guthaus 7c9c16e29c Fix assertion error syntax problem. Do not require hspice for functional test. Improve delay fail error message. 2018-02-02 12:31:33 -08:00
Hunter Nichols 56f7caf59f Added first test power model to sram 2018-02-02 12:31:33 -08:00
Matt Guthaus 590f6e01d1 Fix assertion error syntax problem. Do not require hspice for functional test. Improve delay fail error message. 2018-01-31 15:38:02 -08:00
mguthaus 09ca8ba17d Improve output format. Rename option to be more sensible. 2017-11-22 15:57:29 -08:00
Matt Guthaus 88740c107f Improve global and code structure using modules.
Comment and reorganize globals.py
Tests consistently use globals module for OPTions.
Add characterizer as module support.
Modify unit tests to reload new characterizer for ngspice/hspice.
Enable relative and absolute config file arguments so you can run
openram from anywhere on any config file.
2017-11-16 13:52:58 -08:00
Matt Guthaus 29c5ab48f0 Add spice pruning for speed-up. Fix spice search bugs. Add time in stages to openram output. 2017-11-14 13:24:14 -08:00
Matt Guthaus 95f1a24f72 Change default delay modeling to analytical. Add command-line option characterization by simulation (-c). 2017-11-09 11:13:44 -08:00
Matt Guthaus e06e1691c8 Two bank SRAMs working in both technologies. 2017-09-29 16:22:13 -07:00
Matt Guthaus d77216d6dd Fix LEF mismatch due to path/wire hierarchy change. Add characterizer feasible delay/slew check. Update delay tests with new delays. 2017-08-07 10:24:45 -07:00
Matt Guthaus 20d8c0bc45 Improved characterizer. 2017-07-06 08:42:25 -07:00
mguthaus bd7958be28 Fixed format test. It was not performing checks due to moving of OPENRAM_HOME. Fixed some tabs and print statements. 2017-04-24 11:55:11 -07:00
Matt Guthaus 841532a52f Change characterizer to be one data structure. Add approximate diff for lib file. 2016-11-23 17:18:48 -08:00
Samira Ataei 233acc3fcc Added seprate return for power values of lib. 2016-11-20 11:16:19 -06:00
Samira Ataei d195df682d Added Power results to lib.
Fixed min_period and min_pulse_width values.
  Updated lib golden files.
2016-11-19 20:19:16 -06:00
Matt Guthaus 7d0d590879 Don't converge only after a successful measurement. 2016-11-11 14:25:46 -08:00
Matt Guthaus 5e33781268 Remove control structure from ngspice. Add probe for ngspice too since it doesn't hurt. Unskip delay test. 2016-11-11 13:22:01 -08:00
Matt Guthaus 5211be5ffc No control statements in ngspice 26 2016-11-11 13:10:54 -08:00
Matt Guthaus 1356e5142d Add print of values if tests fail. Modify some ngspice tests to pass withcorrect results. 2016-11-11 09:41:43 -08:00
Matt Guthaus f48272bde6 RELEASE 1.0 2016-11-08 09:57:35 -08:00