Version bump

The variable is named VM_PARALLEL_BUILDS, not VM_PARALLEL_BUILD.

Signed-off-by: Philipp Wagner <[email protected]>

.clang-format

@@ -0,0 +1,111 @@
+---
+Language:        Cpp
+# BasedOnStyle:  LLVM
+AccessModifierOffset: -4
+AlignAfterOpenBracket: Align
+AlignConsecutiveAssignments: false
+AlignConsecutiveDeclarations: false
+AlignEscapedNewlines: DontAlign
+AlignOperands:   true
+AlignTrailingComments: false
+AllowAllParametersOfDeclarationOnNextLine: true
+AllowShortBlocksOnASingleLine: true
+AllowShortCaseLabelsOnASingleLine: true
+AllowShortFunctionsOnASingleLine: All
+AllowShortIfStatementsOnASingleLine: true
+AllowShortLoopsOnASingleLine: false
+AlwaysBreakAfterDefinitionReturnType: None
+AlwaysBreakAfterReturnType: None
+AlwaysBreakBeforeMultilineStrings: false
+AlwaysBreakTemplateDeclarations: false
+BinPackArguments: true
+BinPackParameters: true
+BraceWrapping:   
+  AfterClass:      false
+  AfterControlStatement: false
+  AfterEnum:       false
+  AfterFunction:   false
+  AfterNamespace:  false
+  AfterObjCDeclaration: false
+  AfterStruct:     false
+  AfterUnion:      false
+  AfterExternBlock: false
+  BeforeCatch:     false
+  BeforeElse:      false
+  IndentBraces:    false
+  SplitEmptyFunction: true
+  SplitEmptyRecord: true
+  SplitEmptyNamespace: true
+BreakBeforeBinaryOperators: All
+BreakBeforeBraces: Attach
+BreakBeforeInheritanceComma: false
+BreakBeforeTernaryOperators: true
+BreakConstructorInitializersBeforeComma: false
+BreakConstructorInitializers: BeforeComma
+BreakAfterJavaFieldAnnotations: false
+BreakStringLiterals: true
+ColumnLimit:     99
+CommentPragmas:  '^ IWYU pragma:'
+CompactNamespaces: false
+ConstructorInitializerAllOnOneLineOrOnePerLine: false
+ConstructorInitializerIndentWidth: 4
+ContinuationIndentWidth: 4
+Cpp11BracedListStyle: true
+DerivePointerAlignment: false
+DisableFormat:   false
+ExperimentalAutoDetectBinPacking: false
+FixNamespaceComments: true
+ForEachMacros:   
+  - foreach
+  - Q_FOREACH
+  - BOOST_FOREACH
+IncludeBlocks:   Preserve
+IncludeCategories: 
+  - Regex:           '^"(llvm|llvm-c|clang|clang-c)/'
+    Priority:        2
+  - Regex:           '^(<|"(gtest|gmock|isl|json)/)'
+    Priority:        3
+  - Regex:           '.*'
+    Priority:        1
+IncludeIsMainRegex: '(Test)?$'
+IndentCaseLabels: false
+IndentPPDirectives: None
+IndentWidth:     4
+IndentWrappedFunctionNames: false
+JavaScriptQuotes: Leave
+JavaScriptWrapImports: true
+KeepEmptyLinesAtTheStartOfBlocks: true
+MacroBlockBegin: ''
+MacroBlockEnd:   ''
+MaxEmptyLinesToKeep: 1
+NamespaceIndentation: None
+ObjCBlockIndentWidth: 2
+ObjCSpaceAfterProperty: false
+ObjCSpaceBeforeProtocolList: true
+PenaltyBreakAssignment: 2
+PenaltyBreakBeforeFirstCallParameter: 19
+PenaltyBreakComment: 300
+PenaltyBreakFirstLessLess: 120
+PenaltyBreakString: 1000
+PenaltyExcessCharacter: 1000000
+PenaltyReturnTypeOnItsOwnLine: 60
+PointerAlignment: Left
+ReflowComments:  true
+SortIncludes:    false
+SortUsingDeclarations: true
+SpaceAfterCStyleCast: false
+SpaceAfterTemplateKeyword: true
+SpaceBeforeAssignmentOperators: true
+SpaceBeforeParens: ControlStatements
+SpaceInEmptyParentheses: false
+SpacesBeforeTrailingComments: 2
+SpacesInAngles:  false
+SpacesInContainerLiterals: true
+SpacesInCStyleCastParentheses: false
+SpacesInParentheses: false
+SpacesInSquareBrackets: false
+Standard:        Cpp03
+TabWidth:        8
+UseTab:          Never
+...
+

.clang-tidy

@@ -0,0 +1,9 @@
+Checks:          'clang-diagnostic-*,clang-analyzer-*,*,-modernize*,-hicpp*,-android-cloexec-fopen,-cert-dcl50-cpp,-cert-env33-c,-cert-err34-c,-cert-err58-cpp,-clang-analyzer-core.UndefinedBinaryOperatorResult,-clang-analyzer-security*,-cppcoreguidelines-no-malloc,-cppcoreguidelines-owning-memory,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-array-to-pointer-decay,-cppcoreguidelines-pro-bounds-constant-array-index,-cppcoreguidelines-pro-bounds-pointer-arithmetic,-cppcoreguidelines-pro-type-const-cast,-cppcoreguidelines-pro-type-reinterpret-cast,-cppcoreguidelines-pro-type-static-cast-downcast,-cppcoreguidelines-pro-type-union-access,-cppcoreguidelines-pro-type-vararg,-cppcoreguidelines-special-member-functions,-fuchsia-default-arguments,-fuchsia-overloaded-operator,-google-default-arguments,-google-readability-todo,-google-runtime-references,-llvm-header-guard,-llvm-include-order,-misc-string-integer-assignment,-misc-string-literal-with-embedded-nul,-readability-braces-around-statements,-readability-container-size-empty,-readability-delete-null-pointer,-readability-else-after-return,-readability-implicit-bool-conversion,-readability-named-parameter,-readability-static-accessed-through-instance'
+WarningsAsErrors: ''
+HeaderFilterRegex: ''
+FormatStyle:     none
+CheckOptions:
+  - key:             google-readability-braces-around-statements.ShortStatementLines
+    value:           '2'
+  - key:             google-readability-namespace-comments.SpacesBeforeComments
+    value:           '2'

.codacy.yml

@@ -0,0 +1,5 @@
+---
+exclude_paths:
+  - '.github/**'
+  - 'ci/build_verilator.sh'
+  - 'include/vltstd/**'

.gitattributes

@@ -0,0 +1,4 @@
+*.v linguist-language=SystemVerilog
+*.vh linguist-language=SystemVerilog
+*.sv linguist-language=SystemVerilog
+nodist linguist-detectable=false

.github/ISSUE_TEMPLATE/bug_report.md

@@ -0,0 +1,14 @@
+---
+name: Bug report
+about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
+title: ''
+labels: new
+assignees: ''
+
+---
+
+Thanks for taking the time to report this.
+
+Can you attach an example that shows the issue?  (Must be openly licensed, ideally in test_regress format.)
+
+May we assist you in trying to fix this yourself?

.github/ISSUE_TEMPLATE/feature.md

@@ -0,0 +1,16 @@
+---
+name: Feature Request
+about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
+title: ''
+labels: new
+assignees: ''
+
+---
+
+Thanks for taking the time to report this.
+
+What would you like added/supported?
+
+Can you attach an example that runs on other simulators?  (Must be openly licensed, ideally in test_regress format.)
+
+May we assist you in trying to fix this yourself?

.github/ISSUE_TEMPLATE/questions.md

@@ -0,0 +1,10 @@
+---
+name: Q and A, or Other
+about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc)
+title: ''
+labels: new
+assignees: ''
+
+---
+
+How may we help - what is your question?

.github/PULL_REQUEST_TEMPLATE.md

@@ -0,0 +1 @@
+We appreciate your contributing to Verilator.  If this is your first commit, please add your name to docs/CONTRIBUTORS, and read our contributing guidelines in docs/CONTRIBUTING.adoc.

.github/labels.toml

@@ -0,0 +1,199 @@
+["area: assertions"]
+color = "ffffe8"
+name = "area: assertions"
+description = "Issue involves assertions"
+
+["area: configure/compiling"]
+color = "ffffe8"
+name = "area: configure/compiling"
+description = "Issue involves configuring or compilating Verilator itself"
+
+["area: coverage"]
+color = "ffffe8"
+name = "area: coverage"
+description = "Issue involves coverage generation"
+
+["area: data-types"]
+color = "ffffe8"
+name = "area: data-types"
+description = "Issue involves data-types"
+
+["area: documentation"]
+color = "ffffe8"
+name = "area: documentation"
+description = "Issue involves documentation"
+
+["area: elaboration"]
+color = "ffffe8"
+name = "area: elaboration"
+description = "Issue involves elaboration phase"
+
+["area: invoking/options"]
+color = "ffffe8"
+name = "area: invoking/options"
+description = "Issue involves options passed to Verilator"
+
+["area: lint"]
+color = "ffffe8"
+name = "area: lint"
+description = "Issue involves SystemVerilog lint checking"
+
+["area: parser"]
+color = "ffffe8"
+name = "area: parser"
+description = "Issue involves SystemVerilog parsing"
+
+["area: performance"]
+color = "ffffe8"
+name = "area: performance"
+description = "Issue involves performance issues"
+
+["area: portability"]
+color = "ffffe8"
+name = "area: portability"
+description = "Issue involves operating system/compiler portability"
+
+["area: runtime result"]
+color = "ffffe8"
+name = "area: runtime result"
+description = "Issue involves an incorrect runtine result from Verilated model"
+
+["area: scheduling"]
+color = "ffffe8"
+name = "area: scheduling"
+description = "Issue involves scheduling/ordering of events"
+
+["area: tests"]
+color = "ffffe8"
+name = "area: tests"
+description = "Issue involves the testing system"
+
+["area: usability"]
+color = "ffffe8"
+name = "area: usability"
+description = "Issue involves general usability"
+
+["effort: days"]
+color = "d0c0b0"
+name = "effort: days"
+description = "Expect this issue to require roughly days of invested effort to resolve"
+
+["effort: hours"]
+color = "f5e6d6"
+name = "effort: hours"
+description = "Expect this issue to require roughly hours of invested effort to resolve"
+
+["effort: minutes"]
+color = "f5e6d6"
+name = "effort: minutes"
+description = "Expect this issue to require less than an hour of invested effort to resolve"
+
+["effort: weeks"]
+color = "d0c0b0"
+name = "effort: weeks"
+description = "Expect this issue to require weeks or more of invested effort to resolve"
+
+["good first issue"]
+color = "7057ff"
+name = "good first issue"
+description = "Good for newcomers"
+
+["help wanted"]
+color = "008672"
+name = "help wanted"
+description = "Extra attention is needed"
+
+["new"]
+color = "ff4400"
+name = "new"
+description = "New issue, not yet seen by maintainers"
+
+["resolution: abandoned"]
+color = "cfd3d7"
+name = "resolution: abandoned"
+description = "Closed; not enough information or otherwise never finished"
+
+["resolution: answered"]
+color = "cfd3d7"
+name = "resolution: answered"
+description = "Closed; only applies to questions which were answered"
+
+["resolution: duplicate"]
+color = "cfd3d7"
+name = "resolution: duplicate"
+description = "Closed; issue or pull request already exists"
+
+["resolution: external"]
+color = "cfd3d7"
+name = "resolution: external"
+description = "Closed; passed to another tool's bug tracker"
+
+["resolution: fixed"]
+color = "cfd3d7"
+name = "resolution: fixed"
+description = "Closed; fixed"
+
+["resolution: invalid"]
+color = "cfd3d7"
+name = "resolution: invalid"
+description = "Closed; issue or pull request is no longer relevant"
+
+["resolution: no fix needed"]
+color = "cfd3d7"
+name = "resolution: no fix needed"
+description = "Closed; no fix required (not a bug)"
+
+["resolution: wontfix"]
+color = "cfd3d7"
+name = "resolution: wontfix"
+description = "Closed; work won't continue on an issue or pull request"
+
+["status: asked reporter"]
+color = "ffffff"
+name = "status: asked reporter"
+description = "Bug is waiting for reporter to answer a question"
+
+["status: assigned"]
+color = "a0f0ff"
+name = "status: assigned"
+description = "Issue is assigned to someone to work on"
+
+["status: blocked"]
+color = "00007f"
+name = "status: blocked"
+description = "Issue is waiting for another bug, when other bug is fixed, then goes to 'status: assigned'"
+
+["status: discussion"]
+color = "d876e3"
+name = "status: discussion"
+description = "Issue is waiting for discussions to resolve"
+
+["status: ready"]
+color = "b6c92a"
+name = "status: ready"
+description = "Issue is ready for someone to fix; then goes to 'status: assigned'"
+
+["type: bug"]
+color = "d73a4a"
+name = "type: bug"
+description = "Defect"
+
+["type: feature-IEEE"]
+color = "cfccff"
+name = "type: feature-IEEE"
+description = "Request to add new feature, described in IEEE 1800"
+
+["type: feature-non-IEEE"]
+color = "cfccff"
+name = "type: feature-non-IEEE"
+description = "Request to add new feature, outside IEEE 1800"
+
+["type: maintenance"]
+color = "cfccff"
+name = "type: maintenance"
+description = "Internal maintenance task"
+
+["type: q and a"]
+color = "84ba34"
+name = "type: q and a"
+description = "Question and answer about some feature or user question"

.gitignore

@@ -1,4 +1,7 @@
+\#*
+.#*
 *~
+*.tidy
 *.old
 *.gz
 *.gz.uu
@@ -20,8 +23,13 @@ configure
 dddrun*
 doxygen-doc
 gdbrun*
+gmon.out
+ncverilog.history
 internals.txt
 verilator.txt
 verilator_bin*
 verilator_coverage_bin*
 verilator.pc
+verilator-config.cmake
+verilator-config-version.cmake
+**/obj_dir/*

.travis.yml

@@ -0,0 +1,177 @@
+# DESCRIPTION: Travis-CI config
+#
+# Copyright 2003-2019 by Todd Strader. Verilator is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU Lesser
+# General Public License Version 3 or the Perl Artistic License Version 2.0.
+
+version: ~> 1.0
+
+os: linux
+language: cpp
+cache: ccache
+
+env:
+  global:
+    - VERILATOR_CACHE=$HOME/verilator_cache
+    - VERILATOR_ROOT=$PWD
+    - VERILATOR_NUM_JOBS=$(echo `nproc` + 1 | bc)
+    - VERILATOR_CONFIG_FLAGS="--enable-maintainer-mode --enable-longtests"
+    - OBJCACHE=ccache
+
+cache:
+  directories:
+    - $VERILATOR_CACHE
+
+before_install:
+# Perl modules needed for testing
+  - yes yes | sudo cpan -fi Unix::Processors Parallel::Forker Bit::Vector
+  - sudo apt-get install gdb gtkwave
+before_script:
+  - bash -x ci/build_vcddiff.sh
+  - bash -x ci/build_verilator.sh
+after_script:
+  - ccache -s
+
+stages:
+  - "Build Verilator"
+  - test
+
+jobs:
+  include:
+    - if: type != cron
+      stage: "Build Verilator"
+      name: Build Verilator
+      compiler: gcc
+      script: echo "Done building Verilator"
+# Non-cron build will just run on whatever linux flavor we get
+    - if: type != cron
+      stage: test
+      name: Dist test
+      compiler: gcc
+      script: ci/test.sh dist
+    - if: type != cron
+      stage: test
+      name: Vlt test
+      compiler: gcc
+      script: ci/test.sh vlt
+    - if: type != cron
+      stage: test
+      name: Vltmt test
+      compiler: gcc
+      script: ci/test.sh vltmt
+# Cron builds try different OS/compiler combinations
+    - if: type = cron
+      stage: "Build Verilator"
+      name: Build xenial gcc Verilator
+      os: linux
+      dist: xenial
+      compiler: gcc
+      script: echo "Done building Verilator"
+    - if: type = cron
+      stage: test
+      name: Xenial gcc dist test
+      os: linux
+      dist: xenial
+      compiler: gcc
+      script: ci/test.sh dist
+    - if: type = cron
+      stage: test
+      name: Xenial gcc vlt test
+      os: linux
+      dist: xenial
+      compiler: gcc
+      script: ci/test.sh vlt
+    - if: type = cron
+      stage: test
+      name: Xenial gcc vltmt test
+      os: linux
+      dist: xenial
+      compiler: gcc
+      script: ci/test.sh vltmt
+    - if: type = cron
+      stage: "Build Verilator"
+      name: Build xenial clang Verilator
+      os: linux
+      dist: xenial
+      compiler: clang
+      script: echo "Done building Verilator"
+    - if: type = cron
+      stage: test
+      name: Xenial clang dist test
+      os: linux
+      dist: xenial
+      compiler: clang
+      script: ci/test.sh dist
+    - if: type = cron
+      stage: test
+      name: Xenial clang vlt test
+      os: linux
+      dist: xenial
+      compiler: clang
+      script: ci/test.sh vlt
+    - if: type = cron
+      stage: test
+      name: Xenial clang vltmt test
+      os: linux
+      dist: xenial
+      compiler: clang
+      script: ci/test.sh vltmt
+#    - if: type = cron
+#      stage: "Build Verilator"
+#      name: Build OSX gcc Verilator
+#      os: osx
+#      compiler: gcc
+#      script: echo "Done building Verilator"
+#    - if: type = cron
+#      stage: test
+#      name: OSX gcc dist test
+#      os: osx
+#      compiler: gcc
+#      script: ci/test.sh dist
+#    - if: type = cron
+#      stage: test
+#      name: OSX gcc vlt test
+#      os: osx
+#      compiler: gcc
+#      script: ci/test.sh vlt
+#    - if: type = cron
+#      stage: test
+#      name: OSX gcc vltmt test
+#      os: osx
+#      compiler: gcc
+#      script: ci/test.sh vltmt
+    - if: type = cron
+      stage: "Build Verilator"
+      name: Build trusty gcc Verilator
+      os: linux
+      dist: trusty
+      compiler: gcc
+      script: echo "Done building Verilator"
+    - if: type = cron
+      stage: test
+      name: Trusty gcc dist test
+      os: linux
+      dist: trusty
+      compiler: gcc
+      script: ci/test.sh dist
+    - if: type = cron
+      stage: test
+      name: Trusty gcc vlt test
+      os: linux
+      dist: trusty
+      compiler: gcc
+      script: ci/test.sh vlt
+    - if: type = cron
+      stage: test
+      os: linux
+      dist: trusty
+      name: Trusty gcc vltmt test
+      compiler: gcc
+      script: ci/test.sh vltmt
+
+notifications:
+  email:
+    if: repo = verilator/verilator
+    recipients:
+      - [email protected]
+      - [email protected]

COPYING

@@ -1,674 +0,0 @@
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 3, 29 June 2007
-
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-                            Preamble
-
-  The GNU General Public License is a free, copyleft license for
-software and other kinds of works.
-
-  The licenses for most software and other practical works are designed
-to take away your freedom to share and change the works.  By contrast,
-the GNU General Public License is intended to guarantee your freedom to
-share and change all versions of a program--to make sure it remains free
-software for all its users.  We, the Free Software Foundation, use the
-GNU General Public License for most of our software; it applies also to
-any other work released this way by its authors.  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-them if you wish), that you receive source code or can get it if you
-want it, that you can change the software or use pieces of it in new
-free programs, and that you know you can do these things.
-
-  To protect your rights, we need to prevent others from denying you
-these rights or asking you to surrender the rights.  Therefore, you have
-certain responsibilities if you distribute copies of the software, or if
-you modify it: responsibilities to respect the freedom of others.
-
-  For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must pass on to the recipients the same
-freedoms that you received.  You must make sure that they, too, receive
-or can get the source code.  And you must show them these terms so they
-know their rights.
-
-  Developers that use the GNU GPL protect your rights with two steps:
-(1) assert copyright on the software, and (2) offer you this License
-giving you legal permission to copy, distribute and/or modify it.
-
-  For the developers' and authors' protection, the GPL clearly explains
-that there is no warranty for this free software.  For both users' and
-authors' sake, the GPL requires that modified versions be marked as
-changed, so that their problems will not be attributed erroneously to
-authors of previous versions.
-
-  Some devices are designed to deny users access to install or run
-modified versions of the software inside them, although the manufacturer
-can do so.  This is fundamentally incompatible with the aim of
-protecting users' freedom to change the software.  The systematic
-pattern of such abuse occurs in the area of products for individuals to
-use, which is precisely where it is most unacceptable.  Therefore, we
-have designed this version of the GPL to prohibit the practice for those
-products.  If such problems arise substantially in other domains, we
-stand ready to extend this provision to those domains in future versions
-of the GPL, as needed to protect the freedom of users.
-
-  Finally, every program is threatened constantly by software patents.
-States should not allow patents to restrict development and use of
-software on general-purpose computers, but in those that do, we wish to
-avoid the special danger that patents applied to a free program could
-make it effectively proprietary.  To prevent this, the GPL assures that
-patents cannot be used to render the program non-free.
-
-  The precise terms and conditions for copying, distribution and
-modification follow.
-
-                       TERMS AND CONDITIONS
-
-  0. Definitions.
-
-  "This License" refers to version 3 of the GNU General Public License.
-
-  "Copyright" also means copyright-like laws that apply to other kinds of
-works, such as semiconductor masks.
-
-  "The Program" refers to any copyrightable work licensed under this
-License.  Each licensee is addressed as "you".  "Licensees" and
-"recipients" may be individuals or organizations.
-
-  To "modify" a work means to copy from or adapt all or part of the work
-in a fashion requiring copyright permission, other than the making of an
-exact copy.  The resulting work is called a "modified version" of the
-earlier work or a work "based on" the earlier work.
-
-  A "covered work" means either the unmodified Program or a work based
-on the Program.
-
-  To "propagate" a work means to do anything with it that, without
-permission, would make you directly or secondarily liable for
-infringement under applicable copyright law, except executing it on a
-computer or modifying a private copy.  Propagation includes copying,
-distribution (with or without modification), making available to the
-public, and in some countries other activities as well.
-
-  To "convey" a work means any kind of propagation that enables other
-parties to make or receive copies.  Mere interaction with a user through
-a computer network, with no transfer of a copy, is not conveying.
-
-  An interactive user interface displays "Appropriate Legal Notices"
-to the extent that it includes a convenient and prominently visible
-feature that (1) displays an appropriate copyright notice, and (2)
-tells the user that there is no warranty for the work (except to the
-extent that warranties are provided), that licensees may convey the
-work under this License, and how to view a copy of this License.  If
-the interface presents a list of user commands or options, such as a
-menu, a prominent item in the list meets this criterion.
-
-  1. Source Code.
-
-  The "source code" for a work means the preferred form of the work
-for making modifications to it.  "Object code" means any non-source
-form of a work.
-
-  A "Standard Interface" means an interface that either is an official
-standard defined by a recognized standards body, or, in the case of
-interfaces specified for a particular programming language, one that
-is widely used among developers working in that language.
-
-  The "System Libraries" of an executable work include anything, other
-than the work as a whole, that (a) is included in the normal form of
-packaging a Major Component, but which is not part of that Major
-Component, and (b) serves only to enable use of the work with that
-Major Component, or to implement a Standard Interface for which an
-implementation is available to the public in source code form.  A
-"Major Component", in this context, means a major essential component
-(kernel, window system, and so on) of the specific operating system
-(if any) on which the executable work runs, or a compiler used to
-produce the work, or an object code interpreter used to run it.
-
-  The "Corresponding Source" for a work in object code form means all
-the source code needed to generate, install, and (for an executable
-work) run the object code and to modify the work, including scripts to
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-                     END OF TERMS AND CONDITIONS
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-    along with this program.  If not, see <http://www.gnu.org/licenses/>.
-
-Also add information on how to contact you by electronic and paper mail.
-
-  If the program does terminal interaction, make it output a short
-notice like this when it starts in an interactive mode:
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-    <program>  Copyright (C) <year>  <name of author>
-    This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
-    This is free software, and you are welcome to redistribute it
-    under certain conditions; type `show c' for details.
-
-The hypothetical commands `show w' and `show c' should show the appropriate
-parts of the General Public License.  Of course, your program's commands
-might be different; for a GUI interface, you would use an "about box".
-
-  You should also get your employer (if you work as a programmer) or school,
-if any, to sign a "copyright disclaimer" for the program, if necessary.
-For more information on this, and how to apply and follow the GNU GPL, see
-<http://www.gnu.org/licenses/>.
-
-  The GNU General Public License does not permit incorporating your program
-into proprietary programs.  If your program is a subroutine library, you
-may consider it more useful to permit linking proprietary applications with
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-Public License instead of this License.  But first, please read
-<http://www.gnu.org/philosophy/why-not-lgpl.html>.

LICENSE

@@ -1,7 +1,7 @@
-		   GNU LESSER GENERAL PUBLIC LICENSE
+                   GNU LESSER GENERAL PUBLIC LICENSE
                        Version 3, 29 June 2007
 
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
  Everyone is permitted to copy and distribute verbatim copies
  of this license document, but changing it is not allowed.
 

MANIFEST.SKIP

@@ -1,6 +1,8 @@
-^CVS/
-/CVS/
+\.clang-format
+\.clang-tidy
 \.git/
+\.git$
+\.github/
 \.svn/
 \.(bak|old)/
 \.(bak|old)$
@@ -9,35 +11,56 @@
 .*\.log
 \..*\.swp
 .*\.tmp
+.*\.tidy
 .*\.tex
 .*\.key
 .*\.vcd
 .*\.1
+\.codacy\.yml
+\.travis\.yml
+/build/
 /obj_dir/
 /obj_dbg/
+/obj_nc/
 /obj_opt/
+/obj_vcs/
+/obj_vlt/
+/obj_vltmt/
+/obj_dist/
 /INCA_libs/
 /cov_work/
 /logs/
 ^Makefile$
+README.html
+bin/verilator_bin.*
+bin/verilator_coverage_bin.*
+docs/.*\.html$
+docs/Makefile$
+docs/doxygen-doc/.*
+examples/xml_py/copied/
+examples/xml_py/graph.*
 src/Makefile$
 src/Makefile_obj$
 include/verilated.mk$
 test_regress/.gdbinit$
 config.cache$
 config.status$
-verilator.log
-verilator.tex
+verilator\.log
+verilator\.tex
+verilator-config.cmake$
+verilator-config-version.cmake$
 verilator.pc$
 verilator_bin.*
 verilator_coverage_bin.*
 .vcsmx_rebuild$
+ncverilog.history
 autom4te\.cache/
 nodist/
+ci/
 /simv$
 /simv.daidir/
 /vc_hdrs.h$
 /csrc/
-doxygen-doc/.*
+obj_dir.*
 TAGS
 .*~

Makefile.in

@@ -3,11 +3,11 @@
 #
 # This file is part of Verilator.
 #
-# Code available from: http://www.veripool.org/verilator
+# Code available from: https://verilator.org
 #
 #*****************************************************************************
 #
-# Copyright 2003-2017 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -56,6 +56,7 @@ INSTALL_DATA = @INSTALL_DATA@
 MAKEINFO = makeinfo
 POD2TEXT = pod2text
 POD2LATEXFIX = $(srcdir)/src/pod2latexfix
+MKINSTALLDIRS = $(SHELL) $(srcdir)/src/mkinstalldirs
 PERL = @PERL@
 
 # Destination prefix for RPMs
@@ -82,7 +83,7 @@ infodir = @infodir@
 pkgdatadir = @pkgdatadir@
 
 # Directory in which to install pkgconfig file
-# Generall ${prefix}/share/pkgconfig
+# Generally ${prefix}/share/pkgconfig
 pkgconfigdir = @pkgconfigdir@
 
 # Directory in which to install data across multiple architectures
@@ -92,6 +93,7 @@ datarootdir = @datarootdir@
 CFG_WITH_CCWARN = @CFG_WITH_CCWARN@
 CFG_WITH_DEFENV = @CFG_WITH_DEFENV@
 CFG_WITH_LONGTESTS = @CFG_WITH_LONGTESTS@
+CFG_WITH_THREADED = @CFG_WITH_THREADED@
 PACKAGE_VERSION = @PACKAGE_VERSION@
 
 #### End of system configuration section. ####
@@ -101,35 +103,73 @@ PACKAGE_VERSION = @PACKAGE_VERSION@
 
 SHELL = /bin/sh
 
-SUBDIRS = src test_verilated test_c test_sc test_regress
+SUBDIRS = docs src test_regress \
+	examples/cmake_hello_c \
+	examples/cmake_hello_sc \
+	examples/cmake_tracing_c \
+	examples/cmake_tracing_sc \
+	examples/cmake_protect_lib \
+	examples/make_hello_c \
+	examples/make_hello_sc \
+	examples/make_tracing_c \
+	examples/make_tracing_sc \
+	examples/make_protect_lib \
+	examples/xml_py \
 
-INFOS = README README.html README.pdf internals.txt internals.html \
-        internals.pdf verilator.txt verilator.html verilator.pdf \
-	$(VL_INST_MAN_FILES)
+INFOS = verilator.txt verilator.html verilator.pdf
+
+INFOS_OLD = README README.html README.pdf
 
 # Files that can be generated, but should be up to date for a distribution.
 DISTDEP = info Makefile
 
-DISTFILES_INC = $(INFOS) .gitignore Artistic COPYING COPYING.LESSER \
+DISTFILES_INC = $(INFOS) .gitignore \
 	*.in *.ac \
-	Changes TODO \
+	Artistic \
+	Changes \
+	LICENSE \
 	MANIFEST.SKIP \
-	bin/* \
-	doxygen-mainpage doxygen.config veripool-logo.png \
-	install-sh configure mkinstalldirs *.pod \
+	README.adoc \
+	verilator-config.cmake.in \
+	verilator-config-version.cmake.in \
+	bin/verilator \
+	bin/verilator_coverage \
+	bin/verilator_difftree \
+	bin/verilator_gantt \
+	bin/verilator_includer \
+	bin/verilator_profcfunc \
+	docs/.gitignore \
+	docs/CONTRIBUTING.adoc \
+	docs/CONTRIBUTORS \
+	docs/Makefile.in \
+	docs/TODO \
+	docs/doxygen-mainpage \
+	docs/doxygen.config \
+	docs/install.adoc \
+	docs/internals.adoc \
+	docs/verilator_logo.png \
+	install-sh configure *.pod \
 	include/*.[chv]* \
 	include/*.in \
 	include/.*ignore \
+	include/gtkwave/*.[chv]* \
 	include/vltstd/*.[chv]* \
 	.*attributes */.*attributes  */*/.*attributes \
 	src/.*ignore src/*.in src/*.cpp src/*.[chly] \
 	src/astgen src/bisonpre src/*fix src/cppcheck_filtered \
-	src/vlcovgen \
+	src/vlcovgen src/mkinstalldirs \
 	src/.gdbinit \
 	src/*.pl src/*.pod \
+	examples/*/.*ignore examples/*/Makefile* \
+	examples/*/*.[chv]* examples/*/vl_* \
+	examples/*/CMakeLists.txt \
 	test_*/.*ignore test_*/Makefile* test_*/*.cpp \
 	test_*/*.pl test_*/*.v test_*/*.vc test_*/*.vh \
-	test_verilated/vgen*.pl \
+	test_regress/*.pl \
+	test_regress/Makefile \
+	test_regress/Makefile_obj \
+	test_regress/input.vc \
+	test_regress/CMakeLists.txt \
 	test_regress/t/t*/*.sv* \
 	test_regress/t/t*/*.v* \
 	test_regress/t/t*/*/*.sv* \
@@ -146,25 +186,36 @@ DISTFILES_INC = $(INFOS) .gitignore Artistic COPYING COPYING.LESSER \
 INST_PROJ_FILES = \
 	bin/verilator \
 	bin/verilator_coverage \
+	bin/verilator_gantt \
 	bin/verilator_includer \
 	bin/verilator_profcfunc \
 	include/verilated.mk \
 	include/*.[chv]* \
+	include/gtkwave/*.[chv]* \
 	include/vltstd/*.[chv]* \
 
 INST_PROJ_BIN_FILES = \
-	verilator_bin \
-	verilator_bin_dbg \
-	verilator_coverage_bin_dbg \
+	bin/verilator_bin \
+	bin/verilator_bin_dbg \
+	bin/verilator_coverage_bin_dbg \
 
 DISTFILES := $(DISTFILES_INC)
 
+EXAMPLES_FIRST = \
+	examples/make_hello_c \
+	examples/make_hello_sc \
+
+EXAMPLES = $(EXAMPLES_FIRST) $(filter-out $(EXAMPLES_FIRST), $(sort $(wildcard examples/*)))
+
 ifeq ($(OBJCACHE_JOBS),)
 ifneq ($(OBJCACHE_HOSTS),)
 export OBJCACHE_JOBS := -j $(shell objcache --jobs "$(OBJCACHE_HOSTS)")
 endif
 endif
 
+# See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
+VL_INST_MAN_FILES = verilator.1 verilator_coverage.1 verilator_gantt.1 verilator_profcfunc.1
+
 default: all
 all: all_nomsg msg_test
 all_nomsg: verilator_exe $(VL_INST_MAN_FILES)
@@ -175,43 +226,47 @@ all_nomsg: verilator_exe $(VL_INST_MAN_FILES)
 .PHONY:verilator_coverage_bin_dbg
 verilator_exe verilator_bin verilator_bin_dbg verilator_coverage_bin_dbg:
 	@echo ------------------------------------------------------------
-	@echo "making verilator in src" ; \
-	  (cd src && $(MAKE) $(OBJCACHE_JOBS) )
+	@echo "making verilator in src"
+	$(MAKE) -C src $(OBJCACHE_JOBS)
 
 .PHONY:msg_test
 msg_test: all_nomsg
 	@echo "Build complete!"
 	@echo
-	@echo "Type 'make test' to test."
+	@echo "Now type 'make test' to test."
 	@echo
 
-.PHONY:test
+.PHONY: test
 ifeq ($(CFG_WITH_LONGTESTS),yes)	# Local... Else don't burden users
-test: test_c test_sc test_verilated test_regress
+test: smoke-test test_regress
+# examples is part of test_regress's test_regress/t/t_a2_examples.pl
+# (because that allows it to run in parallel with other test_regress's)
 else
-test: test_c test_sc
+test: smoke-test examples
 endif
 	@echo "Tests passed!"
 	@echo
-	@echo "Type 'make install' to install documentation."
+	@echo "Now type 'make install' to install."
+	@echo "Or type 'make' inside an examples subdirectory."
 	@echo
 
-test_c: all_nomsg
-	@(cd test_c && $(MAKE))
-test_c_debug: all_nomsg
-	@(cd test_c && $(MAKE) test_debug)
-test_sc: all_nomsg
-	@(cd test_sc && $(MAKE))
-test_sc_debug: all_nomsg
-	@(cd test_sc && $(MAKE) test_debug)
-test_verilated: all_nomsg
-	@(cd test_verilated && $(MAKE))
+smoke-test: all_nomsg
+	test_regress/t/t_a1_first_cc.pl
+	test_regress/t/t_a2_first_sc.pl
+
 test_regress: all_nomsg
-	@(cd test_regress && $(MAKE))
+	$(MAKE) -C test_regress
+
+examples: all_nomsg
+	for p in $(EXAMPLES) ; do \
+	  $(MAKE) -C $$p VERILATOR_ROOT=`pwd` || exit 10; \
+	done
+
+.PHONY: docs
+docs: info
 
 info: $(INFOS)
 
-# Use --no-split to avoid creating filenames > 14 chars.
 %.1: ${srcdir}/bin/%
 	pod2man $< $@
 
@@ -222,55 +277,20 @@ verilator.html: ${srcdir}/bin/verilator
 	pod2html $< >$@
 
 # PDF needs DIST variables; but having configure.ac as dependency isn't detected
-verilator.pdf: ${srcdir}/bin/verilator Makefile
-	pod2latex --full --out verilator.tex ${srcdir}/bin/verilator
+verilator.pdf: ${srcdir}/bin/verilator Makefile $(POD2LATEXFIX)
+	pod2latex --full --out verilator.tex $<
 	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE)" "${DISTDATE}" < verilator.tex > verilator2.tex
 	mv verilator2.tex verilator.tex
 	pdflatex verilator.tex
 	pdflatex verilator.tex
 	-rm -f verilator.toc verilator.aux verilator.idx verilator.out
 
-README: README.pod
-	-rm -f $@
-	$(POD2TEXT) --loose $< > $@
-
-README.html: README.pod
-	pod2html $< >$@
-
-# PDF needs DIST variables; but having configure.ac as dependency isn't detected
-README.pdf: README.pod Makefile
-	pod2latex --full --out README.tex README.pod
-	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE) README File" "${DISTDATE}" < README.tex > README2.tex
-	mv README2.tex README.tex
-	pdflatex README.tex
-	pdflatex README.tex
-	-rm -f README.toc README.aux README.idx README.out
-
-internals.txt: internals.pod
-	-rm -f $@
-	$(POD2TEXT) --loose $< > $@
-
-internals.html: internals.pod
-	pod2html $< >$@
-
-# PDF needs DIST variables; but having configure.ac as dependency isn't detected
-internals.pdf: internals.pod Makefile
-	pod2latex --full --out internals.tex internals.pod
-	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE) Internals Manual" "${DISTDATE}" < internals.tex > internals2.tex
-	mv internals2.tex internals.tex
-	pdflatex internals.tex
-	pdflatex internals.tex
-	-rm -f internals.toc internals.aux internals.idx internals.out
-
 # See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 VL_INST_BIN_FILES = verilator verilator_bin verilator_bin_dbg verilator_coverage_bin_dbg \
-	verilator_coverage verilator_includer verilator_profcfunc
+	verilator_coverage verilator_gantt verilator_includer verilator_profcfunc
 # Some scripts go into both the search path and pkgdatadir,
 # so they can be found by the user, and under $VERILATOR_ROOT.
 
-# See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
-VL_INST_MAN_FILES = verilator.1 verilator_coverage.1 verilator_profcfunc.1
-
 VL_INST_INC_BLDDIR_FILES = \
 	include/verilated_config.h \
 	include/verilated.mk \
@@ -278,35 +298,36 @@ VL_INST_INC_BLDDIR_FILES = \
 # Files under srcdir, instead of build time
 VL_INST_INC_SRCDIR_FILES = \
 	include/*.[chv]* \
+	include/gtkwave/*.[chv]* \
 	include/vltstd/*.[chv]* \
 
 VL_INST_DATA_SRCDIR_FILES = \
-	test_v/*.[chv]* \
-	test_c/*.[chv]*   test_c/Makefile  test_c/Makefile_obj  \
-	test_sc/*.[chv]*  test_sc/Makefile test_sc/Makefile_obj \
+	examples/*/*.[chv]*  examples/*/Makefile* \
+	examples/*/CMakeLists.txt
 
 installbin:
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(bindir)
+	$(MKINSTALLDIRS) $(DESTDIR)$(bindir)
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator $(DESTDIR)$(bindir)/verilator )
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_coverage $(DESTDIR)$(bindir)/verilator_coverage )
+	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_gantt $(DESTDIR)$(bindir)/verilator_gantt )
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_profcfunc $(DESTDIR)$(bindir)/verilator_profcfunc )
-	( $(INSTALL_PROGRAM) verilator_bin $(DESTDIR)$(bindir)/verilator_bin )
-	( $(INSTALL_PROGRAM) verilator_bin_dbg $(DESTDIR)$(bindir)/verilator_bin_dbg )
-	( $(INSTALL_PROGRAM) verilator_coverage_bin_dbg $(DESTDIR)$(bindir)/verilator_coverage_bin_dbg )
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/bin
+	( cd bin ; $(INSTALL_PROGRAM) verilator_bin $(DESTDIR)$(bindir)/verilator_bin )
+	( cd bin ; $(INSTALL_PROGRAM) verilator_bin_dbg $(DESTDIR)$(bindir)/verilator_bin_dbg )
+	( cd bin ; $(INSTALL_PROGRAM) verilator_coverage_bin_dbg $(DESTDIR)$(bindir)/verilator_coverage_bin_dbg )
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/bin
 	( cd ${srcdir}/bin ; $(INSTALL_PROGRAM) verilator_includer $(DESTDIR)$(pkgdatadir)/bin/verilator_includer )
 
 # Man files can either be part of the original kit, or built in current directory
-# So important we use $< so VPATH is searched
+# So important we use $^ so VPATH is searched
 installman: $(VL_INST_MAN_FILES)
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(mandir)/man1
-	cd $(srcdir) \
-	; for p in $(VL_INST_MAN_FILES) ; do \
+	$(MKINSTALLDIRS) $(DESTDIR)$(mandir)/man1
+	for p in $^ ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(mandir)/man1/$$p; \
 	done
 
 installdata:
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/include/vltstd
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/include/gtkwave
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/include/vltstd
 	for p in $(VL_INST_INC_BLDDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
 	done
@@ -314,15 +335,24 @@ installdata:
 	; for p in $(VL_INST_INC_SRCDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
 	done
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_c
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_sc
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_v
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_hello_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_hello_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_tracing_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_tracing_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_protect_lib
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
 	cd $(srcdir) \
 	; for p in $(VL_INST_DATA_SRCDIR_FILES) ; do \
-	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/examples/$$p; \
+	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
 	done
-	$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgconfigdir)
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgconfigdir)
 	$(INSTALL_DATA) verilator.pc $(DESTDIR)$(pkgconfigdir)
+	$(INSTALL_DATA) verilator-config.cmake $(DESTDIR)$(pkgdatadir)
+	$(INSTALL_DATA) verilator-config-version.cmake $(DESTDIR)$(pkgdatadir)
 
 # We don't trust rm -rf, so rmdir instead as it will fail if user put in other files
 uninstall:
@@ -331,16 +361,26 @@ uninstall:
 	-cd $(DESTDIR)$(mandir)/man1 && rm -f $(VL_INST_MAN_FILES)
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_BLDDIR_FILES)
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_SRCDIR_FILES)
-	-cd $(DESTDIR)$(pkgdatadir)/examples && rm -f $(VL_INST_DATA_SRCDIR_FILES)
+	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_DATA_SRCDIR_FILES)
 	-rm $(DESTDIR)$(pkgconfigdir)/verilator.pc
+	-rm $(DESTDIR)$(pkgdatadir)/verilator-config.cmake
+	-rm $(DESTDIR)$(pkgdatadir)/verilator-config-version.cmake
 	-rmdir $(DESTDIR)$(pkgdatadir)/bin
+	-rmdir $(DESTDIR)$(pkgdatadir)/include/gtkwave
 	-rmdir $(DESTDIR)$(pkgdatadir)/include/vltstd
 	-rmdir $(DESTDIR)$(pkgdatadir)/include
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/test_c
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/test_sc
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/test_sp
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/test_v
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_hello_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_hello_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_tracing_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_tracing_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_protect_lib
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples
+	-rmdir $(DESTDIR)$(pkgdatadir)/cmake
 	-rmdir $(DESTDIR)$(pkgdatadir)
 	-rmdir $(DESTDIR)$(pkgconfigdir)
 
@@ -352,40 +392,15 @@ install-here: installman ftp
 ifeq ($(VERILATOR_AUTHOR_SITE),1)	# Local... Else don't burden users
 DISTNAMEREV = $(shell sed -e '/DTVERSION/!d' -e 's/.*verilator_\([^"]*\).*/\1/' -e q ${srcdir}/src/config_rev.h)
 
-DIRPROJECT := $(shell project_dir --project)
 VERILATOR_CAD_DIR = $(CAD_DIR)/verilator/$(DISTNAMEREV)/$(DIRPROJECT_ARCH)
 INST_PROJ_CVS = cp_if_cvs_diff
 
-install-project: dist
-	@echo "Install-project to $(DIRPROJECT)"
-	strip verilator_bin*
-	strip verilator_coverage_bin*
-	$(MAKE) install-project-quick
-	for p in $(VL_INST_MAN_FILES) ; do \
-	  $(INSTALL_DATA) $$p $(DIRPROJECT_PREFIX)/man/man1/$$p; \
-	done
-	$(INST_PROJ_CVS) $(DISTNAME).tgz $(DIRPROJECT)/hw/utils/verilator/verilator.tgz
-	rm $(DISTNAME).tgz
-
-install-project-quick:
-ifeq ($(CFG_WITH_DEFENV),yes)
-	@echo "%Error: Reconfigure with './configure --disable-defenv' to avoid hardcoded paths."
-	false
-endif
-	@echo "Install-project-quick (no strip) to $(DIRPROJECT)"
-	for p in $(INST_PROJ_FILES) ; do \
-	  $(INST_PROJ_CVS) $$p $(DIRPROJECT)/hw/utils/verilator/$$p; \
-	done
-	for p in $(INST_PROJ_BIN_FILES) ; do \
-	  $(INST_PROJ_CVS) $$p $(DIRPROJECT)/hw/utils/verilator/$$p-$(DIRPROJECT_ARCH); \
-	done
-
 install-cadtools: dist
 	@echo "Install-project to $(CAD_DIR)"
-	strip verilator_bin*
-	strip verilator_coverage_bin*
+	strip bin/verilator_bin*
+	strip bin/verilator_coverage_bin*
 	$(MAKE) install-cadtools-quick
-	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/man/man1
+	$(MKINSTALLDIRS) $(VERILATOR_CAD_DIR)/man/man1
 	for p in $(VL_INST_MAN_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(VERILATOR_CAD_DIR)/man/man1/$$p; \
 	done
@@ -398,8 +413,9 @@ ifeq ($(CFG_WITH_DEFENV),yes)
 	false
 endif
 	@echo "Install-cadtools-quick (no strip) to $(VERILATOR_CAD_DIR)"
-	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/include/vltstd
-	$(SHELL) ${srcdir}/mkinstalldirs $(VERILATOR_CAD_DIR)/bin
+	$(MKINSTALLDIRS) $(VERILATOR_CAD_DIR)/include/gtkwave
+	$(MKINSTALLDIRS) $(VERILATOR_CAD_DIR)/include/vltstd
+	$(MKINSTALLDIRS) $(VERILATOR_CAD_DIR)/bin
 	for p in $(INST_PROJ_FILES) ; do \
 	  $(INST_PROJ_CVS) $$p $(VERILATOR_CAD_DIR)/$$p; \
 	done
@@ -411,25 +427,53 @@ endif
 endif
 
 # Use --xml flag to see the cppcheck code to use for suppression
+CPPCHECK_CPP = $(wildcard \
+	$(srcdir)/include/*.cpp \
+	$(srcdir)/src/*.cpp )
+CPPCHECK_H = $(wildcard \
+	$(srcdir)/include/*.h \
+	$(srcdir)/src/*.h )
 CPPCHECK = src/cppcheck_filtered
 CPPCHECK_FLAGS = --enable=all --inline-suppr \
-	--suppress=unusedScopedObject --suppress=cstyleCast --suppress=useInitializationList
+	--suppress=unusedScopedObject --suppress=cstyleCast --suppress=useInitializationList \
+	--suppress=nullPointerRedundantCheck
 CPPCHECK_FLAGS += --xml
-CPPCHECK_CPP = $(wildcard $(srcdir)/include/*.cpp $(srcdir)/src/*.cpp)
 CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CPPCHECK_CPP))
 CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/src/obj_dbg -I$(srcdir)/src
 
 cppcheck: $(CPPCHECK_DEP)
 %.cppcheck: %.cpp
-	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 $(CPPCHECK_INC) $<
+	$(CPPCHECK) $(CPPCHECK_FLAGS) -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) $<
+
+CLANGTIDY = clang-tidy
+CLANGTIDY_FLAGS = -config=''
+CLANGTIDY_DEP = $(subst .h,.h.tidy,$(CPPCHECK_H)) \
+	$(subst .cpp,.cpp.tidy,$(CPPCHECK_CPP))
+
+clangtidy: $(CLANGTIDY_DEP)
+%.cpp.tidy: %.cpp
+	$(CLANGTIDY) $(CLANGTIDY_FLAGS) $< -- -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) | 2>&1 tee $@
+%.h.tidy: %.h
+	$(CLANGTIDY) $(CLANGTIDY_FLAGS) $< -- -DVL_DEBUG=1 -DVL_CPPCHECK=1 $(CPPCHECK_INC) | 2>&1 tee $@
+
+analyzer-src:
+	-rm -rf src/obj_dbg
+	scan-build $(MAKE) -k verilator_coverage_bin_dbg verilator_bin_dbg
+
+analyzer-include:
+	-rm -rf examples/*/obj*
+	scan-build $(MAKE) -k examples
 
 ftp: info
 
 install-msg:
-	@echo "Installed!"
+	@echo
+	@echo "Installed binaries to $(DESTDIR)$(bindir)/verilator"
+	@echo "Installed man to $(DESTDIR)$(mandir)/man1"
+	@echo "Installed examples to $(DESTDIR)$(pkgdatadir)/examples"
 	@echo
 	@echo "For documentation see 'man verilator' or 'verilator --help'"
-	@echo "For forums and to report bugs see http://www.veripool.org/verilator"
+	@echo "For forums and to report bugs see https://verilator.org"
 	@echo
 
 IN_WILD := ${srcdir}/*.in ${srcdir}/*/*.in
@@ -453,13 +497,13 @@ endif
 
 maintainer-clean::
 	@echo "This command is intended for maintainers to use;"
-	@echo "rebuilding the deleted files requires makeinfo."
-	rm -f *.info* $(INFOS) configure
+	@echo "rebuilding the deleted files requires autoconf."
+	rm -f configure
 
 clean mostlyclean distclean maintainer-clean maintainer-copy::
 	for dir in $(SUBDIRS); do \
 	  echo making $@ in $$dir ; \
-	  (cd $$dir && $(MAKE) $@) ; \
+	  $(MAKE) -C $$dir $@ ; \
 	done
 
 clean mostlyclean distclean maintainer-clean::
@@ -468,10 +512,16 @@ clean mostlyclean distclean maintainer-clean::
 	rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs *.idx
 	rm -f *.ev *.evs *.ov *.ovs *.cv *.cvs *.ma *.mas
 	rm -f *.tex
+	rm -rf examples/*/obj_dir* examples/*/logs
+	rm -rf test_*/obj_dir
+	rm -rf nodist/fuzzer/dictionary
+	rm -rf nodist/obj_dir
 
 distclean maintainer-clean::
+	rm -f *.info* *.1 $(INFOS) $(INFOS_OLD) $(VL_INST_MAN_FILES)
 	rm -f Makefile config.status config.cache config.log TAGS
 	rm -f verilator_bin* verilator_coverage_bin*
+	rm -f bin/verilator_bin* bin/verilator_coverage_bin*
 	rm -f include/verilated.mk include/verilated_config.h
 
 TAGFILES=${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/*.in \
@@ -483,7 +533,7 @@ TAGS:	$(TAGFILES)
 .PHONY: doxygen
 
 doxygen:
-	$(DOXYGEN) doxygen.config
+	$(MAKE) -C docs doxygen
 
 ######################################################################
 # Test targets
@@ -493,6 +543,9 @@ dist-file-list:
 	@echo $(wildcard $(DISTFILES))
 	@echo "end-dist-file-list:";  # Scripts look for this
 
+print-cfg-with-threaded:
+	@echo $(CFG_WITH_THREADED)
+
 ######################################################################
 # Distributions
 

README.adoc

@@ -0,0 +1,140 @@
+// Github doesn't render images unless absolute URL
+:!toc:
+
+ifdef::env-github[]
+image:https://img.shields.io/badge/License-LGPL%20v3-blue.svg[license LGPLv3,link=https://www.gnu.org/licenses/lgpl-3.0]
+image:https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg[license Artistic-2.0,link=https://opensource.org/licenses/Artistic-2.0]
+image:https://api.codacy.com/project/badge/Grade/48478c986f13400682ffe4a5e0939b3a[Code Quality,link=https://www.codacy.com/gh/verilator/verilator]
+image:https://travis-ci.com/verilator/verilator.svg?branch=master[Build Status (Travis CI),link=https://travis-ci.com/verilator/verilator]
+endif::[]
+
+ifdef::env-github[]
+:link_verilator_contributing: link:docs/CONTRIBUTING.adoc
+:link_verilator_install: link:docs/install.adoc
+endif::[]
+ifndef::env-github[]
+:link_verilator_contributing: https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.adoc
+:link_verilator_install: https://verilator.org/install
+endif::[]
+
+== Welcome to Verilator
+
+[cols="a,a",indent=0,frame="none"]
+|===
+^.^| *Welcome to Verilator, the fastest free Verilog HDL simulator.*
++++ <br/> +++ &bullet; Accepts synthesizable Verilog or SystemVerilog
++++ <br/> +++ &bullet; Performs lint code-quality checks
++++ <br/> +++ &bullet; Compiles into multithreaded {cpp}, SystemC, or (soon) {cpp}-under-Python
++++ <br/> +++ &bullet; Creates XML to front-end your own tools
+<.^|image:https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200]
+
+>.^|image:https://www.veripool.org/img/verilator_multithreaded_performance_bg-min.png[,388,178]
+^.^| *Fast*
++++ <br/> +++ &bullet; Outperforms many commercial simulators
++++ <br/> +++ &bullet; Single- and multi-threaded output models
+
+^.^| *Widely Used*
++++ <br/> +++ &bullet; Wide industry and academic deployment
++++ <br/> +++ &bullet; Out-of-the-box support from Arm, and RISC-V vendor IP
+<.^|image:https://www.veripool.org/img/verilator_usage_400x200-min.png[,400,200]
+
+>.^|image:https://www.veripool.org/img/chips_alliance_logo_225x75-min.png[CHIPS Alliance,link=https://chipsalliance.org]
+image:https://www.veripool.org/img/osi_logo_125x125-min.png[,125,125]
+^.^| *Community Driven & Openly Licensed*
++++ <br/> +++ &bullet; Guided by the https://chipsalliance.org/[CHIPS Alliance] and https://www.linuxfoundation.org/[Linux Foundation]
++++ <br/> +++ &bullet; Open, and free as in both speech and beer
++++ <br/> +++ &bullet; More simulation for your verification budget
+|===
+
+== What Verilator Does
+
+Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
+"Verilates" the specified synthesizable Verilog or SystemVerilog code by
+reading it, performing lint checks, and optionally inserting assertion
+checks and coverage-analysis points.  It outputs single- or multi-threaded
+.cpp and .h files, the "Verilated" code.
+
+The user writes a little {cpp}/SystemC wrapper file, which instantiates the
+"Verilated" model of the user's top level module.  These {cpp}/SystemC
+files are then compiled by a {cpp} compiler (gcc/clang/MSVC++).  The
+resulting executable performs the design simulation.  Verilator also
+supports linking its generated libraries, optionally encrypted, into other
+simulators.
+
+Verilator may not be the best choice if you are expecting a full featured
+replacement for NC-Verilog, VCS or another commercial Verilog simulator, or
+if you are looking for a behavioral Verilog simulator e.g. for a quick
+class project (we recommend http://iverilog.icarus.com[Icarus Verilog] for
+this.)  However, if you are looking for a path to migrate synthesizable
+Verilog to {cpp} or SystemC, and your team is comfortable writing just a
+touch of {cpp} code, Verilator is the tool for you.
+
+== Performance
+
+Verilator does not simply convert Verilog HDL to {cpp} or SystemC.  Rather
+than only translate, Verilator compiles your code into a much faster
+optimized and optionally thread-partitioned model, which is in turn wrapped
+inside a {cpp}/SystemC/Python module.  The results are a compiled Verilog
+model that executes even on a single-thread over 10x faster than standalone
+SystemC, and on a single thread is about 100 times faster than interpreted
+Verilog simulators such as http://iverilog.icarus.com[Icarus
+Verilog]. Another 2-10x speedup might be gained from multithreading
+(yielding 200-1000x total over interpreted simulators).
+
+Verilator has typically similar or better performance versus the commercial
+Verilog simulators (Carbon Design Systems Carbonator, Modelsim, Cadence
+Incisive/NC-Verilog, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But,
+Verilator is free, so you can spend on computes rather than licenses. Thus
+Verilator gives you more cycles/dollar than anything else available.
+
+For more information on how Verilator stacks up to some of the other
+commercial and free Verilog simulators, see the
+https://www.veripool.org/verilog_sim_benchmarks.html[Verilog Simulator
+Benchmarks].  (If you benchmark Verilator, please see the notes in the
+https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)], and also
+if possible post on the forums the results; there may be additional tweaks
+possible.)
+
+== Installation & Documentation
+
+For more information:
+
+* {link_verilator_install}[Verilator installation and package directory
+  structure]
+
+* https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
+or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)]
+
+* https://verilator.org/forum[Verilator forum]
+
+* https://verilator.org/issues[Verilator Issues]
+
+== Community Supported
+
+Verilator is a community project, guided by the
+https://chipsalliance.org/[CHIPS Alliance] under the
+https://www.linuxfoundation.org/[Linux Foundation].
+
+We appreciate and welcome your contributions in whatever form; please see
+{link_verilator_contributing}[Contributing to Verilator].  Thanks to our
+https://verilator.org/verilator_doc.html#CONTRIBUTORS[Contributors and
+Sponsors].
+
+== Related Projects
+
+* http://gtkwave.sourceforge.net/[GTKwave] - Waveform viewer for Verilator
+traces.
+
+* http://iverilog.icarus.com[Icarus Verilog] - Icarus is a full featured
+interpreted Verilog simulator. If Verilator does not support your needs,
+perhaps Icarus may.
+
+== Open License
+
+Verilator is Copyright 2003-2020 by Wilson Snyder.  (Report bugs to
+https://verilator.org/issues[Verilator Issues].)
+
+Verilator is free software; you can redistribute it and/or modify it under
+the terms of either the GNU Lesser General Public License Version 3 or the
+Perl Artistic License Version 2.0.  See the documentation for more
+details.

README.pod

@@ -1,201 +0,0 @@
-# DESCRIPTION: DOCUMENT source run through perl to produce README file
-# Use 'make README' to produce the output file
-
-=pod
-
-=head1 NAME
-
-This is the Verilator package README file.
-
-=head1 DISTRIBUTION
-
-http://www.veripool.org/verilator
-
-This package is Copyright 2003-2017 by Wilson Snyder.  (Report bugs to
-L<http://www.veripool.org/>.)
-
-Verilator is free software; you can redistribute it and/or modify it under
-the terms of either the GNU Lesser General Public License Version 3 or the
-Perl Artistic License Version 2.0.  (See the documentation for more
-details.)
-
-This program is distributed in the hope that it will be useful, but WITHOUT
-ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-more details.
-
-=head1 DESCRIPTION
-
-Verilator converts synthesizable (generally not behavioral) Verilog code
-into C++ or SystemC code.  It is not a complete simulator, just a
-translator.
-
-Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
-reads the specified Verilog code, lints it, and optionally adds coverage
-code.  For C++ format, it outputs .cpp and .h files.  For SystemC format,
-it outputs .cpp and .h files using the standard SystemC headers.
-
-The resulting files are then compiled with C++.  The user writes a little
-C++ wrapper file, which instantiates the top level module.  This is
-compiled in C++, and linked with the Verilated files.
-
-The resulting executable will perform the actual simulation.
-
-=head1 SUPPORTED SYSTEMS
-
-Verilator is developed and has primary testing on Ubuntu.  Versions have
-also built on Redhat Linux, Macs OS-X, HPUX and Solaris.  It should run
-with minor porting on any Linix-ish platform.  Verilator also works on
-Windows under Cygwin, and Windows under MinGW (gcc -mno-cygwin).  Verilated
-output (not Verilator itself) compiles under MSVC++ 2008 and newer.
-
-=head1 INSTALLATION
-
-For more details see 
-L<http://www.veripool.org/projects/verilator/wiki/Installing>.
-
-If you will be modifying Verilator, you should use the "git" method as it
-will let you track changes.
-
-=over 4
-
-=item
-
-The latest version is available at L<http://www.veripool.org/verilator>.
-
-Download the latest package from that site, and decompress.
-
-    tar xvzf verilator_version.tgz
-
-=item
-
-If you will be using SystemC (vs straight C++ output), download SystemC
-from L<http://www.systemc.org>.  Follow their installation instructions.
-You will need to set SYSTEMC_INCLUDE to point to the include directory with
-systemc.h in it, and SYSTEMC_LIBDIR to points to the directory with
-libsystemc.a in it.  (Older installations may set SYSTEMC and SYSTEMC_ARCH
-instead.)
-
-=item
-
-You will need the C<flex> and C<bison> packages installed.
-
-=item
-
-C<cd> to the Verilator directory containing this README.
-
-=item
-
-You now have to decide how you're going to eventually install the kit.
-
-Note Verilator builds the current value of VERILATOR_ROOT, SYSTEMC_INCLUDE,
-and SYSTEMC_LIBDIR as defaults into the executable, so try to have them
-correct before configuring.
-
-=over 4
-
-=item 1.
-
-Our personal favorite is to always run Verilator from the kit directory.
-This allows the easiest experimentation and upgrading.  It's also how most
-EDA tools operate; to run you point to the tarball, no install is needed.
-
-    export VERILATOR_ROOT=`pwd`   # if your shell is bash
-    setenv VERILATOR_ROOT `pwd`   # if your shell is csh
-    ./configure
-
-=item 2.
-
-To install globally onto a "cad" disk with multiple versions of every tool,
-and add it to path using Modules/modulecmd:
-
-    unset VERILATOR_ROOT      # if your shell is bash
-    unsetenv VERILATOR_ROOT   # if your shell is csh
-    # For the tarball, use the version number instead of git describe
-    ./configure --prefix /CAD_DISK/verilator/`git describe | sed "s/verilator_//"`
-
-    After installing you'll want a module file like the following:
-
-    set install_root /CAD_DISK/verilator/{version-number-used-above}
-    unsetenv VERILATOR_ROOT
-    prepend-path PATH $install_root/bin
-    prepend-path MANPATH $install_root/man
-    prepend-path PKG_CONFIG_PATH $install_root/share/pkgconfig
-
-=item 3.
-
-The next option is to install it globally, using the normal system paths:
-
-    unset VERILATOR_ROOT      # if your shell is bash
-    unsetenv VERILATOR_ROOT   # if your shell is csh
-    ./configure
-
-=item 4.
-
-Alternatively you can configure a prefix that install will populate, as
-most GNU tools support:
-
-    unset VERILATOR_ROOT      # if your shell is bash
-    unsetenv VERILATOR_ROOT   # if your shell is csh
-    ./configure --prefix /opt/verilator-VERSION
-
-Then after installing you will need to add /opt/verilator-VERSION/bin to
-PATH.
-
-=back
-
-=item
-
-Type C<make> to compile Verilator.
-
-Type C<make test> to check the compilation.
-
-Configure with C<--enable-longtests> for more complete developer tests.
-Additional packages may be required for these tests.
-
-You may get a error about a typedef conflict for uint32_t.  Edit
-verilated.h to change the typedef to work, probably to @samp{typedef
-unsigned long uint32_t;}.
-
-=item
-
-If you used the VERILATOR_ROOT scheme you're done.  Programs should set the
-environment variable VERILATOR_ROOT to point to this distribution, then
-execute $VERILATOR_ROOT/bin/verilator, which will find the path to all
-needed files.
-
-If you used the prefix scheme, now do a C<make install>.  To run verilator,
-have the verilator binary directory in your PATH (this should already be
-true if using the default configure), and make sure VERILATOR_ROOT is not
-set.
-
-=back
-
-=head1 USAGE DOCUMENTATION
-
-Detailed documentation and the man page can be seen by running:
-
-    bin/verilator --help
-
-or reading verilator.txt in the same directory as this README.
-
-=head1 DIRECTORY STRUCTURE
-
-The directories in the kit after de-taring are as follows:
-
-    bin/verilator               => Compiler Wrapper invoked to Verilate code
-    include/                    => Files that should be in your -I compiler path
-    include/verilated*.cpp      => Global routines to link into your simulator
-    include/verilated*.h        => Global headers
-    include/verilated.v         => Stub defines for linting
-    include/verilated.mk        => Common makefile
-    src/                        => Translator source code
-    test_v                      => Example Verilog code for other test dirs
-    test_c                      => Example Verilog->C++ conversion
-    test_sc                     => Example Verilog->SystemC conversion
-    test_verilated              => Internal tests
-    test_regress                => Internal tests
-
-=head1 LIMITATIONS
-
-See verilator.txt (or execute C<bin/verilator --help>) for limitations.

TODO

@@ -1,129 +0,0 @@
-// DESCRIPTION: Verilator: List of To Do issues.
-//
-// Copyright 2004-2017 by Wilson Snyder. This program is free software; you can
-// redistribute it and/or modify it under the terms of either the GNU
-// Lesser General Public License Version 3 or the Perl Artistic License
-// Version 2.0.
-
-
-Language support:
-	* Fix ordering of each bit separately in a signal (mips)
-		assign b[3:0] = b[7:4];  assign b[7:4] = in;
-	* Support UDP gate primitives/ cell libraries
-		(have code for combos - problem is sequential udps)
-	* Function to eval combo logic after /*verilator public*/ functions [gwaters]
-	* Support generated clocks (correctness)
-	* Real numbers
-	* Recursive functions
-	* Verilog configuration files
-	* Structs/unions (have starting point)
-	* DPI to define C/C++ calls from Verilog
-	* Expression coverage (see notes)
-	* Better tristate support
-
-Long-term Features
-	* Assertions
-	* Tristate support
-	* Multithreaded execution
-
-Configure/Make/Install
-	* Full MSVC++ compilation (does scons support this?) (4.000?)
-	* Distribute with flex/bison already expanded?
-	  Flex library not needed.  Probably too difficult to be worth it.
-
-Testing:
-	* Move test_c/sp/v/verilated into test_regress format (4.000?)
-	* Capture all inputs into global "rerun it" file
-	* Code to make wrapper that sets signals, so can do comparison checks
-	* New random program generator
-	* Better graph viewer with search and zoom
-	* Port and test against opencores.org code
-	* // verilator debug in code so can see only tree affecting those nodes
-
-Usability:
-	* Detect and pre-remove most UNOPTFLATs (4.000) 
-	* Better reporting of unopt problems, including what lines of code
-	* Report more errors (all of them?) before exiting [Eugene Weber]
-	* Auto-create scons config files
-	* Print version/etc message at runtime. (4.000?)
-	  Include number of lines of code, percent comments, code complexity measurement
-	  <-80chars------------------------------------------------------------------->
-	  Verilator 3.600 - fast, free, open-sourced.  Copyright 2001-2013.
-	  Verilated #### modules, #### instances, ##### sigs,
-	  	    #### non-comment lines, ##### ops, ### KB model size
-	* Default the --l2name to remove extra "v" level of hierarchy (flag to make "top")
-
-Lint:
-	* CDCRSTLOGIC should allow filtering with paths
-	  "waive CDCRSTLOGIC --from a.b.sig  --to a.c.sig --via OR"
-
-Internal Code:
-	* Eliminate the AstNUser* passed to all visitors; its only needed in V3Width,
-	  and removing it will speed up and simplify all the other code.
-	* V3Graph should be templated container type, taking in Vertex + Edge types
-	* Rename V3PreLex etc to match VerilogPerl filenames
-	* Instead of string, have an VEncodedString/VIdString which contains __DOT__ish
-	  things, to reduce bugs.  Also add _20 trailing space to \ encoded names. (4.000)
-
-Runtime:
-	* New evalulation loop   ~/src/verilator/notes/event_loop.txt (4.000?)
-	* Remove all private internal functions from top level wrapper header, move
-	  to new level (4.000?)
-	* Completely standalone simulation (4.000)
-	   main() records arguments for $test$plusvars
-	   instantiates top,
-	   does tracing  (support $dump?)
-	   calls top->simulateForever()
-	   exits
-
-Performance:
-	* Latch optimizations
-	* Constant propagation
-		Extra cleaning AND:  1 & ((VARREF >> 1) | ((&VARREF >> 1) & VARREF))
-		Extra shift (perhaps due to clean): if (1 & CAST (VARREF >> #))
-	* Gated clock and latch conversion to flops.  [JeanPaul Vanitegem]
-		Could propagate the AND into pos/negedges and let domaining optimize.
-	* Negedge reset
-		Switch to remove negedges that don't matter
-		Can't remove async resets from control flops (like in syncronizers)
-	* If all references to array have a constant index, blow up into separate signals-per-index
-	* Bit-multiply for faster bit swapping and a=b[1,3,2] random bit reorderings.
-	* Move _last sets and all other combo logic inside master
-		if() that triggers on all possible sense items
-	* Rewrite and combine V3Life, V3Subst
-		If block temp only ever set in one place to constant, propagate it
-			Used in t_mem for array delayed assignments
-		Replace variables if set later in same cfunc branch
-			See for example duplicate sets of _narrow in cycle 90/91 of t_select_plusloop
-	* Same assignment on both if branches
-		"if (a) { ... b=2; } else { ... b=2;}" -> "b=2; if ..."
-		Careful though, as b could appear in the statement or multiple times in statement
-		(Could just require exatly two 'b's in statement)
-	* Simplify XOR/XNOR/AND/OR bit selection trees
-		Foo = A[1] ^ A[2] ^ A[3] etc are better as ^ ( A & 32'b...1110 )
-	* Combine variables into wider elements
-		Parallel statements on different bits should become single signal
-		Variables that are always consumed in "parallel" can be joined
-	* Duplicate assignments in gate optimization
-		Common to have many separate posedge blocks, each with identical
-		reset_r <= rst_in
-	* If signal is used only once (not counting trace), always gate substitute
-		Don't merge if any combining would form circ logic (out goes back to in)
-	* Multiple assignments each bit can become single assign with concat
-		Make sure a SEL of a CONCAT can get the single bit back.
-	* Usually blocks/values
-		Enable only after certain time, so VL_TIME_I(32) > 0x1e gets eliminated out
-	* Better ordering of a<=b, b<=c, put all refs to 'b' next to each other to optimize caching
-	* Allow Split of case statements without a $display/$stop
-	* I-cache packing improvements (what/how?)
-	* Data cache organization (order of vars in class)
-		First have clocks,
-		then bools instead of uint32_t's
-		then based on what sense list they come from, all outputs, then all inputs
-		finally have any signals part of a "usually" block, or constant.
-	* Rather then tracking widths, have a MSB...LSB of this expression
-		(or better, a bitmask of bits relevant in this expression)
-	* Track recirculation and convert into clock-enables
-	* Clock enables should become new clocking domains for speed
-	* If floped(a) & flopped(b) and no other a&b, then instead flop(a&b).
-	* Sort by output bitselects so can combine more assignments (see DDP example dx_dm signal)

bin/verilator_coverage

@@ -1,9 +1,7 @@
-: # -*-Mode: perl;-*- use perl, wherever it is
-eval 'exec perl -wS $0 ${1+"$@"}'
-  if 0;
+#!/usr/bin/env perl
 ######################################################################
 #
-# Copyright 2003-2017 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -17,13 +15,6 @@ eval 'exec perl -wS $0 ${1+"$@"}'
 
 require 5.006_001;
 use warnings;
-BEGIN {
-    if ($ENV{DIRPROJECT} && $ENV{DIRPROJECT_PERL_BOOT}) {
-	# Magic to allow author testing of perl packages in local directory
-	require $ENV{DIRPROJECT}."/".$ENV{DIRPROJECT_PERL_BOOT};
-    }
-}
-
 use Getopt::Long;
 use FindBin qw($RealBin $RealScript);
 use IO::File;
@@ -31,7 +22,7 @@ use Pod::Usage;
 use Cwd qw(abs_path getcwd);
 
 use strict;
-use vars qw ($Debug @Opt_Verilator_Sw);
+use vars qw($Debug @Opt_Verilator_Sw);
 
 #######################################################################
 #######################################################################
@@ -54,26 +45,26 @@ foreach my $sw (@ARGV) {
     push @Opt_Verilator_Sw, $sw;
 }
 
-Getopt::Long::config ("no_auto_abbrev","pass_through");
+Getopt::Long::config("no_auto_abbrev","pass_through");
 if (! GetOptions (
-	  # Major operating modes
-	  "help"	=> \&usage,
-	  "debug:s"	=> \&debug,
-	  # "version!"	=> \&version,	# Also passthru'ed
-	  # Additional parameters
-	  "<>"		=> sub {},	# Ignored
+          # Major operating modes
+          "help"        => \&usage,
+          "debug:s"     => \&debug,
+          # "version!"  => \&version,   # Also passthru'ed
+          # Additional parameters
+          "<>"          => sub {},      # Ignored
     )) {
     pod2usage(-exitstatus=>2, -verbose=>0);
 }
 
 # Normal, non gdb
-run (verilator_coverage_bin()
-     ." ".join(' ',@Opt_Verilator_Sw));
+run(verilator_coverage_bin()
+    ." ".join(' ',@Opt_Verilator_Sw));
 
 #----------------------------------------------------------------------
 
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
 }
 
 sub debug {
@@ -90,23 +81,25 @@ sub verilator_coverage_bin {
     my $bin = "";
     # Use VERILATOR_ROOT if defined, else assume verilator_bin is in the search path
     my $basename = ($ENV{VERILATOR_COVERAGE_BIN}
-		    || "verilator_coverage_bin_dbg");
+                    || "verilator_coverage_bin_dbg");
     if (defined($ENV{VERILATOR_ROOT})) {
-	my $dir = $ENV{VERILATOR_ROOT};
-	if (-x "$dir/bin/$basename") {  # From a "make install" into VERILATOR_ROOT
-	    $bin = "$dir/bin/$basename";
-	} else {
-	    $bin = "$dir/$basename";  # From pointing to kit directory
-	}
+        my $dir = $ENV{VERILATOR_ROOT};
+        if (-x "$dir/bin/$basename"
+            || -x "$dir/bin/$basename.exe") {  # From a "make install" into VERILATOR_ROOT
+            $bin = "$dir/bin/$basename";
+        } else {
+            $bin = "$dir/$basename";  # From pointing to kit directory
+        }
     } else {
-	if (-x "$RealBin/$basename") {
-	    $bin = "$RealBin/$basename";  # From path/to/verilator with verilator_bin installed
-	} else {
-	    $bin = $basename;  # Find in PATH
-	}
-	# Note we don't look under bin/$basename which would be right if running
-	# in the kit dir. Running that would likely break, since
-	# VERILATOR_ROOT wouldn't be set and Verilator won't find internal files.
+        if (-x "$RealBin/$basename"
+            || -x "$RealBin/$basename.exe") {
+            $bin = "$RealBin/$basename";  # From path/to/verilator with verilator_bin installed
+        } else {
+            $bin = $basename;  # Find in PATH
+        }
+        # Note we don't look under bin/$basename which would be right if running
+        # in the kit dir. Running that would likely break, since
+        # VERILATOR_ROOT wouldn't be set and Verilator won't find internal files.
     }
     return $bin;
 }
@@ -123,23 +116,28 @@ sub run {
     system($command);
     my $status = $?;
     if ($status) {
-	if ($! =~ /no such file or directory/i) {
-	    warn "%Error: verilator_coverage: Misinstalled, or VERILATOR_ROOT might need to be in environment\n";
-	}
-	if ($Debug) {  # For easy rerunning
-	    warn "%Error: export VERILATOR_ROOT=".($ENV{VERILATOR_ROOT}||"")."\n";
-	    warn "%Error: $command\n";
-	}
-	if ($status & 127) {
-	    if (($status & 127) == 8 || ($status & 127) == 11) { # SIGFPA or SIGSEGV
-		warn "%Error: Verilator_coverage internal fault, sorry.\n" if !$Debug;
-	    } elsif (($status & 127) == 6) {  # SIGABRT
-		warn "%Error: Verilator_coverage aborted.\n" if !$Debug;
-	    } else {
-		warn "%Error: Verilator_coverage threw signal $status.\n" if !$Debug;
-	    }
-	}
-	die "%Error: Command Failed $command\n";
+        if ($! =~ /no such file or directory/i) {
+            warn "%Error: verilator_coverage: Misinstalled, or VERILATOR_ROOT might need to be in environment\n";
+        }
+        if ($Debug) {  # For easy rerunning
+            warn "%Error: export VERILATOR_ROOT=".($ENV{VERILATOR_ROOT}||"")."\n";
+            warn "%Error: $command\n";
+        }
+        if ($status & 127) {
+            if (($status & 127) == 8 || ($status & 127) == 11) { # SIGFPA or SIGSEGV
+                warn "%Error: Verilator_coverage internal fault, sorry.\n" if !$Debug;
+            } elsif (($status & 127) == 6) {  # SIGABRT
+                warn "%Error: Verilator_coverage aborted.\n" if !$Debug;
+            } else {
+                warn "%Error: Verilator_coverage threw signal $status.\n" if !$Debug;
+            }
+        }
+        if ($status != 256 || $Debug) {  # i.e. not normal exit(1)
+            warn "%Error: Command Failed $command\n";
+        }
+        exit $! if $!;  # errno
+        exit $? >> 8 if $? >> 8;  # child exit status
+        exit 255;  # last resort
     }
 }
 
@@ -173,7 +171,7 @@ additional points.
 Additional Verilog-standard arguments specify the search paths necessary to
 find the source code that the coverage analysis was performed on.
 
-To get correct coverage percentages, you may wish to read logs/coverage.pl
+To get correct coverage percentages, you may wish to read logs/coverage.dat
 into Emacs and do a M-x keep-lines to include only those statistics of
 interest.
 
@@ -269,9 +267,9 @@ Specifies a module search directory.
 
 =head1 DISTRIBUTION
 
-The latest version is available from L<http://www.veripool.org/>.
+The latest version is available from L<https://verilator.org>.
 
-Copyright 2003-2017 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2003-2020 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify the Verilator internals under the terms of
 either the GNU Lesser General Public License Version 3 or the Perl Artistic
 License Version 2.0.

bin/verilator_difftree

@@ -1,16 +1,13 @@
-: # -*-Mode: perl;-*- use perl, wherever it is
-eval 'exec perl -wS $0 ${1+"$@"}'
-  if 0;
+#!/usr/bin/env perl
 # See copyright, etc in below POD section.
 ######################################################################
 
-require 5.006_001;
 use warnings;
 use Getopt::Long;
 use IO::File;
 use Pod::Usage;
 use strict;
-use vars qw ($Debug);
+use vars qw($Debug);
 
 #======================================================================
 
@@ -37,12 +34,12 @@ my $Opt_B;
 my $Opt_Lineno = 1;
 autoflush STDOUT 1;
 autoflush STDERR 1;
-Getopt::Long::config ("no_auto_abbrev");
-if (! GetOptions (
-	  "help"	=> \&usage,
-	  "debug"	=> \&debug,
-	  "<>"		=> \&parameter,
-	  "lineno!"	=> \$Opt_Lineno,
+Getopt::Long::config("no_auto_abbrev");
+if (! GetOptions(
+          "help"        => \&usage,
+          "debug"       => \&debug,
+          "<>"          => \&parameter,
+          "lineno!"     => \$Opt_Lineno,
     )) {
     die "%Error: Bad usage, try 'verilator_difftree --help'\n";
 }
@@ -54,9 +51,9 @@ defined $Opt_B or die "%Error: No new diff filename\n";
 -e $Opt_B or die "%Error: No new diff filename found: $Opt_B\n";
 
 if (-d $Opt_A && -d $Opt_B) {
-    diff_dir ($Opt_A, $Opt_B);
+    diff_dir($Opt_A, $Opt_B);
 } elsif (-f $Opt_A && -f $Opt_B) {
-    diff_file ($Opt_A, $Opt_B);
+    diff_file($Opt_A, $Opt_B);
 } else {
     die "%Error: Mix of files and dirs\n";
 }
@@ -68,24 +65,25 @@ sub diff_dir {
     my %files;
 
     foreach my $fn (glob("$a/*.tree")) {
-	(my $base = $fn) =~ s!.*/!!;
-	$files{$base}{a} = $fn;
+        (my $base = $fn) =~ s!.*/!!;
+        $files{$base}{a} = $fn;
     }
     foreach my $fn (glob("$b/*.tree")) {
-	(my $base = $fn) =~ s!.*/!!;
-	$files{$base}{b} = $fn;
+        (my $base = $fn) =~ s!.*/!!;
+        $files{$base}{b} = $fn;
     }
     my $any;
     foreach my $base (sort (keys %files)) {
-	my $a = $files{$base}{a};
-	my $b = $files{$base}{b};
-	next if !$a || !$b;
-	print "="x70,"\n";
-	print "= $a <-> $b\n";
-	diff_file($a,$b);
-	$any = 1;
+        my $a = $files{$base}{a};
+        my $b = $files{$base}{b};
+        next if !$a || !$b;
+        print "="x70,"\n";
+        print "= $a <-> $b\n";
+        diff_file($a,$b);
+        $any = 1;
     }
-    $any or warn "%Warning: No .tree files found\n";
+    $any or warn("%Warning: No .tree files found that have similar base names:\n    "
+                 .join("\n    ", sort keys %files),"\n");
 }
 
 sub diff_file {
@@ -100,10 +98,10 @@ sub diff_file {
     my $vera = version_from($a);
     my $verb = version_from($b);
     my $verCvt = (($vera < 0x3900 && $verb >= 0x3900)
-		  || ($vera >= 0x3900 && $verb < 0x3900));
+                  || ($vera >= 0x3900 && $verb < 0x3900));
 
-    filter ($a, $tmp_a, $verCvt);
-    filter ($b, $tmp_b, $verCvt);
+    filter($a, $tmp_a, $verCvt);
+    filter($b, $tmp_b, $verCvt);
     system("diff -u $tmp_a $tmp_b");
     unlink $tmp_a;
     unlink $tmp_b;
@@ -114,8 +112,8 @@ sub version_from {
     # Return dump format
     my $f1 = IO::File->new ($fn) or die "%Error: $! $fn,";
     while (defined (my $line=$f1->getline())) {
-	last if $. > 10;
-	return hex $1 if $line =~ /\(format (0x[0-9.]+)\)/;
+        last if $. > 10;
+        return hex $1 if $line =~ /\(format (0x[0-9.]+)\)/;
     }
     return 1.0;
 }
@@ -129,36 +127,36 @@ sub filter {
     my $f2 = IO::File->new ($fn2,"w") or die "%Error: $! $fn2,";
     while (defined (my $line=$f1->getline())) {
       same_line:
-	next if $line =~ / This=/;
-	$line =~ s/0x[a-f0-9]+/0x/g;
-	$line =~ s/<e[0-9]+\#?>/<e>/g;
-	$line =~ s/{[a-z]*\d+}/{}/g if !$Opt_Lineno;
-	if ($verCvt) {
-	    next if $line =~ /^     NETLIST/;
-	    $line =~ s!\@dt=0x\(G?/?([^)]+)\)!$1!g;  # NEW: @dt -> OLD: non @dt format
-	    #					     # Below Ver1_Non_Dtyped may replace above further
-	    if ($line =~ /: ([A-Z]+) /) {
-		my $type = $1;
-		next if $type =~ 'DTYPE';
-		if ($type eq 'TYPETABLE' || $type eq 'RANGE') {
-		    $line =~ /^(\s+\S+:) /; my $prefix = $1;
-		    while (defined ($line=$f1->getline())) {
-			next if $line =~ /^\s+[a-z]/;  # Table body
-			next if $line =~ /^${prefix}[0-9]:/;
-			goto same_line;
-		    }
-		    next;
-		}
-		if ($Ver1_Non_Dtyped{$type}) {
-		    $line =~ s! w[0-9]+!!g;
-		}
-	    }
-	    $line =~ s!\@dt=0$!NoW!g;   # NEW: dt=null -> common format
-	    $line =~ s!\@dt=0 !NoW !g;  # NEW: dt=null -> common format
-	    $line =~ s! s?w0$! NoW!g;   # OLD: no width -> common format
-	    $line =~ s! s?w0 ! NoW !g;  # OLD: no width -> common format
-	}
-	print $f2 $line;
+        next if $line =~ / This=/;
+        $line =~ s/0x[a-f0-9]+/0x/g;
+        $line =~ s/<e[0-9]+\#?>/<e>/g;
+        $line =~ s/{[a-z]*\d+}/{}/g if !$Opt_Lineno;
+        if ($verCvt) {
+            next if $line =~ /^     NETLIST/;
+            $line =~ s!\@dt=0x\(G?/?([^)]+)\)!$1!g;  # NEW: @dt -> OLD: non @dt format
+            #                                        # Below Ver1_Non_Dtyped may replace above further
+            if ($line =~ /: ([A-Z]+) /) {
+                my $type = $1;
+                next if $type =~ 'DTYPE';
+                if ($type eq 'TYPETABLE' || $type eq 'RANGE') {
+                    $line =~ /^(\s+\S+:) /; my $prefix = $1;
+                    while (defined ($line=$f1->getline())) {
+                        next if $line =~ /^\s+[a-z]/;  # Table body
+                        next if $line =~ /^${prefix}[0-9]:/;
+                        goto same_line;
+                    }
+                    next;
+                }
+                if ($Ver1_Non_Dtyped{$type}) {
+                    $line =~ s! w[0-9]+!!g;
+                }
+            }
+            $line =~ s!\@dt=0$!NoW!g;   # NEW: dt=null -> common format
+            $line =~ s!\@dt=0 !NoW !g;  # NEW: dt=null -> common format
+            $line =~ s! s?w0$! NoW!g;   # OLD: no width -> common format
+            $line =~ s! s?w0 ! NoW !g;  # OLD: no width -> common format
+        }
+        print $f2 $line;
     }
     $f1->close;
     $f2->close;
@@ -167,8 +165,8 @@ sub filter {
 #----------------------------------------------------------------------
 
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
-    exit (1);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
+    exit(1);  # Unreachable
 }
 
 sub debug {
@@ -178,11 +176,11 @@ sub debug {
 sub parameter {
     my $param = shift;
     if (!defined $Opt_A) {
-	$Opt_A = $param;
+        $Opt_A = $param;
     } elsif (!defined $Opt_B) {
-	$Opt_B = $param;
+        $Opt_B = $param;
     } else {
-	die "%Error: Unknown parameter: $param\n";
+        die "%Error: Unknown parameter: $param\n";
     }
 }
 
@@ -233,9 +231,9 @@ Do not show differences in line numbering.
 
 =head1 DISTRIBUTION
 
-The latest version is available from L<http://www.veripool.org/verilator>.
+The latest version is available from L<https://verilator.org>.
 
-Copyright 2005-2017 by Wilson Snyder.  This package is free software; you can
+Copyright 2005-2020 by Wilson Snyder.  This package is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

bin/verilator_gantt

@@ -0,0 +1,558 @@
+#!/usr/bin/env perl
+# See copyright, etc in below POD section.
+######################################################################
+
+use warnings;
+use strict;
+use Getopt::Long;
+use IO::File;
+use Pod::Usage;
+use vars qw($Debug);
+
+$Debug = 0;
+my $Opt_File;
+my $Opt_Time_Per_Char = 0;  # rdtsc ticks per char in gantt chart, 0=auto
+my $opt_vcd = "profile_threads.vcd";
+
+our %Threads;
+our %Mtasks;
+our %Global;
+
+autoflush STDOUT 1;
+autoflush STDERR 1;
+Getopt::Long::config("no_auto_abbrev");
+if (! GetOptions(
+          "help"        => \&usage,
+          "scale=i"     => \$Opt_Time_Per_Char,
+          "debug"       => sub { $Debug = 1; },
+          "vcd=s"       => \$opt_vcd,
+          "no-vcd!"     => sub { $opt_vcd = undef; },
+          "<>"          => \&parameter,
+    )) {
+    die "%Error: Bad usage, try 'verilator_gantt --help'\n";
+}
+
+$Opt_File = "profile_threads.dat" if !defined $Opt_File;
+
+process($Opt_File);
+write_vcd($opt_vcd) if defined $opt_vcd;
+exit(0);
+
+#######################################################################
+
+sub usage {
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
+    exit(1);  # Unreachable
+}
+
+sub parameter {
+    my $param = shift;
+    if (!defined $Opt_File) {
+        $Opt_File = $param;
+    } else {
+        die "%Error: Unknown parameter: $param\n";
+    }
+}
+
+#######################################################################
+
+sub process {
+    my $filename = shift;
+
+    read_data($filename);
+    report();
+}
+
+#######################################################################
+
+sub read_data {
+    my $filename = shift;
+
+    %Global = (rdtsc_cycle_time => 0);
+
+    my $fh = IO::File->new ($filename) or die "%Error: $! $filename,";
+    while (my $line = $fh->getline) {
+        if ($line =~ m/VLPROF mtask\s(\d+)\sstart\s(\d+)\send\s(\d+)\selapsed\s(\d+)\spredict_time\s(\d+)\scpu\s(\d+)\son thread (\d+)/) {
+            my $mtask = $1;
+            my $start = $2;
+            my $end = $3;
+            my $elapsed_time = $4;
+            my $predict_time = $5;
+            my $cpu = $6;
+            my $thread = $7;
+            $Threads{$thread}{$start}{mtask} = $mtask;
+            $Threads{$thread}{$start}{end} = $end;
+            $Threads{$thread}{$start}{cpu} = $cpu;
+
+            if (!exists $Mtasks{$mtask}{elapsed}) {
+                $Mtasks{$mtask}{elapsed} = 0;
+            }
+            $Mtasks{$mtask}{elapsed} += $elapsed_time;
+            $Mtasks{$mtask}{predict} = $predict_time;
+            $Mtasks{$mtask}{end} = max($Mtasks{$mtask}{end}, $end);
+        }
+        elsif ($line =~ /^VLPROFTHREAD/) {}
+        elsif ($line =~ m/VLPROF arg\s+(\S+)\+([0-9.])\s*$/
+               || $line =~ m/VLPROF arg\s+(\S+)\s+([0-9.])\s*$/) {
+            $Global{args}{$1} = $2;
+        }
+        elsif ($line =~ m/VLPROF stat\s+(\S+)\s+([0-9.]+)/) {
+            $Global{stats}{$1} = $2;
+        }
+        elsif ($line =~ /^#/) {}
+        elsif ($Debug) {
+            chomp $line;
+            print "Unk: $line\n";
+        }
+        # TODO -- this is parsing text printed by a client.
+        # Really, verilator proper should generate this
+        # if it's useful...
+        if ($line =~ m/rdtsc time = (\d+) ticks/) {
+            $Global{rdtsc_cycle_time} = $1;
+        }
+    }
+}
+
+sub report {
+    print "Verilator Gantt report\n";
+
+    print "\nArgument settings:\n";
+    foreach my $arg (sort keys %{$Global{args}}) {
+        my $plus = ($arg =~ /^\+/) ? "+" : " ";
+        printf "  %s%s%d\n", $arg, $plus, $Global{args}{$arg};
+    }
+
+    my $nthreads = scalar keys %Threads;
+    $Global{cpus}{cpu_time} = {};
+    foreach my $thread (keys %Threads) {
+        # Make potentially multiple characters per column
+        foreach my $start (keys %{$Threads{$thread}}) {
+            my $cpu = $Threads{$thread}{$start}{cpu};
+            my $elapsed = $Threads{$thread}{$start}{end} - $start;
+            $Global{cpus}{cpu_time}{$cpu} += $elapsed;
+        }
+    }
+
+    my $mt_mtask_time = 0;
+    my $long_mtask_time = 0;
+    my $last_end = 0;
+    foreach my $mtask (keys %Mtasks) {
+        $mt_mtask_time += $Mtasks{$mtask}{elapsed};
+        $last_end = max($last_end, $Mtasks{$mtask}{end});
+        $long_mtask_time = max($long_mtask_time, $Mtasks{$mtask}{elapsed});
+    }
+    $Global{last_end} = $last_end;
+
+    report_graph();
+
+    # If we know cycle time in the same (rdtsc) units,
+    # this will give us an actual utilization number,
+    # (how effectively we keep the cores busy.)
+    #
+    # It also gives us a number we can compare against
+    # serial mode, to estimate the overhead of data sharing,
+    # which will show up in the total elapsed time. (Overhead
+    # of synchronization and scheduling should not.)
+    print "\nAnalysis:\n";
+    printf "  Total threads             = %d\n", $nthreads;
+    printf "  Total mtasks              = %d\n", scalar(keys %Mtasks);
+    printf "  Total cpus used           = %d\n", scalar(keys %{$Global{cpus}});
+    printf "  Total yields              = %d\n", $Global{stats}{yields};
+    printf "  Total eval time           = %d rdtsc ticks\n", $Global{last_end};
+    printf "  Longest mtask time        = %d rdtsc ticks\n", $long_mtask_time;
+    printf "  All-thread mtask time     = %d rdtsc ticks\n", $mt_mtask_time;
+    my $long_efficiency = $long_mtask_time/($Global{last_end});
+    printf "  Longest-thread efficiency = %0.1f%%\n", $long_efficiency*100;
+    my $mt_efficiency = $mt_mtask_time/($Global{last_end}*$nthreads);
+    printf "  All-thread efficiency     = %0.1f%%\n", $mt_efficiency*100;
+    printf "  All-thread speedup        = %0.1f\n", $mt_efficiency*$nthreads;
+    if ($Global{rdtsc_cycle_time} > 0) {
+        my $ut = $mt_mtask_time / $Global{rdtsc_cycle_time};
+        print "tot_mtask_cpu=$mt_mtask_time cyc=$Global{rdtsc_cycle_time} ut=$ut\n";
+    }
+
+    my @p2e_ratios;
+    my $min_p2e = 1000000;
+    my $min_mtask;
+    my $max_p2e = -1000000;
+    my $max_mtask;
+    foreach my $mtask (sort keys %Mtasks) {
+        if ($Mtasks{$mtask}{elapsed} > 0) {
+            if ($Mtasks{$mtask}{predict} == 0) {
+                $Mtasks{$mtask}{predict} = 1;  # don't log(0) below
+            }
+            my $p2e_ratio = log( $Mtasks{$mtask}{predict} / $Mtasks{$mtask}{elapsed} );
+            #print "log(p2e $mtask) = $p2e_ratio   (predict $Mtasks{$mtask}{predict}, elapsed $Mtasks{$mtask}{elapsed})\n";
+            push @p2e_ratios, $p2e_ratio;
+
+            if ($p2e_ratio > $max_p2e) {
+                $max_p2e = $p2e_ratio;
+                $max_mtask = $mtask;
+            }
+            if ($p2e_ratio < $min_p2e) {
+                $min_p2e = $p2e_ratio;
+                $min_mtask = $mtask;
+            }
+        }
+    }
+
+    print "\nStatistics:\n";
+    print "  min log(p2e) = $min_p2e  from mtask $min_mtask (predict $Mtasks{$min_mtask}{predict}, elapsed $Mtasks{$min_mtask}{elapsed})\n";
+    print "  max log(p2e) = $max_p2e  from mtask $max_mtask (predict $Mtasks{$max_mtask}{predict}, elapsed $Mtasks{$max_mtask}{elapsed})\n";
+
+    my $stddev = stddev(\@p2e_ratios);
+    my $mean = mean(\@p2e_ratios);
+    print "  mean = " . ($mean) . "\n";
+    print "  stddev = " . ($stddev) . "\n";
+    print "  e ^ stddev = " . exp($stddev). "\n";
+    print "\n";
+}
+
+sub report_graph {
+    my $time_per = $Opt_Time_Per_Char;
+    if ($time_per == 0) {
+        $time_per = ($Global{last_end} / 40);  # Start with 40 columns
+        while ($time_per > 10) {
+            my ($graph, $conflicts) = _make_graph($time_per);
+            last if !$conflicts;
+            $time_per = int($time_per/2);
+        }
+        # One more step so we can fit more labels
+        $time_per = int($time_per/2);
+    }
+
+    my ($graph, $conflicts) = _make_graph($time_per);
+
+    print "\nThread gantt graph:\n";
+    print "  Legend: One character width = $time_per rdtsc ticks\n";
+    print "  Legend: '&' = multiple mtasks in this period (character width)\n";
+
+    my $scale = "   <-".$Global{last_end}." rdtsc total";
+    for (my $col = length($scale);  # -2 for '->' below
+         $col < ($Global{last_end}/$time_per); ++$col) {
+        $scale .= "-";
+    }
+    print "  $scale->\n";
+
+    foreach my $thread (sort keys %{$graph}) {
+        print "  t: ";
+        _print_graph_line($graph->{$thread}, '');
+    }
+}
+
+sub _make_graph {
+    my $time_per = shift;
+
+    my $graph = {};  # {thread}{column}{char=>'x' or chars=>#}
+    my $conflicts = 0;
+    foreach my $thread (keys %Threads) {
+        # Make potentially multiple characters per column
+        foreach my $start (sort {$a <=> $b} keys %{$Threads{$thread}}) {
+            my $end = $Threads{$thread}{$start}{end};
+            my $mtask = $Threads{$thread}{$start}{mtask};
+            my $cpu = $Threads{$thread}{$start}{cpu};
+
+            my $startcol = _time_col($time_per, $start);
+            my $endcol = _time_col($time_per, $end);
+
+            my $label = "[";
+            $label .= "$cpu";  # Maybe make optional in future
+            my $width = $endcol - $startcol + 1;
+            while (length($label) < ($width-1)) {  # -1 for ']'
+                $label .= "-";
+            }
+            $label .= "]";
+            $graph->{$thread}[$startcol]{char} .= $label;
+        }
+        if ($Debug) {
+            print "# Multicol: "; _print_graph_line($graph->{$thread}, '|');
+        }
+        # Expand line to one char per column
+        for (my $col = 0; $col <= $#{$graph->{$thread}}; ++$col) {
+            if (my $chars = $graph->{$thread}[$col]{char}) {
+                my $ok = 1;
+                for (my $coladd = 1; $coladd<length($chars); ++$coladd) {
+                    if ($graph->{$thread}[$col + $coladd]{char}) {
+                        $ok = 0; last;
+                    }
+                }
+                if (!$ok) {
+                    if ($chars =~ /\[.*\[/) {  # Two begins or more
+                        $conflicts++;
+                        $graph->{$thread}[$col]{char} = "&";
+                    } else {
+                        $graph->{$thread}[$col]{char} = "[";
+                    }
+                    for (my $coladd = 1; $coladd<length($chars); ++$coladd) {
+                        if ($graph->{$thread}[$col + $coladd]{char}) {
+                            last;
+                        } else {
+                            $graph->{$thread}[$col + $coladd]{char} = 'x';
+                        }
+                    }
+                } else {
+                    my $coladd = 0;
+                    foreach my $char (split //, $chars) {
+                        $graph->{$thread}[$col+$coladd]{char} = $char;
+                        ++$coladd;
+                    }
+                }
+            }
+        }
+        if ($Debug) {
+            print "# Singlcol: "; _print_graph_line($graph->{$thread}, '|');
+        }
+    }
+    print "# Conflicts $conflicts\n" if $Debug;
+    return ($graph, $conflicts);
+}
+
+sub _print_graph_line {
+    my $graph_thread = shift;
+    my $sep = shift;
+    for (my $col = 0; $col <= $#{$graph_thread}; ++$col) {
+        my $c = $graph_thread->[$col]{char}; $c=' ' if !defined $c;
+        print $c, $sep;
+    }
+    print "\n";
+}
+
+sub _time_col {
+    my $time_per = shift;
+    my $time = shift;
+    return int($time/$time_per);
+}
+
+#######################################################################
+
+sub write_vcd {
+    my $filename = shift;
+    print "Writing $filename\n";
+    my $fh = IO::File->new(">$filename") or die "%Error: $! $filename,";
+    my $vcd = {values => {},  # {<time>}{<code>} = value
+               sigs => {},  # {<module>}{<sig}} = code
+               code => 0,
+    };
+
+    my %parallelism;
+    foreach my $thread (keys %Threads) {
+        my $mcode = ($vcd->{sigs}{threads}{"thread${thread}_mtask"} ||= $vcd->{code}++);
+        foreach my $start (sort {$a <=> $b} keys %{$Threads{$thread}}) {
+            my $end = $Threads{$thread}{$start}{end};
+            my $mtask = $Threads{$thread}{$start}{mtask};
+            my $cpu = $Threads{$thread}{$start}{cpu};
+            $vcd->{values}{$start}{$mcode} = $mtask;
+            $vcd->{values}{$end}{$mcode} = undef;
+            $parallelism{$start}++;
+            $parallelism{$end}--;
+
+            my $ccode = $vcd->{sigs}{cpus}{"cpu${cpu}_thread"} ||= $vcd->{code}++;
+            $vcd->{values}{$start}{$ccode} = $thread;
+            $vcd->{values}{$end}{$ccode} = undef;
+
+            my $mcode = $vcd->{sigs}{mtasks}{"mtask${mtask}_cpu"} ||= $vcd->{code}++;
+            $vcd->{values}{$start}{$mcode} = $cpu;
+            $vcd->{values}{$end}{$mcode} = undef;
+        }
+    }
+    {
+        my $pcode = ($vcd->{sigs}{Stats}{"parallelism"} ||= $vcd->{code}++);
+        my $value = 0;
+        foreach my $time (sort {$a<=>$b} keys %parallelism) {
+            $value += $parallelism{$time};
+            $vcd->{values}{$time}{$pcode} = $value;
+        }
+    }
+
+    $fh->print('$version Generated by verilator_gantt $end'."\n");
+    $fh->print('$timescale 1ns $end'."\n");
+    $fh->print("\n");
+
+    my %all_codes;
+    $fh->print(' $scope module gantt $end'."\n");
+    foreach my $module (sort keys %{$vcd->{sigs}}) {
+        $fh->printf('  $scope module %s $end'."\n", $module);
+        foreach my $sig (sort keys %{$vcd->{sigs}{$module}}) {
+            my $code = $vcd->{sigs}{$module}{$sig};
+            $fh->printf('   $var wire 32 v%x %s [31:0] $end'."\n",
+                        $code, $sig);
+            $all_codes{$code} = 1;
+        }
+        $fh->print('  $upscope $end'."\n");
+    }
+    $fh->print(' $upscope $end'."\n");
+    $fh->print('$enddefinitions $end'."\n");
+    $fh->print("\n");
+
+    my $first = 1;
+    foreach my $time (sort {$a <=> $b} keys %{$vcd->{values}}) {
+        if ($first) {
+            $first = 0;
+            # Start with Z for any signals without time zero data
+            foreach my $code (keys %all_codes) {
+                if (!defined $vcd->{values}{$time}{$code}) {
+                    $vcd->{values}{$time}{$code} = undef;
+                }
+            }
+        }
+        $fh->printf("#%d\n", $time);
+        foreach my $code (sort keys %{$vcd->{values}{$time}}) {
+            my $value = $vcd->{values}{$time}{$code};
+            if (defined $value) {
+                $fh->printf("b%b v%x\n", $value, $code);
+            } else {
+                $fh->printf("bz v%x\n", $code);
+            }
+        }
+    }
+}
+
+#######################################################################
+# Similar to Statistics::Basic functions, but avoid a package dependency
+
+sub max {
+    my $n = $_[0]; shift;
+    while (defined $_[0]) {
+        $n = $_[0] if !defined $n || $_[0] > $n;
+        shift;
+    }
+    return $n;
+}
+
+sub mean {
+    my $arrayref = shift;
+    my $n = 0;
+    my $sum = 0;
+    foreach my $v (@$arrayref) {
+        $sum += $v;
+        $n++;
+    }
+    return undef if !$n;
+    return $sum/$n;
+}
+
+sub stddev {
+    my $arrayref = shift;
+    my $n = 0;
+    my $sum = 0;
+    my $sumsq = 0;
+    foreach my $v (@$arrayref) {
+        $sum += $v;
+        $sumsq += $v**2;
+        $n++;
+    }
+    return undef if !$n;
+    return sqrt(($sumsq/$n) - ($sum/$n)**2);
+}
+
+#######################################################################
+__END__
+
+=pod
+
+=head1 NAME
+
+verilator_gantt - Create Gantt chart of multi-threaded execution
+
+=head1 SYNOPSIS
+
+Creates a visual representation to help analyze Verilator multithreaded
+simulation performance, by showing when each macro-task starts and ends,
+and showing when each thread is busy or idle.
+
+The generated Gantt chart has time on the X-axis. Times shown are to the
+scale printed, i.e. a certain about of time for each character width.  The
+Y-axis shows threads, each thread's execution is shown on one line.  That
+line shows "[" at the position in time when it executes.
+
+Following the "[" is the cpu number the task executed on, followed by zero
+or more "-" to make the width of the characters match the scaled execution
+time, followed by a "]".  If the scale is too small, the cpu number and
+mtask number will not be printed.  If the scale is very small, a "&"
+indicates multiple mtasks started at that time position.
+
+Also creates a value change dump (VCD) format dump file which may be viewed
+in a waveform viewer (e.g. C<GTKWave>).  See below.
+
+=head1 USAGE
+
+  Build with --prof-threads.
+
+  Run a sim with +verilator+prof+threads+window 2.
+
+  This will create profile_threads.dat.
+
+  Then run:
+
+  verilator_gantt profile_threads.dat
+
+  The report will be printed on standard output, this also generates
+  profile_threads.vcd
+
+  View profile_threads.vcd in a waveform viewer.
+
+=head1 VCD SIGNALS
+
+In waveforms there are the following signals. Most signals the "decimal"
+format will remove the leading zeros and make the traces easier to read.
+
+parallelism: The number of mtasks active at this time, for best performance
+this will match the thread count. You may want to use an "analog step"
+format to view this signal.
+
+cpu#_thread: For the given CPU number, the thread number executing.
+
+mtask#_cpu; For the given mtask id, the CPU it is executing on.
+
+thread#_mtask: For the given thread number, the mtask id executing.
+
+=head1 ARGUMENTS
+
+=over 4
+
+=item I<filename>
+
+The filename to read data from, defaults to "profile_threads.dat".
+
+=item --help
+
+Displays this message and program version and exits.
+
+=item --scale I<n>
+
+On the X-axis of the generated Gantt chart, each character represents this
+many time units. (On x86, time units are rdtsc ticks.)  Defaults to 0,
+which will automatically compute a reasonable scale where no two mtasks
+need to fit into same character width's worth of scaled time.
+
+=item --no-vcd
+
+=item --vcd I<filename>
+
+Set output filename for vcd dump, or disable. Default is
+verilator_gantt.vcd.
+
+=back
+
+=head1 DISTRIBUTION
+
+The latest version is available from L<https://verilator.org>.
+
+Copyright 2018-2020 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.
+
+=head1 AUTHORS
+
+Wilson Snyder <[email protected]>
+
+=head1 SEE ALSO
+
+C<verilator>
+
+=cut
+
+######################################################################
+### Local Variables:
+### compile-command: "$V4/bin/verilator_gantt $V4/test_regress/obj_vltmt/t_gantt/vlt_sim.log"
+### End:

bin/verilator_includer

@@ -1,9 +1,7 @@
-: # -*-Mode: perl;-*- use perl, wherever it is
-eval 'exec perl -wS $0 ${1+"$@"}'
-  if 0;
+#!/usr/bin/env perl
 # DESCRIPTION: Print include statements for each ARGV
 #
-# Copyright 2003-2017 by Wilson Snyder. This package is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. This package is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 ######################################################################
@@ -13,8 +11,8 @@ use warnings;
 print "// DESCR"."IPTION: Generated by verilator_includer via makefile\n";
 foreach my $param (@ARGV) {
     if ($param =~ /^-D([^=]+)=(.*)/) {
-	print "#define $1 $2\n"
+        print "#define $1 $2\n"
     } else {
-	print "#include \"$param\"\n"
+        print "#include \"$param\"\n"
     }
 }

bin/verilator_profcfunc

@@ -1,6 +1,4 @@
-: # -*-Mode: perl;-*- use perl, wherever it is
-eval 'exec perl -wS $0 ${1+"$@"}'
-  if 0;
+#!/usr/bin/env perl
 # See copyright, etc in below POD section.
 ######################################################################
 
@@ -11,7 +9,7 @@ use IO::File;
 use Pod::Usage;
 eval { use Data::Dumper;  $Data::Dumper::Indent = 1; }; # Debug, ok if missing
 use strict;
-use vars qw ($Debug);
+use vars qw($Debug);
 
 #======================================================================
 
@@ -23,12 +21,12 @@ $Debug = 0;
 my $Opt_File;
 autoflush STDOUT 1;
 autoflush STDERR 1;
-Getopt::Long::config ("no_auto_abbrev");
-if (! GetOptions (
-		  "help"	=> \&usage,
-		  "debug"	=> \&debug,
-		  "<>"		=> \&parameter,
-		  )) {
+Getopt::Long::config("no_auto_abbrev");
+if (! GetOptions(
+          "help"        => \&usage,
+          "debug"       => \&debug,
+          "<>"          => \&parameter,
+    )) {
     die "%Error: Bad usage, try 'verilator_profcfunc --help'\n";
 }
 
@@ -39,8 +37,8 @@ profcfunc($Opt_File);
 #----------------------------------------------------------------------
 
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
-    exit (1);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
+    exit(1);  # Unreachable
 }
 
 sub debug {
@@ -50,9 +48,9 @@ sub debug {
 sub parameter {
     my $param = shift;
     if (!defined $Opt_File) {
-	$Opt_File = $param;
+        $Opt_File = $param;
     } else {
-	die "%Error: Unknown parameter: $param\n";
+        die "%Error: Unknown parameter: $param\n";
     }
 }
 
@@ -66,13 +64,21 @@ sub profcfunc {
     my %funcs;
 
     while (defined (my $line=$fh->getline())) {
-	#                  %time      cumesec   selfsec     calls     {stuff}   name
-	if ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$/) {
-	    my $pct=$1; my $sec=$2; my $calls=$3; my $func=$4;
-	    $funcs{$func}{pct} += $pct;
-	    $funcs{$func}{sec} += $sec;
-	    $funcs{$func}{calls} += $calls;
-	}
+        #                  %time      cumesec   selfsec     calls     {stuff}   name
+        if ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$/) {
+            my $pct=$1; my $sec=$2; my $calls=$3; my $func=$4;
+            $funcs{$func}{pct} += $pct;
+            $funcs{$func}{sec} += $sec;
+            $funcs{$func}{calls} += $calls;
+        }
+        # Older gprofs have no call column for single-call functions
+        #                  %time      cumesec   selfsec      {stuff}   name
+        elsif ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$/) {
+            my $pct=$1; my $sec=$2; my $calls=1; my $func=$3;
+            $funcs{$func}{pct} += $pct;
+            $funcs{$func}{sec} += $sec;
+            $funcs{$func}{calls} += $calls;
+        }
     }
     $fh->close;
 
@@ -80,10 +86,10 @@ sub profcfunc {
     my %pointer_mods;
     my %verilated_mods;
     foreach my $func (keys %funcs) {
-	if ($func =~ /(.*)::_eval\(([a-zA-Z_0-9]+__Syms).*\)$/) {
-	    $verilated_mods{$1} = qr/^$1/;
-	    $pointer_mods{$2} = $1;
-	}
+        if ($func =~ /(.*)::_eval\(([a-zA-Z_0-9]+__Syms).*\)$/) {
+            $verilated_mods{$1} = qr/^$1/;
+            $pointer_mods{$2} = $1;
+        }
     }
     #print Dumper(\%pointer_mods, \%verilated_mods);
 
@@ -91,72 +97,72 @@ sub profcfunc {
     my %vfuncs;
     my %groups;
     foreach my $func (keys %funcs) {
-	my $pct = $funcs{$func}{pct};
-	my $vfunc = $func;
-	my $design;
+        my $pct = $funcs{$func}{pct};
+        my $vfunc = $func;
+        my $design;
 
-	if ($func =~ /\(([a-zA-Z_0-9]+__Syms)/) {
-	    $design = $pointer_mods{$1};
-	}
+        if ($func =~ /\(([a-zA-Z_0-9]+__Syms)/) {
+            $design = $pointer_mods{$1};
+        }
 
-	foreach my $vde (keys %verilated_mods) {
-	    last if $design;
-	    if ($func =~ /$verilated_mods{$vde}/) {
-		$design=$vde;
-		last;
-	    }
-	}
+        foreach my $vde (keys %verilated_mods) {
+            last if $design;
+            if ($func =~ /$verilated_mods{$vde}/) {
+                $design=$vde;
+                last;
+            }
+        }
 
-	if ($vfunc =~ /__PROF__([a-zA-Z_0-9]+)__l?([0-9]+)\(/) {
-	    $vfunc     = sprintf("VBlock    %s:%d", $1, $2);
-	    $groups{type}{"Verilog Blocks under $design"} += $pct;
-	    $groups{design}{$design} += $pct;
-	    $groups{module}{$1} += $pct;
-	} else {
-	    if ($design) {
-		$vfunc = sprintf("VCommon   %s", $func);
-		$groups{type}{"Common code under $design"} += $pct;
-		$groups{design}{$design} += $pct;
-		$groups{module}{$design." common code"} += $pct;
-	    } elsif ($func =~ /^VL_[A-Z0-9_]+/
-		     || $func =~ /^_?vl_[a-zA-Z0-9_]+/
-		     || $func =~ /^verilated/i) {
-		$vfunc = sprintf("VLib      %s", $func);
-		$groups{type}{'VLib'} += $pct;
-		$groups{design}{'VLib'} += $pct;
-		$groups{module}{'VLib'} += $pct;
-	    } elsif ($func =~ /^_mcount_private/) {
-		$vfunc = sprintf("Prof      %s", $func);
-		$groups{type}{'Prof'} += $pct;
-		$groups{design}{'Prof'} += $pct;
-		$groups{module}{'Prof'} += $pct;
-	    } else {
-		$vfunc = sprintf("C++       %s", $func);
-		$groups{type}{'C++'} += $pct;
-		$groups{design}{'C++'} += $pct;
-		$groups{module}{'C++'} += $pct;
-	    }
-	}
-	$vfuncs{$vfunc} = $funcs{$func};
+        if ($vfunc =~ /__PROF__([a-zA-Z_0-9]+)__l?([0-9]+)\(/) {
+            $vfunc     = sprintf("VBlock    %s:%d", $1, $2);
+            $groups{type}{"Verilog Blocks under $design"} += $pct;
+            $groups{design}{$design} += $pct;
+            $groups{module}{$1} += $pct;
+        } else {
+            if ($design) {
+                $vfunc = sprintf("VCommon   %s", $func);
+                $groups{type}{"Common code under $design"} += $pct;
+                $groups{design}{$design} += $pct;
+                $groups{module}{$design." common code"} += $pct;
+            } elsif ($func =~ /^VL_[A-Z0-9_]+/
+                     || $func =~ /^_?vl_[a-zA-Z0-9_]+/
+                     || $func =~ /^verilated/i) {
+                $vfunc = sprintf("VLib      %s", $func);
+                $groups{type}{'VLib'} += $pct;
+                $groups{design}{'VLib'} += $pct;
+                $groups{module}{'VLib'} += $pct;
+            } elsif ($func =~ /^_mcount_private/) {
+                $vfunc = sprintf("Prof      %s", $func);
+                $groups{type}{'Prof'} += $pct;
+                $groups{design}{'Prof'} += $pct;
+                $groups{module}{'Prof'} += $pct;
+            } else {
+                $vfunc = sprintf("C++       %s", $func);
+                $groups{type}{'C++'} += $pct;
+                $groups{design}{'C++'} += $pct;
+                $groups{module}{'C++'} += $pct;
+            }
+        }
+        $vfuncs{$vfunc} = $funcs{$func};
     }
 
 
     foreach my $type (qw(type design module)) {
-	my $missing = 100;
-	foreach (sort (keys %{$groups{$type}})) {
-	    $missing -= $groups{$type}{$_};
-	}
-	if ($missing) {
-	    $groups{$type}{"\377Unaccounted for/rounding error"} = $missing;
-	}
+        my $missing = 100;
+        foreach (sort (keys %{$groups{$type}})) {
+            $missing -= $groups{$type}{$_};
+        }
+        if ($missing) {
+            $groups{$type}{"\377Unaccounted for/rounding error"} = $missing;
+        }
 
-	print("Overall summary by $type:\n");
-	printf("  %-6s  %s\n","% time",$type);
-	foreach my $what (sort (keys %{$groups{$type}})) {
-	    (my $pwhat = $what) =~ s/^\377//;  # Just used to establish sort order
-	    printf("  %6.2f  %s\n", $groups{$type}{$what}, $pwhat);
-	}
-	print("\n");
+        print("Overall summary by $type:\n");
+        printf("  %-6s  %s\n","% time",$type);
+        foreach my $what (sort (keys %{$groups{$type}})) {
+            (my $pwhat = $what) =~ s/^\377//;  # Just used to establish sort order
+            printf("  %6.2f  %s\n", $groups{$type}{$what}, $pwhat);
+        }
+        print("\n");
     }
 
     print("Verilog code profile:\n");
@@ -173,14 +179,14 @@ sub profcfunc {
 
     my $cume = 0;
     foreach my $func (sort {$vfuncs{$b}{sec} <=> $vfuncs{$a}{sec}
-			    || $a cmp $b}
-		      (keys %vfuncs)) {
-	$cume += $vfuncs{$func}{sec};
-	printf +("%6.2f %9.2f %8.2f %8d   %s\n",
-		 $vfuncs{$func}{pct},
-		 $cume, $vfuncs{$func}{sec},
-		 $vfuncs{$func}{calls},
-		 $func);
+                            || $a cmp $b}
+                      (keys %vfuncs)) {
+        $cume += $vfuncs{$func}{sec};
+        printf +("%6.2f %9.2f %8.2f %8d   %s\n",
+                 $vfuncs{$func}{pct},
+                 $cume, $vfuncs{$func}{sec},
+                 $vfuncs{$func}{calls},
+                 $func);
     }
 }
 
@@ -191,11 +197,11 @@ __END__
 
 =head1 NAME
 
-verilator_profcfunc - Read gprof report created with --profile-cfuncs
+verilator_profcfunc - Read gprof report created with --prof-cfuncs
 
 =head1 SYNOPSIS
 
-  verilator --profile-cfuncs ....
+  verilator --prof-cfuncs ....
   gcc --ggdb -pg ....
   {run executable}
   gprof
@@ -204,8 +210,8 @@ verilator_profcfunc - Read gprof report created with --profile-cfuncs
 =head1 DESCRIPTION
 
 Verilator_profcfunc reads a profile report created by gprof.  The names of
-the functions are then transformed, assuming the user used verilator's
---profile-cfuncs, and a report printed showing the percentage of time, etc,
+the functions are then transformed, assuming the user used Verilator's
+--prof-cfuncs, and a report printed showing the percentage of time, etc,
 in each Verilog block.
 
 =head1 ARGUMENTS
@@ -220,9 +226,9 @@ Displays this message and program version and exits.
 
 =head1 DISTRIBUTION
 
-The latest version is available from L<http://www.veripool.org/>.
+The latest version is available from L<https://verilator.org>.
 
-Copyright 2007-2017 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2007-2020 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

ci/build_vcddiff.sh

@@ -0,0 +1,18 @@
+#!/bin/bash
+# DESCRIPTION: Verilator: Build script for vcddiff
+#
+# Copyright 2019 by Todd Strader. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+set -e
+
+# NB: it would be better to add this via a PPA
+
+TMP_DIR=$(mktemp -d)
+
+git -C "${TMP_DIR}" clone https://github.com/veripool/vcddiff
+VCDDIFF_DIR=${TMP_DIR}/vcddiff
+git -C "${VCDDIFF_DIR}" checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c
+make -C "${VCDDIFF_DIR}"
+sudo cp "${VCDDIFF_DIR}/vcddiff" /usr/local/bin

ci/build_verilator.sh

@@ -0,0 +1,64 @@
+#!/bin/bash
+# DESCRIPTION: Verilator: Travis CI build script
+#
+# Copyright 2019 by Todd Strader. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# This script builds and caches the Verilator binaries for Travis CI
+# (and possibly other CI platforms).  The Verilator CI system uses this
+# script, but other CI systems that depend on Verilator may also use
+# the script.
+# see: https://github.com/verilator/verilator_ext_tests/blob/master/.travis.yml
+# To use this script, either checkout Verilator as part of the CI build
+# process or add Verilator as a Git submodule.  Verilator tarballs can
+# not be used as the script relies on Git revisions for caching.
+set -e
+
+if [ -z "${VERILATOR_NUM_JOBS}" ]; then
+    VERILATOR_NUM_JOBS=$(nproc)
+fi
+
+# Caching would be simpler if we installed without VERILATOR_ROOT, but
+#   it's needed for driver.pl outside of the repo
+if [ -z "${VERILATOR_ROOT}" ]; then
+    echo "VERILATOR_ROOT not set"
+    exit -1
+fi
+
+if [ -z "${VERILATOR_CACHE}" ]; then
+    echo "VERILATOR_CACHE not set"
+    exit -1
+fi
+
+VERILATOR_REV=$(cd "${VERILATOR_ROOT}" && git rev-parse HEAD)
+echo "Found Verilator rev ${VERILATOR_REV}"
+
+CACHED_REV_FILE=${VERILATOR_CACHE}/.rev.txt
+
+if [[ ! -f "${CACHED_REV_FILE}" || \
+      $(< "${CACHED_REV_FILE}") != "${VERILATOR_REV}" ]]; then
+    echo "Building Verilator"
+
+    # Unsure why Travis monkies with the capitalization of the stage name, but it does
+    if [[ -n ${TRAVIS_BUILD_STAGE_NAME} && \
+         ${TRAVIS_BUILD_STAGE_NAME} != "Build verilator" ]]; then
+      echo "WARNING: Building Verilator in Travis build stage other than \"Build verilator\": ${TRAVIS_BUILD_STAGE_NAME}"
+    fi
+
+    cd "${VERILATOR_ROOT}"
+    autoconf && ./configure ${VERILATOR_CONFIG_FLAGS} && make -j ${VERILATOR_NUM_JOBS}
+    # Copy the Verilator build artifacts
+    mkdir -p "${VERILATOR_CACHE}"
+    rm -rf ${VERILATOR_CACHE}/*
+    cp bin/*bin* "${VERILATOR_CACHE}"
+    # Remember the Git revision
+    echo "${VERILATOR_REV}" > "${CACHED_REV_FILE}"
+else
+    echo "Using cached Verilator"
+    cd "${VERILATOR_ROOT}"
+    # Create include/verilated_config.h and maybe other things
+    autoconf && ./configure ${VERILATOR_CONFIG_FLAGS}
+    cp ${VERILATOR_CACHE}/* bin
+fi

ci/docker/buildenv/Dockerfile

@@ -0,0 +1,57 @@
+# DESCRIPTION: Dockerfile for env to build and fully test Verilator
+#
+# Copyright 2020 by Stefan Wallentowitz. This program is free
+# software; you can redistribute it and/or modify it under the terms
+# of either the GNU Lesser General Public License Version 3 or the
+# Perl Artistic License Version 2.0.
+
+FROM ubuntu:18.04
+
+RUN apt-get update \
+    && DEBIAN_FRONTEND=noninteractive \
+       apt-get install --no-install-recommends -y \
+                        autoconf=2.69-11 \
+                        bc=1.07.1-2 \
+                        bison=2:3.0.4.dfsg-1build1 \
+                        build-essential=12.4ubuntu1 \
+                        ca-certificates=20180409 \
+                        cmake=3.10.2-1ubuntu2.18.04.1 \
+                        flex=2.6.4-6 \
+                        gdb=8.1-0ubuntu3.2 \
+                        gcc-6=6.5.0-2ubuntu1~18.04 \
+                        gcc-5=5.5.0-12ubuntu1 \
+                        gcc-4.8=4.8.5-4ubuntu8 \
+                        git=1:2.17.1-1ubuntu0.5 \
+                        gtkwave=3.3.86-1 \
+                        g++-6=6.5.0-2ubuntu1~18.04 \
+                        g++-5=5.5.0-12ubuntu1 \
+                        g++-4.8=4.8.5-4ubuntu8 \
+                        libfl2=2.6.4-6 \
+                        libfl-dev=2.6.4-6 \
+                        numactl=2.0.11-2.1ubuntu0.1 \
+                        perl=5.26.1-6ubuntu0.3 \
+                        python3=3.6.7-1~18.04 \
+                        wget=1.19.4-1ubuntu2.2 \
+                        zlibc=0.9k-4.3 \
+                        zlib1g=1:1.2.11.dfsg-0ubuntu2 \
+                        zlib1g-dev=1:1.2.11.dfsg-0ubuntu2 \
+    && apt-get clean \
+    && rm -rf /var/lib/apt/lists/*
+
+WORKDIR /tmp
+
+COPY build-systemc.sh /tmp/
+RUN ./build-systemc.sh
+
+RUN cpan install -fi Unix::Processors Parallel::Forker Bit::Vector
+
+RUN git clone https://github.com/veripool/vcddiff.git && \
+    make -C vcddiff && \
+    cp -p vcddiff/vcddiff /usr/local/bin/vcddiff && \
+    rm -rf vcddiff
+
+COPY build.sh /tmp/build.sh
+
+ENV VERILATOR_AUTHOR_SITE=1
+
+ENTRYPOINT [ "/tmp/build.sh" ]

ci/docker/buildenv/README.adoc

@@ -0,0 +1,50 @@
+= Verilator Build Environment
+
+This container is set up to compile and test a Verilator build based
+on the following parameters:
+
+* Source repository (default: https://github.com/verilator/verilator)
+* Source revision (default: master)
+* GCC version (4.8.5, 5.5.0, 6.5.0, 7.4.0, default: 7.4.0)
+
+The container is published as `verilator/verilator-buildenv` on
+https://hub.docker.com/repository/docker/verilator/verilator-buildenv[docker hub].
+
+To run the basic build of current master:
+
+    docker run -ti verilator/verilator-buildenv
+
+To also run tests:
+
+    docker run -ti verilator/verilator-buildenv test
+
+Change the compiler:
+
+    docker run -ti -e CC=gcc-4.8 -e CXX=g++-4.8 verilator/verilator-buildenv test
+
+The tests that involve gdb are not working due to security restrictions.
+To run those too:
+
+....
+docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` -e CC=gcc-4.8 -e CXX=g++-4.8 --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
+....
+
+You may want to avoid pushing your changes to a remote repository and
+instead use a local working copy. You can mount the local working copy
+path as a volume and use this as repo. Be careful, that it can only
+use committed changes, so you may want to use a work-in-progress
+commit or so. To build the current HEAD from top of a repository:
+
+....
+docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
+....
+
+== Under the Hood
+
+To rebuild the image, simply run:
+
+    docker build .
+
+It will build SystemC in all supported compiler variants to reduce the
+impact on testing cycles. A build script will be the entrypoint to the
+container that will perform a standard build and test procedure.

ci/docker/buildenv/build-systemc.sh

@@ -0,0 +1,29 @@
+#!/bin/bash -e
+# DESCRIPTION: Build SystemC in Ubuntu 18.04 with  different g++/gcc
+#
+# Copyright 2020 by Stefan Wallentowitz. This program is free
+# software; you can redistribute it and/or modify it under the terms
+# of either the GNU Lesser General Public License Version 3 or the
+# Perl Artistic License Version 2.0.
+
+build_variant () {
+    version=$($1 --version | grep gcc | awk '{print $4}')
+    mkdir "/usr/local/systemc-2.3.3-gcc$version"
+    mkdir build
+    cd build
+    ../configure --prefix="/usr/local/systemc-2.3.3-gcc$version" CC="$1" CXX="$2" LD="$2"
+    make -j
+    make install
+    cd ..
+    rm -r build
+}
+
+wget https://www.accellera.org/images/downloads/standards/systemc/systemc-2.3.3.tar.gz
+tar -xzf systemc-2.3.3.tar.gz
+cd systemc-2.3.3
+build_variant gcc g++
+build_variant gcc-6 g++-6
+build_variant gcc-5 g++-5
+build_variant gcc-4.8 g++-4.8
+cd ..
+rm -r systemc-2.3.3*

ci/docker/buildenv/build.sh

@@ -0,0 +1,30 @@
+#!/bin/bash -e
+# DESCRIPTION: Build Verilator (inside container)
+#
+# Copyright 2020 by Stefan Wallentowitz. This program is free
+# software; you can redistribute it and/or modify it under the terms
+# of either the GNU Lesser General Public License Version 3 or the
+# Perl Artistic License Version 2.0.
+
+: "${REPO:=https://github.com/verilator/verilator}"
+: "${REV:=master}"
+: "${CC:=gcc}"
+: "${CXX:=g++}"
+
+GCCVERSION=$(${CC} --version | grep gcc | awk '{print $4}')
+
+export SYSTEMC_INCLUDE="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/include"
+export SYSTEMC_LIBDIR="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/lib-linux64"
+export LD_LIBRARY_PATH=${SYSTEMC_LIBDIR}
+
+SRCS=$PWD/verilator
+
+git clone "$REPO" "$SRCS"
+cd "$SRCS"
+git checkout "$REV"
+autoconf
+./configure --enable-longtests
+make -j $(nproc)
+if [ "${1:-''}" == "test" ]; then
+    make test
+fi

ci/docker/run/Dockerfile

@@ -0,0 +1,47 @@
+# DESCRIPTION: Dockerfile for image to run Verilator inside
+#
+# Copyright 2020 by Stefan Wallentowitz. This program is free
+# software; you can redistribute it and/or modify it under the terms
+# of either the GNU Lesser General Public License Version 3 or the
+# Perl Artistic License Version 2.0.
+
+FROM ubuntu:18.04
+
+RUN apt-get update \
+    && apt-get install --no-install-recommends -y \
+                        autoconf=2.69-11 \
+                        bc=1.07.1-2 \
+                        bison=2:3.0.4.dfsg-1build1 \
+                        build-essential=12.4ubuntu1 \
+                        ca-certificates=20180409 \
+                        flex=2.6.4-6 \
+                        git=1:2.17.1-1ubuntu0.5 \
+                        libfl-dev=2.6.4-6 \
+                        perl=5.26.1-6ubuntu0.3 \
+                        python3=3.6.7-1~18.04 \
+    && apt-get clean \
+    && rm -rf /var/lib/apt/lists/*
+
+ARG REPO=https://github.com/verilator/verilator
+ARG SOURCE_COMMIT=master
+
+WORKDIR /tmp
+
+# Add an exception for the linter, we want to cd here in one layer
+# to reduce the number of layers (and thereby size).
+# hadolint ignore=DL3003
+RUN git clone "${REPO}" verilator && \
+    cd verilator && \
+    git checkout "${SOURCE_COMMIT}" && \
+    autoconf && \
+    ./configure && \
+    make -j "$(nproc)" && \
+    make install && \
+    cd .. && \
+    rm -r verilator
+
+COPY verilator-wrap.sh /usr/local/bin/verilator-wrap.sh
+
+WORKDIR /work
+
+ENTRYPOINT [ "/usr/local/bin/verilator-wrap.sh" ]

ci/docker/run/README.adoc

@@ -0,0 +1,49 @@
+= Docker Container as Verilator executable
+
+This allows you to run Verilator easily as a docker image, e.g.:
+
+    docker run -ti verilator/verilator:latest --version
+
+This is in particular useful to compare against older version or to
+check when an issue was introduced.
+
+You will need to give it access to your files as a volume and fix the
+user rights:
+
+....
+docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:latest --cc test.v
+....
+
+The caveat is that it can only access files below the current
+directory then, a workaround is to adopt the volume and set
+`-workdir`.
+
+There is a convenience script in this folder that wraps around the
+docker calls:
+
+    $ verilator-docker 3.922 --version
+    Verilator 3.922 2018-03-17 rev UNKNOWN_REV
+
+Finally, you can also work in the container by setting the entrypoint
+(don't forget to mount a volume if you want your work persistent):
+
+    docker run -ti --entrypoint /bin/bash verilator/verilator:latest
+
+The other files in this folder all for building the containers and to
+store in them. You could use it to build Verilator at a specific
+commit:
+
+    docker build --build-arg SOURCE_COMMIT=<commit> .
+
+== Internals
+
+The Dockerfile is pretty straight-forward, it builds Verilator and
+removes the tree after that to reduce the image size. It sets a
+wrapper script (`verilator-wrap.sh`) as entrypoint. This script calls
+Verilator but also copies the verilated runtime files to the `obj_dir`
+or the `-Mdir` respectively. This allows the user to build the C++
+output with the matching runtime files. The wrapper patches the
+generated Makefile accordingly.
+
+There is also a hook defined that is run by docker hub via automated
+builds.

ci/docker/run/hooks/build

@@ -0,0 +1,9 @@
+#!/bin/bash
+# DESCRIPTION: Docker hub hook to pass SOURCE_COMMIT
+#
+# Copyright 2020 by Stefan Wallentowitz. This program is free
+# software; you can redistribute it and/or modify it under the terms
+# of either the GNU Lesser General Public License Version 3 or the
+# Perl Artistic License Version 2.0.FROM ubuntu:18.04
+
+docker build --build-arg SOURCE_COMMIT=${SOURCE_COMMIT} -f $DOCKERFILE_PATH -t $IMAGE_NAME .

ci/docker/run/verilator-docker

@@ -0,0 +1,10 @@
+#!/bin/bash
+# DESCRIPTION: Wrap a verilator call to run a docker container
+#
+# Copyright 2020 by Stefan Wallentowitz. This program is free
+# software; you can redistribute it and/or modify it under the terms
+# of either the GNU Lesser General Public License Version 3 or the
+# Perl Artistic License Version 2.0.
+
+docker pull verilator/verilator:$1 >/dev/null
+docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:$1 "${@:2}"

ci/docker/run/verilator-wrap.sh

@@ -0,0 +1,26 @@
+#!/bin/bash -e
+# DESCRIPTION: Wrap a Verilator call and copy vlt includes
+#              (inside docker container)
+#
+# Copyright 2020 by Stefan Wallentowitz. This program is free
+# software; you can redistribute it and/or modify it under the terms
+# of either the GNU Lesser General Public License Version 3 or the
+# Perl Artistic License Version 2.0.
+
+perl /usr/local/bin/verilator "$@"
+
+# Check if user set an obj_dir
+obj_dir=$(echo " $@" | grep -oP '\s--Mdir\s*\K\S+')
+if [ "$obj_dir" == "" ]; then
+    obj_dir="obj_dir"
+fi
+
+# If the run was successful: Copy required files to allow build without this container
+if [ -e ${obj_dir} ]; then
+    # Copy files required for the build
+    mkdir -p ${obj_dir}/vlt
+    cp -r /usr/local/share/verilator/bin ${obj_dir}/vlt
+    cp -r /usr/local/share/verilator/include ${obj_dir}/vlt
+    # Point Makefile to that folder
+    perl -i -pe 's/VERILATOR_ROOT = \/usr\/local\/share\/verilator/VERILATOR_ROOT = vlt/g' ${obj_dir}/*.mk
+fi

ci/test.sh

@@ -0,0 +1,26 @@
+#!/bin/bash
+# DESCRIPTION: Verilator: Travis CI test script
+#
+# Copyright 2019 by Todd Strader. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+set -e
+
+export DRIVER_FLAGS='-j 0 --quiet --rerun'
+
+case $1 in
+    dist)
+        make -C test_regress SCENARIOS=--dist
+        ;;
+    vlt)
+        make -C test_regress SCENARIOS=--vlt
+        ;;
+    vltmt)
+        make -C test_regress SCENARIOS=--vltmt
+        ;;
+    *)
+    echo "Usage: test.sh (dist|vlt|vltmt)"
+    exit -1
+    ;;
+esac

configure.ac

@@ -1,19 +1,30 @@
 # DESCRIPTION: Process this file with autoconf to produce a configure script.
 #
-# Copyright 2003-2017 by Wilson Snyder. Verilator is free software; you can
+# Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[3.906 2017-06-22])
+AC_INIT([Verilator],[4.026 2020-01-11],
+        [https://verilator.org],
+        [verilator],[https://verilator.org])
 # When releasing, also update header of Changes file
+# and commit using "devel release" or "Version bump" message
 
 AC_CONFIG_HEADER(src/config_build.h)
-AC_CONFIG_FILES(Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc)
+AC_CONFIG_FILES(Makefile docs/Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc verilator-config.cmake verilator-config-version.cmake)
 
 AC_MSG_RESULT([configuring for $PACKAGE_STRING])
 
+# Ignore automake flags passed by Ubuntu builds
+AC_ARG_ENABLE([dependency-tracking],
+              [AS_HELP_STRING([--disable-dependency-tracking], [ignored])])
+AC_ARG_ENABLE([maintainer-mode],
+              [AS_HELP_STRING([--enable-maintainer-mode], [ignored])])
+AC_ARG_ENABLE([silent-rules],
+              [AS_HELP_STRING([--disable-silent-rules], [ignored])])
+
 # Special Substitutions - CFG_WITH_DEFENV
 AC_MSG_CHECKING(whether to use hardcoded paths)
 AC_ARG_ENABLE([defenv],
@@ -42,7 +53,7 @@ AC_ARG_ENABLE([ccwarn],
                 x)   CFG_WITH_CCWARN=no ;;
                 *)   CFG_WITH_CCWARN=yes ;;
                esac]
-	      )
+              )
 AC_SUBST(CFG_WITH_CCWARN)
 AC_MSG_RESULT($CFG_WITH_CCWARN)
 
@@ -60,15 +71,30 @@ AC_ARG_ENABLE([longtests],
                 x)   CFG_WITH_LONGTESTS=no ;;
                 *)   CFG_WITH_LONGTESTS=yes ;;
                esac]
-	      )
+              )
 AC_SUBST(CFG_WITH_LONGTESTS)
 AC_MSG_RESULT($CFG_WITH_LONGTESTS)
 
+# CFG_WITH_PREC11
+AC_MSG_CHECKING(whether allow pre-C++11)
+AC_ARG_ENABLE([prec11],
+              [AS_HELP_STRING([--enable-prec11],
+                              [enable pre-C++11 compilers])],
+              [case "${enableval}" in
+                yes) CFG_WITH_PREC11=yes ;;
+                no)  CFG_WITH_PREC11=no ;;
+                *)   AC_MSG_ERROR([bad value ${enableval} for --enable-prec11]) ;;
+               esac],
+              [CFG_WITH_PREC11=no;]
+              )
+AC_SUBST(CFG_WITH_PREC11)
+AC_MSG_RESULT($CFG_WITH_PREC11)
+
 # Compiler flags
-CFLAGS=-I${includedir}
-CPPFLAGS=-I${includedir}
-CXXFLAGS=-I${includedir}
-LDFLAGS=-L${libdir}
+CFLAGS+=" -I${includedir}"
+CPPFLAGS+=" -I${includedir}"
+CXXFLAGS+=" -I${includedir}"
+LDFLAGS+=" -L${libdir}"
 
 # Checks for programs.
 AC_PROG_CC
@@ -76,12 +102,14 @@ AC_PROG_CXX
 AC_PROG_INSTALL
 
 AC_LANG_PUSH(C++)
+cxx_version=$($CXX --version | head -1)
+AC_MSG_RESULT([compiler is $CXX --version = $cxx_version])
 AC_MSG_CHECKING([that C++ compiler can compile simple program])
 AC_RUN_IFELSE(
-           [AC_LANG_SOURCE([int main() { return 0; }])],
-           AC_MSG_RESULT(yes),
-           AC_MSG_RESULT(no);AC_MSG_ERROR([a working C++ compiler is required]),
-	   AC_MSG_RESULT(yes))
+   [AC_LANG_SOURCE([int main() { return 0; }])],
+    AC_MSG_RESULT(yes),
+    AC_MSG_RESULT(no);AC_MSG_ERROR([a working C++ compiler is required]),
+    AC_MSG_RESULT(yes))
 
 AC_PATH_PROG(PERL,perl)
 if test "x$PERL" = "x" ; then
@@ -105,72 +133,220 @@ AC_TYPE_SIZE_T
 # Checks for compiler characteristics.
 AC_C_INLINE
 
-AC_DEFUN([_MY_CXX_CHECK_OPT],
-   [# _MY_CXX_CHECK_OPT(flag) -- Check if compiler supports specific options
+AC_LINK_IFELSE(
+     [AC_LANG_PROGRAM([#include <new>], [[int* a=new int; delete a; ]])],
+     [], [AC_MSG_ERROR([$CXX does not seem to successfully compile a simple C++ program])])
+
+AC_DEFUN([_MY_CXX_CHECK_FLAG],
+   [# _MY_CXX_CHECK_FLAG(flag) -- Check if compiler supports specific options
+    # Set $_my_result appropriately
     ACO_SAVE_CXXFLAGS="$CXXFLAGS"
     # -Werror needed otherwise unknown -Wno-div-by-zero won't report problems
-    CXXFLAGS="$CXXFLAGS $2 -Werror"
-    AC_MSG_CHECKING([whether $CXX accepts $2])
-    AC_COMPILE_IFELSE(
-         [AC_LANG_PROGRAM([],[])],
-	 [_my_result=yes
-	  if test -s conftest.err; then
-	    if grep -e "$2" conftest.err >/dev/null; then
-	      _my_result=no
-	    fi
-	  fi],
-	 [_my_result=no])
+    # new/delete is needed to find -faligned-new link problem on Darwin
+    CXXFLAGS="$CXXFLAGS $1 -Werror"
+    AC_MSG_CHECKING([whether $CXX accepts $1])
+    AC_LINK_IFELSE(
+         [AC_LANG_PROGRAM([#include <new>], [[int* a=new int; delete a; ]])],
+         [_my_result=yes
+          if test -s conftest.err; then
+            if grep -e "$1" conftest.err >/dev/null; then
+              _my_result=no
+            fi
+          fi],
+         [_my_result=no])
     # GCC is annoying, trying to be helpful, it postpones unknown -Wno-
     # options if there's no error We want to see them regardless, so try
     # forcing an error and see if we get a gcc warning
     AC_COMPILE_IFELSE(
          [AC_LANG_PROGRAM([[an_error "intentional-error-for-test.h"
-	                  ]],[])],
+                          ]],[])],
          [], # Ignore ok exit
          [if test -s conftest.err; then
-            if grep -e "$2" conftest.err >/dev/null; then
+            if grep -e "$1" conftest.err >/dev/null; then
               _my_result=no
             fi
           fi])
     AC_MSG_RESULT($_my_result)
+    CXXFLAGS="$ACO_SAVE_CXXFLAGS"
+   ])
+
+AC_DEFUN([_MY_CXX_CHECK_SET],
+   [# _MY_CXX_CHECK_SET(variable,flag) -- Check if compiler supports specific options
+    # If it does, set variable to flag, only if not previously set
+    if test "$$1" = ""; then
+       _MY_CXX_CHECK_FLAG($2)
+       if test "$_my_result" = "yes" ; then
+          $1="$2"
+       fi
+    fi
+   ])
+
+AC_DEFUN([_MY_CXX_CHECK_OPT],
+   [# _MY_CXX_CHECK_OPT(flag) -- Check if compiler supports specific options
+    # If it does, append flag to variable
+    _MY_CXX_CHECK_FLAG($2)
     if test "$_my_result" = "yes" ; then
        $1="$$1 $2"
     fi
-    CXXFLAGS="$ACO_SAVE_CXXFLAGS"
-   ])# _MY_CXX_CHECK_OPT
+   ])
 
-# Flags for compiling Verilator internals including parser
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-unused-parameter)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-char-subscripts)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-undefined-bool-conversion)
+AC_DEFUN([_MY_LDLIBS_CHECK_FLAG],
+   [# _MY_LDLIBS_CHECK_FLAG(flag) -- Check if linker supports specific options
+    # Set $_my_result appropriately
+    ACO_SAVE_LIBS="$LIBS"
+    LIBS="$LIBS $1"
+    AC_MSG_CHECKING([whether $CXX linker accepts $1])
+    AC_LINK_IFELSE(
+         [AC_LANG_PROGRAM([[]])],
+         [_my_result=yes
+          if test -s conftest.err; then
+            if grep -e "$1" conftest.err >/dev/null; then
+              _my_result=no
+            fi
+          fi],
+         [_my_result=no])
+    AC_MSG_RESULT($_my_result)
+    LIBS="$ACO_SAVE_LIBS"
+   ])
+
+AC_DEFUN([_MY_LDLIBS_CHECK_OPT],
+   [# _MY_LDLIBS_CHECK_OPT(flag) -- Check if linker supports specific options
+    # If it does, append flag to variable
+    _MY_LDLIBS_CHECK_FLAG($2)
+    if test "$_my_result" = "yes" ; then
+       $1="$$1 $2"
+    fi
+   ])
+
+# Flag to select newest language standard supported
+# Macros work such that first option that passes is the one we take
+# gnu++17 code is clean, but SystemC in 2018 doesn't link with it (bug1339)
+# gnu++14 is the newest that Verilator supports
+# std++03 is the oldest that Verilator supports
+#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++14)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++11)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++03)
+#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++14)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++11)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++03)
+AC_SUBST(CFG_CXXFLAGS_STD_NEWEST)
+# And likewise oldest standard (same list above, backwards)
+# This is used for internal testing
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=c++03)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=c++11)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=c++14)
+#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=std++17)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++03)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++11)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++14)
+#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_OLDEST,-std=gnu++17)
+AC_SUBST(CFG_CXXFLAGS_STD_OLDEST)
+
+# Flags for compiling Verilator internals including parser, and Verilated files
+# These turn on extra warnings and are only used with 'configure --enable-ccwarn'
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_WEXTRA,-Wextra)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_WEXTRA,-Wfloat-conversion)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_WEXTRA,-Wlogical-op)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_WEXTRA,-Wthread-safety)
+AC_SUBST(CFG_CXXFLAGS_WEXTRA)
+
+# Flags for compiling Verilator internals including parser always
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Qunused-arguments)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-fno-delete-null-pointer-checks)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-faligned-new)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-unused-parameter)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-undefined-bool-conversion)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-shadow)
 AC_SUBST(CFG_CXXFLAGS_SRC)
 
-# Flags for compiling Verilator parser
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_PARSER,-Wno-unused)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_PARSER,-Wno-parentheses-equality)
+# Flags for compiling Verilator parser always (in addition to above CFG_CXXFLAGS_SRC)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_PARSER,-Wno-char-subscripts)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_PARSER,-Wno-null-conversion)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_PARSER,-Wno-parentheses-equality)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_PARSER,-Wno-unused)
 AC_SUBST(CFG_CXXFLAGS_PARSER)
 
 # Flags for Verilated makefile
 # For example, -Wno-div-by-zero isn't in 4.1.2
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-char-subscripts)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-parentheses-equality)
 # Random code often does / 0.  Unfortunately VL_DIV_I(0,0) will warn
 # without this flag, even though there's a conditional to prevent the divide.
 # We still don't add no-div-by-zero as it throws message to stdout, though doesn't die.
 #_MY_CXX_CHECK_OPT(-Wno-div-by-zero)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-sign-compare)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-uninitialized)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-but-set-variable)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-parameter)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-variable)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-fbracket-depth=4096)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Qunused-arguments)
+# For some reason -faligned-new does not work under Travis w/ clang but the
+# configure test doesn't catch this either
+AS_IF([test "x$TRAVIS_COMPILER" != xclang], [_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-faligned-new)])
+CFG_CXX_FLAGS_CMAKE="-faligned-new"
+m4_foreach([cflag],[
+        [-fbracket-depth=4096],
+        [-fcf-protection=none],
+        [-mno-cet],
+        [-Qunused-arguments],
+        [-Wno-bool-operation],
+        [-Wno-parentheses-equality],
+        [-Wno-sign-compare],
+        [-Wno-uninitialized],
+        [-Wno-unused-but-set-variable],
+        [-Wno-unused-parameter],
+        [-Wno-unused-variable],
+        [-Wno-shadow]],[
+    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,cflag)
+    # CMake will test what flags work itself, so pass all flags through to it
+    CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE cflag"
+    ])
 AC_SUBST(CFG_CXXFLAGS_NO_UNUSED)
+AC_SUBST(CFG_CXX_FLAGS_CMAKE)
+
+# Find multithread linker flags
+m4_foreach([ldflag], [
+        [-mt],
+        [-pthread],
+        [-lpthread],
+        [-latomic]],[
+    _MY_LDLIBS_CHECK_OPT(CFG_LDLIBS_THREADS,ldflag)
+    # CMake will test what flags work itself, so pass all flags through to it
+    CFG_LDFLAGS_THREADS_CMAKE="$CFG_LDFLAGS_THREADS_CMAKE ldflag"
+    ])
+AC_SUBST(CFG_LDLIBS_THREADS)
+AC_SUBST(CFG_LDFLAGS_THREADS_CMAKE)
+
+# Set CFG_WITH_THREADED if can support threading
+AC_MSG_CHECKING(whether $CXX supports Verilated threads)
+ACO_SAVE_CXXFLAGS="$CXXFLAGS"
+CXXFLAGS="$CXXFLAGS $CFG_CXXFLAGS_STD_NEWEST $CFG_CXXFLAGS_NO_UNUSED"
+AC_LINK_IFELSE(
+     [AC_LANG_PROGRAM([#include <thread>], [[ ]])],
+     [_my_result=yes
+      if test -s conftest.err; then
+        if grep -e "$1" conftest.err >/dev/null; then
+          _my_result=no
+        fi
+      fi],
+     [_my_result=no])
+CFG_WITH_THREADED=$_my_result
+AC_SUBST(CFG_WITH_THREADED)
+AC_MSG_RESULT($CFG_WITH_THREADED)
+
+# Check compiler flag
+if test "$CFG_WITH_THREADED" = "no" ; then
+   if test "$CFG_WITH_PREC11" = "no" ; then
+      AC_MSG_NOTICE([[]])
+      AC_MSG_ERROR([[the $CXX compiler appears to not support C++11.
+
+Verilator plans to require a C++11 or newer compiler in a future release,
+unless sufficient people report problems. Therefore, if you do not have a
+C++11 compiler, please post a message to
+https://www.veripool.org/boards/3/topics/2580-Verilator-Requiring-C-11-compiler
+indicating your OS and when you think C++11 might be ok, and then rerun
+configure with the --enable-prec11 argument. Thanks.]])
+
+   fi
+fi
 
 # Checks for library functions.
+AC_CHECK_MEMBER([struct stat.st_mtim.tv_nsec],
+    [AC_DEFINE([HAVE_STAT_NSEC],[1],[Defined if struct stat has st_mtim.tv_nsec])],
+    [], [#include <sys/stat.h>])
 
 # Checks for system services
 

docs/.gitignore

@@ -0,0 +1,4 @@
+*.1
+*.html
+*.pdf
+Makefile

docs/CONTRIBUTING.adoc

@@ -0,0 +1,82 @@
+= How to contribute to Verilator
+
+Thanks for using Verilator!  We welcome your contributions in whatever form.
+
+This contributing document contains some suggestions that may make
+contributions flow more efficiently.
+
+==== Did you find a bug?
+
+* Please **Ensure the bug was not already reported** by searching
+  https://verilator.org/issues[Verilator Issues].
+
+* If you're unable to find an open issue addressing the problem,
+  https://verilator.org/issues/new[open a new issue].
+
+** Be sure to include a **code sample** or an **executable test case**
+   demonstrating the bug and expected behavior that is not occurring.
+
+** The ideal example works against other simulators, and is in the
+   test_regress/t test format, as described in
+   link:internals.adoc[docs/internals].
+
+==== Did you write a patch that fixes a bug?
+
+* Please https://verilator.org/issues/new[Open a new issue].
+
+* You may attach a patch to the issue, or (preferred) may request a GitHub
+  pull request.
+
+** Verilator uses Travis CI to provide continuous integration. You may
+   want to setup Travis CI on your GitHub branch to ensure your changes
+   keep the tests passing.  See link:internals.adoc[docs/internals].
+
+* Your source-code contributions must be certified as open source, under
+  the https://developercertificate.org/[Developer Certificate of
+  Origin]. On your first contribution, you must either:
+
+** Have your patch include the addition of your name to
+   link:CONTRIBUTORS[docs/CONTRIBUTORS] (preferred).
+
+** Use "git -s" as part of your commit. This adds a "signed-of-by"
+   attribute which will certify your contribution as described in the
+   https://github.com/wking/signed-off-by/blob/master/Documentation/SubmittingPatches[Signed-of-By
+   convention].
+
+** Email, or post in an issue a statement that you certify your
+   contributions.
+
+** In any of these cases your name will be added to
+   link:CONTRIBUTORS[docs/CONTRIBUTORS] and you are agreeing all future
+   contributions are also certified.
+
+** We occasionally accept contributions where people do not want their
+   name published. Please email us; you must still certify your
+   contribution using email.
+
+* Your test contributions are generally considered released into the public
+  domain, unless you request otherwise or put a GNU/Artistic license on
+  your test file.
+
+* Most important is we get your patch. If you'd like to clean up
+  indentation and related issues ahead of our feedback, that is
+  appreciated; please see the coding conventions in
+  link:internals.adoc[docs/internals].
+
+==== Do you have questions?
+
+* Please see FAQ section and rest of the
+  https://verilator.org/verilator_doc.html[Verilator manual],
+  or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
+
+* Ask any question in the
+  https://verilator.org/forum[Verilator forum].
+
+==== Code of Conduct
+
+* Our contributors and participants pledge to make participation in our
+  project and our community a positive experience for everyone.  We follow
+  the https://www.contributor-covenant.org/version/1/4/code-of-conduct.html[Contributor
+  Covenant version 1.4].
+
+Thanks!

docs/CONTRIBUTORS

@@ -0,0 +1,36 @@
+The contributors listed below have certified their Verilator contributions
+under the Developer Certificate of Origin
+(https://developercertificate.org/).
+
+Please see the Verilator manual for 200+ additional contributors. Thanks to
+all.
+
+Ahmed El-Mahmoudy
+Alex Chadwick
+Chris Randall
+Driss Hafdi
+Eric Rippey
+Garrett Smith
+Gianfranco Costamagna
+Howard Su
+Iztok Jeras
+Jeremy Bennett
+John Coiner
+Julien Margetts
+Kanad Kanhere
+Kevin Kiningham
+Kuba Ober
+Lukasz Dalek
+Maarten De Braekeleer
+Matthew Ballance
+Mike Popoloski
+Peter Monsson
+Patrick Stewart
+Philipp Wagner
+Richard Myers
+Sebastien Van Cauwenberghe
+Stefan Wallentowitz
+Todd Strader
+Wilson Snyder
+Yutetsu TAKATSUKASA
+Yves Mathieu

docs/Makefile.in

@@ -0,0 +1,54 @@
+#*****************************************************************************
+# DESCRIPTION: Verilator documentation: Makefile pre-configure version
+#
+# This file is part of Verilator.
+#
+# Code available from: https://verilator.org
+#
+#*****************************************************************************
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# Verilator is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+#****************************************************************************/
+#
+# This file is intended only to be called from the top-level Verilator Makefile.
+
+#### Start of system configuration section. ####
+
+ASCIIDOCTOR = asciidoctor
+DOXYGEN = doxygen
+
+#### End of system configuration section. ####
+######################################################################
+
+.SUFFIXES:
+
+default:
+	@echo "error: make not supported here, run 'make docs' from Verilator top-level"
+
+%.html: %.adoc
+	$(ASCIIDOCTOR) $< -n -o $@
+
+clean mostlyclean distclean maintainer-clean::
+	rm -f $(SCRIPTS) *.tmp
+	rm -f *.aux *.cp *.cps *.dvi *.fn *.fns *.ky *.kys *.log
+	rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs *.idx
+	rm -f *.ev *.evs *.ov *.ovs *.cv *.cvs *.ma *.mas
+	rm -f *.tex
+
+distclean maintainer-clean::
+	rm -f *.info* *.1 *.html *.pdf $(INFOS)
+	rm -f Makefile
+
+.PHONY: doxygen
+
+doxygen:
+	$(DOXYGEN) doxygen.config

docs/TODO

@@ -0,0 +1,119 @@
+// DESCRIPTION: Verilator: List of To Do issues.
+//
+// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+
+* Language support:
+** Fix ordering of each bit separately in a signal (mips)
+   assign b[3:0] = b[7:4];  assign b[7:4] = in;
+** Support UDP gate primitives/ cell libraries
+   (have code for combos - problem is sequential udps)
+** Function to eval combo logic after /*verilator public*/ functions [gwaters]
+** Support generated clocks (correctness)
+** Recursive functions
+** Verilog configuration files
+** Expression coverage (see notes)
+** Better tristate support
+** UVM
+
+* Long-term Features
+** Assertions
+** Tristate support
+
+* Configure/Make/Install
+** Distribute with flex/bison already expanded?
+   Flex library not needed.  Probably too difficult to be worth it.
+
+* Testing:
+** Capture all inputs into global "rerun it" file
+** Code to make wrapper that sets signals, so can do comparison checks
+** New random program generator
+** Better graph viewer with search and zoom
+** Port and test against opencores.org code
+** // verilator debug in code so can see only tree affecting those nodes
+
+* Usability:
+** Detect and pre-remove most UNOPTFLATs
+** Better reporting of unopt problems, including what lines of code
+** Report more errors (all of them?) before exiting [Eugene Weber]
+** Auto-create scons config files
+** Print version/etc message at runtime. (4.000?)
+   Include number of lines of code, percent comments, code complexity measurement
+   <-80chars------------------------------------------------------------------->
+   Verilator 3.600 - The fast free open-sourced simulator.  Copyright 2001-2013.
+   Verilated #### modules, #### instances, ##### sigs,
+         #### non-comment lines, ##### ops, ### KB model size
+
+* Lint:
+** CDCRSTLOGIC should allow filtering with paths
+   "waive CDCRSTLOGIC --from a.b.sig  --to a.c.sig --via OR"
+
+* Internal Code:
+** A Visitor class that understands how to traverse data types
+** V3Graph should be templated container type, taking in Vertex + Edge types
+** Instead of string, have an VEncodedString/VIdString which contains __DOT__ish
+   things, to reduce bugs.  Also add _20 trailing space to \ encoded names.
+
+* Runtime:
+** New evalulation loop   ~/src/verilator/notes/event_loop.txt (4.000?)
+** Remove all private internal functions from top level wrapper header, move
+   to new level
+** Completely standalone simulation
+    main() records arguments for $test$plusvars
+    instantiates top,
+    does tracing  (support $dump?)
+    calls top->simulateForever()
+    exits
+
+* Performance:
+** Latch optimizations
+** Constant propagation
+   Extra cleaning AND:  1 & ((VARREF >> 1) | ((&VARREF >> 1) & VARREF))
+   Extra shift (perhaps due to clean): if (1 & CAST (VARREF >> #))
+** Gated clock and latch conversion to flops.  [JeanPaul Vanitegem]
+   Could propagate the AND into pos/negedges and let domaining optimize.
+** Negedge reset
+   Switch to remove negedges that don't matter
+   Can't remove async resets from control flops (like in syncronizers)
+** If all references to array have a constant index, blow up into separate signals-per-index
+** Bit-multiply for faster bit swapping and a=b[1,3,2] random bit reorderings.
+** Move _last sets and all other combo logic inside master
+   if() that triggers on all possible sense items
+** Rewrite and combine V3Life, V3Subst
+   If block temp only ever set in one place to constant, propagate it
+     Used in t_mem for array delayed assignments
+   Replace variables if set later in same cfunc branch
+     See for example duplicate sets of _narrow in cycle 90/91 of t_select_plusloop
+** Same assignment on both if branches
+   "if (a) { ... b=2; } else { ... b=2;}" -> "b=2; if ..."
+   Careful though, as b could appear in the statement or multiple times in statement
+   (Could just require exatly two 'b's in statement)
+** Simplify XOR/XNOR/AND/OR bit selection trees
+   Foo = A[1] ^ A[2] ^ A[3] etc are better as ^ ( A & 32'b...1110 )
+** Combine variables into wider elements
+   Parallel statements on different bits should become single signal
+   Variables that are always consumed in "parallel" can be joined
+** Duplicate assignments in gate optimization
+   Common to have many separate posedge blocks, each with identical
+   reset_r <= rst_in
+** If signal is used only once (not counting trace), always gate substitute
+   Don't merge if any combining would form circ logic (out goes back to in)
+** Multiple assignments each bit can become single assign with concat
+   Make sure a SEL of a CONCAT can get the single bit back.
+** Usually blocks/values
+   Enable only after certain time, so VL_TIME_I(32) > 0x1e gets eliminated out
+** Better ordering of a<=b, b<=c, put all refs to 'b' next to each other to optimize caching
+** I-cache packing improvements (what/how?)
+** Data cache organization (order of vars in class)
+   First have clocks,
+   then bools instead of uint32_t's
+   then based on what sense list they come from, all outputs, then all inputs
+   finally have any signals part of a "usually" block, or constant.
+** Rather then tracking widths, have a MSB...LSB of this expression
+   (or better, a bitmask of bits relevant in this expression)
+** Track recirculation and convert into clock-enables
+** Clock enables should become new clocking domains for speed
+** If floped(a) & flopped(b) and no other a&b, then instead flop(a&b).
+** Sort by output bitselects so can combine more assignments (see DDP example dx_dm signal)

docs/doxygen-mainpage

@@ -3,4 +3,4 @@
  * \section intro_sec Introduction
  *
  * This is a full doxygen analysis of the Verilator source tree.
- */
+ */

docs/doxygen.config

@@ -45,7 +45,7 @@ PROJECT_BRIEF          = "Verilog to C translator"
 # exceed 55 pixels and the maximum width should not exceed 200 pixels.
 # Doxygen will copy the logo to the output directory.
 
-PROJECT_LOGO           = veripool-logo.png
+PROJECT_LOGO           = verilator_logo.png
 
 # The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
 # base path where the generated documentation will be put.
@@ -630,13 +630,8 @@ WARN_LOGFILE           =
 # with spaces.
 
 INPUT                  = doxygen-mainpage \
-		         include \
+                         include \
                          src \
-                         test_c \
-                         test_regress \
-                         test_sc \
-                         test_v \
-                         test_verilated
 
 # This tag can be used to specify the character encoding of the source files
 # that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is

docs/install.adoc

@@ -0,0 +1,299 @@
+= Verilator Installation
+:toc: right
+
+// Github doesn't render unless absolute URL
+image::https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200,role="right"]
+
+== Introduction
+
+This discusses how to install Verilator.  For more general information
+please see https://verilator.org[verilator.org].
+
+== Quick-start
+
+=== Install From a Package Manager
+
+Using a distribution's package manager is the easiest way to get
+started. (Note packages are unlikely to have the most recent version, so
+Git, below, maybe a better alternative.) To install as a package:
+
+   apt-get install verilator
+
+If this works, skip down to <<Running Verilator>>.
+
+=== Docker
+
+Verilator is available in pre-built Docker containers. See
+https://github.com/verilator/verilator/blob/master/ci/docker/run/README.adoc
+
+=== Git
+
+Installing Verilator with Git provides the most flexibility.
+For additional options and details see the additional sections below.  In
+brief:
+
+// Also update README
+....
+# Prerequisites:
+#sudo apt-get install git make autoconf g++ flex bison
+#sudo apt-get install libfl2  # Ubuntu only (ignore if gives error)
+#sudo apt-get install libfl-dev  # Ubuntu only (ignore if gives error)
+
+git clone https://git.veripool.org/git/verilator   # Only first time
+## Note the URL above is not a page you can see with a browser, it's for git only
+
+# Every time you need to build:
+unsetenv VERILATOR_ROOT  # For csh; ignore error if on bash
+unset VERILATOR_ROOT  # For bash
+cd verilator
+git pull        # Make sure git repository is up-to-date
+git tag         # See what versions exist
+#git checkout master      # Use development branch (e.g. recent bug fixes)
+#git checkout stable      # Use most recent stable release
+#git checkout v{version}  # Switch to specified release version
+
+autoconf        # Create ./configure script
+./configure
+make
+sudo make install
+# Now see "man verilator" or online verilator.pdf's for the example tutorials
+....
+
+If this works, skip down to <<Running Verilator>>.
+
+== Detailed Build Instructions
+
+This section describes details of the build process, and assumes you are
+building from Git or a tarball.  For using a pre-built binary for your
+Linux distribution, see instead <<Install From a Package Manager>>.
+
+=== OS Requirements
+
+Verilator is developed and has primary testing on Ubuntu.  Versions have
+also built on Redhat Linux, Apple OS-X, HPUX and Solaris.  It should run
+with minor porting on any GNU/Linux-ish platform.  Verilator also works on
+Windows under Cygwin, and Windows under MinGW (gcc -mno-cygwin).  Verilated
+output (not Verilator itself) compiles under all the options above, plus
+MSVC++.
+
+=== Install Prerequisites
+
+To build Verilator you will need to install some standard packages:
+
+   sudo apt-get install git
+   sudo apt-get install autoconf
+   sudo apt-get install flex bison
+
+Additionally, to build or run Verilator you need these standard packages:
+
+   sudo apt-get install perl python3
+   sudo apt-get install make
+   sudo apt-get install g++  # Alternatively, clang
+   sudo apt-get install libgz  # Non-Ubuntu (ignore if gives error)
+   sudo apt-get install libfl2 libfl-dev zlibc zlib1g zlib1g-dev  # Ubuntu only (ignore if gives error)
+
+Those developing Verilator may also want these (see internals.adoc):
+
+   sudo apt-get install gdb asciidoctor graphviz
+   cpan install Pod::Perldoc
+   cpan install Unix::Processors
+
+==== Install SystemC
+
+If you will be using SystemC (vs straight C++ output), download
+https://www.accellera.org/downloads/standards/systemc[SystemC].
+Follow their installation instructions.  You will need to set `SYSTEMC_INCLUDE`
+to point to the include directory with `systemc.h` in it, and `SYSTEMC_LIBDIR`
+to points to the directory with `libsystemc.a` in it.  (Older installations
+may set `SYSTEMC` and `SYSTEMC_ARCH` instead.)
+
+==== Install GTKWave
+
+To make use of Verilator FST tracing you will want
+http://gtkwave.sourceforge.net/[GTKwave] installed, however this is not
+required at Verilator build time.
+
+=== Obtain Sources
+
+You may use Git or a tarball for the sources.  Git is the supported option.
+(If using a historical build that uses a tarball, tarballs are obtained
+from https://www.veripool.org/projects/verilator/wiki/Download[Verilator
+Downloads]; we presume you know how to use it, and is not described here.)
+
+Get the sources from the repository: (You need do this only once, ever.)
+
+   git clone https://git.veripool.org/git/verilator   # Only first time
+   ## Note the URL above is not a page you can see with a browser, it's for git only
+
+Enter the checkout and determine what version/branch to use:
+
+   cd verilator
+   git pull        # Make sure we're up-to-date
+   git tag         # See what versions exist
+   #git checkout master      # Use development branch (e.g. recent bug fix)
+   #git checkout stable      # Use most recent release
+   #git checkout v{version}  # Switch to specified release version
+
+=== Auto Configure
+
+Create the configuration script:
+
+   autoconf        # Create ./configure script
+
+=== Eventual Installation Options
+
+Before configuring the build, you have to decide how you're going to
+eventually install the kit.  Verilator will be compiling the current value
+of `VERILATOR_ROOT`, `SYSTEMC_INCLUDE`, and `SYSTEMC_LIBDIR` as defaults
+into the executable, so they must be correct before configuring.
+
+These are the options:
+
+==== 1. Run-in-Place from VERILATOR_ROOT
+
+Our personal favorite is to always run Verilator in-place from its Git
+directory.  This allows the easiest experimentation and upgrading, and
+allows many versions of Verilator to co-exist on a system.
+
+   export VERILATOR_ROOT=`pwd`   # if your shell is bash
+   setenv VERILATOR_ROOT `pwd`   # if your shell is csh
+   ./configure
+   # Running will use files from $VERILATOR_ROOT, so no install needed
+
+Note after installing (below steps), a calling program or shell must set
+the environment variable `VERILATOR_ROOT` to point to this Git directory,
+then execute `$VERILATOR_ROOT/bin/verilator`, which will find the path to
+all needed files.
+
+==== 2. Install into a CAD Disk
+
+You may eventually be installing onto a project/company-wide "CAD" tools
+disk that may support multiple versions of every tool.  Target the build to
+a destination directory name that includes the Verilator version name:
+
+   unset VERILATOR_ROOT      # if your shell is bash
+   unsetenv VERILATOR_ROOT   # if your shell is csh
+   # For the tarball, use the version number instead of git describe
+   ./configure --prefix /CAD_DISK/verilator/`git describe | sed "s/verilator_//"`
+
+Note after installing (below steps), if you use
+http://modules.sourceforge.net/[modulecmd], you'll want a module file like
+the following:
+
+.modulecmd's verilator/version file
+----
+set install_root /CAD_DISK/verilator/{version-number-used-above}
+unsetenv VERILATOR_ROOT
+prepend-path PATH $install_root/bin
+prepend-path MANPATH $install_root/man
+prepend-path PKG_CONFIG_PATH $install_root/share/pkgconfig
+----
+
+==== 3. Install into a Specific Path
+
+You may eventually install Verilator into a specific installation prefix,
+as most GNU tools support:
+
+   unset VERILATOR_ROOT      # if your shell is bash
+   unsetenv VERILATOR_ROOT   # if your shell is csh
+   ./configure --prefix /opt/verilator-VERSION
+
+Then after installing (below steps) you will need to add
+`/opt/verilator-VERSION/bin` to `$PATH`.
+
+==== 4. Install System Globally
+
+The final option is to eventually install Verilator globally, using the
+normal system paths:
+
+   unset VERILATOR_ROOT      # if your shell is bash
+   unsetenv VERILATOR_ROOT   # if your shell is csh
+   ./configure
+
+Then after installing (below) the binary directories should already be in
+your `$PATH`.
+
+=== Configure
+
+The command to configure the package was described in the previous step.
+Developers should configure to have more complete developer tests.
+Additional packages may be required for these tests.
+
+   export VERILATOR_AUTHOR_SITE=1    # Put in your .bashrc
+   ./configure --enable-longtests  ...above options...
+
+=== Compile
+
+Compile Verilator:
+
+   make -j
+
+=== Test
+
+Check the compilation by running self-tests:
+
+   make test
+
+=== Install
+
+If you used any but the <<1. Run-in-Place from VERILATOR_ROOT>> scheme,
+install to the OS-standard place:
+
+   make install
+
+== Running Verilator
+
+To run Verilator, see the example sections in the
+https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
+or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
+
+Also see the `examples/` directory that is part of the kit, and is installed
+(in a OS-specific place, often in e.g. `/usr/local/share/verilator/examples`).
+
+     cd examples/make_hello_c
+     make
+
+Note if you did a `make install` above you should not have `VERILATOR_ROOT`
+set in your environment; it is built into the executable.
+
+== Announcements
+
+To get notified of new releases, login to
+https://www.veripool.org[Veripool], and click the "watch" button near the
+top right under https://www.veripool.org/projects/verilator/news[Verilator
+News].
+
+== Directory Structure
+
+Some relevant files and directories in this package are as follows:
+
+   Changes                     => Version history
+   README.adoc                 => This document
+   bin/verilator               => Compiler wrapper invoked to Verilate code
+   docs/                       => Additional documentation
+   examples/make_hello_c       => Example GNU-make simple Verilog->C++ conversion
+   examples/make_hello_sc      => Example GNU-make simple Verilog->SystemC conversion
+   examples/make_tracing_c     => Example GNU-make Verilog->C++ with tracing
+   examples/make_tracing_sc    => Example GNU-make Verilog->SystemC with tracing
+   examples/make_protect_lib   => Example using --protect-lib
+   examples/cmake_hello_c      => Example building make_hello_c with CMake
+   examples/cmake_hello_sc     => Example building make_hello_sc with CMake
+   examples/cmake_tracing_c    => Example building make_tracing_c with CMake
+   examples/cmake_tracing_sc   => Example building make_tracing_sc with CMake
+   examples/cmake_protect_lib  => Example building make_protect_lib with CMake
+   include/                    => Files that should be in your -I compiler path
+   include/verilated*.cpp      => Global routines to link into your simulator
+   include/verilated*.h        => Global headers
+   include/verilated.mk        => Common Makefile
+   src/                        => Translator source code
+   test_regress                => Internal tests
+
+For files created after a design is Verilated, see the
+https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
+or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
+
+== License
+
+Copyright 2008-2020 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

docs/internals.adoc

@@ -0,0 +1,985 @@
+= Verilator Internals Documentation
+:toc: right
+
+// Github doesn't render unless absolute URL
+image::https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200,role="right"]
+
+== Introduction
+
+This file discusses internal and programming details for Verilator.  It's a
+reference for developers and debugging problems.
+
+See also the Verilator internals presentation at https://www.veripool.org.
+
+== Code Flows
+
+=== Verilator Flow
+
+The main flow of Verilator can be followed by reading the Verilator.cpp
+`process()` function:
+
+. First, the files specified on the command line are read.  Reading
+involves preprocessing, then lexical analysis with Flex and parsing with
+Bison.  This produces an abstract syntax tree (AST) representation of the
+design, which is what is visible in the .tree files described below.
+
+. Verilator then makes a series of passes over the AST, progressively
+refining and optimizing it.
+
+. Cells in the AST first linked, which will read and parse additional files
+as above.
+
+. Functions, variable and other references are linked to their definitions.
+
+. Parameters are resolved and the design is elaborated.
+
+. Verilator then performs many additional edits and optimizations on the
+hierarchical design.  This includes coverage, assertions, X elimination,
+inlining, constant propagation, and dead code elimination.
+
+. References in the design are then pseudo-flattened.  Each module's
+variables and functions get "Scope" references.  A scope reference is an
+occurrence of that un-flattened variable in the flattened hierarchy.  A
+module that occurs only once in the hierarchy will have a single scope and
+single VarScope for each variable.  A module that occurs twice will have a
+scope for each occurrence, and two VarScopes for each variable.  This
+allows optimizations to proceed across the flattened design, while still
+preserving the hierarchy.
+
+. Additional edits and optimizations proceed on the pseudo-flat design.
+These include module references, function inlining, loop unrolling,
+variable lifetime analysis, lookup table creation, always splitting, and
+logic gate simplifications (pushing inverters, etc).
+
+. Verilator orders the code.  Best case, this results in a single "eval"
+function which has all always statements flowing from top to bottom with no
+loops.
+
+. Verilator mostly removes the flattening, so that code may be shared
+between multiple invocations of the same module.  It localizes variables,
+combines identical functions, expands macros to C primitives, adds branch
+prediction hints, and performs additional constant propagation.
+
+. Verilator finally writes the C++ modules.
+
+=== Key Classes Used in the Verilator Flow
+
+==== `AstNode`
+
+The AST is represented at the top level by the class `AstNode`. This
+abstract class has derived classes for the individual components
+(e.g. `AstGenerate` for a generate block) or groups of components
+(e.g. `AstNodeFTask` for functions and tasks, which in turn has `AstFunc`
+and `AstTask` as derived classes).
+
+Each `AstNode` has pointers to up to four children, accessed by the `op1p`
+through `op4p` methods.  These methods are then abstracted in a specific
+Ast* node class to a more specific name.  For example with the `AstIf` node
+(for `if` statements), `ifsp` calls `op2p` to give the pointer to the AST
+for the "then" block, while `elsesp` calls `op3p` to give the pointer to
+the AST for the "else" block, or NULL if there is not one.
+
+`AstNode` has the concept of a next and previous AST - for example the next
+and previous statements in a block. Pointers to the AST for these
+statements (if they exist) can be obtained using the `back` and `next`
+methods.
+
+It is useful to remember that the derived class `AstNetlist` is at the top
+of the tree, so checking for this class is the standard way to see if you
+are at the top of the tree.
+
+By convention, each function/method uses the variable `nodep` as a pointer
+to the `AstNode` currently being processed.
+
+==== `AstNVisitor`
+
+The passes are implemented by AST visitor classes.  These are implemented
+by subclasses of the abstract class, `AstNVisitor`. Each pass creates an
+instance of the visitor class, which in turn implements a method to perform
+the pass.
+
+==== `V3Graph`
+
+A number of passes use graph algorithms, and the class `V3Graph` is
+provided to represent those graphs. Graphs are directed, and algorithms are
+provided to manipulate the graphs and to output them in
+https://www.graphviz.org[GraphViz] dot format. `V3Graph.h` provides
+documentation of this class.
+
+==== `V3GraphVertex`
+
+`V3GraphVertex` is the base class for vertices in a graph. Vertices have
+an associated `fanout`, `color` and `rank`, which may be used in algorithms
+for ordering the graph. A generic `user`/`userp` member variable is also
+provided.
+
+Virtual methods are provided to specify the name, color, shape and style to
+be used in dot output. Typically users provide derived classes from
+`V3GraphVertex` which will reimplement these methods.
+
+Iterators are provided to access in and out edges. Typically these are used
+in the form:
+
+   for (V3GraphEdge *edgep = vertexp->inBeginp();
+      edgep;
+      edgep = edgep->inNextp()) {
+
+==== `V3GraphEdge`
+
+`V3GraphEdge` is the base class for directed edges between pairs of
+vertices. Edges have an associated `weight` and may also be made
+`cutable`. A generic `user`/`userp` member variable is also provided.
+
+Accessors, `fromp` and `top` return the "from" and "to" vertices
+respectively.
+
+Virtual methods are provided to specify the label, color and style to be
+used in dot output. Typically users provided derived classes from
+`V3GraphEdge` which will reimplement these methods.
+
+==== `V3GraphAlg`
+
+This is the base class for graph algorithms. It implements a `bool` method,
+`followEdge` which algorithms can use to decide whether an edge is
+followed. This method returns true if the graph edge has weight greater
+than one and a user function, `edgeFuncp` (supplied in the constructor)
+returns `true`.
+
+A number of predefined derived algorithm classes and access methods are
+provided and documented in `V3GraphAlg.cpp`.
+
+=== Multithreaded Mode
+
+In `--threads` mode, the frontend of the Verilator pipeline is the same as
+serial mode, up until V3Order.
+
+`V3Order` builds a fine-grained, statement-level dependency graph that
+governs the ordering of code within a single `eval()` call. In serial mode,
+that dependency graph is used to order all statements into a total serial
+order.  In parallel mode, the same dependency graph is the starting point
+for a partitioner (`V3Partition`).
+
+The partitioner's goal is to coarsen the fine-grained graph into a coarser
+graph, while maintaining as much available parallelism as possible. Often
+the partitioner can transform an input graph with millions of nodes into a
+coarsened execution graph with a few dozen nodes, while maintaining enough
+parallelism to take advantage of a modern multicore CPU. Runtime
+synchronization cost is not prohibitive with so few nodes.
+
+==== Partitioning
+
+Our partitioner is similar to the one Vivek Sarkar described in his 1989
+paper _Partitioning and Scheduling Parallel Programs for Multiprocessors_.
+
+Let's define some terms:
+
+==== Par Factor
+
+The available parallelism or "par-factor" of a DAG is the total cost to
+execute all nodes, divided by the cost to execute the longest critical path
+through the graph. This is the speedup you would get from running the graph
+in parallel, if given infinite CPU cores available and communication and
+synchronization are zero.
+
+==== Macro Task
+
+When the partitioner coarsens the graph, it combines nodes together. Each
+fine-grained node represents an atomic "task"; combined nodes in the
+coarsened graph are "macro-tasks". This term comes from Sarkar. Each
+macro-task executes from start to end on one processor, without any
+synchronization to any other macro-task during its
+execution. (Synchronization only happens before the macro-task begins or
+after it ends.)
+
+==== Edge Contraction
+
+Verilator's partitioner, like Sarkar's, primarily relies on "edge
+contraction" to coarsen the graph. It starts with one macro-task per atomic
+task and iteratively combines pairs of edge-connected macro-tasks.
+
+==== Local Critical Path
+
+Each node in the graph has a "local" critical path. That's the critical
+path from the start of the graph to the start of the node, plus the node's
+cost, plus the critical path from the end of the node to the end of the
+graph.
+
+Sarkar calls out an important trade-off: coarsening the graph reduces
+runtime synchronization overhead among the macro-tasks, but it tends to
+increase the critical path through the graph and thus reduces par-factor.
+
+Sarkar's partitioner, and ours, chooses pairs of macro-tasks to merge such
+that the growth in critical path is minimized. Each candidate merge would
+result in a new node, which would have some local critical path. We choose
+the candidate that would produce the shortest local critical path. Repeat
+until par-factor falls to a target threshold. It's a greedy algorithm, and
+it's not guaranteed to produce the best partition (which Sarkar proves is
+NP-hard).
+
+==== Estimating Logic Costs
+
+To compute the cost of any given path through the graph, Verilator
+estimates an execution cost for each task. Each macro-task has an execution
+cost which is simply the sum of its tasks' costs. We assume that
+communication overhead and synchronization overhead are zero, so the cost
+of any given path through the graph is simply the sum of macro-task
+execution costs. Sarkar does almost the same thing, except that he has
+nonzero estimates for synchronization costs.
+
+Verilator's cost estimates are assigned by `InstrCountCostVisitor`.  This
+class is perhaps the most fragile piece of the multithread implementation.
+It's easy to have a bug where you count something cheap (eg. accessing one
+element of a huge array) as if it were expensive (eg. by counting it as if
+it were an access to the entire array.) Even without such gross bugs, the
+estimates this produce are only loosely predictive of actual runtime cost.
+Multithread performance would be better with better runtime costs
+estimates.  This is an area to improve.
+
+==== Scheduling Macro-Tasks at Runtime
+
+After coarsening the graph, we must schedule the macro-tasks for runtime.
+Sarkar describes two options: you can dynamically schedule tasks at
+runtime, with a runtime graph follower. Sarkar calls this the
+"macro-dataflow model."  Verilator does not support this; early experiments
+with this approach had poor performance.
+
+The other option is to statically assign macro-tasks to threads, with each
+thread running its macro-tasks in a static order. Sarkar describes this in
+Chapter 5. Verilator takes this static approach. The only dynamic aspect is
+that each macro task may block before starting, to wait until its
+prerequisites on other threads have finished.
+
+The synchronization cost is cheap if the prereqs are done. If they're not,
+fragmentation (idle CPU cores waiting) is possible. This is the major
+source of overhead in this approach. The `--prof-threads` switch and the
+`verilator_gantt` script can visualize the time lost to such fragmentation.
+
+==== Locating Variables for Best Spatial Locality
+
+After scheduling all code, we attempt to locate variables in memory such
+that variables accessed by a single macro-task are close together in
+memory.  This provides "spatial locality" -- when we pull in a 64-byte
+cache line to access a 2-byte variable, we want the other 62 bytes to be
+ones we'll also likely access soon, for best cache performance.
+
+This turns out to be critical for performance. It should allow Verilator to
+scale to very large models. We don't rely on our working set fitting in any
+CPU cache; instead we essentially "stream" data into caches from
+memory. It's not literally streaming, where the address increases
+monotonically, but it should have similar performance characteristics, so
+long as each macro-task's dataset fits in one core's local caches.
+
+To achieve spatial locality, we tag each variable with the set of
+macro-tasks that access it. Let's call this set the "footprint" of that
+variable. The variables in a given module have a set of footprints. We can
+order those footprints to minimize the distance between them (distance is
+the number of macro-tasks that are different across any two footprints) and
+then emit all variables into the struct in ordered-footprint order.
+
+The footprint ordering is literally the traveling salesman problem, and we
+use a TSP-approximation algorithm to get close to an optimal sort.
+
+This is an old idea. Simulators designed at DEC in the early 1990s used
+similar techniques to optimize both single-thread and multi-thread modes.
+(Verilator does not optimize variable placement for spatial locality in
+serial mode; that is a possible area for improvement.)
+
+==== Improving Multithreaded Performance Further (a TODO list)
+
+===== Wave Scheduling
+
+To allow the Verilated model to run in parallel with the testbench, it
+might be nice to support "wave" scheduling, in which work on a cycle begins
+before `eval()` is called or continues after `eval()` returns.  For now all
+work on a cycle happens during the `eval()` call, leaving Verilator's
+threads idle while the testbench (everything outside `eval()`) is
+working. This would involve fundamental changes within the partitioner,
+however, it's probably the best bet for hiding testbench latency.
+
+===== Efficient Dynamic Scheduling
+
+To scale to more than a few threads, we may revisit a fully dynamic
+scheduler. For large (>16 core) systems it might make sense to dedicate an
+entire core to scheduling, so that scheduler data structures would fit in
+its L1 cache and thus the cost of traversing priority-ordered ready lists
+would not be prohibitive.
+
+===== Static Scheduling with Runtime Repack
+
+We could modify the static scheduling approach by gathering actual
+macro-task execution times at run time, and dynamically re-packing the
+macro-tasks into the threads also at run time. Say, re-pack once every
+10,000 cycles or something. This has the potential to do better than our
+static estimates about macro-task run times. It could potentially react to
+CPU cores that aren't performing equally, due to NUMA or thermal throttling
+or nonuniform competing memory traffic or whatever.
+
+===== Clock Domain Balancing
+
+Right now Verilator makes no attempt to balance clock domains across
+macro-tasks. For a multi-domain model, that could lead to bad gantt chart
+fragmentation. This could be improved if it's a real problem in practice.
+
+===== Other Forms of MTask Balancing
+
+The largest source of runtime overhead is idle CPUs, which happens due to
+variance between our predicted runtime for each MTask and its actual
+runtime. That variance is magnified if MTasks are homogeneous, containing
+similar repeating logic which was generally close together in source code
+and which is still packed together even after going through Verilator's
+digestive tract.
+
+If Verilator could avoid doing that, and instead would take source logic
+that was close together and distribute it across MTasks, that would
+increase the diversity of any given MTask, and this should reduce variance
+in the cost estimates.
+
+One way to do that might be to make various "tie breaker" comparison
+routines in the sources to rely more heavily on randomness, and generally
+try harder not to keep input nodes together when we have the option to
+scramble things.
+
+===== Performance Regression
+
+It would be nice if we had a regression of large designs, with some
+diversity of design styles, to test on both single- and multi-threaded
+modes. This would help to avoid performance regressions, and also to
+evaluate the optimizations while minimizing the impact of parasitic noise.
+
+===== Per-Instance Classes
+
+If we have multiple instances of the same module, and they partition
+differently (likely; we make no attempt to partition them the same) then
+the variable sort will be suboptimal for either instance.  A possible
+improvement would be to emit a unique class for each instance of a module,
+and sort its variables optimally for that instance's code stream.
+
+=== Verilated Flow
+
+The evaluation loop outputted by Verilator is designed to allow a single
+function to perform evaluation under most situations.
+
+On the first evaluation, the Verilated code calls initial blocks, and then
+"settles" the modules, by evaluating functions (from always statements)
+until all signals are stable.
+
+On other evaluations, the Verilated code detects what input signals have
+changes.  If any are clocks, it calls the appropriate sequential functions
+(from `always @ posedge` statements).  Interspersed with sequential functions
+it calls combo functions (from `always @*`).  After this is complete, it
+detects any changes due to combo loops or internally generated clocks, and
+if one is found must reevaluate the model again.
+
+For SystemC code, the `eval()` function is wrapped in a SystemC
+`SC_METHOD`, sensitive to all inputs.  (Ideally it would only be sensitive
+to clocks and combo inputs, but tracing requires all signals to cause
+evaluation, and the performance difference is small.)
+
+If tracing is enabled, a callback examines all variables in the design for
+changes, and writes the trace for each change.  To accelerate this process
+the evaluation process records a bitmask of variables that might have
+changed; if clear, checking those signals for changes may be skipped.
+
+== Coding Conventions
+
+=== Compiler Version and C++11
+
+Verilator supports GCC 4.4.7 and newer.  GCC 4.4.7 does not support C++11,
+therefore C++11 is generally not required.  Exceptions may be made to
+require C++11 for features that are only practical with C++11,
+e.g. threads.
+
+=== Indentation and Naming Style
+
+We will work with contributors to fix up indentation style issues, but it
+is appreciated if you could match our style:
+
+* All files should contain the magic header to insure standard indentation:
++
+   // -*- mode: C++; c-file-style: "cc-mode" -*-
++
+This sets indentation to the `cc-mode` defaults.  (Verilator predates a
+CC-mode change of several years ago which overrides the defaults with GNU
+style indentation; the `c-set-style` undoes that.)
+
+* Use 4 spaces per level, and no tabs.
+
+* Use 2 spaces between the end of source and the beginning of a comment.
+
+* Use 1 space after if/for/switch/while and similar keywords.
+
+* No spaces before semicolons, nor between a function's name and open
+parenthesis (only applies to functions; if/else has a following space).
+
+* Use "mixedCapsSymbols" instead of "underlined_symbols".
+
+* Uas a "p" suffix on variables that are pointers, e.g. "nodep".
+
+* Comment every member variable.
+
+=== The `astgen` Script
+
+Some of the code implementing passes is extremely repetitive, and must be
+implemented for each sub-class of `AstNode`. However, while repetitive,
+there is more variability than can be handled in C++ macros.
+
+In Verilator this is implemented by using a Perl script, `astgen` to
+pre-process the C++ code. For example in `V3Const.cpp` this is used to
+implement the `visit()` functions for each binary operation using the
+`TREEOP` macro.
+
+The original C++ source code is transformed into C++ code in the `obj_opt`
+and `obj_dbg` sub-directories (the former for the optimized version of
+Verilator, the latter for the debug version). So for example `V3Const.cpp`
+into `V3Const__gen.cpp`.
+
+=== Visitor Functions
+
+Verilator uses the "Visitor" design pattern to implement its refinement and
+optimization passes. This allows separation of the pass algorithm from the
+AST on which it operates. Wikipedia provides an introduction to the concept
+at https://en.wikipedia.org/wiki/Visitor_pattern.
+
+As noted above, all visitors are derived classes of `AstNVisitor`. All
+derived classes of `AstNode` implement the `accept` method, which takes as
+argument a reference to an instance or a `AstNVisitor` derived class and
+applies the visit method of the `AstNVisitor` to the invoking AstNode
+instance (i.e. `this`).
+
+One possible difficulty is that a call to `accept` may perform an edit
+which destroys the node it receives as argument. The
+`acceptSubtreeReturnEdits` method of `AstNode` is provided to apply
+`accept` and return the resulting node, even if the original node is
+destroyed (if it is not destroyed it will just return the original node).
+
+The behavior of the visitor classes is achieved by overloading the `visit`
+function for the different `AstNode` derived classes. If a specific
+implementation is not found, the system will look in turn for overloaded
+implementations up the inheritance hierarchy. For example calling `accept`
+on `AstIf` will look in turn for:
+
+   void visit(AstIf* nodep)
+   void visit(AstNodeIf* nodep)
+   void visit(AstNodeStmt* nodep)
+   void visit(AstNode* nodep)
+
+There are three ways data is passed between visitor functions.
+
+1. A visitor-class member variable.  This is generally for passing "parent"
+information down to children.  `m_modp` is a common example.  It's set to
+NULL in the constructor, where that node (`AstModule` visitor) sets it,
+then the children are iterated, then it's cleared.  Children under an
+`AstModule` will see it set, while nodes elsewhere will see it clear.  If
+there can be nested items (for example an `AstFor` under an `AstFor`) the
+variable needs to be save-set-restored in the `AstFor` visitor, otherwise
+exiting the lower for will lose the upper for's setting.
+
+2. User attributes.  Each `AstNode` (*Note.* The AST node, not the visitor)
+has five user attributes, which may be accessed as an integer using the
+`user1()` through `user5()` methods, or as a pointer (of type `AstNUser`)
+using the `user1p()` through `user5p()` methods (a common technique lifted
+from graph traversal packages).
++
+A visitor first clears the one it wants to use by calling
+`AstNode::user#ClearTree()`, then it can mark any node's `user#()` with whatever
+data it wants.  Readers just call `nodep->user()`, but may need to cast
+appropriately, so you'll often see `VN_CAST(nodep->userp(), SOMETYPE)`.
+At the top of each visitor are comments describing how the `user()` stuff
+applies to that visitor class.  For example:
++
+   // NODE STATE
+   // Cleared entire netlist
+   //   AstModule::user1p()     // bool. True to inline this module
++
+This says that at the `AstNetlist` `user1ClearTree()` is called.  Each
+`AstModule`'s `user1()` is used to indicate if we're going to inline it.
++
+These comments are important to make sure a `user#()` on a given `AstNode`
+type is never being used for two different purposes.
++
+Note that calling `user#ClearTree` is fast, it doesn't walk the tree, so
+it's ok to call fairly often.  For example, it's commonly called on every
+module.
+
+3. Parameters can be passed between the visitors in close to the "normal"
+function caller to callee way.  This is the second `vup` parameter of type
+`AstNUser` that is ignored on most of the visitor functions.  V3Width does
+this, but it proved more messy than the above and is deprecated.  (V3Width
+was nearly the first module written.  Someday this scheme may be removed,
+as it slows the program down to have to pass vup everywhere.)
+
+=== Iterators
+
+`AstNVisitor` provides a set of iterators to facilitate walking over the
+tree. Each operates on the current `AstNVisitor` class (as this) and takes
+an argument type `AstNode*`.
+
+`iterate`::
+
+Applies the `accept` method of the `AstNode` to the visitor function.
+
+`iterateAndNextIgnoreEdit`::
+
+Applies the `accept` method of each `AstNode` in a list (i.e. connected by
+`nextp` and `backp` pointers).
+
+`iterateAndNextNull`::
+
+Applies the `accept` method of each `AstNode` in a list, only if the
+provided node is non-NULL. If a node is edited by the call to `accept`,
+apply `accept` again, until the node does not change.
+
+`iterateListBackwards`::
+
+Applies the `accept` method of each `AstNode` in a list, starting with the
+last one.
+
+`iterateChildren`::
+
+Applies the `iterateAndNextNull` method on each child `op1p` through `op4p`
+in turn.
+
+`iterateChildrenBackwards`::
+
+Applies the `iterateListBackwards` method on each child `op1p` through
+`op4p` in turn.
+
+==== Caution on Using Iterators When Child Changes
+
+Visitors often replace one node with another node; V3Width and V3Const are
+major examples.  A visitor which is the parent of such a replacement needs
+to be aware that calling iteration may cause the children to change.  For
+example:
+
+   // nodep->lhsp() is 0x1234000
+   iterateAndNextNull(nodep->lhsp());  // and under covers nodep->lhsp() changes
+   // nodep->lhsp() is 0x5678400
+   iterateAndNextNull(nodep->lhsp());
+
+Will work fine, as even if the first iterate causes a new node to take the
+place of the `lhsp()`, that edit will update `nodep->lhsp()` and the second
+call will correctly see the change. Alternatively:
+
+   lp = nodep->lhsp();
+   // nodep->lhsp() is 0x1234000, lp is 0x1234000
+   iterateAndNextNull(lp); **lhsp=NULL;**  // and under covers nodep->lhsp() changes
+   // nodep->lhsp() is 0x5678400, lp is 0x1234000
+   iterateAndNextNull(lp);
+
+This will cause bugs or a core dump, as lp is a dangling pointer.  Thus it
+is advisable to set lhsp=NULL shown in the *'s above to make sure these
+dangles are avoided.  Another alternative used in special cases mostly in
+V3Width is to use acceptSubtreeReturnEdits, which operates on a single node
+and returns the new pointer if any.  Note acceptSubtreeReturnEdits does not
+follow `nextp()` links.
+
+   lp = acceptSubtreeReturnEdits(lp)
+
+=== Identifying Derived Classes
+
+A common requirement is to identify the specific `AstNode` class we are
+dealing with. For example a visitor might not implement separate `visit`
+methods for `AstIf` and `AstGenIf`, but just a single method for the base
+class:
+
+   void visit (AstNodeIf* nodep)
+
+However that method might want to specify additional code if it is called
+for `AstGenIf`. Verilator does this by providing a `VN_IS` method for each
+possible node type, which returns true if the node is of that type (or
+derived from that type).  So our `visit` method could use:
+
+   if (VN_IS(nodep, AstGenIf) {
+     <code specific to AstGenIf>
+   }
+
+Additionally the `VN_CAST` method converts pointers similar to C++
+`dynamic_cast`. This either returns a pointer to the object cast to that
+type (if it is of class `SOMETYPE`, or a derived class of `SOMETYPE`) or
+else NULL.  (However, for true/false tests use `VN_IS` as that is faster.)
+
+== Testing
+
+For an overview of how to write a test see the BUGS section of the
+Verilator primary manual.
+
+It is important to add tests for failures as well as success (for example
+to check that an error message is correctly triggered).
+
+Tests that fail should by convention have the suffix `_bad` in their name,
+and include `fails = 1` in either their `compile` or `execute` step as
+appropriate.
+
+=== Preparing to Run Tests
+
+For all tests to pass you must install the following packages:
+
+* SystemC to compile the SystemC outputs, see http://systemc.org
+
+* Parallel::Forker from CPAN to run tests in parallel, you can install this
+with e.g. "sudo cpan install Parallel::Forker".
+
+* vcddiff to find differences in VCD outputs. See the readme at
+https://github.com/veripool/vcddiff
+
+=== Controlling the Test Driver
+
+Test drivers are written in PERL. All invoke the main test driver script,
+which can provide detailed help on all the features available when writing
+a test driver.
+
+   test_regress/t/driver.pl --help
+
+For convenience, a summary of the most commonly used features is provided
+here. All drivers require a call to `compile` subroutine to compile the
+test. For run-time tests, this is followed by a call to the `execute`
+subroutine. Both of these functions can optionally be provided with a hash
+table as argument specifying additional options.
+
+The test driver assumes by default that the source Verilog file name
+matches the PERL driver name. So a test whose driver is `t/t_mytest.pl`
+will expect a Verilog source file `t/t_mytest.v`. This can be changed
+using the `top_filename` subroutine, for example
+
+   top_filename("t/t_myothertest.v");
+
+By default all tests will run with major simulators (Icarus Verilog, NC,
+VCS, ModelSim, etc) as well as Verilator, to allow results to be
+compared. However if you wish a test only to be used with Verilator, you
+can use the following:
+
+   scenarios(vlt => 1);
+
+Of the many options that can be set through arguments to `compiler` and
+`execute`, the following are particularly useful:
+
+`verilator_flags2`::
+
+A list of flags to be passed to verilator when compiling.
+
+`fails`::
+
+Set to 1 to indicate that the compilation or execution is intended to fail.
+
+For example the following would specify that compilation requires two
+defines and is expected to fail.
+
+   compile (
+      verilator_flags2 => ["-DSMALL_CLOCK -DGATED_COMMENT"],
+      fails => 1,
+      );
+
+=== Regression Testing for Developers
+
+Developers will also want to call ./configure with two extra flags:
+
+`--enable-ccwarn`::
+
+Causes the build to stop on warnings as well as errors. A good way to
+ensure no sloppy code gets added, however it can be painful when it comes
+to testing, since third party code used in the tests (e.g. SystemC) may not
+be warning free.
+
+`--enable-longtests`::
+
+In addition to the standard C, SystemC examples, also run the tests in the
+`test_regress` directory when using _make test_'.  This is disabled by
+default as SystemC installation problems would otherwise falsely indicate a
+Verilator problem.
+
+When enabling the long tests, some additional PERL modules are needed,
+which you can install using cpan.
+
+   cpan install Unix::Processors
+
+There are some traps to avoid when running regression tests
+
+* When checking the MANIFEST, the test will barf on unexpected code in the
+Verilator tree. So make sure to keep any such code outside the tree.
+
+* Not all Linux systems install Perldoc by default. This is needed for the
+`--help_' option to Verilator, and also for regression testing. This can be
+installed using cpan:
++
+   cpan install Pod::Perldoc
++
+Many Linux systems also offer a standard package for this. Red
+Hat/Fedora/Centos offer _perl-Pod-Perldoc_', while Debian/Ubuntu/Linux Mint
+offer `perl-doc'.
+
+* Running regression may exhaust resources on some Linux systems,
+particularly file handles and user processes. Increase these to
+respectively 16,384 and 4,096. The method of doing this is system
+dependent, but on Fedora Linux it would require editing the
+`/etc/security/limits.conf` file as root.
+
+=== Continuous Integration
+
+Verilator has a https://travis-ci.com/verilator/verilator[Travis CI environment]
+which automatically tests the master branch for test failures on new commits. It
+also runs a daily cron job to validate all of the tests against different OS and
+compiler versions.
+
+Developers can connect Travis CI to their GitHub account so that the CI
+environment can check their branches too by doing the following:
+
+* Go to https://github.com/marketplace/travis-ci and follow the prompts
+
+* Only the Open Source (FREE) version of Travis CI is required
+
+* Under a Travis CI project click More options > Settings in order to set up a
+cron job on a particular branch
+
+=== Fuzzing
+
+There are scripts included to facilitate fuzzing of Verilator.  These have
+been successfully used to find a number of bugs in the frontend.
+
+The scripts are based on using http://lcamtuf.coredump.cx/afl/[American fuzzy lop]
+on a Debian-like system.
+
+To get started, cd to "nodist/fuzzer/" and run "./all".  A sudo password
+may be required to setup the system for fuzzing.
+
+== Debugging
+
+=== --debug
+
+When you run with `--debug` there are two primary output file types placed
+into the obj_dir, .tree and .dot files.
+
+=== .dot Output
+
+Dot files are dumps of internal graphs in
+https://www.graphviz.org[Graphviz] dot format.  When a dot file is dumped,
+Verilator will also print a line on stdout that can be used to format the
+output, for example:
+
+   dot -Tps -o ~/a.ps obj_dir/Vtop_foo.dot
+
+You can then print a.ps.  You may prefer gif format, which doesn't get
+scaled so can be more useful with large graphs.
+
+For dynamic graph viewing consider
+http://zvtm.sourceforge.net/zgrviewer.html[ZGRViewer].  If you know of
+better viewers let us know; ZGRViewer isn't great for large graphs.
+
+=== .tree Output
+
+Tree files are dumps of the AST Tree and are produced between every major
+algorithmic stage.  An example:
+
+     NETLIST 0x90fb00 <e1> {a0}
+    1: MODULE 0x912b20 <e8822> {a8}  top  L2 [P]
+   *1:2: VAR 0x91a780 <e74#> {a22} @dt=0xa2e640(w32)  out_wide [O] WIRE
+    1:2:1: BASICDTYPE 0xa2e640 <e2149> {e24} @dt=this(sw32)  integer kwd=integer range=[31:0]
+
+The following summarizes the above example dump, with more detail on each
+field in the section below.
+
+[cols="20%,80%"]
+|===
+
+|`1:2:` | indicates the hierarchy of the `VAR` is the `op2p` pointer under
+the `MODULE`, which in turn is the `op1p` pointer under the `NETLIST`
+
+|`VAR` | is the AstNodeType.
+
+| `0x91a780` | is the address of this node.
+
+| `<e74>` | means the 74th edit to the netlist was the last modification to
+this node.
+
+| `{a22}` | indicates this node is related to line 22 in the source filename
+"a", where "a" is the first file read, "z" the 26th, and "aa" the 27th.
+
+| `@dt=0x...` | indicates the address of the data type this node contains.
+
+| `w32` | indicates the width is 32 bits.
+
+| `out_wide` | is the name of the node, in this case the name of the variable.
+
+| `[O]` |  are flags which vary with the type of node, in this case it means the
+variable is an output.
+
+|===
+
+In more detail the following fields are dumped common to all nodes. They
+are produced by the `AstNode::dump()` method:
+
+Tree Hierarchy::
+
+The dump lines begin with numbers and colons to indicate the child node
+hierarchy.  As noted above, `AstNode` has lists of items at the same level
+in the AST, connected by the `nextp()` and `prevp()` pointers. These appear
+as nodes at the same level. For example after inlining:
+
+    NETLIST 0x929c1c8 <e1> {a0} w0
+   1: MODULE 0x92bac80 <e3144> {e14} w0  TOP_t  L1 [P]
+   1:1: CELLINLINE 0x92bab18 <e3686#> {e14} w0  v -> t
+   1:1: CELLINLINE 0x92bc1d8 <e3688#> {e24} w0  v__DOT__i_test_gen -> test_gen
+   ...
+   1: MODULE 0x92b9bb0 <e503> {e47} w0  test_gen  L3
+   ...
+
+AstNode type::
+
+The textual name of this node AST type (always in capitals). Many of these
+correspond directly to Verilog entities (for example `MODULE` and
+`TASK`), but others are internal to Verilator (for example `NETLIST` and
+`BASICDTYPE`).
+
+Address of the node::
+
+A hexadecimal address of the node in memory. Useful for examining with the
+debugger.
+
+Last edit number::
+
+Of the form `<ennnn>` or `<ennnn#>` , where `nnnn` is the number
+of the last edit to modify this node. The trailing `#` indicates the node
+has been edited since the last tree dump (which typically means in the last
+refinement or optimization pass). GDB can watch for this, see << /Debugging >>.
+
+Source file and line::
+
+Of the form `{xxnnnn}`, where C{xx} is the filename letter (or
+letters) and `nnnn` is the line number within that file. The first file is
+`a`, the 26th is `z`, the 27th is `aa` and so on.
+
+User pointers::
+
+Shows the value of the node's user1p...user5p, if non-NULL.
+
+Data type::
+
+Many nodes have an explicit data type.  "@dt=0x..." indicates the address
+of the data type (AstNodeDType) this node uses.
++
+If a data type is present and is numeric, it then prints the width of the
+item. This field is a sequence of flag characters and width data as follows:
++
+* `s` if the node is signed.
+* `d` if the node is a double (i.e a floating point entity).
+* `w` always present, indicating this is the width field.
+* `u` if the node is unsized.
+* `/nnnn` if the node is unsized, where `nnnn` is the minimum width.
+
+Name of the entity represented by the node if it exists::
+
+For example for a `VAR` it is the name of the variable.
+
+Many nodes follow these fields with additional node specific
+information. Thus the `VARREF` node will print either `[LV]` or `[RV]`
+to indicate a left value or right value, followed by the node of the
+variable being referred to. For example:
+
+   1:2:1:1: VARREF 0x92c2598 <e509> {e24} w0  clk [RV] <- VAR 0x92a2e90 <e79> {e18} w0  clk [I] INPUT
+
+In general, examine the `dump()` method in `V3AstNodes.cpp` of the node
+type in question to determine additional fields that may be printed.
+
+The `MODULE` has a list of `CELLINLINE` nodes referred to by its
+`op1p()` pointer, connected by `nextp()` and `prevp()` pointers.
+
+Similarly the `NETLIST` has a list of modules referred to by its `op1p()`
+pointer.
+
+=== Debugging with GDB
+
+The test_regress/driver.pl script accepts `--debug --gdb` to start
+Verilator under gdb and break when an error is hit or the program is about
+to exit.  You can also use `--debug --gdbbt` to just backtrace and then
+exit gdb. To debug the Verilated executable, use `--gdbsim`.
+
+If you wish to start Verilator under GDB (or another debugger), then you
+can use `--debug` and look at the underlying invocation of
+`verilator_dbg`. For example
+
+   t/t_alw_dly.pl --debug
+
+shows it invokes the command:
+
+   ../verilator_bin_dbg --prefix Vt_alw_dly --x-assign unique --debug
+     -cc -Mdir obj_dir/t_alw_dly --debug-check -f input.vc t/t_alw_dly.v
+
+Start GDB, then `start` with the remaining arguments.
+
+   gdb ../verilator_bin_dbg
+   ...
+   (gdb) start --prefix Vt_alw_dly --x-assign unique --debug -cc -Mdir
+             obj_dir/t_alw_dly --debug-check  -f input.vc t/t_alw_dly.v
+             > obj_dir/t_alw_dly/vlt_compile.log
+   ...
+   Temporary breakpoint 1, main (argc=13, argv=0xbfffefa4, env=0xbfffefdc)
+       at ../Verilator.cpp:615
+   615         ios::sync_with_stdio();
+   (gdb)
+
+You can then continue execution with breakpoints as required.
+
+To break at a specific edit number which changed a node (presumably to find
+what made a <e####> line in the tree dumps):
+
+   watch AstNode::s_editCntGbl==####
+
+Then, when the watch fires, to break at every following change to that node:
+
+   watch m_editCount
+
+To print a node:
+
+   pn nodep
+   # or: call nodep->dumpGdb()  # aliased to "pn" in src/.gdbinit
+   pnt nodep
+   # or: call nodep->dumpTreeGdb()  # aliased to "pnt" in src/.gdbinit
+
+When GDB halts, it is useful to understand that the backtrace will commonly
+show the iterator functions between each invocation of `visit` in the
+backtrace. You will typically see a frame sequence something like
+
+   ...
+   visit()
+   iterateChildren()
+   iterateAndNext()
+   accept()
+   visit()
+   ...
+
+== Adding a New Feature
+
+Generally what would you do to add a new feature?
+
+. File an issue (if there isn't already) so others know what you're working on.
+
+. Make a testcase in the test_regress/t/t_EXAMPLE format, see << /TESTING >>.
+
+. If grammar changes are needed, look at the git version of VerilogPerl's
+src/VParseGrammar.y, as this grammar supports the full SystemVerilog
+language and has a lot of back-and-forth with Verilator's grammar.  Copy
+the appropriate rules to src/verilog.y and modify the productions.
+
+. If a new Ast type is needed, add it to V3AstNodes.h.
+
+. Now you can run "test_regress/t/t_{new testcase}.pl --debug" and it'll
+probably fail but you'll see a test_regress/obj_dir/t_{newtestcase}/*.tree
+file which you can examine to see if the parsing worked. See also the
+sections above on debugging.
+
+. Modify the later visitor functions to process the new feature as needed.
+
+=== Adding a New Pass
+
+For more substantial changes you may need to add a new pass. The simplest
+way to do this is to copy the `.cpp` and `.h` files from an existing
+pass. You'll need to add a call into your pass from the `process()`
+function in `src/verilator.cpp`.
+
+To get your pass to build you'll need to add its binary filename to the
+list in `src/Makefile_obj.in` and reconfigure.
+
+== Distribution
+
+Copyright 2008-2020 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

examples/cmake_hello_c/.gitignore

@@ -0,0 +1 @@
+build*

examples/cmake_hello_c/CMakeLists.txt

@@ -0,0 +1,37 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt
+#
+# This is an example cmake script to build a verilog to systemc project
+# using cmake and verilator.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the tracing_c example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_c
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_hello_c)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# Create a new executable target that will contain all your sources
+add_executable(example ../make_hello_c/sim_main.cpp)
+
+# Add the Verilated circuit to the target
+verilate(example
+  INCLUDE_DIRS "../make_hello_c"
+  SOURCES ../make_hello_c/top.v)

examples/cmake_hello_c/Makefile

@@ -0,0 +1,79 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifeq ($(CMAKE_GT_3_8),true)
+TARGET := run
+else
+TARGET := oldcmake
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake hello world example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	build/example
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo

examples/cmake_hello_sc/.gitignore

@@ -0,0 +1 @@
+build*

examples/cmake_hello_sc/CMakeLists.txt

@@ -0,0 +1,46 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with SystemC
+#
+# This is an example cmake script to build a verilog to SystemC project
+# using CMake and Verilator.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the tracing_sc example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_sc
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_hello_sc)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# SystemC dependencies
+set(THREADS_PREFER_PTHREAD_FLAG ON)
+find_package(Threads REQUIRED)
+
+# Find SystemC using SystemC's CMake integration
+find_package(SystemCLanguage QUIET)
+
+# Create a new executable target that will contain all your sources
+add_executable(example ../make_hello_sc/sc_main.cpp)
+
+# Add the Verilated circuit to the target
+verilate(example SYSTEMC
+  INCLUDE_DIRS "../make_hello_sc"
+  SOURCES ../make_hello_sc/top.v)
+
+verilator_link_systemc(example)

examples/cmake_hello_sc/Makefile

@@ -0,0 +1,129 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+	TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifneq ($(CMAKE_GT_3_8),true)
+TARGET := oldcmake
+else
+
+# Test existence of SYSTEMC_INCLUDE and SYSTEMC_LIBDIR environment variabless
+ifneq (,$(SYSTEMC_INCLUDE))
+ifneq (,${SYSTEMC_LIBDIR})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test existence of SYSTEMC_ROOT environment variable
+ifneq (SYSTEMC_SET, true)
+ifneq (,${SYSTEMC_ROOT})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test existence of SYSTEMC environment variable
+ifneq (SYSTEMC_SET, true)
+ifneq (,${SYSTEMC})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test whether SystemC is installed with CMake support
+# This will print a CMake error about processing arguments that can (currently) be ignored.
+ifneq (SYSTEMC_SET, true)
+FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
+ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
+SYSTEMC_SET := true
+endif
+endif
+
+ifeq ($(SYSTEMC_SET), true)
+TARGET := run
+else
+TARGET := nosc
+endif
+
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake SystemC hello-world simple example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	@mkdir -p logs
+	build/example
+
+	@echo "-- DONE --------------------"
+	@echo "Note: Once this example is understood, see examples/cmake_tracing_sc."
+	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo
+
+nosc:
+	@echo
+	@echo "%Skip: CMake could not find SystemC."
+	@echo "% Make sure that either:"
+	@echo "% - The environment variables SYSTEMC_INCLUDE and SYSTEMC_LIBDIR are exported."
+	@echo "% - Or, the environment variable SYSTEMC_ROOT is exported."
+	@echo "% - Or, The environment variable SYSTEMC is exported."
+	@echo "% - Or, if the SystemC installation provides CMake support,"
+	@echo "%   that its installation prefix is in CMAKE_PREFIX_PATH."
+	@echo "% Also that the C++ standard of the SystemC library is the same as this example."
+	@echo "% Please see the Verilator documentation's CMake section for more information."
+	@echo

examples/cmake_protect_lib/.gitignore

@@ -0,0 +1 @@
+build*

examples/cmake_protect_lib/CMakeLists.txt

@@ -0,0 +1,60 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt
+#
+# This is an example cmake script to build a verilog to systemc project
+# using cmake and verilator.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the tracing_c example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_c
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_protect_lib)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# Create the main executable target
+add_executable(example ../make_protect_lib/sim_main.cpp)
+
+# Create a secret library
+add_library(verilated_secret STATIC) # or SHARED for a shared library
+target_link_libraries(example PRIVATE verilated_secret)
+# To create both libraries on CMake >= 3.12 replace the above 2 lines with the following:
+# add_library(verilated_secret OBJECT)
+# set_property(TARGET verilated_secret PROPERTY POSITION_INDEPENDENT_CODE 1)
+# add_library(verilated_secret_static STATIC  $<TARGET_OBJECTS:verilated_secret>)
+# set_target_properties(verilated_secret_static PROPERTIES OUTPUT_NAME verilated_secret)
+# add_library(verilated_secret_shared SHARED  $<TARGET_OBJECTS:verilated_secret>)
+# set_target_properties(verilated_secret_shared PROPERTIES OUTPUT_NAME verilated_secret)
+# target_link_libraries(example PRIVATE verilated_secret_static)
+
+# Setup random seed
+verilator_generate_key(KEY_INIT)
+set(PROTECT_KEY ${KEY_INIT} CACHE STRING "Random seed for protection")
+
+# Add the Verilated modules to the targets
+verilate(verilated_secret
+  VERILATOR_ARGS --protect-lib verilated_secret
+                 --protect-key ${PROTECT_KEY}
+  DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/verilated_secret
+  SOURCES ../make_protect_lib/secret_impl.v)
+
+# Include location of verilated_secret.sv wrapper
+verilate(example
+  VERILATOR_ARGS "-I${CMAKE_CURRENT_BINARY_DIR}/verilated_secret"
+  SOURCES ../make_protect_lib/top.v)

examples/cmake_protect_lib/Makefile

@@ -0,0 +1,79 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifeq ($(CMAKE_GT_3_8),true)
+TARGET := run
+else
+TARGET := oldcmake
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake protect_lib example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	build/example
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo

examples/cmake_tracing_c/.gitignore

@@ -0,0 +1,2 @@
+build*
+logs

examples/cmake_tracing_c/CMakeLists.txt

@@ -0,0 +1,38 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with tracing
+#
+# This is an example cmake script to build a verilog to systemc project
+# using cmake and verilator.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the make_tracing_c example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_tracing_c
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_tracing_c)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# Create a new executable target that will contain all your sources
+add_executable(example ../make_tracing_c/sim_main.cpp)
+
+# Add the Verilated circuit to the target
+verilate(example COVERAGE TRACE
+  INCLUDE_DIRS "../make_tracing_c"
+  VERILATOR_ARGS -f ../make_tracing_c/input.vc -O2 -x-assign 0
+  SOURCES ../make_tracing_c/top.v)

examples/cmake_tracing_c/Makefile

@@ -0,0 +1,85 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifeq ($(CMAKE_GT_3_8),true)
+TARGET := run
+else
+TARGET := oldcmake
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake tracing example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	@mkdir -p logs
+	build/example +trace
+
+	@echo
+	@echo "-- COVERAGE ----------------"
+	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
+	@echo
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo

examples/cmake_tracing_sc/.gitignore

@@ -1,8 +1,7 @@
-*.old
 *.dmp
 *.log
 *.csrc
 *.vcd
 obj_*
 logs
-project
+build*

examples/cmake_tracing_sc/CMakeLists.txt

@@ -0,0 +1,47 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with SystemC tracing
+#
+# This is an example cmake script to build a verilog to SystemC project
+# using CMake and Verilator.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the tracing_sc example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_tracing_sc
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_tracing_sc_example)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# SystemC dependencies
+set(THREADS_PREFER_PTHREAD_FLAG ON)
+find_package(Threads REQUIRED)
+
+# Find SystemC using SystemC's CMake integration
+find_package(SystemCLanguage QUIET)
+
+# Create a new executable target that will contain all your sources
+add_executable(example ../make_tracing_sc/sc_main.cpp)
+
+# Add the Verilated circuit to the target
+verilate(example SYSTEMC COVERAGE TRACE
+  INCLUDE_DIRS "../make_tracing_sc"
+  VERILATOR_ARGS -f ../make_tracing_sc/input.vc -O2 -x-assign 0
+  SOURCES ../make_tracing_sc/top.v)
+
+verilator_link_systemc(example)

examples/cmake_tracing_sc/Makefile

@@ -0,0 +1,134 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+	TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifneq ($(CMAKE_GT_3_8),true)
+TARGET := oldcmake
+else
+
+# Test existence of SYSTEMC_INCLUDE and SYSTEMC_LIBDIR environment variabless
+ifneq (,$(SYSTEMC_INCLUDE))
+ifneq (,${SYSTEMC_LIBDIR})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test existence of SYSTEMC_ROOT environment variable
+ifneq (SYSTEMC_SET, true)
+ifneq (,${SYSTEMC_ROOT})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test existence of SYSTEMC environment variable
+ifneq (SYSTEMC_SET, true)
+ifneq (,${SYSTEMC})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test whether SystemC is installed with CMake support
+# This will print a CMake error about processing arguments that can (currently) be ignored.
+ifneq (SYSTEMC_SET, true)
+FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
+ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
+SYSTEMC_SET := true
+endif
+endif
+
+ifeq ($(SYSTEMC_SET), true)
+TARGET := run
+else
+TARGET := nosc
+endif
+
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake SystemC tracing example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	@mkdir -p logs
+	build/example +trace
+
+	@echo
+	@echo "-- COVERAGE ----------------"
+	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
+	@echo
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo
+
+nosc:
+	@echo
+	@echo "%Skip: CMake could not find SystemC."
+	@echo "% Make sure that either:"
+	@echo "% - The environment variables SYSTEMC_INCLUDE and SYSTEMC_LIBDIR are exported."
+	@echo "% - Or, the environment variable SYSTEMC_ROOT is exported."
+	@echo "% - Or, The environment variable SYSTEMC is exported."
+	@echo "% - Or, if the SystemC installation provides CMake support,"
+	@echo "%   that its installation prefix is in CMAKE_PREFIX_PATH."
+	@echo "% Also that the C++ standard of the SystemC library is the same as this example."
+	@echo "% Please see the Verilator documentation's CMake section for more information."
+	@echo

examples/make_hello_c/.gitignore

@@ -3,4 +3,4 @@
 *.csrc
 *.vcd
 obj_*
-project
+logs

examples/make_hello_c/Makefile

@@ -0,0 +1,52 @@
+######################################################################
+#
+# DESCRIPTION: Verilator Example: Small Makefile
+#
+# This calls the object directory makefile.  That allows the objects to
+# be placed in the "current directory" which simplifies the Makefile.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+# Check for sanity to avoid later confusion
+
+ifneq ($(words $(CURDIR)),1)
+ $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+endif
+
+######################################################################
+
+# This is intended to be a minimal example.  Before copying this to start a
+# real project, it is better to start with a more complete example,
+# e.g. examples/make_tracing_c.
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR = verilator
+else
+export VERILATOR_ROOT
+VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+endif
+
+default:
+	@echo "-- Verilator hello-world simple example"
+	@echo "-- VERILATE ----------------"
+	$(VERILATOR) -cc --exe top.v sim_main.cpp
+	@echo "-- COMPILE -----------------"
+	$(MAKE) -j 4 -C obj_dir -f Vtop.mk
+	@echo "-- RUN ---------------------"
+	obj_dir/Vtop
+	@echo "-- DONE --------------------"
+	@echo "Note: Once this example is understood, see examples/make_tracing_c."
+	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
+
+######################################################################
+
+maintainer-copy::
+clean mostlyclean distclean maintainer-clean::
+	-rm -rf obj_dir *.log *.dmp *.vpd core

examples/make_hello_c/sim_main.cpp

@@ -0,0 +1,41 @@
+// DESCRIPTION: Verilator: Verilog example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2017 by Wilson Snyder.
+//======================================================================
+
+// Include common routines
+#include <verilated.h>
+
+// Include model header, generated from Verilating "top.v"
+#include "Vtop.h"
+
+int main(int argc, char** argv, char** env) {
+    // See a similar example walkthrough in the verilator manpage.
+
+    // This is intended to be a minimal example.  Before copying this to start a
+    // real project, it is better to start with a more complete example,
+    // e.g. examples/c_tracing.
+
+    // Prevent unused variable warnings
+    if (0 && argc && argv && env) {}
+
+    // Construct the Verilated model, from Vtop.h generated from Verilating "top.v"
+    Vtop* top = new Vtop;
+
+    // Simulate until $finish
+    while (!Verilated::gotFinish()) {
+
+        // Evaluate model
+        top->eval();
+    }
+
+    // Final model cleanup
+    top->final();
+
+    // Destroy model
+    delete top;
+
+    // Fin
+    exit(0);
+}

examples/make_hello_c/top.v

@@ -0,0 +1,12 @@
+// DESCRIPTION: Verilator: Verilog example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2017 by Wilson Snyder.
+
+// See also the EXAMPLE section in the verilator manpage/document.
+module top;
+   initial begin
+      $display("Hello World!");
+      $finish;
+   end
+endmodule

examples/make_hello_sc/.gitignore

@@ -0,0 +1,6 @@
+*.dmp
+*.log
+*.csrc
+*.vcd
+obj_*
+logs

examples/make_hello_sc/Makefile

@@ -0,0 +1,67 @@
+######################################################################
+#
+# DESCRIPTION: Verilator Example: Small Makefile
+#
+# This calls the object directory makefile.  That allows the objects to
+# be placed in the "current directory" which simplifies the Makefile.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+# Check for sanity to avoid later confusion
+
+ifneq ($(words $(CURDIR)),1)
+ $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+endif
+
+######################################################################
+
+# This is intended to be a minimal example.  Before copying this to start a
+# real project, it is better to start with a more complete example,
+# e.g. examples/make_tracing_sc.
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR = verilator
+else
+export VERILATOR_ROOT
+VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+endif
+
+# Check if SC exists via a verilator call (empty if not)
+SYSTEMC_EXISTS := $(shell $(VERILATOR) --getenv SYSTEMC_INCLUDE)
+
+ifneq ($(SYSTEMC_EXISTS),)
+default: run
+else
+default: nosc
+endif
+
+run:
+	@echo "-- Verilator hello-world simple example"
+	@echo "-- VERILATE ----------------"
+	$(VERILATOR) -sc --exe top.v sc_main.cpp
+	@echo "-- COMPILE -----------------"
+	$(MAKE) -j 4 -C obj_dir -f Vtop.mk
+	@echo "-- RUN ---------------------"
+	obj_dir/Vtop
+	@echo "-- DONE --------------------"
+	@echo "Note: Once this example is understood, see examples/make_tracing_sc."
+	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
+
+######################################################################
+
+nosc:
+	@echo
+	@echo "%Skip: SYSTEMC_INCLUDE not in environment"
+	@echo "(If you have SystemC see the README, and rebuild Verilator)"
+	@echo
+
+maintainer-copy::
+clean mostlyclean distclean maintainer-clean::
+	-rm -rf obj_dir *.log *.dmp *.vpd core

examples/make_hello_sc/sc_main.cpp

@@ -0,0 +1,51 @@
+// -*- SystemC -*-
+// DESCRIPTION: Verilator Example: Top level main for invoking SystemC model
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2017 by Wilson Snyder.
+//======================================================================
+
+// SystemC global header
+#include <systemc.h>
+
+// Include common routines
+#include <verilated.h>
+
+// Include model header, generated from Verilating "top.v"
+#include "Vtop.h"
+
+int sc_main(int argc, char* argv[]) {
+    // See a similar example walkthrough in the verilator manpage.
+
+    // This is intended to be a minimal example.  Before copying this to start a
+    // real project, it is better to start with a more complete example,
+    // e.g. examples/c_tracing.
+
+    // Prevent unused variable warnings
+    if (0 && argc && argv) {}
+
+    // Construct the Verilated model, from Vtop.h generated from Verilating "top.v"
+    Vtop* top = new Vtop("top");
+
+    // Initialize SC model
+#if (SYSTEMC_VERSION>=20070314)
+    sc_start(1,SC_NS);
+#else
+    sc_start(1);
+#endif
+
+    // Simulate until $finish
+    while (!Verilated::gotFinish()) {
+#if (SYSTEMC_VERSION>=20070314)
+        sc_start(1,SC_NS);
+#else
+        sc_start(1);
+#endif
+    }
+
+    // Final model cleanup
+    top->final();
+
+    // Fin
+    return 0;
+}

examples/make_hello_sc/top.v

@@ -0,0 +1,12 @@
+// DESCRIPTION: Verilator: Verilog example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2017 by Wilson Snyder.
+
+// See also the EXAMPLE section in the verilator manpage/document.
+module top;
+   initial begin
+      $display("Hello World!");
+      $finish;
+   end
+endmodule

examples/make_protect_lib/.gitignore

@@ -0,0 +1,2 @@
+obj_*
+logs

examples/make_protect_lib/Makefile

@@ -0,0 +1,97 @@
+######################################################################
+#
+# DESCRIPTION: Verilator Example: --protect-lib Makefile
+#
+# This calls the object directory makefiles.  That allows the objects to
+# be placed in the "current directory" which simplifies the Makefile.
+#
+# Copyright 2019 by Todd Strader. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+# Check for sanity to avoid later confusion
+
+ifneq ($(words $(CURDIR)),1)
+ $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+endif
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR = verilator
+else
+export VERILATOR_ROOT
+VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+endif
+
+VERILATOR_FLAGS =
+# Generate C++
+VERILATOR_FLAGS += -cc
+# Optimize
+VERILATOR_FLAGS += -O2 -x-assign 0
+# Warn abount lint issues; may not want this on less solid designs
+VERILATOR_FLAGS += -Wall
+# Make waveforms
+TOP_VERILATOR_FLAGS = $(VERILATOR_FLAGS) --trace
+
+######################################################################
+default: run
+
+run:
+	@echo
+	@echo "-- Verilator --protect-lib example -_--------------------------"
+
+	@echo
+	@echo "-- VERILATE secret module -------------------------------------"
+	@echo " --protect-lib will produce both a static and shared library"
+	@echo " In this example the static library is used, but some"
+	@echo " simulators may require the shared library."
+	@echo "---------------------------------------------------------------"
+	$(VERILATOR) $(VERILATOR_FLAGS) --protect-lib verilated_secret -Mdir obj_dir_secret/ secret_impl.v
+
+	@echo
+	@echo "-- COMPILE protected library ----------------------------------"
+	@echo " This builds verilated_secret.sv, libverilated_secret.a and"
+	@echo " libverilated_secret.so which can be distributed apart from"
+	@echo " the source"
+	@echo "---------------------------------------------------------------"
+	$(MAKE) -j 4 -C obj_dir_secret -f Vsecret_impl.mk
+
+	@echo
+	@echo "-- VERILATE top module ----------------------------------------"
+	@echo " Use the SystemVerilog wrapper (verilated_secret.sv) and the"
+	@echo " library (libverilated_secret.a) generated from the previous"
+	@echo " step"
+	@echo "---------------------------------------------------------------"
+	$(VERILATOR) $(TOP_VERILATOR_FLAGS) --exe -LDFLAGS '-L../obj_dir_secret -lverilated_secret -static' top.v obj_dir_secret/verilated_secret.sv sim_main.cpp
+
+	@echo
+	@echo "-- COMPILE entire design --------------------------------------"
+	$(MAKE) -j 4 -C obj_dir -f Vtop.mk
+
+	@echo
+	@echo "-- RUN --------------------------------------------------------"
+	@mkdir -p logs
+	obj_dir/Vtop +trace
+
+	@echo
+	@echo "-- DONE -------------------------------------------------------"
+	@echo "To see waveforms, open logs/vlt_dump.vcd in a waveform viewer"
+	@echo
+
+
+######################################################################
+# Other targets
+
+show-config:
+	$(VERILATOR) -V
+
+maintainer-copy::
+clean mostlyclean distclean maintainer-clean::
+	-rm -rf obj_dir* logs *.log core

examples/make_protect_lib/secret_impl.v

@@ -0,0 +1,27 @@
+// DESCRIPTION: Verilator: --protect-lib example secret module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Todd Strader.
+
+// This module will be used as libsecret.a or libsecret.so without
+// exposing the source.
+module secret_impl(
+		   input [31:0]        a,
+		   input [31:0]        b,
+		   output logic [31:0] x,
+		   input 	       clk);
+
+   logic [31:0] 		       accum_q = 0;
+   logic [31:0] 		       secret_value = 9;
+
+   initial $display("%m: initialized");
+
+   always @(posedge clk) begin
+      accum_q <= accum_q + a;
+      if (accum_q > 10)
+        x <= b;
+      else
+        x <= a + b + secret_value;
+   end
+
+endmodule

examples/make_protect_lib/sim_main.cpp

@@ -0,0 +1,72 @@
+// DESCRIPTION: Verilator: --protect-lib example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Todd Strader.
+//======================================================================
+
+// See examples/tracing_c for notes on tracing
+
+// Include common routines
+#include <verilated.h>
+
+#include "Vtop.h"
+
+#if VM_TRACE
+# include <verilated_vcd_c.h>
+#endif
+
+vluint64_t main_time = 0;
+double sc_time_stamp() {
+    return main_time;
+}
+
+int main(int argc, char** argv, char** env) {
+    if (0 && argc && argv && env) {}
+
+    Verilated::debug(0);
+    Verilated::randReset(2);
+    Verilated::commandArgs(argc, argv);
+
+    // Construct the Verilated model, including the secret module
+    Vtop* top = new Vtop;
+
+#if VM_TRACE
+    // When tracing, the contents of the secret module will not be seen
+    VerilatedVcdC* tfp = NULL;
+    const char* flag = Verilated::commandArgsPlusMatch("trace");
+    if (flag && 0==strcmp(flag, "+trace")) {
+        Verilated::traceEverOn(true);
+        VL_PRINTF("Enabling waves into logs/vlt_dump.vcd...\n");
+        tfp = new VerilatedVcdC;
+        top->trace(tfp, 99);
+        Verilated::mkdir("logs");
+        tfp->open("logs/vlt_dump.vcd");
+    }
+#endif
+
+    top->clk = 0;
+
+    // Simulate until $finish
+    while (!Verilated::gotFinish()) {
+        main_time++;
+        top->clk = ~top->clk & 0x1;
+        top->eval();
+#if VM_TRACE
+        if (tfp) tfp->dump(main_time);
+#endif
+    }
+
+    // Final model cleanup
+    top->final();
+
+    // Close trace if opened
+#if VM_TRACE
+    if (tfp) { tfp->close(); tfp = NULL; }
+#endif
+
+    // Destroy model
+    delete top; top = NULL;
+
+    // Fin
+    exit(0);
+}

examples/make_protect_lib/top.v

@@ -0,0 +1,34 @@
+// DESCRIPTION: Verilator: --protect-lib example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Todd Strader.
+
+// See also the EXAMPLE section in the verilator manpage/document.
+module top (input clk);
+
+   integer cyc = 0;
+   logic [31:0] a = 0;
+   logic [31:0] b = 0;
+   logic [31:0] x;
+
+   verilated_secret secret (.a, .b, .x, .clk);
+
+   always @(posedge clk) begin
+      $display("[%0t] cyc=%0d a=%0d b=%0d x=%0d", $time, cyc, a, b, x);
+      cyc <= cyc + 1;
+      if (cyc == 0) begin
+         a <= 5;
+         b <= 7;
+      end else if (cyc == 1) begin
+         a <= 6;
+         b <= 2;
+      end else if (cyc == 2) begin
+         a <= 1;
+         b <= 9;
+      end else if (cyc > 3) begin
+         $display("Done");
+         $finish;
+      end
+   end
+
+endmodule

examples/make_tracing_c/.gitignore

@@ -0,0 +1,6 @@
+*.dmp
+*.log
+*.csrc
+*.vcd
+obj_*
+logs

examples/make_tracing_c/Makefile

@@ -0,0 +1,101 @@
+######################################################################
+#
+# DESCRIPTION: Verilator Example: Small Makefile
+#
+# This calls the object directory makefile.  That allows the objects to
+# be placed in the "current directory" which simplifies the Makefile.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+# Check for sanity to avoid later confusion
+
+ifneq ($(words $(CURDIR)),1)
+ $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+endif
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR = verilator
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+
+VERILATOR_FLAGS =
+# Generate C++ in executable form
+VERILATOR_FLAGS += -cc --exe
+# Generate makefile dependencies (not shown as complicates the Makefile)
+#VERILATOR_FLAGS += -MMD
+# Optimize
+VERILATOR_FLAGS += -O2 -x-assign 0
+# Warn abount lint issues; may not want this on less solid designs
+VERILATOR_FLAGS += -Wall
+# Make waveforms
+VERILATOR_FLAGS += --trace
+# Check SystemVerilog assertions
+VERILATOR_FLAGS += --assert
+# Generate coverage analysis
+VERILATOR_FLAGS += --coverage
+# Run Verilator in debug mode
+#VERILATOR_FLAGS += --debug
+# Add this trace to get a backtrace in gdb
+#VERILATOR_FLAGS += --gdbbt
+
+# Input files for Verilator
+VERILATOR_INPUT = -f input.vc top.v sim_main.cpp
+
+######################################################################
+default: run
+
+run:
+	@echo
+	@echo "-- Verilator tracing example"
+
+	@echo
+	@echo "-- VERILATE ----------------"
+	$(VERILATOR) $(VERILATOR_FLAGS) $(VERILATOR_INPUT)
+
+	@echo
+	@echo "-- COMPILE -----------------"
+# To compile, we can either just do what Verilator asks,
+# or call a submakefile where we can override the rules ourselves
+#	$(MAKE) -j 4 -C obj_dir -f Vtop.mk
+	$(MAKE) -j 4 -C obj_dir -f ../Makefile_obj
+
+	@echo
+	@echo "-- RUN ---------------------"
+	@rm -rf logs
+	@mkdir -p logs
+	obj_dir/Vtop +trace
+
+	@echo
+	@echo "-- COVERAGE ----------------"
+	@rm -rf logs/annotated
+	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
+	@echo
+
+
+######################################################################
+# Other targets
+
+show-config:
+	$(VERILATOR) -V
+
+maintainer-copy::
+clean mostlyclean distclean maintainer-clean::
+	-rm -rf obj_dir logs *.log *.dmp *.vpd coverage.dat core

examples/make_tracing_c/Makefile_obj

@@ -0,0 +1,58 @@
+# -*- Makefile -*-
+#######################################################################
+#
+# DESCRIPTION: Verilator Example: Makefile for inside object directory
+#
+# This is executed in the object directory, and called by ../Makefile
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+#######################################################################
+
+default: Vtop
+
+# Include the rules made by Verilator
+include Vtop.mk
+
+# Use OBJCACHE (ccache) if using gmake and its installed
+COMPILE.cc = $(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c
+
+#######################################################################
+# Compile flags
+
+# Override some default compile flags
+CPPFLAGS += -MMD -MP
+CPPFLAGS += -DVL_DEBUG=1
+# Turn on some more flags (when configured appropriately)
+# For testing inside Verilator, "configure --enable-ccwarn" will do this
+# automatically; otherwise you may want this unconditionally enabled
+ifeq ($(CFG_WITH_CCWARN),yes)	# Local... Else don't burden users
+USER_CPPFLAGS_WALL += -W -Werror -Wall
+endif
+
+# See the benchmarking section of bin/verilator.
+# Support class optimizations.  This includes the tracing and symbol table.
+# SystemC takes minutes to optimize, thus it is off by default.
+OPT_SLOW =
+# Fast path optimizations.  Most time is spent in these classes.
+OPT_FAST = -O2 -fstrict-aliasing
+#OPT_FAST = -O
+#OPT_FAST =
+
+#######################################################################
+# Linking final exe -- presumes have a sim_main.cpp
+
+# Special compile rule
+sim_main.o: sim_main.cpp $(VM_PREFIX).h
+
+######################################################################
+######################################################################
+# Automatically understand dependencies
+
+DEPS := $(wildcard *.d)
+ifneq ($(DEPS),)
+include $(DEPS)
+endif

examples/make_tracing_c/input.vc

@@ -0,0 +1,2 @@
+// This file typically lists flags required by a large project, e.g. include directories
++librescan +libext+.v+.sv+.vh+.svh -y .

examples/make_tracing_c/sim_main.cpp

@@ -0,0 +1,126 @@
+// DESCRIPTION: Verilator: Verilog example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2017 by Wilson Snyder.
+//======================================================================
+
+// Include common routines
+#include <verilated.h>
+
+// Include model header, generated from Verilating "top.v"
+#include "Vtop.h"
+
+// If "verilator --trace" is used, include the tracing class
+#if VM_TRACE
+# include <verilated_vcd_c.h>
+#endif
+
+// Current simulation time (64-bit unsigned)
+vluint64_t main_time = 0;
+// Called by $time in Verilog
+double sc_time_stamp() {
+    return main_time;  // Note does conversion to real, to match SystemC
+}
+
+int main(int argc, char** argv, char** env) {
+    // This is a more complicated example, please also see the simpler examples/make_hello_c.
+
+    // Prevent unused variable warnings
+    if (0 && argc && argv && env) {}
+
+    // Set debug level, 0 is off, 9 is highest presently used
+    // May be overridden by commandArgs
+    Verilated::debug(0);
+
+    // Randomization reset policy
+    // May be overridden by commandArgs
+    Verilated::randReset(2);
+
+    // Pass arguments so Verilated code can see them, e.g. $value$plusargs
+    // This needs to be called before you create any model
+    Verilated::commandArgs(argc, argv);
+
+    // Construct the Verilated model, from Vtop.h generated from Verilating "top.v"
+    Vtop* top = new Vtop;  // Or use a const unique_ptr, or the VL_UNIQUE_PTR wrapper
+
+#if VM_TRACE
+    // If verilator was invoked with --trace argument,
+    // and if at run time passed the +trace argument, turn on tracing
+    VerilatedVcdC* tfp = NULL;
+    const char* flag = Verilated::commandArgsPlusMatch("trace");
+    if (flag && 0==strcmp(flag, "+trace")) {
+        Verilated::traceEverOn(true);  // Verilator must compute traced signals
+        VL_PRINTF("Enabling waves into logs/vlt_dump.vcd...\n");
+        tfp = new VerilatedVcdC;
+        top->trace(tfp, 99);  // Trace 99 levels of hierarchy
+        Verilated::mkdir("logs");
+        tfp->open("logs/vlt_dump.vcd");  // Open the dump file
+    }
+#endif
+
+    // Set some inputs
+    top->reset_l = !0;
+    top->fastclk = 0;
+    top->clk = 0;
+    top->in_small = 1;
+    top->in_quad = 0x1234;
+    top->in_wide[0] = 0x11111111;
+    top->in_wide[1] = 0x22222222;
+    top->in_wide[2] = 0x3;
+
+    // Simulate until $finish
+    while (!Verilated::gotFinish()) {
+        main_time++;  // Time passes...
+
+        // Toggle clocks and such
+        top->fastclk = !top->fastclk;
+        if ((main_time % 10) == 3) {
+            top->clk = 1;
+        }
+        if ((main_time % 10) == 8) {
+            top->clk = 0;
+        }
+        if (main_time > 1 && main_time < 10) {
+            top->reset_l = !1;  // Assert reset
+        } else {
+            top->reset_l = !0;  // Deassert reset
+        }
+
+        // Assign some other inputs
+        top->in_quad += 0x12;
+
+        // Evaluate model
+        top->eval();
+
+#if VM_TRACE
+        // Dump trace data for this cycle
+        if (tfp) tfp->dump(main_time);
+#endif
+
+        // Read outputs
+        VL_PRINTF("[%" VL_PRI64 "d] clk=%x rstl=%x iquad=%" VL_PRI64 "x"
+                  " -> oquad=%" VL_PRI64"x owide=%x_%08x_%08x\n",
+                  main_time, top->clk, top->reset_l, top->in_quad,
+                  top->out_quad, top->out_wide[2], top->out_wide[1], top->out_wide[0]);
+    }
+
+    // Final model cleanup
+    top->final();
+
+    // Close trace if opened
+#if VM_TRACE
+    if (tfp) { tfp->close(); tfp = NULL; }
+#endif
+
+    //  Coverage analysis (since test passed)
+#if VM_COVERAGE
+    Verilated::mkdir("logs");
+    VerilatedCov::write("logs/coverage.dat");
+#endif
+
+    // Destroy model
+    delete top; top = NULL;
+
+    // Fin
+    exit(0);
+}

examples/make_tracing_c/sub.v

@@ -0,0 +1,58 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2003 by Wilson Snyder.
+// ======================================================================
+
+module sub
+  (
+   input clk,
+   input fastclk,
+   input reset_l
+   );
+
+   // Example counter/flop
+   reg [31:0] count_f;
+   always_ff @ (posedge fastclk) begin
+      if (!reset_l) begin
+         /*AUTORESET*/
+         // Beginning of autoreset for uninitialized flops
+         count_f <= 32'h0;
+         // End of automatics
+      end
+      else begin
+         count_f <= count_f + 1;
+      end
+   end
+
+   // Another example flop
+   reg [31:0] count_c;
+   always_ff @ (posedge clk) begin
+      if (!reset_l) begin
+         /*AUTORESET*/
+         // Beginning of autoreset for uninitialized flops
+         count_c <= 32'h0;
+         // End of automatics
+      end
+      else begin
+         count_c <= count_c + 1;
+         if (count_c >= 3) begin
+            $display("[%0t] fastclk is %0d times faster than clk\n",
+                     $time, count_f/count_c);
+            // This write is a magic value the Makefile uses to make sure the
+            // test completes successfully.
+            $write("*-* All Finished *-*\n");
+            $finish;
+         end
+      end
+   end
+
+   // An example assertion
+   always_ff @ (posedge clk) begin
+      AssertionExample: assert (!reset_l || count_c<100);
+   end
+
+   // And example coverage analysis
+   cover property (@(posedge clk) count_c==3);
+
+endmodule

examples/make_tracing_c/top.v

@@ -0,0 +1,42 @@
+// DESCRIPTION: Verilator: Verilog example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2003 by Wilson Snyder.
+// ======================================================================
+
+// This is intended to be a complex example of several features, please also
+// see the simpler examples/make_hello_c.
+
+module top
+  (
+   // Declare some signals so we can see how I/O works
+   input         clk,
+   input         fastclk,
+   input         reset_l,
+
+   output wire [1:0]  out_small,
+   output wire [39:0] out_quad,
+   output wire [69:0] out_wide,
+   input [1:0]   in_small,
+   input [39:0]  in_quad,
+   input [69:0]  in_wide
+   );
+
+   // Connect up the outputs, using some trivial logic
+   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
+   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+
+   // And an example sub module. The submodule will print stuff.
+   sub sub (/*AUTOINST*/
+            // Inputs
+            .clk                        (clk),
+            .fastclk                    (fastclk),
+            .reset_l                    (reset_l));
+
+   // Print some stuff as an example
+   initial begin
+      $display("[%0t] Model running...\n", $time);
+   end
+
+endmodule

examples/make_tracing_sc/.gitignore

@@ -0,0 +1,6 @@
+*.dmp
+*.log
+*.csrc
+*.vcd
+obj_*
+logs

examples/make_tracing_sc/Makefile

@@ -0,0 +1,115 @@
+######################################################################
+#
+# DESCRIPTION: Verilator Example: Small Makefile
+#
+# This calls the object directory makefile.  That allows the objects to
+# be placed in the "current directory" which simplifies the Makefile.
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+# Check for sanity to avoid later confusion
+
+ifneq ($(words $(CURDIR)),1)
+ $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+endif
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR = verilator
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+
+VERILATOR_FLAGS =
+# Generate SystemC in executable form
+VERILATOR_FLAGS += -sc --exe
+# Generate makefile dependencies (not shown as complicates the Makefile)
+#VERILATOR_FLAGS += -MMD
+# Optimize
+VERILATOR_FLAGS += -O2 -x-assign 0
+# Warn abount lint issues; may not want this on less solid designs
+VERILATOR_FLAGS += -Wall
+# Make waveforms
+VERILATOR_FLAGS += --trace
+# Check SystemVerilog assertions
+VERILATOR_FLAGS += --assert
+# Generate coverage analysis
+VERILATOR_FLAGS += --coverage
+# Run Verilator in debug mode
+#VERILATOR_FLAGS += --debug
+# Add this trace to get a backtrace in gdb
+#VERILATOR_FLAGS += --gdbbt
+
+# Input files for Verilator
+VERILATOR_INPUT = -f input.vc top.v sc_main.cpp
+
+# Check if SC exists via a verilator call (empty if not)
+SYSTEMC_EXISTS := $(shell $(VERILATOR) --getenv SYSTEMC_INCLUDE)
+
+######################################################################
+
+ifneq ($(SYSTEMC_EXISTS),)
+default: run
+else
+default: nosc
+endif
+
+run:
+	@echo
+	@echo "-- Verilator tracing example"
+
+	@echo
+	@echo "-- VERILATE ----------------"
+	$(VERILATOR) $(VERILATOR_FLAGS) $(VERILATOR_INPUT)
+
+	@echo
+	@echo "-- COMPILE -----------------"
+# To compile, we can either just do what Verilator asks,
+# or call a submakefile where we can override the rules ourselves
+#	$(MAKE) -j 4 -C obj_dir -f Vtop.mk
+	$(MAKE) -j 4 -C obj_dir -f ../Makefile_obj
+
+	@echo
+	@echo "-- RUN ---------------------"
+	@rm -rf logs
+	@mkdir -p logs
+	obj_dir/Vtop +trace
+
+	@echo
+	@echo "-- COVERAGE ----------------"
+	@rm -rf logs/annotated
+	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
+	@echo
+
+
+######################################################################
+# Other targets
+
+nosc:
+	@echo
+	@echo "%Skip: SYSTEMC_INCLUDE not in environment"
+	@echo "(If you have SystemC see the README, and rebuild Verilator)"
+	@echo
+
+show-config:
+	$(VERILATOR) -V
+
+maintainer-copy::
+clean mostlyclean distclean maintainer-clean::
+	-rm -rf obj_dir logs *.log *.dmp *.vpd coverage.dat core

examples/make_tracing_sc/Makefile_obj

@@ -0,0 +1,66 @@
+# -*- Makefile -*-
+#######################################################################
+#
+# DESCRIPTION: Verilator Example: Makefile for inside object directory
+#
+# This is executed in the object directory, and called by ../Makefile
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+#######################################################################
+
+default: Vtop
+
+# Include the rules made by Verilator
+include Vtop.mk
+
+# Use OBJCACHE (ccache) if using gmake and its installed
+COMPILE.cc = $(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c
+
+#######################################################################
+# Compile flags
+
+# Override some default compile flags
+CPPFLAGS += -MMD -MP
+CPPFLAGS += -DVL_DEBUG=1
+# SystemC isn't too clean
+CPPFLAGS += -Wno-deprecated
+# Turn on some more flags (when configured appropriately)
+# For testing inside Verilator, "configure --enable-ccwarn" will do this
+# automatically; otherwise you may want this unconditionally enabled
+ifeq ($(CFG_WITH_CCWARN),yes)	# Local... Else don't burden users
+USER_CPPFLAGS_WALL += -W -Werror -Wall
+endif
+
+# If you build your own rules from scratch, note you need to include
+# SystemC as follows (Vtop.mk file includes verilated.mk with these
+# already).
+# CPPFLAGS += $(SYSTEMC_CXX_FLAGS) -I$(SYSTEMC_INCLUDE)
+# LDFLAGS  += $(SYSTEMC_CXX_FLAGS) -L$(SYSTEMC_LIBDIR)
+
+# See the benchmarking section of bin/verilator.
+# Support class optimizations.  This includes the tracing and symbol table.
+# SystemC takes minutes to optimize, thus it is off by default.
+OPT_SLOW =
+# Fast path optimizations.  Most time is spent in these classes.
+OPT_FAST = -O2 -fstrict-aliasing
+#OPT_FAST = -O
+#OPT_FAST =
+
+#######################################################################
+# Linking final exe -- presumes have a sim_main.cpp
+
+# Special compile rule
+sim_main.o: sim_main.cpp $(VM_PREFIX).h
+
+######################################################################
+######################################################################
+# Automatically understand dependencies
+
+DEPS := $(wildcard *.d)
+ifneq ($(DEPS),)
+include $(DEPS)
+endif

examples/make_tracing_sc/input.vc

@@ -0,0 +1,2 @@
+// This file typically lists flags required by a large project, e.g. include directories
++librescan +libext+.v+.sv+.vh+.svh -y .

examples/make_tracing_sc/sc_main.cpp

@@ -0,0 +1,150 @@
+// -*- SystemC -*-
+// DESCRIPTION: Verilator Example: Top level main for invoking SystemC model
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2017 by Wilson Snyder.
+//======================================================================
+
+// SystemC global header
+#include <systemc.h>
+
+// Include common routines
+#include <verilated.h>
+#if VM_TRACE
+#include <verilated_vcd_sc.h>
+#endif
+
+#include <sys/stat.h>  // mkdir
+
+// Include model header, generated from Verilating "top.v"
+#include "Vtop.h"
+
+int sc_main(int argc, char* argv[]) {
+    // This is a more complicated example, please also see the simpler examples/make_hello_c.
+
+    // Prevent unused variable warnings
+    if (0 && argc && argv) {}
+
+    // Set debug level, 0 is off, 9 is highest presently used
+    // May be overridden by commandArgs
+    Verilated::debug(0);
+
+    // Randomization reset policy
+    // May be overridden by commandArgs
+    Verilated::randReset(2);
+
+    // Pass arguments so Verilated code can see them, e.g. $value$plusargs
+    // This needs to be called before you create any model
+    Verilated::commandArgs(argc, argv);
+
+    // General logfile
+    ios::sync_with_stdio();
+
+    // Defaults time
+#if (SYSTEMC_VERSION>20011000)
+#else
+    sc_time dut(1.0, sc_ns);
+    sc_set_default_time_unit(dut);
+#endif
+
+    // Define clocks
+#if (SYSTEMC_VERSION>=20070314)
+    sc_clock clk     ("clk",    10,SC_NS, 0.5, 3,SC_NS, true);
+    sc_clock fastclk ("fastclk", 2,SC_NS, 0.5, 2,SC_NS, true);
+#else
+    sc_clock clk     ("clk",    10, 0.5, 3, true);
+    sc_clock fastclk ("fastclk", 2, 0.5, 2, true);
+#endif
+
+    // Define interconnect
+    sc_signal<bool> reset_l;
+    sc_signal<vluint32_t> in_small;
+    sc_signal<vluint64_t> in_quad;
+    sc_signal<sc_bv<70> > in_wide;
+    sc_signal<vluint32_t> out_small;
+    sc_signal<vluint64_t> out_quad;
+    sc_signal<sc_bv<70> > out_wide;
+
+    // Construct the Verilated model, from inside Vtop.h
+    Vtop* top = new Vtop("top");
+    // Attach signals to the model
+    top->clk       (clk);
+    top->fastclk   (fastclk);
+    top->reset_l   (reset_l);
+    top->in_small  (in_small);
+    top->in_quad   (in_quad);
+    top->in_wide   (in_wide);
+    top->out_small (out_small);
+    top->out_quad  (out_quad);
+    top->out_wide  (out_wide);
+
+#if VM_TRACE
+    // Before any evaluation, need to know to calculate those signals only used for tracing
+    Verilated::traceEverOn(true);
+#endif
+
+    // You must do one evaluation before enabling waves, in order to allow
+    // SystemC to interconnect everything for testing.
+#if (SYSTEMC_VERSION>=20070314)
+    sc_start(1,SC_NS);
+#else
+    sc_start(1);
+#endif
+
+#if VM_TRACE
+    // If verilator was invoked with --trace argument,
+    // and if at run time passed the +trace argument, turn on tracing
+    VerilatedVcdSc* tfp = NULL;
+    const char* flag = Verilated::commandArgsPlusMatch("trace");
+    if (flag && 0==strcmp(flag, "+trace")) {
+        cout << "Enabling waves into logs/vlt_dump.vcd...\n";
+        tfp = new VerilatedVcdSc;
+        top->trace(tfp, 99);  // Trace 99 levels of hierarchy
+        Verilated::mkdir("logs");
+        tfp->open("logs/vlt_dump.vcd");
+    }
+#endif
+
+    // Simulate until $finish
+    while (!Verilated::gotFinish()) {
+#if VM_TRACE
+        // Flush the wave files each cycle so we can immediately see the output
+        // Don't do this in "real" programs, do it in an abort() handler instead
+        if (tfp) tfp->flush();
+#endif
+
+        // Apply inputs
+        if (VL_TIME_Q() > 1 && VL_TIME_Q() < 10) {
+            reset_l = !1;  // Assert reset
+        } else if (VL_TIME_Q() > 1) {
+            reset_l = !0;  // Deassert reset
+        }
+
+        // Simulate 1ns
+#if (SYSTEMC_VERSION>=20070314)
+        sc_start(1,SC_NS);
+#else
+        sc_start(1);
+#endif
+    }
+
+    // Final model cleanup
+    top->final();
+
+    // Close trace if opened
+#if VM_TRACE
+    if (tfp) { tfp->close(); tfp = NULL; }
+#endif
+
+    //  Coverage analysis (since test passed)
+#if VM_COVERAGE
+    Verilated::mkdir("logs");
+    VerilatedCov::write("logs/coverage.dat");
+#endif
+
+    // Destroy model
+    delete top; top = NULL;
+
+    // Fin
+    return 0;
+}

examples/make_tracing_sc/sub.v

@@ -0,0 +1,58 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2003 by Wilson Snyder.
+// ======================================================================
+
+module sub
+  (
+   input clk,
+   input fastclk,
+   input reset_l
+   );
+
+   // Example counter/flop
+   reg [31:0] count_f;
+   always_ff @ (posedge fastclk) begin
+      if (!reset_l) begin
+         /*AUTORESET*/
+         // Beginning of autoreset for uninitialized flops
+         count_f <= 32'h0;
+         // End of automatics
+      end
+      else begin
+         count_f <= count_f + 1;
+      end
+   end
+
+   // Another example flop
+   reg [31:0] count_c;
+   always_ff @ (posedge clk) begin
+      if (!reset_l) begin
+         /*AUTORESET*/
+         // Beginning of autoreset for uninitialized flops
+         count_c <= 32'h0;
+         // End of automatics
+      end
+      else begin
+         count_c <= count_c + 1;
+         if (count_c >= 3) begin
+            $display("[%0t] fastclk is %0d times faster than clk\n",
+                     $time, count_f/count_c);
+            // This write is a magic value the Makefile uses to make sure the
+            // test completes successfully.
+            $write("*-* All Finished *-*\n");
+            $finish;
+         end
+      end
+   end
+
+   // An example assertion
+   always_ff @ (posedge clk) begin
+      AssertionExample: assert(!reset_l || count_c<100);
+   end
+
+   // And example coverage analysis
+   cover property (@(posedge clk) count_c==3);
+
+endmodule

examples/make_tracing_sc/top.v

@@ -0,0 +1,42 @@
+// DESCRIPTION: Verilator: Verilog example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2003 by Wilson Snyder.
+// ======================================================================
+
+// This is intended to be a complex example of several features, please also
+// see the simpler examples/make_hello_c.
+
+module top
+  (
+   // Declare some signals so we can see how I/O works
+   input         clk,
+   input         fastclk,
+   input         reset_l,
+
+   output wire [1:0]  out_small,
+   output wire [39:0] out_quad,
+   output wire [69:0] out_wide,
+   input [1:0]   in_small,
+   input [39:0]  in_quad,
+   input [69:0]  in_wide
+   );
+
+   // Connect up the outputs, using some trivial logic
+   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
+   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+
+   // And an example sub module. The submodule will print stuff.
+   sub sub (/*AUTOINST*/
+            // Inputs
+            .clk                        (clk),
+            .fastclk                    (fastclk),
+            .reset_l                    (reset_l));
+
+   // Print some stuff as an example
+   initial begin
+      $display("[%0t] Model running...\n", $time);
+   end
+
+endmodule

examples/xml_py/.gitignore

@@ -0,0 +1,6 @@
+obj_*
+copied
+*.csv
+*.dot
+*.dmp
+*.pdf

examples/xml_py/Makefile

@@ -0,0 +1,62 @@
+######################################################################
+#
+# DESCRIPTION: Verilator Example: XML tests
+#
+# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This makefile is not intended to be useful as an example itself,
+# it is just to run the small example scripts in this directory.
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR = verilator
+else
+export VERILATOR_ROOT
+VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+endif
+
+DOT = dot
+PYTHON = python3
+
+PYTHON_VERSION := $(shell ${PYTHON} --version 2>&1)
+PYTHON_VERSION_FULL := $(wordlist 2,4,$(subst ., ,${PYTHON_VERSION}))
+PYTHON_VERSION_MAJOR := $(word 1,${PYTHON_VERSION_FULL})
+PYTHON_VERSION_MINOR := $(word 2,${PYTHON_VERSION_FULL})
+PYTHON_GE_3_5 := $(shell [ ${PYTHON_VERSION_MAJOR} -eq 3 -a ${PYTHON_VERSION_MINOR} -ge 5 ] && echo true)
+
+ifeq (${PYTHON_GE_3_5},true)
+default: test
+else
+default: python_message
+endif
+
+python_message:
+	@echo "Found Python version ${PYTHON_VERSION}, but require >= 3.5"
+
+test: \
+	test-vl_file_copy \
+	test-vl_hier_graph \
+
+test-vl_file_copy:
+	@echo "-- vl_file_copy example"
+	$(PYTHON) vl_file_copy -odir copied top.v
+	@cmp copied/top.v top.v
+	@cmp copied/sub.v sub.v
+
+test-vl_hier_graph:
+	@echo "-- vl_hier_graph example"
+	$(PYTHON) vl_hier_graph -o graph.dot top.v
+	@echo "Manually run: " $(DOT) -Tpdf -o graph.pdf graph.dot
+
+######################################################################
+
+maintainer-copy::
+clean mostlyclean distclean maintainer-clean::
+	-rm -rf obj_dir *.log *.csv *.dmp *.dot *.vpd *.pdf core copied

examples/xml_py/sub.v

@@ -0,0 +1,17 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Wilson Snyder.
+// ======================================================================
+
+module sub
+  #(parameter type TYPE_t = logic)
+   (
+    input TYPE_t in,
+    output TYPE_t out
+    );
+
+   // Some simple logic
+   always_comb out = ~ in;
+
+endmodule

examples/xml_py/top.v

@@ -0,0 +1,32 @@
+// DESCRIPTION: Verilator: Verilog example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Wilson Snyder.
+// ======================================================================
+
+module top
+  (
+   input         clk,
+   input         fastclk,
+   input         reset_l,
+
+   output wire [1:0]  out_small,
+   output wire [39:0] out_quad,
+   output wire [69:0] out_wide,
+   input [1:0]   in_small,
+   input [39:0]  in_quad,
+   input [69:0]  in_wide
+   );
+
+   sub #(.TYPE_t(logic [1:0])) sub_small
+     (.in(in_small),
+      .out(out_small));
+
+   sub #(.TYPE_t(logic [39:0])) sub_quad
+     (.in(in_quad),
+      .out(out_quad));
+
+   sub #(.TYPE_t(logic [69:0])) sub_wide
+     (.in(in_wide),
+      .out(out_wide));
+endmodule

examples/xml_py/vl_file_copy

@@ -0,0 +1,112 @@
+#!/usr/bin/env python3
+# -*- Python -*- See copyright, etc below
+######################################################################
+
+import argparse
+import os
+import re
+import subprocess
+import sys
+import tempfile
+import xml.etree.ElementTree as ET
+from shutil import copy2
+from pprint import pprint,pformat
+
+#######################################################################
+
+class VlFileCopy:
+    def __init__(self,
+                 verilator_args,  # presently all verilator options are passed-thru
+                 # ideally this script would check against options mentioned in help
+                 debug=0,
+                 output_dir='copied'):  # directory name we output file uses
+        self.debug = debug
+
+        xml_temp = tempfile.NamedTemporaryFile()
+
+        args = ['--xml-output', xml_temp.name,
+                '--bbox-sys',  # Parse some stuff can't translate
+                '--bbox-unsup',
+                '--prefix vlxml']  # So we know name of .xml output
+        args += verilator_args
+        self.run_verilator(args)
+        self.tree = ET.parse(xml_temp.name)
+
+        os.makedirs(output_dir, 0o777, True)
+
+        # Find and copy the files
+        root = self.tree.getroot()
+        xfiles = root.find('files')
+        for xfile in xfiles.findall('file'):
+            filename = xfile.get('filename')
+            if not re.match('^<', filename):  # e.g. <built-in>
+                if self.debug:
+                    print("\tcp %s %s" % (filename, output_dir))
+                copy2(filename, output_dir)
+
+    def run_verilator(self, args):
+        """Run Verilator command, check errors"""
+        if os.getenv("VERILATOR_ROOT"):
+            command = os.getenv("VERILATOR_ROOT") + "/bin/verilator"
+        else:
+            command = "verilator"
+        command += ' ' + ' '.join(args)
+        if self.debug:
+            print("\t%s " % command)
+        status = subprocess.call(command, shell=True)
+        if status != 0:
+            raise Exception("Command failed running Verilator with '"+command+"', stopped")
+
+#######################################################################
+
+if __name__=='__main__':
+    parser = argparse.ArgumentParser(
+        allow_abbrev=False,
+        formatter_class=argparse.RawTextHelpFormatter,
+        description=
+"""Example of using Verilator XML output to copy a list of files to an
+output directory (-odir, defaults to 'copied'), e.g. to easily create a
+tarball of the design to pass to others.
+
+Example usage:
+     vl_file_copy -f input.vc top.v -odir mycopy
+     # This will make at least mycopy/top.v
+""",
+        epilog=
+"""All other arguments are pass-thru to Verilator: e.g.:
+
+  +define+<var>=<value>      Set preprocessor define
+  -F <file>                  Parse options from a file, relatively
+  -f <file>                  Parse options from a file
+  -G<name>=<value>           Overwrite toplevel parameter
+  +incdir+<dir>              Directory to search for includes
+  +libext+<ext>+[ext]...     Extensions for finding modules
+  -v <filename>              Verilog library
+  -y <dir>                   Directory to search for modules
+
+This file ONLY is placed into the Public Domain, for any use, without
+warranty, 2019 by Wilson Snyder."""
+    )
+    parser.add_argument('-debug', '--debug',
+                        action='store_const', const=9,
+                        help='enable debug')
+    parser.add_argument('-odir', '--odir',
+                        action='store', metavar='directory', required=True,
+                        help='target output directory')
+    (args, rem) = parser.parse_known_args()
+
+    print("NOTE: vl_file_copy is only an example starting point for writing your own tool.")
+    # That is:
+    # 1. We will accept basic patches
+    # 2. We are not expecting to make this globally useful. (e.g. we don't cleanup obj_dir)
+    # 3. "make install" will not install this.
+    # 4. This has not had production-worthy validation.
+
+    fc = VlFileCopy(output_dir = args.odir,
+                    debug = args.debug,
+                    verilator_args = rem)
+
+######################################################################
+### Local Variables:
+### compile-command: "./vl_file_copy -h ; VERILATOR_ROOT=$V4 ./vl_file_copy +define+thru top.v"
+### End:

examples/xml_py/vl_hier_graph

@@ -0,0 +1,136 @@
+#!/usr/bin/env python3
+# -*- Python -*- See copyright, etc below
+######################################################################
+
+import argparse
+import os
+import re
+import subprocess
+import sys
+import tempfile
+import xml.etree.ElementTree as ET
+from shutil import copy2
+from pprint import pprint,pformat
+
+#######################################################################
+
+class VlHierGraph:
+    def __init__(self,
+                 verilator_args,  # presently all verilator options are passed-thru
+                 # ideally this script would check against options mentioned in help
+                 debug=0,
+                 output_filename='graph.dot'):  # output filename
+        self.debug = debug
+        self.next_vertex_number = 0
+        self.name_to_number = {}
+
+        xml_temp = tempfile.NamedTemporaryFile()
+
+        args = ['--xml-output', xml_temp.name,
+                '--bbox-sys',  # Parse some stuff can't translate
+                '--bbox-unsup',
+                '--prefix vlxml']  # So we know name of .xml output
+        args += verilator_args
+        self.run_verilator(args)
+        self.tree = ET.parse(xml_temp.name)
+
+        with open(output_filename, "w") as fh:
+            # For more serious purposes, use the python graphviz package instead
+            fh.write("digraph {\n")
+            fh.write("  dpi=300;\n")
+            fh.write("  order=LR;\n")
+            fh.write("  node [fontsize=8 shape=\"box\" margin=0.01 width=0 height=0]")
+            fh.write("  edge [fontsize=6]")
+            # Find cells
+            root = self.tree.getroot()
+            netlist = root.find('netlist')
+            for module in netlist.findall('module'):
+                # origNames are before parameterization, name if after
+                mod_name = module.get('name')
+                mod_number = self.name_to_vertex_number(mod_name)
+                fh.write("  n%d [label=\"%s\""
+                         % (mod_number, mod_name))
+                if module.get('topModule'):
+                    fh.write(" color=\"red\" rank=1")
+                fh.write("];\n")
+
+                for instance in module.findall('instance'):
+                    inst_name = instance.get('name')
+                    def_name = instance.get('defName')
+                    def_number = self.name_to_vertex_number(def_name)
+                    fh.write("  n%d->n%d [label=\"%s\"];\n"
+                             % (mod_number, def_number, inst_name));
+
+            fh.write("}\n")
+
+    def name_to_vertex_number(self, name):
+        if not name in self.name_to_number:
+            self.next_vertex_number += 1
+            self.name_to_number[name] = self.next_vertex_number
+        return self.name_to_number[name]
+
+    def run_verilator(self, args):
+        """Run Verilator command, check errors"""
+        if os.getenv("VERILATOR_ROOT"):
+            command = os.getenv("VERILATOR_ROOT") + "/bin/verilator"
+        else:
+            command = "verilator"
+        command += ' ' + ' '.join(args)
+        if self.debug:
+            print("\t%s " % command)
+        status = subprocess.call(command, shell=True)
+        if status != 0:
+            raise Exception("Command failed running Verilator with '"+command+"', stopped")
+
+#######################################################################
+
+if __name__=='__main__':
+    parser = argparse.ArgumentParser(
+        allow_abbrev=False,
+        formatter_class=argparse.RawTextHelpFormatter,
+        description=
+"""Example of using Verilator XML output to create a .dot file showing the
+design module hierarchy.
+
+Example usage:
+     vl_hier_graph -f input.vc top.v -o graph.dot
+     dot -Tpdf -o graph.pdf graph.dot
+""",
+        epilog=
+"""All other arguments are pass-thru to Verilator: e.g.:
+
+  +define+<var>=<value>      Set preprocessor define
+  -F <file>                  Parse options from a file, relatively
+  -f <file>                  Parse options from a file
+  -G<name>=<value>           Overwrite toplevel parameter
+  +incdir+<dir>              Directory to search for includes
+  +libext+<ext>+[ext]...     Extensions for finding modules
+  -v <filename>              Verilog library
+  -y <dir>                   Directory to search for modules
+
+This file ONLY is placed into the Public Domain, for any use, without
+warranty, 2019 by Wilson Snyder."""
+    )
+    parser.add_argument('-debug', '--debug',
+                        action='store_const', const=9,
+                        help='enable debug')
+    parser.add_argument('-o', '--o',
+                        action='store', metavar='filename', required=True,
+                        help='output filename')
+    (args, rem) = parser.parse_known_args()
+
+    print("NOTE: vl_hier_graph is only an example starting point for writing your own tool.")
+    # That is:
+    # 1. We will accept basic patches
+    # 2. We are not expecting to make this globally useful. (e.g. we don't cleanup obj_dir)
+    # 3. "make install" will not install this.
+    # 4. This has not had production-worthy validation.
+
+    fc = VlHierGraph(output_filename = args.o,
+                     debug = args.debug,
+                     verilator_args = rem)
+
+######################################################################
+### Local Variables:
+### compile-command: "./vl_hier_graph -h ; VERILATOR_ROOT=$V4 ./vl_hier_graph +define+thru top.v"
+### End:

include/gtkwave/fastlz.c

@@ -0,0 +1,549 @@
+/*
+  FastLZ - lightning-fast lossless compression library
+
+  Copyright (C) 2007 Ariya Hidayat ([email protected])
+  Copyright (C) 2006 Ariya Hidayat ([email protected])
+  Copyright (C) 2005 Ariya Hidayat ([email protected])
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in
+  all copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+#include "fastlz.h"
+
+#if !defined(FASTLZ__COMPRESSOR) && !defined(FASTLZ_DECOMPRESSOR)
+
+/*
+ * Always check for bound when decompressing.
+ * Generally it is best to leave it defined.
+ */
+#define FASTLZ_SAFE
+
+
+/*
+ * Give hints to the compiler for branch prediction optimization.
+ */
+#if defined(__GNUC__) && (__GNUC__ > 2)
+#define FASTLZ_EXPECT_CONDITIONAL(c)    (__builtin_expect((c), 1))
+#define FASTLZ_UNEXPECT_CONDITIONAL(c)  (__builtin_expect((c), 0))
+#else
+#define FASTLZ_EXPECT_CONDITIONAL(c)    (c)
+#define FASTLZ_UNEXPECT_CONDITIONAL(c)  (c)
+#endif
+
+/*
+ * Use inlined functions for supported systems.
+ */
+#if defined(__GNUC__) || defined(__DMC__) || defined(__POCC__) || defined(__WATCOMC__) || defined(__SUNPRO_C)
+#define FASTLZ_INLINE inline
+#elif defined(__BORLANDC__) || defined(_MSC_VER) || defined(__LCC__)
+#define FASTLZ_INLINE __inline
+#else
+#define FASTLZ_INLINE
+#endif
+
+/*
+ * Prevent accessing more than 8-bit at once, except on x86 architectures.
+ */
+#if !defined(FASTLZ_STRICT_ALIGN)
+#define FASTLZ_STRICT_ALIGN
+#if defined(__i386__) || defined(__386)  /* GNU C, Sun Studio */
+#undef FASTLZ_STRICT_ALIGN
+#elif defined(__i486__) || defined(__i586__) || defined(__i686__) || defined(__amd64) /* GNU C */
+#undef FASTLZ_STRICT_ALIGN
+#elif defined(_M_IX86) /* Intel, MSVC */
+#undef FASTLZ_STRICT_ALIGN
+#elif defined(__386)
+#undef FASTLZ_STRICT_ALIGN
+#elif defined(_X86_) /* MinGW */
+#undef FASTLZ_STRICT_ALIGN
+#elif defined(__I86__) /* Digital Mars */
+#undef FASTLZ_STRICT_ALIGN
+#endif
+#endif
+
+/* prototypes */
+int fastlz_compress(const void* input, int length, void* output);
+int fastlz_compress_level(int level, const void* input, int length, void* output);
+int fastlz_decompress(const void* input, int length, void* output, int maxout);
+
+#define MAX_COPY       32
+#define MAX_LEN       264  /* 256 + 8 */
+#define MAX_DISTANCE 8192
+
+#if !defined(FASTLZ_STRICT_ALIGN)
+#define FASTLZ_READU16(p) *((const flzuint16*)(p))
+#else
+#define FASTLZ_READU16(p) ((p)[0] | (p)[1]<<8)
+#endif
+
+#define HASH_LOG  13
+#define HASH_SIZE (1<< HASH_LOG)
+#define HASH_MASK  (HASH_SIZE-1)
+#define HASH_FUNCTION(v,p) { v = FASTLZ_READU16(p); v ^= FASTLZ_READU16(p+1)^(v>>(16-HASH_LOG));v &= HASH_MASK; }
+
+#undef FASTLZ_LEVEL
+#define FASTLZ_LEVEL 1
+
+#undef FASTLZ_COMPRESSOR
+#undef FASTLZ_DECOMPRESSOR
+#define FASTLZ_COMPRESSOR fastlz1_compress
+#define FASTLZ_DECOMPRESSOR fastlz1_decompress
+static FASTLZ_INLINE int FASTLZ_COMPRESSOR(const void* input, int length, void* output);
+static FASTLZ_INLINE int FASTLZ_DECOMPRESSOR(const void* input, int length, void* output, int maxout);
+#include "fastlz.c"
+
+#undef FASTLZ_LEVEL
+#define FASTLZ_LEVEL 2
+
+#undef MAX_DISTANCE
+#define MAX_DISTANCE 8191
+#define MAX_FARDISTANCE (65535+MAX_DISTANCE-1)
+
+#undef FASTLZ_COMPRESSOR
+#undef FASTLZ_DECOMPRESSOR
+#define FASTLZ_COMPRESSOR fastlz2_compress
+#define FASTLZ_DECOMPRESSOR fastlz2_decompress
+static FASTLZ_INLINE int FASTLZ_COMPRESSOR(const void* input, int length, void* output);
+static FASTLZ_INLINE int FASTLZ_DECOMPRESSOR(const void* input, int length, void* output, int maxout);
+#include "fastlz.c"
+
+int fastlz_compress(const void* input, int length, void* output)
+{
+  /* for short block, choose fastlz1 */
+  if(length < 65536)
+    return fastlz1_compress(input, length, output);
+
+  /* else... */
+  return fastlz2_compress(input, length, output);
+}
+
+int fastlz_decompress(const void* input, int length, void* output, int maxout)
+{
+  /* magic identifier for compression level */
+  int level = ((*(const flzuint8*)input) >> 5) + 1;
+
+  if(level == 1)
+    return fastlz1_decompress(input, length, output, maxout);
+  if(level == 2)
+    return fastlz2_decompress(input, length, output, maxout);
+
+  /* unknown level, trigger error */
+  return 0;
+}
+
+int fastlz_compress_level(int level, const void* input, int length, void* output)
+{
+  if(level == 1)
+    return fastlz1_compress(input, length, output);
+  if(level == 2)
+    return fastlz2_compress(input, length, output);
+
+  return 0;
+}
+
+#else /* !defined(FASTLZ_COMPRESSOR) && !defined(FASTLZ_DECOMPRESSOR) */
+
+static FASTLZ_INLINE int FASTLZ_COMPRESSOR(const void* input, int length, void* output)
+{
+  const flzuint8* ip = (const flzuint8*) input;
+  const flzuint8* ip_bound = ip + length - 2;
+  const flzuint8* ip_limit = ip + length - 12;
+  flzuint8* op = (flzuint8*) output;
+
+  const flzuint8* htab[HASH_SIZE];
+  const flzuint8** hslot;
+  flzuint32 hval;
+
+  flzuint32 copy;
+
+  /* sanity check */
+  if(FASTLZ_UNEXPECT_CONDITIONAL(length < 4))
+  {
+    if(length)
+    {
+      /* create literal copy only */
+      *op++ = length-1;
+      ip_bound++;
+      while(ip <= ip_bound)
+        *op++ = *ip++;
+      return length+1;
+    }
+    else
+      return 0;
+  }
+
+  /* initializes hash table */
+  for (hslot = htab; hslot < htab + HASH_SIZE; hslot++)
+    *hslot = ip;
+
+  /* we start with literal copy */
+  copy = 2;
+  *op++ = MAX_COPY-1;
+  *op++ = *ip++;
+  *op++ = *ip++;
+
+  /* main loop */
+  while(FASTLZ_EXPECT_CONDITIONAL(ip < ip_limit))
+  {
+    const flzuint8* ref;
+    flzuint32 distance;
+
+    /* minimum match length */
+    flzuint32 len = 3;
+
+    /* comparison starting-point */
+    const flzuint8* anchor = ip;
+
+    /* check for a run */
+#if FASTLZ_LEVEL==2
+    if(ip[0] == ip[-1] && FASTLZ_READU16(ip-1)==FASTLZ_READU16(ip+1))
+    {
+      distance = 1;
+      /* ip += 3; */ /* scan-build, never used */
+      ref = anchor - 1 + 3;
+      goto match;
+    }
+#endif
+
+    /* find potential match */
+    HASH_FUNCTION(hval,ip);
+    hslot = htab + hval;
+    ref = htab[hval];
+
+    /* calculate distance to the match */
+    distance = anchor - ref;
+
+    /* update hash table */
+    *hslot = anchor;
+
+    /* is this a match? check the first 3 bytes */
+    if(distance==0 ||
+#if FASTLZ_LEVEL==1
+    (distance >= MAX_DISTANCE) ||
+#else
+    (distance >= MAX_FARDISTANCE) ||
+#endif
+    *ref++ != *ip++ || *ref++!=*ip++ || *ref++!=*ip++)
+      goto literal;
+
+#if FASTLZ_LEVEL==2
+    /* far, needs at least 5-byte match */
+    if(distance >= MAX_DISTANCE)
+    {
+      if(*ip++ != *ref++ || *ip++!= *ref++)
+        goto literal;
+      len += 2;
+    }
+
+    match:
+#endif
+
+    /* last matched byte */
+    ip = anchor + len;
+
+    /* distance is biased */
+    distance--;
+
+    if(!distance)
+    {
+      /* zero distance means a run */
+      flzuint8 x = ip[-1];
+      while(ip < ip_bound)
+        if(*ref++ != x) break; else ip++;
+    }
+    else
+    for(;;)
+    {
+      /* safe because the outer check against ip limit */
+      if(*ref++ != *ip++) break;
+      if(*ref++ != *ip++) break;
+      if(*ref++ != *ip++) break;
+      if(*ref++ != *ip++) break;
+      if(*ref++ != *ip++) break;
+      if(*ref++ != *ip++) break;
+      if(*ref++ != *ip++) break;
+      if(*ref++ != *ip++) break;
+      while(ip < ip_bound)
+        if(*ref++ != *ip++) break;
+      break;
+    }
+
+    /* if we have copied something, adjust the copy count */
+    if(copy)
+      /* copy is biased, '0' means 1 byte copy */
+      *(op-copy-1) = copy-1;
+    else
+      /* back, to overwrite the copy count */
+      op--;
+
+    /* reset literal counter */
+    copy = 0;
+
+    /* length is biased, '1' means a match of 3 bytes */
+    ip -= 3;
+    len = ip - anchor;
+
+    /* encode the match */
+#if FASTLZ_LEVEL==2
+    if(distance < MAX_DISTANCE)
+    {
+      if(len < 7)
+      {
+        *op++ = (len << 5) + (distance >> 8);
+        *op++ = (distance & 255);
+      }
+      else
+      {
+        *op++ = (7 << 5) + (distance >> 8);
+        for(len-=7; len >= 255; len-= 255)
+          *op++ = 255;
+        *op++ = len;
+        *op++ = (distance & 255);
+      }
+    }
+    else
+    {
+      /* far away, but not yet in the another galaxy... */
+      if(len < 7)
+      {
+        distance -= MAX_DISTANCE;
+        *op++ = (len << 5) + 31;
+        *op++ = 255;
+        *op++ = distance >> 8;
+        *op++ = distance & 255;
+      }
+      else
+      {
+        distance -= MAX_DISTANCE;
+        *op++ = (7 << 5) + 31;
+        for(len-=7; len >= 255; len-= 255)
+          *op++ = 255;
+        *op++ = len;
+        *op++ = 255;
+        *op++ = distance >> 8;
+        *op++ = distance & 255;
+      }
+    }
+#else
+
+    if(FASTLZ_UNEXPECT_CONDITIONAL(len > MAX_LEN-2))
+      while(len > MAX_LEN-2)
+      {
+        *op++ = (7 << 5) + (distance >> 8);
+        *op++ = MAX_LEN - 2 - 7 -2;
+        *op++ = (distance & 255);
+        len -= MAX_LEN-2;
+      }
+
+    if(len < 7)
+    {
+      *op++ = (len << 5) + (distance >> 8);
+      *op++ = (distance & 255);
+    }
+    else
+    {
+      *op++ = (7 << 5) + (distance >> 8);
+      *op++ = len - 7;
+      *op++ = (distance & 255);
+    }
+#endif
+
+    /* update the hash at match boundary */
+    HASH_FUNCTION(hval,ip);
+    htab[hval] = ip++;
+    HASH_FUNCTION(hval,ip);
+    htab[hval] = ip++;
+
+    /* assuming literal copy */
+    *op++ = MAX_COPY-1;
+
+    continue;
+
+    literal:
+      *op++ = *anchor++;
+      ip = anchor;
+      copy++;
+      if(FASTLZ_UNEXPECT_CONDITIONAL(copy == MAX_COPY))
+      {
+        copy = 0;
+        *op++ = MAX_COPY-1;
+      }
+  }
+
+  /* left-over as literal copy */
+  ip_bound++;
+  while(ip <= ip_bound)
+  {
+    *op++ = *ip++;
+    copy++;
+    if(copy == MAX_COPY)
+    {
+      copy = 0;
+      *op++ = MAX_COPY-1;
+    }
+  }
+
+  /* if we have copied something, adjust the copy length */
+  if(copy)
+    *(op-copy-1) = copy-1;
+  else
+    op--;
+
+#if FASTLZ_LEVEL==2
+  /* marker for fastlz2 */
+  *(flzuint8*)output |= (1 << 5);
+#endif
+
+  return op - (flzuint8*)output;
+}
+
+static FASTLZ_INLINE int FASTLZ_DECOMPRESSOR(const void* input, int length, void* output, int maxout)
+{
+  const flzuint8* ip = (const flzuint8*) input;
+  const flzuint8* ip_limit  = ip + length;
+  flzuint8* op = (flzuint8*) output;
+#ifdef FASTLZ_SAFE
+  flzuint8* op_limit = op + maxout;
+#endif
+  flzuint32 ctrl = (*ip++) & 31;
+  int loop = 1;
+
+  do
+  {
+    const flzuint8* ref = op;
+    flzuint32 len = ctrl >> 5;
+    flzuint32 ofs = (ctrl & 31) << 8;
+
+    if(ctrl >= 32)
+    {
+#if FASTLZ_LEVEL==2
+      flzuint8 code;
+#endif
+      len--;
+      ref -= ofs;
+      if (len == 7-1)
+#if FASTLZ_LEVEL==1
+        len += *ip++;
+      ref -= *ip++;
+#else
+        do
+        {
+          code = *ip++;
+          len += code;
+        } while (code==255);
+      code = *ip++;
+      ref -= code;
+
+      /* match from 16-bit distance */
+      if(FASTLZ_UNEXPECT_CONDITIONAL(code==255))
+      if(FASTLZ_EXPECT_CONDITIONAL(ofs==(31 << 8)))
+      {
+        ofs = (*ip++) << 8;
+        ofs += *ip++;
+        ref = op - ofs - MAX_DISTANCE;
+      }
+#endif
+
+#ifdef FASTLZ_SAFE
+      if (FASTLZ_UNEXPECT_CONDITIONAL(op + len + 3 > op_limit))
+        return 0;
+
+      if (FASTLZ_UNEXPECT_CONDITIONAL(ref-1 < (flzuint8 *)output))
+        return 0;
+#endif
+
+      if(FASTLZ_EXPECT_CONDITIONAL(ip < ip_limit))
+        ctrl = *ip++;
+      else
+        loop = 0;
+
+      if(ref == op)
+      {
+        /* optimize copy for a run */
+        flzuint8 b = ref[-1];
+        *op++ = b;
+        *op++ = b;
+        *op++ = b;
+        for(; len; --len)
+          *op++ = b;
+      }
+      else
+      {
+#if !defined(FASTLZ_STRICT_ALIGN)
+        const flzuint16* p;
+        flzuint16* q;
+#endif
+        /* copy from reference */
+        ref--;
+        *op++ = *ref++;
+        *op++ = *ref++;
+        *op++ = *ref++;
+
+#if !defined(FASTLZ_STRICT_ALIGN)
+        /* copy a byte, so that now it's word aligned */
+        if(len & 1)
+        {
+          *op++ = *ref++;
+          len--;
+        }
+
+        /* copy 16-bit at once */
+        q = (flzuint16*) op;
+        op += len;
+        p = (const flzuint16*) ref;
+        for(len>>=1; len > 4; len-=4)
+        {
+          *q++ = *p++;
+          *q++ = *p++;
+          *q++ = *p++;
+          *q++ = *p++;
+        }
+        for(; len; --len)
+          *q++ = *p++;
+#else
+        for(; len; --len)
+          *op++ = *ref++;
+#endif
+      }
+    }
+    else
+    {
+      ctrl++;
+#ifdef FASTLZ_SAFE
+      if (FASTLZ_UNEXPECT_CONDITIONAL(op + ctrl > op_limit))
+        return 0;
+      if (FASTLZ_UNEXPECT_CONDITIONAL(ip + ctrl > ip_limit))
+        return 0;
+#endif
+
+      *op++ = *ip++;
+      for(--ctrl; ctrl; ctrl--)
+        *op++ = *ip++;
+
+      loop = FASTLZ_EXPECT_CONDITIONAL(ip < ip_limit);
+      if(loop)
+        ctrl = *ip++;
+    }
+  }
+  while(FASTLZ_EXPECT_CONDITIONAL(loop));
+
+  return op - (flzuint8*)output;
+}
+
+#endif /* !defined(FASTLZ_COMPRESSOR) && !defined(FASTLZ_DECOMPRESSOR) */

include/gtkwave/fastlz.h

@@ -0,0 +1,107 @@
+/*
+  FastLZ - lightning-fast lossless compression library
+
+  Copyright (C) 2007 Ariya Hidayat ([email protected])
+  Copyright (C) 2006 Ariya Hidayat ([email protected])
+  Copyright (C) 2005 Ariya Hidayat ([email protected])
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in
+  all copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+#ifndef FASTLZ_H
+#define FASTLZ_H
+
+#include <inttypes.h>
+
+#define flzuint8 uint8_t
+#define flzuint16 uint16_t
+#define flzuint32 uint32_t
+
+
+#define FASTLZ_VERSION 0x000100
+
+#define FASTLZ_VERSION_MAJOR     0
+#define FASTLZ_VERSION_MINOR     0
+#define FASTLZ_VERSION_REVISION  0
+
+#define FASTLZ_VERSION_STRING "0.1.0"
+
+#if defined (__cplusplus)
+extern "C" {
+#endif
+
+/**
+  Compress a block of data in the input buffer and returns the size of
+  compressed block. The size of input buffer is specified by length. The
+  minimum input buffer size is 16.
+
+  The output buffer must be at least 5% larger than the input buffer
+  and can not be smaller than 66 bytes.
+
+  If the input is not compressible, the return value might be larger than
+  length (input buffer size).
+
+  The input buffer and the output buffer can not overlap.
+*/
+
+int fastlz_compress(const void* input, int length, void* output);
+
+/**
+  Decompress a block of compressed data and returns the size of the
+  decompressed block. If error occurs, e.g. the compressed data is
+  corrupted or the output buffer is not large enough, then 0 (zero)
+  will be returned instead.
+
+  The input buffer and the output buffer can not overlap.
+
+  Decompression is memory safe and guaranteed not to write the output buffer
+  more than what is specified in maxout.
+ */
+
+int fastlz_decompress(const void* input, int length, void* output, int maxout);
+
+/**
+  Compress a block of data in the input buffer and returns the size of
+  compressed block. The size of input buffer is specified by length. The
+  minimum input buffer size is 16.
+
+  The output buffer must be at least 5% larger than the input buffer
+  and can not be smaller than 66 bytes.
+
+  If the input is not compressible, the return value might be larger than
+  length (input buffer size).
+
+  The input buffer and the output buffer can not overlap.
+
+  Compression level can be specified in parameter level. At the moment,
+  only level 1 and level 2 are supported.
+  Level 1 is the fastest compression and generally useful for short data.
+  Level 2 is slightly slower but it gives better compression ratio.
+
+  Note that the compressed data, regardless of the level, can always be
+  decompressed using the function fastlz_decompress above.
+*/
+
+int fastlz_compress_level(int level, const void* input, int length, void* output);
+
+#if defined (__cplusplus)
+}
+#endif
+
+#endif /* FASTLZ_H */

include/gtkwave/fst_config.h

@@ -0,0 +1,11 @@
+/* This file specifically for FST usage */
+/* config.h.  Generated from config.h.in by configure.  */
+/* config.h.in.  Generated from configure.ac by autoheader.  */
+
+/* Define to 1 if you have <alloca.h> and it should be used (not on Ultrix). */
+#if !defined(__MINGW32__)
+# define HAVE_ALLOCA_H 1
+#endif
+
+/* Define to 1 if fseeko (and presumably ftello) exists and is declared. */
+#define HAVE_FSEEKO 1