Commit Graph

131 Commits

Author SHA1 Message Date
Fischer Moseley 255c452206 tests: run in parallel with pytest-xdist 2025-04-06 21:52:43 -07:00
Fischer Moseley 9611c0b554 uart: fix #36, explicitly handle scientific notation in YAML config 2025-04-06 18:28:29 -06:00
Fischer Moseley f91f7c5fbb meta: add pre-commit, commit changes it makes 2024-11-27 19:10:52 -07:00
Fischer Moseley 5759da568d tests: remove redundant test_toolchains test 2024-11-27 19:10:52 -07:00
Fischer Moseley 9937269c19 ethernet: add individual methods for each flavor of MII 2024-11-27 19:10:52 -07:00
Fischer Moseley ccecc16726 ethernet: fix path to divider.sv 2024-11-27 19:10:52 -07:00
Fischer Moseley da21a3a414 ethernet: load divider.sv via symlink 2024-11-27 19:10:52 -07:00
Fischer Moseley 363bef8d87 ethernet: add HWITL ethernet test 2024-11-27 19:10:52 -07:00
Fischer Moseley 2761507803 tests: add ethernet_io_core to build_examples test 2024-11-27 19:10:52 -07:00
Fischer Moseley cfbf372862 uart: remove flaky nexys4ddr baudrate mismatch test case 2024-10-08 11:42:10 -06:00
Fischer Moseley d450221ed8 tests: fix test_config_export 2024-10-08 11:42:10 -06:00
Fischer Moseley 9d2ec45689 uart: add stall_interval parameter and tests 2024-10-08 11:42:10 -06:00
Fischer Moseley cf62dd07bb logic_analyzer: default to immediate instead of single-shot, add intelligence to to_config() 2024-10-08 11:42:10 -06:00
Fischer Moseley 2c124200da docs: autogenerate Python API docs, update IO core docs 2024-10-08 11:42:10 -06:00
Fischer Moseley 1e7d4e92e7 tests: fix bug where base_addr was not passed but not used 2024-10-08 11:42:10 -06:00
Fischer Moseley daedb91ff2 meta: sort imports with ruff 2024-10-08 11:42:10 -06:00
Fischer Moseley b1caec9c57 meta: switch from black to ruff 2024-10-08 11:42:10 -06:00
Fischer Moseley ecfbdaa86b cli: remove JSON loader, add test for instantiation generation 2024-10-08 11:42:10 -06:00
Fischer Moseley b31a655d58 tests: include building examples in test suite 2024-10-08 11:42:10 -06:00
Fischer Moseley 3ba93efd2f meta: expose Amaranth API via __all__ 2024-10-08 11:42:10 -06:00
Fischer Moseley 0d15abe4d1 ethernet: update __init__ away from config dict 2024-10-08 11:42:10 -06:00
Fischer Moseley 0bdfd9a5f7 tests: fix mem_core_hw 2024-10-08 11:42:10 -06:00
Fischer Moseley 165c6e46ca tests: fix logic_analyzer_sim 2024-10-08 11:42:10 -06:00
Fischer Moseley a01b6981e2 tests: refactor to use Amaranth-native API 2024-10-08 11:42:10 -06:00
Fischer Moseley b20d7c7822 logic analyzer: move __init__ away from config dict 2024-10-08 11:42:10 -06:00
Fischer Moseley 743f434652 meta: add boilerplate for Amaranth-native API 2024-10-08 11:42:10 -06:00
Fischer Moseley b87f8cbc48 meta: move to lib.io and lib.mem, enable bidirectional mem tests on xilinx 2024-07-17 18:51:05 -07:00
Fischer Moseley 753a3f9427 meta: finish moving simulations to new async API 2024-07-17 18:51:05 -07:00
Fischer Moseley 8fd943257c sim: update testbenches to async API 2024-07-17 18:51:05 -07:00
Fischer Moseley 13bc196a34 rename Nexys A7 to Nexys 4 DDR 2024-05-12 10:35:18 -07:00
Fischer Moseley bd452d94a4 put test outputs in build/ 2024-03-06 16:40:54 -08:00
Fischer Moseley 71ec1174d1 add parameterized HW tests for all memory core modes 2024-03-06 14:53:27 -08:00
Fischer Moseley d1a772784a add environment.sh for tool paths and serial ports 2024-03-06 11:26:31 -08:00
Fischer Moseley 5d5a50042f make model tracking automatic in memory core tests 2024-03-06 01:12:36 -08:00
Fischer Moseley c1935bcb11 add random memory core tests 2024-03-05 23:59:42 -08:00
Fischer Moseley fd22c9a9f4 finish memory core test class 2024-03-05 22:44:36 -08:00
Fischer Moseley b00e4d0e60 revert wiring.Component instead of Elaboratable 2024-03-04 01:18:31 -08:00
Fischer Moseley 5531277c99 even more MemoryCore tests 2024-03-04 00:43:54 -08:00
Fischer Moseley f83dc59b4e add more MemoryCore tests 2024-03-04 00:17:36 -08:00
Fischer Moseley 08adbd8ede switch to wiring.Component instead of Elaboratable 2024-03-03 19:10:06 -08:00
Fischer Moseley be79ba28b5 define ABC for cores to inherit from 2024-03-03 18:53:08 -08:00
Fischer Moseley b729deb144 hardcode device paths in hardware tests 2024-03-03 18:31:11 -08:00
Fischer Moseley 11022f474d refactor Memory Core simulation into test class 2024-03-03 13:30:54 -08:00
Fischer Moseley e2d52a6e2d add simulate decorator 2024-03-03 02:14:12 -08:00
Fischer Moseley 2e2397013e make mem_core_hw tests pass 2024-03-02 14:08:52 -08:00
Fischer Moseley 6438a55192 partially revert MemoryCore updates 2024-03-02 13:31:01 -08:00
Fischer Moseley 6aea5cc6e1 update MemoryCore references 2024-03-02 12:52:04 -08:00
Fischer Moseley ab7d9105b1 add preliminary bidirectional memory core 2024-02-28 10:36:27 -08:00
Fischer Moseley b0dcd269bc add from_config to memory_core 2024-02-19 11:42:28 -08:00
Fischer Moseley 7ee51158d2 enforce consistent docstrings and underscores in logic analyzer core 2024-02-19 11:23:11 -08:00