hardcode device paths in hardware tests

This commit is contained in:
Fischer Moseley 2024-03-03 18:31:11 -08:00
parent 25ebae42e2
commit b729deb144
3 changed files with 11 additions and 6 deletions

View File

@ -143,9 +143,11 @@ class IOCoreLoopbackTest(Elaboratable):
@pytest.mark.skipif(not xilinx_tools_installed(), reason="no toolchain installed")
def test_output_probe_initial_values_xilinx():
IOCoreLoopbackTest(Nexys4DDRPlatform(), "/dev/ttyUSB1").verify()
port = "/dev/serial/by-id/usb-Digilent_Digilent_USB_Device_210292696307-if01-port0"
IOCoreLoopbackTest(Nexys4DDRPlatform(), port).verify()
@pytest.mark.skipif(not ice40_tools_installed(), reason="no toolchain installed")
def test_output_probe_initial_values_ice40():
IOCoreLoopbackTest(ICEStickPlatform(), "/dev/ttyUSB2").verify()
port = "/dev/serial/by-id/usb-Lattice_Lattice_FTUSB_Interface_Cable-if01-port0"
IOCoreLoopbackTest(ICEStickPlatform(), port).verify()

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@ -78,9 +78,11 @@ class LogicAnalyzerCounterTest(Elaboratable):
@pytest.mark.skipif(not xilinx_tools_installed(), reason="no toolchain installed")
def test_logic_analyzer_core_xilinx():
LogicAnalyzerCounterTest(Nexys4DDRPlatform(), "/dev/ttyUSB1").verify()
port = "/dev/serial/by-id/usb-Digilent_Digilent_USB_Device_210292696307-if01-port0"
LogicAnalyzerCounterTest(Nexys4DDRPlatform(), port).verify()
@pytest.mark.skipif(not ice40_tools_installed(), reason="no toolchain installed")
def test_logic_analyzer_core_ice40():
LogicAnalyzerCounterTest(ICEStickPlatform(), "/dev/ttyUSB2").verify()
port = "/dev/serial/by-id/usb-Lattice_Lattice_FTUSB_Interface_Cable-if01-port0"
LogicAnalyzerCounterTest(ICEStickPlatform(), port).verify()

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@ -112,12 +112,13 @@ class MemoryCoreLoopbackTest(Elaboratable):
@pytest.mark.skipif(not xilinx_tools_installed(), reason="no toolchain installed")
def test_mem_core_xilinx():
MemoryCoreLoopbackTest(Nexys4DDRPlatform(), 33, 1024, "/dev/ttyUSB1").verify()
port = "/dev/serial/by-id/usb-Digilent_Digilent_USB_Device_210292696307-if01-port0"
MemoryCoreLoopbackTest(Nexys4DDRPlatform(), 33, 1024, port).verify()
@pytest.mark.skipif(not ice40_tools_installed(), reason="no toolchain installed")
def test_mem_core_ice40():
port = "/dev/ttyUSB2"
port = "/dev/serial/by-id/usb-Lattice_Lattice_FTUSB_Interface_Cable-if01-port0"
MemoryCoreLoopbackTest(ICEStickPlatform(), 1, 2, port).verify()
MemoryCoreLoopbackTest(ICEStickPlatform(), 1, 512, port).verify()
MemoryCoreLoopbackTest(ICEStickPlatform(), 1, 1024, port).verify()