logic_analyzer: default to immediate instead of single-shot, add intelligence to to_config()

doc/logic_analyzer_core.md

@@ -79,7 +79,7 @@ The logic analyzer has a few different ways of capturing data, which are represe
 - __Incremental__: Record samples when the trigger condition is met, but __don't__ record the samples when the trigger condition is not met. This is super useful for applications like audio processing or memory controllers, where there are many system clock cycles between signals of interest.
 - __Immediate__: Record the value of the probes on every clock cycle, beginning immediately, and regardless of if the trigger condition is met. This is useful for investigating cases where a trigger condition is never being met (such as latchup or deadlock conditions) or obtaining a random snapshot of the FPGA's state.
 
-Most logic analyzers use a single-shot capture by default, so Manta will do the same if no `trigger_mode` entry is provided in the project's configuration file.
+Manta will use an `Immediate` trigger mode if no `trigger_mode` is provided in the configuration file.
 
 ## Usage
 

src/manta/logic_analyzer/__init__.py

@@ -37,9 +37,10 @@ class LogicAnalyzerCore(MantaCore):
 
         self._sample_depth = sample_depth
         self._probes = probes
-        self.trigger_location = sample_depth // 2
-        self.trigger_mode = TriggerModes.SINGLE_SHOT
-        self.triggers = []
+
+        self._trigger_location = sample_depth // 2
+        self._trigger_mode = TriggerModes.IMMEDIATE
+        self._triggers = []
 
         # Bus Input/Output
         self.bus_i = Signal(InternalBus())
@@ -55,14 +56,23 @@ class LogicAnalyzerCore(MantaCore):
         return self._probes
 
     def to_config(self):
-        return {
+        config = {
             "type": "logic_analyzer",
             "sample_depth": self._sample_depth,
-            "trigger_location": self.trigger_location,
             "probes": {p.name: len(p) for p in self._probes},
-            "triggers": self.triggers,
         }
 
+        if self._trigger_mode == TriggerModes.INCREMENTAL:
+            config["trigger_mode"] = self._trigger_mode.name.lower()
+            config["triggers"] = self._triggers
+
+        elif self._trigger_mode == TriggerModes.SINGLE_SHOT:
+            config["trigger_mode"] = self._trigger_mode.name.lower()
+            config["triggers"] = self._triggers
+            config["trigger_location"] = self._trigger_location
+
+        return config
+
     @classmethod
     def from_config(cls, config):
         # Check for unrecognized options
@@ -238,10 +248,10 @@ class LogicAnalyzerCore(MantaCore):
         self._trig_blk.set_triggers(self.triggers)
 
         print(" -> Setting trigger mode...")
-        self._fsm.write_register("trigger_mode", self.trigger_mode)
+        self._fsm.write_register("trigger_mode", self._trigger_mode)
 
         print(" -> Setting trigger location...")
-        self._fsm.write_register("trigger_location", self.trigger_location)
+        self._fsm.write_register("trigger_location", self._trigger_location)
 
         print(" -> Starting capture...")
         self._fsm.start_capture()
@@ -260,5 +270,5 @@ class LogicAnalyzerCore(MantaCore):
 
         data = raw_capture[read_pointer:] + raw_capture[:read_pointer]
         return LogicAnalyzerCapture(
-            self._probes, self.trigger_location, self.trigger_mode, data
+            self._probes, self._trigger_location, self._trigger_mode, data
         )

test/test_config_export.py

@@ -111,9 +111,7 @@ def test_logic_analyzer_core_dump():
             "test_core": {
                 "type": "logic_analyzer",
                 "sample_depth": 2048,
-                "trigger_location": 1024,
                 "probes": {"probe0": 1, "probe1": 2, "probe2": 3},
-                "triggers": [],
             }
         }
     }