Commit Graph

1827 Commits

Author SHA1 Message Date
Matthias Koefferlein ce5620e0bc Follow-up on #342: fixed unit tests. 2019-09-07 09:11:18 +02:00
Matthias Koefferlein f7bba9200e Merge branch 'deep-booleans' 2019-09-07 08:44:51 +02:00
Matthias Köfferlein f7173d0da4
Merge pull request #345 from KLayout/issue-317
Issue 317
2019-09-06 23:24:34 +02:00
Matthias Köfferlein 0388d51f6d
Merge pull request #348 from KLayout/help-link-not-working
Fixed: help link not working
2019-09-06 23:24:23 +02:00
Matthias Koefferlein e2cc0c48b1 Provide flat and hierarchical 'trace all nets' feature, added Netlist#flatten. 2019-09-06 23:13:21 +02:00
Matthias Koefferlein 67575a7ea2 WIP: strmxor.cc - deep mode implemented. Not tested. 2019-09-06 22:18:13 +02:00
Matthias Koefferlein 8df2199838 Fixed: help link not working
The help link wasn't working for File/Setup/Rulers/Templates
("here"). Also: if clicked from the model "Ruler and annotations setup"
the link was working but the help window wasn't usable. The modal
setup dialog was hiding the help window.
2019-09-05 22:59:08 +02:00
Matthias Koefferlein fa72885020 issue #317: provide undo combination for the paste+move sequence in 'interactive paste'. Same for 'interactive dup' 2019-09-04 23:47:05 +02:00
Matthias Koefferlein 70a4ce82b3 First implementation of infix mode
Three mode menu items appear in "Targets for Key Binding"
in the setup dialog and can be bound to a key.

"Move Interactive" will immediately start moving the
selection.

"Paste Interactive" and "Duplicate Interactive" will
paste and then immediately start moving.

Remaining issue: when Paste or Duplicate moves are
cancelled the pasted objects will still be there and
at the original location. So they are may be hard to
see. Also with Undo, two undo items are there: Paste
and Move.
2019-09-03 22:53:32 +02:00
Matthias Koefferlein 50573edad0 Added Ellipse Outline code, fixed doc. 2019-09-03 20:26:22 +02:00
Matthias Koefferlein 25e2151e28 Tiny enhancement of measurement algorithm gives more reliable results on auto-measure for 'any direction'. The solution is taking vertexes into account and accepts them as counterpart for the seed. 2019-09-02 22:58:42 +02:00
Matthias Koefferlein 2e695bd048 Leaner solution: provide snap and swap
"Swap points": will swap P1 and P2
"Snap both": will take P2 into account (before it was only P1)
2019-09-01 23:14:21 +02:00
Matthias Koefferlein 9fa5277e41 Implementation proposal
The solution tries to be a bit more generic:

- four buttons are there to synchronize coordinates
- three buttons to snap p1, p2 and auto-measure from p1.
2019-09-01 19:59:03 +02:00
Matthias Koefferlein c7ee35a4e3 WIP: documentation 2019-09-01 17:37:23 +02:00
Matthias Koefferlein 1106d3faac Merge branch 'dvb' 2019-09-01 11:25:42 +02:00
Matthias Köfferlein 57cee7921a
Merge pull request #339 from KLayout/issue-337
Fixed #337 (cross style missing in Annotation class)
2019-08-30 14:02:04 +02:00
Matthias Köfferlein 16fd8741a5
Merge pull request #340 from KLayout/issue-338
Fixed #338 (broken doc)
2019-08-30 14:01:52 +02:00
Matthias Köfferlein fde4fd42f9
Merge pull request #336 from KLayout/multiple-files-on-import
Stream import: support multiple files
2019-08-30 14:01:38 +02:00
Matthias Koefferlein b9886e472a Fixed #338 (broken doc) 2019-08-30 13:34:19 +02:00
Matthias Koefferlein d767ef27c7 Fixed #337 (cross style missing in Annotation class) 2019-08-30 13:25:15 +02:00
Matthias Koefferlein 5cfadad54f Updated test data. 2019-08-30 11:01:00 +02:00
Matthias Koefferlein 2a8f4c9610 Updated test data. 2019-08-30 10:52:51 +02:00
Matthias Koefferlein 550e2622bf Put more amphasis on net names to resolve ambiguities
The problem was that with the floating test case, the
ambiguity resolution sometimes assigned the wrong pins
and floating pins/connected pins were swapped.

One option is to make the ambiguity resolver consider
the pin connection state when tenatively evaluating
nodes.

Another option is to put more emphasis on net names
and use them for ambiguity resolution. This has helped
here.
2019-08-30 10:24:55 +02:00
Matthias Koefferlein 60ed0cdc89 Updated test golden data (mainly: nets are not purged when there is a subcircuit pin on it) 2019-08-29 23:26:03 +02:00
Matthias Koefferlein b1acfe9587 Tried a better deal with floating pins
1.) is_floating is now only true if there is no device
    and no subcircuit on a net. This means we only purge
    nets if they are really floating. So far we purged
    nets without pins which lead to the mismatch:

    Before purge:
      Layout:            (net) <--> DEVICE.TERMINAL
      Schematic:           PIN <--> DEVICE.TERMINAL

    After purge:
      Layout:           (null) <--> DEVICE.TERMINAL
      Schematic:           PIN <--> DEVICE.TERMINAL

    (null does not match any net)

2.) circuit pin matching was a bit picky. Only when
    one circuit did not have pins, matching was sloppy.

    In real cases however, circuits may have unconnected
    pins:
    - top level pins without a counterpart (no label)
    - subcircuits pins which are not used

    We catch both cases by refining the match: if a pin
    is not used, it does not need to match against
    any other pin. It's reported as "matching against null"
    though.
2019-08-29 22:25:59 +02:00
Matthias Koefferlein 9a69d106fd Fixed some small issues in the netlist compare 2019-08-29 00:19:24 +02:00
Matthias Koefferlein f6492c80c5 Stream import: support multiple files
Multiple files can now be selected for "File/Import/Other Files into current".

NOTE: performance for many files may not be excellent
due to re-sorting of hierarchy and bounding box re-computation.
2019-08-26 22:28:35 +02:00
Matthias Koefferlein de64f61903 Fixed issue #333 (automation of auto-measure rulers) 2019-08-26 21:34:57 +02:00
Matthias Koefferlein 3a12714593 Fixed some doc issues, added doc for hierarchical compare. 2019-08-26 18:55:35 +02:00
Matthias Köfferlein cb541f935e
Merge pull request #332 from KLayout/gridline-colors
Implemented individual colors for grid lines, axes and rulers (backgr…
2019-08-26 00:19:32 +02:00
Matthias Koefferlein db9ea27324 Re-run feature for DRC too. 2019-08-25 23:47:55 +02:00
Matthias Koefferlein 441f946f43 WIP: LVS rerun feature 2019-08-25 21:55:48 +02:00
Matthias Koefferlein 515b68b76f WIP: provide a recipe registration facility for LVS rerun 2019-08-25 18:03:27 +02:00
Matthias Koefferlein 444e10d32f WIP: rerun LVS, partial LVS
Rerun LVS: a button is provided which allows re-running
the LVS or netlist extraction from the netlist browser.
TODO: a generic concept for triggering the generators

"Partial LVS" is a feature where it's possible to
select a layout subcell - running LVS then will only
compare against the corresponding schematic subcell, not
the whole tree. The magic is done by "align" which will
remove the upper hierarchy part.
2019-08-24 22:56:20 +02:00
Matthias Koefferlein c543fe7a44 Added test for floating device terminals. 2019-08-24 19:42:00 +02:00
Matthias Koefferlein a9a2cb69c8 Avoiding one assertion by not considering floating device terminals 2019-08-24 09:58:08 +02:00
Matthias Koefferlein 1b6e42d70a Fixed a segfault in the LVS result browser. 2019-08-24 08:53:19 +02:00
Matthias Koefferlein 3a93bc2162 Added test for mixed-hierarchy LVS case. 2019-08-24 00:13:38 +02:00
Matthias Koefferlein 3ae848bff4 Provide test case for spice reader with delegate for devices as subcircuits. Small bugfix in spice reader: wrong line number in warning. 2019-08-23 23:13:04 +02:00
Matthias Koefferlein 850e288a28 Implemented individual colors for grid lines, axes and rulers (background configuration page) 2019-08-23 22:31:01 +02:00
Matthias Koefferlein b0aa9b6540 Spice reader test compatible with Windows (three-digit exponential) 2019-08-21 23:03:24 +02:00
Matthias Koefferlein bceccd7ac0 Fixed issue #330 2019-08-21 00:38:57 +02:00
Matthias Koefferlein 6f2d29d05b Fixed a segfault when running a PCell definition macro (segfault happened in update of library view because the library was gone). Fixed a dialog title. 2019-08-20 23:38:48 +02:00
Matthias Koefferlein 908ddbfb5b Merge branch 'library-browser' 2019-08-20 23:14:37 +02:00
Matthias Koefferlein 45cdefcf9a Provide strict mode for device classes, dmos3/dmos4 for LVS 2019-08-20 23:12:17 +02:00
Matthias Koefferlein 50a341232c Documentation fixes (e.g. better LVS layout pictures) 2019-08-20 19:17:56 +02:00
Matthias Koefferlein b7c83eaaa6 Spice reader: subcircuits w/o pins
This happens for subcircuits which only
connect to global nets.

Plus: ".global" now accepts more than just one net
2019-08-19 23:00:24 +02:00
Matthias Koefferlein 1bc03c3b79 Implement "M" parameter for Spice
This implementation is pretty simplistic and
applies "M" the following way:
* R: R(final) = R/M
* L: L(final) = L/M
* C: C(final) = C*M
* M: W(final) = W*M
* D: A(final) = A*M
* Q: AE(final) = AE*M

The other parameters (specifically the other
geometry parameters) are not scaled yet.
2019-08-19 22:51:22 +02:00
Matthias Koefferlein 207e44837c LVS: allow missing device classes in reference schematic
Reasoning: some devices may simply not be used in the
reference schematic.
2019-08-19 22:26:50 +02:00
Matthias Koefferlein fa4da4ba0b Doc typo fixed. 2019-08-19 21:58:32 +02:00
Matthias Koefferlein 24b985f32e Better .include for Spice reader
* .inc is allowed as synonym
* Paths can be URL's (with HTTP)
* Relative resolution of paths/URL's vs. parent of .include
2019-08-19 21:45:40 +02:00
Matthias Koefferlein 9fecc4b674 Merge branch 'dvb' 2019-08-19 21:06:37 +02:00
Matthias Köfferlein 15f45fb09d
Merge pull request #327 from KLayout/query-performance-fix
Fix for layout query performance improvement: needs to check for qual…
2019-08-19 19:37:15 +02:00
Matthias Koefferlein fe4396d872 Merge branch 'issue-306' 2019-08-19 00:03:39 +02:00
Matthias Koefferlein e148898d4c Fixed an issue with drawing canvas and undo
When a "create instance" operation with a library cell
was undone the following issue could be seen: as the library
cell might create new layers in the target layout, these
needed to be undone when the operation was reverted.

But then the canvas bit planes got messed up because the
"LayoutView::set_view_ops" call was missing. Now this
happens inside the manipulation functions for deleting
and inserting layers. This should also reduce the
necessity to call LayoutView::update_content explicitly.
2019-08-18 23:56:00 +02:00
Matthias Koefferlein e9eed3842b Fix for layout query performance improvement: needs to check for qualified cell name (with lib), not pure cellname 2019-08-18 19:09:07 +02:00
Matthias Köfferlein c75a1bc2eb
Merge pull request #313 from KLayout/query-performance
Query performance
2019-08-18 17:31:17 +02:00
Matthias Köfferlein 16ae0346b8
Merge pull request #314 from KLayout/vars-for-queries
Vars for queries
2019-08-18 17:31:11 +02:00
Matthias Köfferlein bf41da69da
Merge pull request #315 from KLayout/lib-browser
Lib browser
2019-08-18 17:31:02 +02:00
Matthias Köfferlein 46128e4141
Merge pull request #319 from KLayout/issue-316
Fixed issue #316 (Text capture box has zero dimension for move)
2019-08-18 17:30:54 +02:00
Matthias Köfferlein 46d2fef0fa
Merge pull request #323 from KLayout/issue-321
Fixed issue #321
2019-08-18 17:30:47 +02:00
Matthias Köfferlein 757855cb9c
Merge pull request #324 from KLayout/issue-322
Fixed issue #322 by skipping used layer indexes - will also help with…
2019-08-18 17:30:39 +02:00
Matthias Koefferlein 2cc6909d2c Second fix for issue #306 (round function problem)
This fix adds a "amend" option to the rounded corners
dialog - disabling this option allows to skip the "undo rounding"
step in case the algorithm does not determine the rounding
properties of the input properly.

Without "amend" enabled, the rounding will always be
applied atop of any existing rounding.
2019-08-18 17:25:28 +02:00
Matthias Koefferlein 8981ed434a First fix for issue-306: some polygons are not recognized as rounded, more robust radius extraction. 2019-08-17 23:55:49 +02:00
Matthias Koefferlein 9c3f70342b key bindings and menu items visibility string packing/unpacking for scripts
New convenience functions are provided which simplify
manipulation of key bindings and menu item visibility
configuration strings. AbstractMenu#pack_key_binding
and AbstractMenu#unpack_key_binding turn a path/key
map into a single string and back. The string format
is the same than for the key-binding configuration key.

The same is provided for the menu item visibilily
with AbstractMenu#pack_menu_item_visible and
Abstract#unpack_menu_item_visible.
2019-08-17 19:54:18 +02:00
Matthias Koefferlein 7b163728ab Added UI comment 2019-08-17 19:23:14 +02:00
Matthias Koefferlein 4659569333 Primary fix issue #318 (unable to remove key binding)
For a backward compatible solution, a key binding
target of '' still means "take default". For
"nothing", a new pseudo-key "none" was defined.

For scripting, this value is available as
constant "Action#NoShortCut".
2019-08-17 19:17:40 +02:00
Matthias Koefferlein aa72d03526 Fixed issue #322 by skipping used layer indexes - will also help with DXF and other named-layer formats 2019-08-17 15:30:47 +02:00
Matthias Koefferlein 06a1cafdf4 Fixed issue #321
This is a small paradigm shift in the configuration hierarchy:
plugins (as children of root) now inherit the configuration
from the parent - now only through configure, but also through
config_get (pull with config_get vs. push with configure).

TODO: both methods are not entirely consistent as configure
can block propagation of configuration settings. But that's a
feature hardly used anyway and rather an optimization thing.
2019-08-17 14:54:48 +02:00
Matthias Koefferlein 19e3d6eab0 Fixed issue #316 (Text capture box has zero dimension for move) 2019-08-04 23:45:46 +02:00
Matthias Koefferlein 25aa54eebf Updated doc for library view 2019-08-04 01:54:16 +02:00
Matthias Koefferlein 7c0dd07d42 WIP: lib browser - cleanup and small bug fixes. 2019-08-04 00:49:08 +02:00
Matthias Koefferlein a104352a93 WIP: library browser - cleanup of unused cells in lib browser, some bug fixed, enhancements to parameter editor on drop 2019-08-04 00:08:39 +02:00
Matthias Koefferlein ed2cdc6c7e WIP: lib browser - open properties dialog after dropping PCell. TODO: needs to be modal with cancel option 2019-08-03 01:03:59 +02:00
Matthias Koefferlein 9daf63403a WIP: lib-browser - icons for lib cells. 2019-08-03 00:45:42 +02:00
Matthias Koefferlein 5ec06b9f24 WIP: library browser - show BASIC PCell variants with more parameters so they can be told apart. 2019-08-03 00:17:02 +02:00
Matthias Koefferlein 741434dc13 WIP: library browser - take selected layer for default if there is no default layer 2019-08-02 23:40:54 +02:00
Matthias Koefferlein de9db84ac7 WIP: library browser - drag & drop of PCell instances 2019-08-02 22:49:55 +02:00
Matthias Koefferlein 56bf9dd8d5 WIP: lib browser - persistence of tree state during update 2019-08-02 21:46:15 +02:00
Matthias Koefferlein fda5d86b4b Performance enhancement of netlist compare (avoid O(2) loop) 2019-08-02 01:39:07 +02:00
Matthias Koefferlein 67944240b2 WIP: lib browser, drag and drop partially works 2019-08-02 00:53:24 +02:00
Matthias Koefferlein a567002e6c Search feature for library browser plus two bugfixes
Bugfixes:
1.) A crash due to wrong key_event_handler pointer
    (relevant for hierarchy view)
2.) When switching cellview the focus wasn't changed
    and selection stayed in old cellview
2019-08-01 23:15:07 +02:00
Matthias Koefferlein 4428ef808b WIP: library browser - PCell variants as children of PCells 2019-08-01 22:52:20 +02:00
Matthias Koefferlein 0c18171e63 WIP: library browser - basic setup. Not much functionality yet. 2019-07-31 23:46:48 +02:00
Matthias Koefferlein 5faf762571 WIP: libraries view - basic skeleton 2019-07-30 23:22:26 +02:00
Matthias Koefferlein dfd713016b Added some unit tests for performance improvement of queries. 2019-07-29 22:36:39 +02:00
Matthias Koefferlein 0dcfeabaf4 Query performance improvement for the cell tree recursion case by introducing optimization hints ('filter state objectives') 2019-07-29 22:27:36 +02:00
Matthias Koefferlein e329f60257 WIP: attempt to improve performance by using name match shortcuts 2019-07-28 19:05:25 +02:00
Matthias Koefferlein e33c2f7b66 Less dependencies on compiler details for RBA/pya tests. 2019-07-28 16:36:31 +02:00
Matthias Koefferlein 49c1bacb98 Introducing variables for layout queries:
1.) The ExpressionContext class is a mapping of tl::Eval
    and allows providing a variable context for the LQ.
    Expression class is derived from ExpressionContext now.
2.) The variable lookup has been changed so that variables
    can be modified even if they come from a parent context.
3.) LayoutQuery and iterator has been given an argument to
    supply the context
2019-07-28 01:33:30 +02:00
Matthias Köfferlein 9a324727d2
Merge pull request #312 from KLayout/dvb
Dvb
2019-07-27 22:32:59 +02:00
Matthias Koefferlein 71f646c24f WIP: updated test data for latest updates, don't sort LVSDB on reading for consistency 2019-07-27 21:42:51 +02:00
Matthias Koefferlein 169cc5246d WIP: updated golden data for new device sorting in cross reference. 2019-07-27 20:37:41 +02:00
Matthias Koefferlein 2993a6411a WIP: some enhancements to cross reference and browser
Devices: try to pair unmatching ones similar to subcircuits
Don't sort devices by the device name but by class name
Show the device parameters for netlist devices (same as
for netlist browser)
2019-07-27 20:21:13 +02:00
Matthias Koefferlein 2e034c2172 Bugfix: net names need HTML escaping. 2019-07-27 00:53:21 +02:00
Matthias Koefferlein b4fa4b1bae Flattening of layout with circuit flattening.
Technically, the layout isn't flattened, but connections are made
which allow regenerating the layout even after the circuit
has been flattened.
2019-07-27 00:37:22 +02:00
Matthias Koefferlein 4f9208577b Added option to configure capture range. 2019-07-25 00:06:50 +02:00
Matthias Koefferlein 19b6347f3f Reproducible layer order for different ruby versions. 2019-07-24 20:50:28 +02:00
Matthias Koefferlein 9cad9ca024 Fixed missing initialization of device_scaling in LayoutToNetlist. 2019-07-24 20:49:56 +02:00
Matthias Koefferlein afb5cea576 Added "device_scaling" to LVS
Plus: added some missing files

Implementation details:
* scaling factor was introduced in DeviceExtractor::extract
* for easy implementation this is available in "sdbu"
* "sdbu" is made available in GSI
* to test this, the db::compare_netlist had to be enhanced to
  exactly check device parameters
* enhancement of LVS script framework and doc updates
2019-07-24 00:16:47 +02:00
Matthias Koefferlein 5dabd6093d Provide new 'align' feature in LVS for automatic circuit flattening. 2019-07-23 01:12:12 +02:00
Matthias Koefferlein aff8212f2f Provide 'align' method to auto-align circuit and cell hierarchy in LVS 2019-07-23 00:14:43 +02:00
Matthias Koefferlein 14d9689498 Added .global to Spice reader. 2019-07-22 23:02:31 +02:00
Matthias Köfferlein d87c27b4cd
Merge pull request #310 from KLayout/issue_293
Fixed #293: window title of setup form is 'Setup'
2019-07-21 23:49:38 +02:00
Matthias Köfferlein 8a66f59b6e
Merge pull request #308 from KLayout/issue-305
Fixed issue #305 (CIF reader issue with rotated boxes)
2019-07-21 23:49:11 +02:00
Matthias Köfferlein fbb8a432c4
Merge pull request #307 from KLayout/dvb
Dvb
2019-07-21 23:48:55 +02:00
Matthias Koefferlein 39011e3a37 Fixed #293: window title of setup form is 'Setup' 2019-07-21 23:22:10 +02:00
Matthias Koefferlein 8f21cdf449 Fixed issue #305 (CIF reader issue with rotated boxes) 2019-07-21 22:57:02 +02:00
Matthias Koefferlein 9d250d6df9 Using a larger branch complexity than default for LVS full test's netlist compare
In addition: typo fixed, added doc for complexity configuration
parameters.
2019-07-21 22:24:07 +02:00
Matthias Koefferlein df7195b81f Compatibility with ruby 1.8, force garbage cleanup for LVS/DRC and tests. 2019-07-21 10:23:08 +02:00
Matthias Koefferlein 6e6e449eef Consolidated test data for lvs:full - there are too many variants to support pure text compare. We use the netlist comparer now. 2019-07-21 09:20:44 +02:00
Matthias Köfferlein f82e7929d8 Fixed a conversion issue with ints on MSVC
Because long is 32bit on Windows (like int), the
conversion from long to unsigned int was subject
to sign overflow. This was fixed by going to
unsigned int via unsigned long.
2019-07-20 00:28:32 +02:00
Matthias Koefferlein 0215d05a12 Fixed unit tests. 2019-07-19 00:02:05 +02:00
Matthias Köfferlein 7fc907cf7e Fixed a segfault from the testsuite 2019-07-16 23:17:29 +02:00
Matthias Köfferlein 4e1736a181 Updated golden data of two tests for Windows. 2019-07-16 01:27:08 +02:00
Matthias Köfferlein 630f7e56d8
Merge pull request #303 from KLayout/issue-302
Fixed #302 and plus a potential invalid memory access fixed
2019-07-16 00:44:00 +02:00
Matthias Köfferlein b3e9915259 Provide special LVS test golden data for Windows (slight differences in shape order etc.) 2019-07-16 00:40:43 +02:00
Matthias Köfferlein df23830a1c Fixed a runtime issue on Windows 2019-07-16 00:39:39 +02:00
Matthias Köfferlein e4efaac12f MSVC builds fixed - XML source needs to accept URLs (specifically resource URLs) also with EXPAT 2019-07-15 23:23:19 +02:00
Matthias Köfferlein 9820e57031 Don't write third terminal for R or C (WithBulk variants) 2019-07-15 23:19:03 +02:00
Matthias Köfferlein eb9ffb4a35 Another msvc2017 build warning fixed 2019-07-15 23:18:20 +02:00
Matthias Köfferlein 9a371b8fd2 Fixed some build warnings with msvc2017 (maybe real issues and memory leaks) 2019-07-15 23:17:24 +02:00
Matthias Köfferlein 350ae397aa MSVC builds fixed - XML source needs to accept URLs (specifically resource URLs) also with EXPAT 2019-07-15 00:18:18 +02:00
Matthias Köfferlein ede217cd0b Fixed #302 and plus a potential invalid memory access fixed 2019-07-15 00:17:01 +02:00
matthias 89ce2be5c2 Merge remote-tracking branch 'origin/master' into dvb 2019-07-14 01:28:11 +02:00
Matthias Köfferlein 1b08656835
Merge pull request #300 from KLayout/issue-264
Issue 264
2019-07-14 00:12:58 +02:00
Matthias Köfferlein 397e86f4b4 Merge branch 'dvb' of https://github.com/klayout/klayout into dvb 2019-07-13 23:39:16 +02:00
Matthias Köfferlein 4172b60d60 Fixed a build issue on Windows. 2019-07-13 23:38:26 +02:00
matthias 8b17a4da4f A few utility functions
Polygon#is_rectilinear?, Polygon#is_empty?
and same for SimplePolygon
2019-07-13 22:45:22 +02:00
matthias 5f27341995 Some refactoring, better templates
1.) tl::Stream now can read from resources
    (:<path> URL's)
2.) LVS/DRC templates are kept as resource,
    "create_template" uses the URL to read them.
3.) Added samples for LVS
4.) Configured LVS to match sample
2019-07-13 18:40:00 +02:00
matthias ebca5e1ce6 Bugfix: small LVS and DRC macro iessues (LVS and DRC menus not working etc.) 2019-07-13 17:00:05 +02:00
Matthias Koefferlein 1251fb2cd6 Added < and > to allowed chars for net names in Spice reader 2019-07-13 08:50:13 +02:00
Matthias Koefferlein 2d57a11f8c Fixed #287 (RecursiveShapeIterator to ObjectInstPath)
There is a new constructor for ObjectInstPath to
create one from a RecursiveShapeIterator.
2019-07-12 23:13:50 +02:00
Matthias Koefferlein e8ff8156a0 fix for #264
1. Errors in coerce_parameters are now shown as
   red label + warning icon in the parameters dialog
2. Errors during produce are always logged now

Plus: the scroll bars of the PCell parameters page
don't jump back on "Apply".
2019-07-12 21:13:18 +02:00
Matthias Koefferlein c7e883cdb2 SPICE reader now assigned net names as pin names. 2019-07-12 19:00:27 +02:00
Matthias Koefferlein f66b094e88 Merge branch 'dvb' into dvb_test 2019-07-12 17:44:11 +02:00
Matthias Koefferlein a47190f3ab Write short versions of LVS and L2N DB by default. 2019-07-12 17:43:43 +02:00
Matthias Koefferlein 85717beca6 Allow saving LVS DB files from netlist browser. 2019-07-12 17:29:44 +02:00
Matthias Koefferlein d109a22cf5 Renaming (distro nodes->virtual nodes) 2019-07-11 23:20:42 +02:00
Matthias Koefferlein e32ee570c7 Alternative algorithm for subcircuit matching - tests updated, refactoring 2019-07-11 23:19:02 +02:00
Matthias Koefferlein 7bc4acd8f6 WIP: new version of subcircuit match algorithm - needs refactoring. 2019-07-11 23:14:53 +02:00
Matthias Koefferlein 0d9273aaf6 WIP: new subcircuit match algorithm 2019-07-11 00:16:36 +02:00
Matthias Koefferlein 2f01c7a0bd WIP: other algorithm for handling subcircuits in netlist compare 2019-07-10 23:40:16 +02:00
Matthias Koefferlein 67f786035c WIP: during refactoring 2019-07-10 00:32:53 +02:00
Matthias Koefferlein 1fd069ca99 Provide a better description for net mismatch with warning. 2019-07-09 20:29:35 +02:00
Matthias Koefferlein cef96902ad Boundary for circuits, reverted automatic generation of global pins
- global pins have been generated for device cells too and lead
  to implicit pins which may not be desired. The original problem
  was how to make abstract circuits comparable. This has to be
  solved differently.
- Circuit boundaries are good for displaying the boxes for
  abstract circuits
2019-07-09 19:55:48 +02:00
Matthias Koefferlein 0c6ead6f90 WIP: introduced boundary into L2N format so we have something to display for abstracts. 2019-07-09 01:18:23 +02:00
Matthias Koefferlein c9e08c4500 WIP: propagate global nets to parent hierarchy even if there is no shape inside the cell. 2019-07-08 23:11:35 +02:00
Matthias Koefferlein bdb8a7bcc2 WIP: reverted modifications on SPICE reader. 2019-07-08 21:51:59 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein b48453633f WIP: some fixes and small enhancements. New tests. 2019-07-08 00:09:10 +02:00
Matthias Koefferlein bc2d9448d6 Providing LVS tests. 2019-07-07 21:33:28 +02:00
Matthias Koefferlein 95a1e38fe3 WIP: better reproducablility for .lvsdb layer names, updated tests. 2019-07-07 19:39:00 +02:00
Matthias Koefferlein 993ef78575 WIP: some cleanup/enhancement
General topic: abstracts and swappable pins.
Issue: we work bottom up and assign pins. This is the
basis for net graph building. But swappable means those
pins can change. The compare works fine, but debugging
output is strange: as the pin assigned is fixed, the nets
found to be attached to a circuit might not fit any
proposed pin pair (which does not contain swapping).

The problem gets worse with abstracts.

The enhancements are
- Such cases generate only warnings in the browser
  and the message says swapping might be the case
- Floating nets are treated differently. This should
  lead to a better performance for abstracts/black boxes,
  but in case of disconnected pins (due to wire errors),
  floating nets happen to create mismatches in the nets above.
- Net graph building does not consider swappable nets. In
  case of two swappable pins this wouldn't be an issue, but
  for more than two this would create ambiguities and
  prevent topological matching.

Plus: Debug output option for net graph

Tests updated
2019-07-07 18:17:14 +02:00
Matthias Koefferlein ace0788f85 WIP: Spice reader reads pin names from nets 2019-07-07 00:05:22 +02:00
Matthias Koefferlein 0e5ecdc36b Attempt to make LVS compare output a little more predictable with boundary cases
- For unattached subcircuit pins no error should be reported
- For abstract nets, graph propagation through subcircuit pins isn't attempted.
  Abstract nets are only dummy-associated currently.
2019-07-06 23:40:49 +02:00
Matthias Koefferlein 903b1f7505 WIP: fixed 'equivalent_pins' 2019-07-06 21:47:25 +02:00
Matthias Koefferlein 5ce8dd2684 WIP: added circuit blankout. 2019-07-06 19:50:20 +02:00
Matthias Koefferlein fb8a64b0e1 WIP: updated LVS doc. 2019-07-06 09:37:54 +02:00
Matthias Koefferlein 24a0c3dd00 LVS template for macros. Enhancement: 'schematic' statement can now be anywhere in LVS script. 2019-07-06 09:35:51 +02:00
Matthias Koefferlein a179705a03 WIP: more refactoring. 2019-07-06 09:15:33 +02:00
Matthias Koefferlein 0595ec2e0f WIP: one more test for LVS 2019-07-06 09:08:32 +02:00
Matthias Koefferlein 2f6aae7204 WIP: refactoring, added first tests for LVS 2019-07-06 08:52:40 +02:00
Matthias Koefferlein 15022709b4 WIP: doc update, robustness of LVS browser model (xref) 2019-07-05 23:35:14 +02:00
Matthias Koefferlein a6a0d9946c Updated documentation 2019-07-05 21:45:50 +02:00
Matthias Koefferlein fade779238 WIP: doc update. 2019-07-05 17:48:23 +02:00
Matthias Koefferlein 153bfa9c52 Updated doc. 2019-07-04 23:56:04 +02:00
Matthias Koefferlein 68f98d9f0d Some typos fixed, connect_implicit now can be used multiple times (but without glob pattern) 2019-07-04 23:55:46 +02:00
Matthias Koefferlein 71777670de Fixed unit tests. 2019-07-04 01:24:19 +02:00
Matthias Koefferlein 5e70f4fa03 Fixed an edit bug. 2019-07-04 01:18:25 +02:00
Matthias Koefferlein bd5fbc065a WIP: updated doc. 2019-07-04 01:16:08 +02:00
Matthias Koefferlein 07ae488652 WIP: bugfix - don't uppercase file names in SPICE .include, typos fixed. 2019-07-04 00:57:52 +02:00
Matthias Koefferlein 20c8c6bdaa WIP: more LVS doc. 2019-07-04 00:57:04 +02:00
Matthias Koefferlein 437ead7699 WIP: updated doc. 2019-07-03 01:48:55 +02:00
Matthias Koefferlein 0399b07ff3 WIP: Added sample / xs for vertical BJT 2019-07-03 01:25:26 +02:00
Matthias Koefferlein d913d2352c WIP: doc updated, small typos fixed. 2019-07-03 00:45:11 +02:00
Matthias Koefferlein 66a9fa41e7 WIP: added more docs, confine BJT combination to emitter parameters. 2019-07-02 21:09:32 +02:00
Matthias Koefferlein 8aa6f4edcf WIP: added more test data, doc links 2019-07-02 02:03:58 +02:00
Matthias Koefferlein 87ca28a83f WIP: updated LVS doc. 2019-07-02 01:49:56 +02:00
Matthias Koefferlein 9f26553d4b Added inverter test layout 2019-07-02 00:25:31 +02:00
Matthias Koefferlein 3c4c1b9c4f WIP: bugfixes
1.) Don't error out in batch mode (without view)
2.) Don't add nets to connectivity when they just
    serve for device recognition
2019-07-02 00:07:50 +02:00
Matthias Koefferlein f931b6a1c1 Bugfix: avoid an assertion in the netlist browser
Reason: when a circuit does not have pins and is top level,
but the reference has pins, the reference pins are regarded
to match against (nil). This case has to be reported properly,
otherwise the model can't be built consistently.
2019-07-02 00:01:11 +02:00
Matthias Koefferlein 1e49338fe9 WIP: doc. 2019-06-30 23:36:51 +02:00
Matthias Koefferlein 2f66f3ee3b WIP: Extraction of DRC and LVS doc, added doc to classes 2019-06-28 18:44:36 +02:00
Matthias Koefferlein ef1441e546 WIP: fixed unit tests. 2019-06-28 17:08:04 +02:00
Matthias Koefferlein 6ed3838baf WIP: fixed an edit failure 2019-06-28 14:43:52 +02:00
Matthias Koefferlein ed41af9b4b WIP: added documentation to LVS script. 2019-06-28 12:50:55 +02:00
Matthias Koefferlein a8f8ca0d7d WIP: fixed a display issue and a segfault in the netlist browser. 2019-06-28 11:45:58 +02:00
Matthias Koefferlein 80d86cc425 WIP: netlist browser - allow switching between L2N and LVSDB view 2019-06-28 11:27:43 +02:00
Matthias Koefferlein 910a36b83d WIP: better matching of subcircuits - attempt to map them even if not identical. This hopefully makes solving subcircuit connection problems easier. 2019-06-28 11:05:43 +02:00
Matthias Koefferlein 3310d34cf3 WIP: better tooltips and comments for LVS browser. 2019-06-27 00:14:18 +02:00
Matthias Koefferlein 955d21a656 WIP: case insensitive compare of netlists (after reading Spice, the names are caseless) 2019-06-26 20:58:42 +02:00
Matthias Koefferlein 0cbfa698f0 WIP: debugging, development
- LVS DSL debugging, enhancements
- Allow polygons with holes in L2N
- Spice Reader: was creating too many class objects
- Device class categorizer: allow associating A->C,B-C
- ...
2019-06-26 20:41:49 +02:00
Matthias Koefferlein 37012efba0 WIP: fixed unit tests, bug fix in DeepRegion -> and and not shall return a DeepRegion always. 2019-06-24 20:56:20 +02:00
Matthias Koefferlein 33bb85e4f3 WIP: live actions for netlist extraction - connect etc. are no longer delayed for better error messages 2019-06-24 19:41:02 +02:00
Matthias Koefferlein 624811d55e WIP: fixed a basic issue with empty layers
Previous: empty layers occupied a special layer in the DSS
But what when empty layers are required as outputs?
ONE layer isn't good -> would overwrite the layer and it's
no longer empty for others.
So we need to keep the layers separate.
2019-06-23 23:44:15 +02:00
Matthias Koefferlein 464a1f35fb WIP: enhancements to DRC DSL for net extraction, some bug fixes in L2N browser etc. 2019-06-23 23:23:36 +02:00
Matthias Koefferlein 0f9c50c405 WIP: new macro category: LVS 2019-06-23 16:57:41 +02:00
Matthias Koefferlein 04f0edc814 WIP: split DRC into multiple files, bug fixed from lym management. 2019-06-23 09:25:16 +02:00
Matthias Koefferlein 717e7ca0ab WIP: Fixed Spice reader/writer delegate, tests. 2019-06-23 00:08:49 +02:00