mirror of https://github.com/KLayout/klayout.git
WIP: doc update.
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Matthias Koefferlein
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@ -18,11 +18,11 @@
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<topic href="/manual/lvs_device_extractors.xml"/>
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<topic href="/manual/lvs_io.xml"/>
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<topic href="/manual/lvs_connect.xml"/>
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<topic href="/manual/lvs_compare.xml"/>
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<!--
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<topic href="/manual/lvs_hierarchy.xml"/>
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<topic href="/manual/lvs_reference.xml"/>
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<topic href="/manual/lvs_compare.xml"/>
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<topic href="/manual/lvs_tweaks.xml"/>
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<topic href="/manual/lvs_browser.xml"/>
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-->
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@ -3,13 +3,121 @@
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<doc>
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<title>LVS Connectivity</title>
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<title>LVS Compare</title>
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<keyword name="LVS"/>
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<keyword name="LVS Connectivity"/>
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<keyword name="LVS Compare"/>
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<h2-index/>
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<p>
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The actual compare step is rather simple. Provided you have set up the extraction
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(<a href="/about/drc_ref_global.xml#extract_devices">extract_devices</a>), the
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connectivity (<a href="/about/drc_ref_global.xml#connect">connect</a>,
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<a href="/about/drc_ref_global.xml#connect_global">connect_global</a>,
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<a href="/about/drc_ref_global.xml#connect_implicit">connect_implicit</a>) and
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provided a reference netlist (<a href="/about/drc_ref_global.xml#schematic">schematic</a>),
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this function will perform the actual compare:
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</p>
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<pre>compare</pre>
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<p>
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This method (<a href="/about/lvs_ref_global.xml#compare">compare</a>
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will extract the netlist (if not already done) and compare it against
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the schematic. It returns true on success and false otherwise, in case
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you like to take specific actions on success or failure.
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</p>
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<p>
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The compare step can configured by providing hints.
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</p>
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<h2>Net equivalence hint</h2>
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<p>
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It can be useful to declare two nets as identical, at least for debugging.
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The compare algorithm will then be able to deduce the real causes for mismatches.
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It is helpful for example to provide equivalence for the power nets, because
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netlist compare fails will often cause the power nets no to be mapped. This in
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turn prevents matching of other, good parts of the circuit. To supply a
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power net equivalence for "VDD" within a circuit (e.g. "LOGIC"), use this statement:
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</p>
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<pre>same_nets("LOGIC", "VDD", "VDD:P")</pre>
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<p>
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In this example it is assumed that the power net is labelled "VDD" in the
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layout and called "VDD:P" in the schematic. Don't leave this statement in
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the script for final verification as it may mask real errors.
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</p>
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<p>
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For more information about "same_nets" see <a href="/about/lvs_ref_global.xml#same_nets">same_nets</a>.
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</p>
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<h2>Circuit equivalence hint</h2>
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<p>
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By default, circuits with the same name are considered equivalent. If this is not the
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case, equivalence can be established using the <a href="/about/lvs_ref_global.xml#same_circuits">same_circuit</a>
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function:
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</p>
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<pre>same_circuits("CIRCUIT_IN_LAYOUT", "CIRCUIT_IN_SCHEMATIC")</pre>
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<h2>Device class equivalence hint</h2>
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<p>
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By default, device classes with the same name are considered equivalent. If this is not the
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case, equivalence can be established using the <a href="/about/lvs_ref_global.xml#same_device_classes">same_device_classes</a>
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function:
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</p>
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<pre>same_device_classes("PMOS_IN_LAYOUT", "PMOS_IN_SCHEMATIC")
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same_device_classes("NMOS_IN_LAYOUT", "NMOS_IN_SCHEMATIC")</pre>
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<h2>Pin swapping</h2>
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<p>
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Pin swapping can be useful in cases, where a logic element has logically equivalent, but
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physically different inputs. This is the case for example for a CMOS NAND gate where the
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logic inputs are equivalent in function, but not in the circuit and physical implementation.
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For such circuits, the compare function needs to be given a degree of freedom and
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be allowed to swap the inputs. This is achieved with the
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<a href="/about/lvs_ref_global.xml#equivalent_pins">equivalent_pins</a>
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function:
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</p>
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<pre>equivalent_pins("NAND_GATE", "A", "B")</pre>
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<p>
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The first argument is the name of the circuit in the layout netlist. You can
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only specify equivalence in layout, not in the reference schematic.
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Multiple pins can be listed after the circuit name. All of them will be
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considered equivalent.
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</p>
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<h2>Capacitor and resistor elimination</h2>
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<p>
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This feature allows eliminating "open" resistors and capacitors.
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Serial resistors cannot be elimiated currently (shorted).
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</p>
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<p>
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To eliminate all resistors with a resistance value above a certain threshold, use the
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<a href="/about/lvs_ref_global.xml#max_res">max_res</a> function. This will
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eliminate all resistors with a value >= 1kOhm:
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</p>
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<pre>max_res(1000)</pre>
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<p>
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To eliminate all capacitors with a capacitance value below a certain threshold, use the
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<a href="/about/lvs_ref_global.xml#max_caps">max_caps</a> function. This will
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eliminate all capacitances with a value <= 0.1fF:
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</p>
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<pre>max_caps(1e-16)</pre>
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</doc>
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@ -3,9 +3,9 @@
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<doc>
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<title>LVS Connectivity</title>
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<title>LVS Tweaks</title>
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<keyword name="LVS"/>
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<keyword name="LVS Connectivity"/>
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<keyword name="LVS Tweaks"/>
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<h2-index/>
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