eed4ff7e2d
Spelling fixes
...
Mostly comments, but includes quite a few
user-visible error, debug, and help messages.
2008-06-13 08:51:28 -07:00
db09f2fa7e
More cost effective and reliable island joining algorithm.
...
Rather then join islands while branches are initially created, save the
island creating for the end. This way, the process is actually recursive
and greedy, reliably collecting branches into islands without conflict.
2008-06-03 20:21:39 -07:00
ff9166d4a5
Got sense of tranvp wrong in connections to module ports.
2008-06-03 17:23:01 -07:00
73e2b297df
Replace the NetPartSelect:BI with NetTran(VP).
...
Fold the bi-directional part select into the pass switch (tran) support
so that it can be really bi-directional. This involves adding a new
tranvp device that does part select in tran islands, and reworking the
tran island resolution to handle non-identical nodes. This will be needed
for resistive tran devices anyhow.
2008-06-03 11:16:25 -07:00
df15a0368c
Collect NetTran devices into islands.
...
NetTran devices must be collected into islands because they are all
a bi-directional mass. This is how vvp will process them and the code
generator will need a head start organizing them.
2008-06-01 19:45:12 -07:00
ca756f3ec3
Bring switch information out to the ivl_target API.
...
This involves defining the API for switches and cleaning up the
elaborated form to match the defined ivl_target API. Also add t-dll
code to support the ivl_switch_t functions, and add stub code that
checks the results.
2008-05-23 20:53:10 -07:00
ec773fe8cf
Elaborate tran devices
...
The tran devices include tran, rtran, tranif0/1 and rtranif0/1. These
are all elaborated as options on a NetTran device. It is still not
clear the best way to present tran devices via the ivl_target.h API.
2008-05-19 21:42:52 -07:00
a33619a0f5
Properly pad results of function calls.
...
The elaborator improperly allowed user function call nodes to take on
the expression width requested of them. The result was that generated
code had junk pad bits in certain cases.
2008-05-09 15:25:42 -07:00
86a4025b58
Push file and line information for scopes to the runtime.
...
This patch adds code to push the file and line information
for scope objects (modules, functions, tasks, etc.) to the
runtime. For modules, this includes the definition fields.
2008-04-29 21:51:34 -07:00
436e2fca13
Add ifnone functionality.
...
This patch adds ifnone functionality. It does not produce an
error when both an ifnone and an unconditional simple module
path are given. For this case the ifnone delays are ignored.
2008-04-29 11:55:32 -07:00
e7d463704c
The inputs to logical and/or are condition expressions.
...
Logical and/or take as inputs condition expressions, which are scalar
expressions. Be sure to reduce vectors using proper logic to get the
right condition value.
2008-04-22 21:03:18 -07:00
c38e8182c2
Add checks that verify an always statement has delay.
...
This patch adds check to determine if an always block has delay
in it or not. If there is no delay a runtime infinite loop will
occur. For the indeterminate case it will print a warning message
if the new -Winfloop flag is given. This flag is not part of the
-Wall check!
2008-04-22 19:53:23 -07:00
35e511d0c0
Check delay expressions correctly and give a better message.
...
This patch uses the true delay expression count not the truncated
one to check that the number of delay expressions is correct.
It also prints the actual number of expressions it found when
printing the error message.
2008-04-20 21:39:17 -07:00
7bc9742710
Pad the R-value of a for loop initial assign like other assigns.
...
The for loop initial value R-value was not being padded correctly.
This code is a copy of the code used in a regular assignment.
2008-03-26 18:09:03 -07:00
140fd45460
Implicit declaration handling in ports to UDP.
...
Scan port expressions for implicit nets using elaborate_sig.
2008-03-20 21:44:35 -07:00
d26ae866f8
Move implicit net creation from elaboration to elaborate_sig
...
If implicit nets are declared during elaboration, then the success
of binding during elaboration will depend on the order of the code
in the source file.
2008-03-18 20:50:40 -07:00
fe72d02cf6
Major rework of the ternary operator elaboration code.
...
This patch reworks much of the ternary code to short circuit when
possible and supports real values better. It adds a blend operator
for real values that returns 0.0 when the values differ and the value
when they match. This deviates slightly from the standard which
specifies that the value for reals is always 0.0 when the conditional
is 'bx. There are also a couple bug fixes.
These fixes have not been ported to continuous assignments yet.
Ternary operators used at compile time and in procedural assignments
should be complete (short circuit and support real values).
2008-03-08 19:45:13 -08:00
692caca9dc
Connect module instance arrays MSB to MSB.
...
When a bit port of a module instance is connected to a vector
argument, the MSB module instance should be connected to the MSB
of the vector argument. This matters only in the rare case that
the %m is used. It also makes wave dumps come out right.
2008-03-06 20:37:08 -08:00
8d3febff2b
Keep processes in proper lexical scope
...
Normally processes are found in the lexical scope of a module, but
there are special cases where processes (other then task/function
definitions) are in other lexical scopes. The most likely case is
initilizations that are in the lexical scope where the assigned
variable is declared.
In the process, the behaviors list is kept in the base PScope class
instead of the Module or any other derived lexical scope class.
2008-03-03 20:49:52 -08:00
52ac96ca15
elaborate_sig for generated case items
...
Handle elaborate_sig for scopes that are within a case-generated
scheme.
2008-02-27 20:54:47 -08:00
11a33a0907
Merge branch 'pscope'
2008-02-24 19:45:21 -08:00
8e704cbf93
Rework handling of lexical scope
...
Move the storage of wires (signals) out of the Module class into
the PScope base class, and instead of putting the PWires all into
the Module object, distribute them into the various lexical scopes
(derived from PScope) so that the wire names do not need to carry
scope information.
This required some rewiring of elaboration of signals, and rewriting
of lexical scope handling.
2008-02-24 19:40:54 -08:00
b0e4a6884a
Objects of lexical scope use PScope base class.
...
All the pform objects that represent lexical scope now are derived
from the PScope class, and are kept in a lexical_scope table so that
the scope can be managed.
2008-02-15 21:20:24 -08:00
2b5560957a
Force the L-value and R-value to match for real values.
...
Check that if either the L-value or the R-value are real then both
must be real. This prevents a runtime crash.
2008-02-13 20:44:16 -08:00
bc1d3eb7cd
Add support for generate case
...
Generate case is a complex generate scheme where the items are
sub-schemes of the case generate itself. The parser handles them
something like nested generate statements, but storing the case
guards as the test expression. Then the elaborator notes the
case scheme and reaches into the case item schemes inside to make
up tests, select the generate item, and elaborate.
2008-02-09 22:19:42 -08:00
f1f2806e3c
Get delays of signed extended continuous assignments right.
...
Padding and continuous assignment caused problems if the continuous
assignment includes a delay. The problem is that the padding was
not necessarily included in the delay. Rework the elaboration to
make sure the padding is indeed included in the delay.
2008-02-01 20:13:23 -08:00
d9ac146b8f
Spelling fixes
...
only comments and documentation
some punctuation and capitalization for good measure
Changelogs are purposefully untouched
2008-01-29 20:24:24 -08:00
47d65034db
Spelling fixes
...
mostly comments, but includes some identifiers and message text
2008-01-27 18:18:13 -08:00
731f1df70b
Hook up input port part select properly.
...
The input part select that is used to match a module port to a short
vector connected to it was wired incorrectly.
2008-01-10 20:47:06 -08:00
9d0cdc8ae9
Hook up output port part select properly.
...
The output part select that is used to match a module port to a long
vector connected to it was wired incorrectly.
2008-01-10 18:20:21 -08:00
f8d410e2d4
remove lint flagged by gcc-4.3
...
watch for possible behavior changes in
elaborate.cc:3409
vvp/vvp_net.cc:600
2008-01-07 18:39:10 -08:00
8ea3b6b0b8
header includes for gcc-4.3 compatibility
...
minimal changes required to build without error
tested with gcc-4.3 (Debian 4.3-20071130-1) 4.3.0 20071130 (experimental)
2008-01-04 16:14:44 -08:00
58d3d2f265
Better track signals marked local.
2007-12-27 16:47:01 -07:00
1db19b8703
Make statement file lineno available to targets.
...
Make the Verilog file/lineno of statements available to loadable
code generators. Make sure the information is properly set for
system task calls.
2007-12-22 09:31:24 -05:00
7975e14b5c
LineInfo uses perm_string for path.
...
Rework the handling of file names to use a perm_string heap to hold
the file names, instead of the custom file name heap in the lexor.
Also rename the get_line to get_fileline to reflect its real duties.
This latter chage touched a lot of files.
2007-12-20 12:31:01 -05:00
dd56dd1635
Correct naming of unnamed generate blocks.
...
This patch causes unnamed generate blocks to be automatically named
using the naming scheme defined in the Verilog-2005 standard. This
is a fix for the problem discussed in pr1821610.
2007-11-18 21:01:35 -08:00
05a6e69d2d
Support nested generate schemes.
...
This patch adds support for nested loops and if-else decisions in generate
statements.
2007-11-07 21:27:00 -08:00
e26b9e72a2
More array fixes and down indexed part selects can be a lval.
...
Here are some more array fixes. They are mostly better error messages
instead of just asserting and some code cleanup. The one new thing
that probably should have been a separate submission is that down
indexed part select [base -: width] can now be a lvalue.
2007-11-07 20:53:27 -08:00
2ea6692833
Make patch for pr1792108 synth aware.
...
This patch makes the behavior selection fro pr1792108 depend on the
synth* functors.
2007-11-07 20:00:51 -08:00
221c99c5f4
Only remove output nets for synthesis backends.
...
During elaboration only remove output nets for synthesis backends.
2007-11-07 20:00:33 -08:00
dbce0cb05a
Fix @* to correctly handle non-input nets.
...
@* was only expanding to input nets. nex_input() for blocks was removing
any output net that was also an input. There was also a bug in how output
nets were removed. Only outputs currently defined were removed from the
input list.
always @(*) begin
y = a;
z = y;
end
would report "a" as an input. While
always @(*) begin
z = y;
y = a;
end
would report both "a" and "y" as inputs.
To fix this all nex_inputs now take a flag that when true (the default)
correctly removes any output from the input list. Both the above cases
will now return "a". If the flag is false outputs which are also inputs
will be included in the input list. This is what the @* elaboration code
uses to get the correct sensitivity list.
2007-11-07 20:00:05 -08:00
9c99b002ba
Resize vectors to mismatched ports
...
It is legal in Verilog to bind expressions to ports that do not
match the port width. Icarus Verilog needs to create the necessary
part selects to get the connections right.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-09-09 21:14:52 -07:00
d43cda3def
Add port checks for primitives.
...
This patch adds functionality to verify that primitives are given
an appropriate number of ports. For multiple output gates (but,
not, pulldown, pullup) it also reports that Icarus currently does
not support multiple outputs when more than one is given.
2007-09-06 18:50:02 -07:00
7c852aa075
Add cmos/rcmos primitives.
...
This patch adds the cmos and rcmos primitives.
2007-09-06 18:46:22 -07:00
7bf4b64c0a
Check that logic gates are not given null ports.
...
Logic gates do not handle null ports so check for this and
issue an error message when it happens.
2007-09-04 16:13:46 -07:00
4f6b47b345
Check that functions do not call invalid statements.
...
This patch adds checks to verify that functions do not invoke
statements that are invalid for them (#, @, wait, enable/call
tasks and non blocking assignment). For reference see section
10.3.4 of 1364-2001.
2007-08-30 20:41:45 -07:00
845e74c30e
Evaluate parameter expressions losslessly
...
Make sure parameter expressions are evaluated losslessly, as if
the l-value is unsigned and thus virtually infinite.
2007-06-27 22:05:36 -07:00
396ffd1cdd
Add support for conditional generate. In the process, fix bugs
...
related to generate used multiple times by multiple scopes causing
spurious generation results.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-21 19:04:48 -07:00
b631268f56
Error resiliency (ldoolitt)
2007-06-05 21:35:51 +00:00
129a064e1a
Handle bit/part select of array words in nets.
2007-06-04 02:19:07 +00:00
c7d97f4146
Properly evaluate scope path expressions.
2007-06-02 03:42:12 +00:00
ddd36ecb6c
Rework the heirarchical identifier parse syntax and pform
...
to handle more general combinations of heirarch and bit selects.
2007-05-24 04:07:11 +00:00
36471e9f96
Properly ignore unsupported ifnone.
2007-04-16 01:10:07 +00:00
79fdb2b243
Attach line number information to task calls.
2007-04-15 20:45:40 +00:00
f621448ced
Parse edge sensitive paths without edge specifier.
2007-04-13 02:34:35 +00:00
af913e7eb1
Allow implicit wires in assign l-value.
2007-04-05 03:09:50 +00:00
bd1b00ca29
Improve port mismatch error message.
2007-04-01 23:01:10 +00:00
611d2c81b3
Spelling fixes from Larry
2007-03-22 16:08:14 +00:00
d9efe3312e
Limit the calculated widths of constants.
2007-03-08 05:30:02 +00:00
e6fa72c318
Handle processes within generate loops.
2007-03-05 05:59:10 +00:00
606751dbfd
Check that path source/destination are ports.
2007-03-03 05:56:55 +00:00
fc9a90c9e0
Add support for edge sensitive spec paths.
2007-03-02 06:13:22 +00:00
243cf94165
Add support for conditional specify delay paths.
2007-03-01 06:19:38 +00:00
c1c2381261
Parse all specify paths to pform.
2007-02-12 01:52:21 +00:00
a623502ece
More generous handling of errors in blocks.
2007-02-01 05:52:24 +00:00
f77d803aeb
Clean up elaboration of for-loop increment expression.
2007-01-21 04:26:36 +00:00
ca9da51a79
Precalculate constant power expressions, and constant function arguments.
2007-01-19 05:42:40 +00:00
91d84e7dc7
Major rework of array handling. Memories are replaced with the
...
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
2c7d2effd1
Fix an uninitialized variable warning.
2006-12-09 01:59:35 +00:00
2eeea7003e
@* without inputs is an error.
2006-12-08 04:09:41 +00:00
48029ed8e5
Fix crash handling constant true conditional.
2006-11-27 02:01:07 +00:00
94f07d16e3
Fix compile time eval of condition expresion to do reduction OR of vectors.
2006-11-26 07:10:30 +00:00
041091cfac
Fix nexus widths for direct link assign and ternary nets.
2006-11-26 06:29:16 +00:00
c339dc4bbc
Remove last bits of relax_width methods, and use test_width
...
to calculate the width of an r-value expression that may
contain unsized numbers.
2006-11-04 06:19:24 +00:00
2302693201
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 05:44:49 +00:00
4af28e2b77
no-specify turns of specparam elaboration.
2006-10-03 15:33:49 +00:00
69cd007a71
Support real valued specify delays, properly scaled.
2006-10-03 05:06:00 +00:00
d6be82f748
Support selective control of specify and xtypes features.
2006-09-28 04:35:18 +00:00
b658a3b41f
Missing PSpec.cc file.
2006-09-26 19:48:40 +00:00
0edb5a7547
Basic support for specify timing.
2006-09-23 04:57:19 +00:00
0e2c6544b9
Proper error message when logic array pi count is bad.
2006-09-22 22:14:27 +00:00
fc0695beb6
Handle 64bit delay constants.
2006-08-08 05:11:37 +00:00
71faebd6df
Make elaborate_expr methods aware of the width that the context
...
requires of it. In the process, fix sizing of the width of unary
minus is context determined sizes.
2006-06-02 04:48:49 +00:00
a8b86ea3bb
More explicit datatype setup.
2006-05-01 20:47:58 +00:00
0c9fb766b6
Get the data type of part select results right.
2006-04-30 05:17:48 +00:00
4493e3f928
Chop down assign r-values that elaborate too wide.
2006-04-26 04:43:50 +00:00
f001d0001a
Add support for generate loops w/ wires and gates.
2006-04-10 00:37:42 +00:00
e8efa6df53
Fix instance arrays indexed by overridden parameters.
2006-03-30 01:49:07 +00:00
368c27c9e4
Handle complex net node delays.
2006-01-03 05:22:14 +00:00
58f182a159
Node delays can be more general expressions in structural contexts.
2006-01-02 05:33:19 +00:00
0e044d6684
More precise about r-value width of constants.
2005-11-26 00:35:42 +00:00
c02b3b8ac6
Reorganize signal part select handling, and add support for
...
indexed part selects.
Expand expression constant propagation to eliminate extra
sums in certain cases.
2005-11-10 13:28:11 +00:00
16dc3ab4d4
Error message for invalid for-loop index variable.
2005-09-27 04:51:37 +00:00
9fd16575d9
Support bool expressions and compares handle them optimally.
2005-09-14 02:53:13 +00:00
4a8be3db9c
Implement bi-directional part selects.
2005-08-06 17:58:16 +00:00
bc9f286954
More debug information.
2005-07-15 00:41:09 +00:00
b9799cf6ec
Remove NetVariable and ivl_variable_t structures.
2005-07-11 16:56:50 +00:00
657ac8168e
Debug messages.
2005-06-17 05:06:47 +00:00
739a1839ed
Do sign extension of structuran nets.
2005-05-24 01:44:27 +00:00
7796c8bcfb
Parameters cannot have their width changed.
2005-05-17 20:56:55 +00:00
adbe734b6c
Some debug messages.
2005-05-13 05:12:39 +00:00
365cfedd55
Update DFF support to new data flow.
2005-04-24 23:44:01 +00:00
4ccbb4f0b2
Get rval width right for arguments into task calls.
2005-03-05 05:38:33 +00:00
257e1f9516
Support shifts and divide.
2005-02-19 02:43:38 +00:00
55b5bf9d39
distinguish between single port namy instances, and single instances many sub-ports.
2005-02-10 04:56:58 +00:00
ee5bb5fcaf
Add the NetRepeat node, and code generator support.
2005-02-08 00:12:36 +00:00
c23a35a033
Debug messages for PGAssign elaboration.
2005-01-30 01:42:05 +00:00
25de448d34
Remove obsolete NetSubnet class.
2005-01-22 18:16:00 +00:00
4d139b58aa
Properly pad vector widths in pgassign.
2005-01-12 03:17:36 +00:00
9e94afe399
Use PartSelect/PV and VP to handle part selects through ports.
2005-01-09 20:16:00 +00:00
8f2d679c8a
Unify elaboration of l-values for all proceedural assignments,
...
including assing, cassign and force.
Generate NetConcat devices for gate outputs that feed into a
vector results. Use this to hande gate arrays. Also let gate
arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
3947d7dd33
Force r-value padded to width.
2004-12-15 17:09:11 +00:00
d19e76a193
Fix r-value width of continuous assign.
2004-12-12 18:13:39 +00:00
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
c10e572091
Support degenerat wait statements.
2004-09-05 21:07:26 +00:00
9de786fc44
Add support for module instance arrays.
2004-09-05 17:44:41 +00:00
8bf434754f
Propagate source line number in synthetic delay statements.
2004-06-30 15:32:02 +00:00
76c0fe459c
Only pad the width of vector r-values.
2004-06-20 15:59:06 +00:00
9949040285
Add support for the default_nettype directive.
2004-06-13 04:56:53 +00:00
5472b27e1f
Rewire/generalize parsing an elaboration of
...
function return values to allow for better
speed and more type support.
2004-05-31 23:34:36 +00:00
55ba131997
Handle wait with constant-false expression.
2004-05-25 03:42:58 +00:00
c6453a0854
primitive ports can bind bi name.
2004-03-08 00:47:44 +00:00
413932e406
Verilog2001 new style port declartions for primitives.
2004-03-08 00:10:29 +00:00
9531920685
MOre thorough use of elab_and_eval function.
2004-03-07 20:04:10 +00:00
177b6ffb6a
Addtrbute keys are perm_strings.
2004-02-20 18:53:33 +00:00
27af95d402
Use perm_strings for named langiage items.
2004-02-18 17:11:54 +00:00
6a02613fca
Get rid of useless warning.
2004-01-21 04:35:03 +00:00
e617e4a98c
Handle wide expressions in wait condition.
2004-01-13 03:42:49 +00:00
ee172bdccf
Attach line number information to for loop parts.
2003-10-26 04:49:51 +00:00
39b2928ad8
Summary list of missing modules.
2003-09-25 00:25:14 +00:00
6abe797963
Evaluate nb-assign r-values using elab_and_eval.
2003-09-20 06:08:53 +00:00
94a71fdee8
Evaluate gate array index constants using elab_and_eval.
2003-09-20 06:00:37 +00:00
1f0c274e82
Obsolete find_symbol and find_event from the Design class.
2003-09-20 01:05:35 +00:00
178847fc53
Spelling fixes.
2003-09-13 01:01:51 +00:00
cee34f8a8a
Support time0 resolution of combinational threads.
2003-09-04 20:28:05 +00:00
7c1401a2ba
Spelling patch.
2003-08-28 04:11:17 +00:00
c96598a429
Primitive outputs have same limitations as continuous assignment.
2003-08-05 03:01:58 +00:00
004ecd08dd
Elide empty begin-end in conditionals.
2003-07-02 04:19:16 +00:00
61195c5daa
Harmless fixup of warnings.
2003-06-21 01:21:42 +00:00
b43c543455
Handle assign of real to vector.
2003-06-13 19:10:20 +00:00
17e93b7cbe
Implement the wait statement behaviorally instead of as nets.
2003-05-19 02:50:58 +00:00
d958fd2c36
Fix truncation of signed constant in constant addition.
2003-05-04 20:04:08 +00:00
5b726e09af
Include port name in port assignment error message.
2003-04-24 05:25:55 +00:00
d18934d444
Sign extend NetMult inputs if result is signed.
2003-03-29 05:51:25 +00:00
4e182ebf67
Some better internal error messages.
2003-03-26 06:16:38 +00:00
badad63ab4
All NetObj objects have lex_string base names.
2003-03-06 00:28:41 +00:00
4c67de5ca7
Add the lex_strings string handler, and put
...
scope names and system task/function names
into this table. Also, permallocate event
names from the beginning.
2003-03-01 06:25:30 +00:00
cd572a74ce
Add the portbind warning.
2003-02-22 04:12:49 +00:00
e571dd90d8
Calculate delay statement delays using elaborated
...
expressions instead of pre-elaborated expression
trees.
Remove the eval_pexpr methods from PExpr.
2003-02-08 19:49:21 +00:00
55af069fe8
Rewrite delay statement elaboration of handle real expressions.
2003-02-07 02:49:24 +00:00
e941e7e805
Spelling fixes.
2003-01-30 16:23:07 +00:00
8f0c02c0fa
Spelling fixes.
2003-01-27 05:09:17 +00:00
46253ed873
Rework expression parsing and elaboration to
...
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
f56d763411
Move strstream to ostringstream for compatibility.
2003-01-14 21:16:18 +00:00
dedae73761
Account for local units in calculated delays.
2002-12-21 19:42:17 +00:00
b89e138404
precalculate r-values of nb assignments and task arguments.
2002-12-05 04:15:14 +00:00
807a758f7c
Do not set width if width is already OK.
2002-11-26 03:35:13 +00:00
cfd8cbf850
Port expressions for output ports are lnets, not nets.
2002-11-09 19:20:48 +00:00
3fca25181a
Evaluate nonblocking assign r-values.
2002-08-28 18:54:36 +00:00
c0046e845e
Handle special case of empty system task argument list.
2002-08-15 02:11:54 +00:00
d4eaede435
Do not elide named blocks.
2002-08-13 05:35:00 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
37331d1c1b
Add port name to pin size error message.
2002-07-31 23:55:38 +00:00
843e1f9c44
Save event matching for nodangle.
2002-07-24 16:22:59 +00:00
15becdaee4
Need driver for sure in assign feedback and other cases.
2002-07-18 02:06:37 +00:00
80c9db3c88
Careful with assign to self.
2002-07-18 00:24:22 +00:00
3f1cd14f6c
Fix scope search for events.
2002-07-03 05:34:59 +00:00
cd94019733
Remove NetTmp and add NetSubnet class.
2002-06-19 04:20:03 +00:00
53d8cdd9f8
Add support for memory words in l-value of
...
non-blocking assignments, and remove the special
NetAssignMem_ and NetAssignMemNB classes.
2002-06-05 03:44:25 +00:00
91a755d0e8
Add support for memory words in l-value of
...
blocking assignments, and remove the special
NetAssignMem class.
2002-06-04 05:38:43 +00:00
422754f36f
Support carrying the scope of named begin-end
...
blocks down to the code generator, and have
the vvp code generator use that to support disable.
2002-05-27 00:08:45 +00:00
bfad382fd1
Carry Verilog 2001 attributes with processes,
...
all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
e6c0629626
Add language support for Verilog-2001 attribute
...
syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
c787a36af2
Accept errors in memory index expression.
2002-05-12 19:16:58 +00:00
f5d3b78653
Use else clause instead of ! to preface wait events.
2002-05-07 05:06:07 +00:00
0696e3d558
Agressively evalutate case expressions.
2002-04-24 17:40:48 +00:00
0976fd393b
Do not allow implicit wires in sensitivity lists.
2002-04-22 00:53:39 +00:00
5882c6a481
Redo handling of assignment internal delays.
...
Leave it possible for them to be calculated
at run time.
2002-04-21 22:31:02 +00:00
b094bbdcf4
Add support for conbinational events by finding
...
the inputs to expressions and some statements.
Get case and assignment statements working.
2002-04-21 04:59:07 +00:00
6733f7625b
Detect missing indices to memories (PR#421)
2002-04-13 02:33:17 +00:00
3d646aa92c
Constant expressions are not l-values for task ports.
2002-03-09 04:02:26 +00:00
0b68639f7d
elaborate deassign lval as done for assign.
2002-01-23 05:56:22 +00:00
a02cfe0f1b
Evaluate case guards, if possible.
2002-01-19 20:09:56 +00:00
c9d6b5431d
Remove test print
2001-12-31 00:39:20 +00:00
000d187c94
Do not delete delay expressions of UDP instances.
2001-12-29 20:19:31 +00:00
4b174fd996
Forgot to evaluate UDP delays.
2001-12-06 05:04:49 +00:00
dbf5509f4f
Support delays on UDP instances.
2001-12-06 04:44:11 +00:00
ab6c8cb4b8
Parser and pform use hierarchical names as hname_t
...
objects instead of encoded strings.
2001-12-03 04:47:14 +00:00
82831ea9a5
Use NetScope instead of string for scope path.
2001-11-22 06:20:59 +00:00
7793a49854
Remove string paths from PExpr elaboration.
2001-11-08 05:15:50 +00:00
6bfbcbdcf7
elaborate_lnet uses scope instead of string path.
2001-11-07 04:26:46 +00:00
bf72f39fe9
eval_const uses scope instead of a string path.
2001-11-07 04:01:59 +00:00
649428962e
Pad limited r-values in continuous assignments.
2001-11-04 23:12:29 +00:00
b3e430c751
Give up if roots are missing.
2001-10-31 03:22:31 +00:00
874bab10e4
NetObj constructor finally requires a scope.
2001-10-28 01:14:53 +00:00
b01316ce12
Better error message for mising root module.
2001-10-22 23:26:37 +00:00
990df42407
Handle activating tasks in another root.
2001-10-22 02:05:20 +00:00
9f3e64e11a
Module types in pform are char* instead of string.
2001-10-21 00:42:47 +00:00
6466d02eda
Add automatic module libraries.
2001-10-20 23:02:39 +00:00
7a149a6943
Scope/module names are char* instead of string.
2001-10-20 05:21:51 +00:00
d350620315
Support multiple root modules (Philip Blundell)
2001-10-19 21:53:24 +00:00
e35ed6e91c
Change the NetAssign_ class to refer to the signal
...
instead of link into the netlist. This is faster
and uses less space. Make the NetAssignNB carry
the delays instead of the NetAssign_ lval objects.
Change the vvp code generator to support multiple
l-values, i.e. concatenations of part selects.
2001-08-25 23:50:02 +00:00
d8141252e9
Accept empty port lists to module instantiation.
2001-08-01 05:17:31 +00:00
e17f7f5146
Detect a missing task definition before it crashes me.
2001-07-28 22:13:11 +00:00
b825f8d2b2
Create a config.h.in file to hold all the config
...
junk, and support gcc 3.0. (Stephan Boettcher)
2001-07-25 03:10:48 +00:00
83de770387
Do not connect reg to module outputs.
2001-07-19 03:43:15 +00:00
a033c331b6
Report line of unsupported cassign.
2001-06-27 18:34:43 +00:00
5aee3b866a
do not assert if memory reference is invalid.
2001-05-17 03:35:22 +00:00
a52b34cb64
Add pullup and pulldown devices.
2001-04-29 20:19:10 +00:00
9bb2cee686
UDP instances need not have user supplied names.
2001-04-28 23:18:08 +00:00
8dfa322b8b
Support for UDP devices in VVP (Stephen Boettcher)
2001-04-24 02:23:58 +00:00
66cf3ec8fa
More UDP consolidation from Stephan Boettcher.
2001-04-22 23:09:45 +00:00
f40d006c26
Generate code for task calls.
2001-04-02 02:28:12 +00:00
2b0aaec8ab
FreeBSD port has a maintainer now.
2001-02-15 06:59:35 +00:00
7ef3b44ab1
support evaluation of constant < in expressions.
2001-02-09 05:44:23 +00:00
2fbc0af1ea
Fix expression widths for rvalues and parameters (PR#131,132)
2001-02-07 21:47:13 +00:00
219df169a3
Generalize the evaluation of floating point delays, and
...
get it working with delay assignment statements.
Allow parameters to be referenced by hierarchical name.
2001-01-14 23:04:55 +00:00
5276752276
Build task outputs as lval instead of nets. (PR#98)
2001-01-10 03:13:23 +00:00
6bf599e839
Cope with width mismatches to module ports (PR#89)
2001-01-09 05:58:47 +00:00
5144725b8f
Accept x in outputs of primitive. (PR#84)
2000-12-15 01:24:17 +00:00
084a464cf1
Support decimal constants in behavioral delays.
2000-12-10 22:01:35 +00:00
9ddd0491f7
Support delays on continuous assignment from idents. (PR#40)
2000-12-10 06:41:59 +00:00
f6507cba43
Check lvalue of procedural continuous assign (PR#29)
2000-12-06 06:31:09 +00:00
e310532434
Handle null statements inside a wait. (PR#60)
2000-12-01 23:52:49 +00:00
28bc621f11
change set for support of nmos, pmos, rnmos, rpmos, notif0, and notif1
...
change set to correct behavior of bufif0 and bufif1
(Tim Leight)
Also includes fix for PR#27
2000-11-11 01:52:09 +00:00
f4ed0e35af
Handle connectsion to internally unconnected modules (PR#38)
2000-11-05 06:05:59 +00:00
ad4931e813
Add scope to threads in vvm, pass that scope
...
to vpi sysTaskFunc objects, and add vpi calls
to access that information.
$display displays scope in %m (PR#1)
2000-10-28 00:51:41 +00:00
f915efaf15
Fix handling of errors in behavioral lvalues. (PR#28)
2000-10-26 17:09:46 +00:00
76e2c509d7
Put logic devices into scopes.
2000-10-07 19:45:42 +00:00
40028f263f
Do not put noop statements into blocks.
2000-09-29 22:58:57 +00:00
cbe20e8bcf
fix null pointer when elaborating undefined task.
2000-09-24 17:41:13 +00:00
9067c91656
Correctly measure comples l-values of assignments.
2000-09-20 02:53:14 +00:00
b6ce313e91
move lval elaboration to PExpr virtual methods.
2000-09-09 15:21:26 +00:00
4cf75adf94
Fix bit padding of assign signal-to-signal
2000-09-07 01:29:44 +00:00
49570b8cd9
encapsulate access to the l-value expected width.
2000-09-07 00:06:53 +00:00
24e46723b0
Change elaborate_lval to return NetAssign_ objects.
2000-09-03 17:58:35 +00:00
115d24a292
Pull NetAssign_ creation out of constructors.
2000-09-02 23:40:12 +00:00
ac81f6a201
Rearrange NetAssign to make NetAssign_ separate.
2000-09-02 20:54:20 +00:00
a59bbdeb4f
Proper error messages when port direction is missing.
2000-08-18 04:38:57 +00:00
0243fca8dc
Rearrange task and function elaboration so that the
...
NetTaskDef and NetFuncDef functions are created during
signal enaboration, and carry these objects in the
NetScope class instead of the extra, useless map in
the Design class.
2000-07-30 18:25:43 +00:00
4494a7a4f3
Support elaboration of disable statements.
2000-07-27 05:13:44 +00:00
739365abe5
Parse disable statements to pform.
2000-07-26 05:08:07 +00:00
286cef19fb
Parse and elaborate timescale to scopes.
2000-07-22 22:09:03 +00:00
42e4ff47c8
Move inital value handling from NetNet to Nexus
...
objects. This allows better propogation of inital
values.
Clean up constant propagation a bit to account
for regs that are not really values.
2000-07-14 06:12:56 +00:00
18eb34921f
Add support for non-constant delays in delay statements,
...
Support evaluating ! in constant expressions, and
move some code from netlist.cc to net_proc.cc.
2000-07-07 04:53:53 +00:00
66ae567b25
Index in memory assign should be a NetExpr.
2000-06-13 03:24:48 +00:00
c1c0168893
Globally merge redundant event objects.
2000-05-31 02:26:49 +00:00
fd09bc3e3e
Merge similar probes within a module.
2000-05-27 19:33:23 +00:00
3676d66408
Module ports are really special PEIdent
...
expressions, because a name can be used
many places in the port list.
2000-05-16 04:05:15 +00:00
367db72c99
Add support for procedural continuous assignment.
2000-05-11 23:37:26 +00:00
e81ce68e8c
Use bufz to make assignments directional.
2000-05-08 05:28:29 +00:00
c4d8ded269
non-blocking assignment to a bit select.
2000-05-07 21:17:21 +00:00
b90cda1f3f
Carry strength values from Verilog source to the
...
pform and netlist for gates.
Change vvm constants to use the driver_t to drive
a constant value. This works better if there are
multiple drivers on a signal.
2000-05-07 04:37:55 +00:00
1db70a0c46
Move signal elaboration to a seperate pass.
2000-05-02 16:27:38 +00:00
69612ceb73
Move memories to the NetScope object.
2000-05-02 03:13:30 +00:00
8d8f1e2401
Move signal tables to the NetScope class.
2000-05-02 00:58:11 +00:00
77361fb8a0
Overly aggressive eliding of task calls.
2000-04-28 23:12:12 +00:00
3a9be680a4
Skip empty tasks.
2000-04-28 22:17:47 +00:00
08e9a114a2
Catch memory word parameters to tasks.
2000-04-28 16:50:53 +00:00
a8114ae122
Add support for the procedural release statement.
2000-04-23 03:45:24 +00:00
44838f8973
Add support for force assignment.
2000-04-22 04:20:19 +00:00
99a891b8a1
Bit padding in assignment to memory.
2000-04-21 04:38:15 +00:00
4f07c43976
Minor cleanup of NetTaskDef.
2000-04-18 01:02:53 +00:00
b1fd927acb
Named events really should be expressed with PEIdent
...
objects in the pform,
Handle named events within the mix of net events
and edges. As a unified lot they get caught together.
wait statements are broken into more complex statements
that include a conditional.
Do not generate NetPEvent or NetNEvent objects in
elaboration. NetEvent, NetEvWait and NetEvProbe
take over those functions in the netlist.
2000-04-12 04:23:57 +00:00
8dbd64121f
All events now use the NetEvent class.
2000-04-10 05:26:05 +00:00
72b3508911
Catch event declarations during scope elaborate.
2000-04-09 17:44:30 +00:00
e9b06f1022
Catch event names in parentheses.
2000-04-09 16:43:50 +00:00
30e8289239
Simulate named event trigger and waits.
2000-04-04 03:20:15 +00:00
6150be2324
detect unsupported block on named events.
2000-04-01 22:14:19 +00:00
2dd010dc04
Named events as far as the pform.
2000-04-01 19:31:57 +00:00
d97ab9be23
New and improved combinational primitives.
2000-03-29 04:37:10 +00:00
94270ff988
Fix lval part select of non-blocking assign.
2000-03-20 15:28:58 +00:00
01c5147079
Connect output of NB assign to indexed pin.
2000-03-12 21:41:47 +00:00
78ab1a7bba
Locate scopes in statements.
2000-03-11 03:25:51 +00:00
61822d48aa
Handle defparam to partial hierarchical names.
2000-03-10 06:20:48 +00:00
e7efc2709a
Redesign the implementation of scopes and parameters.
...
I now generate the scopes and notice the parameters
in a separate pass over the pform. Once the scopes
are generated, I can process overrides and evalutate
paremeters before elaboration begins.
2000-03-08 04:36:53 +00:00
b734ecf02f
Macintosh compilers do not support ident.
2000-02-23 02:56:53 +00:00
5b52c384d6
Catch module instantiation arrays.
2000-02-18 05:15:02 +00:00
bd09bed662
Mark the line numbers of NetCondit nodes.
2000-02-14 00:11:11 +00:00
ee180f6cf0
Include the scope in named gates.
2000-02-06 23:13:14 +00:00
fac3bde2c8
Elaborate parameters afer binding of overrides.
2000-01-10 01:35:23 +00:00
9125a4c451
Careful with wires connected to multiple ports.
2000-01-09 20:37:57 +00:00
2de887c2ff
Support named parameter override lists.
2000-01-09 05:50:48 +00:00
0d5e4b40d0
Structural reduction XNOR.
2000-01-02 19:39:03 +00:00
142b9e667d
Do not overrun the pin index when the LSB != 0.
2000-01-02 18:25:37 +00:00
e6820ed169
Handle synthesis of concatenation.
2000-01-01 06:18:00 +00:00
6e3c258edb
Detect duplicate scopes.
1999-12-14 23:42:16 +00:00
3e1738dcec
Fix support for attaching attributes to primitive gates.
1999-12-11 05:45:41 +00:00
3e2bb85f58
Synthesize LPM_RAM_DQ for writes into memories.
1999-12-05 02:24:08 +00:00
cdb99e7638
Elaborate net repeat concatenations.
1999-12-02 04:08:10 +00:00
e96e8c62be
NetESignal object no longer need to be NetNode
...
objects. Let them keep a pointer to NetNet objects.
1999-11-28 23:42:02 +00:00
4cfa3e4047
Support the creation of scopes.
1999-11-27 19:07:57 +00:00
26288eeeb4
Detect and list scope names.
1999-11-24 04:01:58 +00:00
85ab6d160b
Handle multiply in constant expressions.
1999-11-21 20:03:24 +00:00
4cfa715092
Memory name lookup handles scopes.
1999-11-21 17:35:37 +00:00
b4aade1e4c
Fix coding errors handling names of logic devices,
...
and add support for buf device in vvm.
1999-11-21 01:16:51 +00:00
a81dcd7955
Support memories in continuous assignments.
1999-11-21 00:13:08 +00:00
9d6392fda9
Turn NetTmp objects into normal local NetNet objects,
...
and add the nodangle functor to clean up the local
symbols generated by elaboration and other steps.
1999-11-18 03:52:19 +00:00
82f3f0f741
Create the vpiMemory handle type.
1999-11-10 02:52:24 +00:00
206b37e5de
Fix NetConst being set to zero width, and clean
...
up elaborate_set_cmp_ for NetEBinary.
1999-11-05 21:45:19 +00:00
cb5fc54b5e
Patch to synthesize unary ~ and the ternary operator.
...
Thanks to Larry Doolittle <LRDoolittle@lbl.gov>.
Add the LPM_MUX device, and integrate it with the
ternary synthesis from Larry. Replace the lpm_mux
generator in t-xnf.cc to use XNF EQU devices to
put muxs into function units.
Rewrite elaborate_net for the PETernary class to
also use the LPM_MUX device.
1999-11-04 03:53:26 +00:00
e1bbbe5614
Include subtraction in LPM_ADD_SUB device.
1999-10-31 20:08:24 +00:00
71ecf8c143
Add to netlist links pin name and instance number,
...
and arrange in vvm for pin connections by name
and instance number.
1999-10-31 04:11:27 +00:00
8ab03fa90f
Catch unindexed memory reference.
1999-10-18 00:02:21 +00:00
475dd5760a
Remove commented out do_assign.
1999-10-13 03:16:36 +00:00
70a1236626
Structural case equals device.
1999-10-10 01:59:54 +00:00
7201865554
Support parameters in continuous assignments.
1999-10-09 21:30:16 +00:00
aa11f57b57
Better message for combinational operators.
1999-10-09 19:24:04 +00:00
29abc5a69e
Support + in constant expressions.
1999-10-08 17:48:08 +00:00
5b7d783979
Accept adder parameters with different widths,
...
and simplify continuous assign construction.
1999-10-08 17:27:23 +00:00
f949f96df1
Add non-const bit select in l-value of assignment.
1999-10-07 05:25:33 +00:00
1cc68f745a
== and != connected to the wrong pins of the compare.
1999-10-06 00:39:00 +00:00
4d8c0c79d6
Add support for reduction NOR.
1999-10-05 06:19:46 +00:00
d513cf8f60
sorry message for non-constant l-value bit select.
1999-10-05 02:00:06 +00:00
efa5222c66
Handle mutual reference of tasks by elaborating
...
task definitions in two passes, like functions.
1999-09-30 21:28:34 +00:00
ed9aeec591
catch non-constant delays as unsupported.
1999-09-30 17:22:33 +00:00
c63a3acf93
Elaborate ~^ and ~| operators.
1999-09-30 02:43:01 +00:00
6e486e9bcf
Cope with errors during ternary operator elaboration.
1999-09-30 00:48:49 +00:00
db7044850a
Move code to elab_expr.cc
1999-09-29 22:57:10 +00:00
a64a33e65a
Full case support
1999-09-29 18:36:02 +00:00
0fb4ba7907
Allow expanding of additive operators.
1999-09-29 00:42:50 +00:00
bb38653654
Parse system function calls.
1999-09-25 02:57:29 +00:00
1a21d2fe9d
Support shift operators.
1999-09-23 03:56:57 +00:00
095995f09c
internal error message for funky comparison width.
1999-09-23 02:28:27 +00:00
1c41f8ebd2
Move set_width methods into a single file,
...
Add the NetEBLogic class for logic expressions,
Fix error setting with of && in if statements.
1999-09-23 00:21:54 +00:00
59b1b4c7b9
Expand bits in delayed assignments.
1999-09-22 21:25:42 +00:00
12b9071f49
Parse and elaborate named for/join blocks.
1999-09-22 04:30:04 +00:00
da4a7ea80a
assignment with blocking event delay.
1999-09-22 02:00:48 +00:00
3a5e55b229
Elaborate parameters in phases.
1999-09-20 02:21:10 +00:00
5fde1b3e05
Match bit widths comming out of task output ports.
1999-09-18 22:23:50 +00:00
fbf104bf4d
report non-constant part select expressions.
1999-09-18 02:51:35 +00:00
dab04c221d
Detect constant lessthen-equal expressions.
1999-09-18 01:53:08 +00:00
424e6a750c
Handle unconnected module ports.
1999-09-17 02:06:25 +00:00
4594ac1c2c
elaborate concatenation repeats.
1999-09-16 04:18:15 +00:00
a890724b40
Handle implicit !=0 in if statements.
1999-09-16 00:33:45 +00:00
31bdb87c8f
separate assign lval elaboration for error checking.
1999-09-15 04:17:52 +00:00
b04148b754
Elaborate non-blocking assignment to memories.
1999-09-15 01:55:06 +00:00
39bc45ce67
implicitly declare wires if needed.
1999-09-14 01:50:52 +00:00
7a211b9136
Clarify msb/lsb in context of netlist. Properly
...
handle part selects in lval and rval of expressions,
and document where the least significant bit goes
in NetNet objects.
1999-09-13 03:10:59 +00:00
25d6912217
Pad r-values in certain assignments.
1999-09-12 01:16:51 +00:00
a6c6ac2191
Add ternary elaboration.
1999-09-10 04:04:06 +00:00
d6fbc30cd5
Allow assign to not match rvalue width.
1999-09-08 04:05:30 +00:00
9d82d19d07
Empty conditionals (pmonta@imedia.com)
1999-09-08 02:24:39 +00:00
8f68a07476
Add support for delayed non-blocking assignments.
1999-09-04 19:11:45 +00:00
41a1c6bb02
elaborate the binary plus operator.
1999-09-03 04:28:38 +00:00
6fb7120158
Parse non-blocking assignment delays.
1999-09-02 01:59:27 +00:00
9f7eb4a935
Handle recursive functions and arbitrary function
...
references to other functions, properly pass
function parameters and save function results.
1999-09-01 20:46:19 +00:00
e69345b9fe
Elaborate and emit to vvm procedural functions.
1999-08-31 22:38:29 +00:00
23acca48ff
elaborate some aspects of functions.
1999-08-25 22:22:41 +00:00
Larry Doolittle
Stephen Williams
Cary R
Martin Whitaker
steve