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Rearrange NetAssign to make NetAssign_ separate.

This commit is contained in:
steve 2000-09-02 20:54:20 +00:00
parent ff32325d07
commit ac81f6a201
12 changed files with 319 additions and 253 deletions
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4
Makefile.in
View File

@ -18,7 +18,7 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.63 2000/08/20 04:13:56 steve Exp $"
#ident "$Id: Makefile.in,v 1.64 2000/09/02 20:54:20 steve Exp $"
#
#
SHELL = /bin/sh
@ -75,7 +75,7 @@ FF = nodangle.o synth.o syn-rules.o xnfio.o
O = main.o cprop.o design_dump.o dup_expr.o elaborate.o elab_expr.o \
elab_net.o elab_pexpr.o elab_scope.o elab_sig.o emit.o eval.o eval_tree.o \
expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
mangle.o netlist.o \
mangle.o netlist.o net_assign.o \
net_design.o net_event.o net_force.o net_link.o net_proc.o net_scope.o \
net_udp.o \
pad_to_width.o \

50
design_dump.cc
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@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: design_dump.cc,v 1.94 2000/07/30 18:25:43 steve Exp $"
#ident "$Id: design_dump.cc,v 1.95 2000/09/02 20:54:20 steve Exp $"
#endif
/*
@ -217,23 +217,12 @@ void NetMux::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetAssign::dump_node(ostream&o, unsigned ind) const
void NetAssign_::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "Procedural assign (NetAssign): " << name();
o << setw(ind) << "" << "Procedural assign (NetAssign_): " << name();
if (bmux())
o << "[" << *bmux() << "]";
o << " = " << *rval() << endl;
dump_node_pins(o, ind+4);
}
void NetAssignNB::dump_node(ostream&o, unsigned ind) const
{
if (bmux())
o << setw(ind) << "" << "Procedural NB assign (NetAssignNB): "
<< name() << "[" << *bmux() << "] <= " << *rval() << endl;
else
o << setw(ind) << "" << "Procedural NB assign (NetAssignNB): "
<< name() << " <= " << *rval() << endl;
o << endl;
dump_node_pins(o, ind+4);
}
@ -438,16 +427,16 @@ void NetAssign::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "";
if (bmux()) {
o << name() << "[" << *bmux() << "] = ";
if (rise_time())
o << "#" << rise_time() << " ";
if (l_val(0)->bmux()) {
o << l_val(0)->name() << "[" << *l_val(0)->bmux() << "] = ";
if (l_val(0)->rise_time())
o << "#" << l_val(0)->rise_time() << " ";
o << *rval() << ";" << endl;
} else {
o << name() << " = ";
if (rise_time())
o << "#" << rise_time() << " ";
o << l_val(0)->name() << " = ";
if (l_val(0)->rise_time())
o << "#" << l_val(0)->rise_time() << " ";
o << *rval() << ";" << endl;
}
}
@ -456,16 +445,16 @@ void NetAssignNB::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "";
if (bmux()) {
o << name() << "[" << *bmux() << "] <= ";
if (rise_time())
o << "#" << rise_time() << " ";
if (l_val(0)->bmux()) {
o << l_val(0)->name() << "[" << *l_val(0)->bmux() << "] <= ";
if (l_val(0)->rise_time())
o << "#" << l_val(0)->rise_time() << " ";
o << *rval() << ";" << endl;
} else {
o << name() << " <= ";
if (rise_time())
o << "#" << rise_time() << " ";
o << l_val(0)->name() << " <= ";
if (l_val(0)->rise_time())
o << "#" << l_val(0)->rise_time() << " ";
o << *rval() << ";" << endl;
}
}
@ -978,6 +967,9 @@ void Design::dump(ostream&o) const
/*
* $Log: design_dump.cc,v $
* Revision 1.95 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.94 2000/07/30 18:25:43 steve
* Rearrange task and function elaboration so that the
* NetTaskDef and NetFuncDef functions are created during

9
elab_net.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elab_net.cc,v 1.44 2000/08/18 04:38:57 steve Exp $"
#ident "$Id: elab_net.cc,v 1.45 2000/09/02 20:54:20 steve Exp $"
#endif
# include "PExpr.h"
@ -1178,7 +1178,7 @@ NetNet* PEIdent::elaborate_lnet(Design*des, const string&path) const
verinum*mval = msb_->eval_const(des, path);
if (mval == 0) {
cerr << get_line() << ": index of " << text_ <<
" needs to be constant in this context." <<
" needs to be constant in l-value of assignment." <<
endl;
des->errors += 1;
return 0;
@ -1286,7 +1286,7 @@ NetNet* PEIdent::elaborate_port(Design*des, NetScope*scope) const
verinum*mval = msb_->eval_const(des, path);
if (mval == 0) {
cerr << get_line() << ": index of " << text_ <<
" needs to be constant in this context." <<
" needs to be constant in port context." <<
endl;
des->errors += 1;
return 0;
@ -1662,6 +1662,9 @@ NetNet* PEUnary::elaborate_net(Design*des, const string&path,
/*
* $Log: elab_net.cc,v $
* Revision 1.45 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.44 2000/08/18 04:38:57 steve
* Proper error messages when port direction is missing.
*

45
elaborate.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: elaborate.cc,v 1.183 2000/08/18 04:38:57 steve Exp $"
#ident "$Id: elaborate.cc,v 1.184 2000/09/02 20:54:20 steve Exp $"
#endif
/*
@ -745,7 +745,7 @@ NetNet* PAssign_::elaborate_lval(Design*des, const string&path,
/* Get the l-value, and assume that it is an identifier. */
const PEIdent*id = dynamic_cast<const PEIdent*>(lval());
/* If the l-value is not a register, then make a structural
/* If the l-value is not a reg, then make a structural
elaboration. Make a synthetic register that connects to the
generated circuit and return that as the l-value. */
if (id == 0) {
@ -778,7 +778,7 @@ NetNet* PAssign_::elaborate_lval(Design*des, const string&path,
if ((reg->type() != NetNet::REG) && (reg->type() != NetNet::INTEGER)) {
cerr << get_line() << ": error: " << *lval() <<
" is not a register." << endl;
" is not a reg." << endl;
des->errors += 1;
return 0;
}
@ -946,20 +946,18 @@ NetProc* PAssign::elaborate(Design*des, const string&path) const
n = des->local_symbol(path);
NetAssign*a1 = new NetAssign(n, des, wid, rv);
a1->set_line(*this);
des->add_node(a1);
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(a1->pin(idx), tmp->pin(idx));
connect(a1->l_val(0)->pin(idx), tmp->pin(idx));
/* Generate an assignment of the temporary to the r-value... */
n = des->local_symbol(path);
NetESignal*sig = new NetESignal(tmp);
NetAssign*a2 = new NetAssign(n, des, wid, sig);
a2->set_line(*this);
des->add_node(a2);
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(a2->pin(idx), reg->pin(idx));
connect(a2->l_val(0)->pin(idx), reg->pin(idx));
/* Generate the delay statement with the final
assignment attached to it. If this is an event delay,
@ -1006,7 +1004,7 @@ NetProc* PAssign::elaborate(Design*des, const string&path) const
unsigned off = reg->sb_to_idx(lsb);
assert((off+wid) <= reg->pin_count());
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(cur->pin(idx), reg->pin(idx+off));
connect(cur->l_val(0)->pin(idx), reg->pin(idx+off));
} else {
@ -1014,12 +1012,11 @@ NetProc* PAssign::elaborate(Design*des, const string&path) const
cur = new NetAssign(des->local_symbol(path), des,
reg->pin_count(), mux, rv);
for (unsigned idx = 0 ; idx < reg->pin_count() ; idx += 1)
connect(cur->pin(idx), reg->pin(idx));
connect(cur->l_val(0)->pin(idx), reg->pin(idx));
}
cur->set_line(*this);
des->add_node(cur);
return cur;
}
@ -1105,7 +1102,7 @@ NetProc* PAssignNB::elaborate(Design*des, const string&path) const
cur = new NetAssignNB(des->local_symbol(path), des, wid, rv);
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(cur->pin(idx), reg->pin(reg->sb_to_idx(idx+lsb)));
connect(cur->l_val(0)->pin(idx), reg->pin(reg->sb_to_idx(idx+lsb)));
} else {
@ -1117,20 +1114,19 @@ NetProc* PAssignNB::elaborate(Design*des, const string&path) const
cur = new NetAssignNB(des->local_symbol(path), des,
reg->pin_count(), mux, rv);
for (unsigned idx = 0 ; idx < reg->pin_count() ; idx += 1)
connect(cur->pin(idx), reg->pin(idx));
connect(cur->l_val(0)->pin(idx), reg->pin(idx));
}
unsigned long rise_time, fall_time, decay_time;
delay_.eval_delays(des, path, rise_time, fall_time, decay_time);
cur->rise_time(rise_time);
cur->fall_time(fall_time);
cur->decay_time(decay_time);
cur->l_val(0)->rise_time(rise_time);
cur->l_val(0)->fall_time(fall_time);
cur->l_val(0)->decay_time(decay_time);
/* All done with this node. mark its line number and check it in. */
cur->set_line(*this);
des->add_node(cur);
return cur;
}
@ -1445,8 +1441,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, const string&path) const
NetExpr*rv = parms_[idx]->elaborate_expr(des, scope);
NetAssign*pr = new NetAssign("@", des, port->pin_count(), rv);
for (unsigned pi = 0 ; pi < port->pin_count() ; pi += 1)
connect(port->pin(pi), pr->pin(pi));
des->add_node(pr);
connect(port->pin(pi), pr->l_val(0)->pin(pi));
block->append(pr);
}
@ -1535,9 +1530,8 @@ NetProc* PCallTask::elaborate_usr(Design*des, const string&path) const
/* Generate the assignment statement. */
NetAssign*ass = new NetAssign("@", des, val->pin_count(), pexp);
for (unsigned pi = 0 ; pi < val->pin_count() ; pi += 1)
connect(val->pin(pi), ass->pin(pi));
connect(val->pin(pi), ass->l_val(0)->pin(pi));
des->add_node(ass);
block->append(ass);
}
@ -2009,8 +2003,8 @@ NetProc* PForStatement::elaborate(Design*des, const string&path) const
assert(sig);
NetAssign*init = new NetAssign("@for-assign", des, sig->pin_count(),
expr1_->elaborate_expr(des, scope));
for (unsigned idx = 0 ; idx < init->pin_count() ; idx += 1)
connect(init->pin(idx), sig->pin(idx));
for (unsigned idx = 0 ; idx < init->l_val(0)->pin_count() ; idx += 1)
connect(init->l_val(0)->pin(idx), sig->pin(idx));
top->append(init);
@ -2032,8 +2026,8 @@ NetProc* PForStatement::elaborate(Design*des, const string&path) const
assert(sig);
NetAssign*step = new NetAssign("@for-assign", des, sig->pin_count(),
expr2_->elaborate_expr(des, scope));
for (unsigned idx = 0 ; idx < step->pin_count() ; idx += 1)
connect(step->pin(idx), sig->pin(idx));
for (unsigned idx = 0 ; idx < step->l_val(0)->pin_count() ; idx += 1)
connect(step->l_val(0)->pin(idx), sig->pin(idx));
body->append(step);
@ -2384,6 +2378,9 @@ Design* elaborate(const map<string,Module*>&modules,
/*
* $Log: elaborate.cc,v $
* Revision 1.184 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.183 2000/08/18 04:38:57 steve
* Proper error messages when port direction is missing.
*

13
emit.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: emit.cc,v 1.51 2000/08/14 04:39:56 steve Exp $"
#ident "$Id: emit.cc,v 1.52 2000/09/02 20:54:20 steve Exp $"
#endif
/*
@ -59,18 +59,12 @@ bool NetAddSub::emit_node(struct target_t*tgt) const
return true;
}
bool NetAssign::emit_node(struct target_t*tgt) const
bool NetAssign_::emit_node(struct target_t*tgt) const
{
tgt->net_assign(this);
return true;
}
bool NetAssignNB::emit_node(struct target_t*tgt) const
{
tgt->net_assign_nb(this);
return true;
}
bool NetCaseCmp::emit_node(struct target_t*tgt) const
{
tgt->net_case_cmp(this);
@ -481,6 +475,9 @@ bool emit(const Design*des, const char*type)
/*
* $Log: emit.cc,v $
* Revision 1.52 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.51 2000/08/14 04:39:56 steve
* add th t-dll functions for net_const, net_bufz and processes.
*

155
net_assign.cc Normal file
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@ -0,0 +1,155 @@
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: net_assign.cc,v 1.1 2000/09/02 20:54:20 steve Exp $"
#endif
# include "netlist.h"
/*
* NetAssign
*/
NetAssign_::NetAssign_(const string&n, unsigned w)
: NetNode(n, w), bmux_(0)
{
for (unsigned idx = 0 ; idx < pin_count() ; idx += 1) {
pin(idx).set_dir(Link::OUTPUT);
pin(idx).set_name("P", idx);
}
}
NetAssign_::~NetAssign_()
{
if (bmux_) delete bmux_;
}
void NetAssign_::set_bmux(NetExpr*r)
{
assert(bmux_ == 0);
bmux_ = r;
}
const NetExpr* NetAssign_::bmux() const
{
return bmux_;
}
NetAssignBase::NetAssignBase(NetAssign_*lv, NetExpr*rv)
: lval_(lv), rval_(rv)
{
}
NetAssignBase::~NetAssignBase()
{
if (rval_) delete rval_;
if (lval_) delete lval_;
}
NetExpr* NetAssignBase::rval()
{
return rval_;
}
const NetExpr* NetAssignBase::rval() const
{
return rval_;
}
void NetAssignBase::set_rval(NetExpr*r)
{
if (rval_) delete rval_;
rval_ = r;
}
NetAssign_* NetAssignBase::l_val(unsigned idx)
{
assert(idx == 0);
return lval_;
}
const NetAssign_* NetAssignBase::l_val(unsigned idx) const
{
assert(idx == 0);
return lval_;
}
NetAssign::NetAssign(const string&n, Design*des, unsigned w, NetExpr*rv)
: NetAssignBase(new NetAssign_(n, w), rv)
{
des->add_node(l_val(0));
}
NetAssign::NetAssign(const string&n, Design*des, unsigned w,
NetExpr*mu, NetExpr*rv)
: NetAssignBase(new NetAssign_(n, w), rv)
{
des->add_node(l_val(0));
bool flag = rv->set_width(1);
if (flag == false) {
cerr << rv->get_line() << ": Expression bit width" <<
" conflicts with l-value bit width." << endl;
des->errors += 1;
}
l_val(0)->set_bmux(mu);
}
NetAssign::~NetAssign()
{
}
NetAssignNB::NetAssignNB(const string&n, Design*des, unsigned w, NetExpr*rv)
: NetAssignBase(new NetAssign_(n, w), rv)
{
if (rval()->expr_width() < w) {
cerr << rval()->get_line() << ": Expression bit width (" <<
rval()->expr_width() << ") conflicts with l-value "
"bit width (" << w << ")." << endl;
des->errors += 1;
}
}
NetAssignNB::NetAssignNB(const string&n, Design*des, unsigned w,
NetExpr*mu, NetExpr*rv)
: NetAssignBase(new NetAssign_(n, w), rv)
{
bool flag = rval()->set_width(1);
if (flag == false) {
cerr << rval()->get_line() << ": Expression bit width" <<
" conflicts with l-value bit width." << endl;
des->errors += 1;
}
l_val(0)->set_bmux(mu);
}
NetAssignNB::~NetAssignNB()
{
}
/*
* $Log: net_assign.cc,v $
* Revision 1.1 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
*/

110
netlist.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: netlist.cc,v 1.134 2000/08/27 15:51:50 steve Exp $"
#ident "$Id: netlist.cc,v 1.135 2000/09/02 20:54:20 steve Exp $"
#endif
# include <cassert>
@ -1370,111 +1370,6 @@ const Link& NetRamDq::pin_Q(unsigned idx) const
return pin(3+awidth_+width()+idx);
}
/*
* NetAssign
*/
NetAssign_::NetAssign_(const string&n, unsigned w)
: NetNode(n, w), rval_(0), bmux_(0)
{
for (unsigned idx = 0 ; idx < pin_count() ; idx += 1) {
pin(idx).set_dir(Link::OUTPUT);
pin(idx).set_name("P", idx);
}
}
NetAssign_::~NetAssign_()
{
if (rval_) delete rval_;
if (bmux_) delete bmux_;
}
void NetAssign_::set_rval(NetExpr*r)
{
if (rval_) delete rval_;
rval_ = r;
}
void NetAssign_::set_bmux(NetExpr*r)
{
assert(bmux_ == 0);
bmux_ = r;
}
NetExpr* NetAssign_::rval()
{
return rval_;
}
const NetExpr* NetAssign_::rval() const
{
return rval_;
}
const NetExpr* NetAssign_::bmux() const
{
return bmux_;
}
NetAssign::NetAssign(const string&n, Design*des, unsigned w, NetExpr*rv)
: NetAssign_(n, w)
{
set_rval(rv);
}
NetAssign::NetAssign(const string&n, Design*des, unsigned w,
NetExpr*mu, NetExpr*rv)
: NetAssign_(n, w)
{
bool flag = rv->set_width(1);
if (flag == false) {
cerr << rv->get_line() << ": Expression bit width" <<
" conflicts with l-value bit width." << endl;
des->errors += 1;
}
set_rval(rv);
set_bmux(mu);
}
NetAssign::~NetAssign()
{
}
NetAssignNB::NetAssignNB(const string&n, Design*des, unsigned w, NetExpr*rv)
: NetAssign_(n, w)
{
if (rv->expr_width() < w) {
cerr << rv->get_line() << ": Expression bit width (" <<
rv->expr_width() << ") conflicts with l-value "
"bit width (" << w << ")." << endl;
des->errors += 1;
}
set_rval(rv);
}
NetAssignNB::NetAssignNB(const string&n, Design*des, unsigned w,
NetExpr*mu, NetExpr*rv)
: NetAssign_(n, w)
{
bool flag = rv->set_width(1);
if (flag == false) {
cerr << rv->get_line() << ": Expression bit width" <<
" conflicts with l-value bit width." << endl;
des->errors += 1;
}
set_rval(rv);
set_bmux(mu);
}
NetAssignNB::~NetAssignNB()
{
}
NetAssignMem_::NetAssignMem_(NetMemory*m, NetExpr*i, NetExpr*r)
: mem_(m), index_(i), rval_(r)
{
@ -2467,6 +2362,9 @@ bool NetUDP::sequ_glob_(string input, char output)
/*
* $Log: netlist.cc,v $
* Revision 1.135 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.134 2000/08/27 15:51:50 steve
* t-dll iterates signals, and passes them to the
* target module.

83
netlist.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: netlist.h,v 1.158 2000/08/27 15:51:50 steve Exp $"
#ident "$Id: netlist.h,v 1.159 2000/09/02 20:54:20 steve Exp $"
#endif
/*
@ -1108,46 +1108,75 @@ class NetProc : public LineInfo {
};
/*
* This is a procedural assignment. The lval is a register, and the
* assignment happens when the code is executed by the design. The
* node part of the NetAssign has as many pins as the width of the
* lvalue object and represents the elaborated lvalue. Thus, this
* appears as a procedural statement AND a structural node. The
* LineInfo is the location of the assignment statement in the source.
* Procedural assignment is broken into a suite of classes. These
* classes represent the various aspects of the assignment statement
* in behavioral code. (The continuous assignment is *not*
* represented here.)
*
* The NetAssignBase carries the common aspects of an assignment,
* including the r-value. This class has no cares of blocking vs
* non-blocking, however it carries nearly all the other properties
* of the assignment statement. It is abstract because it does not
* differentiate the virtual behaviors.
*
* The NetAssign and NetAssignNB classes are the concrete classes that
* give the assignment its final, precise meaning. These classes fill
* in the NetProc behaviors.
*
* The l-value of the assignment is a collection of NetAssign_
* objects. These are nodes that connect to the structural netlist
* where the assignment has its effect. The NetAssign_ class is not to
* be derived from.
*
* NOTE: The elaborator will make an effort to match the width of the
* r-value to the with of the assign node, but targets and functions
* r-value to the with of the l-value, but targets and functions
* should know that this is not a guarantee.
*/
class NetAssign_ : public NetProc, public NetNode {
class NetAssign_ : public NetNode {
public:
// This is the (procedural) value that is to be assigned when
// the assignment is executed.
NetExpr*rval();
const NetExpr*rval() const;
NetAssign_(const string&n, unsigned w);
~NetAssign_();
// If this expression exists, then only a single bit is to be
// set from the rval, and the value of this expression selects
// the pin that gets the value.
const NetExpr*bmux() const;
void set_rval(NetExpr*);
protected:
NetAssign_(const string&n, unsigned w);
virtual ~NetAssign_() =0;
void set_bmux(NetExpr*);
virtual bool emit_node(struct target_t*) const;
virtual void dump_node(ostream&, unsigned ind) const;
private:
NetExpr*rval_;
NetExpr*bmux_;
};
class NetAssign : public NetAssign_ {
class NetAssignBase : public NetProc {
public:
NetAssignBase(NetAssign_*lv, NetExpr*rv);
virtual ~NetAssignBase() =0;
// This is the (procedural) value that is to be assigned when
// the assignment is executed.
NetExpr*rval();
const NetExpr*rval() const;
void set_rval(NetExpr*);
NetAssign_* l_val(unsigned);
const NetAssign_* l_val(unsigned) const;
private:
NetAssign_*lval_;
NetExpr *rval_;
};
class NetAssign : public NetAssignBase {
public:
explicit NetAssign(const string&, Design*des, unsigned w, NetExpr*rv);
explicit NetAssign(const string&, Design*des, unsigned w,
@ -1155,18 +1184,13 @@ class NetAssign : public NetAssign_ {
~NetAssign();
virtual bool emit_proc(struct target_t*) const;
virtual bool emit_node(struct target_t*) const;
virtual int match_proc(struct proc_match_t*);
virtual void dump(ostream&, unsigned ind) const;
virtual void dump_node(ostream&, unsigned ind) const;
private:
};
/*
* ... and this is a non-blocking version of above.
*/
class NetAssignNB : public NetAssign_ {
class NetAssignNB : public NetAssignBase {
public:
explicit NetAssignNB(const string&, Design*des, unsigned w, NetExpr*rv);
explicit NetAssignNB(const string&, Design*des, unsigned w,
@ -1175,10 +1199,8 @@ class NetAssignNB : public NetAssign_ {
virtual bool emit_proc(struct target_t*) const;
virtual bool emit_node(struct target_t*) const;
virtual int match_proc(struct proc_match_t*);
virtual void dump(ostream&, unsigned ind) const;
virtual void dump_node(ostream&, unsigned ind) const;
private:
};
@ -2726,6 +2748,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
/*
* $Log: netlist.h,v $
* Revision 1.159 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.158 2000/08/27 15:51:50 steve
* t-dll iterates signals, and passes them to the
* target module.

24
syn-rules.y
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: syn-rules.y,v 1.8 2000/08/01 02:48:42 steve Exp $"
#ident "$Id: syn-rules.y,v 1.9 2000/09/02 20:54:21 steve Exp $"
#endif
/*
@ -38,7 +38,7 @@
struct syn_token_t {
int token;
NetAssign_*assign;
NetAssignBase*assign;
NetAssignMem_*assign_mem;
NetProcTop*top;
NetEvWait*evwait;
@ -54,10 +54,10 @@ static void yyerror(const char*);
static Design*des_;
static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
NetEvent*eclk, NetExpr*cexp, NetAssign_*asn);
NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn);
static void make_RAM_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
NetEvent*eclk, NetExpr*cexp, NetAssignMem_*asn);
static void make_initializer(Design*des, NetProcTop*top, NetAssign_*asn);
static void make_initializer(Design*des, NetProcTop*top, NetAssignBase*asn);
%}
@ -131,7 +131,7 @@ start
/* Various actions. */
static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
NetEvent*eclk, NetExpr*cexp, NetAssign_*asn)
NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn)
{
NetEvProbe*pclk = eclk->probe(0);
NetESignal*d = dynamic_cast<NetESignal*> (asn->rval());
@ -139,11 +139,11 @@ static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
assert(d);
NetFF*ff = new NetFF(asn->name(), asn->pin_count());
NetFF*ff = new NetFF(asn->l_val(0)->name(), asn->l_val(0)->pin_count());
for (unsigned idx = 0 ; idx < ff->width() ; idx += 1) {
connect(ff->pin_Data(idx), d->pin(idx));
connect(ff->pin_Q(idx), asn->pin(idx));
connect(ff->pin_Q(idx), asn->l_val(0)->pin(idx));
}
connect(ff->pin_Clock(), pclk->pin(0));
@ -198,16 +198,16 @@ static void make_RAM_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
* the initial value for the link and get rid of the assignment
* process.
*/
static void make_initializer(Design*des, NetProcTop*top, NetAssign_*asn)
static void make_initializer(Design*des, NetProcTop*top, NetAssignBase*asn)
{
NetESignal*rsig = dynamic_cast<NetESignal*> (asn->rval());
assert(rsig);
for (unsigned idx = 0 ; idx < asn->pin_count() ; idx += 1) {
for (unsigned idx = 0 ; idx < asn->l_val(0)->pin_count() ; idx += 1) {
verinum::V bit = driven_value(rsig->pin(idx));
Nexus*nex = asn->pin(idx).nexus();
Nexus*nex = asn->l_val(0)->pin(idx).nexus();
for (Link*cur = nex->first_nlink()
; cur ; cur = cur->next_nlink()) {
@ -237,7 +237,7 @@ struct tokenize : public proc_match_t {
{
syn_token_t*cur;
cur = new syn_token_t;
cur->token = dev->bmux() ? S_ASSIGN_MUX : S_ASSIGN;
cur->token = dev->l_val(0)->bmux() ? S_ASSIGN_MUX : S_ASSIGN;
cur->assign = dev;
cur->next_ = 0;
last_->next_ = cur;
@ -249,7 +249,7 @@ struct tokenize : public proc_match_t {
{
syn_token_t*cur;
cur = new syn_token_t;
cur->token = dev->bmux() ? S_ASSIGN_MUX : S_ASSIGN;
cur->token = dev->l_val(0)->bmux() ? S_ASSIGN_MUX : S_ASSIGN;
cur->assign = dev;
cur->next_ = 0;
last_->next_ = cur;

58
t-vvm.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: t-vvm.cc,v 1.169 2000/08/20 17:49:04 steve Exp $"
#ident "$Id: t-vvm.cc,v 1.170 2000/09/02 20:54:21 steve Exp $"
#endif
# include <iostream>
@ -166,7 +166,6 @@ class target_vvm : public target_t {
virtual void udp(const NetUDP*);
virtual void udp_comb(const NetUDP_COMB*);
void udp_sequ_(ostream&os, const NetUDP*);
virtual void net_assign_nb(const NetAssignNB*);
virtual void net_case_cmp(const NetCaseCmp*);
virtual bool net_cassign(const NetCAssign*);
virtual bool net_const(const NetConst*);
@ -1970,10 +1969,6 @@ void target_vvm::udp_sequ_(ostream&os, const NetUDP*gate)
}
void target_vvm::net_assign_nb(const NetAssignNB*net)
{
}
void target_vvm::net_case_cmp(const NetCaseCmp*gate)
{
string mname = mangle(gate->name());
@ -2157,7 +2152,7 @@ void target_vvm::proc_assign(const NetAssign*net)
const verinum value = rc->value();
if (net->bmux()) {
if (net->l_val(0)->bmux()) {
// This is a bit select. Assign the low bit of the
// constant to the selected bit of the lval.
@ -2166,14 +2161,14 @@ void target_vvm::proc_assign(const NetAssign*net)
Link::STRONG,
Link::STRONG);
string bval = emit_proc_rval(this, net->bmux());
string bval = emit_proc_rval(this, net->l_val(0)->bmux());
defn << " switch (" << bval
<< ".as_unsigned()) {" << endl;
for (unsigned idx = 0; idx < net->pin_count(); idx += 1) {
for (unsigned idx = 0; idx < net->l_val(0)->pin_count(); idx += 1) {
string nexus = net->pin(idx).nexus()->name();
string nexus = net->l_val(0)->pin(idx).nexus()->name();
unsigned ncode = nexus_wire_map[nexus];
defn << " case " << idx << ":" << endl;
@ -2188,8 +2183,8 @@ void target_vvm::proc_assign(const NetAssign*net)
return;
}
for (unsigned idx = 0 ; idx < net->pin_count() ; idx += 1) {
string nexus = net->pin(idx).nexus()->name();
for (unsigned idx = 0 ; idx < net->l_val(0)->pin_count() ; idx += 1) {
string nexus = net->l_val(0)->pin(idx).nexus()->name();
unsigned ncode = nexus_wire_map[nexus];
verinum::V val = idx < value.len()
@ -2219,12 +2214,12 @@ void target_vvm::proc_assign(const NetAssign*net)
if (const NetESignal*rs = dynamic_cast<const NetESignal*>(net->rval())) {
if (net->pin_count() > rs->pin_count()) {
if (net->l_val(0)->pin_count() > rs->pin_count()) {
rval = emit_proc_rval(this, net->rval());
} else {
assert((net->pin_count() <= rs->pin_count())
|| (net->bmux() && (rs->pin_count() >= 1)));
assert((net->l_val(0)->pin_count() <= rs->pin_count())
|| (net->l_val(0)->bmux() && (rs->pin_count() >= 1)));
rval = mangle(rs->name()) + ".bits";
}
@ -2242,17 +2237,17 @@ void target_vvm::proc_assign(const NetAssign*net)
l-value. Otherwise, generate code for a complete
assignment. */
if (net->bmux()) {
if (net->l_val(0)->bmux()) {
// This is a bit select. Assign the low bit of the rval
// to the selected bit of the lval.
string bval = emit_proc_rval(this, net->bmux());
string bval = emit_proc_rval(this, net->l_val(0)->bmux());
defn << " switch (" << bval << ".as_unsigned()) {" << endl;
for (unsigned idx = 0 ; idx < net->pin_count() ; idx += 1) {
for (unsigned idx = 0 ; idx < net->l_val(0)->pin_count() ; idx += 1) {
string nexus = net->pin(idx).nexus()->name();
string nexus = net->l_val(0)->pin(idx).nexus()->name();
unsigned ncode = nexus_wire_map[nexus];
defn << " case " << idx << ":" << endl;
@ -2266,19 +2261,19 @@ void target_vvm::proc_assign(const NetAssign*net)
defn << " }" << endl;
} else {
unsigned min_count = net->pin_count();
unsigned min_count = net->l_val(0)->pin_count();
if (net->rval()->expr_width() < min_count)
min_count = net->rval()->expr_width();
for (unsigned idx = 0 ; idx < min_count ; idx += 1) {
string nexus = net->pin(idx).nexus()->name();
string nexus = net->l_val(0)->pin(idx).nexus()->name();
unsigned ncode = nexus_wire_map[nexus];
defn << " nexus_wire_table["<<ncode<<"].reg_assign("
<< rval << "[" << idx << "]);" << endl;
}
for (unsigned idx = min_count; idx < net->pin_count(); idx += 1) {
string nexus = net->pin(idx).nexus()->name();
for (unsigned idx = min_count; idx < net->l_val(0)->pin_count(); idx += 1) {
string nexus = net->l_val(0)->pin(idx).nexus()->name();
unsigned ncode = nexus_wire_map[nexus];
defn << " nexus_wire_table["<<ncode<<"]"
<< ".reg_assign(St0);" << endl;
@ -2319,9 +2314,9 @@ void target_vvm::proc_assign_mem(const NetAssignMem*amem)
void target_vvm::proc_assign_nb(const NetAssignNB*net)
{
string rval = emit_proc_rval(this, net->rval());
const unsigned long delay = net->rise_time();
const unsigned long delay = net->l_val(0)->rise_time();
if (net->bmux()) {
if (net->l_val(0)->bmux()) {
/* If the l-value has a bit select, set the output bit
to only the desired bit. Evaluate the index and use
that to drive a switch statement.
@ -2330,11 +2325,11 @@ void target_vvm::proc_assign_nb(const NetAssignNB*net)
better generating a demux device and doing the assign
to the device input. Food for thought. */
string bval = emit_proc_rval(this, net->bmux());
string bval = emit_proc_rval(this, net->l_val(0)->bmux());
defn << " switch (" << bval << ".as_unsigned()) {" << endl;
for (unsigned idx = 0 ; idx < net->pin_count() ; idx += 1) {
string nexus = net->pin(idx).nexus()->name();
for (unsigned idx = 0 ; idx < net->l_val(0)->pin_count() ; idx += 1) {
string nexus = net->l_val(0)->pin(idx).nexus()->name();
unsigned ncode = nexus_wire_map[nexus];
defn << " case " << idx << ":" << endl;
@ -2347,8 +2342,8 @@ void target_vvm::proc_assign_nb(const NetAssignNB*net)
defn << " }" << endl;
} else {
for (unsigned idx = 0 ; idx < net->pin_count() ; idx += 1) {
string nexus = net->pin(idx).nexus()->name();
for (unsigned idx = 0 ; idx < net->l_val(0)->pin_count() ; idx += 1) {
string nexus = net->l_val(0)->pin(idx).nexus()->name();
unsigned ncode = nexus_wire_map[nexus];
defn << " vvm_delayed_assign(nexus_wire_table["
<< ncode << "], " << rval << "[" << idx << "], "
@ -3117,6 +3112,9 @@ extern const struct target tgt_vvm = {
};
/*
* $Log: t-vvm.cc,v $
* Revision 1.170 2000/09/02 20:54:21 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.169 2000/08/20 17:49:04 steve
* Clean up warnings and portability issues.
*

13
target.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: target.cc,v 1.45 2000/08/27 15:51:51 steve Exp $"
#ident "$Id: target.cc,v 1.46 2000/09/02 20:54:21 steve Exp $"
#endif
# include "target.h"
@ -126,14 +126,10 @@ void target_t::lpm_ram_dq(const NetRamDq*)
"Unhandled NetRamDq." << endl;
}
void target_t::net_assign(const NetAssign*)
{
}
void target_t::net_assign_nb(const NetAssignNB*)
void target_t::net_assign(const NetAssign_*)
{
cerr << "target (" << typeid(*this).name() << "): "
"Unhandled non-blocking assignment node." << endl;
"Unhandled assignment node." << endl;
}
void target_t::net_case_cmp(const NetCaseCmp*)
@ -392,6 +388,9 @@ void expr_scan_t::expr_binary(const NetEBinary*ex)
/*
* $Log: target.cc,v $
* Revision 1.46 2000/09/02 20:54:21 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.45 2000/08/27 15:51:51 steve
* t-dll iterates signals, and passes them to the
* target module.

8
target.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: target.h,v 1.44 2000/08/27 15:51:51 steve Exp $"
#ident "$Id: target.h,v 1.45 2000/09/02 20:54:21 steve Exp $"
#endif
# include "netlist.h"
@ -87,8 +87,7 @@ struct target_t {
virtual bool bufz(const NetBUFZ*);
virtual void udp(const NetUDP*);
virtual void udp_comb(const NetUDP_COMB*);
virtual void net_assign(const NetAssign*);
virtual void net_assign_nb(const NetAssignNB*);
virtual void net_assign(const NetAssign_*);
virtual void net_case_cmp(const NetCaseCmp*);
virtual bool net_cassign(const NetCAssign*);
virtual bool net_const(const NetConst*);
@ -160,6 +159,9 @@ extern const struct target *target_table[];
/*
* $Log: target.h,v $
* Revision 1.45 2000/09/02 20:54:21 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.44 2000/08/27 15:51:51 steve
* t-dll iterates signals, and passes them to the
* target module.