Better message for combinational operators.
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README.txt
14
README.txt
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@ -2,7 +2,7 @@
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September 18, 1999
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1.0 What is ICARUS Verilog(IVL)?
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1.0 What is ICARUS Verilog?
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Icarus Verilog is intended to compile ALL of the Verilog HDL as described
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in the IEEE-1364 standard. Of course, it's not quite there yet. It does
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@ -266,11 +266,19 @@ current state of support for Verilog.
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- fork/join is not supported in vvm runtime
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- structural arithmetic operators are in general not
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supported. Procedural expressions are OK.
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- structural arithmetic operators are in general not supported.
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Procedural expressions are OK. Constant expressions are OK.
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assign foo = a + b; // sorry
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always @(a or b) foo = a + b; // OK
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parameter foo = a + b; // OK
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- Structural shift operators are in general not supported.
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Procedural expressions are OK. Constant expressions are OK.
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assign foo = a << b; // sorry
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always @(a or b) foo = a << b; // OK
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parameter foo = a << b; // OK
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- Functions in structural contexts are not supported.
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16
elaborate.cc
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elaborate.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: elaborate.cc,v 1.113 1999/10/08 17:48:08 steve Exp $"
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#ident "$Id: elaborate.cc,v 1.114 1999/10/09 19:24:04 steve Exp $"
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#endif
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/*
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@ -797,8 +797,17 @@ NetNet* PEBinary::elaborate_net(Design*des, const string&path,
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break;
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}
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case 'l':
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case 'r':
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cerr << get_line() << ": sorry: combinational shift"
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" not supported here." << endl;
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des->errors += 1;
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osig = 0;
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break;
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default:
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cerr << "internal eror: Unhandled BINARY '" << op_ << "'" << endl;
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cerr << get_line() << ": internal error: unsupported"
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" combinational operator (" << op_ << ")." << endl;
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des->errors += 1;
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osig = 0;
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}
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@ -2587,6 +2596,9 @@ Design* elaborate(const map<string,Module*>&modules,
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/*
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* $Log: elaborate.cc,v $
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* Revision 1.114 1999/10/09 19:24:04 steve
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* Better message for combinational operators.
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*
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* Revision 1.113 1999/10/08 17:48:08 steve
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* Support + in constant expressions.
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*
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