mrg
348001b1c8
Supply tree uses signal grid. PEP8 cleanup.
2020-12-21 13:51:50 -08:00
mrg
3c08dfcca5
Enable single pin for vdd/gnd after supply router
2020-12-18 11:09:10 -08:00
mrg
c0ab0af201
Retry routes with expanding detour allowed.
2020-12-17 11:39:17 -08:00
mrg
11384ef926
Improve output messaging of tree router
2020-12-16 16:57:40 -08:00
mrg
2b0f8bf263
Don't exit with error when source is target for maze router
2020-12-16 16:57:29 -08:00
mrg
d5ed45dadf
Make default router tree router
2020-12-16 16:42:19 -08:00
mrg
2c76a2680f
Adjust openram options.
...
Remove option -d (dontpurge) and replace with keeptemp
Add option -d (debug) to drop into pdb.
Add option -k (--keeptemp) to keep temp files
2020-11-05 13:12:26 -08:00
mrg
da721a677d
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
mrg
cbf9c48504
Names in skiptests changed. Reduce grid router verbosity.
2020-10-23 09:22:59 -07:00
mrg
b7c66d7e07
Changes to simplify metal preferred directions and pitches.
...
Changes to allow decoder height to be a 2x multiple of bitcell height.
Split of control logic tests.
Fixed track spacing in SRAM and channel router
PEP8 cleanup.
2020-05-10 11:32:45 -07:00
mrg
dd73afc983
Changes to allow decoder height to be a 2x multiple of bitcell height.
...
Convert to use li layer in pgates.
Fix multifinger devices with li layers.
Simplify wordline driver input routing.
Fix power pin direction option update.
PEP8 cleanup
Changes to simplify metal preferred directions and pitches.
Split of control logic tests.
2020-05-10 06:56:22 -07:00
Bastian Koppelmann
9749c522d1
tech: Make power_grid configurable
...
this is the first step to allow engineers, porting technologies, more room
for routing their handmade cells.
For now, we don't allow the specification of power_grids where the lower layer
prefers to be routed vertically. This is due to the router not
connecting some pins properly in that case.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2020-01-28 12:06:34 +01:00
Bastian Koppelmann
2c610036b2
router/supply_grid_router: Print init time to the user
...
this can take considerable amount of time, so the user knows that
useful work is done.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2020-01-03 12:24:14 +01:00
Bastian Koppelmann
c0c89e465a
vector: Implement hash cache for vector3d and vector
...
this gives us a small runtime improvement in the router.
For FreePDK45 word_size=8, num_words=256
Improved
*** Maze routing supplies: 89.8 seconds
** Routing: 279.3 seconds
Non-improved
*** Maze routing supplies: 105.1 seconds
** Routing: 293.5 seconds
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2020-01-03 12:16:10 +01:00
Matthew Guthaus
131f4bda4a
Add layer-purpose GDS support. Various PEP8 fixes.
2019-11-14 18:17:20 +00:00
Matthew Guthaus
8d158e9eb5
Fix lpp change
2019-11-08 15:45:25 +00:00
Matthew Guthaus
0dea153919
PEP8 formatting
2019-11-07 16:33:13 +00:00
Matt Guthaus
560d768010
Fix syntax error in router
2019-08-22 13:46:32 -07:00
Matt Guthaus
6e044b776f
Merge branch 'pep8_cleanup' into dev
2019-06-14 08:47:10 -07:00
Matt Guthaus
a234b0af88
Fix space before comment
2019-06-14 08:43:41 -07:00
mrg
7b8c2cac30
Starting single layer power router.
2019-06-03 15:28:55 -07:00
mrg
bd4d965e37
Begin single layer supply router
2019-06-03 15:27:37 -07:00
Matt Guthaus
0f03553689
Update copyright to correct years.
2019-05-06 06:50:15 -07:00
Matt Guthaus
3f9a987e51
Update copyright. Add header to all OpenRAM files.
2019-04-26 12:33:53 -07:00
Matt Guthaus
7f5e6dd6f8
Fix unconnected supply pin bug in supply router.
...
Simplified some of the supply router pin groups so that it assumes
each group is fully connected. When computing enclosures of the
pins on the routing grid, it will remove disconnected enclosure
shapes to keep things connected.
2019-04-24 10:54:22 -07:00
Matt Guthaus
66c703d932
Simplify router code to clean it up a bit.
2019-04-22 15:30:35 -07:00
Matt Guthaus
ec1fb087b5
Check membership of keys without using keys() list
2019-01-30 13:02:34 -08:00
Matt Guthaus
74fbe8fe63
Convert source and target lists to sets for faster contains check.
2019-01-30 11:15:47 -08:00
Matt Guthaus
aaf028cacf
Optimize hpwl runtime. Fix error in via cost when L shape.
2019-01-30 08:49:47 -08:00
Matt Guthaus
6f171ad147
Added router timing code. Commented combine adjacent pins due to run-time complexity
2018-12-07 13:54:18 -08:00
Matt Guthaus
5ed9904855
Cast dict_values to a list for pin_groups
2018-12-07 13:02:50 -08:00
Matt Guthaus
dfb2cf3cbd
Change analyze_pins to a heuristic algorithm less than O(n^2)
2018-12-07 12:41:32 -08:00
Matt Guthaus
537e0689fb
Add combine adjacent pins back
2018-12-06 14:29:06 -08:00
Matt Guthaus
c51752d245
Provide more stats in -v output
2018-12-06 14:11:15 -08:00
Matt Guthaus
b72382b400
Fix offset bug with negative vertical supply rails
2018-12-06 11:58:19 -08:00
Matt Guthaus
fa3bf2915a
Remove commented code
2018-12-05 09:56:19 -08:00
Matt Guthaus
0c0a23e6eb
Cleanup code. Add time breakdown for SRAM creation.
2018-12-05 09:51:17 -08:00
Matt Guthaus
d95b34caf2
Round output to look pretty
2018-12-04 17:08:47 -08:00
Matt Guthaus
e750d446dc
Fix syntax error. Enable skipped test.
2018-12-04 17:08:22 -08:00
Matt Guthaus
126d4a8d10
Fix instersection bug. Improve primary and secondary pin algo.
2018-12-04 16:53:04 -08:00
Matt Guthaus
7ce75398a8
Change warning to info
2018-12-04 09:42:47 -08:00
Matt Guthaus
7fce6f06ca
Expand grids to maximal pin before removing blockages
2018-12-04 09:35:40 -08:00
Matt Guthaus
389bb91af4
Simplifying supply router to single grid track
2018-12-04 08:41:57 -08:00
Matt Guthaus
c6f03e70d4
Convert supply to wider DRC rules
2018-12-03 11:09:17 -08:00
Matt Guthaus
b8299565eb
Use grid furthest from blockages when blocked pin. Enclose multiple connectors.
2018-11-19 17:32:55 -08:00
Matt Guthaus
2694ee1a4c
Add all insufficient grids that overlap the pin at all
2018-11-19 15:43:19 -08:00
Matt Guthaus
6a7d721562
Add new bbox routine for pin enclosures
2018-11-19 09:28:29 -08:00
Matt Guthaus
3cfefa784f
Fix run-time bug in combine adjacent pins for supply router
2018-11-14 17:06:12 -08:00
Matt Guthaus
18d874a96a
Fix error in iterative implementation of combine_classes
2018-11-14 10:05:04 -08:00
Matt Guthaus
4ebb8a26c4
Disable debug statements.
2018-11-13 17:43:08 -08:00
Matt Guthaus
ddb4cabfe1
Change recursive equivalence class detection to iterative.
2018-11-13 17:42:06 -08:00
Matt Guthaus
de61630962
Expand blocked pins to neighbor grid cells.
2018-11-09 14:25:10 -08:00
Matt Guthaus
c5b408ae2d
Add router output message
2018-11-09 11:10:40 -08:00
Matt Guthaus
8f3fa0e2f6
Fix blocked pin debug output.
2018-11-09 08:52:05 -08:00
Matt Guthaus
f04e76a54f
Allow multiple must-connect pins with the same label.
2018-11-07 13:05:13 -08:00
Matt Guthaus
1fe767343e
Reimplement gdsMill pin functions so they are run once when a GDS is loaded. Get pins is now a table lookup.
2018-11-07 11:31:44 -08:00
Matt Guthaus
5ecfa88d2a
Pad the routing grid by a few tracks to add an extra rail
2018-11-02 17:35:35 -07:00
Matt Guthaus
a3666d82ab
Reduce verbosity of level 1 debug.
2018-11-02 17:30:28 -07:00
Matt Guthaus
ad1d3a3c78
Use default grid costs again.
2018-11-02 16:04:56 -07:00
Matt Guthaus
74c3de2812
Remove diagonal routing bug. Cleanup.
2018-11-02 14:57:40 -07:00
Matt Guthaus
4d30f214da
Add expanded blockages for paths an enclosures to handle wide metal spacing rules.
2018-11-02 11:11:32 -07:00
Matt Guthaus
b24c8a42a1
Remove redundant pins in pin_group constructor. Clean up some code and comments.
2018-11-01 11:31:24 -07:00
Matt Guthaus
2eedc703d1
Rename function in pin_group
2018-10-31 16:13:28 -07:00
Matt Guthaus
c511d886bf
Added new enclosure connector algorithm using edge sorting.
2018-10-31 15:35:39 -07:00
Matt Guthaus
fc45242ccb
Allow contains to contain copy. Add connectors when pin doesn't overlap grids.
2018-10-30 17:41:29 -07:00
Matt Guthaus
7099ee76e9
Remove blocked grids from pins and secondary grids
2018-10-30 16:52:11 -07:00
Matt Guthaus
1344a8f7f1
Add remove adjacent feature for wide metal spacing
2018-10-30 12:24:13 -07:00
Matt Guthaus
c4163d3401
Remove debug statements.
2018-10-29 13:50:56 -07:00
Matt Guthaus
fa272be3bd
Enumerate more enclosures.
2018-10-29 13:49:29 -07:00
Matt Guthaus
cd87df8f76
Clean up enclosure code
2018-10-29 11:27:59 -07:00
Matt Guthaus
f19bcace62
Merged in an old stash.
2018-10-29 11:18:12 -07:00
Matt Guthaus
b7655eab10
Remove bug for combining pin with multiple other pins in a single iteration
2018-10-29 11:07:02 -07:00
Matt Guthaus
bbffec863b
Abandon connectors for now and opt for all enclosures
2018-10-29 10:59:22 -07:00
Matt Guthaus
851aeae8c4
Add pins_enclosed function to pin_group
2018-10-29 10:28:57 -07:00
Matt Guthaus
7d74d34c53
Fix pin_layout contains bug
2018-10-26 10:40:43 -07:00
Matt Guthaus
4ce6b040fd
Debugging missing enclosures
2018-10-26 09:25:10 -07:00
Matt Guthaus
9e5d78cfc2
Fix bug in duplicate remove indices
2018-10-25 14:40:39 -07:00
Matt Guthaus
3407163cf1
Combine adjacent power supply pins finished
2018-10-25 14:25:52 -07:00
Matt Guthaus
0544d02ca2
Refactor router to have pin_groups for pins and router_tech file
2018-10-25 13:36:35 -07:00
Matt Guthaus
88f43cc754
Add the minimum pin enclosure that has DRC correct pin connections.
2018-10-24 16:41:33 -07:00
Matt Guthaus
94e5050513
Move overlap functions to pin_layout
2018-10-24 16:13:07 -07:00
Matt Guthaus
7e2bef624e
Continue routing rails in same layer after a blockage
2018-10-24 12:32:27 -07:00
Matt Guthaus
38a8c46034
Change non-preferred route costs.
2018-10-20 14:47:24 -07:00
Matt Guthaus
4c25bb09df
Fixed supply end-row via problem by restricting placement
2018-10-20 14:25:32 -07:00
Matt Guthaus
f5e68c5c32
Move power pins in hierarchical decoder to be further. Strap rails instead for redundant vias.
2018-10-20 12:54:12 -07:00
Matt Guthaus
f9738253c6
Remove warning of track space and floor the space function.
2018-10-20 11:53:52 -07:00
Matt Guthaus
a1f2a5befe
Convert supply tracks to sets for simpler algorithms.
2018-10-20 10:33:10 -07:00
Matt Guthaus
0aad61892b
Supply router working except for off by one rail via error
2018-10-19 14:21:03 -07:00
Matt Guthaus
5cb3a24b19
Fix supply rail step size to place alternating rails
2018-10-15 13:58:40 -07:00
Matt Guthaus
e2cfd382b9
Fix print check regression
2018-10-15 13:23:31 -07:00
Matt Guthaus
a165446fa7
First implementation of multiple track spacing wide DRCs in routing grid.
2018-10-15 11:25:51 -07:00
Matt Guthaus
d855d4f1a6
Moving wide metal spacing to routing grid level
2018-10-15 09:59:16 -07:00
Matt Guthaus
ce8c2d983d
Update all drc usages to call function type
2018-10-12 14:37:51 -07:00
Matt Guthaus
6bbf66d55b
Rewrote pin enclosure code to better address off grid pins.
...
Include only maximal pin enclosure shapes.
Add smallest area connector for off grid pins.
Fix decoder to use add_power_pin code.
Change permissions.
2018-10-10 15:15:58 -07:00
Matt Guthaus
a2b1d025ab
Merge multiport
2018-10-08 11:45:50 -07:00
Matt Guthaus
94ab69ea16
Supply router working, perhaps not efficiently though.
2018-10-05 15:57:34 -07:00
Matt Guthaus
12cb02a09f
Add partial grids as pins. Add previous paths as routing targets.
2018-10-05 08:39:28 -07:00
Matt Guthaus
c3cd76048b
Removed prints. Fixed offset for single track enclosure.
2018-10-04 14:44:25 -07:00
Matt Guthaus
985d04d4b5
Cleanup of router.
...
Made offsets in geometry snap to grid.
Changed gds_write to use list for visited flag.
Rewrite self.gds each call in case of any changes.
2018-10-04 14:04:29 -07:00
Matt Guthaus
a3f13d6eab
Remove banks from test configs
2018-09-24 11:41:51 -07:00