mirror of https://github.com/VLSIDA/OpenRAM.git
Improve output messaging of tree router
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2b0f8bf263
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11384ef926
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@ -133,8 +133,8 @@ class supply_tree_router(router):
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"""
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remaining_components = sum(not x.is_routed() for x in self.pin_groups[pin_name])
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debug.info(1,"Maze routing {0} with {1} pin components to connect.".format(pin_name,
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remaining_components))
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debug.info(1,"Routing {0} with {1} pin components to connect.".format(pin_name,
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remaining_components))
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# Create full graph
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pin_size = len(self.pin_groups[pin_name])
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@ -158,6 +158,8 @@ class supply_tree_router(router):
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continue
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if mst[x][y]>0:
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connections.append((x, y))
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debug.info(1,"MST has {0} segments.".format(len(connections)))
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# Route MST components
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for (src, dest) in connections:
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