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58 Commits

Author SHA1 Message Date
AdvaySingh1 54bcc49987 ENG-1872 2026-04-10 12:54:43 -07:00
Akash Levy bf3afc569a Fix the test 2026-04-07 22:46:33 -07:00
Akash Levy 6daa8a01ed opt_vps improvements for VPS read 2026-04-07 22:07:14 -07:00
Akash Levy 1820526a9a opt_vps 2026-04-03 01:15:17 -07:00
Akash Levy 5082625d71 opt_shift 2026-04-02 00:43:06 -07:00
Abhinav Tondapu df43a3097a [ENG-1692] negopt runtime fix + small cleanup 2026-03-30 16:30:46 -07:00
AdvaySingh1 f84fd46a17 Added test cases for clkmerge and cone_partition passes 2026-03-25 15:06:58 -07:00
AdvaySingh1 2836cc8f25 Added test cases for the infer_ce pass 2026-03-04 12:03:38 -08:00
tondapusili f46b8d2a44 silimate: add opt_timing_balance pass and tests 2026-02-27 09:13:39 -08:00
Akash Levy 650c636d39 Fixups 2026-02-18 01:12:35 -08:00
tondapusili 6bb43f109c fixed edge cases in negopt passes, fixed cell naming inconsistencies 2026-02-06 16:38:55 -08:00
tondapusili d592f312ab mux_push implementation 2026-02-05 16:49:59 -08:00
tondapusili 643427d9c9 Add negopt pass with comprehensive pattern matching 
This commit introduces the negopt pass with pre/post optimization modes
for handling negation patterns in arithmetic circuits.

Pre-optimization patterns (expose for tree balancing):
- manual2sub: (a + ~b) + 1 → a - b
- sub2neg: a - b → a + (-b)
- negexpand: -(a + b) → (-a) + (-b) [with output width fix]
- negneg: -(-a) → a
- negmux: -(s ? a : b) → s ? (-a) : (-b)

Post-optimization patterns (cleanup/rebuild):
- negrebuild: (-a) + (-b) → -(a + b)
- muxneg: s ? (-a) : (-b) → -(s ? a : b)
- neg2sub: a + (-b) → a - b

All patterns use nusers() for fanout checking (standard Yosys style).
Comprehensive test coverage with positive/negative cases and formal
verification via equiv_opt.
 2026-02-03 17:21:21 -08:00
Akash Levy 947139aca1 Remove opt_balance_tree from silimate (now in opt) 2026-01-21 15:15:21 -08:00
Akash Levy a353716202 Update fanoutbuf 2025-10-01 20:59:36 -07:00
Akash Levy c8d8c4f408 Add fanoutbuf pass 2025-10-01 19:23:45 -07:00
Akash Levy 17e3ed3258 Remove annotate_unqcoef (for now) 2025-10-01 19:23:13 -07:00
Akash Levy dfc8607a77 Fixups 2025-09-29 03:49:44 -07:00
Akash Levy a0d1c8b30f More minor cleanup 2025-09-28 07:19:53 -07:00
Akash Levy eb4539f151 Smallfixes 2025-09-09 04:50:57 -07:00
Akash Levy b7a4ce8b42 Fix opt balance tree and wreduce 2025-09-09 04:32:15 -07:00
Akash Levy 3f94486a1c
Merge pull request #82 from donn/splitlarge 
splitlarge: new pass to split wide arithmetic operators
 2025-05-15 15:00:45 -07:00
Mohamed Gaber 1d9fbb6143 misc: review feedback, remove MUL vestiges 2025-05-15 18:01:13 +03:00
Mohamed Gaber 46ba89059a splitlarge: new pass to split wide arithmetic operators 
Adds a new pass, `splitlarge`, that recursively divides $add/$sub
cells into smaller cells until each cell's width doesn't exceed a
given max_width (128 by default.) An $add/$sub cell's width for
this purpose is defined as the higher of the widths of its two
inputs.

A test was written in Tcl for it, which tests this matrix:
- cell: $add/$sub
- b: unsigned, signed
- a: unsigned, signed

This is the first test for a Silimate pass in Tcl and thus
`run-test.sh` was modified to include it.
 2025-05-15 17:45:08 +03:00
williamzhu17 fc86bd8e74 finalized tests 2025-05-11 11:16:50 -07:00
williamzhu17 39be4f29bd opt_balance_tree test cases 2025-05-11 10:58:29 -07:00
williamzhu17 51a951d614 wip tests 2025-05-11 10:17:08 -07:00
williamzhu17 b265ea9dcf removed comma 2025-05-08 17:39:16 -07:00
williamzhu17 8d20ed0637 updated tests a bit 2025-05-08 17:38:42 -07:00
williamzhu17 d10e42c4bf added some tests 2025-05-08 17:36:35 -07:00
Akash Levy c3657eee6d Fix Silimate tests 2025-04-04 03:21:53 -07:00
Akash Levy 809a38a597
Merge pull request #78 from williamzhu17/extract_reduce-tests 
extract_reduce tests and removed XNOR functionality from extract_reduce
 2025-04-03 15:23:09 -07:00
williamzhu17 05a3c28f39 small name change 2025-04-03 10:38:55 -07:00
williamzhu17 ba709dc0ed added stress tests 2025-04-03 10:37:32 -07:00
williamzhu17 58d903eee6 deleted old file 2025-04-01 17:19:04 -07:00
williamzhu17 776479d7aa wip tests 2025-04-01 17:17:39 -07:00
williamzhu17 bc2d9d1f33 added deeper cases for gates 2025-04-01 11:10:50 -07:00
williamzhu17 2f9e6e08f0 added tests with constants 2025-04-01 10:39:33 -07:00
williamzhu17 8991707dee zero indexed wires 2025-04-01 10:19:54 -07:00
williamzhu17 101f775b64 added extra test for muxes 2025-04-01 10:18:20 -07:00
williamzhu17 8f5f4ecab4 inital extract_reduce tests 2025-04-01 10:11:17 -07:00
Akash Levy f488b0e74c Add lut2bmux, annotate_unqcoef, and seed tests 2025-03-31 05:55:54 -07:00
Akash Levy 161ff0fa3f Add muxmode pass and tests 2025-03-30 17:54:18 -07:00
williamzhu17 1628a22195 added extra test for multiple sops 2025-03-28 14:58:17 -07:00
williamzhu17 a4a4544223 Merge branch 'breaksop-tests' of github.com:williamzhu17/yosys into breaksop-tests 2025-03-28 14:54:21 -07:00
williamzhu17 727c6a51be added comment about one test case 2025-03-28 14:54:00 -07:00
William Zhu ddb621d011
Merge branch 'Silimate:main' into breaksop-tests 2025-03-28 14:50:35 -07:00
williamzhu17 5987454eac added breaksop-tests 2025-03-28 14:50:02 -07:00
williamzhu17 ebb7a1b548 added reduce XNOR test cases 2025-03-28 10:52:56 -07:00
williamzhu17 baaa90993e added breakreduce tests 2025-03-28 10:43:10 -07:00