Stefan Frederik
|
40eaefbb82
|
removed logicx() obsoleted function
|
2020-12-26 23:05:07 +01:00 |
|
Stefan Frederik
|
9b4534d6b0
|
A change_linewidth(-1.0) is added after resetwin() creates a new pixmap (example: after a window resize) . This sets colors, backgrounds fill styles for the new pixmap.
|
2020-12-26 22:29:45 +01:00 |
|
Stefan Frederik
|
dfa0884180
|
typo in description
|
2020-12-26 20:15:12 +01:00 |
|
Stefan Frederik
|
433d4633b7
|
fa_1.sym
|
2020-12-26 19:44:34 +01:00 |
|
Stefan Frederik
|
37f0f7380f
|
added a full adder as an example of a multi-output gate
|
2020-12-26 19:43:16 +01:00 |
|
Stefan Frederik
|
b71199c5b8
|
added "xschem_simulator" sample example directory for trying logic propagation of probed nets
|
2020-12-26 19:26:33 +01:00 |
|
Stefan Frederik
|
582863f825
|
added menu option to load most recent file: ctrl-shift-o, fix menu entry "unhilight selected nets" (did unhilight all); removed a wire[].node clear in hash_wire() that caused broken connectivity. this data is cleared in delete_netlist_structs when needed.
|
2020-12-25 04:37:53 +01:00 |
|
Stefan Frederik
|
b7b9d666a9
|
fix: avoid doing any erc checking/highlights if a schematic is explicitly loaded without linking components to symbols. This is done for instances with (spice|verilog)_stop=true attributes set to prevent unwanted symbol expansion
|
2020-12-23 18:16:53 +01:00 |
|
Stefan Frederik
|
1cfea4d1d3
|
svg_draw(): do not print unused layer stylesheets, error check when opening file for printing
|
2020-12-22 18:31:08 +01:00 |
|
Stefan Frederik
|
0783ff7002
|
fix error in link_symbols_to_instances(): potential call of symbol_bbox() -> translate() -> prepare_netlist_structs() before completing xctx->inst[i].lab assignments
|
2020-12-22 16:10:27 +01:00 |
|
Stefan Frederik
|
1184312527
|
various fixes around the highlight speed improvements
|
2020-12-19 05:06:57 +01:00 |
|
Stefan Frederik
|
3611b95444
|
fix debug message causing a crash when doing a net highlight if design contains cells with no pins (filler, taps, etc) and highlight=true attr is set on symbols
|
2020-12-18 12:38:09 +01:00 |
|
Stefan Frederik
|
2e18119645
|
remove "m=1" in xyce spice netlists as xyce does not handle m param. Translate spice_probe ".save" to xyce ".print tran", handle different hierarchical expansion of voltage/current nodes in xyce for hierarchical ammeter/spice_probe probes
|
2020-12-17 18:26:46 +01:00 |
|
Stefan Frederik
|
c13ca9218d
|
fix correct version syntax when saving in file
|
2020-12-17 02:01:38 +01:00 |
|
Stefan Frederik
|
5b4d6ab640
|
postscript fonts in ps/pdf export
|
2020-12-16 18:30:33 +01:00 |
|
Stefan Frederik
|
1bb59cf41a
|
cleanup in postscript print
|
2020-12-16 10:48:15 +01:00 |
|
Stefan Frederik
|
5b7cf39ead
|
removed test structure in mos_power_ampli.sch
|
2020-12-14 16:37:23 +01:00 |
|
Stefan Frederik
|
ce5adbffdb
|
added flatten_savenodes.awk for flattening in-subcircuit .save instructions
|
2020-12-14 16:31:20 +01:00 |
|
Stefan Frederik
|
5af6a38d2e
|
allow ! in net names, it got deleted after the parselabel rework.
|
2020-12-13 20:26:39 +01:00 |
|
Stefan Frederik
|
80b2d88caf
|
added plot_manipulation.sch example showing how to manually create an ngspice plot collecting data from multiple operating point sims. the syntax is so difficult to remember so i keep a working example available here.
|
2020-12-09 13:53:32 +01:00 |
|
Stefan Frederik
|
780b994aeb
|
use short data type for small integer data: rot, flip, dash, bus etc...
|
2020-12-05 03:16:01 +01:00 |
|
Stefan Frederik
|
d4c289aded
|
reverted examples to verify split mode netlist
|
2020-12-04 13:14:20 +01:00 |
|
Stefan Frederik
|
c3aad2fbfc
|
remove dbg messages
|
2020-12-04 13:02:19 +01:00 |
|
Stefan Frederik
|
e5205cfd1e
|
Split mode netlisting in different formats got bitrotten due to a regression. Fixed.
|
2020-12-04 12:45:50 +01:00 |
|
Stefan Frederik
|
3732bd8d01
|
put cairo save surface and context into xctx, faster and smoother preview (avoid unload/load if no filename change)
|
2020-12-03 18:21:23 +01:00 |
|
Stefan Frederik
|
2bd8a93889
|
preserve backslashes in instance name after doing an editprop(). get_tok_value() fix: do not eat "\" if called with with_quotes=1
|
2020-12-01 12:00:18 +01:00 |
|
Stefan Frederik
|
3f6a9ab1f8
|
allow new lines in net names (!)
|
2020-11-30 22:12:31 +01:00 |
|
Stefan Frederik
|
eb2d143e77
|
more consistent get_tok_value() regarding escaping
|
2020-11-29 01:59:17 +01:00 |
|
Stefan Frederik
|
d95eb0f871
|
fix repeated character in RE, fix changed syntax in verilog example
|
2020-11-28 20:08:40 +01:00 |
|
Stefan Frederik
|
7a7868318b
|
Added various procedures to select flat / hierarchical instances and re-route a terminal to a different net. reroute_inst -> change a pin connection, reroute_net -> change net updating all connected components. "xschem instances_to_net", "xschem instance_nodemap", "xschem instance_pin_coord" new query commands added. "xschem get expandlabel node" renamed to "xschem expandlabel node".
|
2020-11-26 03:46:55 +01:00 |
|
Stefan Frederik
|
870c3e4478
|
removed weird names (spaces etc) in hierarchical_tedax schematic objects. that was used for testing the hiertEDAx export.
|
2020-11-24 19:55:45 +01:00 |
|
Stefan Frederik
|
8fe0553f96
|
fix crashing netlister crashing bug if required schematic files are missing (null hier path). fix hierEDAx when netlisting empty blocks
|
2020-11-24 17:37:27 +01:00 |
|
Stefan Frederik
|
d7b0c27775
|
hiertEDAx: don\t split on escaped white space. test schematic with weird instance/net names
|
2020-11-24 15:25:37 +01:00 |
|
Stefan Frederik
|
a61d803a3e
|
edit hierarchical_tedax.sch, different ways to instantiate more times same subschematic, as placed sheet or as symbol
|
2020-11-24 11:35:46 +01:00 |
|
Stefan Frederik
|
df48954ee5
|
small fixes in example hierarchical tedax schematic
|
2020-11-24 03:12:05 +01:00 |
|
Stefan Frederik
|
a9a0baa3fa
|
comments in sample schematic
|
2020-11-24 02:59:14 +01:00 |
|
Stefan Frederik
|
9c5739b0f2
|
allow tEDAx (flattened) netlisting of hierarchical schematics; added pcb/hierarchical_tedax example
|
2020-11-24 02:54:45 +01:00 |
Stefan Schippers
|
070ec71800
|
reduce svg size by avoiding redundant attributes in elements, fix a regression in scheduler.c (missing else clause)
|
2020-11-18 23:20:50 +01:00 |
|
Stefan Schippers
|
bf183f0d20
|
Option (default now) to export svg images using the svg <text> element. This makes generated SVGs much smaller and in most cases faster to render.
|
2020-11-18 18:29:14 +01:00 |
|
Stefan Schippers
|
d22b4c9ea0
|
guard against extended ascii characters in nocairo/svgdraw/psprint function
|
2020-11-13 12:54:07 +01:00 |
|
Stefan Schippers
|
ec6ad39acc
|
synchronize command sending to gaw with gaw replies so at the end the tcp channel is closed gracefully (avoid port in use error messages). Timeout whatchdog is set to prevent forever waits/deadlocks.
|
2020-11-07 21:07:16 +01:00 |
|
Stefan Schippers
|
3f76397522
|
better synchronization of gaw_cmd so multiple commands are sent to gaw. However tcp file descriptor remains active for subsequent commands. Next improvement: count replies from gaw client and close file descriptor when last reply read.
|
2020-11-07 14:40:49 +01:00 |
|
Stefan Schippers
|
292958e4a2
|
added res_ac.sym
|
2020-11-06 19:43:26 +01:00 |
|
Stefan Schippers
|
191b4d8ed3
|
added m parameter to npn.sym and pnp.sym, text attribute edit dialog box renamed from .t to .dialog so it will be always raised on top of xschem window
|
2020-11-06 19:29:09 +01:00 |
|
Stefan Schippers
|
01ed63275b
|
do not set dircolor(...) default item colors if dircolor array defined in xschemrc
|
2020-10-30 01:22:25 +01:00 |
|
Stefan Schippers
|
d5ff835614
|
sqwsource: do not use tcleval, leave the simple expressions parsing to the simulator
|
2020-10-26 02:58:29 +01:00 |
|
Stefan Schippers
|
460ebe561d
|
sqwsource.sym: better labels, various fixes, comments and more debug messages in tcleval() stuff, some fixes (error checks) in "device_model" related model_name() function
|
2020-10-25 03:03:23 +01:00 |
|
Stefan Schippers
|
27d1a9e477
|
get_tok_value: even if called with "with_quotes=2" do not skip unescaped backslashes that are outside "quotes". Added dynamic netlisting test circuit in examples
|
2020-10-23 23:17:55 +02:00 |
|
Stefan Schippers
|
1536e77b62
|
spice netlist postprocessing will not break ".include " lines as ngspice does not like these. make_sch_from_spice.awk adapted to import sky130 standard cells, spice netlister will print extra nodes (inherited connections or pins-by-attribute) in the order specified by the format string, instead of dumping the "extra" attribute after all "real" pins, this allows to mix attribute pins with the other pins.
|
2020-10-21 18:18:53 +02:00 |
|
Stefan Schippers
|
7e845db5df
|
exampels/poweramp.sch and examples/cmos_example.sch show how to use dynamuc ngspice simulation data backannotation, optimized fix of previous bbox bug
|
2020-10-20 19:48:59 +02:00 |
|
Stefan Schippers
|
3bbba8601f
|
added ngspiec_probe.sym and ngspice_get_value.sym that use a pull method to fetch values from ngspice .raw datafile, fixed a long standing bug that changed bounding boxes of symbols that were selected for a copy if they were copied and copy operation involved rotations of flips.
|
2020-10-20 12:44:10 +02:00 |
|
Stefan Schippers
|
72e45216c2
|
spice_probe_dynamic.sym added to devices, retrieves node voltages with a pull method, so always updated, "@@pin" syntax in translate(), same as in format string for netlisting,print hilight nodes (ctrl-alt-j) will print .save instructions if netlist mode set to spice
|
2020-10-20 01:05:40 +02:00 |
|
Stefan Schippers
|
c84d71b859
|
xschem setprop made way faster if "fast" argument is provided. Example "clear probes" launcher object in mos_power_ampli.sch.
|
2020-10-19 02:07:17 +02:00 |
|
Stefan Schippers
|
7360982d7c
|
removed some redundant calls in prepare_netlist_structs(), no full instance spatial rehash if adding a component, set template name initials for components in devices/ that do not map directly to spice elements to lowercase letters.
|
2020-10-18 23:58:40 +02:00 |
|
Stefan Schippers
|
ebdc8746c0
|
better regexp for probe search in ngspice_backannotate.tcl, comments in token.c
|
2020-10-18 02:08:08 +02:00 |
|
Stefan Schippers
|
8a45e319c9
|
if xschem is started with -n (netlist) load_schematic will not call tcl proc is_xschem_file to determine if sch or sym type, since command line option has higher priority. reverted back possibility in update_symbol() to have double quotes around name attribute (name="My strange name"). This has toooo many implications everywhere. name attribute must be wihout double quotes, xschem will strip them off if any.
|
2020-10-17 02:54:42 +02:00 |
|
Stefan Schippers
|
0f94bee28e
|
better text positioning (net_name) on some devices/ symbols
|
2020-10-17 01:07:18 +02:00 |
|
Stefan Schippers
|
35c2d0fa93
|
better node multiplicity detection in spice and verilog awk netlist post-processors (\?-?[0-9]+)
|
2020-10-16 00:13:39 +02:00 |
|
Stefan Schippers
|
4362c44a8d
|
fix various regressions: escape the ? pattern in awk, be more selective in ? node multiplicity tag recognition in spice.awk, yet some more fixes in abs_sym_path thanks to JL
|
2020-10-15 13:38:27 +02:00 |
|
Stefan Schippers
|
e82f270f61
|
replaced @ character with ? for spice netlist node multiplicity tags, so translate() will not try to expand them, do not print erc warnings for "non electrical" symbols (architecture, package, port_attributes, use, etc), print_spice_element() result string will be forwarded to translate() if enclosed within tcleval(...), so all @vars will be expanded. translate() in turn will forward to tcl_hook() if necessary.
|
2020-10-14 23:15:05 +02:00 |
|
Stefan Schippers
|
5d26115bd2
|
refactored token.c, differentiate between windows and unix in absolute filename construction in xinit.c
|
2020-10-14 01:38:51 +02:00 |
|
Stefan Schippers
|
f8f1626c1b
|
cleanup in print_spice_element(), print_verilog_primitive(), print_vhdl_primitive(), print_tedax_element(), parselabel allows ~ in node names (XSPICE inversion operator)
|
2020-10-13 02:52:37 +02:00 |
|
Stefan Schippers
|
6f80fdbf76
|
fix once again an issue when working in symlinked directories and giving a relative .sch file path on cmdline; clean up print_spice_element(). JL to check if tclgetvar("env(PWD)") works on windows (xinit.c:1435)
|
2020-10-13 01:07:28 +02:00 |
|
Stefan Schippers
|
b006c82bad
|
slight resize in pin text size for better look. top frame in insert text dialog does not extend vertically.
|
2020-10-11 01:38:28 +02:00 |
|
Stefan Schippers
|
617d708009
|
verilog_preprocessor and verilog_timescale now use verilog_format instead of format (which is for spice), corrected verilog_netlist.c; better backslash and quote (") escaping and unescaping when using attribute select combobox; for unquoting use "xschem get_tok tok 2" instead of "xschem get_tok tok 0" + regsub ....(remove backslashes)...
|
2020-10-10 23:21:23 +02:00 |
|
Stefan Schippers
|
31eac64d7a
|
LICENSE cosmetic editing
|
2020-10-10 11:49:12 +02:00 |
|
Stefan Schippers
|
898a8adfb2
|
some clarifications of steps to be taken to simulate example rom8k circuit
|
2020-10-08 23:24:27 +02:00 |
|
Stefan Schippers
|
bbc5a58568
|
added vsqsource, square wave source generator, with only "hi" and "freq" as parameters
|
2020-10-07 18:04:03 +02:00 |
|
Stefan Schippers
|
d9488fa5ea
|
small sample xschemrc fix
|
2020-10-06 21:59:23 +02:00 |
|
Stefan Schippers
|
71f23a5242
|
devices/ symbol fixes
|
2020-10-06 03:20:56 +02:00 |
|
Stefan Schippers
|
11d664b4a8
|
fix a memory leak, spatial hash table tuning, better clear find_inst_to_be_redrawn() nodetable
|
2020-10-05 13:29:57 +02:00 |
|
Stefan Schippers
|
72363cf2d4
|
better wire bbox calculation in find_inst_to_be_redrawn()
|
2020-10-05 04:18:31 +02:00 |
|
Stefan Schippers
|
82051a33e5
|
simplify / break down complex expressions for code readability
|
2020-10-05 03:00:40 +02:00 |
|
Stefan Schippers
|
34a929f2bf
|
fix rlc.sch sample circuit it was changed for debugging
|
2020-10-03 12:51:31 +02:00 |
|
Stefan Schippers
|
72f0031611
|
mos_power_ampli.sym and solar_panel.sch examples updated to display symbolnet names on pins
|
2020-10-02 15:45:30 +02:00 |
|
Stefan Schippers
|
cf0db629c4
|
make move operations display updated @#n:net_name attributes after move operation
|
2020-10-01 02:58:05 +02:00 |
|
Stefan Schippers
|
3f482fd8a4
|
optimize unselect_all()
|
2020-09-30 02:53:20 +02:00 |
|
Stefan Schippers
|
0fe9c1223d
|
doc updates
|
2020-09-30 01:34:18 +02:00 |
|
Stefan Schippers
|
91e74fadcb
|
"@#n:net_name" attribute (n = pin name or number) in symbols translates to net name attached to pin. "lab_show.sym" component that shows (does not assign) net name. "highlight=true" attribute can be given on instances in addition to symbols
|
2020-09-30 00:30:48 +02:00 |
|
Stefan Schippers
|
f699d187e6
|
save embedded components not only on first embeded instance but on all of them. This makes reloading easier and the overall thing much simpler. In LCC schematic allow get_sym_type() to read symbol data from folowing embedded tags "[...]" if any. Fix potential segfault in preview_window()
|
2020-09-29 11:17:10 +02:00 |
|
Stefan Schippers
|
59d4608ac0
|
completely eliminated match_symbol() (which in turn may call load_sym_def() ) calls from within load_sym_def(), even for aligning LCC schematic pin ordering to symbol. A dedicated "align_sch_pins_with_sym()" together with "get_sym_type()" does the job in O(N) instead of using a sort routine.
|
2020-09-27 12:41:36 +02:00 |
|
Stefan Schippers
|
b5d21e54f1
|
removed debug messages
|
2020-09-26 01:29:28 +02:00 |
|
Stefan Schippers
|
c627f21057
|
optimize previous fix, avod skipping lines after embedded symbol (embed_fd)
|
2020-09-24 17:46:58 +02:00 |
|
Stefan Schippers
|
b7d724dcab
|
apply visible layers (View->Symbol visible layers) to any object (lines. arcs, text etc),better bounding box calculation for slant text
|
2020-09-23 22:13:39 +02:00 |
|
Stefan Schippers
|
5e98241df1
|
NumLock and CapsLock check for windows
|
2020-09-22 21:02:51 +02:00 |
|
Stefan Schippers
|
82451fd50e
|
"xschem hilight_netname" command to hilight a specific net name, "xschem search exact ..." finds specific instances of vector instances, "probe_net" procedure descends into the right bussed instance and hilights the correct net bit, added "xschem display_hilights" to return all hilighted nets in the hierarchy, added "gaw_cmd" procedure to send socket commands to gaw (like "gaw_cmd reload_all") (recently added command to gaw ttg)
|
2020-09-22 13:35:55 +02:00 |
|
Stefan Schippers
|
1a2500291d
|
dash attribute for arcs
|
2020-09-02 23:59:58 +02:00 |
|
Stefan Schippers
|
a44302a7fd
|
better join/end style for dashed objects, some dashed objects in example schematics/symbols
|
2020-09-02 19:21:51 +02:00 |
|
Stefan Schippers
|
3107c5b12a
|
added "dash=n" (n=integer) attribute for lines, polygons, rectangles to set dashed line style. n is the dash length in pixels.
|
2020-09-02 18:28:20 +02:00 |
|
Stefan Schippers
|
e6fe276eba
|
undo test-changes in example schematics
|
2020-09-02 13:16:54 +02:00 |
|
Stefan Schippers
|
9f82cf47aa
|
verilog_ignore, spice_ignore, vhdl_ignore attributes on schematic pins are propagated to symbol pin attributes (if using make symbol from schematic, otherwise propagate by hand). These pins are not netlisted in the respective netlist format
|
2020-09-02 12:30:52 +02:00 |
|
Stefan Schippers
|
b2289683ac
|
doc updates for text hcenter and vcenter attrs
|
2020-08-25 02:10:15 +02:00 |
|
Stefan Schippers
|
ec29c2677a
|
enable "preserve unchanged props" checkbutton in text edit prop dialog box
|
2020-08-24 16:21:50 +02:00 |
|
Stefan Schippers
|
bd982c00ce
|
removed unused files
|
2020-08-24 10:01:41 +02:00 |
|
Stefan Schippers
|
b842e020bc
|
snap and grid entries will not annoyingly receive keyboard focus with TAB key
|
2020-08-19 15:08:35 +02:00 |
|
Stefan Schippers
|
7f6b3d999f
|
fixed symbol text
|
2020-08-18 10:32:33 +02:00 |
|
schippes
|
9570439e16
|
made edit_symbol_property and tcl edit_prop procedure much simpler when user clicks another instance while edit_prop dialog still open
|
2020-08-16 03:34:45 +02:00 |
|
schippes
|
58a43ccc4d
|
code cleanups, preparing for editprop combobox token selector
|
2020-08-15 10:48:26 +02:00 |
|
schippes
|
ff9e2e7872
|
when copying a symbol with edit_property dialog ("q" key) and enabling "Copy cell" if a relative path name is supplied for new symbol it will inherit the same path prefix as the original symbol.
|
2020-08-13 12:56:20 +02:00 |
|
schippes
|
ea4513f9c5
|
changed tcl procs abs_sym_path and rel_sym_path, now the real symbol filename is obtained by prepending one of the XSCHEM_LIBRARY_PATH paths until the symbol is found. This allows more than one directory levels in symbol references.
|
2020-08-13 02:19:08 +02:00 |
|
schippes
|
c5f412bdb7
|
symbol attribute @symname will display symbol name without extension as it used to be in earlier versions. @symname_ext will print full rootname of symbol. Some doc updates on symbol attributes
|
2020-08-12 11:31:42 +02:00 |
|
schippes
|
8dac4753f7
|
Verilog and vhdl netlisters: print as instance parameters all params listed in instance properties, excluding "name" and all params not listed in template
|
2020-08-10 14:15:36 +02:00 |
|
Stefan SChippers
|
5e8df730a0
|
populating xschem git repo
|
2020-08-08 15:47:34 +02:00 |