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fix rlc.sch sample circuit it was changed for debugging

This commit is contained in:
Stefan Schippers 2020-10-03 12:51:31 +02:00
parent f8708d60c7
commit 34a929f2bf
1 changed files with 0 additions and 16 deletions
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16
xschem_library/examples/rlc.sch
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@ -11,13 +11,6 @@ N 280 -360 280 -300 {lab=C}
N 280 -620 480 -620 {lab=A}
N 480 -620 480 -520 {lab=A}
N 280 -620 280 -580 {lab=A}
N 870 -660 870 -560 {lab=#net2}
N 1070 -600 1070 -380 {lab=0}
N 870 -380 1070 -380 {lab=0}
N 870 -500 870 -440 {lab=C}
N 870 -760 1070 -760 {lab=A}
N 1070 -760 1070 -660 {lab=A}
N 870 -760 870 -720 {lab=A}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {launcher.sym} 320 -100 0 0 {name=h1
descr="NGSPICE Manual"
@ -39,12 +32,3 @@ net_name=true}
C {ind.sym} 280 -390 0 0 {name=L1 value=10mH net_name=true}
C {vsource.sym} 280 -270 0 0 {name=V1 value="pwl 0 0 100u 0 101u 3" net_name=true}
C {lab_show.sym} 280 -450 0 0 {name=l3}
C {capa.sym} 870 -690 0 0 {name=C2 m=1 value=50nF footprint=1206 device="ceramic capacitor" net_name=true}
C {lab_pin.sym} 870 -470 2 1 {name=l6 sig_type=std_logic lab=C}
C {lab_pin.sym} 1070 -720 2 0 {name=l7 sig_type=std_logic lab=A}
C {lab_pin.sym} 1070 -380 2 0 {name=l8 sig_type=std_logic lab=0}
C {res.sym} 1070 -630 0 0 {name=R2 m=1 value=1k footprint=1206 device=resistor
net_name=true}
C {ind.sym} 870 -530 0 0 {name=L2 value=10mH net_name=true}
C {vsource.sym} 870 -410 0 0 {name=V2 value="pwl 0 0 100u 0 101u 3" net_name=true}
C {lab_show.sym} 870 -590 0 0 {name=l9}