comments in sample schematic
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@ -7,7 +7,11 @@ E {}
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T {Example of hierarchical schematic
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to be netlisted in tEDAx format.
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Hierarchy is flattened and hierarchical
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node names are mangled to avoid collisions.} 1330 -520 0 0 0.8 0.8 {}
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node names and refdes's are mangled to
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avoid collisions.} 1330 -520 0 0 0.8 0.8 {}
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T {NOTE: circuit is doing nothing useful,
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just a collection of schematics to show
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hierarchical tEDAx netlisting} 1330 -220 0 0 0.8 0.8 {}
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N 540 -100 540 -80 {lab=VSS}
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N 540 -200 540 -160 {lab=VREF}
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N 540 -200 630 -200 {lab=VREF}
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