added "xschem_simulator" sample example directory for trying logic propagation of probed nets
This commit is contained in:
Stefan Frederik
parent
9604b8cc82
commit
b71199c5b8
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@ -1077,6 +1077,10 @@ int callback(int event, int mx, int my, KeySym key,
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place_net_label(1);
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break;
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}
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if(key >= '0' && key <= '2' && state == 0) { /* Toggle pin logic level */
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logic_set(key - '0');
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break;
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}
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if(key=='L' && state == (Mod1Mask | ShiftMask)) { /* add pin label*/
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place_net_label(0);
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break;
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@ -154,7 +154,8 @@ double nocairo_vert_correct=0.0;
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int sym_txt=1;
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int netlist_type=-1;
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int show_pin_net_names = 0;
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/* enable hilight instances attached to hilighted nets if they have the "highlight=true attr set */
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int en_hilight_conn_inst = 0;
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int help=0; /* help option set to global scope, printing help is deferred */
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187
src/hilight.c
187
src/hilight.c
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@ -324,7 +324,7 @@ void hilight_net_pin_mismatches(void)
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for(i=0;i<npin;i++) {
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my_strdup(24, &labname,get_tok_value(rct[i].prop_ptr,"name",0));
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my_strdup(25, &lab, expandlabel(labname, &mult));
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my_strdup(26, &netname, net_name(j,i,&mult, 0, 1));
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my_strdup(26, &netname, net_name(j,i, &mult, 0, 0));
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dbg(1, "hilight_net_pin_mismatches(): i=%d labname=%s explabname = %s net = %s\n", i, labname, lab, netname);
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if(netname && strcmp(lab, netname)) {
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dbg(1, "hilight_net_pin_mismatches(): hilight: %s\n", netname);
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@ -655,7 +655,7 @@ void drill_hilight(int mode)
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xSymbol *symbol;
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xRect *rct;
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int i, j, npin;
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const char *propagate_str;
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char *propagate_str = NULL;
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int propagate;
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struct hilight_hashentry *entry, *propag_entry;
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@ -667,17 +667,34 @@ void drill_hilight(int mode)
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npin = symbol->rects[PINLAYER];
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rct=symbol->rect[PINLAYER];
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for(j=0; j<npin;j++) {
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my_strdup(143, &netname, net_name(i, j, &mult, 1, 1));
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my_strdup(143, &netname, net_name(i, j, &mult, 1, 0));
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entry=bus_hilight_lookup(netname, 0, XLOOKUP);
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if(entry) xctx->inst[i].color = entry->value;
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propagate_str=get_tok_value(rct[j].prop_ptr, "propagate_to", 0);
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if(propagate_str[0] && entry) {
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propagate = atoi(propagate_str);
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/* get net to propagate hilight to...*/
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my_strdup(144, &propagated_net, net_name(i, propagate, &mult, 1, 1));
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/* add net to highlight list */
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propag_entry = bus_hilight_lookup(propagated_net, entry->value, mode);
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if(!propag_entry) found=1; /* keep looping until no more nets are found. */
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if(entry && (en_hilight_conn_inst || (symbol->type && IS_LABEL_SH_OR_PIN(symbol->type))) ) {
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xctx->inst[i].color = entry->value;
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}
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my_strdup(1225, &propagate_str, get_tok_value(rct[j].prop_ptr, "propagate_to", 0));
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if(propagate_str) {
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int n = 1;
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const char *propag;
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dbg(1, "propagate_logic(): inst=%d propagate_str=%s\n", i, propagate_str);
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while(1) {
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propag = find_nth(propagate_str, ',', n);
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n++;
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if(!propag[0]) break;
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if(entry) {
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propagate = atoi(propag);
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if(propagate < 0 || propagate >= npin) {
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dbg(0, "Error: inst: %s, pin %d, propagate_to set to %s <<%d>>\n",
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xctx->inst[i].instname, j, propagate_str, propagate);
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continue;
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}
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/* get net to propagate hilight to...*/
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my_strdup(144, &propagated_net, net_name(i, propagate, &mult, 1, 0));
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/* add net to highlight list */
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propag_entry = bus_hilight_lookup(propagated_net, entry->value, mode);
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if(!propag_entry) found=1; /* keep looping until no more nets are found. */
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}
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}
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}
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} /* for(j...) */
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} /* for(i...) */
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@ -685,6 +702,7 @@ void drill_hilight(int mode)
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} /* while(1) */
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my_free(772, &netname);
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my_free(773, &propagated_net);
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my_free(1226, &propagate_str);
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}
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int hilight_netname(const char *name)
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@ -778,6 +796,7 @@ static void send_current_to_gaw(int simtype, const char *node)
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my_free(1182, &t);
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}
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/* hilight_instances: if set to 1 hilight non pin/label symbols with "highlight=true" attribute set */
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void propagate_hilights(int set, int clear, int mode)
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{
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int i, hilight_connected_inst;
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@ -791,7 +810,8 @@ void propagate_hilights(int set, int clear, int mode)
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continue;
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}
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type = (xctx->inst[i].ptr+ xctx->sym)->type;
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hilight_connected_inst = (xctx->inst[i].flags & 4) || ((xctx->inst[i].ptr+ xctx->sym)->flags & 4);
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hilight_connected_inst = en_hilight_conn_inst &&
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( (xctx->inst[i].flags & 4) || ((xctx->inst[i].ptr+ xctx->sym)->flags & 4) );
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if(hilight_connected_inst && type && !IS_LABEL_SH_OR_PIN(type)) {
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int rects, j, nohilight_pins;
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if( (rects = (xctx->inst[i].ptr+ xctx->sym)->rects[PINLAYER]) > 0 ) {
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@ -829,12 +849,25 @@ void propagate_hilights(int set, int clear, int mode)
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#define LOGIC_1 0
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#define STACKMAX 100
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int get_logic_value(int n)
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int get_logic_value(int inst, int n)
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{
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return 0;
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int /* mult, */ val;
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struct hilight_hashentry *entry;
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char *netname = NULL;
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/* fast option: dont use net_name() (no expandlabel though) */
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/* my_strdup(1219, &netname, net_name(inst, n, &mult, 1, 0)); */
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my_strdup(1219, &netname, xctx->inst[inst].node[n]);
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entry=bus_hilight_lookup(netname, 0, XLOOKUP);
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if(!entry) return 2; /* LOGIC_X */
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val = entry->value;
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val = (val == LOGIC_0) ? 0 : (val == LOGIC_1) ? 1 : 2;
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dbg(1, "get_logic_value(): inst=%d pin=%d net=%s val=%d\n", inst, n, netname, val);
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my_free(1221, &netname);
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return val;
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}
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int eval_logic_expr(char *expr)
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int eval_logic_expr(int inst, int output)
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{
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int stack[STACKMAX];
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int i, sp = 0;
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@ -843,15 +876,19 @@ int eval_logic_expr(char *expr)
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char *ptr2;
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char *arg;
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int res = 0;
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char function[20];
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my_strdup(1218, &saveptr, expr);
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my_snprintf(function, S(function), "function%d", output);
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my_strdup(1218, &saveptr, get_tok_value((xctx->inst[inst].ptr + xctx->sym)->prop_ptr, function, 0));
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dbg(1, "eval_logic_expr(): function=%s, saveptr=%s\n", function, saveptr ? saveptr : "NULL");
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if(!saveptr) return 2; /* no logic function defined, return LOGIC_X */
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ptr2 = saveptr;
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while( (arg = my_strtok_r(ptr2, " ", &ptr1)) ) {
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ptr2 = NULL;
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if(arg[0] == '~') {
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if(sp > 0) {
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sp--;
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if(stack[sp] != LOGIC_X) stack[sp] = !stack[sp];
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if(stack[sp] != 2) stack[sp] = !stack[sp];
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++sp;
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}
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} else if(arg[0] == '|') {
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@ -861,9 +898,8 @@ int eval_logic_expr(char *expr)
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if(stack[i] == 1) {
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res = 1;
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break;
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}
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else if(stack[i] == LOGIC_X) {
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res = LOGIC_X;
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} else if(stack[i] == 2) {
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res = 2;
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}
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}
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stack[sp - 2] = res;
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@ -876,9 +912,8 @@ int eval_logic_expr(char *expr)
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if(stack[i] == 0) {
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res = 0;
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break;
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}
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else if(stack[i] == LOGIC_X) {
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res = LOGIC_X;
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} else if(stack[i] == 2) {
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res = 2;
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}
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}
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stack[sp - 2] = res;
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@ -888,11 +923,11 @@ int eval_logic_expr(char *expr)
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if(sp > 1) {
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res = 0;
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for(i = sp - 2; i < sp; i++) {
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if(stack[i] != LOGIC_X) {
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if(stack[i] != 2) {
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res = res ^ stack[i];
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}
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else {
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res = LOGIC_X;
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res = 2;
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break;
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}
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}
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@ -900,10 +935,11 @@ int eval_logic_expr(char *expr)
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sp--;
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}
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} else if(isdigit(arg[0])) {
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if(sp < STACKMAX) stack[sp++] = get_logic_value(atoi(arg));
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if(sp < STACKMAX) stack[sp++] = get_logic_value(inst, atoi(arg));
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}
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}
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free(saveptr);
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my_free(827, &saveptr);
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dbg(1, "eval_logic_expr(): inst %d output %d, returning %d\n", inst, output, stack[0]);
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return stack[0];
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}
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@ -928,18 +964,80 @@ void logicx()
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draw();
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}
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void toggle_net_logic_value()
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void propagate_logic()
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{
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int i, n, value, newvalue;
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char *propagated_net=NULL;
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int found /* , mult */;
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xSymbol *symbol;
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xRect *rct;
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int i, j, npin;
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char *propagate_str = NULL;
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int propagate;
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struct hilight_hashentry *entry;
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int val, oldval;
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static int map[] = {LOGIC_0, LOGIC_1, LOGIC_X};
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prepare_netlist_structs(0);
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while(1) {
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found=0;
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for(i=0; i<xctx->instances;i++) {
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symbol = xctx->inst[i].ptr+xctx->sym;
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npin = symbol->rects[PINLAYER];
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rct=symbol->rect[PINLAYER];
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for(j=0; j<npin;j++) {
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my_strdup(1223, &propagate_str, get_tok_value(rct[j].prop_ptr, "propagate_to", 0));
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if(propagate_str) {
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int n = 1;
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const char *propag;
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dbg(1, "propagate_logic(): inst=%d propagate_str=%s\n", i, propagate_str);
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while(1) {
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propag = find_nth(propagate_str, ',', n);
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n++;
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if(!propag[0]) break;
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propagate = atoi(propag);
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if(propagate < 0 || propagate >= npin) {
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dbg(0, "Error: inst: %s, pin %d, propagate_to set to %s <<%d>>\n",
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xctx->inst[i].instname, j, propagate_str, propagate);
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continue;
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}
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/* get net to propagate hilight to...*/
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/* fast option: dont use net_name() (no expandlabel though) */
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/* my_strdup(1220, &propagated_net, net_name(i, propagate, &mult, 1, 0)); */
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my_strdup(1220, &propagated_net, xctx->inst[i].node[propagate]);
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dbg(1, "propagate_logic(): inst %d pin %d propag=%s n=%d\n", i, j, propag, n);
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dbg(1, "propagate_logic(): inst %d pin %d propagate=%d\n", i, j, propagate);
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dbg(1, "propagate_logic(): propagated_net=%s\n", propagated_net);
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/* add net to highlight list */
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entry = bus_hilight_lookup(propagated_net, 0, XLOOKUP);
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oldval = (!entry) ? LOGIC_X : entry->value;
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val = map[eval_logic_expr(i, propagate)];
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bus_hilight_lookup(propagated_net, val, XINSERT);
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if(oldval != val) found=1; /* keep looping until no more nets are found. */
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}
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}
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} /* for(j...) */
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} /* for(i...) */
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if(!found) break;
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/* get out from infinite loops (circuit is oscillating) */
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Tcl_VarEval(interp, "update; if {$::tclstop == 1} {return 1} else {return 0}", NULL);
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if( tclresult()[0] == '1') break;
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} /* while(1) */
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my_free(1224, &propagate_str);
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my_free(1222, &propagated_net);
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}
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void logic_set(int value)
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{
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int i, n, newvalue;
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char *type;
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struct hilight_hashentry *entry;
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xRect boundbox;
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int big = xctx->wires> 2000 || xctx->instances > 2000 ;
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static int map[] = {LOGIC_0, LOGIC_1, LOGIC_X};
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prepare_netlist_structs(0);
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rebuild_selected_array();
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if(!big) {
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if(!no_draw && !big) {
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calc_drawing_bbox(&boundbox, 2);
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bbox(START, 0.0 , 0.0 , 0.0 , 0.0);
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bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2);
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@ -949,25 +1047,13 @@ void toggle_net_logic_value()
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n = xctx->sel_array[i].n;
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switch(xctx->sel_array[i].type) {
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case WIRE:
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entry = bus_hilight_lookup(xctx->wire[n].node, 0, XLOOKUP);
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if(!entry) value = 2;
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else if(entry->value == LOGIC_0) value = 0;
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else if(entry->value == LOGIC_1) value = 1;
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else value = 2;
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newvalue = (value + 1) % 3; /* next logic value 0, 1, 2 (LOGIC_X) */
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here(value);
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here(newvalue);
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newvalue = value; /* next logic value 0, 1, 2 (LOGIC_X) */
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bus_hilight_lookup(xctx->wire[n].node, map[newvalue], XINSERT);
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break;
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case ELEMENT:
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type = (xctx->inst[n].ptr+ xctx->sym)->type;
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if( type && xctx->inst[n].node && IS_LABEL_SH_OR_PIN(type) ) { /* instance must have a pin! */
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entry = bus_hilight_lookup(xctx->inst[n].node[0], 0, XLOOKUP);
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if(!entry) value = 2;
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else if(entry->value == LOGIC_0) value = 0;
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else if(entry->value == LOGIC_1) value = 1;
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else value = 2;
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newvalue = (value + 1) % 3; /* next logic value 0, 1, 2 (LOGIC_X) */
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newvalue = value; /* next logic value 0, 1, 2 (LOGIC_X) */
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bus_hilight_lookup(xctx->inst[n].node[0], map[newvalue], XINSERT);
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}
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break;
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@ -975,19 +1061,19 @@ void toggle_net_logic_value()
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break;
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}
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}
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propagate_logic();
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propagate_hilights(1, 0, XINSERT);
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if(!big) {
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if(!no_draw && !big) {
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calc_drawing_bbox(&boundbox, 2);
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bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2);
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bbox(SET , 0.0 , 0.0 , 0.0 , 0.0);
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}
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draw();
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if(!big) bbox(END , 0.0 , 0.0 , 0.0 , 0.0);
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if(!no_draw && !big) bbox(END , 0.0 , 0.0 , 0.0 , 0.0);
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tcleval("if { [info exists gaw_fd] } {close $gaw_fd; unset gaw_fd}\n");
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}
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void hilight_net(int to_waveform)
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{
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int i, n;
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@ -1110,7 +1196,8 @@ void select_hilight_net(void)
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for(i=0;i<xctx->instances;i++) {
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type = (xctx->inst[i].ptr+ xctx->sym)->type;
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hilight_connected_inst = (xctx->inst[i].flags & 4) || ((xctx->inst[i].ptr+ xctx->sym)->flags & 4);
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hilight_connected_inst = en_hilight_conn_inst &&
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( (xctx->inst[i].flags & 4) || ((xctx->inst[i].ptr+ xctx->sym)->flags & 4) );
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if( xctx->inst[i].color != -1) {
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dbg(1, "select_hilight_net(): instance %d flags &4 true\n", i);
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xctx->inst[i].sel = SELECTED;
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@ -1121,7 +1121,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
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no_of_pins= (xctx->inst[i].ptr+ xctx->sym)->rects[PINLAYER];
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for(p=0;p<no_of_pins;p++) {
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if(!strcmp( get_tok_value((xctx->inst[i].ptr+ xctx->sym)->rect[PINLAYER][p].prop_ptr,"name",0), argv[3])) {
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str_ptr = net_name(i,p,&multip, 0, 1);
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str_ptr = net_name(i,p, &multip, 0, 1);
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break;
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}
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} /* /20171029 */
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@ -1428,8 +1428,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
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else if(!strcmp(argv[1],"logic_set"))
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{
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cmd_found = 1;
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enable_drill = 1;
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toggle_net_logic_value();
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if(argc > 2) logic_set(atoi(argv[2]));
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Tcl_ResetResult(interp);
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}
|
||||
else if(!strcmp(argv[1],"logicx"))
|
||||
|
|
@ -2021,12 +2020,15 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
|
|||
return TCL_ERROR;
|
||||
}
|
||||
|
||||
if(!strcmp(argv[2],"instance") && argc==4) {
|
||||
if(!strcmp(argv[2],"instance") && argc>=4) {
|
||||
int i;
|
||||
/* find by instance name or number*/
|
||||
i = get_instance(argv[3]);
|
||||
if(i >= 0) {
|
||||
select_element(i, SELECTED, 0, 0);
|
||||
if(argc>=5 && !strcmp(argv[4], "clear"))
|
||||
select_element(i, 0, 0, 0);
|
||||
else
|
||||
select_element(i, SELECTED, 0, 0);
|
||||
}
|
||||
Tcl_SetResult(interp, (i >= 0) ? "1" : "0" , TCL_STATIC);
|
||||
}
|
||||
|
|
@ -2147,6 +2149,9 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
|
|||
draw();
|
||||
Tcl_ResetResult(interp);
|
||||
}
|
||||
else if(!strcmp(argv[2],"en_hilight_conn_inst")) {
|
||||
en_hilight_conn_inst=atoi(argv[3]);
|
||||
}
|
||||
else if(!strcmp(argv[2],"big_grid_points")) {
|
||||
big_grid_points=atoi(argv[3]);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -755,6 +755,7 @@ extern size_t get_tok_size;
|
|||
extern int batch_mode; /* no TCL console */
|
||||
extern int hide_symbols; /* draw only a bounding box for component instances and @symname, @name texts */
|
||||
extern int show_pin_net_names;
|
||||
extern int en_hilight_conn_inst;
|
||||
extern char svg_font_name[80];
|
||||
/* CAIRO specific global variables */
|
||||
extern char cairo_font_name[80];
|
||||
|
|
@ -1104,7 +1105,7 @@ extern void print_verilog_signals(FILE *fd);
|
|||
extern void print_generic(FILE *fd, char *ent_or_comp, int symbol);
|
||||
extern void print_verilog_param(FILE *fd, int symbol);
|
||||
extern void hilight_net(int to_waveform);
|
||||
extern void toggle_net_logic_value();
|
||||
extern void logic_set(int v);
|
||||
extern void logicx();
|
||||
extern int hilight_netname(const char *name);
|
||||
extern void unhilight_net();
|
||||
|
|
|
|||
|
|
@ -3489,6 +3489,7 @@ set_ne launcher_default_program {xdg-open}
|
|||
set_ne launcher_program {}
|
||||
#20160413
|
||||
set_ne auto_hilight 0
|
||||
set_ne en_hilight_conn_inst 0
|
||||
## 20161121 xpm to png conversion
|
||||
set_ne to_png {gm convert}
|
||||
|
||||
|
|
@ -4066,6 +4067,8 @@ if { ( $::OS== "Windows" || [string length [lindex [array get env DISPLAY] 1] ]
|
|||
xschem set auto_hilight 0
|
||||
}
|
||||
}
|
||||
.menubar.hilight.menu add checkbutton -label {Enable highlight connected instances} \
|
||||
-variable en_hilight_conn_inst -command {xschem set en_hilight_conn_inst $en_hilight_conn_inst}
|
||||
|
||||
.menubar.simulation.menu add command -label "Set netlist Dir" \
|
||||
-command {
|
||||
|
|
@ -4097,6 +4100,7 @@ if { ( $::OS== "Windows" || [string length [lindex [array get env DISPLAY] 1] ]
|
|||
.menubar.simulation.menu add checkbutton -label "LVS netlist: Top level is a .subckt" -variable top_subckt
|
||||
.menubar.simulation.menu add checkbutton -label "Use 'spiceprefix' attribute" -variable spiceprefix \
|
||||
-command {xschem set spiceprefix $spiceprefix; xschem save; xschem reload}
|
||||
.menubar.simulation.menu add checkbutton -label "Forced stop tcl scripts" -variable tclstop
|
||||
|
||||
pack .menubar.file -side left
|
||||
pack .menubar.edit -side left
|
||||
|
|
|
|||
|
|
@ -49,6 +49,7 @@
|
|||
# append XSCHEM_LIBRARY_PATH ${xschem_doc_dir}/xTAG
|
||||
# append XSCHEM_LIBRARY_PATH ${xschem_doc_dir}/rulz-r8c33
|
||||
# append XSCHEM_LIBRARY_PATH ${xschem_doc_dir}/ngspice
|
||||
# append XSCHEM_LIBRARY_PATH ${xschem_doc_dir}/xschem_simulator
|
||||
# append XSCHEM_LIBRARY_PATH ${xschem_doc_dir}/rom8k
|
||||
# append XSCHEM_LIBRARY_PATH ${xschem_doc_dir}/pcb
|
||||
# append XSCHEM_LIBRARY_PATH ${xschem_doc_dir}/symgen
|
||||
|
|
|
|||
|
|
@ -30,6 +30,8 @@ install: FORCE
|
|||
$(SCCBOX) install -f -d ngspice/stimuli.* "$(XDOCDIR)"/ngspice
|
||||
$(SCCBOX) install -f -d rom8k/*.sym "$(XDOCDIR)"/rom8k
|
||||
$(SCCBOX) install -f -d rom8k/*.sch "$(XDOCDIR)"/rom8k
|
||||
$(SCCBOX) install -f -d xschem_simulator/*.sym "$(XDOCDIR)"/xschem_simulator
|
||||
$(SCCBOX) install -f -d xschem_simulator/*.sch "$(XDOCDIR)"/xschem_simulator
|
||||
$(SCCBOX) install -f -d rom8k/stimuli.* "$(XDOCDIR)"/rom8k
|
||||
$(SCCBOX) install -f -d symgen/*.sym* "$(XDOCDIR)"/symgen
|
||||
$(SCCBOX) install -f -d gschem_import/*.sym "$(XDOCDIR)"/gschem_import
|
||||
|
|
@ -39,7 +41,7 @@ install: FORCE
|
|||
uninstall: FORCE
|
||||
$(SCCBOX) rm -f "$(system_library_dir)"/* "$(XDOCDIR)"/examples/* "$(XDOCDIR)"/pcb/* \
|
||||
"$(XDOCDIR)"/ngspice/* "$(XDOCDIR)"/symgen/* "$(XDOCDIR)"/logic/* "$(XDOCDIR)"/xTAG/* \
|
||||
"$(XDOCDIR)"/rom8k/* "$(XDOCDIR)"/binto7seg/* "$(XDOCDIR)"/rulz-r8c33/* \
|
||||
"$(XDOCDIR)"/rom8k/* "$(XDOCDIR)"/xschem_simulator/ "$(XDOCDIR)"/binto7seg/* "$(XDOCDIR)"/rulz-r8c33/* \
|
||||
"$(XDOCDIR)"/gschem_import/*.sym \
|
||||
"$(XDOCDIR)"/gschem_import/*.sch \
|
||||
"$(XDOCDIR)"/gschem_import/sym/*.sym \
|
||||
|
|
|
|||
|
|
@ -1,16 +1,17 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=delay
|
||||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=delay
|
||||
verilog_format="assign #@delay @@d = @@s ;"
|
||||
vhdl_format=" @@d <= @@s after @delay ns;"
|
||||
format="@name @pinlist 0"
|
||||
template="name=V1 delay=1"
|
||||
}
|
||||
function0="1"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -30 0 30 0 {}
|
||||
L 4 -10 -5 10 0 {}
|
||||
L 4 -10 5 10 0 {}
|
||||
B 5 27.5 -2.5 32.5 2.5 {name=d dir=out verilog_type=wire propagate_to=1}
|
||||
B 5 27.5 -2.5 32.5 2.5 {name=d dir=out verilog_type=wire }
|
||||
B 5 -32.5 -2.5 -27.5 2.5 {name=s dir=in verilog_type=wire propagate_to=0}
|
||||
T {@name @delay} -25 -10 0 0 0.1 0.1 {}
|
||||
|
|
|
|||
|
|
@ -1,11 +1,13 @@
|
|||
v {xschem version=2.9.6 file_version=1.1}
|
||||
G {type=subcircuit
|
||||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
verilog_format="xnor #(@risedel , @falldel ) @name ( @#0 , @#1 , @#2 );"
|
||||
vhdl_format = "@@Z <= @@A xnor @@B after 0.1 ns;"
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1 risedel=400 falldel=300"
|
||||
verilog_primitive=true
|
||||
vhdl_primitive=true
|
||||
function0="1 2 ^ ~"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
|
|
@ -16,8 +18,10 @@ L 4 -40 20 -26.875 20 {}
|
|||
L 4 -25 -30 -5 -30 {}
|
||||
L 4 -25 30 -5 30 {}
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=Z dir=out verilog_type=wire}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in
|
||||
propagate_to=0}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in
|
||||
propagate_to=0}
|
||||
A 4 40 0 5 180 360 {}
|
||||
A 4 -9.642857142857142 17.85714285714286 48.0818286351295 21.80140948635181 62.65738573560834 {}
|
||||
A 4 -4.6875 -11.25 41.25118369513777 269.5659493678606 74.60789655596687 {}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,24 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @@A @VGND @VNB @VPB @VPWR @@Y @prefix\\\\inv_1"
|
||||
template="name=x1 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ "
|
||||
extra="VGND VNB VPB VPWR prefix"
|
||||
highlight=true
|
||||
|
||||
function1="0 ~"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -20 -20 -20 20 {}
|
||||
L 4 -20 -20 20 0 {}
|
||||
L 4 -20 20 20 0 {}
|
||||
L 4 30 0 40 0 {}
|
||||
L 4 -40 0 -20 0 {}
|
||||
B 5 -42.5 -2.5 -37.5 2.5 {name=A dir=in propagate_to=1}
|
||||
B 5 37.5 -2.5 42.5 2.5 {name=Y dir=out }
|
||||
A 4 25 0 5 180 360 {}
|
||||
T {A} -35 -14 0 0 0.2 0.2 {}
|
||||
T {Y} 35 -14 0 1 0.2 0.2 {}
|
||||
T {@name} 2.5 15 0 0 0.2 0.2 {}
|
||||
T {@symname} -7.5 -25 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,614 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
P 4 7 920 -960 110 -960 110 -1040 100 -1040 110 -1080 120 -1040 110 -1040 {}
|
||||
P 4 9 1320 -640 920 -640 920 -460 900 -460 920 -420 940 -460 920 -460 920 -640 1320 -640 {}
|
||||
T {Ctrl-Click here to start a simulation. Xschem will be only partially responsive
|
||||
during simulation.
|
||||
Simulation will terminate automatically after 30 iterations
|
||||
Otherwise go to Simulation ->Force stop tcl scripts} 1390 -700 0 0 2 2 {}
|
||||
T {Clicking an input net and pressing '1', '0' or '2' will set the net to logic state 0,1, X respectively} 960 -1030 0 0 2 2 {}
|
||||
T {9 Flip Flop Linear Feedback Shift Register} 1660 -3840 0 0 3 3 {layer=11}
|
||||
N 480 -1900 480 -1870 { lab=#net1}
|
||||
N 360 -1970 480 -1900 { lab=#net1}
|
||||
N 360 -2000 360 -1970 { lab=#net1}
|
||||
N 480 -2020 480 -1990 { lab=#net2}
|
||||
N 360 -1920 480 -1990 { lab=#net2}
|
||||
N 360 -1920 360 -1910 { lab=#net2}
|
||||
N 530 -1870 560 -1870 { lab=#net1}
|
||||
N 300 -2040 360 -2040 { lab=#net3}
|
||||
N 480 -1380 480 -1350 { lab=#net3}
|
||||
N 360 -1450 480 -1380 { lab=#net3}
|
||||
N 360 -1460 360 -1450 { lab=#net3}
|
||||
N 480 -1500 480 -1470 { lab=#net4}
|
||||
N 360 -1400 480 -1470 { lab=#net4}
|
||||
N 480 -1500 560 -1500 { lab=#net4}
|
||||
N 250 -1500 360 -1500 { lab=CLK}
|
||||
N 710 -1640 710 -1610 { lab=#net5}
|
||||
N 590 -1710 710 -1640 { lab=#net5}
|
||||
N 590 -1740 590 -1710 { lab=#net5}
|
||||
N 710 -1760 710 -1730 { lab=q1}
|
||||
N 590 -1660 710 -1730 { lab=q1}
|
||||
N 590 -1660 590 -1650 { lab=q1}
|
||||
N 710 -1760 770 -1760 { lab=q1}
|
||||
N 250 -1870 360 -1870 { lab=CLK}
|
||||
N 250 -1870 250 -1500 { lab=CLK}
|
||||
N 300 -2040 300 -1460 { lab=#net3}
|
||||
N 300 -1460 360 -1460 { lab=#net3}
|
||||
N 340 -1540 360 -1540 { lab=#net1}
|
||||
N 340 -1600 340 -1540 { lab=#net1}
|
||||
N 340 -1600 530 -1730 { lab=#net1}
|
||||
N 530 -1870 530 -1730 { lab=#net1}
|
||||
N 560 -1780 590 -1780 { lab=#net1}
|
||||
N 560 -1870 560 -1780 { lab=#net1}
|
||||
N 560 -1610 590 -1610 { lab=#net4}
|
||||
N 560 -1610 560 -1500 { lab=#net4}
|
||||
N 590 -1570 590 -1230 { lab=CLEAR_}
|
||||
N 180 -1310 360 -1310 { lab=CLEAR_}
|
||||
N 180 -1310 180 -1230 { lab=CLEAR_}
|
||||
N 180 -1830 180 -1310 { lab=CLEAR_}
|
||||
N 180 -1830 360 -1830 { lab=CLEAR_}
|
||||
N 480 -1870 530 -1870 { lab=#net1}
|
||||
N 120 -1350 360 -1350 { lab=#net6}
|
||||
N 110 -1230 180 -1230 { lab=CLEAR_}
|
||||
N 6630 -1230 6840 -1230 { lab=CLEAR_}
|
||||
N 180 -1230 590 -1230 { lab=CLEAR_}
|
||||
N 6290 -1110 6840 -1110 { lab=CLK}
|
||||
N 250 -1500 250 -1110 { lab=CLK}
|
||||
N 110 -1110 250 -1110 { lab=CLK}
|
||||
N 1140 -1900 1140 -1870 { lab=#net7}
|
||||
N 1020 -1970 1140 -1900 { lab=#net7}
|
||||
N 1020 -2000 1020 -1970 { lab=#net7}
|
||||
N 1140 -2020 1140 -1990 { lab=#net8}
|
||||
N 1020 -1920 1140 -1990 { lab=#net8}
|
||||
N 1020 -1920 1020 -1910 { lab=#net8}
|
||||
N 1190 -1870 1220 -1870 { lab=#net7}
|
||||
N 960 -2040 1020 -2040 { lab=#net9}
|
||||
N 1140 -1380 1140 -1350 { lab=#net9}
|
||||
N 1020 -1450 1140 -1380 { lab=#net9}
|
||||
N 1020 -1460 1020 -1450 { lab=#net9}
|
||||
N 1140 -1500 1140 -1470 { lab=#net10}
|
||||
N 1020 -1400 1140 -1470 { lab=#net10}
|
||||
N 1140 -1500 1220 -1500 { lab=#net10}
|
||||
N 910 -1500 1020 -1500 { lab=CLK}
|
||||
N 1370 -1640 1370 -1610 { lab=#net11}
|
||||
N 1250 -1710 1370 -1640 { lab=#net11}
|
||||
N 1250 -1740 1250 -1710 { lab=#net11}
|
||||
N 1370 -1760 1370 -1730 { lab=q2}
|
||||
N 1250 -1660 1370 -1730 { lab=q2}
|
||||
N 1250 -1660 1250 -1650 { lab=q2}
|
||||
N 1370 -1760 1430 -1760 { lab=q2}
|
||||
N 910 -1870 1020 -1870 { lab=CLK}
|
||||
N 910 -1870 910 -1500 { lab=CLK}
|
||||
N 960 -2040 960 -1460 { lab=#net9}
|
||||
N 960 -1460 1020 -1460 { lab=#net9}
|
||||
N 1000 -1540 1020 -1540 { lab=#net7}
|
||||
N 1000 -1600 1000 -1540 { lab=#net7}
|
||||
N 1000 -1600 1190 -1730 { lab=#net7}
|
||||
N 1190 -1870 1190 -1730 { lab=#net7}
|
||||
N 1220 -1780 1250 -1780 { lab=#net7}
|
||||
N 1220 -1870 1220 -1780 { lab=#net7}
|
||||
N 1220 -1610 1250 -1610 { lab=#net10}
|
||||
N 1220 -1610 1220 -1500 { lab=#net10}
|
||||
N 1250 -1570 1250 -1230 { lab=CLEAR_}
|
||||
N 840 -1310 1020 -1310 { lab=CLEAR_}
|
||||
N 840 -1310 840 -1230 { lab=CLEAR_}
|
||||
N 840 -1830 840 -1310 { lab=CLEAR_}
|
||||
N 840 -1830 1020 -1830 { lab=CLEAR_}
|
||||
N 1140 -1870 1190 -1870 { lab=#net7}
|
||||
N 840 -1230 1250 -1230 { lab=CLEAR_}
|
||||
N 910 -1500 910 -1110 { lab=CLK}
|
||||
N 770 -1760 770 -1350 { lab=q1}
|
||||
N 770 -1350 1020 -1350 { lab=q1}
|
||||
N 590 -1230 840 -1230 { lab=CLEAR_}
|
||||
N 250 -1110 910 -1110 { lab=CLK}
|
||||
N 1800 -1900 1800 -1870 { lab=#net12}
|
||||
N 1680 -1970 1800 -1900 { lab=#net12}
|
||||
N 1680 -2000 1680 -1970 { lab=#net12}
|
||||
N 1800 -2020 1800 -1990 { lab=#net13}
|
||||
N 1680 -1920 1800 -1990 { lab=#net13}
|
||||
N 1680 -1920 1680 -1910 { lab=#net13}
|
||||
N 1850 -1870 1880 -1870 { lab=#net12}
|
||||
N 1620 -2040 1680 -2040 { lab=#net14}
|
||||
N 1800 -1380 1800 -1350 { lab=#net14}
|
||||
N 1680 -1450 1800 -1380 { lab=#net14}
|
||||
N 1680 -1460 1680 -1450 { lab=#net14}
|
||||
N 1800 -1500 1800 -1470 { lab=#net15}
|
||||
N 1680 -1400 1800 -1470 { lab=#net15}
|
||||
N 1800 -1500 1880 -1500 { lab=#net15}
|
||||
N 1570 -1500 1680 -1500 { lab=CLK}
|
||||
N 2030 -1640 2030 -1610 { lab=#net16}
|
||||
N 1910 -1710 2030 -1640 { lab=#net16}
|
||||
N 1910 -1740 1910 -1710 { lab=#net16}
|
||||
N 2030 -1760 2030 -1730 { lab=q3}
|
||||
N 1910 -1660 2030 -1730 { lab=q3}
|
||||
N 1910 -1660 1910 -1650 { lab=q3}
|
||||
N 2030 -1760 2090 -1760 { lab=q3}
|
||||
N 1570 -1870 1680 -1870 { lab=CLK}
|
||||
N 1570 -1870 1570 -1500 { lab=CLK}
|
||||
N 1620 -2040 1620 -1460 { lab=#net14}
|
||||
N 1620 -1460 1680 -1460 { lab=#net14}
|
||||
N 1660 -1540 1680 -1540 { lab=#net12}
|
||||
N 1660 -1600 1660 -1540 { lab=#net12}
|
||||
N 1660 -1600 1850 -1730 { lab=#net12}
|
||||
N 1850 -1870 1850 -1730 { lab=#net12}
|
||||
N 1880 -1780 1910 -1780 { lab=#net12}
|
||||
N 1880 -1870 1880 -1780 { lab=#net12}
|
||||
N 1880 -1610 1910 -1610 { lab=#net15}
|
||||
N 1880 -1610 1880 -1500 { lab=#net15}
|
||||
N 1910 -1570 1910 -1230 { lab=CLEAR_}
|
||||
N 1500 -1310 1680 -1310 { lab=CLEAR_}
|
||||
N 1500 -1310 1500 -1230 { lab=CLEAR_}
|
||||
N 1500 -1830 1500 -1310 { lab=CLEAR_}
|
||||
N 1500 -1830 1680 -1830 { lab=CLEAR_}
|
||||
N 1800 -1870 1850 -1870 { lab=#net12}
|
||||
N 1500 -1230 1910 -1230 { lab=CLEAR_}
|
||||
N 1570 -1500 1570 -1110 { lab=CLK}
|
||||
N 2460 -1900 2460 -1870 { lab=#net17}
|
||||
N 2340 -1970 2460 -1900 { lab=#net17}
|
||||
N 2340 -2000 2340 -1970 { lab=#net17}
|
||||
N 2460 -2020 2460 -1990 { lab=#net18}
|
||||
N 2340 -1920 2460 -1990 { lab=#net18}
|
||||
N 2340 -1920 2340 -1910 { lab=#net18}
|
||||
N 2510 -1870 2540 -1870 { lab=#net17}
|
||||
N 2280 -2040 2340 -2040 { lab=#net19}
|
||||
N 2460 -1380 2460 -1350 { lab=#net19}
|
||||
N 2340 -1450 2460 -1380 { lab=#net19}
|
||||
N 2340 -1460 2340 -1450 { lab=#net19}
|
||||
N 2460 -1500 2460 -1470 { lab=#net20}
|
||||
N 2340 -1400 2460 -1470 { lab=#net20}
|
||||
N 2460 -1500 2540 -1500 { lab=#net20}
|
||||
N 2230 -1500 2340 -1500 { lab=CLK}
|
||||
N 2690 -1640 2690 -1610 { lab=#net21}
|
||||
N 2570 -1710 2690 -1640 { lab=#net21}
|
||||
N 2570 -1740 2570 -1710 { lab=#net21}
|
||||
N 2690 -1760 2690 -1730 { lab=q4}
|
||||
N 2570 -1660 2690 -1730 { lab=q4}
|
||||
N 2570 -1660 2570 -1650 { lab=q4}
|
||||
N 2230 -1870 2340 -1870 { lab=CLK}
|
||||
N 2230 -1870 2230 -1500 { lab=CLK}
|
||||
N 2280 -2040 2280 -1460 { lab=#net19}
|
||||
N 2280 -1460 2340 -1460 { lab=#net19}
|
||||
N 2320 -1540 2340 -1540 { lab=#net17}
|
||||
N 2320 -1600 2320 -1540 { lab=#net17}
|
||||
N 2320 -1600 2510 -1730 { lab=#net17}
|
||||
N 2510 -1870 2510 -1730 { lab=#net17}
|
||||
N 2540 -1780 2570 -1780 { lab=#net17}
|
||||
N 2540 -1870 2540 -1780 { lab=#net17}
|
||||
N 2540 -1610 2570 -1610 { lab=#net20}
|
||||
N 2540 -1610 2540 -1500 { lab=#net20}
|
||||
N 2570 -1570 2570 -1230 { lab=CLEAR_}
|
||||
N 2160 -1310 2340 -1310 { lab=CLEAR_}
|
||||
N 2160 -1310 2160 -1230 { lab=CLEAR_}
|
||||
N 2160 -1830 2160 -1310 { lab=CLEAR_}
|
||||
N 2160 -1830 2340 -1830 { lab=CLEAR_}
|
||||
N 2460 -1870 2510 -1870 { lab=#net17}
|
||||
N 2160 -1230 2570 -1230 { lab=CLEAR_}
|
||||
N 2230 -1500 2230 -1110 { lab=CLK}
|
||||
N 3120 -1900 3120 -1870 { lab=#net22}
|
||||
N 3000 -1970 3120 -1900 { lab=#net22}
|
||||
N 3000 -2000 3000 -1970 { lab=#net22}
|
||||
N 3120 -2020 3120 -1990 { lab=#net23}
|
||||
N 3000 -1920 3120 -1990 { lab=#net23}
|
||||
N 3000 -1920 3000 -1910 { lab=#net23}
|
||||
N 3170 -1870 3200 -1870 { lab=#net22}
|
||||
N 2940 -2040 3000 -2040 { lab=#net24}
|
||||
N 3120 -1380 3120 -1350 { lab=#net24}
|
||||
N 3000 -1450 3120 -1380 { lab=#net24}
|
||||
N 3000 -1460 3000 -1450 { lab=#net24}
|
||||
N 3120 -1500 3120 -1470 { lab=#net25}
|
||||
N 3000 -1400 3120 -1470 { lab=#net25}
|
||||
N 3120 -1500 3200 -1500 { lab=#net25}
|
||||
N 2890 -1500 3000 -1500 { lab=CLK}
|
||||
N 3350 -1640 3350 -1610 { lab=#net26}
|
||||
N 3230 -1710 3350 -1640 { lab=#net26}
|
||||
N 3230 -1740 3230 -1710 { lab=#net26}
|
||||
N 3350 -1760 3350 -1730 { lab=q5}
|
||||
N 3230 -1660 3350 -1730 { lab=q5}
|
||||
N 3230 -1660 3230 -1650 { lab=q5}
|
||||
N 3350 -1760 4130 -1760 { lab=q5}
|
||||
N 2890 -1870 3000 -1870 { lab=CLK}
|
||||
N 2890 -1870 2890 -1500 { lab=CLK}
|
||||
N 2940 -2040 2940 -1460 { lab=#net24}
|
||||
N 2940 -1460 3000 -1460 { lab=#net24}
|
||||
N 2980 -1540 3000 -1540 { lab=#net22}
|
||||
N 2980 -1600 2980 -1540 { lab=#net22}
|
||||
N 2980 -1600 3170 -1730 { lab=#net22}
|
||||
N 3170 -1870 3170 -1730 { lab=#net22}
|
||||
N 3200 -1780 3230 -1780 { lab=#net22}
|
||||
N 3200 -1870 3200 -1780 { lab=#net22}
|
||||
N 3200 -1610 3230 -1610 { lab=#net25}
|
||||
N 3200 -1610 3200 -1500 { lab=#net25}
|
||||
N 3230 -1570 3230 -1230 { lab=CLEAR_}
|
||||
N 2820 -1310 3000 -1310 { lab=CLEAR_}
|
||||
N 2820 -1310 2820 -1230 { lab=CLEAR_}
|
||||
N 2820 -1830 2820 -1310 { lab=CLEAR_}
|
||||
N 2820 -1830 3000 -1830 { lab=CLEAR_}
|
||||
N 3120 -1870 3170 -1870 { lab=#net22}
|
||||
N 2820 -1230 3230 -1230 { lab=CLEAR_}
|
||||
N 2890 -1500 2890 -1110 { lab=CLK}
|
||||
N 4500 -1900 4500 -1870 { lab=#net27}
|
||||
N 4380 -1970 4500 -1900 { lab=#net27}
|
||||
N 4380 -2000 4380 -1970 { lab=#net27}
|
||||
N 4500 -2020 4500 -1990 { lab=#net28}
|
||||
N 4380 -1920 4500 -1990 { lab=#net28}
|
||||
N 4380 -1920 4380 -1910 { lab=#net28}
|
||||
N 4550 -1870 4580 -1870 { lab=#net27}
|
||||
N 4320 -2040 4380 -2040 { lab=#net29}
|
||||
N 4500 -1380 4500 -1350 { lab=#net29}
|
||||
N 4380 -1450 4500 -1380 { lab=#net29}
|
||||
N 4380 -1460 4380 -1450 { lab=#net29}
|
||||
N 4500 -1500 4500 -1470 { lab=#net30}
|
||||
N 4380 -1400 4500 -1470 { lab=#net30}
|
||||
N 4500 -1500 4580 -1500 { lab=#net30}
|
||||
N 4270 -1500 4380 -1500 { lab=CLK}
|
||||
N 4730 -1640 4730 -1610 { lab=#net31}
|
||||
N 4610 -1710 4730 -1640 { lab=#net31}
|
||||
N 4610 -1740 4610 -1710 { lab=#net31}
|
||||
N 4730 -1760 4730 -1730 { lab=q6}
|
||||
N 4610 -1660 4730 -1730 { lab=q6}
|
||||
N 4610 -1660 4610 -1650 { lab=q6}
|
||||
N 4730 -1760 4800 -1760 { lab=q6}
|
||||
N 4270 -1870 4380 -1870 { lab=CLK}
|
||||
N 4270 -1870 4270 -1500 { lab=CLK}
|
||||
N 4320 -2040 4320 -1460 { lab=#net29}
|
||||
N 4320 -1460 4380 -1460 { lab=#net29}
|
||||
N 4360 -1540 4380 -1540 { lab=#net27}
|
||||
N 4360 -1600 4360 -1540 { lab=#net27}
|
||||
N 4360 -1600 4550 -1730 { lab=#net27}
|
||||
N 4550 -1870 4550 -1730 { lab=#net27}
|
||||
N 4580 -1780 4610 -1780 { lab=#net27}
|
||||
N 4580 -1870 4580 -1780 { lab=#net27}
|
||||
N 4580 -1610 4610 -1610 { lab=#net30}
|
||||
N 4580 -1610 4580 -1500 { lab=#net30}
|
||||
N 4610 -1570 4610 -1230 { lab=CLEAR_}
|
||||
N 4200 -1310 4380 -1310 { lab=CLEAR_}
|
||||
N 4200 -1310 4200 -1230 { lab=CLEAR_}
|
||||
N 4200 -1830 4200 -1310 { lab=CLEAR_}
|
||||
N 4200 -1830 4380 -1830 { lab=CLEAR_}
|
||||
N 4500 -1870 4550 -1870 { lab=#net27}
|
||||
N 4200 -1230 4610 -1230 { lab=CLEAR_}
|
||||
N 4270 -1500 4270 -1110 { lab=CLK}
|
||||
N 4130 -1760 4130 -1350 { lab=q5}
|
||||
N 4130 -1350 4380 -1350 { lab=q5}
|
||||
N 5170 -1900 5170 -1870 { lab=#net32}
|
||||
N 5050 -1970 5170 -1900 { lab=#net32}
|
||||
N 5050 -2000 5050 -1970 { lab=#net32}
|
||||
N 5170 -2020 5170 -1990 { lab=#net33}
|
||||
N 5050 -1920 5170 -1990 { lab=#net33}
|
||||
N 5050 -1920 5050 -1910 { lab=#net33}
|
||||
N 5220 -1870 5250 -1870 { lab=#net32}
|
||||
N 4990 -2040 5050 -2040 { lab=#net34}
|
||||
N 5170 -1380 5170 -1350 { lab=#net34}
|
||||
N 5050 -1450 5170 -1380 { lab=#net34}
|
||||
N 5050 -1460 5050 -1450 { lab=#net34}
|
||||
N 5170 -1500 5170 -1470 { lab=#net35}
|
||||
N 5050 -1400 5170 -1470 { lab=#net35}
|
||||
N 5170 -1500 5250 -1500 { lab=#net35}
|
||||
N 4940 -1500 5050 -1500 { lab=CLK}
|
||||
N 5400 -1640 5400 -1610 { lab=#net36}
|
||||
N 5280 -1710 5400 -1640 { lab=#net36}
|
||||
N 5280 -1740 5280 -1710 { lab=#net36}
|
||||
N 5400 -1760 5400 -1730 { lab=q7}
|
||||
N 5280 -1660 5400 -1730 { lab=q7}
|
||||
N 5280 -1660 5280 -1650 { lab=q7}
|
||||
N 5400 -1760 5470 -1760 { lab=q7}
|
||||
N 4940 -1870 5050 -1870 { lab=CLK}
|
||||
N 4940 -1870 4940 -1500 { lab=CLK}
|
||||
N 4990 -2040 4990 -1460 { lab=#net34}
|
||||
N 4990 -1460 5050 -1460 { lab=#net34}
|
||||
N 5030 -1540 5050 -1540 { lab=#net32}
|
||||
N 5030 -1600 5030 -1540 { lab=#net32}
|
||||
N 5030 -1600 5220 -1730 { lab=#net32}
|
||||
N 5220 -1870 5220 -1730 { lab=#net32}
|
||||
N 5250 -1780 5280 -1780 { lab=#net32}
|
||||
N 5250 -1870 5250 -1780 { lab=#net32}
|
||||
N 5250 -1610 5280 -1610 { lab=#net35}
|
||||
N 5250 -1610 5250 -1500 { lab=#net35}
|
||||
N 5280 -1570 5280 -1230 { lab=CLEAR_}
|
||||
N 4870 -1310 5050 -1310 { lab=CLEAR_}
|
||||
N 4870 -1310 4870 -1230 { lab=CLEAR_}
|
||||
N 4870 -1830 4870 -1310 { lab=CLEAR_}
|
||||
N 4870 -1830 5050 -1830 { lab=CLEAR_}
|
||||
N 5170 -1870 5220 -1870 { lab=#net32}
|
||||
N 4870 -1230 5280 -1230 { lab=CLEAR_}
|
||||
N 4940 -1500 4940 -1110 { lab=CLK}
|
||||
N 5840 -1900 5840 -1870 { lab=#net37}
|
||||
N 5720 -1970 5840 -1900 { lab=#net37}
|
||||
N 5720 -2000 5720 -1970 { lab=#net37}
|
||||
N 5840 -2020 5840 -1990 { lab=#net38}
|
||||
N 5720 -1920 5840 -1990 { lab=#net38}
|
||||
N 5720 -1920 5720 -1910 { lab=#net38}
|
||||
N 5890 -1870 5920 -1870 { lab=#net37}
|
||||
N 5660 -2040 5720 -2040 { lab=#net39}
|
||||
N 5840 -1380 5840 -1350 { lab=#net39}
|
||||
N 5720 -1450 5840 -1380 { lab=#net39}
|
||||
N 5720 -1460 5720 -1450 { lab=#net39}
|
||||
N 5840 -1500 5840 -1470 { lab=#net40}
|
||||
N 5720 -1400 5840 -1470 { lab=#net40}
|
||||
N 5840 -1500 5920 -1500 { lab=#net40}
|
||||
N 5610 -1500 5720 -1500 { lab=CLK}
|
||||
N 6070 -1640 6070 -1610 { lab=#net41}
|
||||
N 5950 -1710 6070 -1640 { lab=#net41}
|
||||
N 5950 -1740 5950 -1710 { lab=#net41}
|
||||
N 6070 -1760 6070 -1730 { lab=q8}
|
||||
N 5950 -1660 6070 -1730 { lab=q8}
|
||||
N 5950 -1660 5950 -1650 { lab=q8}
|
||||
N 5610 -1870 5720 -1870 { lab=CLK}
|
||||
N 5610 -1870 5610 -1500 { lab=CLK}
|
||||
N 5660 -2040 5660 -1460 { lab=#net39}
|
||||
N 5660 -1460 5720 -1460 { lab=#net39}
|
||||
N 5700 -1540 5720 -1540 { lab=#net37}
|
||||
N 5700 -1600 5700 -1540 { lab=#net37}
|
||||
N 5700 -1600 5890 -1730 { lab=#net37}
|
||||
N 5890 -1870 5890 -1730 { lab=#net37}
|
||||
N 5920 -1780 5950 -1780 { lab=#net37}
|
||||
N 5920 -1870 5920 -1780 { lab=#net37}
|
||||
N 5920 -1610 5950 -1610 { lab=#net40}
|
||||
N 5920 -1610 5920 -1500 { lab=#net40}
|
||||
N 5950 -1570 5950 -1230 { lab=CLEAR_}
|
||||
N 5540 -1310 5720 -1310 { lab=CLEAR_}
|
||||
N 5540 -1310 5540 -1230 { lab=CLEAR_}
|
||||
N 5540 -1830 5540 -1310 { lab=CLEAR_}
|
||||
N 5540 -1830 5720 -1830 { lab=CLEAR_}
|
||||
N 5840 -1870 5890 -1870 { lab=#net37}
|
||||
N 5540 -1230 5950 -1230 { lab=CLEAR_}
|
||||
N 5610 -1500 5610 -1110 { lab=CLK}
|
||||
N 6520 -1900 6520 -1870 { lab=#net42}
|
||||
N 6400 -1970 6520 -1900 { lab=#net42}
|
||||
N 6400 -2000 6400 -1970 { lab=#net42}
|
||||
N 6520 -2020 6520 -1990 { lab=#net43}
|
||||
N 6400 -1920 6520 -1990 { lab=#net43}
|
||||
N 6400 -1920 6400 -1910 { lab=#net43}
|
||||
N 6570 -1870 6600 -1870 { lab=#net42}
|
||||
N 6340 -2040 6400 -2040 { lab=#net44}
|
||||
N 6520 -1380 6520 -1350 { lab=#net44}
|
||||
N 6400 -1450 6520 -1380 { lab=#net44}
|
||||
N 6400 -1460 6400 -1450 { lab=#net44}
|
||||
N 6520 -1500 6520 -1470 { lab=#net45}
|
||||
N 6400 -1400 6520 -1470 { lab=#net45}
|
||||
N 6520 -1500 6600 -1500 { lab=#net45}
|
||||
N 6290 -1500 6400 -1500 { lab=CLK}
|
||||
N 6750 -1640 6750 -1610 { lab=#net46}
|
||||
N 6630 -1710 6750 -1640 { lab=#net46}
|
||||
N 6630 -1740 6630 -1710 { lab=#net46}
|
||||
N 6750 -1760 6750 -1730 { lab=q9}
|
||||
N 6630 -1660 6750 -1730 { lab=q9}
|
||||
N 6630 -1660 6630 -1650 { lab=q9}
|
||||
N 6760 -1760 6770 -1760 { lab=q9}
|
||||
N 6290 -1870 6400 -1870 { lab=CLK}
|
||||
N 6290 -1870 6290 -1500 { lab=CLK}
|
||||
N 6340 -2040 6340 -1460 { lab=#net44}
|
||||
N 6340 -1460 6400 -1460 { lab=#net44}
|
||||
N 6380 -1540 6400 -1540 { lab=#net42}
|
||||
N 6380 -1600 6380 -1540 { lab=#net42}
|
||||
N 6380 -1600 6570 -1730 { lab=#net42}
|
||||
N 6570 -1870 6570 -1730 { lab=#net42}
|
||||
N 6600 -1780 6630 -1780 { lab=#net42}
|
||||
N 6600 -1870 6600 -1780 { lab=#net42}
|
||||
N 6600 -1610 6630 -1610 { lab=#net45}
|
||||
N 6600 -1610 6600 -1500 { lab=#net45}
|
||||
N 6630 -1570 6630 -1230 { lab=CLEAR_}
|
||||
N 6220 -1310 6400 -1310 { lab=CLEAR_}
|
||||
N 6220 -1310 6220 -1230 { lab=CLEAR_}
|
||||
N 6220 -1830 6220 -1310 { lab=CLEAR_}
|
||||
N 6220 -1830 6400 -1830 { lab=CLEAR_}
|
||||
N 6520 -1870 6570 -1870 { lab=#net42}
|
||||
N 6730 -1760 6750 -1760 { lab=q9}
|
||||
N 6220 -1230 6630 -1230 { lab=CLEAR_}
|
||||
N 6290 -1500 6290 -1110 { lab=CLK}
|
||||
N 1430 -1760 1430 -1350 { lab=q2}
|
||||
N 1430 -1350 1680 -1350 { lab=q2}
|
||||
N 2090 -1760 2090 -1350 { lab=q3}
|
||||
N 2090 -1350 2340 -1350 { lab=q3}
|
||||
N 2760 -1760 2760 -1350 { lab=q4}
|
||||
N 2760 -1350 3000 -1350 { lab=q4}
|
||||
N 1250 -1230 1500 -1230 { lab=CLEAR_}
|
||||
N 910 -1110 1570 -1110 { lab=CLK}
|
||||
N 1910 -1230 2160 -1230 { lab=CLEAR_}
|
||||
N 1570 -1110 2230 -1110 { lab=CLK}
|
||||
N 2570 -1230 2820 -1230 { lab=CLEAR_}
|
||||
N 2230 -1110 2890 -1110 { lab=CLK}
|
||||
N 3230 -1230 4200 -1230 { lab=CLEAR_}
|
||||
N 2890 -1110 4270 -1110 { lab=CLK}
|
||||
N 4610 -1230 4870 -1230 { lab=CLEAR_}
|
||||
N 4270 -1110 4940 -1110 { lab=CLK}
|
||||
N 5280 -1230 5540 -1230 { lab=CLEAR_}
|
||||
N 4940 -1110 5610 -1110 { lab=CLK}
|
||||
N 5950 -1230 6220 -1230 { lab=CLEAR_}
|
||||
N 5610 -1110 6290 -1110 { lab=CLK}
|
||||
N 2690 -1760 2760 -1760 { lab=q4}
|
||||
N 4800 -1760 4800 -1350 { lab=q6}
|
||||
N 4800 -1350 5050 -1350 { lab=q6}
|
||||
N 5470 -1760 5470 -1350 { lab=q7}
|
||||
N 5470 -1350 5720 -1350 { lab=q7}
|
||||
N 6150 -1760 6150 -1350 { lab=q8}
|
||||
N 6150 -1350 6400 -1350 { lab=q8}
|
||||
N 6130 -1760 6150 -1760 { lab=q8}
|
||||
N 360 -1400 360 -1390 { lab=#net4}
|
||||
N 1020 -1400 1020 -1390 { lab=#net10}
|
||||
N 1680 -1400 1680 -1390 { lab=#net15}
|
||||
N 2340 -1400 2340 -1390 { lab=#net20}
|
||||
N 3000 -1400 3000 -1390 { lab=#net25}
|
||||
N 4380 -1400 4380 -1390 { lab=#net30}
|
||||
N 5050 -1400 5050 -1390 { lab=#net35}
|
||||
N 5720 -1400 5720 -1390 { lab=#net40}
|
||||
N 6400 -1400 6400 -1390 { lab=#net45}
|
||||
N 180 -3380 180 -2420 { lab=q1}
|
||||
N 180 -3380 420 -2980 { lab=q1}
|
||||
N 420 -2980 660 -3380 { lab=q1}
|
||||
N 660 -3380 660 -2420 { lab=q1}
|
||||
N 840 -2900 840 -2420 { lab=q2}
|
||||
N 1500 -2900 1500 -2420 { lab=q3}
|
||||
N 4860 -3380 4860 -2420 { lab=q7}
|
||||
N 4860 -3380 5100 -2980 { lab=q7}
|
||||
N 5100 -2980 5340 -3380 { lab=q7}
|
||||
N 5340 -3380 5340 -2420 { lab=q7}
|
||||
N 5520 -2700 5520 -2420 { lab=q8}
|
||||
N 6000 -2700 6000 -2420 { lab=q8}
|
||||
N 2820 -3380 3060 -2880 { lab=q5}
|
||||
N 3060 -2880 3300 -3380 { lab=q5}
|
||||
N 840 -3380 1320 -3380 { lab=q2}
|
||||
N 840 -2900 1200 -2900 { lab=q2}
|
||||
N 840 -2420 1320 -2420 { lab=q2}
|
||||
N 1500 -3380 1820 -3380 { lab=q3}
|
||||
N 1820 -3380 1920 -3300 { lab=q3}
|
||||
N 1920 -3300 1980 -3220 { lab=q3}
|
||||
N 1980 -3220 1980 -3060 { lab=q3}
|
||||
N 1820 -2900 1920 -2980 { lab=q3}
|
||||
N 1920 -2980 1980 -3060 { lab=q3}
|
||||
N 1700 -2900 1820 -2900 { lab=q3}
|
||||
N 1700 -2900 1980 -2420 { lab=q3}
|
||||
N 2160 -2900 2160 -2420 { lab=q4}
|
||||
N 2160 -3380 2480 -3380 { lab=q4}
|
||||
N 2480 -3380 2580 -3300 { lab=q4}
|
||||
N 2580 -3300 2640 -3220 { lab=q4}
|
||||
N 2640 -3220 2640 -3060 { lab=q4}
|
||||
N 2480 -2900 2580 -2980 { lab=q4}
|
||||
N 2580 -2980 2640 -3060 { lab=q4}
|
||||
N 2360 -2900 2480 -2900 { lab=q4}
|
||||
N 2360 -2900 2640 -2420 { lab=q4}
|
||||
N 3060 -2880 3060 -2420 { lab=q5}
|
||||
N 4440 -2900 4680 -2420 { lab=q6}
|
||||
N 5520 -3080 5680 -3380 { lab=q8}
|
||||
N 5680 -3380 5840 -3380 { lab=q8}
|
||||
N 5840 -3380 6000 -3080 { lab=q8}
|
||||
N 5520 -2700 6000 -2700 { lab=q8}
|
||||
N 6560 -3380 6660 -3280 { lab=q9}
|
||||
N 6280 -3380 6560 -3380 { lab=q9}
|
||||
N 6180 -3280 6280 -3380 { lab=q9}
|
||||
N 6280 -2900 6560 -2900 { lab=q9}
|
||||
N 6180 -3000 6280 -2900 { lab=q9}
|
||||
N 6180 -3280 6180 -3000 { lab=q9}
|
||||
N 6560 -2900 6660 -2800 { lab=q9}
|
||||
N 6660 -2800 6660 -2520 { lab=q9}
|
||||
N 6560 -2420 6660 -2520 { lab=q9}
|
||||
N 6280 -2420 6560 -2420 { lab=q9}
|
||||
N 6180 -2520 6280 -2420 { lab=q9}
|
||||
N 4440 -2900 4680 -3380 { lab=q6}
|
||||
N 4200 -2420 4440 -2900 { lab=q6}
|
||||
N 5990 -2250 6760 -2250 { lab=q9}
|
||||
N 6760 -2250 6760 -1760 { lab=q9}
|
||||
N 6130 -2210 6130 -1760 { lab=q8}
|
||||
N 5990 -2210 6130 -2210 { lab=q8}
|
||||
N 120 -2230 5220 -2230 { lab=#net6}
|
||||
N 120 -2230 120 -1350 { lab=#net6}
|
||||
N 840 -3380 840 -2900 { lab=q2}
|
||||
N 1500 -3380 1500 -2900 { lab=q3}
|
||||
N 1500 -2900 1700 -2900 { lab=q3}
|
||||
N 2160 -3380 2160 -2900 { lab=q4}
|
||||
N 2160 -2900 2360 -2900 { lab=q4}
|
||||
N 5520 -3080 5520 -2700 { lab=q8}
|
||||
N 6000 -3080 6000 -2700 { lab=q8}
|
||||
N 4200 -3380 4440 -2900 { lab=q6}
|
||||
N 6750 -1760 6760 -1760 { lab=q9}
|
||||
N 6070 -1760 6130 -1760 { lab=q8}
|
||||
N 5300 -2230 5870 -2230 { lab=#net47}
|
||||
C {nand2_1.sym} 420 -2020 0 0 {name=x45 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 650 -1760 0 0 {name=x49 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 420 -1870 0 0 {name=x51 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {ipin.sym} 110 -1110 0 0 {name=p8 lab=CLK}
|
||||
C {nand3_1.sym} 420 -1500 0 0 {name=x46 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 650 -1610 0 0 {name=x50 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {ipin.sym} 110 -1230 0 0 {name=p11 lab=CLEAR_}
|
||||
C {nand3_1.sym} 420 -1350 0 0 {name=x48 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 1080 -2020 0 0 {name=x47 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 1310 -1760 0 0 {name=x52 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 1080 -1870 0 0 {name=x53 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 1080 -1500 0 0 {name=x54 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 1310 -1610 0 0 {name=x55 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 1080 -1350 0 0 {name=x56 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 1740 -2020 0 0 {name=x57 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 1970 -1760 0 0 {name=x58 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 1740 -1870 0 0 {name=x59 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 1740 -1500 0 0 {name=x60 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 1970 -1610 0 0 {name=x61 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 1740 -1350 0 0 {name=x62 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 2400 -2020 0 0 {name=x63 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 2630 -1760 0 0 {name=x64 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 2400 -1870 0 0 {name=x65 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 2400 -1500 0 0 {name=x66 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 2630 -1610 0 0 {name=x67 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 2400 -1350 0 0 {name=x68 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 3060 -2020 0 0 {name=x69 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 3290 -1760 0 0 {name=x70 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 3060 -1870 0 0 {name=x71 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 3060 -1500 0 0 {name=x72 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 3290 -1610 0 0 {name=x73 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 3060 -1350 0 0 {name=x74 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 4440 -2020 0 0 {name=x75 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 4670 -1760 0 0 {name=x76 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 4440 -1870 0 0 {name=x77 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 4440 -1500 0 0 {name=x78 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 4670 -1610 0 0 {name=x79 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 4440 -1350 0 0 {name=x80 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 5110 -2020 0 0 {name=x81 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 5340 -1760 0 0 {name=x82 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 5110 -1870 0 0 {name=x83 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 5110 -1500 0 0 {name=x84 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 5340 -1610 0 0 {name=x85 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 5110 -1350 0 0 {name=x86 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 5780 -2020 0 0 {name=x87 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 6010 -1760 0 0 {name=x88 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 5780 -1870 0 0 {name=x89 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 5780 -1500 0 0 {name=x90 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 6010 -1610 0 0 {name=x91 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 5780 -1350 0 0 {name=x92 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 6460 -2020 0 0 {name=x93 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand2_1.sym} 6690 -1760 0 0 {name=x94 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 6460 -1870 0 0 {name=x95 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 6460 -1500 0 0 {name=x96 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 6690 -1610 0 0 {name=x97 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {nand3_1.sym} 6460 -1350 0 0 {name=x98 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {lab_pin.sym} 180 -2420 0 0 {name=l2 sig_type=std_logic lab=q1}
|
||||
C {lab_pin.sym} 840 -2420 0 0 {name=l3 sig_type=std_logic lab=q2}
|
||||
C {lab_pin.sym} 1500 -2420 0 0 {name=l4 sig_type=std_logic lab=q3}
|
||||
C {lab_pin.sym} 2160 -2420 0 0 {name=l5 sig_type=std_logic lab=q4}
|
||||
C {lab_pin.sym} 3060 -2420 0 0 {name=l6 sig_type=std_logic lab=q5}
|
||||
C {lab_pin.sym} 4200 -2420 0 0 {name=l7 sig_type=std_logic lab=q6}
|
||||
C {lab_pin.sym} 4860 -2420 0 0 {name=l8 sig_type=std_logic lab=q7}
|
||||
C {lab_pin.sym} 5520 -2420 0 0 {name=l9 sig_type=std_logic lab=q8}
|
||||
C {lab_pin.sym} 6280 -2420 0 0 {name=l28 sig_type=std_logic lab=q9}
|
||||
C {lab_pin.sym} 770 -1760 0 1 {name=l29 sig_type=std_logic lab=q1}
|
||||
C {lab_pin.sym} 1430 -1760 0 1 {name=l30 sig_type=std_logic lab=q2}
|
||||
C {lab_pin.sym} 2090 -1760 0 1 {name=l31 sig_type=std_logic lab=q3}
|
||||
C {lab_pin.sym} 2760 -1760 0 1 {name=l32 sig_type=std_logic lab=q4}
|
||||
C {lab_pin.sym} 4130 -1760 0 1 {name=l33 sig_type=std_logic lab=q5}
|
||||
C {lab_pin.sym} 4800 -1760 0 1 {name=l34 sig_type=std_logic lab=q6}
|
||||
C {lab_pin.sym} 5470 -1760 0 1 {name=l35 sig_type=std_logic lab=q7}
|
||||
C {lab_pin.sym} 6150 -1760 0 1 {name=l36 sig_type=std_logic lab=q8}
|
||||
C {lab_pin.sym} 6770 -1760 0 1 {name=l37 sig_type=std_logic lab=q9}
|
||||
C {xor2_1.sym} 5930 -2230 0 1 {name=x99 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
|
||||
C {inv_2.sym} 5260 -2230 2 0 {name=x100 VGND=GND VNB=GND VPB=VCC VPWR=VCC prefix=sky130_fd_sc_hd__ }
|
||||
C {title.sym} 240 -50 0 0 {name=l38 author="Stefan Schippers"}
|
||||
C {launcher.sym} 960 -370 0 0 {name=h3
|
||||
descr="START SIMULATION"
|
||||
comment="
|
||||
This launcher Starts a simple interactive simulation of the LFSR
|
||||
"
|
||||
tclcommand=" set count 0
|
||||
xschem select instance p11 ;# CLEAR
|
||||
xschem select instance p8 ;# CLOCK
|
||||
xschem logic_set 0 ;# reset pulse (active low)
|
||||
update ;# allow event loop to come in (update screen, user input etc)
|
||||
after 1000
|
||||
xschem select instance p8 clear ;# release CLOCK
|
||||
xschem logic_set 1
|
||||
xschem select instance p11 clear ;# release CLEAR
|
||||
xschem select instance p8
|
||||
update ;# allow event loop to come in (update screen, user input etc)
|
||||
after 1000
|
||||
set logic_value 0
|
||||
while \{1\} \{
|
||||
update ;# allow event loop to come in (update screen, user input etc)
|
||||
incr count
|
||||
after 500
|
||||
if \{$count==30 || $tclstop == 1\} break
|
||||
xschem logic_set $logic_value
|
||||
set logic_value [expr !$logic_value]
|
||||
\}
|
||||
"
|
||||
}
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @@A @@B @VGND @VNB @VPB @VPWR @@Y @prefix\\\\nand2_1"
|
||||
template="name=x1 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ "
|
||||
extra="VGND VNB VPB VPWR prefix"
|
||||
highlight=true
|
||||
function2="0 1 & ~"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -60 -20 -30 -20 {}
|
||||
L 4 -60 20 -30 20 {}
|
||||
L 4 -30 -30 -30 30 {}
|
||||
L 4 -30 30 5 30 {}
|
||||
L 4 -30 -30 5 -30 {}
|
||||
L 4 45 0 60 0 {}
|
||||
B 5 -62.5 -22.5 -57.5 -17.5 {name=A dir=in propagate_to=2 }
|
||||
B 5 -62.5 17.5 -57.5 22.5 {name=B dir=in propagate_to=2 }
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out }
|
||||
A 4 5 0 30 270 180 {}
|
||||
A 4 40 0 5 0 360 {}
|
||||
T {@name} -28.75 -5 0 0 0.2 0.2 {}
|
||||
T {@symname} -25 -45 0 0 0.2 0.2 {}
|
||||
T {A} -55 -34 0 0 0.2 0.2 {}
|
||||
T {B} -55 6 0 0 0.2 0.2 {}
|
||||
T {Y} 55 -14 0 1 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @@A @@B @@C @VGND @VNB @VPB @VPWR @@Y @prefix\\\\nand3_1"
|
||||
template="name=x1 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ "
|
||||
extra="VGND VNB VPB VPWR prefix"
|
||||
highlight=true
|
||||
function3="0 1 2 & & ~"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -60 -40 -40 -40 {}
|
||||
L 4 -60 0 -30 0 {}
|
||||
L 4 -30 -30 -30 30 {}
|
||||
L 4 -30 30 5 30 {}
|
||||
L 4 -30 -30 5 -30 {}
|
||||
L 4 45 0 60 0 {}
|
||||
L 4 -60 40 -40 40 {}
|
||||
L 4 -40 20 -40 40 {}
|
||||
L 4 -40 20 -30 20 {}
|
||||
L 4 -40 -40 -40 -20 {}
|
||||
L 4 -40 -20 -30 -20 {}
|
||||
B 5 -62.5 -42.5 -57.5 -37.5 {name=A dir=in propagate_to=3 }
|
||||
B 5 -62.5 -2.5 -57.5 2.5 {name=B dir=in propagate_to=3 }
|
||||
B 5 -62.5 37.5 -57.5 42.5 {name=C dir=in propagate_to=3 }
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=Y dir=out }
|
||||
A 4 5 0 30 270 180 {}
|
||||
A 4 40 0 5 0 360 {}
|
||||
T {@name} -28.75 -5 0 0 0.2 0.2 {}
|
||||
T {@symname} -25 -45 0 0 0.2 0.2 {}
|
||||
T {A} -55 -54 0 0 0.2 0.2 {}
|
||||
T {B} -55 -14 0 0 0.2 0.2 {}
|
||||
T {Y} 55 -14 0 1 0.2 0.2 {}
|
||||
T {C} -55 26 0 0 0.2 0.2 {}
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
v {xschem version=2.9.9 file_version=1.2 }
|
||||
G {}
|
||||
K {type=primitive
|
||||
format="@name @@A @@B @VGND @VNB @VPB @VPWR @@X @prefix\\\\xor2_1"
|
||||
template="name=x1 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ "
|
||||
extra="VGND VNB VPB VPWR prefix"
|
||||
highlight=true
|
||||
function2="0 1 ^"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -60 -20 -35 -20 {}
|
||||
L 4 -60 20 -35 20 {}
|
||||
L 4 35 0 60 0 {}
|
||||
L 4 -30 -30 -15 -30 {}
|
||||
L 4 -30 30 -15 30 {}
|
||||
B 5 -62.5 -22.5 -57.5 -17.5 {name=A dir=in propagate_to=2
|
||||
function2="0 1 ^"}
|
||||
B 5 -62.5 17.5 -57.5 22.5 {name=B dir=in propagate_to=2 }
|
||||
B 5 57.5 -2.5 62.5 2.5 {name=X dir=out }
|
||||
A 4 -77.5 0 56.18051263561058 327.7243556854224 64.55128862915524 {}
|
||||
A 4 -21.07142857142857 36.78571428571428 67.06112046149408 33.26691584358777 51.53865524867743 {}
|
||||
A 4 -21.07142857142857 -36.78571428571428 67.06112046149408 275.1944289077348 51.53865524867743 {}
|
||||
A 4 -87.5 0 56.18051263561058 327.7243556854224 64.55128862915524 {}
|
||||
T {A} -55 -34 0 0 0.2 0.2 {}
|
||||
T {B} -55 6 0 0 0.2 0.2 {}
|
||||
T {X} 55 -14 0 1 0.2 0.2 {}
|
||||
T {@name} -16.25 -5 0 0 0.2 0.2 {}
|
||||
T {@symname} -25 -45 0 0 0.2 0.2 {}
|
||||
Loading…
Reference in New Issue