allow tEDAx (flattened) netlisting of hierarchical schematics; added pcb/hierarchical_tedax example
This commit is contained in:
Stefan Frederik
parent
7d2875649f
commit
9c5739b0f2
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@ -11,7 +11,7 @@ put /local/src {
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# list all files that need to be installed in "$(XSHAREDIR)"
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put /local/install_shares {
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keys.help xschem.help xschem.tcl break.awk convert_to_verilog2001.awk
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flatten.awk make_sym.awk symgen.awk order_labels.awk sort_labels.awk spice.awk
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flatten.awk flatten_tedax.awk make_sym.awk symgen.awk order_labels.awk sort_labels.awk spice.awk
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tedax.awk verilog.awk vhdl.awk hspice_backannotate.tcl change_index.tcl resources.tcl
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xschemrc ngspice_backannotate.tcl rawtovcd gschemtoxschem.awk
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}
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@ -0,0 +1,107 @@
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#!/usr/bin/awk -f
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BEGIN{
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first = 1
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hier = 0
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debug = 0
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hiersep="."
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}
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/^begin netlist/{
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cell = $4
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if(first) {
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topcell=cell
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first = 0
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}
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start[cell] = NR
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}
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/^end netlist/{
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end[cell] = NR
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}
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/^__GLOBAL__/{
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global[$2] = 1
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}
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/^__HIERSEP__/{
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hiersep = $2
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}
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{
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netlist[NR] = $0
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}
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END{
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print "tEDAx v1"
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print "begin netlist v1 " topcell
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expand(topcell, "", "", "")
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print "end netlist"
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}
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function expand(cell, instname, path, maplist, i, j, subpos, subcell, subinst, submaplist)
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{
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hier++
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for(i = start[cell]+1; i <= end[cell]-1; i++) {
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$0 = netlist[i]
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# __subcircuit__ pcb_voltage_protection x0
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# __map__ VOUT -> VOUTXX
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# __map__ ... -> ...
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if($1 == "__subcircuit__") {
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subcell=$2
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subinst=$3
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subpos = i
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sub(/__subcircuit__/, "subcircuit", $0)
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print spaces(hier * 2) "#" $0
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for(i++; ;i++) {
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$0 = netlist[i]
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if($1 != "__map__") break
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dbg("expand: $4=" $4)
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$4 = resolve_node($4, path, maplist)
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submaplist = submaplist " " $2 " " $4
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sub(/__map__/, "map", $0)
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print spaces(hier * 2) "#" $0
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}
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expand(subcell, subinst, path subinst hiersep, submaplist)
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}
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if($1 == "conn") {
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dbg("conn: $2=" $2)
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$2 = resolve_node($2, path, maplist) #net name
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$3 = path $3 #refdes
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}
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if($1 ~/^(device|footprint|value|spiceval|spicedev|comptag|pinname|pinslot|pinidx)$/) {
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$2 = path $2 #refdes
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}
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print spaces(hier * 2) $0
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if($0 ~ /^end netlist/) break
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}
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hier--
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}
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function spaces(n, s)
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{
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n = (n > 0) ? n - 1 : 0
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s =" "
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while(length(s) < n) s = s s
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return substr(s,1,n)
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}
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function dbg(s)
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{
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if(debug) print s > "/dev/stderr"
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}
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function resolve_node(node, path, maplist, arr, n, retnode, i)
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{
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dbg("resolve_node: node=" node " maplist=" maplist)
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n = split(maplist, arr)
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if(node in global) retnode = node
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else for(i = 1; i <= n; i += 2) {
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if(node == arr[i]) {
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retnode = arr[i+1]
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break
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}
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}
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if(retnode =="") retnode = path node
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return retnode
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}
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@ -202,6 +202,7 @@ int do_waves=0;
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int netlist_count=0; /* netlist counter incremented at any cell being netlisted */
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int top_subckt = 0;
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int spiceprefix = 1;
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char hiersep[20]=".";
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int netlist_show=0;
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int flat_netlist=0;
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int netlist_type=-1;
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@ -400,6 +400,11 @@ void netlist_options(int i)
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/* fprintf(errfp, "netlist_options(): prop_ptr=%s\n", xctx->inst[i].prop_ptr); */
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if(!strcmp(str, "false")) spiceprefix = 0;
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}
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str = get_tok_value(xctx->inst[i].prop_ptr, "hiersep", 0);
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if(str[0]) {
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my_snprintf(hiersep, S(hiersep), "%s", str);
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}
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}
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/* used only for debug */
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@ -587,6 +592,7 @@ int record_global_node(int what, FILE *fp, char *node)
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} else if(what == 0 || what == 2) {
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for(i=0;i<max_globals;i++) {
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if(what == 0 && netlist_type == CAD_SPICE_NETLIST) fprintf(fp, ".GLOBAL %s\n", globals[i]);
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if(what == 0 && netlist_type == CAD_TEDAX_NETLIST) fprintf(fp, "__GLOBAL__ %s\n", globals[i]);
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my_free(829, &globals[i]);
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}
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my_free(830, &globals);
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@ -672,6 +678,7 @@ void prepare_netlist_structs(int for_netlist)
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strcmp(type, "architecture") &&
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strcmp(type, "arch_declarations") &&
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strcmp(type, "attributes") &&
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strcmp(type, "netlist_options") &&
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strcmp(type, "use")) {
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my_snprintf(str, S(str), "instance: %d (%s): no name attribute set", i, inst[i].name);
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statusmsg(str,2);
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@ -52,6 +52,7 @@ void global_spice_netlist(int global) /* netlister driver */
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top_subckt = 0;
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spiceprefix=1;
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bus_replacement_char[0] = bus_replacement_char[1] = '\0';
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hiersep[0]='.'; hiersep[1]='\0';
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str_tmp = tclgetvar("bus_replacement_char");
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if(str_tmp && str_tmp[0] && str_tmp[1]) {
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bus_replacement_char[0] = str_tmp[0];
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@ -349,14 +350,11 @@ void spice_block_netlist(FILE *fd, int i)
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spice_netlist(fd, spice_stop); /* 20111113 added spice_stop */
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netlist_count++;
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if(xctx->schprop && xctx->schprop[0]) {
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fprintf(fd,"**** begin user architecture code\n");
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fprintf(fd, "%s\n", xctx->schprop);
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fprintf(fd,"**** end user architecture code\n");
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}
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/* /20100217 */
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fprintf(fd, ".ends\n\n");
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if(split_files) {
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fclose(fd);
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@ -368,61 +366,60 @@ void spice_block_netlist(FILE *fd, int i)
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void spice_netlist(FILE *fd, int spice_stop )
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{
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int i;
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char *type=NULL;
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prepared_netlist_structs = 0;
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prepare_netlist_structs(1);
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/* set_modify(1); */ /* 20160302 prepare_netlist_structs could change schematic (wire node naming for example) */
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traverse_node_hash(); /* print all warnings about unconnected floatings etc */
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if(!spice_stop) {
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for(i=0;i<xctx->instances;i++) /* print first ipin/opin defs ... */
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{
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if( strcmp(get_tok_value(xctx->inst[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue;
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if(xctx->inst[i].ptr<0) continue;
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if(!strcmp(get_tok_value( (xctx->inst[i].ptr+ xctx->sym)->prop_ptr, "spice_ignore",0 ), "true") ) {
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continue;
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int i;
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char *type=NULL;
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prepared_netlist_structs = 0;
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prepare_netlist_structs(1);
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/* set_modify(1); */ /* 20160302 prepare_netlist_structs could change schematic (wire node naming for example) */
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traverse_node_hash(); /* print all warnings about unconnected floatings etc */
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if(!spice_stop) {
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for(i=0;i<xctx->instances;i++) /* print first ipin/opin defs ... */
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{
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if( strcmp(get_tok_value(xctx->inst[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue;
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if(xctx->inst[i].ptr<0) continue;
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if(!strcmp(get_tok_value( (xctx->inst[i].ptr+ xctx->sym)->prop_ptr, "spice_ignore",0 ), "true") ) {
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continue;
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}
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my_strdup(388, &type,(xctx->inst[i].ptr+ xctx->sym)->type);
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if( type && IS_PIN(type) ) {
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print_spice_element(fd, i) ; /* this is the element line */
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}
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}
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my_strdup(388, &type,(xctx->inst[i].ptr+ xctx->sym)->type);
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if( type && IS_PIN(type) ) {
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print_spice_element(fd, i) ; /* this is the element line */
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for(i=0;i<xctx->instances;i++) /* ... then print other lines */
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{
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if( strcmp(get_tok_value(xctx->inst[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue;
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if(xctx->inst[i].ptr<0) continue;
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if(!strcmp(get_tok_value( (xctx->inst[i].ptr+ xctx->sym)->prop_ptr, "spice_ignore",0 ), "true") ) {
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continue;
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}
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my_strdup(390, &type,(xctx->inst[i].ptr+ xctx->sym)->type);
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if( type && !IS_LABEL_OR_PIN(type) ) {
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if(!strcmp(type,"netlist_commands") && netlist_count==0) continue; /* already done in global_spice_netlist */
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if(netlist_count &&
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!strcmp(get_tok_value(xctx->inst[i].prop_ptr, "only_toplevel", 0), "true")) continue;
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if(!strcmp(type,"netlist_commands")) {
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fprintf(fd,"**** begin user architecture code\n");
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print_spice_element(fd, i) ; /* this is the element line */
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fprintf(fd,"**** end user architecture code\n");
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} else {
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const char *m;
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print_spice_element(fd, i) ; /* this is the element line */
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/* hash device_model attribute if any */
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m = get_tok_value(xctx->inst[i].prop_ptr, "device_model", 2);
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if(m[0]) str_hash_lookup(model_table, model_name(m), m, XINSERT);
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else {
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m = get_tok_value( (xctx->inst[i].ptr+ xctx->sym)->prop_ptr, "device_model", 2);
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if(m[0]) str_hash_lookup(model_table, model_name(m), m, XINSERT);
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}
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my_free(951, &model_name_result);
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}
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}
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}
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}
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for(i=0;i<xctx->instances;i++) /* ... then print other lines */
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{
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if( strcmp(get_tok_value(xctx->inst[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue;
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if(xctx->inst[i].ptr<0) continue;
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if(!strcmp(get_tok_value( (xctx->inst[i].ptr+ xctx->sym)->prop_ptr, "spice_ignore",0 ), "true") ) {
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continue;
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}
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my_strdup(390, &type,(xctx->inst[i].ptr+ xctx->sym)->type);
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if( type && !IS_LABEL_OR_PIN(type) ) {
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if(!strcmp(type,"netlist_commands") && netlist_count==0) continue; /* already done in global_spice_netlist */
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if(netlist_count &&
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!strcmp(get_tok_value(xctx->inst[i].prop_ptr, "only_toplevel", 0), "true")) continue;
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if(!strcmp(type,"netlist_commands")) {
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fprintf(fd,"**** begin user architecture code\n");
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print_spice_element(fd, i) ; /* this is the element line */
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fprintf(fd,"**** end user architecture code\n");
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} else {
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const char *m;
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print_spice_element(fd, i) ; /* this is the element line */
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/* hash device_model attribute if any */
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m = get_tok_value(xctx->inst[i].prop_ptr, "device_model", 2);
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if(m[0]) str_hash_lookup(model_table, model_name(m), m, XINSERT);
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else {
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m = get_tok_value( (xctx->inst[i].ptr+ xctx->sym)->prop_ptr, "device_model", 2);
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if(m[0]) str_hash_lookup(model_table, model_name(m), m, XINSERT);
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}
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my_free(951, &model_name_result);
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}
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}
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}
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}
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if(!netlist_count) redraw_hilights(); /* draw_hilight_net(1); */
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my_free(952, &type);
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}
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if(!netlist_count) redraw_hilights(); /* draw_hilight_net(1); */
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my_free(952, &type);
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}
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/* calculate the hash function relative to string s */
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@ -281,7 +281,7 @@ static void svg_draw_string(int layer, const char *str, int rot, int flip, int h
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if(rot == 3 && flip == 1 ) { x=textx1;}
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}
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llength=0;
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my_strdup2(434, &sss, str);
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my_strdup2(465, &sss, str);
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tt=ss=sss;
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for(;;) {
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c=*ss;
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@ -37,6 +37,7 @@ BEGIN{
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## inst net pin pinnumber pinindex
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# conn U1:2 INPUT_A A 1:4:9:12 1
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/^[ \t]*#/{ print; next}
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/^begin netlist/{
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print
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next
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@ -70,13 +71,6 @@ $1=="device"||$1=="footprint"{
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next
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}
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#skip if empty value field
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/^value/{
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if(NF <= 2) next
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print
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next
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}
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/^device/{
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if(NF>=3) {
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reparse()
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@ -107,7 +101,7 @@ $1=="device"||$1=="footprint"{
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# conn lines need not to be printed but pinslot and pinidx lines do.
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for(i=1; i<=numslots;i++) {
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curr_pin = (nn>1) ? pinlist_arr[i]: pinlist_arr[1]
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if(!(inst_name, curr_pin) in arr || arr[inst_name, curr_pin]=="" || arr[inst_name, curr_pin] ~/^--UNCONN--/) {
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if(!((inst_name, curr_pin) in arr) || arr[inst_name, curr_pin]=="" || arr[inst_name, curr_pin] ~/^--UNCONN--/) {
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if(curr_pin == pin_number) {
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arr[inst_name, curr_pin]=net_name SUBSEP pin_index SUBSEP pin_name SUBSEP i SUBSEP slotted
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} else {
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@ -123,7 +117,7 @@ $1=="device"||$1=="footprint"{
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next
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}
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/^tEDAx v1/{
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/^(__subcircuit__|__map__|tEDAx v1|__GLOBAL__|__HIERSEP__)/ {
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print
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next
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}
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@ -150,11 +144,15 @@ $1=="device"||$1=="footprint"{
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for(i in footprint) print "footprint", i, footprint[i]
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for(i in device) print "device", i, device[i]
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print $0
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delete arr
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delete footprint
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delete device
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next
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}
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NF>=2{
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print "comptag", current_name, $0
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$1 ~ /^(comptag|spicedev|spiceval|value)$/ {
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if($1 == "comptag") for(i = 3; i<=NF; i+=2) print "comptag", $2, $i, $(i+1)
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else if(NF > 2) print $0
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next
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}
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@ -25,6 +25,7 @@
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void global_tedax_netlist(int global) /* netlister driver */
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{
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FILE *fd;
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const char *str_tmp;
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int i, save_ok;
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unsigned int *stored_flags;
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char netl_filename[PATH_MAX]; /* overflow safe 20161122 */
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@ -37,8 +38,14 @@ void global_tedax_netlist(int global) /* netlister driver */
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}
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statusmsg("",2); /* clear infowindow */
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record_global_node(2, NULL, NULL); /* delete list of global nodes */
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bus_replacement_char[0] = bus_replacement_char[1] = '\0';
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hiersep[0]='.'; hiersep[1]='\0';
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str_tmp = tclgetvar("bus_replacement_char");
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if(str_tmp && str_tmp[0] && str_tmp[1]) {
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bus_replacement_char[0] = str_tmp[0];
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bus_replacement_char[1] = str_tmp[1];
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}
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netlist_count=0;
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my_snprintf(netl_filename, S(netl_filename), "%s/.%s_%d",
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netlist_dir, skip_dir(xctx->sch[xctx->currsch]), getpid());
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fd=fopen(netl_filename, "w");
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@ -53,14 +60,21 @@ void global_tedax_netlist(int global) /* netlister driver */
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dbg(0, "global_tedax_netlist(): problems opening netlist file\n");
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return;
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}
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/* netlist_options */
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for(i=0;i<xctx->instances;i++) {
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if(!(xctx->inst[i].ptr+ xctx->sym)->type) continue;
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if( !strcmp((xctx->inst[i].ptr+ xctx->sym)->type,"netlist_options") ) {
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netlist_options(i);
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}
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}
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dbg(1, "global_tedax_netlist(): opening %s for writing\n",netl_filename);
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fprintf(fd,"tEDAx v1\nbegin netlist v1 %s\n", skip_dir( xctx->sch[xctx->currsch]) );
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||||
|
||||
tedax_netlist(fd, 0);
|
||||
|
||||
netlist_count++;
|
||||
|
||||
/*fprintf(fd,"**** begin user architecture code\n"); */
|
||||
/*netlist_count++; */
|
||||
/*if(xctx->schprop && xctx->schprop[0]) fprintf(fd, "%s\n", xctx->schprop); */
|
||||
/*fprintf(fd,"**** end user architecture code\n"); */
|
||||
/* /20100217 */
|
||||
|
|
@ -71,7 +85,7 @@ void global_tedax_netlist(int global) /* netlister driver */
|
|||
stored_flags = my_calloc(149, xctx->instances, sizeof(unsigned int));
|
||||
for(i=0;i<xctx->instances;i++) stored_flags[i] = xctx->inst[i].flags & 4;
|
||||
|
||||
if(0) /* was if(global) ... 20180901 no hierarchical tEDAx netlist for now */
|
||||
if(global) /* was if(global) ... 20180901 no hierarchical tEDAx netlist for now */
|
||||
{
|
||||
unselect_all();
|
||||
remove_symbols(); /* 20161205 ensure all unused symbols purged before descending hierarchy */
|
||||
|
|
@ -101,13 +115,13 @@ void global_tedax_netlist(int global) /* netlister driver */
|
|||
|
||||
/* restore hilight flags from errors found analyzing top level before descending hierarchy */
|
||||
for(i=0;i<xctx->instances; i++) xctx->inst[i].flags |= stored_flags[i];
|
||||
|
||||
draw_hilight_net(1);
|
||||
}
|
||||
my_free(965, &stored_flags);
|
||||
|
||||
/* print globals nodes found in netlist 28032003 */
|
||||
record_global_node(0,fd,NULL);
|
||||
fprintf(fd, "__HIERSEP__ %s\n", hiersep);
|
||||
|
||||
dbg(1, "global_tedax_netlist(): starting awk on netlist!\n");
|
||||
|
||||
|
|
@ -127,56 +141,49 @@ void global_tedax_netlist(int global) /* netlister driver */
|
|||
|
||||
void tedax_block_netlist(FILE *fd, int i)
|
||||
{
|
||||
int j;
|
||||
int tedax_stop=0;
|
||||
char filename[PATH_MAX];
|
||||
char netl_filename[PATH_MAX];
|
||||
char tcl_cmd_netlist[PATH_MAX + 100];
|
||||
char cellname[PATH_MAX];
|
||||
const char *str_tmp;
|
||||
int mult;
|
||||
char *extra=NULL;
|
||||
if(!strcmp( get_tok_value(xctx->sym[i].prop_ptr,"tedax_stop",0),"true") )
|
||||
tedax_stop=1;
|
||||
else
|
||||
tedax_stop=0;
|
||||
fprintf(fd, "\n* expanding symbol: %s # of pins=%d\n\n",
|
||||
fprintf(fd, "\n# expanding symbol: %s # of pins=%d\n\n",
|
||||
xctx->sym[i].name,xctx->sym[i].rects[PINLAYER] );
|
||||
fprintf(fd, ".subckt %s ",skip_dir(xctx->sym[i].name));
|
||||
for(j=0;j<xctx->sym[i].rects[PINLAYER];j++)
|
||||
{
|
||||
str_tmp=
|
||||
expandlabel(get_tok_value(xctx->sym[i].rect[PINLAYER][j].prop_ptr,"name",0), &mult);
|
||||
if(str_tmp)
|
||||
fprintf(fd,"%s ",str_tmp);
|
||||
else
|
||||
fprintf(fd,"<NULL> ");
|
||||
}
|
||||
|
||||
fprintf(fd, "begin netlist v1 %s\n",skip_dir(xctx->sym[i].name));
|
||||
print_tedax_subckt(fd, i);
|
||||
|
||||
my_strdup(420, &extra, get_tok_value(xctx->sym[i].prop_ptr,"extra",0) );
|
||||
fprintf(fd, "%s ", extra ? extra : "" );
|
||||
/* this is now done in print_spice_subckt */
|
||||
/*
|
||||
* fprintf(fd, "%s ", extra ? extra : "" );
|
||||
*/
|
||||
|
||||
/* 20081206 new get_sym_template does not return token=value pairs where token listed in extra */
|
||||
fprintf(fd, "%s", get_sym_template(xctx->sym[i].templ, extra));
|
||||
my_free(966, &extra);
|
||||
fprintf(fd, "\n");
|
||||
/*clear_drawing(); */
|
||||
|
||||
if((str_tmp = get_tok_value(xctx->sym[i].prop_ptr, "schematic",0 ))[0]) {
|
||||
my_strncpy(filename, abs_sym_path(str_tmp, ""), S(filename));
|
||||
load_schematic(1,filename, 0);
|
||||
} else {
|
||||
dbg(1, "tedax_block_netlist(): loading: %s -> %s\n",
|
||||
xctx->sym[i].name, add_ext(abs_sym_path(xctx->sym[i].name, ""), ".sch"));
|
||||
dbg(1, "tedax_block_netlist(): current_dirname=%s\n", tclgetvar("current_dirname"));
|
||||
load_schematic(1, add_ext(abs_sym_path(xctx->sym[i].name, ""), ".sch"), 0);
|
||||
}
|
||||
tedax_netlist(fd, tedax_stop); /* 20111113 added tedax_stop */
|
||||
tedax_netlist(fd, tedax_stop);
|
||||
netlist_count++;
|
||||
fprintf(fd,"**** begin user architecture code\n");
|
||||
if(xctx->schprop && xctx->schprop[0]) fprintf(fd, "%s\n", xctx->schprop);
|
||||
fprintf(fd,"**** end user architecture code\n");
|
||||
fprintf(fd, ".ends\n\n");
|
||||
if(split_files) {
|
||||
fclose(fd);
|
||||
my_snprintf(tcl_cmd_netlist, S(tcl_cmd_netlist), "netlist {%s} noshow {%s}", netl_filename, cellname);
|
||||
tcleval(tcl_cmd_netlist);
|
||||
if(debug_var==0) xunlink(netl_filename);
|
||||
|
||||
if(xctx->schprop && xctx->schprop[0]) {
|
||||
fprintf(fd,"#**** begin user architecture code\n");
|
||||
fprintf(fd, "%s\n", xctx->schprop);
|
||||
fprintf(fd,"#**** end user architecture code\n");
|
||||
}
|
||||
fprintf(fd, "end netlist\n\n");
|
||||
}
|
||||
|
||||
void tedax_netlist(FILE *fd, int tedax_stop )
|
||||
|
|
@ -209,11 +216,18 @@ void tedax_netlist(FILE *fd, int tedax_stop )
|
|||
continue;
|
||||
}
|
||||
my_strdup(423, &type,(xctx->inst[i].ptr+ xctx->sym)->type);
|
||||
if( type && !IS_PIN(type) ) {
|
||||
|
||||
if( type && !IS_LABEL_OR_PIN(type) ) {
|
||||
if(!strcmp(type,"netlist_commands") && netlist_count==0) continue; /* already done in global_tedax_netlist */
|
||||
if(netlist_count &&
|
||||
!strcmp(get_tok_value(xctx->inst[i].prop_ptr, "only_toplevel", 0), "true")) continue;
|
||||
print_tedax_element(fd, i) ; /* this is the element line */
|
||||
if(!strcmp(type,"netlist_commands")) {
|
||||
fprintf(fd,"#**** begin user architecture code\n");
|
||||
print_tedax_element(fd, i) ; /* this is the element line */
|
||||
fprintf(fd,"#**** end user architecture code\n");
|
||||
} else {
|
||||
print_tedax_element(fd, i) ; /* this is the element line */
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
223
src/token.c
223
src/token.c
|
|
@ -1317,6 +1317,113 @@ void print_verilog_param(FILE *fd, int symbol)
|
|||
|
||||
|
||||
|
||||
void print_tedax_subckt(FILE *fd, int symbol)
|
||||
{
|
||||
int i=0, mult;
|
||||
const char *str_ptr=NULL;
|
||||
register int c, state=TOK_BEGIN, space;
|
||||
char *format=NULL,*s, *token=NULL;
|
||||
int pin_number;
|
||||
int sizetok=0;
|
||||
int token_pos=0, escape=0;
|
||||
int no_of_pins=0;
|
||||
|
||||
my_strdup(460, &format, get_tok_value(xctx->sym[symbol].prop_ptr,"format",2));
|
||||
if( (format==NULL) ) {
|
||||
my_free(473, &format);
|
||||
return; /* no format */
|
||||
}
|
||||
no_of_pins= xctx->sym[symbol].rects[PINLAYER];
|
||||
s=format;
|
||||
|
||||
/* begin parsing format string */
|
||||
while(1)
|
||||
{
|
||||
c=*s++;
|
||||
if(c=='\\') {
|
||||
escape=1;
|
||||
c=*s++;
|
||||
}
|
||||
else escape=0;
|
||||
if(c=='\n' && escape ) c=*s++; /* 20171030 eat escaped newlines */
|
||||
space=SPACE(c);
|
||||
if( state==TOK_BEGIN && (c=='@' || c=='$') && !escape) state=TOK_TOKEN;
|
||||
else if(state==TOK_TOKEN && token_pos > 1 &&
|
||||
(
|
||||
( (space || c == '$' || c == '@') && !escape ) ||
|
||||
( (!space && c != '$' && c != '@') && escape )
|
||||
)
|
||||
) {
|
||||
state = TOK_SEP;
|
||||
}
|
||||
|
||||
STR_ALLOC(&token, token_pos, &sizetok);
|
||||
if(state==TOK_TOKEN) {
|
||||
token[token_pos++]=c;
|
||||
}
|
||||
else if(state==TOK_SEP) /* got a token */
|
||||
{
|
||||
token[token_pos]='\0';
|
||||
token_pos=0;
|
||||
if(!strcmp(token, "@name")) {
|
||||
/* do nothing */
|
||||
}
|
||||
else if(strcmp(token, "@symname")==0) {
|
||||
break ;
|
||||
}
|
||||
else if(strcmp(token, "@pinlist")==0) {
|
||||
for(i=0;i<no_of_pins;i++)
|
||||
{
|
||||
if(strcmp(get_tok_value(xctx->sym[symbol].rect[PINLAYER][i].prop_ptr,"spice_ignore",0), "true")) {
|
||||
str_ptr=
|
||||
expandlabel(get_tok_value(xctx->sym[symbol].rect[PINLAYER][i].prop_ptr,"name",0), &mult);
|
||||
fprintf(fd, "%s ", str_ptr);
|
||||
}
|
||||
}
|
||||
}
|
||||
else if(token[0]=='@' && token[1]=='@') { /* recognize single pins 15112003 */
|
||||
char *prop=NULL;
|
||||
for(i = 0; i<no_of_pins; i++) {
|
||||
prop = xctx->sym[symbol].rect[PINLAYER][i].prop_ptr;
|
||||
if(!strcmp(get_tok_value(prop, "name",0), token + 2)) break;
|
||||
}
|
||||
if(i<no_of_pins && strcmp(get_tok_value(prop,"spice_ignore",0), "true")) {
|
||||
fprintf(fd, "%s ", expandlabel(token+2, &mult));
|
||||
}
|
||||
}
|
||||
/* reference by pin number instead of pin name, allows faster lookup of the attached net name 20180911 */
|
||||
else if(token[0]=='@' && token[1]=='#') {
|
||||
pin_number = atoi(token+2);
|
||||
if(pin_number < no_of_pins) {
|
||||
if(strcmp(get_tok_value(xctx->sym[symbol].rect[PINLAYER][pin_number].prop_ptr,"spice_ignore",0), "true")) {
|
||||
str_ptr = get_tok_value(xctx->sym[symbol].rect[PINLAYER][pin_number].prop_ptr,"name",0);
|
||||
fprintf(fd, "%s ", expandlabel(str_ptr, &mult));
|
||||
}
|
||||
}
|
||||
}
|
||||
/* this will print the other @parameters, usually "extra" nodes so they will be in the order
|
||||
* specified by the format string. The 'extra' attribute is no more used to print extra nodes
|
||||
* in spice_block_netlist(). */
|
||||
else if(token[0] == '@') { /* given previous if() conditions not followed by @ or # */
|
||||
fprintf(fd, "%s ", token + 1);
|
||||
}
|
||||
if(c!='$' && c!='@' && c!='\0' ) fputc(c,fd);
|
||||
if(c == '@' || c =='$') s--;
|
||||
state=TOK_BEGIN;
|
||||
}
|
||||
/* 20151028 dont print escaping backslashes */
|
||||
else if(state==TOK_BEGIN && c!='\0') {
|
||||
/* do nothing */
|
||||
}
|
||||
if(c=='\0')
|
||||
{
|
||||
break ;
|
||||
}
|
||||
}
|
||||
my_free(474, &format);
|
||||
my_free(478, &token);
|
||||
}
|
||||
|
||||
|
||||
void print_spice_subckt(FILE *fd, int symbol)
|
||||
{
|
||||
|
|
@ -1508,8 +1615,8 @@ void print_spice_element(FILE *fd, int inst)
|
|||
token_exists = get_tok_size;
|
||||
if (!strncmp(value,"tcleval(", 8)) {
|
||||
dbg(1, "print_spice_element(): value=%s\n", value);
|
||||
my_strdup2(442, &translatedvalue, value);
|
||||
my_strdup2(453, &translatedvalue, translate(inst, translatedvalue));
|
||||
my_strdup2(466, &translatedvalue, value);
|
||||
my_strdup2(456, &translatedvalue, translate(inst, translatedvalue));
|
||||
value = translatedvalue;
|
||||
}
|
||||
}
|
||||
|
|
@ -1721,6 +1828,7 @@ void print_tedax_element(FILE *fd, int inst)
|
|||
int sizetok=0;
|
||||
int token_pos=0, escape=0;
|
||||
int no_of_pins=0;
|
||||
int subcircuit = 0;
|
||||
/* struct inst_hashentry *ptr; */
|
||||
|
||||
my_strdup(489, &extra, get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->prop_ptr,"extra",2));
|
||||
|
|
@ -1741,6 +1849,21 @@ void print_tedax_element(FILE *fd, int inst)
|
|||
my_strdup(1185, &format, get_tok_value(xctx->inst[inst].prop_ptr,"tedax_format",2));
|
||||
if(!format || !format[0])
|
||||
my_strdup(497, &format, get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->prop_ptr,"tedax_format",2));
|
||||
|
||||
no_of_pins= (xctx->inst[inst].ptr+ xctx->sym)->rects[PINLAYER];
|
||||
if( !format && !strcmp((xctx->inst[inst].ptr+ xctx->sym)->type, "subcircuit") ) {
|
||||
subcircuit = 1;
|
||||
fprintf(fd, "__subcircuit__ %s %s\n", skip_dir(xctx->inst[inst].name), xctx->inst[inst].instname);
|
||||
for(i=0;i<no_of_pins; i++) {
|
||||
net_name(inst,i, &mult, 0, 1); /* only to trigger erc errors if any */
|
||||
fprintf(fd, "__map__ %s -> %s\n",
|
||||
get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr,"name",0),
|
||||
(xctx->inst[inst].node && xctx->inst[inst].node[i]) ?
|
||||
xctx->inst[inst].node[i] : "__UNCONNECTED_PIN__");
|
||||
}
|
||||
fprintf(fd, "\n");
|
||||
}
|
||||
|
||||
if(name==NULL || !format || !format[0]) {
|
||||
my_free(1023, &extra);
|
||||
my_free(1024, &extra_pinnumber);
|
||||
|
|
@ -1750,57 +1873,57 @@ void print_tedax_element(FILE *fd, int inst)
|
|||
my_free(1028, &name);
|
||||
return;
|
||||
}
|
||||
no_of_pins= (xctx->inst[inst].ptr+ xctx->sym)->rects[PINLAYER];
|
||||
|
||||
fprintf(fd, "begin_inst %s numslots %s\n", name, numslots);
|
||||
for(i=0;i<no_of_pins; i++) {
|
||||
char *pinnumber;
|
||||
pinnumber = get_pin_attr_from_inst(inst, i, "pinnumber");
|
||||
if(!pinnumber) {
|
||||
my_strdup2(500, &pinnumber,
|
||||
get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr,"pinnumber",0));
|
||||
if(!subcircuit) {
|
||||
fprintf(fd, "begin_inst %s numslots %s\n", name, numslots);
|
||||
for(i=0;i<no_of_pins; i++) {
|
||||
char *pinnumber;
|
||||
pinnumber = get_pin_attr_from_inst(inst, i, "pinnumber");
|
||||
if(!pinnumber) {
|
||||
my_strdup2(500, &pinnumber,
|
||||
get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr,"pinnumber",0));
|
||||
}
|
||||
if(!get_tok_size) my_strdup(501, &pinnumber, "--UNDEF--");
|
||||
tmp = net_name(inst,i, &mult, 0, 1);
|
||||
if(tmp && strcmp(tmp, "__UNCONNECTED_PIN__")) {
|
||||
fprintf(fd, "conn %s %s %s %s %d\n",
|
||||
name,
|
||||
tmp,
|
||||
get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr,"name",0),
|
||||
pinnumber,
|
||||
i+1);
|
||||
}
|
||||
my_free(1029, &pinnumber);
|
||||
}
|
||||
if(!get_tok_size) my_strdup(501, &pinnumber, "--UNDEF--");
|
||||
tmp = net_name(inst,i, &mult, 0, 1);
|
||||
if(tmp && strcmp(tmp, "__UNCONNECTED_PIN__")) {
|
||||
fprintf(fd, "conn %s %s %s %s %d\n",
|
||||
name,
|
||||
tmp,
|
||||
get_tok_value((xctx->inst[inst].ptr+ xctx->sym)->rect[PINLAYER][i].prop_ptr,"name",0),
|
||||
pinnumber,
|
||||
i+1);
|
||||
}
|
||||
my_free(1029, &pinnumber);
|
||||
}
|
||||
|
||||
if(extra){
|
||||
char netstring[40];
|
||||
/* fprintf(errfp, "extra_pinnumber: |%s|\n", extra_pinnumber); */
|
||||
/* fprintf(errfp, "extra: |%s|\n", extra); */
|
||||
for(extra_ptr = extra, extra_pinnumber_ptr = extra_pinnumber; ; extra_ptr=NULL, extra_pinnumber_ptr=NULL) {
|
||||
extra_pinnumber_token=my_strtok_r(extra_pinnumber_ptr, " ", &saveptr1);
|
||||
extra_token=my_strtok_r(extra_ptr, " ", &saveptr2);
|
||||
if(!extra_token) break;
|
||||
/* fprintf(errfp, "extra_pinnumber_token: |%s|\n", extra_pinnumber_token); */
|
||||
/* fprintf(errfp, "extra_token: |%s|\n", extra_token); */
|
||||
instance_based=0;
|
||||
|
||||
/* alternate instance based extra net naming: net:<pinumber>=netname */
|
||||
my_snprintf(netstring, S(netstring), "net:%s", extra_pinnumber_token);
|
||||
dbg(1, "print_tedax_element(): netstring=%s\n", netstring);
|
||||
extra_token_val=get_tok_value(xctx->inst[inst].prop_ptr, extra_token, 0);
|
||||
if(!extra_token_val[0]) extra_token_val=get_tok_value(xctx->inst[inst].prop_ptr, netstring, 0);
|
||||
if(!extra_token_val[0]) extra_token_val=get_tok_value(template, extra_token, 0);
|
||||
else instance_based=1;
|
||||
if(!extra_token_val[0]) extra_token_val="--UNDEF--";
|
||||
|
||||
fprintf(fd, "conn %s %s %s %s %d", name, extra_token_val, extra_token, extra_pinnumber_token, i+1);
|
||||
i++;
|
||||
if(instance_based) fprintf(fd, " # instance_based");
|
||||
fprintf(fd,"\n");
|
||||
|
||||
if(extra){
|
||||
char netstring[40];
|
||||
/* fprintf(errfp, "extra_pinnumber: |%s|\n", extra_pinnumber); */
|
||||
/* fprintf(errfp, "extra: |%s|\n", extra); */
|
||||
for(extra_ptr = extra, extra_pinnumber_ptr = extra_pinnumber; ; extra_ptr=NULL, extra_pinnumber_ptr=NULL) {
|
||||
extra_pinnumber_token=my_strtok_r(extra_pinnumber_ptr, " ", &saveptr1);
|
||||
extra_token=my_strtok_r(extra_ptr, " ", &saveptr2);
|
||||
if(!extra_token) break;
|
||||
/* fprintf(errfp, "extra_pinnumber_token: |%s|\n", extra_pinnumber_token); */
|
||||
/* fprintf(errfp, "extra_token: |%s|\n", extra_token); */
|
||||
instance_based=0;
|
||||
|
||||
/* alternate instance based extra net naming: net:<pinumber>=netname */
|
||||
my_snprintf(netstring, S(netstring), "net:%s", extra_pinnumber_token);
|
||||
dbg(1, "print_tedax_element(): netstring=%s\n", netstring);
|
||||
extra_token_val=get_tok_value(xctx->inst[inst].prop_ptr, extra_token, 0);
|
||||
if(!extra_token_val[0]) extra_token_val=get_tok_value(xctx->inst[inst].prop_ptr, netstring, 0);
|
||||
if(!extra_token_val[0]) extra_token_val=get_tok_value(template, extra_token, 0);
|
||||
else instance_based=1;
|
||||
if(!extra_token_val[0]) extra_token_val="--UNDEF--";
|
||||
|
||||
fprintf(fd, "conn %s %s %s %s %d", name, extra_token_val, extra_token, extra_pinnumber_token, i+1);
|
||||
i++;
|
||||
if(instance_based) fprintf(fd, " # instance_based");
|
||||
fprintf(fd,"\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(format) {
|
||||
s=format;
|
||||
dbg(1, "print_tedax_element(): name=%s, tedax_format=%s netlist_count=%d\n",name,format, netlist_count);
|
||||
|
|
@ -1956,7 +2079,7 @@ void print_tedax_element(FILE *fd, int inst)
|
|||
}
|
||||
}
|
||||
} /* if(format) */
|
||||
fprintf(fd,"end_inst\n");
|
||||
if(!subcircuit) fprintf(fd,"end_inst\n");
|
||||
my_free(1033, &extra);
|
||||
my_free(1034, &extra_pinnumber);
|
||||
my_free(1035, &template);
|
||||
|
|
|
|||
|
|
@ -683,6 +683,7 @@ extern int do_waves;
|
|||
extern int netlist_count;
|
||||
extern int top_subckt;
|
||||
extern int spiceprefix;
|
||||
extern char hiersep[20];
|
||||
extern int quit;
|
||||
extern int show_erc;
|
||||
extern int hilight_nets;
|
||||
|
|
@ -976,6 +977,7 @@ extern const char* translate2(struct Lcc *lcc, int level, char* s);
|
|||
extern void print_tedax_element(FILE *fd, int inst);
|
||||
extern void print_spice_element(FILE *fd, int inst);
|
||||
extern void print_spice_subckt(FILE *fd, int symbol);
|
||||
extern void print_tedax_subckt(FILE *fd, int symbol);
|
||||
extern void print_vhdl_element(FILE *fd, int inst);
|
||||
extern void print_verilog_element(FILE *fd, int inst);
|
||||
extern void print_verilog_primitive(FILE *fd, int inst);
|
||||
|
|
|
|||
|
|
@ -137,7 +137,7 @@ proc netlist {source_file show netlist_file} {
|
|||
}
|
||||
}
|
||||
if {$netlist_type eq {tedax}} {
|
||||
eval exec {awk -f $XSCHEM_SHAREDIR/tedax.awk $source_file \
|
||||
eval exec {awk -f $XSCHEM_SHAREDIR/tedax.awk $source_file | $XSCHEM_SHAREDIR/flatten_tedax.awk \
|
||||
> $netlist_dir/$netlist_file}
|
||||
if ![string compare $show "show"] {
|
||||
textwindow $netlist_dir/$netlist_file
|
||||
|
|
|
|||
|
|
@ -2,7 +2,14 @@ v {xschem version=2.9.8 file_version=1.2}
|
|||
G {}
|
||||
K {type=connector
|
||||
format="*connector(3,1) @pinlist"
|
||||
tedax_format="footprint @name @footprint"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=c1 footprint=connector(3,1)"
|
||||
}
|
||||
V {}
|
||||
|
|
|
|||
|
|
@ -3,7 +3,14 @@ G {}
|
|||
K {type=connector
|
||||
verilog_ignore=true
|
||||
format="*connector(8,1) @pinlist"
|
||||
tedax_format="footprint @name @footprint"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=c1 footprint=connector(8,1)"
|
||||
}
|
||||
V {}
|
||||
|
|
|
|||
|
|
@ -2,6 +2,14 @@ v {xschem version=2.9.8 file_version=1.2}
|
|||
G {}
|
||||
K {type=diode
|
||||
format="@name @pinlist @model area=@area"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=D1 model=D1N914 area=1"}
|
||||
V {}
|
||||
S {}
|
||||
|
|
|
|||
|
|
@ -2,10 +2,14 @@ v {xschem version=2.9.8 file_version=1.2}
|
|||
G {}
|
||||
K {type=diode
|
||||
format="@spiceprefix@name @pinlist @model"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
device @name @device
|
||||
@comptag"
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=X1 model=XXX device=XXX"}
|
||||
V {}
|
||||
S {}
|
||||
|
|
|
|||
|
|
@ -1,11 +1,16 @@
|
|||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=netlist_options
|
||||
template="name=n1"
|
||||
template="
|
||||
bus_replacement_char="[]"
|
||||
top_subckt=false
|
||||
spiceprefix=true
|
||||
hiersep=.
|
||||
"
|
||||
}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -0 -10 355 -10 {}
|
||||
T {NETLIST_OPTIONS} 5 -25 0 0 0.3 0.3 {}
|
||||
T {@prop_ptr} 45 5 0 0 0.2 0.2 {}
|
||||
T {@prop_ptr} 45 5 0 0 0.3 0.3 {layer=8}
|
||||
|
|
|
|||
|
|
@ -1,8 +1,15 @@
|
|||
v {xschem version=2.9.5 file_version=1.1}
|
||||
G {type=nmos
|
||||
format="@spiceprefix@name @pinlist @model @extra m=@m "
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=nmos
|
||||
format="@spiceprefix@name @pinlist @model @extra m=@m"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @device"
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=M1 model=M2N7002 device=2N7002 footprint=SOT23 m=1"
|
||||
verilog_format="@symname #@del @name ( @@d , @@s , @@g );"}
|
||||
V {}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,14 @@ v {xschem version=2.9.8 file_version=1.2}
|
|||
G {}
|
||||
K {type=npn
|
||||
format="@name @pinlist @model area=@area m=@m"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @device"
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=Q1
|
||||
model=MMBT2222
|
||||
device=MMBT2222
|
||||
|
|
|
|||
|
|
@ -1,11 +1,16 @@
|
|||
v {xschem version=2.9.5 file_version=1.1}
|
||||
G {type=pmos
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=pmos
|
||||
format="@spiceprefix@name @pinlist @model @extra m=@m"
|
||||
verilog_format="@symname #@del @name ( @@d , @@s , @@g );"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
device @name @device
|
||||
@comptag"
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=M1
|
||||
model=DMP2035U
|
||||
device=DMP2035U
|
||||
|
|
|
|||
|
|
@ -2,8 +2,14 @@ v {xschem version=2.9.8 file_version=1.2}
|
|||
G {}
|
||||
K {type=pnp
|
||||
format="@spiceprefix@name @pinlist @model area=@area m=@m"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @device"
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=Q1
|
||||
model=Q2N2907
|
||||
device=2N2907
|
||||
|
|
|
|||
|
|
@ -2,11 +2,16 @@ v {xschem version=2.9.8 file_version=1.2}
|
|||
G {}
|
||||
K {type=resistor
|
||||
format="@name @pinlist @value m=@m"
|
||||
|
||||
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
device @name @device
|
||||
@comptag"
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=R1
|
||||
value=1k
|
||||
footprint=1206
|
||||
|
|
|
|||
|
|
@ -2,8 +2,14 @@ v {xschem version=2.9.8 file_version=1.2}
|
|||
G {}
|
||||
K {type=diode
|
||||
format="@spiceprefix@name @pinlist @model"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @device"
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=X1 model=XXX device=XXX"}
|
||||
V {}
|
||||
S {}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
|
|
@ -67,3 +68,4 @@ C {zener.sym} 920 -190 0 0 {name=x10 model=XXX device=XXX}
|
|||
C {pcb_current_protection.sym} 170 -460 0 0 {name=x1}
|
||||
C {pcb_voltage_protection.sym} 170 -420 0 0 {name=x0}
|
||||
C {pcb_test1.sym} 170 -380 0 0 {name=x2}
|
||||
C {hierarchical_tedax.sym} 170 -340 0 0 {name=x3}
|
||||
|
|
|
|||
|
|
@ -1,9 +1,16 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=regulator
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=regulator
|
||||
format="@spiceprefix@name @pinlist r@symname"
|
||||
verilog_format="assign @#2 = @#0 ;"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @device"
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=U1 device=7805 footprint=TO220"}
|
||||
V {}
|
||||
S {}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,106 @@
|
|||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
T {Example of hierarchical schematic
|
||||
to be netlisted in tEDAx format.
|
||||
Hierarchy is flattened and hierarchical
|
||||
node names are mangled to avoid collisions.} 1330 -520 0 0 0.8 0.8 {}
|
||||
N 540 -100 540 -80 {lab=VSS}
|
||||
N 540 -200 540 -160 {lab=VREF}
|
||||
N 540 -200 630 -200 {lab=VREF}
|
||||
N 540 -320 540 -290 {lab=VCC}
|
||||
N 630 -380 630 -280 {lab=VSSLOAD}
|
||||
N 630 -380 1130 -380 {lab=VSSLOAD}
|
||||
N 1130 -380 1130 -360 {lab=VSSLOAD}
|
||||
N 1130 -300 1130 -270 {lab=D}
|
||||
N 860 -120 880 -120 {lab=#net1}
|
||||
N 770 -120 800 -120 {lab=RST}
|
||||
N 920 -170 920 -150 {lab=#net2}
|
||||
N 990 -210 990 -200 {lab=G}
|
||||
N 900 -240 920 -240 {lab=#net2}
|
||||
N 920 -170 950 -170 {lab=#net2}
|
||||
N 990 -210 1040 -210 {lab=G}
|
||||
N 1040 -240 1040 -210 {lab=G}
|
||||
N 1040 -240 1090 -240 {lab=G}
|
||||
N 1070 -840 1070 -790 { lab=VOUT_PROTECTED1}
|
||||
N 390 -440 390 -420 {lab=VSS}
|
||||
N 310 -500 390 -500 { lab=VSS_ANALOG}
|
||||
N 310 -440 310 -420 {lab=VSS}
|
||||
N 540 -230 540 -200 {lab=VREF}
|
||||
N 1130 -430 1130 -380 {lab=VSSLOAD}
|
||||
N 920 -240 920 -170 {lab=#net2}
|
||||
N 990 -220 990 -210 {lab=G}
|
||||
N 1020 -790 1070 -790 { lab=VOUT_PROTECTED1}
|
||||
N 70 -350 90 -350 { lab=#net3}
|
||||
N 70 -330 90 -330 { lab=#net4}
|
||||
N 2190 -840 2190 -790 { lab=VOUT_PROTECTED2}
|
||||
N 2140 -790 2190 -790 { lab=VOUT_PROTECTED2}
|
||||
N 390 -500 450 -500 { lab=VSS_ANALOG}
|
||||
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan"}
|
||||
C {lab_pin.sym} 70 -470 0 1 {name=p8 lab=VCC12}
|
||||
C {conn_8x1.sym} 50 -450 0 0 {name=C2}
|
||||
C {lab_pin.sym} 1130 -400 0 0 {name=p1 lab=VSSLOAD}
|
||||
C {lm358.sym} 710 -240 0 0 {name=U3:1
|
||||
spiceprefix=X
|
||||
VCC=VCC
|
||||
VNN=VSS
|
||||
url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=3&ved=2ahUKEwi8_s-Z5KTfAhUmy4UKHbDOBUIQFjACegQICBAC&url=https%3A%2F%2Fwww.sparkfun.com%2Fdatasheets%2FComponents%2FGeneral%2FLM358.pdf&usg=AOvVaw0pOnlomz_hkzyk7OvZBPFv"
|
||||
}
|
||||
C {res.sym} 540 -130 0 0 {name=R3 m=1 value=4k footprint=1206}
|
||||
C {res.sym} 540 -260 0 0 {name=R4 m=1 value=100k footprint=1206
|
||||
comptag="tc1 -1.4e-3 tc2 3e-5"
|
||||
device="resistor 1% tolerance"}
|
||||
C {gnd.sym} 540 -80 0 0 {name=l0 lab=VSS}
|
||||
C {nmos.sym} 1110 -240 0 0 {name=M2
|
||||
spiceprefix=X}
|
||||
C {res.sym} 1130 -330 0 0 {name=R5 m=1 value=1 footprint=1206}
|
||||
C {gnd.sym} 1130 -210 0 0 {name=l6 lab=VSS}
|
||||
C {vdd.sym} 540 -320 0 0 {name=l7 lab=VCC}
|
||||
C {vdd.sym} 1130 -550 0 0 {name=l8 lab=VCC}
|
||||
C {voltage_protection.sch} 10 -490 0 0 {name=xprot1}
|
||||
C {lab_pin.sym} 540 -180 0 0 {name=p2 lab=VREF}
|
||||
C {res.sym} 1130 -460 0 0 {name=RLOAD m=1 value="R='1/(time+1e-7)'" footprint=1206}
|
||||
C {ammeter.sym} 1130 -520 0 0 {name=vmeasure}
|
||||
C {lab_wire.sym} 1070 -240 0 0 {name=l12 lab=G}
|
||||
C {lab_pin.sym} 1130 -290 0 0 {name=p3 lab=D}
|
||||
C {res.sym} 870 -240 1 0 {name=R2 m=1 value=20k footprint=1206}
|
||||
C {npn.sym} 900 -120 0 0 {name=Q1 model=q2n2222
|
||||
url="http://html.alldatasheet.com/html-pdf/17919/PHILIPS/MMBT2222/499/2/MMBT2222.html"
|
||||
}
|
||||
C {gnd.sym} 920 -90 0 0 {name=l16 lab=VSS}
|
||||
C {lab_pin.sym} 770 -120 0 0 {name=p4 lab=RST}
|
||||
C {res.sym} 830 -120 1 0 {name=R6 m=1 value=20k footprint=1206}
|
||||
C {lab_pin.sym} 70 -430 0 1 {name=p5 lab=RST}
|
||||
C {npn.sym} 970 -170 0 0 {name=Q2 model=q2n2222
|
||||
url="http://html.alldatasheet.com/html-pdf/17919/PHILIPS/MMBT2222/499/2/MMBT2222.html"
|
||||
}
|
||||
C {gnd.sym} 990 -140 0 0 {name=l11 lab=VSS}
|
||||
C {res.sym} 990 -250 2 0 {name=R1 m=1 value=20k footprint=1206}
|
||||
C {vdd.sym} 990 -280 0 0 {name=l13 lab=VCC}
|
||||
C {lab_pin.sym} 70 -450 0 1 {name=p9 lab=VSS}
|
||||
C {lab_pin.sym} 1070 -790 0 1 {name=p6 lab=VOUT_PROTECTED1}
|
||||
C {lab_pin.sym} 180 -1200 0 0 {name=p10 lab=VCC12}
|
||||
C {diode.sym} 1070 -870 0 0 {name=D1 model=D1N914 area=1 device=D1N914 footprint=acy(300)}
|
||||
C {vdd.sym} 1070 -900 0 0 {name=l1 lab=VCC}
|
||||
C {res.sym} 390 -470 0 0 {name=R7 m=1 value=10 footprint=1206}
|
||||
C {gnd.sym} 390 -420 0 0 {name=l3 lab=VSS}
|
||||
C {lab_pin.sym} 450 -500 0 1 {name=p7 lab=VSS_ANALOG}
|
||||
C {lab_pin.sym} 180 -1120 0 0 {name=p11 lab=VSS_ANALOG}
|
||||
C {capa.sym} 310 -470 0 0 {name=C0 m=1 value=100u device="electrolitic capacitor"}
|
||||
C {gnd.sym} 310 -420 0 0 {name=l4 lab=VSS}
|
||||
C {lab_pin.sym} 70 -410 0 1 {name=p12 lab=VOUT_PROTECTED}
|
||||
C {lab_pin.sym} 70 -390 0 1 {name=p13 lab=VSS_ANALOG}
|
||||
C {lab_pin.sym} 70 -370 0 1 {name=p14 lab=VSSLOAD}
|
||||
C {noconn.sym} 90 -350 0 1 {name=l5}
|
||||
C {noconn.sym} 90 -330 0 1 {name=l9}
|
||||
C {netlist_options.sym} 30 -260 0 0 {hiersep=.
|
||||
}
|
||||
C {voltage_protection.sch} 1130 -490 0 0 {name=xprot2}
|
||||
C {lab_pin.sym} 2190 -790 0 1 {name=p15 lab=VOUT_PROTECTED2}
|
||||
C {lab_pin.sym} 1300 -1200 0 0 {name=p16 lab=VCC12}
|
||||
C {diode.sym} 2190 -870 0 0 {name=D2 model=D1N914 area=1 device=D1N914 footprint=acy(300)}
|
||||
C {vdd.sym} 2190 -900 0 0 {name=l10 lab=VCC}
|
||||
C {lab_pin.sym} 1300 -1120 0 0 {name=p17 lab=VSS_ANALOG}
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
v {xschem version=2.9.8 file_version=1.2}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"
|
||||
}
|
||||
T {@symname} -99 -6 0 0 0.3 0.3 {}
|
||||
T {@name} 135 -22 0 0 0.2 0.2 {}
|
||||
L 4 -130 -10 130 -10 {}
|
||||
L 4 -130 10 130 10 {}
|
||||
L 4 -130 -10 -130 10 {}
|
||||
L 4 130 -10 130 10 {}
|
||||
|
|
@ -1,9 +1,22 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=opamp
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=opamp
|
||||
format="@spiceprefix@name @#0 @#1 @VCC @VNN @#2 @model"
|
||||
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @symname"
|
||||
template="name=U1:1 model=LM358 device=LM358 footprint=\\"SO(8)\\" numslots=2 VCC=VCC VNN=VNN"
|
||||
value @name @value
|
||||
device @name @device
|
||||
spicedev @name @spicedev
|
||||
spiceval @name @spiceval
|
||||
comptag @name @comptag"
|
||||
|
||||
template="name=U1:1
|
||||
model=LM358 device=LM358
|
||||
footprint=\\"SO(8)\\"
|
||||
numslots=2
|
||||
VCC=VCC
|
||||
VNN=VNN"
|
||||
|
||||
extra="VCC VNN"
|
||||
extra_pinnumber="8 4"}
|
||||
V {}
|
||||
|
|
|
|||
|
|
@ -81,4 +81,3 @@ url="http://html.alldatasheet.com/html-pdf/17919/PHILIPS/MMBT2222/499/2/MMBT2222
|
|||
C {gnd.sym} 810 -170 0 0 {name=l11 lab=VSS}
|
||||
C {res.sym} 810 -280 2 0 {name=R1 m=1 value=20k footprint=1206}
|
||||
C {vdd.sym} 810 -310 0 0 {name=l13 lab=VCC}
|
||||
C {noconn.sym} 430 -500 0 0 {name=l1}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,32 @@
|
|||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
B 2 430 -240 940 -70 {dash=4}
|
||||
T {@name} 940 -270 0 1 0.4 0.4 {}
|
||||
T {@symname} 430 -270 0 0 0.4 0.4 {}
|
||||
N 550 -190 670 -190 {lab=VCCFILT}
|
||||
N 590 -130 590 -110 {lab=ANALOG_GND}
|
||||
N 790 -190 940 -190 {lab=VCC5}
|
||||
N 890 -130 890 -110 {lab=ANALOG_GND}
|
||||
N 730 -110 890 -110 {lab=ANALOG_GND}
|
||||
N 730 -160 730 -110 {lab=ANALOG_GND}
|
||||
N 590 -110 730 -110 {lab=ANALOG_GND}
|
||||
N 430 -110 590 -110 { lab=ANALOG_GND}
|
||||
N 430 -190 490 -190 { lab=VCC_IN}
|
||||
C {capa.sym} 590 -160 0 0 {name=C0 m=1 value=100u device="electrolitic capacitor"}
|
||||
C {7805.sym} 730 -190 0 0 {name=U0
|
||||
device=7805
|
||||
spiceprefix=X
|
||||
url="https://www.sparkfun.com/datasheets/Components/LM7805.pdf"}
|
||||
C {capa.sym} 890 -160 0 0 {name=C4 m=1 value=10u device="tantalium capacitor"}
|
||||
C {res.sym} 520 -190 1 0 {name=R0 m=1 value=4.7 device="carbonresistor"}
|
||||
C {lab_wire.sym} 650 -190 0 0 {name=l1 lab=VCCFILT}
|
||||
C {opin.sym} 940 -190 0 0 { name=p1 lab=VCC5 }
|
||||
C {ipin.sym} 430 -190 0 0 { name=p2 lab=VCC_IN }
|
||||
C {ipin.sym} 430 -110 0 0 { name=p3 lab=ANALOG_GND }
|
||||
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan Schippers"}
|
||||
|
|
@ -0,0 +1,86 @@
|
|||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=subcircuit
|
||||
format="@name @pinlist @symname"
|
||||
template="name=x1"}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
B 2 170 -840 1010 -100 {dash=4}
|
||||
T {@name} 1010 -870 0 1 0.4 0.4 {}
|
||||
T {@symname} 170 -870 0 0 0.4 0.4 {}
|
||||
N 920 -520 920 -390 {lab=VCC_FIVE}
|
||||
N 750 -360 880 -360 {lab=G}
|
||||
N 920 -300 1010 -300 {lab=VOUT}
|
||||
N 920 -170 920 -150 {lab=VSS}
|
||||
N 920 -300 920 -230 {lab=VOUT}
|
||||
N 480 -310 480 -220 {lab=Z}
|
||||
N 480 -390 710 -390 {lab=B}
|
||||
N 480 -160 480 -130 {lab=VSSA}
|
||||
N 480 -430 480 -390 {lab=B}
|
||||
N 750 -520 750 -420 {lab=VCC_FIVE}
|
||||
N 750 -260 750 -230 {lab=#net1}
|
||||
N 750 -170 750 -150 {lab=VSS}
|
||||
N 480 -390 480 -370 {lab=B}
|
||||
N 920 -330 920 -300 {lab=VOUT}
|
||||
N 750 -360 750 -320 {lab=G}
|
||||
N 400 -160 400 -130 {lab=VSSA}
|
||||
N 400 -220 480 -220 {lab=Z}
|
||||
N 700 -320 800 -320 {lab=G}
|
||||
N 700 -260 800 -260 {lab=#net1}
|
||||
N 480 -520 480 -490 { lab=VCC_FIVE}
|
||||
N 480 -520 920 -520 { lab=VCC_FIVE}
|
||||
N 920 -710 920 -520 { lab=VCC_FIVE}
|
||||
N 170 -710 310 -710 { lab=VCC_UNREG}
|
||||
N 170 -630 310 -630 { lab=VSSA}
|
||||
N 820 -710 920 -710 { lab=VCC_FIVE}
|
||||
N 230 -740 230 -710 { lab=VCC_UNREG}
|
||||
C {conn_3x1.sym} 300 -360 0 0 {name=C1}
|
||||
C {opin.sym} 1010 -300 0 0 {name=p0 lab=VOUT}
|
||||
C {lab_wire.sym} 810 -360 0 0 {name=l9 lab=G}
|
||||
C {res.sym} 920 -200 0 0 {name=Rload m=1 value=100 footprint=1206 device=resistor
|
||||
tedax_ignore=true}
|
||||
C {gnd.sym} 920 -150 0 0 {name=l10 lab=VSS}
|
||||
C {pnp.sym} 730 -390 0 0 {name=Q6
|
||||
model=BC857
|
||||
device=BC857
|
||||
footprint=SOT23
|
||||
url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=2ahUKEwijlfagu4zfAhUN0xoKHTPBAb0QFjAAegQIAhAC&url=http%3A%2F%2Fwww.onsemi.com%2Fpub%2FCollateral%2FPN2907-D.PDF&usg=AOvVaw2wgr87fGZgGfBRhXzHGwZM"}
|
||||
C {zener.sym} 480 -190 2 0 {name=x3
|
||||
model=BZX5V1
|
||||
device=BZX5V1
|
||||
footprint=acy(300)
|
||||
xxxspiceprefix="#D#"}
|
||||
C {lab_pin.sym} 480 -130 0 0 {name=l13 lab=VSSA}
|
||||
C {res.sym} 480 -460 0 0 {name=R4 m=1 value=4.7K footprint=1206 device=resistor}
|
||||
C {res.sym} 750 -200 0 0 {name=R5 m=1 value=470 footprint=1206 device=resistor}
|
||||
C {gnd.sym} 750 -150 0 0 {name=l16 lab=VSS}
|
||||
C {lab_wire.sym} 510 -390 0 0 {name=l0 lab=B}
|
||||
C {res.sym} 480 -340 0 0 {name=R2 m=1 value=510 footprint=1206 device=resistor}
|
||||
C {pmos.sym} 900 -360 0 0 {name=M2
|
||||
model=IRLML6402
|
||||
device=IRLML6402
|
||||
footprint=SOT23
|
||||
spiceprefix=X
|
||||
m=1
|
||||
url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=2ahUKEwjs8pzxuozfAhWpz4UKHR4CDnMQFjAAegQIAhAC&url=https%3A%2F%2Fwww.infineon.com%2Fdgdl%2Firlml6402.pdf%3FfileId%3D5546d462533600a401535668c9822638&usg=AOvVaw21fCRax-ssVpLqDeGK8KiC"}
|
||||
C {led.sym} 800 -290 0 0 {name=x1 model=D1N5765 device=D1N5765 area=1 footprint=acy(300)}
|
||||
C {title.sym} 160 -30 0 0 {name=l2 author="Igor2"}
|
||||
C {lab_pin.sym} 320 -340 0 1 {name=p6 lab=VOUT}
|
||||
C {lab_pin.sym} 320 -360 0 1 {name=p7 lab=VSSA}
|
||||
C {lab_pin.sym} 320 -380 0 1 {name=p8 lab=VCC_UNREG}
|
||||
C {zener.sym} 400 -190 2 0 {name=x4
|
||||
model=BZX5V1
|
||||
device=BZX5V1
|
||||
area=1
|
||||
footprint=minimelf
|
||||
spice_ignore=true}
|
||||
C {lab_pin.sym} 400 -130 0 0 {name=l1 lab=VSSA}
|
||||
C {res.sym} 700 -290 0 0 {name=R1 m=1 value=47K footprint=1206 device=resistor}
|
||||
C {lab_wire.sym} 480 -260 0 0 {name=l3 lab=Z}
|
||||
C {reg.sch} -120 -520 0 0 {name=x2}
|
||||
C {ipin.sym} 170 -710 0 0 {name=p3 lab=VCC_UNREG}
|
||||
C {ipin.sym} 170 -630 0 0 {name=p1 lab=VSSA}
|
||||
C {lab_wire.sym} 690 -520 0 0 {name=l4 lab=VCC_FIVE}
|
||||
C {diode.sym} 230 -770 0 0 {name=D1 model=D1N914 area=1 device=D1N914 footprint=acy(300)}
|
||||
C {vdd.sym} 230 -800 0 0 {name=l5 lab=VCC}
|
||||
Loading…
Reference in New Issue