removed some redundant calls in prepare_netlist_structs(), no full instance spatial rehash if adding a component, set template name initials for components in devices/ that do not map directly to spice elements to lowercase letters.

src/actions.c

@@ -922,6 +922,7 @@ int place_symbol(int pos, const char *symbol_name, double x, double y, int rot,
   if(pos==-1 || pos > xctx->instances) n=xctx->instances;
   else
   {
+   prepared_hash_instances = 0; /* instances moved so need to rebuild hash */
    for(j=xctx->instances;j>pos;j--)
    {
     xctx->inst[j]=xctx->inst[j-1];
@@ -967,7 +968,12 @@ int place_symbol(int pos, const char *symbol_name, double x, double y, int rot,
   if(first_call && (draw_sym & 3) ) bbox(BEGIN, 0.0 , 0.0 , 0.0 , 0.0);
 
   xctx->instances++; /* must be updated before calling symbol_bbox() */
-  prepared_hash_instances=0;
+
+
+  if(prepared_hash_instances) hash_inst(XINSERT, n); /* no need to rehash, add item */
+  /* prepared_hash_instances=0; */
+
+
   /* force these vars to 0 to trigger a prepare_netlist_structs(0) needed by symbol_bbox->translate
    * to translate @#n:net_name texts */
   prepared_netlist_structs=0;

src/netlist.c

@@ -642,6 +642,7 @@ void prepare_netlist_structs(int for_netlist)
 
   if (for_netlist>0 && prepared_netlist_structs) return;
   else if (!for_netlist && prepared_hilight_structs) return;
+  /* delete instance pins spatial hash, wires spatial hash, node_hash, wires and inst nodes.*/
   else delete_netlist_structs();
   if(netlist_count == 0 ) startlevel = xctx->currsch;
   print_erc =  netlist_count == 0 || startlevel < xctx->currsch;
@@ -651,12 +652,12 @@ void prepare_netlist_structs(int for_netlist)
     statusmsg(nn,2);
   }
   /* reset wire & inst node labels */
-  dbg(1, "prepare_netlist_structs(): resetting node hash tables\n");
+  dbg(2, "prepare_netlist_structs(): rehashing wires and instances in spatial hash table\n");
   hash_wires();
   for (i=0;i<instances;i++)
   {
     if (inst[i].ptr<0) continue;
-    delete_inst_node(i);
+    /* delete_inst_node(i); */ /* done in delete_netlist_structs() */
     rects=(inst[i].ptr+ xctx->sym)->rects[PINLAYER] +
           (inst[i].ptr+ xctx->sym)->rects[GENERICLAYER];
     if (rects > 0)
@@ -1034,7 +1035,7 @@ void prepare_netlist_structs(int for_netlist)
   my_free(839, &value);
   my_free(840, &class);
   my_free(841, &global_node);
-  dbg(1, "prepare_netlist_structs(): returning\n");
+  dbg(2, "prepare_netlist_structs(): returning\n");
 }
 
 int sym_vs_sch_pins()

xschem_library/devices/conn_10x2.sym

@@ -1,9 +1,10 @@
-v {xschem version=2.9.5_RC6 file_version=1.1}
-G {type=connector
+v {xschem version=2.9.8 file_version=1.2}
+G {}
+K {type=connector
 verilog_ignore=true
 format="*connector(8,1) @pinlist"
 tedax_format="footprint @name @footprint"
-template="name=C1 footprint=connector(8,1)"
+template="name=c1 footprint=connector(8,1)"
 }
 V {}
 S {}

xschem_library/devices/conn_14x1.sym

@@ -1,12 +1,13 @@
-v {xschem version=2.9.5_RC6 file_version=1.1}
-G {type=connector
+v {xschem version=2.9.8 file_version=1.2}
+G {}
+K {type=connector
 verilog_ignore=true
 format="*connector(8,1) @pinlist"
 tedax_format="footprint @name @footprint
 device @name @device
 value @name @value
 @comptag"
-template="name=C1 footprint=connector(14,1)"
+template="name=c1 footprint=connector(14,1)"
 }
 V {}
 S {}

xschem_library/devices/conn_3x1.sym

@@ -1,8 +1,9 @@
-v {xschem version=2.9.5_RC6 file_version=1.1}
-G {type=connector
+v {xschem version=2.9.8 file_version=1.2}
+G {}
+K {type=connector
 format="*connector(3,1) @pinlist"
 tedax_format="footprint @name @footprint"
-template="name=C1 footprint=connector(3,1)"
+template="name=c1 footprint=connector(3,1)"
 }
 V {}
 S {}

xschem_library/devices/conn_4x1.sym

@@ -1,8 +1,9 @@
-v {xschem version=2.9.5_RC6 file_version=1.1}
-G {type=connector
+v {xschem version=2.9.8 file_version=1.2}
+G {}
+K {type=connector
 format="*connector(3,1) @pinlist"
 tedax_format="footprint @name @footprint"
-template="name=C1 footprint=connector(3,1)"
+template="name=c1 footprint=connector(3,1)"
 }
 V {}
 S {}

xschem_library/devices/conn_8x1.sym

@@ -1,9 +1,10 @@
-v {xschem version=2.9.5_RC5 file_version=1.1}
-G {type=connector
+v {xschem version=2.9.8 file_version=1.2}
+G {}
+K {type=connector
 verilog_ignore=true
 format="*connector(8,1) @pinlist"
 tedax_format="footprint @name @footprint"
-template="name=C1 footprint=connector(8,1)"
+template="name=c1 footprint=connector(8,1)"
 }
 V {}
 S {}

xschem_library/devices/connector.sym

@@ -1,8 +1,9 @@
-v {xschem version=2.9.5_RC5 file_version=1.1}
-G {type=connector
+v {xschem version=2.9.8 file_version=1.2}
+G {}
+K {type=connector
 format="*connector(1,1) @pinlist"
 tedax_format="footprint @name @footprint"
-template="name=C1 footprint=connector(1,1)"}
+template="name=c1 footprint=connector(1,1)"}
 V {}
 S {}
 E {}

xschem_library/devices/flash_cell.sym

@@ -1,8 +1,9 @@
-v {xschem version=2.9.5_RC5 file_version=1.1}
-G {type=flash
+v {xschem version=2.9.8 file_version=1.2}
+G {}
+K {type=flash
 vhdl_stop=true
 format="@name @pinlist @model dvt=@dvt width=@width length=@length m=1" 
-template="name=x1 model=flash1 dvt=0 width=0.16u length=0.3u m=1"}
+template="name=X1 model=flash1 dvt=0 width=0.16u length=0.3u m=1"}
 V {}
 S {}
 E {}

xschem_library/examples/greycnt.sch

@@ -1,4 +1,4 @@
-v {xschem version=2.9.6 file_version=1.1}
+v {xschem version=2.9.8 file_version=1.2}
 G {process
 begin
   if now = 0 ns then
@@ -9,6 +9,7 @@ begin
   wait for 100 ns;
   A <= A + 1;
 end process;}
+K {}
 V {initial begin
   $dumpfile("dumpfile.vcd");
   $dumpvars;