"@#n:net_name" attribute (n = pin name or number) in symbols translates to net name attached to pin. "lab_show.sym" component that shows (does not assign) net name. "highlight=true" attribute can be given on instances in addition to symbols
This commit is contained in:
Stefan Schippers
parent
f699d187e6
commit
91e74fadcb
|
|
@ -123,6 +123,11 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
|
|||
<p> A <kbd>lock=true</kbd> attribute will make the symbol not editable. the only way to make it editable again is
|
||||
to right click on it to bring up the edit attributes dialog box and set to false. This is useful for title
|
||||
symbols. </p>
|
||||
<li><kbd>highlight</kbd></li>
|
||||
<p>If set to <kbd>true</kbd> the symbol will be highlighted when one of the nets attached to its pins are highlighted.</p>
|
||||
<li><kbd>net_name</kbd></li>
|
||||
<p>If set to <kbd>true</kbd> the <kbd>#n:net_name</kbd> symbol attributes will display the net names attached to pin terminals.
|
||||
the <kbd>n</kbd> is a pin number or name.</p>
|
||||
<li><kbd>place</kbd></li>
|
||||
<p> This
|
||||
<kbd>place=end</kbd> attribute is only valid only for <kbd>netlist_commands</kbd> type symbols, and tells
|
||||
|
|
|
|||
|
|
@ -155,6 +155,11 @@ type=nmos
|
|||
<p> same as above <kbd>_stop</kbd> attributes, but in this case the schematic subcircuit is completely ignored,
|
||||
only the 'format' string is dumped to netlist. No component/entity is generated in vhdl netlist,
|
||||
no module declaration in verilog, no .subckt in spice, no schematic global attributes are exported to netlist.</p>
|
||||
<li><kbd>highlight</kbd></li>
|
||||
<p>If set to <kbd>true</kbd> the symbol will be highlighted when one of the nets attached to its pins are highlighted.</p>
|
||||
<li><kbd>net_name</kbd></li>
|
||||
<p>If set to <kbd>true</kbd> the <kbd>#n:net_name</kbd> symbol attributes will display the net names attached to pin terminals.
|
||||
the <kbd>n</kbd> is a pin number or name.</p>
|
||||
<li><kbd>place</kbd></li>
|
||||
<p> this attribute is only useable in <kbd>netlist_commands</kbd> type symbols (<kbd>netlist.sym, code.sym,...</kbd>)
|
||||
if set to <kbd>end</kbd> it tells XSCHEM that
|
||||
|
|
@ -356,6 +361,9 @@ verilog_format="xnor #(@risedel , @falldel ) @name ( @@Z , @@A , @@B );"
|
|||
information defined in the instance name (example: U1:2, slot number 2 of IC U1).
|
||||
These tokens may be placed as text in the symbol graphic window, not in format strings.
|
||||
</p>
|
||||
<li><kbd>@#pin_name:net_name</kbd></li>
|
||||
<li><kbd>@#n:net_name</kbd></li>
|
||||
<p> these expand to the net name attached to pin with name <kbd>pin_name</kbd> or with sequence number <kbd>n</kbd>. </p>
|
||||
<li><kbd>@sch_last_modified</kbd></li>
|
||||
<p>
|
||||
this indicates the last modification time of the <kbd>.sch</kbd> file of the symbol.
|
||||
|
|
|
|||
|
|
@ -947,21 +947,21 @@ int place_symbol(int pos, const char *symbol_name, double x, double y, int rot,
|
|||
my_strdup2(13, &inst_ptr[n].instname, get_tok_value(inst_ptr[n].prop_ptr,"name",0) ); /* 20150409 */
|
||||
|
||||
type = instdef[inst_ptr[n].ptr].type; /* 20150409 */
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"opin") && strcmp(type,"iopin"));
|
||||
if(cond) inst_ptr[n].flags|=2;
|
||||
else inst_ptr[n].flags &=~2;
|
||||
|
||||
if(first_call && (draw_sym & 3) ) bbox(BEGIN, 0.0 , 0.0 , 0.0 , 0.0);
|
||||
|
||||
symbol_bbox(n, &inst_ptr[n].x1, &inst_ptr[n].y1,
|
||||
&inst_ptr[n].x2, &inst_ptr[n].y2);
|
||||
if(draw_sym & 3) bbox(ADD, inst_ptr[n].x1, inst_ptr[n].y1, inst_ptr[n].x2, inst_ptr[n].y2);
|
||||
lastinst++;
|
||||
set_modify(1);
|
||||
prepared_hash_instances=0; /* 20171224 */
|
||||
prepared_netlist_structs=0;
|
||||
prepared_hilight_structs=0;
|
||||
symbol_bbox(n, &inst_ptr[n].x1, &inst_ptr[n].y1,
|
||||
&inst_ptr[n].x2, &inst_ptr[n].y2);
|
||||
if(draw_sym & 3) bbox(ADD, inst_ptr[n].x1, inst_ptr[n].y1, inst_ptr[n].x2, inst_ptr[n].y2);
|
||||
set_modify(1);
|
||||
if(draw_sym&1) {
|
||||
bbox(SET , 0.0 , 0.0 , 0.0 , 0.0);
|
||||
draw();
|
||||
|
|
@ -1394,7 +1394,8 @@ void calc_drawing_bbox(Box *boundbox, int selected)
|
|||
int j, rects, found, hilight_connected_inst;
|
||||
type = (inst_ptr[i].ptr+instdef)->type; /* 20150409 */
|
||||
found = 0;
|
||||
hilight_connected_inst = !strcmp(get_tok_value((inst_ptr[i].ptr+instdef)->prop_ptr, "highlight", 0), "true");
|
||||
hilight_connected_inst = !strcmp(get_tok_value((inst_ptr[i].ptr+instdef)->prop_ptr, "highlight", 0), "true") ||
|
||||
!strcmp(get_tok_value(inst_ptr[i].prop_ptr, "highlight", 0), "true");
|
||||
if( hilight_connected_inst && (rects = (inst_ptr[i].ptr+instdef)->rects[PINLAYER]) > 0 ) {
|
||||
prepare_netlist_structs(0);
|
||||
for(j=0;j<rects;j++) {
|
||||
|
|
|
|||
|
|
@ -527,7 +527,7 @@ int callback(int event, int mx, int my, KeySym key,
|
|||
for(i=0;i<npin;i++) {
|
||||
my_strdup(24, &labname,get_tok_value(rect[i].prop_ptr,"name",0));
|
||||
my_strdup(25, &lab, expandlabel(labname, &mult));
|
||||
my_strdup(26, &netname, pin_node(j,i,&mult, 0));
|
||||
my_strdup(26, &netname, net_name(j,i,&mult, 0));
|
||||
dbg(1, "i=%d labname=%s explabname = %s net = %s\n", i, labname, lab, netname);
|
||||
if(netname && strcmp(lab, netname)) {
|
||||
dbg(1, "hilight: %s\n", netname);
|
||||
|
|
@ -1376,6 +1376,12 @@ int callback(int event, int mx, int my, KeySym key,
|
|||
}
|
||||
if(0 && key=='~' && (state & ControlMask)) /* testmode */
|
||||
{
|
||||
|
||||
int i;
|
||||
dbg(0, "prepared_netlist_structs=%d prepared_hilight_structs=%d\n", prepared_netlist_structs, prepared_hilight_structs);
|
||||
for(i = 0 ; i < lastinst; i++) {
|
||||
dbg(0, "instance: %s, %s flags=%d\n", inst_ptr[i].name, inst_ptr[i].instname, inst_ptr[i].flags);
|
||||
}
|
||||
break;
|
||||
}
|
||||
if(0 && (key=='|') && !(state&ControlMask)) /* testmode */
|
||||
|
|
|
|||
18
src/draw.c
18
src/draw.c
|
|
@ -1629,11 +1629,14 @@ void draw(void)
|
|||
type &&
|
||||
(
|
||||
(
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"iopin") && strcmp(type,"opin")) &&
|
||||
bus_hilight_lookup( get_tok_value(inst_ptr[i].prop_ptr,"lab",0) , 0, XLOOKUP )
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"iopin") && strcmp(type,"opin")) &&
|
||||
inst_ptr[i].node && inst_ptr[i].node[0] &&
|
||||
bus_hilight_lookup(inst_ptr[i].node[0], 0, XLOOKUP )
|
||||
) ||
|
||||
(
|
||||
(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"iopin") && strcmp(type,"opin")) &&
|
||||
(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"iopin") && strcmp(type,"opin")) &&
|
||||
(inst_ptr[i].flags & 4)
|
||||
)
|
||||
)
|
||||
|
|
@ -1663,11 +1666,14 @@ void draw(void)
|
|||
type &&
|
||||
(
|
||||
(
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"iopin") && strcmp(type,"opin")) &&
|
||||
bus_hilight_lookup( get_tok_value(inst_ptr[i].prop_ptr,"lab",0) , 0, XLOOKUP )
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"iopin") && strcmp(type,"opin")) &&
|
||||
inst_ptr[i].node && inst_ptr[i].node[0] &&
|
||||
bus_hilight_lookup(inst_ptr[i].node[0], 0, XLOOKUP )
|
||||
) ||
|
||||
(
|
||||
(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"iopin") && strcmp(type,"opin")) &&
|
||||
(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"iopin") && strcmp(type,"opin")) &&
|
||||
(inst_ptr[i].flags & 4)
|
||||
)
|
||||
)
|
||||
|
|
|
|||
|
|
@ -1064,7 +1064,7 @@ void update_symbol(const char *result, int x)
|
|||
new_prop_string(i, ptr, k, disable_unique_names); /* set new prop_ptr */
|
||||
|
||||
type=instdef[inst_ptr[i].ptr].type; /* 20150409 */
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"opin") && strcmp(type,"iopin"));
|
||||
if(cond) inst_ptr[i].flags|=2; /* bit 1: flag for different textlayer for pin/labels */
|
||||
else inst_ptr[i].flags &=~2;
|
||||
|
|
|
|||
|
|
@ -474,7 +474,7 @@ int search(const char *tok, const char *val, int sub, int sel, int what)
|
|||
if(!sel) { /*20190525 */
|
||||
type = (inst_ptr[i].ptr+instdef)->type;
|
||||
if( type &&
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"iopin") && strcmp(type,"opin"))
|
||||
) {
|
||||
if(!bus_hilight_lookup(inst_ptr[i].node[0], col, XINSERT)) hilight_nets = 1;
|
||||
|
|
@ -647,15 +647,15 @@ void drill_hilight(void)
|
|||
npin = symbol->rects[PINLAYER];
|
||||
rect=symbol->boxptr[PINLAYER];
|
||||
for(j=0; j<npin;j++) {
|
||||
my_strdup(143, &netname, pin_node(i, j, &mult, 1));
|
||||
my_strdup(143, &netname, net_name(i, j, &mult, 1));
|
||||
propagate_str=get_tok_value(rect[j].prop_ptr, "propagate_to", 0);
|
||||
if(propagate_str[0] && (entry=bus_hilight_lookup(netname, 0, XLOOKUP))) {
|
||||
propagate = atoi(propagate_str);
|
||||
my_strdup(144, &propagated_net, pin_node(i, propagate, &mult, 1)); /* get net to propagate highlight to... */
|
||||
my_strdup(144, &propagated_net, net_name(i, propagate, &mult, 1)); /* get net to propagate highlight to... */
|
||||
propag_entry = bus_hilight_lookup(propagated_net, entry->value, XINSERT); /* add net to highlight list */
|
||||
if(!propag_entry) {
|
||||
/* fprintf(errfp, "inst %s: j=%d count=%d propagate=%d --> net %s, propagate to --> %s color %d\n", */
|
||||
/* inst_ptr[i].instname, j, count, propagate, netname, pin_node(i, propagate, &mult, 1), entry->value); */
|
||||
/* inst_ptr[i].instname, j, count, propagate, netname, net_name(i, propagate, &mult, 1), entry->value); */
|
||||
found=1; /* keep looping until no more nets are found. */
|
||||
}
|
||||
|
||||
|
|
@ -742,7 +742,7 @@ void hilight_net(int to_waveform)
|
|||
type = (inst_ptr[n].ptr+instdef)->type;
|
||||
if( type &&
|
||||
inst_ptr[n].node && /* instance must have a pin! */
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"iopin") && strcmp(type,"opin") )
|
||||
)
|
||||
{
|
||||
|
|
@ -805,7 +805,7 @@ void unhilight_net(void)
|
|||
type = (inst_ptr[n].ptr+instdef)->type;
|
||||
if( type &&
|
||||
inst_ptr[n].node && /* instance must have a pin! */
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"iopin") && strcmp(type,"opin") )
|
||||
)
|
||||
{
|
||||
|
|
@ -919,7 +919,8 @@ void draw_hilight_net(int on_window)
|
|||
|
||||
type = (inst_ptr[i].ptr+instdef)->type; /* 20150409 */
|
||||
|
||||
hilight_connected_inst = !strcmp(get_tok_value((inst_ptr[i].ptr+instdef)->prop_ptr, "highlight", 0), "true");
|
||||
hilight_connected_inst = !strcmp(get_tok_value((inst_ptr[i].ptr+instdef)->prop_ptr, "highlight", 0), "true") ||
|
||||
!strcmp(get_tok_value(inst_ptr[i].prop_ptr, "highlight", 0), "true");
|
||||
if( inst_ptr[i].flags & 4) {
|
||||
dbg(1, "draw_hilight_net(): instance %d flags &4 true\n", i);
|
||||
inst_color[i]=PINLAYER;
|
||||
|
|
@ -939,7 +940,7 @@ void draw_hilight_net(int on_window)
|
|||
}
|
||||
}
|
||||
} else if( type &&
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
!(strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"iopin") && strcmp(type,"opin") )
|
||||
)
|
||||
{
|
||||
|
|
|
|||
18
src/move.c
18
src/move.c
|
|
@ -805,7 +805,6 @@ void copy_objects(int what)
|
|||
ROTATION(x1, y_1, inst_ptr[n].x0, inst_ptr[n].y0, rx1,ry1);
|
||||
}
|
||||
inst_ptr[lastinst] = inst_ptr[n];
|
||||
inst_ptr[lastinst].flags &= ~4; /* do not propagate hilight */
|
||||
inst_ptr[lastinst].prop_ptr=NULL;
|
||||
inst_ptr[lastinst].instname=NULL; /* 20150409 */
|
||||
inst_ptr[lastinst].node=NULL;
|
||||
|
|
@ -814,6 +813,8 @@ void copy_objects(int what)
|
|||
my_strdup(233, &inst_ptr[lastinst].prop_ptr, inst_ptr[n].prop_ptr);
|
||||
my_strdup2(234, &inst_ptr[lastinst].instname, get_tok_value(inst_ptr[n].prop_ptr, "name",0)); /* 20150409 */
|
||||
inst_ptr[n].sel=0;
|
||||
inst_ptr[lastinst].flags = inst_ptr[n].flags;
|
||||
inst_ptr[lastinst].flags &= ~4; /* do not propagate hilight */
|
||||
inst_ptr[lastinst].x0 = rx1+deltax;
|
||||
inst_ptr[lastinst].y0 = ry1+deltay;
|
||||
inst_ptr[lastinst].sel = SELECTED;
|
||||
|
|
@ -826,13 +827,13 @@ void copy_objects(int what)
|
|||
/* new_prop_string() for cleaning some internal caches. */
|
||||
my_strdup2(235, &inst_ptr[lastinst].instname, get_tok_value(inst_ptr[lastinst].prop_ptr, "name", 0)); /* 20150409 */
|
||||
n=selectedgroup[i].n=lastinst;
|
||||
symbol_bbox(lastinst, &inst_ptr[lastinst].x1, &inst_ptr[lastinst].y1,
|
||||
&inst_ptr[lastinst].x2, &inst_ptr[lastinst].y2);
|
||||
bbox(ADD, inst_ptr[lastinst].x1, inst_ptr[lastinst].y1, inst_ptr[lastinst].x2, inst_ptr[lastinst].y2 );
|
||||
prepared_netlist_structs=0;
|
||||
prepared_hilight_structs=0;
|
||||
lastinst++;
|
||||
symbol_bbox(n, &inst_ptr[n].x1, &inst_ptr[n].y1,
|
||||
&inst_ptr[n].x2, &inst_ptr[n].y2);
|
||||
bbox(ADD, inst_ptr[n].x1, inst_ptr[n].y1, inst_ptr[n].x2, inst_ptr[n].y2 );
|
||||
}
|
||||
|
||||
/* draw_symbol(ADD,k, n,k, 0, 0, 0.0, 0.0); */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -840,7 +841,6 @@ void copy_objects(int what)
|
|||
drawarc(k, END, 0.0, 0.0, 0.0, 0.0, 0.0, 0, 0);
|
||||
drawrect(k, END, 0.0, 0.0, 0.0, 0.0, 0);
|
||||
drawline(k, END, 0.0, 0.0, 0.0, 0.0, 0);
|
||||
|
||||
} /* end for(k ... */
|
||||
check_collapsing_objects();
|
||||
update_conn_cues(1, 1);
|
||||
|
|
@ -927,7 +927,6 @@ void move_objects(int what, int merge, double dx, double dy)
|
|||
prepared_hash_wires=0; /* 20171224 */
|
||||
prepared_netlist_structs=0;
|
||||
prepared_hilight_structs=0;
|
||||
|
||||
|
||||
if( !(ui_state & (STARTMERGE | PLACE_SYMBOL)) ) {
|
||||
dbg(1, "move_objects(): push undo state\n");
|
||||
|
|
@ -1277,6 +1276,9 @@ void move_objects(int what, int merge, double dx, double dy)
|
|||
inst_ptr[n].rot = (inst_ptr[n].rot +
|
||||
( (flip && (inst_ptr[n].rot & 1) ) ? rot+2 : rot) ) & 0x3;
|
||||
inst_ptr[n].flip = flip ^ inst_ptr[n].flip;
|
||||
|
||||
prepared_netlist_structs=0;
|
||||
prepared_hilight_structs=0;
|
||||
symbol_bbox(n, &inst_ptr[n].x1, &inst_ptr[n].y1,
|
||||
&inst_ptr[n].x2, &inst_ptr[n].y2);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -618,7 +618,6 @@ void prepare_netlist_structs(int for_netlist)
|
|||
double rx1,ry1;
|
||||
struct wireentry *wptr;
|
||||
struct instpinentry *iptr;
|
||||
struct node_hashentry;
|
||||
int i,j, rects, generic_rects;
|
||||
char *dir=NULL;
|
||||
char *type=NULL;
|
||||
|
|
@ -712,11 +711,14 @@ void prepare_netlist_structs(int for_netlist)
|
|||
}
|
||||
|
||||
my_strdup(262, &inst_ptr[i].node[0], get_tok_value(inst_ptr[i].prop_ptr,"lab",1));
|
||||
|
||||
/* taking node lab from sym template has no sense */
|
||||
#if 0
|
||||
if (!(inst_ptr[i].node[0])) {
|
||||
my_strdup(65, &inst_ptr[i].node[0], get_tok_value((inst_ptr[i].ptr+instdef)->templ, "lab",1));
|
||||
dbg(1, "no lab attr on instance, pick from symbol: %s\n", inst_ptr[i].node[0]);
|
||||
}
|
||||
|
||||
#endif
|
||||
/* handle global nodes (global=1 set as symbol property) 28032003 */
|
||||
if (!strcmp(type,"label") && global_node && !strcmp(global_node, "true")) {
|
||||
dbg(1, "prepare_netlist_structs(): global node: %s\n",inst_ptr[i].node[0]);
|
||||
|
|
|
|||
|
|
@ -275,7 +275,7 @@ void match_merged_inst(int old)
|
|||
&inst_ptr[i].x2, &inst_ptr[i].y2);
|
||||
/* type=get_tok_value(instdef[inst_ptr[i].ptr].prop_ptr,"type",0); */
|
||||
type=instdef[inst_ptr[i].ptr].type; /* 20150409 */
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"opin") && strcmp(type,"iopin"));
|
||||
if(cond) inst_ptr[i].flags|=2;
|
||||
else inst_ptr[i].flags &=~2;
|
||||
|
|
|
|||
|
|
@ -944,7 +944,7 @@ void link_symbols_to_instances(void) /* 20150326 separated from load_schematic()
|
|||
symbol_bbox(i, &inst_ptr[i].x1, &inst_ptr[i].y1,
|
||||
&inst_ptr[i].x2, &inst_ptr[i].y2);
|
||||
type=instdef[inst_ptr[i].ptr].type;
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"opin") && strcmp(type,"iopin"));
|
||||
if(cond) inst_ptr[i].flags|=2;
|
||||
else inst_ptr[i].flags &=~2;
|
||||
|
|
|
|||
|
|
@ -583,7 +583,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
|
|||
my_strdup2(372, &inst_ptr[inst].instname, get_tok_value(inst_ptr[inst].prop_ptr, "name",0)); /* 20150409 */
|
||||
|
||||
type=instdef[inst_ptr[inst].ptr].type; /* 20150409 */
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") &&
|
||||
cond= !type || (strcmp(type,"label") && strcmp(type,"ipin") && strcmp(type,"show_label") &&
|
||||
strcmp(type,"opin") && strcmp(type,"iopin"));
|
||||
if(cond) inst_ptr[inst].flags|=2;
|
||||
else inst_ptr[inst].flags &=~2;
|
||||
|
|
@ -745,7 +745,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
|
|||
for(p=0;p<no_of_pins;p++) {
|
||||
if(!strcmp( get_tok_value((inst_ptr[i].ptr+instdef)->boxptr[PINLAYER][p].prop_ptr,"name",0), argv[3])) {
|
||||
/*str_ptr = inst_ptr[i].node[p] ? inst_ptr[i].node[p]: "<UNCONNECTED PIN>"; */
|
||||
str_ptr = pin_node(i,p,&mult, 0);
|
||||
str_ptr = net_name(i,p,&mult, 0);
|
||||
break;
|
||||
}
|
||||
} /* /20171029 */
|
||||
|
|
|
|||
24
src/select.c
24
src/select.c
|
|
@ -39,6 +39,7 @@ void symbol_bbox(int i, double *x1,double *y1, double *x2, double *y2)
|
|||
int sym_rot, sym_flip;
|
||||
double xx1,yy1,xx2,yy2;
|
||||
|
||||
|
||||
#ifdef HAS_CAIRO
|
||||
int customfont;
|
||||
#endif
|
||||
|
|
@ -248,17 +249,25 @@ void delete(void)
|
|||
}
|
||||
lasttext -= j;
|
||||
j = 0;
|
||||
|
||||
prepared_hash_instances=0;
|
||||
prepared_netlist_structs=0;
|
||||
prepared_hilight_structs=0;
|
||||
/* first calculate bbox, because symbol_bbox() needs translate (@#0:net_name) which needs prepare_netlist_structs
|
||||
* which needs a consistent inst_ptr[] data structure */
|
||||
for(i=0;i<lastinst;i++)
|
||||
{
|
||||
if(inst_ptr[i].sel == SELECTED)
|
||||
{
|
||||
symbol_bbox(i, &inst_ptr[i].x1, &inst_ptr[i].y1, &inst_ptr[i].x2, &inst_ptr[i].y2); /*20171201 */
|
||||
bbox(ADD, inst_ptr[i].x1, inst_ptr[i].y1, inst_ptr[i].x2, inst_ptr[i].y2);
|
||||
}
|
||||
}
|
||||
for(i=0;i<lastinst;i++)
|
||||
{
|
||||
if(inst_ptr[i].sel == SELECTED)
|
||||
{
|
||||
set_modify(1);
|
||||
prepared_hash_instances=0;
|
||||
prepared_netlist_structs=0;
|
||||
prepared_hilight_structs=0;
|
||||
|
||||
symbol_bbox(i, &inst_ptr[i].x1, &inst_ptr[i].y1, &inst_ptr[i].x2, &inst_ptr[i].y2); /*20171201 */
|
||||
bbox(ADD, inst_ptr[i].x1, inst_ptr[i].y1, inst_ptr[i].x2, inst_ptr[i].y2);
|
||||
if(inst_ptr[i].prop_ptr != NULL)
|
||||
{
|
||||
my_free(938, &inst_ptr[i].prop_ptr);
|
||||
|
|
@ -476,6 +485,7 @@ void unselect_all(void)
|
|||
}
|
||||
}
|
||||
|
||||
prepared_hilight_structs = 0;
|
||||
for(i=0;i<lastinst;i++)
|
||||
{
|
||||
if(inst_ptr[i].sel == SELECTED)
|
||||
|
|
@ -620,7 +630,7 @@ void select_element(int i,unsigned short select_mode, int fast, int override_loc
|
|||
statusmsg(str,2);
|
||||
/* 20190526 */ /*Why this? 20191125 only on small schematics. slow down on big schematics */
|
||||
if(lastinst < 150) {
|
||||
prepare_netlist_structs(1);
|
||||
prepare_netlist_structs(0);
|
||||
for(j=0;j< (inst_ptr[i].ptr+instdef)->rects[PINLAYER] ;j++)
|
||||
{
|
||||
if(inst_ptr[i].node && (inst_ptr[i].ptr+instdef)->boxptr[PINLAYER][j].prop_ptr)
|
||||
|
|
|
|||
53
src/token.c
53
src/token.c
|
|
@ -1120,7 +1120,7 @@ void print_vhdl_element(FILE *fd, int inst) /* 20071217 */
|
|||
for(i=0;i<no_of_pins;i++)
|
||||
{
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"vhdl_ignore",0), "true")) {
|
||||
if( (str_ptr = pin_node(inst,i, &mult, 0)) )
|
||||
if( (str_ptr = net_name(inst,i, &mult, 0)) )
|
||||
{
|
||||
if(tmp) fprintf(fd, " ,\n");
|
||||
fprintf(fd, " %s => %s",
|
||||
|
|
@ -1568,7 +1568,7 @@ void print_spice_element(FILE *fd, int inst)
|
|||
for(i=0;i<no_of_pins;i++)
|
||||
{
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"spice_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,i, &mult, 0);
|
||||
str_ptr = net_name(inst,i, &mult, 0);
|
||||
/* fprintf(errfp, "inst: %s --> %s\n", name, str_ptr); */
|
||||
fprintf(fd, "@%d %s ", mult, str_ptr);
|
||||
}
|
||||
|
|
@ -1580,7 +1580,7 @@ void print_spice_element(FILE *fd, int inst)
|
|||
get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"name",0),
|
||||
token+2)) {
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"spice_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,i, &mult, 0);
|
||||
str_ptr = net_name(inst,i, &mult, 0);
|
||||
fprintf(fd, "@%d %s", mult, str_ptr);
|
||||
}
|
||||
break; /* 20171029 */
|
||||
|
|
@ -1592,7 +1592,7 @@ void print_spice_element(FILE *fd, int inst)
|
|||
pin_number = atoi(token+2);
|
||||
if (pin_number < no_of_pins) {
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][pin_number].prop_ptr,"spice_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,pin_number, &mult, 0);
|
||||
str_ptr = net_name(inst,pin_number, &mult, 0);
|
||||
fprintf(fd, "@%d %s ", mult, str_ptr);
|
||||
}
|
||||
}
|
||||
|
|
@ -1690,7 +1690,7 @@ void print_tedax_element(FILE *fd, int inst)
|
|||
my_strdup2(500, &pinnumber, get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"pinnumber",0));
|
||||
}
|
||||
if(!get_tok_size) my_strdup(501, &pinnumber, "--UNDEF--");
|
||||
tmp = pin_node(inst,i, &mult, 0);
|
||||
tmp = net_name(inst,i, &mult, 0);
|
||||
if(tmp && strcmp(tmp, "<UNCONNECTED_PIN>")) {
|
||||
fprintf(fd, "conn %s %s %s %s %d\n",
|
||||
name,
|
||||
|
|
@ -1788,7 +1788,7 @@ void print_tedax_element(FILE *fd, int inst)
|
|||
{ /* and node number: m1 n1 m2 n2 .... */
|
||||
for(i=0;i<no_of_pins;i++)
|
||||
{
|
||||
str_ptr = pin_node(inst,i, &mult, 0);
|
||||
str_ptr = net_name(inst,i, &mult, 0);
|
||||
/* fprintf(errfp, "inst: %s --> %s\n", name, str_ptr); */
|
||||
fprintf(fd, "@%d %s ", mult, str_ptr);
|
||||
}
|
||||
|
|
@ -1800,7 +1800,7 @@ void print_tedax_element(FILE *fd, int inst)
|
|||
token+2
|
||||
)
|
||||
) {
|
||||
str_ptr = pin_node(inst,i, &mult, 0);
|
||||
str_ptr = net_name(inst,i, &mult, 0);
|
||||
fprintf(fd, "%s", str_ptr);
|
||||
break; /* 20171029 */
|
||||
}
|
||||
|
|
@ -1847,7 +1847,7 @@ void print_tedax_element(FILE *fd, int inst)
|
|||
/* @#n --> return net name attached to pin of index 'n' */
|
||||
pin_number = atoi(token+2);
|
||||
if(pin_number < no_of_pins) {
|
||||
str_ptr = pin_node(inst,pin_number, &mult, 0);
|
||||
str_ptr = net_name(inst,pin_number, &mult, 0);
|
||||
fprintf(fd, "%s", str_ptr);
|
||||
}
|
||||
}
|
||||
|
|
@ -2032,7 +2032,7 @@ void print_verilog_element(FILE *fd, int inst)
|
|||
for(i=0;i<no_of_pins;i++)
|
||||
{
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"verilog_ignore",0), "true")) {
|
||||
if( (str_ptr = pin_node(inst,i, &mult, 0)) )
|
||||
if( (str_ptr = net_name(inst,i, &mult, 0)) )
|
||||
{
|
||||
if(tmp) fprintf(fd,"\n");
|
||||
fprintf(fd, " @%d %s %s ", mult,
|
||||
|
|
@ -2052,19 +2052,19 @@ void print_verilog_element(FILE *fd, int inst)
|
|||
}
|
||||
|
||||
|
||||
const char *pin_node(int i, int j, int *mult, int hash_prefix_unnamed_net)
|
||||
const char *net_name(int i, int j, int *mult, int hash_prefix_unnamed_net)
|
||||
{
|
||||
int tmp;
|
||||
char errstr[2048];
|
||||
static const char unconn[]="<UNCONNECTED_PIN>";
|
||||
char str_node[40]; /* 20161122 overflow safe */
|
||||
if(inst_ptr[i].node[j]!=NULL)
|
||||
if(inst_ptr[i].node && inst_ptr[i].node[j]!=NULL)
|
||||
{
|
||||
if((inst_ptr[i].node[j])[0] == '#') /* unnamed net */
|
||||
{
|
||||
/* get unnamed node multiplicity ( minimum mult found in circuit) */
|
||||
*mult = get_unnamed_node(3, 0, atoi((inst_ptr[i].node[j])+4) );
|
||||
dbg(2, "pin_node(): node = %s n=%d mult=%d\n",
|
||||
dbg(2, "net_name(): node = %s n=%d mult=%d\n",
|
||||
inst_ptr[i].node[j], atoi(inst_ptr[i].node[j]), *mult);
|
||||
if(hash_prefix_unnamed_net) {
|
||||
if(*mult>1) /* unnamed is a bus */
|
||||
|
|
@ -2205,7 +2205,7 @@ void print_vhdl_primitive(FILE *fd, int inst) /* netlist primitives, 20071217 *
|
|||
for(i=0;i<no_of_pins;i++)
|
||||
{
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"vhdl_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,i, &mult, 0);
|
||||
str_ptr = net_name(inst,i, &mult, 0);
|
||||
fprintf(fd, "----pin(%s) ", str_ptr);
|
||||
}
|
||||
}
|
||||
|
|
@ -2217,7 +2217,7 @@ void print_vhdl_primitive(FILE *fd, int inst) /* netlist primitives, 20071217 *
|
|||
token+2
|
||||
)) {
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"vhdl_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,i, &mult, 0);
|
||||
str_ptr = net_name(inst,i, &mult, 0);
|
||||
fprintf(fd, "----pin(%s) ", str_ptr);
|
||||
}
|
||||
break; /* 20171029 */
|
||||
|
|
@ -2229,7 +2229,7 @@ void print_vhdl_primitive(FILE *fd, int inst) /* netlist primitives, 20071217 *
|
|||
pin_number = atoi(token+2);
|
||||
if(pin_number < no_of_pins) {
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][pin_number].prop_ptr,"vhdl_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,pin_number, &mult, 0);
|
||||
str_ptr = net_name(inst,pin_number, &mult, 0);
|
||||
fprintf(fd, "----pin(%s) ", str_ptr);
|
||||
}
|
||||
}
|
||||
|
|
@ -2374,7 +2374,7 @@ void print_verilog_primitive(FILE *fd, int inst) /* netlist switch level primiti
|
|||
for(i=0;i<no_of_pins;i++)
|
||||
{
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"verilog_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,i, &mult, 0);
|
||||
str_ptr = net_name(inst,i, &mult, 0);
|
||||
fprintf(fd, "----pin(%s) ", str_ptr);
|
||||
}
|
||||
}
|
||||
|
|
@ -2385,7 +2385,7 @@ void print_verilog_primitive(FILE *fd, int inst) /* netlist switch level primiti
|
|||
get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"name",0),
|
||||
token+2)) {
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][i].prop_ptr,"verilog_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,i, &mult, 0);
|
||||
str_ptr = net_name(inst,i, &mult, 0);
|
||||
fprintf(fd, "----pin(%s) ", str_ptr);
|
||||
}
|
||||
break; /* 20171029 */
|
||||
|
|
@ -2397,7 +2397,7 @@ void print_verilog_primitive(FILE *fd, int inst) /* netlist switch level primiti
|
|||
pin_number = atoi(token+2);
|
||||
if(pin_number < no_of_pins) {
|
||||
if(strcmp(get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][pin_number].prop_ptr,"verilog_ignore",0), "true")) {
|
||||
str_ptr = pin_node(inst,pin_number, &mult, 0);
|
||||
str_ptr = net_name(inst,pin_number, &mult, 0);
|
||||
fprintf(fd, "----pin(%s) ", str_ptr);
|
||||
}
|
||||
}
|
||||
|
|
@ -2546,9 +2546,11 @@ const char *translate(int inst, char* s)
|
|||
if(!spiceprefix && !strcmp(token, "@spiceprefix")) {
|
||||
value = NULL;
|
||||
get_tok_size = 0;
|
||||
} else if(!strcmp(token, "@lab")) { /* don't get '@lab' value from symbol template, makes no sense */
|
||||
value = get_tok_value(inst_ptr[inst].prop_ptr, token+1, 2);
|
||||
} else {
|
||||
value = get_tok_value(inst_ptr[inst].prop_ptr, token+1, 2);
|
||||
if(!get_tok_size) value=get_tok_value((inst_ptr[inst].ptr+instdef)->templ, token+1, 2); /* 20190310 2 instead of 0 */
|
||||
if(!get_tok_size) value=get_tok_value((inst_ptr[inst].ptr+instdef)->templ, token+1, 2);
|
||||
}
|
||||
|
||||
if(!get_tok_size && token[0] =='$') {
|
||||
|
|
@ -2612,7 +2614,18 @@ const char *translate(int inst, char* s)
|
|||
if(!pinnumber) {
|
||||
my_strdup2(499, &pinnumber, get_tok_value((inst_ptr[inst].ptr+instdef)->boxptr[PINLAYER][n].prop_ptr, pin_attr, 2));
|
||||
}
|
||||
if(!get_tok_size) my_strdup(379, &pinnumber, "--UNDEF--");
|
||||
/* @#n:net_name attribute (n = pin number or name) will translate to net name attached to pin
|
||||
* if 'net_name=true' attribute is set in instance or symbol */
|
||||
if(!pinnumber[0] && !strcmp(pin_attr, "net_name")) {
|
||||
prepare_netlist_structs(0);
|
||||
if(!strcmp(get_tok_value(inst_ptr[inst].prop_ptr, "net_name", 0), "true") ||
|
||||
!strcmp(get_tok_value( (inst_ptr[inst].ptr + instdef)->prop_ptr, "net_name", 0), "true")
|
||||
) {
|
||||
my_strdup2(1175, &pinnumber, inst_ptr[inst].node && inst_ptr[inst].node[n] ? inst_ptr[inst].node[n] : "");
|
||||
}
|
||||
} else {
|
||||
if(!pinnumber[0]) my_strdup(379, &pinnumber, "--UNDEF--");
|
||||
}
|
||||
value = pinnumber;
|
||||
if(value[0] != 0) {
|
||||
char *ss;
|
||||
|
|
|
|||
|
|
@ -17,9 +17,11 @@ END { endfile(_filename_) }
|
|||
BEGIN{
|
||||
}
|
||||
|
||||
/Tcl_GetStringResult\(interp\)/{
|
||||
|
||||
# T {@#3:net_name} 25 1.25 0 0 0.15 0.15 {layer=2}
|
||||
/^T {.*net_name.*layer=12/{
|
||||
found = 1
|
||||
gsub(/Tcl_GetStringResult\(interp\)/, "tclresult()")
|
||||
sub(/layer=12/, "layer=15")
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -955,7 +955,7 @@ extern void select_box(int c, int i, unsigned short select_mode, int fast);
|
|||
extern void select_arc(int c, int i, unsigned short select_mode, int fast);
|
||||
extern void select_line(int c, int i, unsigned short select_mode, int fast);
|
||||
extern void select_polygon(int c, int i, unsigned short select_mode, int fast );
|
||||
extern const char *pin_node(int i, int j, int *mult, int hash_prefix_unnamed_net);
|
||||
extern const char *net_name(int i, int j, int *mult, int hash_prefix_unnamed_net);
|
||||
extern int record_global_node(int what, FILE *fp, char *node);
|
||||
extern int count_labels(char *s);
|
||||
extern int get_unnamed_node(int what, int mult, int node);
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC8 file_version=1.1}
|
||||
G {type=current_probe
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=current_probe
|
||||
format="@name @pinlist 0"
|
||||
template="name=Vmeas"}
|
||||
V {}
|
||||
|
|
@ -12,3 +13,5 @@ B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout propagate_to=1}
|
|||
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout propagate_to=0}
|
||||
T {@name} 10 -17.5 0 0 0.2 0.2 {}
|
||||
T {@current} 10 12.5 0 0 0.2 0.2 {layer=15}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @pinlist @function"
|
||||
template="name=B1 function=\\"v=tanh(v(1))\\""
|
||||
}
|
||||
|
|
@ -14,3 +15,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
|
|||
A 4 0 0 15 270 360 {}
|
||||
T {@function} 20 0 0 0 0.2 0.2 {}
|
||||
T {@name} 20 -17.5 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC7 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @pinlist @VAR = @FUNC "
|
||||
template="name=B1 VAR=I FUNC=\\"pwl(V(plus,minus),0,0, 1,10m, 2, 100m)\\""}
|
||||
V {}
|
||||
|
|
@ -16,3 +17,5 @@ A 4 0 0 15 270 360 {}
|
|||
T {@name} 20 -17.5 0 0 0.2 0.2 {}
|
||||
T {@VAR
|
||||
@FUNC} 20 0 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=polarized_capacitor
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=polarized_capacitor
|
||||
format="@name @pinlist @value m=@m"
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
|
|
@ -27,3 +28,5 @@ T {@value} 15 0 0 0 0.25 0.2 {}
|
|||
T {@name} 15 -13.75 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -5 16.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=capacitor
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=capacitor
|
||||
format="@name @pinlist @value m=@m"
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
|
|
@ -23,7 +24,10 @@ L 4 2.5 -22.5 7.5 -22.5 {}
|
|||
L 4 5 -25 5 -20 {}
|
||||
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout pinnumber=1}
|
||||
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout pinnumber=2}
|
||||
T {@value} 15 0 0 0 0.25 0.2 {}
|
||||
T {@name} 15 -13.75 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -5 16.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@name} 20 -18.75 0 0 0.2 0.2 {}
|
||||
T {@value} 20 -3.75 0 0 0.2 0.2 {}
|
||||
T {m=@m} 20 11.25 0 0 0.2 0.2 {}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=vcvs
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=vcvs
|
||||
format="@name @pinlist @vnam @value"
|
||||
template="name=F1 vnam=v1 value=1"}
|
||||
V {}
|
||||
|
|
@ -20,3 +21,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=in}
|
|||
T {@value} 25 10 0 0 0.2 0.2 {}
|
||||
T {@name} 25 -15 0 0 0.2 0.2 {}
|
||||
T {@vnam} 25 -2.5 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=vcvs
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=vcvs
|
||||
format="@name @pinlist @vnam @value"
|
||||
template="name=H1 vnam=v1 value=1"}
|
||||
V {}
|
||||
|
|
@ -17,3 +18,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
|
|||
T {@value} 25 10 0 0 0.2 0.2 {}
|
||||
T {@name} 25 -15 0 0 0.2 0.2 {}
|
||||
T {@vnam} 25 -2.5 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=crystal
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=crystal
|
||||
format="@name @pinlist @symname"
|
||||
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
|
||||
tedax_format="footprint @name @footprint
|
||||
|
|
@ -25,3 +26,5 @@ T {@name} 25 -13.75 0 0 0.2 0.2 {}
|
|||
T {@value} 25 1.25 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.7 file_version=1.2}
|
||||
G {type=diode
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=diode
|
||||
format="@name @pinlist @model area=@area"
|
||||
template="name=D1 model=D1N914 area=1"}
|
||||
V {}
|
||||
|
|
@ -15,3 +16,5 @@ T {@name} 2.5 -20 0 0 0.2 0.2 {}
|
|||
T {@model} 5 12.5 0 0 0.25 0.2 {}
|
||||
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -5 17.5 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=inductor
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=inductor
|
||||
format="@name @pinlist @value m=@m"
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
|
|
@ -64,7 +65,10 @@ L 4 7.5 -26.25 7.5 -21.25 {}
|
|||
L 4 5 -23.75 10 -23.75 {}
|
||||
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout propagate_to=1 pinnumber=1}
|
||||
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout propagate_to=0 pinnumber=2}
|
||||
T {@value} 15 0 0 0 0.25 0.2 {}
|
||||
T {@name} 15 -17.5 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} -10 -27.5 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -10 17.5 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@name} 15 -18.75 0 0 0.2 0.2 {}
|
||||
T {@value} 15 -3.75 0 0 0.2 0.2 {}
|
||||
T {m=@m} 15 11.25 0 0 0.2 0.2 {}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @pinlist @value"
|
||||
template="name=I0 value=1m"}
|
||||
V {}
|
||||
|
|
@ -15,3 +16,5 @@ A 4 0 0 15 270 360 {}
|
|||
P 4 7 -0 -7.5 -0 2.5 2.5 2.5 -0 10 -2.5 2.5 0 2.5 -0 -7.5 {fill=true}
|
||||
T {@name
|
||||
@value} 20 -10 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @pinlist CUR=' @CUR ' MIN=' @MIN ' MAX=' @MAX ' "
|
||||
template="name=G1 CUR=cos(V(IN)) MIN=-2 MAX=2"}
|
||||
V {}
|
||||
|
|
@ -19,3 +20,5 @@ T {@name} 20 -17.5 0 0 0.2 0.2 {}
|
|||
T {@CUR
|
||||
MIN=@MIN
|
||||
MAX=@MAX} 20 0 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @@p @@m pwl(1) @@cp @@cm @TABLE"
|
||||
template="name=G1 TABLE=\\"1 0 2 1m\\""
|
||||
}
|
||||
|
|
@ -29,7 +30,11 @@ L 4 -35 -15 -35 -10 {}
|
|||
L 4 -37.5 12.5 -32.5 12.5 {}
|
||||
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout}
|
||||
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=cp dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
|
||||
T {pwl(1)=@TABLE} 20 0 0 0 0.2 0.2 {}
|
||||
T {@name} 20 -15 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
|
||||
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC8 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @pinlist TABLE \{ @CTRL \} = @TABLE"
|
||||
template="name=G1 CTRL=\\"V(plus,minus)\\" TABLE=\\"(0, 0) (1, 100m) (2, 300m)\\""}
|
||||
V {}
|
||||
|
|
@ -18,3 +19,5 @@ A 4 0 0 15 270 360 {}
|
|||
T {@name} 20 -17.5 0 0 0.2 0.2 {}
|
||||
T {@CTRL
|
||||
@TABLE} 20 0 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=jumper
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=jumper
|
||||
format="* @name @pinlist"
|
||||
verilog_format="// @name (@@P\\\\, @@M\\\\);"
|
||||
tedax_format="footprint @name @footprint
|
||||
|
|
@ -23,3 +24,5 @@ T {@name} 15 -13.75 0 0 0.2 0.2 {}
|
|||
T {@value} 15 1.25 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.7 file_version=1.2}
|
||||
G {type=label
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=label
|
||||
format="*.alias @lab"
|
||||
template="name=l1 sig_type=std_logic lab=xxx"}
|
||||
V {}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,12 @@
|
|||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=show_label
|
||||
template="name=l1"
|
||||
net_name=true
|
||||
highlight=true}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -20 -20 0 0 {}
|
||||
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
|
||||
T {@#0:net_name} -22.5 -30.625 0 1 0.33 0.33 {}
|
||||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=diode
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=diode
|
||||
format="@spiceprefix@name @pinlist @model"
|
||||
tedax_format="footprint @name @footprint
|
||||
value @name @value
|
||||
|
|
@ -25,3 +26,5 @@ T {@name} 7.5 -20 0 0 0.2 0.2 {}
|
|||
T {@value} 7.5 12.5 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -5 16.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=nmos
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=nmos
|
||||
format="@name @pinlist @model m=@m"
|
||||
template="name=X1 model=irf540 m=1"}
|
||||
V {}
|
||||
|
|
@ -21,3 +22,6 @@ T {@model x @m} 8.75 -6.25 0 0 0.2 0.2 {}
|
|||
T {@#0:pinnumber} 25 -27.5 0 0 0.2 0.2 {layer=13}
|
||||
T {@#2:pinnumber} 25 17.5 0 0 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -10 6.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.7nmos4 file_version=1.2}
|
||||
G {type=nmos
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=nmos
|
||||
format="@spiceprefix@name @pinlist @model w=@w l=@l @extra m=@m"
|
||||
template="name=M1 model=nmos w=5u l=0.18u m=1"}
|
||||
V {}
|
||||
|
|
@ -22,5 +23,9 @@ B 5 -22.5 -2.5 -17.5 2.5 {name=g dir=in}
|
|||
B 5 17.5 27.5 22.5 32.5 {name=s dir=inout}
|
||||
B 5 17.5 -2.5 22.5 2.5 {name=b dir=in}
|
||||
T {@w\\/@l\\/@m} 7.5 -18.75 0 0 0.2 0.2 {}
|
||||
T {@spiceprefix@name} 7.5 6.25 0 0 0.2 0.2 {}
|
||||
T {@spiceprefix@name} 7.5 7.5 0 0 0.2 0.2 {}
|
||||
T {D} 25 -27.5 0 0 0.15 0.15 {}
|
||||
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
|
||||
T {@#3:net_name} 25 0.625 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=noconn
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=noconn
|
||||
format="* noconn "
|
||||
vhdl_ignore=true
|
||||
verilog_ignore=true
|
||||
|
|
@ -8,7 +9,7 @@ template="name=l1"}
|
|||
V {}
|
||||
S {}
|
||||
E {}
|
||||
L 4 -3.75 0 0 -0 {}
|
||||
L 4 -6.25 0 0 -0 {}
|
||||
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=inout}
|
||||
A 4 -7.5 0.2083333333333333 3.755782578608322 176.8201698801358 360 {}
|
||||
T {NC} 0 -6.25 1 1 0.2 0.2 {}
|
||||
T {@#0:net_name} -23.125 -4.375 0 1 0.15 0.15 {layer=15}
|
||||
T {NC} -18.75 -4.375 0 0 0.15 0.15 { layer=4}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=npn
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=npn
|
||||
format="@name @pinlist @model area=@area"
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @device"
|
||||
|
|
@ -24,5 +25,8 @@ P 4 4 20 30 13.75 13.75 3.75 23.75 20 30 {fill=true}
|
|||
T {@model} 20 -15 0 0 0.2 0.2 {}
|
||||
T {@name} 20 5 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} 25 -28.75 0 0 0.2 0.2 {layer=13}
|
||||
T {@#2:pinnumber} 25 23.75 0 0 0.2 0.2 {layer=13}
|
||||
T {@#2:pinnumber} 25 18.75 0 0 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -5 6.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=parax_cap
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=parax_cap
|
||||
format="@name @pinlist @gnd @value m=@m"
|
||||
verilog_ignore=true
|
||||
template="name=X1 gnd=0 value=4f m=1"}
|
||||
|
|
@ -18,3 +19,4 @@ T {@value} 10 13.75 0 0 0.2 0.15 {}
|
|||
T {@name} 10 3.75 0 0 0.2 0.15 {}
|
||||
T {@gnd} -5 7.5 0 1 0.2 0.15 {}
|
||||
T {m=@m} 10 -6.25 0 0 0.2 0.15 {}
|
||||
T {@#0:net_name} 5 -22.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=pmos
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=pmos
|
||||
format="@name @pinlist @model"
|
||||
template="name=X1 model=irf5305"}
|
||||
V {}
|
||||
|
|
@ -20,3 +21,6 @@ A 4 -8.75 0 3.75 270 360 {}
|
|||
T {@model} 7.5 -17.5 0 0 0.2 0.2 {}
|
||||
T {@name} 7.5 5 0 0 0.2 0.2 {999}
|
||||
T {D} 25 20 0 0 0.15 0.15 {}
|
||||
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.7 file_version=1.2}
|
||||
G {type=pmos
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=pmos
|
||||
format="@spiceprefix@name @pinlist @model w=@w l=@l @extra m=@m"
|
||||
template="name=M1 model=pmos w=5u l=0.18u m=1"}
|
||||
V {}
|
||||
|
|
@ -28,5 +29,9 @@ B 5 -22.5 -2.5 -17.5 2.5 {name=g dir=in}
|
|||
B 5 17.5 -32.5 22.5 -27.5 {name=s dir=inout}
|
||||
B 5 17.5 -2.5 22.5 2.5 {name=b dir=in}
|
||||
T {@w\\/@l\\/@m} 7.5 -17.5 0 0 0.2 0.2 {}
|
||||
T {@spiceprefix@name} 7.5 6.25 0 0 0.2 0.2 {}
|
||||
T {@spiceprefix@name} 7.5 7.5 0 0 0.2 0.2 {}
|
||||
T {D} 25 20 0 0 0.15 0.15 {}
|
||||
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
|
||||
T {@#3:net_name} 25 1.25 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.7 file_version=1.2}
|
||||
G {type=pnp
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=pnp
|
||||
format="@spiceprefix@name @pinlist @model area=@area"
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @device"
|
||||
|
|
@ -24,3 +25,6 @@ T {@name} 20 1.25 0 0 0.2 0.2 {}
|
|||
T {@#2:pinnumber} 25 -28.75 0 0 0.2 0.2 {layer=13}
|
||||
T {@#0:pinnumber} 25 17.5 0 0 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -11.25 6.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=resistor
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=resistor
|
||||
format="@name @pinlist @value m=@m"
|
||||
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
|
||||
tedax_format="footprint @name @footprint
|
||||
|
|
@ -30,7 +31,10 @@ L 4 2.5 -22.5 7.5 -22.5 {}
|
|||
L 4 5 -25 5 -20 {}
|
||||
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propagate_to=1 pinnumber=1}
|
||||
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propagate_to=0 pinnumber=2}
|
||||
T {@name} 15 -13.75 0 0 0.2 0.2 {}
|
||||
T {@value} 15 1.25 0 0 0.2 0.2 {}
|
||||
T {@name} 15 -23.75 0 0 0.2 0.2 {}
|
||||
T {@value} 15 -8.75 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {m=@m} 15 6.25 0 0 0.2 0.2 {}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=switch
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=switch
|
||||
format="@name @@P @@M @@CP @@CM @model"
|
||||
template="name=S1 model=SWITCH1"
|
||||
}
|
||||
|
|
@ -22,3 +23,7 @@ B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout }
|
|||
B 5 -42.5 17.5 -37.5 22.5 {name=CM dir=in }
|
||||
T {@name} 5 -13 2 1 0.2 0.2 {}
|
||||
T {@model} 5 -2 0 0 0.2 0.2 {}
|
||||
T {@#1:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#0:net_name} -45 -12.5 0 1 0.15 0.15 {layer=15}
|
||||
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
G {type=resistor
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=resistor
|
||||
format="@name @#0 @#1 @value m=@m"
|
||||
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
|
||||
tedax_format="footprint @name @footprint
|
||||
|
|
@ -39,3 +40,6 @@ T {@value} 15 1.25 0 0 0.2 0.2 {}
|
|||
T {@#2:pinnumber} -10 -28.75 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -10 18.75 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:pinnumber} -30 3.75 0 1 0.2 0.2 {layer=13}
|
||||
T {@#2:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#0:net_name} -35 -12.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=vccs
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=vccs
|
||||
format="@name @pinlist @value"
|
||||
template="name=G1 value=1e-6"}
|
||||
V {}
|
||||
|
|
@ -32,3 +33,7 @@ B 5 -42.5 -22.5 -37.5 -17.5 {name=cp dir=in}
|
|||
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
|
||||
T {@value} 20 5 0 0 0.2 0.2 {}
|
||||
T {@name} 20 -17.5 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
|
||||
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @@p @@m @function @@cp @@cm @TABLE"
|
||||
template="name=G1 function=\\"vcr pwl(1)\\" TABLE=\\"1 0 2 3\\""
|
||||
}
|
||||
|
|
@ -25,8 +26,12 @@ L 4 -20 -20 -10 -20 {}
|
|||
L 4 -15 -25 -15 -15 {}
|
||||
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout}
|
||||
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=cp dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
|
||||
T {pwl(1)=@TABLE} 20 0 0 0 0.2 0.2 {}
|
||||
T {@function} 20 -12.5 0 0 0.2 0.2 {}
|
||||
T {@name} 20 -25 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
|
||||
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=vcvs
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=vcvs
|
||||
format="@name @pinlist @value"
|
||||
template="name=E1 value=3"}
|
||||
V {}
|
||||
|
|
@ -24,3 +25,7 @@ B 5 -42.5 -22.5 -37.5 -17.5 {name=cp dir=in}
|
|||
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
|
||||
T {@value} 20 5 0 0 0.2 0.2 {}
|
||||
T {@name} 20 -17.5 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
|
||||
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5 file_version=1.1}
|
||||
G {type=vsource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=vsource
|
||||
format="@name @pinlist @value"
|
||||
template="name=V1 value=3"}
|
||||
V {}
|
||||
|
|
@ -13,3 +14,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
|
|||
A 4 0 0 15 270 360 {}
|
||||
T {@value} 20 0 0 0 0.2 0.2 {}
|
||||
T {@name} 20 -17.5 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @pinlist VOL=' @VOL '"
|
||||
template="name=E1 VOL=cos(V(IN))"
|
||||
}
|
||||
|
|
@ -14,3 +15,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
|
|||
A 4 0 0 15 270 360 {}
|
||||
T {@VOL} 20 0 0 0 0.2 0.2 {}
|
||||
T {@name} 20 -17.5 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
G {type=isource
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=isource
|
||||
format="@name @@p @@m pwl(1) @@cp @@cm @TABLE"
|
||||
template="name=E1 TABLE=\\"1 0 2 3\\""
|
||||
}
|
||||
|
|
@ -11,8 +12,12 @@ L 4 -15 -25 -15 -15 {}
|
|||
L 4 -0 -30 -0 30 {}
|
||||
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout}
|
||||
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
|
||||
B 5 -42.5 -22.5 -37.5 -17.5 {name=cp dir=in}
|
||||
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
|
||||
A 4 0 0 15 270 360 {}
|
||||
T {pwl(1)=@TABLE} 20 0 0 0 0.2 0.2 {}
|
||||
T {@name} 20 -15 0 0 0.2 0.2 {}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
|
||||
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.7 file_version=1.2}
|
||||
G {type=diode
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {type=diode
|
||||
format="@spiceprefix@name @pinlist @model"
|
||||
tedax_format="footprint @name @footprint
|
||||
device @name @device"
|
||||
|
|
@ -19,3 +20,5 @@ T {@name} 2.5 -20 0 0 0.2 0.2 {}
|
|||
T {@model} 2.5 12.5 0 0 0.2 0.2 {}
|
||||
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
|
||||
T {@#1:pinnumber} -5 17.5 0 1 0.2 0.2 {layer=13}
|
||||
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
|
||||
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
v {xschem version=2.9.7 file_version=1.2}
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.7 file_version=1.2}
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
|
|
@ -77,21 +78,21 @@ end
|
|||
"}
|
||||
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0}
|
||||
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
|
||||
C {nmos4.sym} 480 -180 0 0 {name=m1 model=cmosn w=5u l=2u m=1}
|
||||
C {pmos4.sym} 550 -430 0 0 {name=m2 model=cmosp w=5u l=2u m=1}
|
||||
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5}
|
||||
C {nmos4.sym} 480 -180 0 0 {name=m1 model=cmosn w=5u l=2u m=1 net_name=true}
|
||||
C {pmos4.sym} 550 -430 0 0 {name=m2 model=cmosp w=5u l=2u m=1 net_name=true}
|
||||
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5 net_name=true}
|
||||
C {lab_pin.sym} 500 -120 0 0 {name=p1 lab=0}
|
||||
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC}
|
||||
C {nmos4.sym} 260 -180 0 1 {name=m3 model=cmosn w=5u l=2u m=1}
|
||||
C {nmos4.sym} 260 -180 0 1 {name=m3 model=cmosn w=5u l=2u m=1 net_name=true}
|
||||
C {lab_pin.sym} 240 -120 0 0 {name=p3 lab=0}
|
||||
C {isource.sym} 240 -290 0 0 {name=IBIAS value=100u}
|
||||
C {isource.sym} 240 -290 0 0 {name=IBIAS value=100u net_name=true}
|
||||
C {lab_pin.sym} 240 -320 0 0 {name=p4 lab=0}
|
||||
C {nmos4.sym} 410 -280 0 0 {name=m4 model=cmosn w=10u l=1u m=1}
|
||||
C {nmos4.sym} 410 -280 0 0 {name=m4 model=cmosn w=10u l=1u m=1 net_name=true}
|
||||
C {lab_pin.sym} 450 -280 0 1 {name=p5 lab=0}
|
||||
C {nmos4.sym} 590 -280 0 1 {name=m5 model=cmosn w=10u l=1u m=1}
|
||||
C {nmos4.sym} 590 -280 0 1 {name=m5 model=cmosn w=10u l=1u m=1 net_name=true}
|
||||
C {lab_pin.sym} 550 -280 0 0 {name=p0 lab=0}
|
||||
C {lab_pin.sym} 590 -430 0 1 {name=p6 lab=VCC}
|
||||
C {pmos4.sym} 450 -430 0 1 {name=m6 model=cmosp w=5u l=2u m=1}
|
||||
C {pmos4.sym} 450 -430 0 1 {name=m6 model=cmosp w=5u l=2u m=1 net_name=true}
|
||||
C {lab_pin.sym} 410 -430 0 0 {name=p7 lab=VCC}
|
||||
C {lab_pin.sym} 500 -520 0 0 {name=p8 lab=VCC}
|
||||
C {lab_pin.sym} 370 -280 0 0 {name=p9 lab=PLUS}
|
||||
|
|
@ -100,15 +101,15 @@ C {lab_pin.sym} 830 -360 0 1 {name=p11 lab=DIFFOUT}
|
|||
C {lab_pin.sym} 430 -380 0 0 {name=p12 lab=GP}
|
||||
C {lab_pin.sym} 240 -230 0 0 {name=p13 lab=GN}
|
||||
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0}
|
||||
C {vsource.sym} 30 -310 0 0 {name=VPLUS value="2.5 pwl 0 2.4 10n 2.4 10.1n 2.6"}
|
||||
C {vsource.sym} 30 -310 0 0 {name=VPLUS value="2.5 pwl 0 2.4 10n 2.4 10.1n 2.6" net_name=true}
|
||||
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS}
|
||||
C {lab_pin.sym} 30 -430 0 0 {name=p16 lab=0}
|
||||
C {vsource.sym} 30 -460 0 0 {name=V1 value=2.5}
|
||||
C {vsource.sym} 30 -460 0 0 {name=V1 value=2.5 net_name=true}
|
||||
C {lab_pin.sym} 60 -520 0 1 {name=p18 lab=MINUS}
|
||||
C {lab_pin.sym} 500 -230 0 0 {name=p19 lab=SN}
|
||||
C {capa.sym} 750 -330 0 0 {name=CL
|
||||
m=1
|
||||
value=2p
|
||||
footprint=1206
|
||||
device="ceramic capacitor"}
|
||||
device="ceramic capacitor" net_name=true}
|
||||
C {lab_pin.sym} 750 -300 0 0 {name=p20 lab=0}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
|
|
@ -186,7 +187,8 @@ C {opin.sym} 1160 -520 0 0 {name=p5 lab=LAMP2}
|
|||
C {var_res.sym} 580 -710 0 0 {name=R8
|
||||
value=9.5K
|
||||
footprint=1206
|
||||
m=1}
|
||||
m=1
|
||||
net_name=true}
|
||||
C {code.sym} 40 -210 0 0 {name=MODELS value="
|
||||
** you need to get the spice models for Q2N4401, Q2N4403 and D1N914
|
||||
** and put them in file referenced below.
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.7 file_version=1.2}
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {
|
||||
.probe v(ga,sa) v(gb,sb)
|
||||
|
|
@ -121,23 +122,23 @@ C {ipin.sym} 530 -100 0 0 {name=p3 lab=VNN}
|
|||
C {nmos3.sym} 1090 -440 0 0 {name=xm2 model=irf540 m=1
|
||||
program=evince
|
||||
url="https://www.vishay.com/docs/91021/91021.pdf"
|
||||
}
|
||||
C {res.sym} 1030 -410 0 1 {name=R7 m=1 value=190}
|
||||
net_name=true}
|
||||
C {res.sym} 1030 -410 0 1 {name=R7 m=1 value=190 net_name=true}
|
||||
C {nmos3.sym} 1090 -760 0 0 {name=xm1 model=irf540 m=1
|
||||
program=evince
|
||||
url="https://www.vishay.com/docs/91021/91021.pdf"}
|
||||
C {res.sym} 1030 -730 0 1 {name=R0 m=1 value=190}
|
||||
url="https://www.vishay.com/docs/91021/91021.pdf" net_name=true}
|
||||
C {res.sym} 1030 -730 0 1 {name=R0 m=1 value=190 net_name=true}
|
||||
C {lab_pin.sym} 1390 -590 0 1 {name=p14 lab=OUT}
|
||||
C {lab_pin.sym} 1110 -280 0 0 {name=p18 lab=VNN}
|
||||
C {lab_wire.sym} 990 -440 0 0 {name=l8 lab=GB}
|
||||
C {res.sym} 340 -1050 0 1 {name=R2 m=1 value=50}
|
||||
C {res.sym} 180 -1050 0 1 {name=R3 m=1 value=50}
|
||||
C {res.sym} 340 -1050 0 1 {name=R2 m=1 value=50 net_name=true}
|
||||
C {res.sym} 180 -1050 0 1 {name=R3 m=1 value=50 net_name=true}
|
||||
C {lab_pin.sym} 340 -1080 0 0 {name=p10 lab=VPP}
|
||||
C {npn.sym} 160 -530 0 0 {name=Q5 model=q2n2222 area=1}
|
||||
C {pnp.sym} 820 -950 0 0 {name=Q4 model=q2n2907p area=1}
|
||||
C {res.sym} 840 -1050 0 1 {name=R9 m=1 value=50}
|
||||
C {pnp.sym} 540 -790 0 0 {name=Q6 model=q2n2907p area=1}
|
||||
C {res.sym} 560 -1050 0 1 {name=R4 m=1 value=50}
|
||||
C {npn.sym} 160 -530 0 0 {name=Q5 model=q2n2222 area=1 net_name=true}
|
||||
C {pnp.sym} 820 -950 0 0 {name=Q4 model=q2n2907p area=1 net_name=true}
|
||||
C {res.sym} 840 -1050 0 1 {name=R9 m=1 value=50 net_name=true}
|
||||
C {pnp.sym} 540 -790 0 0 {name=Q6 model=q2n2907p area=1 net_name=true}
|
||||
C {res.sym} 560 -1050 0 1 {name=R4 m=1 value=50 net_name=true}
|
||||
C {lab_pin.sym} 180 -580 0 0 {name=p15 lab=C5}
|
||||
C {lab_pin.sym} 340 -580 0 1 {name=p16 lab=C9}
|
||||
C {lab_pin.sym} 180 -1000 0 0 {name=p17 lab=E1}
|
||||
|
|
@ -146,14 +147,14 @@ C {lab_pin.sym} 340 -970 0 1 {name=p23 lab=E2}
|
|||
C {lab_pin.sym} 560 -970 0 1 {name=p28 lab=E6}
|
||||
C {lab_pin.sym} 840 -1000 0 1 {name=p29 lab=E4}
|
||||
C {lab_pin.sym} 180 -1120 0 0 {name=p34 lab=VBOOST}
|
||||
C {ammeter.sym} 1110 -540 0 0 {name=vd current=0.2093}
|
||||
C {ammeter.sym} 1110 -640 0 0 {name=vu current=0.2336}
|
||||
C {ammeter.sym} 1110 -540 0 0 {name=vd current=0.2093 net_name=true}
|
||||
C {ammeter.sym} 1110 -640 0 0 {name=vu current=0.2336 net_name=true}
|
||||
C {lab_pin.sym} 60 -1180 0 0 {name=p27 lab=VPP}
|
||||
C {pnp.sym} 200 -950 0 1 {name=Q1 model=q2n2907p area=1}
|
||||
C {pnp.sym} 360 -790 0 1 {name=Q2 model=q2n2907p area=1}
|
||||
C {pnp.sym} 200 -950 0 1 {name=Q1 model=q2n2907p area=1 net_name=true}
|
||||
C {pnp.sym} 360 -790 0 1 {name=Q2 model=q2n2907p area=1 net_name=true}
|
||||
C {lab_pin.sym} 140 -530 0 0 {name=p6 lab=PLUS}
|
||||
C {lab_pin.sym} 380 -530 0 1 {name=p24 lab=MINUS}
|
||||
C {npn.sym} 360 -530 0 1 {name=Q9 model=q2n2222 area=1}
|
||||
C {npn.sym} 360 -530 0 1 {name=Q9 model=q2n2222 area=1 net_name=true}
|
||||
C {lab_pin.sym} 560 -670 0 0 {name=p9 lab=C6}
|
||||
C {code.sym} 1040 -180 0 0 {name=STIMULI
|
||||
only_toplevel=true
|
||||
|
|
@ -191,29 +192,29 @@ rload out 0 4
|
|||
*.probe dc v(plus,vdc)
|
||||
"}
|
||||
C {lab_wire.sym} 990 -760 0 0 {name=l1 lab=GA}
|
||||
C {res.sym} 870 -440 1 1 {name=R11 m=1 value=1300}
|
||||
C {pnp.sym} 540 -490 0 0 {name=Q8 model=q2n2907p area=1}
|
||||
C {capa.sym} 1200 -930 0 0 {name=C12 m=1 value="40u"}
|
||||
C {res.sym} 870 -440 1 1 {name=R11 m=1 value=1300 net_name=true}
|
||||
C {pnp.sym} 540 -490 0 0 {name=Q8 model=q2n2907p area=1 net_name=true}
|
||||
C {capa.sym} 1200 -930 0 0 {name=C12 m=1 value="40u" net_name=true}
|
||||
C {diode.sym} 1200 -1150 0 0 {name=D0 model=d1n4148 area=1
|
||||
url="http://pdf.datasheetcatalog.com/datasheet/bytes/1N5406.pdf"}
|
||||
C {res.sym} 1200 -840 0 1 {name=R18 m=1 value=200}
|
||||
url="http://pdf.datasheetcatalog.com/datasheet/bytes/1N5406.pdf" net_name=true}
|
||||
C {res.sym} 1200 -840 0 1 {name=R18 m=1 value=200 net_name=true}
|
||||
C {zener.sym} 1330 -1150 0 0 {name=D1 model=d1n758 area=1
|
||||
url="http://www.futurlec.com/Datasheet/Diodes/1N746-1N759.pdf"}
|
||||
C {res.sym} 690 -760 0 1 {name=R14 m=1 value=4k}
|
||||
C {pnp.sym} 820 -810 0 0 {name=Q11 model=q2n2907p area=1}
|
||||
C {res.sym} 690 -850 0 1 {name=R15 m=1 value=4k}
|
||||
C {res.sym} 260 -430 0 1 {name=R5 m=1 value=600}
|
||||
C {res.sym} 260 -370 0 1 {name=R6 m=1 value=700}
|
||||
url="http://www.futurlec.com/Datasheet/Diodes/1N746-1N759.pdf" net_name=true}
|
||||
C {res.sym} 690 -760 0 1 {name=R14 m=1 value=4k net_name=true}
|
||||
C {pnp.sym} 820 -810 0 0 {name=Q11 model=q2n2907p area=1 net_name=true}
|
||||
C {res.sym} 690 -850 0 1 {name=R15 m=1 value=4k net_name=true}
|
||||
C {res.sym} 260 -430 0 1 {name=R5 m=1 value=600 net_name=true}
|
||||
C {res.sym} 260 -370 0 1 {name=R6 m=1 value=700 net_name=true}
|
||||
C {zener.sym} 180 -180 2 0 {name=D2 model=d1n755 area=1
|
||||
url="http://www.futurlec.com/Datasheet/Diodes/1N746-1N759.pdf"
|
||||
}
|
||||
C {npn.sym} 240 -210 0 0 {name=Q3 model=q2n2222 area=1}
|
||||
C {res.sym} 180 -240 0 1 {name=R1 m=1 value=10k}
|
||||
net_name=true}
|
||||
C {npn.sym} 240 -210 0 0 {name=Q3 model=q2n2222 area=1 net_name=true}
|
||||
C {res.sym} 180 -240 0 1 {name=R1 m=1 value=10k net_name=true}
|
||||
C {lab_pin.sym} 180 -270 0 0 {name=p7 lab=VSS}
|
||||
C {res.sym} 260 -100 0 1 {name=R10 m=1 value=170}
|
||||
C {res.sym} 260 -100 0 1 {name=R10 m=1 value=170 net_name=true}
|
||||
C {lab_pin.sym} 50 -70 0 0 {name=p11 lab=VNN}
|
||||
C {capa.sym} 50 -180 0 0 {name=C3 m=1 value=100n}
|
||||
C {res.sym} 560 -610 0 1 {name=R12 m=1 value=1300}
|
||||
C {capa.sym} 50 -180 0 0 {name=C3 m=1 value=100n net_name=true}
|
||||
C {res.sym} 560 -610 0 1 {name=R12 m=1 value=1300 net_name=true}
|
||||
C {lab_pin.sym} 690 -800 0 0 {name=p12 lab=B1}
|
||||
C {lab_pin.sym} 340 -470 0 1 {name=p13 lab=E9}
|
||||
C {lab_pin.sym} 560 -440 0 0 {name=p19 lab=C8}
|
||||
|
|
@ -223,21 +224,21 @@ C {lab_pin.sym} 260 -160 0 1 {name=p22 lab=E3}
|
|||
C {lab_pin.sym} 260 -270 0 1 {name=p26 lab=C3}
|
||||
C {lab_pin.sym} 50 -210 0 0 {name=p30 lab=B3}
|
||||
C {lab_pin.sym} 520 -490 0 0 {name=p33 lab=VSS}
|
||||
C {res.sym} 340 -660 0 1 {name=R13 m=1 value=300}
|
||||
C {npn.sym} 200 -630 0 1 {name=Q7 model=q2n2222 area=1}
|
||||
C {res.sym} 340 -660 0 1 {name=R13 m=1 value=300 net_name=true}
|
||||
C {npn.sym} 200 -630 0 1 {name=Q7 model=q2n2222 area=1 net_name=true}
|
||||
C {lab_pin.sym} 180 -690 0 0 {name=p8 lab=C7}
|
||||
C {lab_pin.sym} 340 -690 0 1 {name=p31 lab=C2}
|
||||
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan Schippers"}
|
||||
C {lab_pin.sym} 930 -700 0 0 {name=p32 lab=SA}
|
||||
C {ammeter.sym} 1110 -350 0 0 {name=v0 current=0.2288}
|
||||
C {ammeter.sym} 1110 -350 0 0 {name=v0 current=0.2288 net_name=true}
|
||||
C {lab_pin.sym} 930 -380 0 0 {name=p35 lab=SB}
|
||||
C {ammeter.sym} 560 -890 0 0 {name=v1 current=0.01956}
|
||||
C {ammeter.sym} 340 -890 0 0 {name=v2 current=0.01947}
|
||||
C {ammeter.sym} 260 -310 0 0 {name=v3 current=0.03924}
|
||||
C {ammeter.sym} 770 -440 3 0 {name=v4 current=0.01942}
|
||||
C {ammeter.sym} 690 -680 0 0 {name=v5 current=0.006271}
|
||||
C {ammeter.sym} 180 -870 0 1 {name=v6 current=0.01955}
|
||||
C {ammeter.sym} 840 -890 0 0 {name=v7 current=0.0195}
|
||||
C {ammeter.sym} 560 -890 0 0 {name=v1 current=0.01956 net_name=true}
|
||||
C {ammeter.sym} 340 -890 0 0 {name=v2 current=0.01947 net_name=true}
|
||||
C {ammeter.sym} 260 -310 0 0 {name=v3 current=0.03924 net_name=true}
|
||||
C {ammeter.sym} 770 -440 3 0 {name=v4 current=0.01942 net_name=true}
|
||||
C {ammeter.sym} 690 -680 0 0 {name=v5 current=0.006271 net_name=true}
|
||||
C {ammeter.sym} 180 -870 0 1 {name=v6 current=0.01955 net_name=true}
|
||||
C {ammeter.sym} 840 -890 0 0 {name=v7 current=0.0195 net_name=true}
|
||||
C {spice_probe.sym} 1010 -440 0 0 {name=p36 analysis=tran voltage=-46.31}
|
||||
C {spice_probe_vdiff.sym} 930 -410 0 0 {name=p37 analysis=tran voltage=3.689}
|
||||
C {spice_probe_vdiff.sym} 930 -730 0 0 {name=p38 analysis=tran voltage=3.691}
|
||||
|
|
@ -251,7 +252,7 @@ C {spice_probe.sym} 280 -950 0 0 {name=p45 analysis=tran voltage=48.22}
|
|||
C {spice_probe.sym} 730 -810 0 0 {name=p46 analysis=tran voltage=25.21}
|
||||
C {spice_probe.sym} 610 -1180 0 0 {name=p47 analysis=tran voltage=50}
|
||||
C {spice_probe.sym} 760 -1120 0 0 {name=p48 analysis=tran voltage=50}
|
||||
C {ammeter.sym} 1300 -590 3 0 {name=v8 current=0.03055}
|
||||
C {ammeter.sym} 1300 -590 3 0 {name=v8 current=0.03055 net_name=true}
|
||||
C {spice_probe.sym} 1110 -280 0 0 {name=p49 analysis=tran voltage=-50}
|
||||
C {spice_probe.sym} 280 -630 0 1 {name=p50 analysis=tran voltage=42.36}
|
||||
C {spice_probe.sym} 340 -820 0 1 {name=p51 analysis=tran voltage=49.03}
|
||||
|
|
|
|||
|
|
@ -1,9 +1,10 @@
|
|||
v {xschem version=2.9.6 file_version=1.1}
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
N 280 -520 280 -420 {lab=B}
|
||||
N 280 -520 280 -420 {lab=#net1}
|
||||
N 480 -460 480 -240 {lab=0}
|
||||
N 280 -240 480 -240 {lab=0}
|
||||
N 280 -360 280 -300 {lab=C}
|
||||
|
|
@ -22,11 +23,12 @@ value="
|
|||
.tran 10n 800u uic
|
||||
.save all
|
||||
"}
|
||||
C {capa.sym} 280 -550 0 0 {name=C1 m=1 value=50nF footprint=1206 device="ceramic capacitor"}
|
||||
C {capa.sym} 280 -550 0 0 {name=C1 m=1 value=50nF footprint=1206 device="ceramic capacitor" net_name=true}
|
||||
C {lab_pin.sym} 280 -330 2 1 {name=l2 sig_type=std_logic lab=C}
|
||||
C {lab_pin.sym} 280 -450 2 1 {name=l3 sig_type=std_logic lab=B}
|
||||
C {lab_pin.sym} 480 -580 2 0 {name=l4 sig_type=std_logic lab=A}
|
||||
C {lab_pin.sym} 480 -240 2 0 {name=l5 sig_type=std_logic lab=0}
|
||||
C {res.sym} 480 -490 0 0 {name=R1 m=1 value=1k footprint=1206 device=resistor}
|
||||
C {ind.sym} 280 -390 0 0 {name=L1 value=10mH}
|
||||
C {vsource.sym} 280 -270 0 0 {name=V1 value="pwl 0 0 100u 0 101u 3"}
|
||||
C {res.sym} 480 -490 0 0 {name=R1 m=1 value=1k footprint=1206 device=resistor
|
||||
net_name=true}
|
||||
C {ind.sym} 280 -390 0 0 {name=L1 value=10mH net_name=true}
|
||||
C {vsource.sym} 280 -270 0 0 {name=V1 value="pwl 0 0 100u 0 101u 3" net_name=true}
|
||||
C {lab_show.sym} 280 -450 0 0 {name=l3}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC5 file_version=1.1}
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
|
|
@ -80,3 +81,4 @@ url="http://html.alldatasheet.com/html-pdf/17919/PHILIPS/MMBT2222/499/2/MMBT2222
|
|||
C {gnd.sym} 810 -170 0 0 {name=l11 lab=VSS}
|
||||
C {res.sym} 810 -280 2 0 {name=R1 m=1 value=20k footprint=1206}
|
||||
C {vdd.sym} 810 -310 0 0 {name=l13 lab=VCC}
|
||||
C {noconn.sym} 430 -500 0 0 {name=l1}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
v {xschem version=2.9.5_RC6 file_version=1.1}
|
||||
v {xschem version=2.9.8 file_version=1.2}
|
||||
G {}
|
||||
K {}
|
||||
V {}
|
||||
S {}
|
||||
E {}
|
||||
|
|
@ -293,7 +294,7 @@ manifacturer FTDI
|
|||
vendor_part_number 768-1007-1-ND
|
||||
vendor digikey"}
|
||||
C {gnd.sym} 290 -1350 0 0 {name=l2 lab=GND}
|
||||
C {noconn.sym} 290 -1380 1 0 {name=l3}
|
||||
C {noconn.sym} 290 -1380 2 0 {name=l3}
|
||||
C {noconn.sym} 190 -1270 3 0 {name=l4}
|
||||
C {vdd.sym} 160 -1660 0 0 {name=l5 lab=+5V}
|
||||
C {led.sym} 160 -1630 0 0 {name=LED8
|
||||
|
|
@ -419,7 +420,7 @@ C {gnd.sym} 1490 -1790 0 0 {name=l15 lab=GND}
|
|||
C {vdd.sym} 1630 -1880 0 0 {name=l16 lab=+5V}
|
||||
C {lab_wire.sym} 1210 -1360 0 0 {name=l17 sig_type=std_logic lab=MODE}
|
||||
C {lab_wire.sym} 1150 -1560 0 0 {name=l18 sig_type=std_logic lab=PWREN}
|
||||
C {noconn.sym} 1080 -1320 1 0 {name=l19}
|
||||
C {noconn.sym} 1080 -1320 2 0 {name=l19}
|
||||
C {lab_wire.sym} 1210 -1200 0 0 {name=l20 sig_type=std_logic lab=RESET}
|
||||
C {vdd.sym} 2060 -2140 0 0 {name=l21 lab=+5V}
|
||||
C {gnd.sym} 2170 -2070 0 1 {name=l22 lab=GND}
|
||||
|
|
@ -473,12 +474,12 @@ C {gnd.sym} 340 -860 0 0 {name=l29 lab=GND}
|
|||
C {gnd.sym} 410 -860 0 0 {name=l30 lab=GND}
|
||||
C {lab_wire.sym} 560 -1440 0 0 {name=l35 lab=USBDM}
|
||||
C {lab_wire.sym} 560 -1400 0 0 {name=l36 lab=USBDP}
|
||||
C {noconn.sym} 640 -1280 3 0 {name=l31}
|
||||
C {noconn.sym} 640 -1320 3 0 {name=l32}
|
||||
C {noconn.sym} 640 -1360 3 0 {name=l33}
|
||||
C {noconn.sym} 1080 -1120 1 1 {name=l34}
|
||||
C {noconn.sym} 1080 -1080 1 1 {name=l37}
|
||||
C {noconn.sym} 1080 -1040 1 1 {name=l38}
|
||||
C {noconn.sym} 640 -1280 0 0 {name=l31}
|
||||
C {noconn.sym} 640 -1320 0 0 {name=l32}
|
||||
C {noconn.sym} 640 -1360 0 0 {name=l33}
|
||||
C {noconn.sym} 1080 -1120 0 1 {name=l34}
|
||||
C {noconn.sym} 1080 -1080 0 1 {name=l37}
|
||||
C {noconn.sym} 1080 -1040 0 1 {name=l38}
|
||||
C {gnd.sym} 720 -820 0 0 {name=l39 lab=GND}
|
||||
C {gnd.sym} 780 -820 0 0 {name=l40 lab=GND}
|
||||
C {gnd.sym} 840 -820 0 0 {name=l41 lab=GND}
|
||||
|
|
|
|||
Loading…
Reference in New Issue