Commit Graph

75 Commits

Author SHA1 Message Date
Fischer Moseley 255c452206 tests: run in parallel with pytest-xdist 2025-04-06 21:52:43 -07:00
Fischer Moseley 77b329438a ci: remove unnecessary codecov.yml 2024-11-29 11:05:47 -07:00
Fischer Moseley 38808b9e5e ci: show coverage report in CI, explicitly specify test directory 2024-11-29 11:05:47 -07:00
Fischer Moseley 0fb3cb0418 ci: explicitly specify src/ as coverage directory 2024-11-29 11:05:47 -07:00
Fischer Moseley eddfa0bf6b ci: generate XML coverage report for codecov 2024-11-29 11:05:47 -07:00
Fischer Moseley f43732354d meta: fix coverage path 2024-11-27 20:56:20 -08:00
Fischer Moseley daedb91ff2 meta: sort imports with ruff 2024-10-08 11:42:10 -06:00
Fischer Moseley b1caec9c57 meta: switch from black to ruff 2024-10-08 11:42:10 -06:00
Fischer Moseley 4e93a049cd docs: deploy using mike in CI 2024-10-06 11:25:14 -06:00
Fischer Moseley 3fb5bfb4ad ci: run codecov directly instead of via GitHub Action 2024-09-10 13:45:40 -06:00
Fischer Moseley 354309394d meta: export JSON during tests for codecov to injest 2024-09-10 10:09:56 -06:00
Fischer Moseley 129f991dda meta: add codecov 2024-09-10 07:17:50 -06:00
Fischer Moseley e0aeb38cdb update docs 2024-03-07 12:25:30 -08:00
Fischer Moseley d075c04e2a update makefile to not require python scripts on PATH 2024-01-21 00:47:14 -08:00
Fischer Moseley bc616fd3bf inital source, imported from splat 2023-12-28 14:22:29 -08:00
Fischer Moseley 060583d8fc add working io_core autogeneration 2023-09-04 23:03:49 -04:00
Fischer Moseley 49021411ea add beginnings of working io_core with CDC/large inputs 2023-09-04 23:03:49 -04:00
Fischer Moseley 23418066f9 remove uart_rx formal 2023-09-02 11:39:16 -04:00
Fischer Moseley a841994fec remove .Xil folder after build 2023-09-02 11:39:16 -04:00
Fischer Moseley 78a7cce83a add logic_analyzer_uart example 2023-09-02 11:39:16 -04:00
Fischer Moseley 44a8c57dc5 swap to zipcpu uart_rx 2023-09-02 11:39:16 -04:00
Fischer Moseley 3af6f6ff0c add block_mem_uart example 2023-09-02 11:39:16 -04:00
Fischer Moseley 6d3a32a988 update lots of docs 2023-09-02 11:39:16 -04:00
Fischer Moseley c37a6e5e90 move icestick build steps to makefile 2023-09-02 11:39:16 -04:00
Fischer Moseley 179b3a8283 update makefile 2023-09-02 11:39:16 -04:00
Fischer Moseley 30f6e43916 update makefile to reset build agent 2023-09-02 11:39:16 -04:00
Fischer Moseley 17c91ffc34 update makefile 2023-09-02 11:39:16 -04:00
Fischer Moseley 0044ae5884 merge nexys makefile targets 2023-09-02 11:39:16 -04:00
Fischer Moseley 7e707e1fc1 manually specify vivado path in makefile 2023-09-02 11:39:16 -04:00
Fischer Moseley b9318e9bf0 make examples not require python scripts directory on path 2023-09-02 11:39:16 -04:00
Fischer Moseley 6aa27e431e build examples on self-hosted runner 2023-09-02 11:39:16 -04:00
Fischer Moseley 7ed4a9e6b8 polish uart testbenches 2023-09-02 11:39:16 -04:00
Fischer Moseley 56b2442df7 move uart code for verification to test/ 2023-09-02 11:39:16 -04:00
Fischer Moseley d580419a5b remove lut_mem, clean up examples 2023-09-02 11:39:16 -04:00
Fischer Moseley 0840786914 enforce consistent folder naming 2023-09-02 11:39:16 -04:00
Fischer Moseley c591c9c6ea update makefile targets 2023-09-02 11:39:16 -04:00
Fischer Moseley 54022fff8d make obj/ if does not exist 2023-09-02 11:39:16 -04:00
Fischer Moseley da4920d89d fetch lab-bc on the fly, archive build outputs 2023-09-02 11:39:16 -04:00
Fischer Moseley 2b483b1beb add bridge_rx formal to makefile 2023-09-02 11:39:16 -04:00
Fischer Moseley adf355c633 make examples build 2023-09-02 11:39:16 -04:00
Fischer Moseley 788c616b37 update makefile and CI 2023-09-02 11:39:16 -04:00
Fischer Moseley ac23e8a599 make functional sim run again 2023-09-02 11:39:16 -04:00
Fischer Moseley 1a536080f1 rewrite bridge_rx and add basic formal 2023-09-02 11:39:16 -04:00
Fischer Moseley df2dbf4ec6 update makefile to reflect new paths 2023-04-28 14:57:36 -04:00
Fischer Moseley cef5e9318b flip i and j, and see the light 2023-04-28 14:57:36 -04:00
Fischer Moseley 15aa5f469f add ethernet_tx_tb 2023-04-28 14:57:36 -04:00
Fischer Moseley 2c461ed08d add working ethernet_tx testbench 2023-04-28 14:57:36 -04:00
Fischer Moseley 9c5ea31d14 enforce consistent naming of lut_mem module 2023-04-28 14:57:36 -04:00
Fischer Moseley b3d402c1f5 refactor python/hdl structure 2023-04-28 14:57:36 -04:00
Fischer Moseley c507f795f1 add ethernet_tx/rx, semi-working in hardware 2023-04-28 14:57:36 -04:00